./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w128_d8_e0.c --full-output --architecture 64bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version 6497de01 Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_68366e95-16cf-4e82-8e6c-d18d732496f9/bin/uautomizer-verify-LYvppIcaGC/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_68366e95-16cf-4e82-8e6c-d18d732496f9/bin/uautomizer-verify-LYvppIcaGC/plugins/org.eclipse.equinox.launcher_1.6.800.v20240513-1750.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_68366e95-16cf-4e82-8e6c-d18d732496f9/bin/uautomizer-verify-LYvppIcaGC/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_68366e95-16cf-4e82-8e6c-d18d732496f9/bin/uautomizer-verify-LYvppIcaGC/config/AutomizerReach.xml -i ../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w128_d8_e0.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_68366e95-16cf-4e82-8e6c-d18d732496f9/bin/uautomizer-verify-LYvppIcaGC/config/svcomp-Reach-64bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_68366e95-16cf-4e82-8e6c-d18d732496f9/bin/uautomizer-verify-LYvppIcaGC --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash cc215c1310f8b4d8a3ef1501261e91ba08e9c5718658396972a4e0020f5cf43f --- Real Ultimate output --- This is Ultimate 0.3.0-dev-6497de0 [2024-11-24 01:47:09,417 INFO L188 SettingsManager]: Resetting all preferences to default values... [2024-11-24 01:47:09,508 INFO L114 SettingsManager]: Loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_68366e95-16cf-4e82-8e6c-d18d732496f9/bin/uautomizer-verify-LYvppIcaGC/config/svcomp-Reach-64bit-Automizer_Default.epf [2024-11-24 01:47:09,514 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2024-11-24 01:47:09,514 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2024-11-24 01:47:09,542 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2024-11-24 01:47:09,543 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2024-11-24 01:47:09,543 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2024-11-24 01:47:09,544 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2024-11-24 01:47:09,544 INFO L153 SettingsManager]: * Use memory slicer=true [2024-11-24 01:47:09,544 INFO L151 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2024-11-24 01:47:09,544 INFO L153 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2024-11-24 01:47:09,545 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2024-11-24 01:47:09,545 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2024-11-24 01:47:09,545 INFO L153 SettingsManager]: * Use SBE=true [2024-11-24 01:47:09,545 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2024-11-24 01:47:09,545 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2024-11-24 01:47:09,546 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2024-11-24 01:47:09,546 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2024-11-24 01:47:09,546 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2024-11-24 01:47:09,546 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2024-11-24 01:47:09,546 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2024-11-24 01:47:09,547 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2024-11-24 01:47:09,547 INFO L153 SettingsManager]: * Behaviour of calls to undefined functions=OVERAPPROXIMATE_BEHAVIOUR [2024-11-24 01:47:09,547 INFO L153 SettingsManager]: * Use constant arrays=true [2024-11-24 01:47:09,547 INFO L151 SettingsManager]: Preferences of IcfgBuilder differ from their defaults: [2024-11-24 01:47:09,547 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-11-24 01:47:09,548 INFO L153 SettingsManager]: * Only consider context switches at boundaries of atomic blocks=true [2024-11-24 01:47:09,548 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2024-11-24 01:47:09,548 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2024-11-24 01:47:09,548 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2024-11-24 01:47:09,548 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-11-24 01:47:09,548 INFO L153 SettingsManager]: * Only consider context switches at boundaries of atomic blocks=true [2024-11-24 01:47:09,549 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2024-11-24 01:47:09,549 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2024-11-24 01:47:09,549 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2024-11-24 01:47:09,549 INFO L153 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2024-11-24 01:47:09,549 INFO L153 SettingsManager]: * Compute procedure contracts=false [2024-11-24 01:47:09,550 INFO L153 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopHeads [2024-11-24 01:47:09,550 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2024-11-24 01:47:09,550 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2024-11-24 01:47:09,550 INFO L153 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false [2024-11-24 01:47:09,550 INFO L153 SettingsManager]: * Automaton type used in concurrency analysis=PETRI_NET [2024-11-24 01:47:09,550 INFO L153 SettingsManager]: * Order on configurations for Petri net unfoldings=DBO [2024-11-24 01:47:09,551 INFO L153 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2024-11-24 01:47:09,551 INFO L153 SettingsManager]: * Looper check in Petri net analysis=SEMANTIC Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_68366e95-16cf-4e82-8e6c-d18d732496f9/bin/uautomizer-verify-LYvppIcaGC Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> cc215c1310f8b4d8a3ef1501261e91ba08e9c5718658396972a4e0020f5cf43f [2024-11-24 01:47:09,916 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2024-11-24 01:47:09,926 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2024-11-24 01:47:09,929 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2024-11-24 01:47:09,930 INFO L270 PluginConnector]: Initializing CDTParser... [2024-11-24 01:47:09,931 INFO L274 PluginConnector]: CDTParser initialized [2024-11-24 01:47:09,932 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_68366e95-16cf-4e82-8e6c-d18d732496f9/bin/uautomizer-verify-LYvppIcaGC/../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w128_d8_e0.c [2024-11-24 01:47:13,187 INFO L533 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_68366e95-16cf-4e82-8e6c-d18d732496f9/bin/uautomizer-verify-LYvppIcaGC/data/583cf9725/c48b786286014266803923efabeed86a/FLAGe11dc062a [2024-11-24 01:47:13,613 INFO L384 CDTParser]: Found 1 translation units. [2024-11-24 01:47:13,617 INFO L180 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_68366e95-16cf-4e82-8e6c-d18d732496f9/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w128_d8_e0.c [2024-11-24 01:47:13,633 INFO L427 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_68366e95-16cf-4e82-8e6c-d18d732496f9/bin/uautomizer-verify-LYvppIcaGC/data/583cf9725/c48b786286014266803923efabeed86a/FLAGe11dc062a [2024-11-24 01:47:13,663 INFO L435 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_68366e95-16cf-4e82-8e6c-d18d732496f9/bin/uautomizer-verify-LYvppIcaGC/data/583cf9725/c48b786286014266803923efabeed86a [2024-11-24 01:47:13,666 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2024-11-24 01:47:13,668 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2024-11-24 01:47:13,671 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2024-11-24 01:47:13,671 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2024-11-24 01:47:13,677 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2024-11-24 01:47:13,679 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 24.11 01:47:13" (1/1) ... [2024-11-24 01:47:13,681 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@6e850472 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.11 01:47:13, skipping insertion in model container [2024-11-24 01:47:13,682 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 24.11 01:47:13" (1/1) ... [2024-11-24 01:47:13,741 INFO L175 MainTranslator]: Built tables and reachable declarations [2024-11-24 01:47:13,964 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_68366e95-16cf-4e82-8e6c-d18d732496f9/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w128_d8_e0.c[1334,1347] [2024-11-24 01:47:14,206 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-11-24 01:47:14,217 INFO L200 MainTranslator]: Completed pre-run [2024-11-24 01:47:14,230 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_68366e95-16cf-4e82-8e6c-d18d732496f9/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w128_d8_e0.c[1334,1347] [2024-11-24 01:47:14,340 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-11-24 01:47:14,356 INFO L204 MainTranslator]: Completed translation [2024-11-24 01:47:14,357 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.11 01:47:14 WrapperNode [2024-11-24 01:47:14,357 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2024-11-24 01:47:14,358 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2024-11-24 01:47:14,358 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2024-11-24 01:47:14,358 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2024-11-24 01:47:14,366 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.11 01:47:14" (1/1) ... [2024-11-24 01:47:14,393 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.11 01:47:14" (1/1) ... [2024-11-24 01:47:14,615 INFO L138 Inliner]: procedures = 18, calls = 11, calls flagged for inlining = 3, calls inlined = 3, statements flattened = 1382 [2024-11-24 01:47:14,615 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2024-11-24 01:47:14,616 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2024-11-24 01:47:14,617 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2024-11-24 01:47:14,617 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2024-11-24 01:47:14,628 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.11 01:47:14" (1/1) ... [2024-11-24 01:47:14,628 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.11 01:47:14" (1/1) ... [2024-11-24 01:47:14,664 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.11 01:47:14" (1/1) ... [2024-11-24 01:47:14,810 INFO L175 MemorySlicer]: Split 2 memory accesses to 1 slices as follows [2]. 100 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2]. The 0 writes are split as follows [0]. [2024-11-24 01:47:14,810 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.11 01:47:14" (1/1) ... [2024-11-24 01:47:14,811 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.11 01:47:14" (1/1) ... [2024-11-24 01:47:14,884 INFO L184 PluginConnector]: Executing the observer ReplaceArrayAssignments from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.11 01:47:14" (1/1) ... [2024-11-24 01:47:14,903 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.11 01:47:14" (1/1) ... [2024-11-24 01:47:14,943 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.11 01:47:14" (1/1) ... [2024-11-24 01:47:14,976 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.11 01:47:14" (1/1) ... [2024-11-24 01:47:14,986 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.11 01:47:14" (1/1) ... [2024-11-24 01:47:15,014 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2024-11-24 01:47:15,014 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2024-11-24 01:47:15,015 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2024-11-24 01:47:15,016 INFO L274 PluginConnector]: RCFGBuilder initialized [2024-11-24 01:47:15,017 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.11 01:47:14" (1/1) ... [2024-11-24 01:47:15,027 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2024-11-24 01:47:15,043 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_68366e95-16cf-4e82-8e6c-d18d732496f9/bin/uautomizer-verify-LYvppIcaGC/z3 [2024-11-24 01:47:15,062 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_68366e95-16cf-4e82-8e6c-d18d732496f9/bin/uautomizer-verify-LYvppIcaGC/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (exit command is (exit), workingDir is null) [2024-11-24 01:47:15,067 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_68366e95-16cf-4e82-8e6c-d18d732496f9/bin/uautomizer-verify-LYvppIcaGC/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Waiting until timeout for monitored process [2024-11-24 01:47:15,103 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2024-11-24 01:47:15,104 INFO L130 BoogieDeclarations]: Found specification of procedure assume_abort_if_not [2024-11-24 01:47:15,104 INFO L138 BoogieDeclarations]: Found implementation of procedure assume_abort_if_not [2024-11-24 01:47:15,104 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#0 [2024-11-24 01:47:15,104 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2024-11-24 01:47:15,105 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2024-11-24 01:47:15,440 INFO L234 CfgBuilder]: Building ICFG [2024-11-24 01:47:15,443 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2024-11-24 01:47:18,061 INFO L? ?]: Removed 754 outVars from TransFormulas that were not future-live. [2024-11-24 01:47:18,062 INFO L283 CfgBuilder]: Performing block encoding [2024-11-24 01:47:18,090 INFO L307 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2024-11-24 01:47:18,090 INFO L312 CfgBuilder]: Removed 1 assume(true) statements. [2024-11-24 01:47:18,091 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 24.11 01:47:18 BoogieIcfgContainer [2024-11-24 01:47:18,091 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2024-11-24 01:47:18,097 INFO L112 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2024-11-24 01:47:18,097 INFO L270 PluginConnector]: Initializing TraceAbstraction... [2024-11-24 01:47:18,104 INFO L274 PluginConnector]: TraceAbstraction initialized [2024-11-24 01:47:18,104 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 24.11 01:47:13" (1/3) ... [2024-11-24 01:47:18,104 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@2bf10adc and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 24.11 01:47:18, skipping insertion in model container [2024-11-24 01:47:18,105 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.11 01:47:14" (2/3) ... [2024-11-24 01:47:18,105 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@2bf10adc and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 24.11 01:47:18, skipping insertion in model container [2024-11-24 01:47:18,105 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 24.11 01:47:18" (3/3) ... [2024-11-24 01:47:18,106 INFO L128 eAbstractionObserver]: Analyzing ICFG btor2c-lazyMod.circular_pointer_top_w128_d8_e0.c [2024-11-24 01:47:18,126 INFO L216 ceAbstractionStarter]: Automizer settings: Hoare:LoopHeads NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2024-11-24 01:47:18,131 INFO L151 ceAbstractionStarter]: Applying trace abstraction to ICFG btor2c-lazyMod.circular_pointer_top_w128_d8_e0.c that has 2 procedures, 392 locations, 1 initial locations, 1 loop locations, and 1 error locations. [2024-11-24 01:47:18,244 INFO L332 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2024-11-24 01:47:18,264 INFO L333 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mAutomataTypeConcurrency=PETRI_NET, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopHeads, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@373496e6, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2024-11-24 01:47:18,266 INFO L334 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2024-11-24 01:47:18,274 INFO L276 IsEmpty]: Start isEmpty. Operand has 392 states, 386 states have (on average 1.4922279792746114) internal successors, (576), 387 states have internal predecessors, (576), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-24 01:47:18,297 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 118 [2024-11-24 01:47:18,297 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 01:47:18,299 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 01:47:18,299 INFO L396 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 01:47:18,305 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 01:47:18,307 INFO L85 PathProgramCache]: Analyzing trace with hash -1934366869, now seen corresponding path program 1 times [2024-11-24 01:47:18,315 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 01:47:18,316 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [137527698] [2024-11-24 01:47:18,316 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 01:47:18,317 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 01:47:18,602 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 01:47:18,935 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-11-24 01:47:18,935 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-24 01:47:18,935 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [137527698] [2024-11-24 01:47:18,936 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [137527698] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-24 01:47:18,936 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1300626751] [2024-11-24 01:47:18,937 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 01:47:18,937 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-24 01:47:18,937 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_68366e95-16cf-4e82-8e6c-d18d732496f9/bin/uautomizer-verify-LYvppIcaGC/z3 [2024-11-24 01:47:18,940 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_68366e95-16cf-4e82-8e6c-d18d732496f9/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-24 01:47:18,943 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_68366e95-16cf-4e82-8e6c-d18d732496f9/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2024-11-24 01:47:19,476 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 01:47:19,481 INFO L256 TraceCheckSpWp]: Trace formula consists of 685 conjuncts, 1 conjuncts are in the unsatisfiable core [2024-11-24 01:47:19,491 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-24 01:47:19,515 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-11-24 01:47:19,515 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-11-24 01:47:19,516 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1300626751] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-24 01:47:19,516 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-11-24 01:47:19,516 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [2] total 2 [2024-11-24 01:47:19,518 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1643590927] [2024-11-24 01:47:19,519 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-24 01:47:19,525 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 2 states [2024-11-24 01:47:19,526 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-24 01:47:19,554 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2024-11-24 01:47:19,555 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2024-11-24 01:47:19,558 INFO L87 Difference]: Start difference. First operand has 392 states, 386 states have (on average 1.4922279792746114) internal successors, (576), 387 states have internal predecessors, (576), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Second operand has 2 states, 2 states have (on average 53.5) internal successors, (107), 2 states have internal predecessors, (107), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 2 states have call successors, (3) [2024-11-24 01:47:19,615 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 01:47:19,615 INFO L93 Difference]: Finished difference Result 711 states and 1061 transitions. [2024-11-24 01:47:19,616 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-11-24 01:47:19,618 INFO L78 Accepts]: Start accepts. Automaton has has 2 states, 2 states have (on average 53.5) internal successors, (107), 2 states have internal predecessors, (107), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 2 states have call successors, (3) Word has length 117 [2024-11-24 01:47:19,618 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 01:47:19,628 INFO L225 Difference]: With dead ends: 711 [2024-11-24 01:47:19,628 INFO L226 Difference]: Without dead ends: 389 [2024-11-24 01:47:19,632 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 118 GetRequests, 118 SyntacticMatches, 0 SemanticMatches, 0 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2024-11-24 01:47:19,635 INFO L435 NwaCegarLoop]: 577 mSDtfsCounter, 0 mSDsluCounter, 0 mSDsCounter, 0 mSdLazyCounter, 0 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 577 SdHoareTripleChecker+Invalid, 0 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 0 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-24 01:47:19,636 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 577 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 0 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-24 01:47:19,654 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 389 states. [2024-11-24 01:47:19,700 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 389 to 389. [2024-11-24 01:47:19,702 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 389 states, 384 states have (on average 1.4869791666666667) internal successors, (571), 384 states have internal predecessors, (571), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-24 01:47:19,709 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 389 states to 389 states and 577 transitions. [2024-11-24 01:47:19,712 INFO L78 Accepts]: Start accepts. Automaton has 389 states and 577 transitions. Word has length 117 [2024-11-24 01:47:19,712 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 01:47:19,712 INFO L471 AbstractCegarLoop]: Abstraction has 389 states and 577 transitions. [2024-11-24 01:47:19,713 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 2 states, 2 states have (on average 53.5) internal successors, (107), 2 states have internal predecessors, (107), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 2 states have call successors, (3) [2024-11-24 01:47:19,713 INFO L276 IsEmpty]: Start isEmpty. Operand 389 states and 577 transitions. [2024-11-24 01:47:19,717 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 118 [2024-11-24 01:47:19,717 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 01:47:19,717 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 01:47:19,731 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_68366e95-16cf-4e82-8e6c-d18d732496f9/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Forceful destruction successful, exit code 0 [2024-11-24 01:47:19,918 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 2 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_68366e95-16cf-4e82-8e6c-d18d732496f9/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable0 [2024-11-24 01:47:19,918 INFO L396 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 01:47:19,919 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 01:47:19,919 INFO L85 PathProgramCache]: Analyzing trace with hash 504535717, now seen corresponding path program 1 times [2024-11-24 01:47:19,919 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 01:47:19,919 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1682990651] [2024-11-24 01:47:19,920 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 01:47:19,920 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 01:47:20,250 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 01:47:21,580 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-24 01:47:21,581 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-24 01:47:21,581 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1682990651] [2024-11-24 01:47:21,581 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1682990651] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-24 01:47:21,581 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-24 01:47:21,581 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-24 01:47:21,582 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [811254918] [2024-11-24 01:47:21,582 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-24 01:47:21,583 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-24 01:47:21,583 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-24 01:47:21,586 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-24 01:47:21,587 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-24 01:47:21,587 INFO L87 Difference]: Start difference. First operand 389 states and 577 transitions. Second operand has 4 states, 4 states have (on average 26.25) internal successors, (105), 4 states have internal predecessors, (105), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-24 01:47:21,685 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 01:47:21,685 INFO L93 Difference]: Finished difference Result 393 states and 581 transitions. [2024-11-24 01:47:21,687 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-24 01:47:21,688 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 26.25) internal successors, (105), 4 states have internal predecessors, (105), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 117 [2024-11-24 01:47:21,688 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 01:47:21,691 INFO L225 Difference]: With dead ends: 393 [2024-11-24 01:47:21,691 INFO L226 Difference]: Without dead ends: 391 [2024-11-24 01:47:21,696 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-24 01:47:21,697 INFO L435 NwaCegarLoop]: 575 mSDtfsCounter, 0 mSDsluCounter, 1144 mSDsCounter, 0 mSdLazyCounter, 11 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 1719 SdHoareTripleChecker+Invalid, 11 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 11 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-24 01:47:21,697 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 1719 Invalid, 11 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 11 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-24 01:47:21,700 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 391 states. [2024-11-24 01:47:21,729 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 391 to 391. [2024-11-24 01:47:21,732 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 391 states, 386 states have (on average 1.4844559585492227) internal successors, (573), 386 states have internal predecessors, (573), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-24 01:47:21,735 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 391 states to 391 states and 579 transitions. [2024-11-24 01:47:21,735 INFO L78 Accepts]: Start accepts. Automaton has 391 states and 579 transitions. Word has length 117 [2024-11-24 01:47:21,737 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 01:47:21,737 INFO L471 AbstractCegarLoop]: Abstraction has 391 states and 579 transitions. [2024-11-24 01:47:21,737 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 26.25) internal successors, (105), 4 states have internal predecessors, (105), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-24 01:47:21,737 INFO L276 IsEmpty]: Start isEmpty. Operand 391 states and 579 transitions. [2024-11-24 01:47:21,739 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 119 [2024-11-24 01:47:21,739 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 01:47:21,739 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 01:47:21,740 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2024-11-24 01:47:21,740 INFO L396 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 01:47:21,740 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 01:47:21,740 INFO L85 PathProgramCache]: Analyzing trace with hash -1537566187, now seen corresponding path program 1 times [2024-11-24 01:47:21,741 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 01:47:21,741 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [806589020] [2024-11-24 01:47:21,741 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 01:47:21,741 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 01:47:21,930 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 01:47:22,511 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-24 01:47:22,511 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-24 01:47:22,511 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [806589020] [2024-11-24 01:47:22,512 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [806589020] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-24 01:47:22,512 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-24 01:47:22,512 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-24 01:47:22,512 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2007341223] [2024-11-24 01:47:22,512 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-24 01:47:22,513 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-24 01:47:22,513 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-24 01:47:22,518 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-24 01:47:22,518 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-11-24 01:47:22,520 INFO L87 Difference]: Start difference. First operand 391 states and 579 transitions. Second operand has 5 states, 5 states have (on average 21.2) internal successors, (106), 5 states have internal predecessors, (106), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-24 01:47:23,187 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 01:47:23,188 INFO L93 Difference]: Finished difference Result 971 states and 1441 transitions. [2024-11-24 01:47:23,188 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-24 01:47:23,189 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 21.2) internal successors, (106), 5 states have internal predecessors, (106), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 118 [2024-11-24 01:47:23,191 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 01:47:23,194 INFO L225 Difference]: With dead ends: 971 [2024-11-24 01:47:23,196 INFO L226 Difference]: Without dead ends: 391 [2024-11-24 01:47:23,198 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2024-11-24 01:47:23,199 INFO L435 NwaCegarLoop]: 629 mSDtfsCounter, 1090 mSDsluCounter, 1058 mSDsCounter, 0 mSdLazyCounter, 246 mSolverCounterSat, 29 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1090 SdHoareTripleChecker+Valid, 1687 SdHoareTripleChecker+Invalid, 275 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 29 IncrementalHoareTripleChecker+Valid, 246 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2024-11-24 01:47:23,199 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1090 Valid, 1687 Invalid, 275 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [29 Valid, 246 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2024-11-24 01:47:23,204 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 391 states. [2024-11-24 01:47:23,233 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 391 to 391. [2024-11-24 01:47:23,234 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 391 states, 386 states have (on average 1.4818652849740932) internal successors, (572), 386 states have internal predecessors, (572), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-24 01:47:23,240 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 391 states to 391 states and 578 transitions. [2024-11-24 01:47:23,245 INFO L78 Accepts]: Start accepts. Automaton has 391 states and 578 transitions. Word has length 118 [2024-11-24 01:47:23,245 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 01:47:23,245 INFO L471 AbstractCegarLoop]: Abstraction has 391 states and 578 transitions. [2024-11-24 01:47:23,246 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 21.2) internal successors, (106), 5 states have internal predecessors, (106), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-24 01:47:23,246 INFO L276 IsEmpty]: Start isEmpty. Operand 391 states and 578 transitions. [2024-11-24 01:47:23,248 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 120 [2024-11-24 01:47:23,248 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 01:47:23,248 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 01:47:23,253 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2024-11-24 01:47:23,253 INFO L396 AbstractCegarLoop]: === Iteration 4 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 01:47:23,253 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 01:47:23,254 INFO L85 PathProgramCache]: Analyzing trace with hash 930225119, now seen corresponding path program 1 times [2024-11-24 01:47:23,254 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 01:47:23,254 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1457705842] [2024-11-24 01:47:23,254 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 01:47:23,254 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 01:47:23,430 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 01:47:23,902 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-24 01:47:23,902 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-24 01:47:23,903 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1457705842] [2024-11-24 01:47:23,903 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1457705842] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-24 01:47:23,903 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-24 01:47:23,903 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-24 01:47:23,903 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [641096506] [2024-11-24 01:47:23,903 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-24 01:47:23,904 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-24 01:47:23,904 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-24 01:47:23,905 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-24 01:47:23,905 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-24 01:47:23,905 INFO L87 Difference]: Start difference. First operand 391 states and 578 transitions. Second operand has 4 states, 4 states have (on average 26.75) internal successors, (107), 4 states have internal predecessors, (107), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-24 01:47:23,962 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 01:47:23,963 INFO L93 Difference]: Finished difference Result 714 states and 1055 transitions. [2024-11-24 01:47:23,963 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-24 01:47:23,964 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 26.75) internal successors, (107), 4 states have internal predecessors, (107), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 119 [2024-11-24 01:47:23,964 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 01:47:23,966 INFO L225 Difference]: With dead ends: 714 [2024-11-24 01:47:23,967 INFO L226 Difference]: Without dead ends: 393 [2024-11-24 01:47:23,967 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-24 01:47:23,968 INFO L435 NwaCegarLoop]: 574 mSDtfsCounter, 0 mSDsluCounter, 1138 mSDsCounter, 0 mSdLazyCounter, 15 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 1712 SdHoareTripleChecker+Invalid, 15 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 15 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-24 01:47:23,969 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 1712 Invalid, 15 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 15 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-24 01:47:23,970 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 393 states. [2024-11-24 01:47:23,980 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 393 to 393. [2024-11-24 01:47:23,982 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 393 states, 388 states have (on average 1.4793814432989691) internal successors, (574), 388 states have internal predecessors, (574), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-24 01:47:23,988 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 393 states to 393 states and 580 transitions. [2024-11-24 01:47:23,989 INFO L78 Accepts]: Start accepts. Automaton has 393 states and 580 transitions. Word has length 119 [2024-11-24 01:47:23,989 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 01:47:23,990 INFO L471 AbstractCegarLoop]: Abstraction has 393 states and 580 transitions. [2024-11-24 01:47:23,990 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 26.75) internal successors, (107), 4 states have internal predecessors, (107), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-24 01:47:23,990 INFO L276 IsEmpty]: Start isEmpty. Operand 393 states and 580 transitions. [2024-11-24 01:47:23,992 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 121 [2024-11-24 01:47:23,995 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 01:47:23,996 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 01:47:23,996 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3 [2024-11-24 01:47:23,996 INFO L396 AbstractCegarLoop]: === Iteration 5 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 01:47:23,997 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 01:47:23,997 INFO L85 PathProgramCache]: Analyzing trace with hash 1969209588, now seen corresponding path program 1 times [2024-11-24 01:47:23,997 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 01:47:23,997 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1477031529] [2024-11-24 01:47:23,997 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 01:47:23,997 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 01:47:24,149 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 01:47:24,839 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-24 01:47:24,841 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-24 01:47:24,841 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1477031529] [2024-11-24 01:47:24,841 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1477031529] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-24 01:47:24,841 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-24 01:47:24,841 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-24 01:47:24,842 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [742297146] [2024-11-24 01:47:24,842 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-24 01:47:24,842 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-24 01:47:24,843 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-24 01:47:24,844 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-24 01:47:24,844 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-24 01:47:24,845 INFO L87 Difference]: Start difference. First operand 393 states and 580 transitions. Second operand has 4 states, 4 states have (on average 27.0) internal successors, (108), 4 states have internal predecessors, (108), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-24 01:47:25,040 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 01:47:25,043 INFO L93 Difference]: Finished difference Result 716 states and 1056 transitions. [2024-11-24 01:47:25,044 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-24 01:47:25,044 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 27.0) internal successors, (108), 4 states have internal predecessors, (108), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 120 [2024-11-24 01:47:25,045 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 01:47:25,047 INFO L225 Difference]: With dead ends: 716 [2024-11-24 01:47:25,047 INFO L226 Difference]: Without dead ends: 393 [2024-11-24 01:47:25,047 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-11-24 01:47:25,052 INFO L435 NwaCegarLoop]: 534 mSDtfsCounter, 482 mSDsluCounter, 536 mSDsCounter, 0 mSdLazyCounter, 84 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 482 SdHoareTripleChecker+Valid, 1070 SdHoareTripleChecker+Invalid, 84 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 84 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-24 01:47:25,053 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [482 Valid, 1070 Invalid, 84 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 84 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-24 01:47:25,054 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 393 states. [2024-11-24 01:47:25,071 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 393 to 393. [2024-11-24 01:47:25,072 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 393 states, 388 states have (on average 1.4768041237113403) internal successors, (573), 388 states have internal predecessors, (573), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-24 01:47:25,075 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 393 states to 393 states and 579 transitions. [2024-11-24 01:47:25,076 INFO L78 Accepts]: Start accepts. Automaton has 393 states and 579 transitions. Word has length 120 [2024-11-24 01:47:25,077 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 01:47:25,077 INFO L471 AbstractCegarLoop]: Abstraction has 393 states and 579 transitions. [2024-11-24 01:47:25,078 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 27.0) internal successors, (108), 4 states have internal predecessors, (108), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-24 01:47:25,078 INFO L276 IsEmpty]: Start isEmpty. Operand 393 states and 579 transitions. [2024-11-24 01:47:25,079 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 122 [2024-11-24 01:47:25,080 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 01:47:25,080 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 01:47:25,080 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4 [2024-11-24 01:47:25,081 INFO L396 AbstractCegarLoop]: === Iteration 6 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 01:47:25,081 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 01:47:25,082 INFO L85 PathProgramCache]: Analyzing trace with hash -923559006, now seen corresponding path program 1 times [2024-11-24 01:47:25,082 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 01:47:25,082 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [587584411] [2024-11-24 01:47:25,082 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 01:47:25,083 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 01:47:25,209 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 01:47:25,562 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-24 01:47:25,563 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-24 01:47:25,563 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [587584411] [2024-11-24 01:47:25,563 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [587584411] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-24 01:47:25,563 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-24 01:47:25,563 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-24 01:47:25,563 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [843235672] [2024-11-24 01:47:25,563 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-24 01:47:25,564 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-24 01:47:25,564 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-24 01:47:25,565 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-24 01:47:25,565 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-11-24 01:47:25,565 INFO L87 Difference]: Start difference. First operand 393 states and 579 transitions. Second operand has 5 states, 5 states have (on average 21.8) internal successors, (109), 5 states have internal predecessors, (109), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-24 01:47:25,708 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 01:47:25,709 INFO L93 Difference]: Finished difference Result 718 states and 1056 transitions. [2024-11-24 01:47:25,709 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-11-24 01:47:25,710 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 21.8) internal successors, (109), 5 states have internal predecessors, (109), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 121 [2024-11-24 01:47:25,710 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 01:47:25,712 INFO L225 Difference]: With dead ends: 718 [2024-11-24 01:47:25,712 INFO L226 Difference]: Without dead ends: 393 [2024-11-24 01:47:25,713 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2024-11-24 01:47:25,714 INFO L435 NwaCegarLoop]: 568 mSDtfsCounter, 485 mSDsluCounter, 1106 mSDsCounter, 0 mSdLazyCounter, 54 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 485 SdHoareTripleChecker+Valid, 1674 SdHoareTripleChecker+Invalid, 54 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 54 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-24 01:47:25,714 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [485 Valid, 1674 Invalid, 54 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 54 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-24 01:47:25,716 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 393 states. [2024-11-24 01:47:25,728 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 393 to 393. [2024-11-24 01:47:25,729 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 393 states, 388 states have (on average 1.4742268041237114) internal successors, (572), 388 states have internal predecessors, (572), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-24 01:47:25,736 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 393 states to 393 states and 578 transitions. [2024-11-24 01:47:25,737 INFO L78 Accepts]: Start accepts. Automaton has 393 states and 578 transitions. Word has length 121 [2024-11-24 01:47:25,737 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 01:47:25,737 INFO L471 AbstractCegarLoop]: Abstraction has 393 states and 578 transitions. [2024-11-24 01:47:25,741 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 21.8) internal successors, (109), 5 states have internal predecessors, (109), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-24 01:47:25,741 INFO L276 IsEmpty]: Start isEmpty. Operand 393 states and 578 transitions. [2024-11-24 01:47:25,742 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 123 [2024-11-24 01:47:25,742 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 01:47:25,743 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 01:47:25,743 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5 [2024-11-24 01:47:25,743 INFO L396 AbstractCegarLoop]: === Iteration 7 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 01:47:25,743 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 01:47:25,744 INFO L85 PathProgramCache]: Analyzing trace with hash 728541133, now seen corresponding path program 1 times [2024-11-24 01:47:25,744 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 01:47:25,744 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1613809407] [2024-11-24 01:47:25,744 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 01:47:25,744 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 01:47:25,874 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 01:47:26,243 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-24 01:47:26,243 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-24 01:47:26,243 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1613809407] [2024-11-24 01:47:26,243 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1613809407] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-24 01:47:26,244 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-24 01:47:26,244 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-24 01:47:26,244 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1186877090] [2024-11-24 01:47:26,244 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-24 01:47:26,245 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-24 01:47:26,245 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-24 01:47:26,245 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-24 01:47:26,246 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-24 01:47:26,246 INFO L87 Difference]: Start difference. First operand 393 states and 578 transitions. Second operand has 5 states, 5 states have (on average 22.0) internal successors, (110), 5 states have internal predecessors, (110), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-24 01:47:26,425 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 01:47:26,425 INFO L93 Difference]: Finished difference Result 716 states and 1052 transitions. [2024-11-24 01:47:26,426 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-24 01:47:26,426 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 22.0) internal successors, (110), 5 states have internal predecessors, (110), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 122 [2024-11-24 01:47:26,427 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 01:47:26,429 INFO L225 Difference]: With dead ends: 716 [2024-11-24 01:47:26,429 INFO L226 Difference]: Without dead ends: 393 [2024-11-24 01:47:26,430 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-11-24 01:47:26,431 INFO L435 NwaCegarLoop]: 534 mSDtfsCounter, 1033 mSDsluCounter, 536 mSDsCounter, 0 mSdLazyCounter, 80 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1036 SdHoareTripleChecker+Valid, 1070 SdHoareTripleChecker+Invalid, 81 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 80 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-24 01:47:26,431 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1036 Valid, 1070 Invalid, 81 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 80 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-24 01:47:26,432 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 393 states. [2024-11-24 01:47:26,443 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 393 to 393. [2024-11-24 01:47:26,444 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 393 states, 388 states have (on average 1.4716494845360826) internal successors, (571), 388 states have internal predecessors, (571), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-24 01:47:26,446 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 393 states to 393 states and 577 transitions. [2024-11-24 01:47:26,447 INFO L78 Accepts]: Start accepts. Automaton has 393 states and 577 transitions. Word has length 122 [2024-11-24 01:47:26,447 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 01:47:26,447 INFO L471 AbstractCegarLoop]: Abstraction has 393 states and 577 transitions. [2024-11-24 01:47:26,447 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 22.0) internal successors, (110), 5 states have internal predecessors, (110), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-24 01:47:26,447 INFO L276 IsEmpty]: Start isEmpty. Operand 393 states and 577 transitions. [2024-11-24 01:47:26,449 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 124 [2024-11-24 01:47:26,449 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 01:47:26,449 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 01:47:26,449 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6 [2024-11-24 01:47:26,449 INFO L396 AbstractCegarLoop]: === Iteration 8 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 01:47:26,450 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 01:47:26,450 INFO L85 PathProgramCache]: Analyzing trace with hash 187884130, now seen corresponding path program 1 times [2024-11-24 01:47:26,450 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 01:47:26,450 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1687391910] [2024-11-24 01:47:26,450 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 01:47:26,450 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 01:47:26,538 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 01:47:26,968 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-24 01:47:26,969 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-24 01:47:26,969 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1687391910] [2024-11-24 01:47:26,969 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1687391910] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-24 01:47:26,969 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-24 01:47:26,969 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-24 01:47:26,969 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2065103570] [2024-11-24 01:47:26,969 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-24 01:47:26,970 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-24 01:47:26,970 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-24 01:47:26,971 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-24 01:47:26,971 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-24 01:47:26,972 INFO L87 Difference]: Start difference. First operand 393 states and 577 transitions. Second operand has 5 states, 5 states have (on average 22.2) internal successors, (111), 5 states have internal predecessors, (111), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-24 01:47:27,163 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 01:47:27,163 INFO L93 Difference]: Finished difference Result 716 states and 1050 transitions. [2024-11-24 01:47:27,164 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-24 01:47:27,165 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 22.2) internal successors, (111), 5 states have internal predecessors, (111), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 123 [2024-11-24 01:47:27,165 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 01:47:27,167 INFO L225 Difference]: With dead ends: 716 [2024-11-24 01:47:27,168 INFO L226 Difference]: Without dead ends: 393 [2024-11-24 01:47:27,171 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-11-24 01:47:27,174 INFO L435 NwaCegarLoop]: 534 mSDtfsCounter, 555 mSDsluCounter, 543 mSDsCounter, 0 mSdLazyCounter, 78 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 558 SdHoareTripleChecker+Valid, 1077 SdHoareTripleChecker+Invalid, 79 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 78 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-24 01:47:27,174 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [558 Valid, 1077 Invalid, 79 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 78 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-24 01:47:27,176 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 393 states. [2024-11-24 01:47:27,190 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 393 to 393. [2024-11-24 01:47:27,192 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 393 states, 388 states have (on average 1.4690721649484537) internal successors, (570), 388 states have internal predecessors, (570), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-24 01:47:27,195 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 393 states to 393 states and 576 transitions. [2024-11-24 01:47:27,196 INFO L78 Accepts]: Start accepts. Automaton has 393 states and 576 transitions. Word has length 123 [2024-11-24 01:47:27,196 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 01:47:27,197 INFO L471 AbstractCegarLoop]: Abstraction has 393 states and 576 transitions. [2024-11-24 01:47:27,198 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 22.2) internal successors, (111), 5 states have internal predecessors, (111), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-24 01:47:27,198 INFO L276 IsEmpty]: Start isEmpty. Operand 393 states and 576 transitions. [2024-11-24 01:47:27,200 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 125 [2024-11-24 01:47:27,201 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 01:47:27,201 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 01:47:27,201 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7 [2024-11-24 01:47:27,201 INFO L396 AbstractCegarLoop]: === Iteration 9 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 01:47:27,202 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 01:47:27,203 INFO L85 PathProgramCache]: Analyzing trace with hash 358061862, now seen corresponding path program 1 times [2024-11-24 01:47:27,203 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 01:47:27,203 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1243126039] [2024-11-24 01:47:27,203 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 01:47:27,206 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 01:47:27,364 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 01:47:27,910 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-24 01:47:27,912 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-24 01:47:27,912 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1243126039] [2024-11-24 01:47:27,913 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1243126039] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-24 01:47:27,913 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-24 01:47:27,913 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-24 01:47:27,913 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2103277487] [2024-11-24 01:47:27,913 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-24 01:47:27,914 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-24 01:47:27,914 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-24 01:47:27,914 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-24 01:47:27,918 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-24 01:47:27,919 INFO L87 Difference]: Start difference. First operand 393 states and 576 transitions. Second operand has 4 states, 4 states have (on average 28.0) internal successors, (112), 4 states have internal predecessors, (112), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-24 01:47:28,030 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 01:47:28,031 INFO L93 Difference]: Finished difference Result 716 states and 1048 transitions. [2024-11-24 01:47:28,031 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-24 01:47:28,032 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 28.0) internal successors, (112), 4 states have internal predecessors, (112), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 124 [2024-11-24 01:47:28,032 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 01:47:28,034 INFO L225 Difference]: With dead ends: 716 [2024-11-24 01:47:28,034 INFO L226 Difference]: Without dead ends: 393 [2024-11-24 01:47:28,035 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-11-24 01:47:28,035 INFO L435 NwaCegarLoop]: 550 mSDtfsCounter, 483 mSDsluCounter, 552 mSDsCounter, 0 mSdLazyCounter, 42 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 483 SdHoareTripleChecker+Valid, 1102 SdHoareTripleChecker+Invalid, 43 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 42 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-24 01:47:28,037 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [483 Valid, 1102 Invalid, 43 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 42 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-24 01:47:28,039 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 393 states. [2024-11-24 01:47:28,049 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 393 to 393. [2024-11-24 01:47:28,051 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 393 states, 388 states have (on average 1.4639175257731958) internal successors, (568), 388 states have internal predecessors, (568), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-24 01:47:28,053 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 393 states to 393 states and 574 transitions. [2024-11-24 01:47:28,053 INFO L78 Accepts]: Start accepts. Automaton has 393 states and 574 transitions. Word has length 124 [2024-11-24 01:47:28,054 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 01:47:28,054 INFO L471 AbstractCegarLoop]: Abstraction has 393 states and 574 transitions. [2024-11-24 01:47:28,054 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 28.0) internal successors, (112), 4 states have internal predecessors, (112), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-24 01:47:28,054 INFO L276 IsEmpty]: Start isEmpty. Operand 393 states and 574 transitions. [2024-11-24 01:47:28,056 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 127 [2024-11-24 01:47:28,060 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 01:47:28,060 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 01:47:28,061 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8 [2024-11-24 01:47:28,061 INFO L396 AbstractCegarLoop]: === Iteration 10 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 01:47:28,061 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 01:47:28,062 INFO L85 PathProgramCache]: Analyzing trace with hash 1506252195, now seen corresponding path program 1 times [2024-11-24 01:47:28,062 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 01:47:28,062 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [315566235] [2024-11-24 01:47:28,062 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 01:47:28,062 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 01:47:28,177 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 01:47:28,612 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-24 01:47:28,613 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-24 01:47:28,613 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [315566235] [2024-11-24 01:47:28,613 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [315566235] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-24 01:47:28,613 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-24 01:47:28,613 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-24 01:47:28,613 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1921063152] [2024-11-24 01:47:28,613 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-24 01:47:28,613 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-24 01:47:28,614 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-24 01:47:28,614 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-24 01:47:28,614 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-24 01:47:28,615 INFO L87 Difference]: Start difference. First operand 393 states and 574 transitions. Second operand has 5 states, 5 states have (on average 22.8) internal successors, (114), 5 states have internal predecessors, (114), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-24 01:47:28,738 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 01:47:28,739 INFO L93 Difference]: Finished difference Result 716 states and 1044 transitions. [2024-11-24 01:47:28,739 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-24 01:47:28,739 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 22.8) internal successors, (114), 5 states have internal predecessors, (114), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 126 [2024-11-24 01:47:28,740 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 01:47:28,742 INFO L225 Difference]: With dead ends: 716 [2024-11-24 01:47:28,742 INFO L226 Difference]: Without dead ends: 393 [2024-11-24 01:47:28,743 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-11-24 01:47:28,745 INFO L435 NwaCegarLoop]: 550 mSDtfsCounter, 1033 mSDsluCounter, 552 mSDsCounter, 0 mSdLazyCounter, 40 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1036 SdHoareTripleChecker+Valid, 1102 SdHoareTripleChecker+Invalid, 41 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 40 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-24 01:47:28,745 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1036 Valid, 1102 Invalid, 41 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 40 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-24 01:47:28,749 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 393 states. [2024-11-24 01:47:28,760 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 393 to 393. [2024-11-24 01:47:28,761 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 393 states, 388 states have (on average 1.461340206185567) internal successors, (567), 388 states have internal predecessors, (567), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-24 01:47:28,764 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 393 states to 393 states and 573 transitions. [2024-11-24 01:47:28,764 INFO L78 Accepts]: Start accepts. Automaton has 393 states and 573 transitions. Word has length 126 [2024-11-24 01:47:28,765 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 01:47:28,765 INFO L471 AbstractCegarLoop]: Abstraction has 393 states and 573 transitions. [2024-11-24 01:47:28,765 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 22.8) internal successors, (114), 5 states have internal predecessors, (114), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-24 01:47:28,765 INFO L276 IsEmpty]: Start isEmpty. Operand 393 states and 573 transitions. [2024-11-24 01:47:28,767 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 128 [2024-11-24 01:47:28,770 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 01:47:28,770 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 01:47:28,771 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable9 [2024-11-24 01:47:28,771 INFO L396 AbstractCegarLoop]: === Iteration 11 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 01:47:28,771 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 01:47:28,772 INFO L85 PathProgramCache]: Analyzing trace with hash -1413439803, now seen corresponding path program 1 times [2024-11-24 01:47:28,772 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 01:47:28,772 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1595218748] [2024-11-24 01:47:28,772 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 01:47:28,772 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 01:47:28,950 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 01:47:29,474 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-24 01:47:29,474 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-24 01:47:29,474 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1595218748] [2024-11-24 01:47:29,474 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1595218748] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-24 01:47:29,474 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-24 01:47:29,475 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-24 01:47:29,475 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [38797422] [2024-11-24 01:47:29,475 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-24 01:47:29,476 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-24 01:47:29,476 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-24 01:47:29,476 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-24 01:47:29,477 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-24 01:47:29,477 INFO L87 Difference]: Start difference. First operand 393 states and 573 transitions. Second operand has 4 states, 4 states have (on average 28.75) internal successors, (115), 4 states have internal predecessors, (115), 2 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2024-11-24 01:47:29,574 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 01:47:29,575 INFO L93 Difference]: Finished difference Result 716 states and 1042 transitions. [2024-11-24 01:47:29,575 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-24 01:47:29,575 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 28.75) internal successors, (115), 4 states have internal predecessors, (115), 2 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 127 [2024-11-24 01:47:29,576 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 01:47:29,577 INFO L225 Difference]: With dead ends: 716 [2024-11-24 01:47:29,577 INFO L226 Difference]: Without dead ends: 393 [2024-11-24 01:47:29,578 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-11-24 01:47:29,580 INFO L435 NwaCegarLoop]: 553 mSDtfsCounter, 518 mSDsluCounter, 555 mSDsCounter, 0 mSdLazyCounter, 32 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 520 SdHoareTripleChecker+Valid, 1108 SdHoareTripleChecker+Invalid, 32 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 32 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-24 01:47:29,580 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [520 Valid, 1108 Invalid, 32 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 32 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-24 01:47:29,581 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 393 states. [2024-11-24 01:47:29,591 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 393 to 393. [2024-11-24 01:47:29,592 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 393 states, 388 states have (on average 1.458762886597938) internal successors, (566), 388 states have internal predecessors, (566), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-24 01:47:29,595 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 393 states to 393 states and 572 transitions. [2024-11-24 01:47:29,595 INFO L78 Accepts]: Start accepts. Automaton has 393 states and 572 transitions. Word has length 127 [2024-11-24 01:47:29,595 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 01:47:29,596 INFO L471 AbstractCegarLoop]: Abstraction has 393 states and 572 transitions. [2024-11-24 01:47:29,596 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 28.75) internal successors, (115), 4 states have internal predecessors, (115), 2 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2024-11-24 01:47:29,596 INFO L276 IsEmpty]: Start isEmpty. Operand 393 states and 572 transitions. [2024-11-24 01:47:29,597 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 129 [2024-11-24 01:47:29,598 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 01:47:29,598 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 01:47:29,599 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable10 [2024-11-24 01:47:29,600 INFO L396 AbstractCegarLoop]: === Iteration 12 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 01:47:29,600 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 01:47:29,601 INFO L85 PathProgramCache]: Analyzing trace with hash -12372935, now seen corresponding path program 1 times [2024-11-24 01:47:29,601 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 01:47:29,601 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1063422287] [2024-11-24 01:47:29,601 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 01:47:29,601 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 01:47:29,835 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 01:47:30,326 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-24 01:47:30,326 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-24 01:47:30,326 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1063422287] [2024-11-24 01:47:30,327 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1063422287] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-24 01:47:30,327 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-24 01:47:30,327 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-24 01:47:30,327 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [209319235] [2024-11-24 01:47:30,327 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-24 01:47:30,328 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-24 01:47:30,328 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-24 01:47:30,328 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-24 01:47:30,329 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-24 01:47:30,329 INFO L87 Difference]: Start difference. First operand 393 states and 572 transitions. Second operand has 5 states, 5 states have (on average 23.2) internal successors, (116), 5 states have internal predecessors, (116), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-24 01:47:30,518 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 01:47:30,518 INFO L93 Difference]: Finished difference Result 716 states and 1040 transitions. [2024-11-24 01:47:30,519 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-24 01:47:30,519 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 23.2) internal successors, (116), 5 states have internal predecessors, (116), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 128 [2024-11-24 01:47:30,520 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 01:47:30,522 INFO L225 Difference]: With dead ends: 716 [2024-11-24 01:47:30,522 INFO L226 Difference]: Without dead ends: 393 [2024-11-24 01:47:30,523 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-11-24 01:47:30,523 INFO L435 NwaCegarLoop]: 530 mSDtfsCounter, 473 mSDsluCounter, 532 mSDsCounter, 0 mSdLazyCounter, 76 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 473 SdHoareTripleChecker+Valid, 1062 SdHoareTripleChecker+Invalid, 76 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 76 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-24 01:47:30,524 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [473 Valid, 1062 Invalid, 76 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 76 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-24 01:47:30,525 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 393 states. [2024-11-24 01:47:30,536 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 393 to 393. [2024-11-24 01:47:30,538 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 393 states, 388 states have (on average 1.4561855670103092) internal successors, (565), 388 states have internal predecessors, (565), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-24 01:47:30,540 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 393 states to 393 states and 571 transitions. [2024-11-24 01:47:30,541 INFO L78 Accepts]: Start accepts. Automaton has 393 states and 571 transitions. Word has length 128 [2024-11-24 01:47:30,541 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 01:47:30,541 INFO L471 AbstractCegarLoop]: Abstraction has 393 states and 571 transitions. [2024-11-24 01:47:30,542 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 23.2) internal successors, (116), 5 states have internal predecessors, (116), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-24 01:47:30,542 INFO L276 IsEmpty]: Start isEmpty. Operand 393 states and 571 transitions. [2024-11-24 01:47:30,543 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 130 [2024-11-24 01:47:30,543 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 01:47:30,544 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 01:47:30,544 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable11 [2024-11-24 01:47:30,544 INFO L396 AbstractCegarLoop]: === Iteration 13 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 01:47:30,544 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 01:47:30,545 INFO L85 PathProgramCache]: Analyzing trace with hash -1411160021, now seen corresponding path program 1 times [2024-11-24 01:47:30,545 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 01:47:30,545 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2042396631] [2024-11-24 01:47:30,545 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 01:47:30,545 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 01:47:30,754 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 01:47:31,330 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-24 01:47:31,330 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-24 01:47:31,330 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2042396631] [2024-11-24 01:47:31,330 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2042396631] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-24 01:47:31,330 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-24 01:47:31,330 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-24 01:47:31,330 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [232030409] [2024-11-24 01:47:31,331 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-24 01:47:31,331 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-24 01:47:31,331 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-24 01:47:31,332 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-24 01:47:31,332 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-24 01:47:31,333 INFO L87 Difference]: Start difference. First operand 393 states and 571 transitions. Second operand has 4 states, 4 states have (on average 29.25) internal successors, (117), 4 states have internal predecessors, (117), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-24 01:47:31,691 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 01:47:31,691 INFO L93 Difference]: Finished difference Result 718 states and 1040 transitions. [2024-11-24 01:47:31,692 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-24 01:47:31,692 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 29.25) internal successors, (117), 4 states have internal predecessors, (117), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 129 [2024-11-24 01:47:31,693 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 01:47:31,695 INFO L225 Difference]: With dead ends: 718 [2024-11-24 01:47:31,695 INFO L226 Difference]: Without dead ends: 393 [2024-11-24 01:47:31,696 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-24 01:47:31,698 INFO L435 NwaCegarLoop]: 562 mSDtfsCounter, 2 mSDsluCounter, 974 mSDsCounter, 0 mSdLazyCounter, 161 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2 SdHoareTripleChecker+Valid, 1536 SdHoareTripleChecker+Invalid, 161 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 161 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2024-11-24 01:47:31,699 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2 Valid, 1536 Invalid, 161 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 161 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2024-11-24 01:47:31,700 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 393 states. [2024-11-24 01:47:31,713 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 393 to 393. [2024-11-24 01:47:31,714 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 393 states, 388 states have (on average 1.4536082474226804) internal successors, (564), 388 states have internal predecessors, (564), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-24 01:47:31,716 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 393 states to 393 states and 570 transitions. [2024-11-24 01:47:31,717 INFO L78 Accepts]: Start accepts. Automaton has 393 states and 570 transitions. Word has length 129 [2024-11-24 01:47:31,717 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 01:47:31,717 INFO L471 AbstractCegarLoop]: Abstraction has 393 states and 570 transitions. [2024-11-24 01:47:31,718 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 29.25) internal successors, (117), 4 states have internal predecessors, (117), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-24 01:47:31,718 INFO L276 IsEmpty]: Start isEmpty. Operand 393 states and 570 transitions. [2024-11-24 01:47:31,719 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 131 [2024-11-24 01:47:31,720 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 01:47:31,720 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 01:47:31,720 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable12 [2024-11-24 01:47:31,721 INFO L396 AbstractCegarLoop]: === Iteration 14 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 01:47:31,721 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 01:47:31,722 INFO L85 PathProgramCache]: Analyzing trace with hash -1039408138, now seen corresponding path program 1 times [2024-11-24 01:47:31,722 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 01:47:31,722 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1184598425] [2024-11-24 01:47:31,722 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 01:47:31,722 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 01:47:31,914 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 01:47:32,431 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-24 01:47:32,432 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-24 01:47:32,432 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1184598425] [2024-11-24 01:47:32,432 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1184598425] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-24 01:47:32,432 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-24 01:47:32,432 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-24 01:47:32,432 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1048383146] [2024-11-24 01:47:32,432 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-24 01:47:32,433 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-24 01:47:32,433 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-24 01:47:32,434 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-24 01:47:32,434 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-24 01:47:32,434 INFO L87 Difference]: Start difference. First operand 393 states and 570 transitions. Second operand has 5 states, 5 states have (on average 23.6) internal successors, (118), 5 states have internal predecessors, (118), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-24 01:47:32,652 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 01:47:32,653 INFO L93 Difference]: Finished difference Result 716 states and 1036 transitions. [2024-11-24 01:47:32,654 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-24 01:47:32,654 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 23.6) internal successors, (118), 5 states have internal predecessors, (118), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 130 [2024-11-24 01:47:32,655 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 01:47:32,657 INFO L225 Difference]: With dead ends: 716 [2024-11-24 01:47:32,657 INFO L226 Difference]: Without dead ends: 393 [2024-11-24 01:47:32,657 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-11-24 01:47:32,658 INFO L435 NwaCegarLoop]: 529 mSDtfsCounter, 930 mSDsluCounter, 531 mSDsCounter, 0 mSdLazyCounter, 74 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 930 SdHoareTripleChecker+Valid, 1060 SdHoareTripleChecker+Invalid, 74 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 74 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-24 01:47:32,658 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [930 Valid, 1060 Invalid, 74 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 74 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-24 01:47:32,659 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 393 states. [2024-11-24 01:47:32,672 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 393 to 393. [2024-11-24 01:47:32,673 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 393 states, 388 states have (on average 1.4510309278350515) internal successors, (563), 388 states have internal predecessors, (563), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-24 01:47:32,675 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 393 states to 393 states and 569 transitions. [2024-11-24 01:47:32,675 INFO L78 Accepts]: Start accepts. Automaton has 393 states and 569 transitions. Word has length 130 [2024-11-24 01:47:32,675 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 01:47:32,676 INFO L471 AbstractCegarLoop]: Abstraction has 393 states and 569 transitions. [2024-11-24 01:47:32,676 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 23.6) internal successors, (118), 5 states have internal predecessors, (118), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-24 01:47:32,676 INFO L276 IsEmpty]: Start isEmpty. Operand 393 states and 569 transitions. [2024-11-24 01:47:32,677 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 132 [2024-11-24 01:47:32,677 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 01:47:32,678 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 01:47:32,678 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable13 [2024-11-24 01:47:32,678 INFO L396 AbstractCegarLoop]: === Iteration 15 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 01:47:32,678 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 01:47:32,679 INFO L85 PathProgramCache]: Analyzing trace with hash 1963964559, now seen corresponding path program 1 times [2024-11-24 01:47:32,679 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 01:47:32,679 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [468087358] [2024-11-24 01:47:32,679 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 01:47:32,679 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 01:47:32,912 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 01:47:33,404 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-24 01:47:33,404 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-24 01:47:33,404 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [468087358] [2024-11-24 01:47:33,404 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [468087358] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-24 01:47:33,405 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-24 01:47:33,405 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-24 01:47:33,405 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1685227240] [2024-11-24 01:47:33,405 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-24 01:47:33,405 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-24 01:47:33,405 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-24 01:47:33,409 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-24 01:47:33,409 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-24 01:47:33,410 INFO L87 Difference]: Start difference. First operand 393 states and 569 transitions. Second operand has 5 states, 5 states have (on average 23.8) internal successors, (119), 5 states have internal predecessors, (119), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-24 01:47:33,638 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 01:47:33,638 INFO L93 Difference]: Finished difference Result 716 states and 1034 transitions. [2024-11-24 01:47:33,639 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-24 01:47:33,639 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 23.8) internal successors, (119), 5 states have internal predecessors, (119), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 131 [2024-11-24 01:47:33,640 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 01:47:33,642 INFO L225 Difference]: With dead ends: 716 [2024-11-24 01:47:33,642 INFO L226 Difference]: Without dead ends: 393 [2024-11-24 01:47:33,643 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-11-24 01:47:33,643 INFO L435 NwaCegarLoop]: 529 mSDtfsCounter, 466 mSDsluCounter, 538 mSDsCounter, 0 mSdLazyCounter, 72 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 466 SdHoareTripleChecker+Valid, 1067 SdHoareTripleChecker+Invalid, 72 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 72 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-11-24 01:47:33,643 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [466 Valid, 1067 Invalid, 72 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 72 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-11-24 01:47:33,644 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 393 states. [2024-11-24 01:47:33,661 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 393 to 393. [2024-11-24 01:47:33,662 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 393 states, 388 states have (on average 1.4484536082474226) internal successors, (562), 388 states have internal predecessors, (562), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-24 01:47:33,664 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 393 states to 393 states and 568 transitions. [2024-11-24 01:47:33,665 INFO L78 Accepts]: Start accepts. Automaton has 393 states and 568 transitions. Word has length 131 [2024-11-24 01:47:33,665 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 01:47:33,665 INFO L471 AbstractCegarLoop]: Abstraction has 393 states and 568 transitions. [2024-11-24 01:47:33,666 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 23.8) internal successors, (119), 5 states have internal predecessors, (119), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-24 01:47:33,666 INFO L276 IsEmpty]: Start isEmpty. Operand 393 states and 568 transitions. [2024-11-24 01:47:33,667 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 133 [2024-11-24 01:47:33,667 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 01:47:33,668 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 01:47:33,668 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable14 [2024-11-24 01:47:33,668 INFO L396 AbstractCegarLoop]: === Iteration 16 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 01:47:33,668 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 01:47:33,669 INFO L85 PathProgramCache]: Analyzing trace with hash -1513937355, now seen corresponding path program 1 times [2024-11-24 01:47:33,669 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 01:47:33,669 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1497249680] [2024-11-24 01:47:33,669 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 01:47:33,669 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 01:47:33,896 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 01:47:34,127 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-24 01:47:34,127 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-24 01:47:34,127 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1497249680] [2024-11-24 01:47:34,128 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1497249680] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-24 01:47:34,128 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-24 01:47:34,128 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-24 01:47:34,128 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1858817765] [2024-11-24 01:47:34,128 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-24 01:47:34,128 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-24 01:47:34,129 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-24 01:47:34,129 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-24 01:47:34,129 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-24 01:47:34,130 INFO L87 Difference]: Start difference. First operand 393 states and 568 transitions. Second operand has 4 states, 4 states have (on average 30.0) internal successors, (120), 4 states have internal predecessors, (120), 2 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2024-11-24 01:47:34,247 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 01:47:34,247 INFO L93 Difference]: Finished difference Result 716 states and 1032 transitions. [2024-11-24 01:47:34,247 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-24 01:47:34,248 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 30.0) internal successors, (120), 4 states have internal predecessors, (120), 2 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 132 [2024-11-24 01:47:34,248 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 01:47:34,250 INFO L225 Difference]: With dead ends: 716 [2024-11-24 01:47:34,250 INFO L226 Difference]: Without dead ends: 393 [2024-11-24 01:47:34,251 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-11-24 01:47:34,252 INFO L435 NwaCegarLoop]: 549 mSDtfsCounter, 512 mSDsluCounter, 551 mSDsCounter, 0 mSdLazyCounter, 30 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 514 SdHoareTripleChecker+Valid, 1100 SdHoareTripleChecker+Invalid, 30 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 30 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-24 01:47:34,252 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [514 Valid, 1100 Invalid, 30 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 30 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-24 01:47:34,253 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 393 states. [2024-11-24 01:47:34,266 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 393 to 393. [2024-11-24 01:47:34,267 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 393 states, 388 states have (on average 1.4458762886597938) internal successors, (561), 388 states have internal predecessors, (561), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-24 01:47:34,270 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 393 states to 393 states and 567 transitions. [2024-11-24 01:47:34,270 INFO L78 Accepts]: Start accepts. Automaton has 393 states and 567 transitions. Word has length 132 [2024-11-24 01:47:34,270 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 01:47:34,270 INFO L471 AbstractCegarLoop]: Abstraction has 393 states and 567 transitions. [2024-11-24 01:47:34,271 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 30.0) internal successors, (120), 4 states have internal predecessors, (120), 2 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2024-11-24 01:47:34,271 INFO L276 IsEmpty]: Start isEmpty. Operand 393 states and 567 transitions. [2024-11-24 01:47:34,272 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 134 [2024-11-24 01:47:34,273 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 01:47:34,273 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 01:47:34,273 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable15 [2024-11-24 01:47:34,273 INFO L396 AbstractCegarLoop]: === Iteration 17 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 01:47:34,274 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 01:47:34,274 INFO L85 PathProgramCache]: Analyzing trace with hash -946071650, now seen corresponding path program 1 times [2024-11-24 01:47:34,274 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 01:47:34,274 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1695792987] [2024-11-24 01:47:34,274 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 01:47:34,274 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 01:47:34,457 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 01:47:35,220 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-24 01:47:35,220 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-24 01:47:35,220 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1695792987] [2024-11-24 01:47:35,220 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1695792987] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-24 01:47:35,220 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-24 01:47:35,221 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-24 01:47:35,221 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [301952655] [2024-11-24 01:47:35,221 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-24 01:47:35,221 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-24 01:47:35,221 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-24 01:47:35,222 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-24 01:47:35,222 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-11-24 01:47:35,223 INFO L87 Difference]: Start difference. First operand 393 states and 567 transitions. Second operand has 5 states, 5 states have (on average 24.2) internal successors, (121), 5 states have internal predecessors, (121), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-24 01:47:35,826 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 01:47:35,826 INFO L93 Difference]: Finished difference Result 720 states and 1035 transitions. [2024-11-24 01:47:35,826 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-11-24 01:47:35,827 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 24.2) internal successors, (121), 5 states have internal predecessors, (121), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 133 [2024-11-24 01:47:35,827 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 01:47:35,829 INFO L225 Difference]: With dead ends: 720 [2024-11-24 01:47:35,829 INFO L226 Difference]: Without dead ends: 397 [2024-11-24 01:47:35,830 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-11-24 01:47:35,831 INFO L435 NwaCegarLoop]: 414 mSDtfsCounter, 480 mSDsluCounter, 807 mSDsCounter, 0 mSdLazyCounter, 460 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 480 SdHoareTripleChecker+Valid, 1221 SdHoareTripleChecker+Invalid, 460 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 460 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2024-11-24 01:47:35,832 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [480 Valid, 1221 Invalid, 460 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 460 Invalid, 0 Unknown, 0 Unchecked, 0.6s Time] [2024-11-24 01:47:35,833 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 397 states. [2024-11-24 01:47:35,847 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 397 to 396. [2024-11-24 01:47:35,848 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 396 states, 391 states have (on average 1.4424552429667519) internal successors, (564), 391 states have internal predecessors, (564), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-24 01:47:35,851 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 396 states to 396 states and 570 transitions. [2024-11-24 01:47:35,851 INFO L78 Accepts]: Start accepts. Automaton has 396 states and 570 transitions. Word has length 133 [2024-11-24 01:47:35,852 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 01:47:35,852 INFO L471 AbstractCegarLoop]: Abstraction has 396 states and 570 transitions. [2024-11-24 01:47:35,852 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 24.2) internal successors, (121), 5 states have internal predecessors, (121), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-24 01:47:35,852 INFO L276 IsEmpty]: Start isEmpty. Operand 396 states and 570 transitions. [2024-11-24 01:47:35,854 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 135 [2024-11-24 01:47:35,854 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 01:47:35,854 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 01:47:35,855 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable16 [2024-11-24 01:47:35,855 INFO L396 AbstractCegarLoop]: === Iteration 18 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 01:47:35,855 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 01:47:35,855 INFO L85 PathProgramCache]: Analyzing trace with hash -1423363068, now seen corresponding path program 1 times [2024-11-24 01:47:35,856 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 01:47:35,856 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [648015125] [2024-11-24 01:47:35,856 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 01:47:35,856 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 01:47:36,097 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 01:47:37,165 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-24 01:47:37,165 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-24 01:47:37,166 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [648015125] [2024-11-24 01:47:37,167 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [648015125] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-24 01:47:37,167 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-24 01:47:37,167 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-11-24 01:47:37,167 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1226430143] [2024-11-24 01:47:37,167 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-24 01:47:37,168 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-11-24 01:47:37,168 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-24 01:47:37,169 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-11-24 01:47:37,169 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2024-11-24 01:47:37,169 INFO L87 Difference]: Start difference. First operand 396 states and 570 transitions. Second operand has 6 states, 6 states have (on average 20.333333333333332) internal successors, (122), 6 states have internal predecessors, (122), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-24 01:47:37,385 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 01:47:37,385 INFO L93 Difference]: Finished difference Result 845 states and 1205 transitions. [2024-11-24 01:47:37,386 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-24 01:47:37,386 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 20.333333333333332) internal successors, (122), 6 states have internal predecessors, (122), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 134 [2024-11-24 01:47:37,387 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 01:47:37,389 INFO L225 Difference]: With dead ends: 845 [2024-11-24 01:47:37,389 INFO L226 Difference]: Without dead ends: 519 [2024-11-24 01:47:37,390 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=23, Invalid=49, Unknown=0, NotChecked=0, Total=72 [2024-11-24 01:47:37,390 INFO L435 NwaCegarLoop]: 551 mSDtfsCounter, 857 mSDsluCounter, 1647 mSDsCounter, 0 mSdLazyCounter, 60 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 860 SdHoareTripleChecker+Valid, 2198 SdHoareTripleChecker+Invalid, 63 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 60 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-24 01:47:37,391 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [860 Valid, 2198 Invalid, 63 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 60 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-24 01:47:37,392 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 519 states. [2024-11-24 01:47:37,413 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 519 to 519. [2024-11-24 01:47:37,414 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 519 states, 511 states have (on average 1.4207436399217221) internal successors, (726), 511 states have internal predecessors, (726), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-11-24 01:47:37,417 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 519 states to 519 states and 738 transitions. [2024-11-24 01:47:37,418 INFO L78 Accepts]: Start accepts. Automaton has 519 states and 738 transitions. Word has length 134 [2024-11-24 01:47:37,418 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 01:47:37,418 INFO L471 AbstractCegarLoop]: Abstraction has 519 states and 738 transitions. [2024-11-24 01:47:37,419 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 20.333333333333332) internal successors, (122), 6 states have internal predecessors, (122), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-24 01:47:37,419 INFO L276 IsEmpty]: Start isEmpty. Operand 519 states and 738 transitions. [2024-11-24 01:47:37,425 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 323 [2024-11-24 01:47:37,425 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 01:47:37,425 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 01:47:37,425 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable17 [2024-11-24 01:47:37,426 INFO L396 AbstractCegarLoop]: === Iteration 19 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 01:47:37,426 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 01:47:37,426 INFO L85 PathProgramCache]: Analyzing trace with hash -1268001746, now seen corresponding path program 1 times [2024-11-24 01:47:37,427 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 01:47:37,427 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1963433427] [2024-11-24 01:47:37,427 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 01:47:37,427 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 01:47:37,763 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 01:47:38,535 INFO L134 CoverageAnalysis]: Checked inductivity of 143 backedges. 83 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-24 01:47:38,535 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-24 01:47:38,535 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1963433427] [2024-11-24 01:47:38,535 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1963433427] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-24 01:47:38,535 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-24 01:47:38,535 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-24 01:47:38,535 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [807602398] [2024-11-24 01:47:38,536 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-24 01:47:38,536 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-24 01:47:38,537 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-24 01:47:38,539 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-24 01:47:38,539 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-24 01:47:38,539 INFO L87 Difference]: Start difference. First operand 519 states and 738 transitions. Second operand has 5 states, 5 states have (on average 59.0) internal successors, (295), 5 states have internal predecessors, (295), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-24 01:47:38,709 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 01:47:38,709 INFO L93 Difference]: Finished difference Result 845 states and 1204 transitions. [2024-11-24 01:47:38,710 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-24 01:47:38,710 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 59.0) internal successors, (295), 5 states have internal predecessors, (295), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 322 [2024-11-24 01:47:38,711 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 01:47:38,713 INFO L225 Difference]: With dead ends: 845 [2024-11-24 01:47:38,714 INFO L226 Difference]: Without dead ends: 519 [2024-11-24 01:47:38,715 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-11-24 01:47:38,715 INFO L435 NwaCegarLoop]: 528 mSDtfsCounter, 938 mSDsluCounter, 530 mSDsCounter, 0 mSdLazyCounter, 70 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 941 SdHoareTripleChecker+Valid, 1058 SdHoareTripleChecker+Invalid, 71 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 70 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-24 01:47:38,715 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [941 Valid, 1058 Invalid, 71 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 70 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-24 01:47:38,717 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 519 states. [2024-11-24 01:47:38,743 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 519 to 519. [2024-11-24 01:47:38,744 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 519 states, 511 states have (on average 1.4187866927592956) internal successors, (725), 511 states have internal predecessors, (725), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-11-24 01:47:38,747 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 519 states to 519 states and 737 transitions. [2024-11-24 01:47:38,748 INFO L78 Accepts]: Start accepts. Automaton has 519 states and 737 transitions. Word has length 322 [2024-11-24 01:47:38,748 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 01:47:38,748 INFO L471 AbstractCegarLoop]: Abstraction has 519 states and 737 transitions. [2024-11-24 01:47:38,749 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 59.0) internal successors, (295), 5 states have internal predecessors, (295), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-24 01:47:38,749 INFO L276 IsEmpty]: Start isEmpty. Operand 519 states and 737 transitions. [2024-11-24 01:47:38,755 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 324 [2024-11-24 01:47:38,756 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 01:47:38,756 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 01:47:38,756 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable18 [2024-11-24 01:47:38,756 INFO L396 AbstractCegarLoop]: === Iteration 20 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 01:47:38,757 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 01:47:38,757 INFO L85 PathProgramCache]: Analyzing trace with hash -359755872, now seen corresponding path program 1 times [2024-11-24 01:47:38,757 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 01:47:38,758 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [880079930] [2024-11-24 01:47:38,758 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 01:47:38,758 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 01:47:39,071 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 01:47:39,788 INFO L134 CoverageAnalysis]: Checked inductivity of 143 backedges. 83 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-24 01:47:39,789 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-24 01:47:39,789 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [880079930] [2024-11-24 01:47:39,789 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [880079930] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-24 01:47:39,789 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-24 01:47:39,789 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-24 01:47:39,790 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [52148614] [2024-11-24 01:47:39,790 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-24 01:47:39,790 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-24 01:47:39,790 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-24 01:47:39,791 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-24 01:47:39,791 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-24 01:47:39,792 INFO L87 Difference]: Start difference. First operand 519 states and 737 transitions. Second operand has 5 states, 5 states have (on average 59.2) internal successors, (296), 5 states have internal predecessors, (296), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-24 01:47:39,953 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 01:47:39,953 INFO L93 Difference]: Finished difference Result 845 states and 1202 transitions. [2024-11-24 01:47:39,954 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-24 01:47:39,954 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 59.2) internal successors, (296), 5 states have internal predecessors, (296), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 323 [2024-11-24 01:47:39,955 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 01:47:39,957 INFO L225 Difference]: With dead ends: 845 [2024-11-24 01:47:39,957 INFO L226 Difference]: Without dead ends: 519 [2024-11-24 01:47:39,959 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-11-24 01:47:39,962 INFO L435 NwaCegarLoop]: 528 mSDtfsCounter, 507 mSDsluCounter, 537 mSDsCounter, 0 mSdLazyCounter, 68 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 510 SdHoareTripleChecker+Valid, 1065 SdHoareTripleChecker+Invalid, 69 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 68 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-24 01:47:39,962 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [510 Valid, 1065 Invalid, 69 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 68 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-24 01:47:39,963 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 519 states. [2024-11-24 01:47:39,986 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 519 to 519. [2024-11-24 01:47:39,987 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 519 states, 511 states have (on average 1.4168297455968688) internal successors, (724), 511 states have internal predecessors, (724), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-11-24 01:47:39,990 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 519 states to 519 states and 736 transitions. [2024-11-24 01:47:39,991 INFO L78 Accepts]: Start accepts. Automaton has 519 states and 736 transitions. Word has length 323 [2024-11-24 01:47:39,992 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 01:47:39,992 INFO L471 AbstractCegarLoop]: Abstraction has 519 states and 736 transitions. [2024-11-24 01:47:39,992 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 59.2) internal successors, (296), 5 states have internal predecessors, (296), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-24 01:47:39,992 INFO L276 IsEmpty]: Start isEmpty. Operand 519 states and 736 transitions. [2024-11-24 01:47:39,998 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 325 [2024-11-24 01:47:39,998 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 01:47:39,999 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 01:47:39,999 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable19 [2024-11-24 01:47:39,999 INFO L396 AbstractCegarLoop]: === Iteration 21 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 01:47:40,000 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 01:47:40,001 INFO L85 PathProgramCache]: Analyzing trace with hash 367336281, now seen corresponding path program 1 times [2024-11-24 01:47:40,001 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 01:47:40,001 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [720024588] [2024-11-24 01:47:40,001 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 01:47:40,002 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 01:47:40,292 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 01:47:41,070 INFO L134 CoverageAnalysis]: Checked inductivity of 143 backedges. 83 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-24 01:47:41,070 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-24 01:47:41,070 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [720024588] [2024-11-24 01:47:41,070 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [720024588] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-24 01:47:41,071 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-24 01:47:41,071 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-24 01:47:41,071 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [248547633] [2024-11-24 01:47:41,071 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-24 01:47:41,072 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-24 01:47:41,072 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-24 01:47:41,073 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-24 01:47:41,073 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-24 01:47:41,074 INFO L87 Difference]: Start difference. First operand 519 states and 736 transitions. Second operand has 5 states, 5 states have (on average 59.4) internal successors, (297), 5 states have internal predecessors, (297), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-24 01:47:41,258 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 01:47:41,258 INFO L93 Difference]: Finished difference Result 845 states and 1200 transitions. [2024-11-24 01:47:41,259 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-24 01:47:41,259 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 59.4) internal successors, (297), 5 states have internal predecessors, (297), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 324 [2024-11-24 01:47:41,260 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 01:47:41,263 INFO L225 Difference]: With dead ends: 845 [2024-11-24 01:47:41,263 INFO L226 Difference]: Without dead ends: 519 [2024-11-24 01:47:41,264 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-11-24 01:47:41,265 INFO L435 NwaCegarLoop]: 528 mSDtfsCounter, 499 mSDsluCounter, 537 mSDsCounter, 0 mSdLazyCounter, 66 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 502 SdHoareTripleChecker+Valid, 1065 SdHoareTripleChecker+Invalid, 67 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 66 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-24 01:47:41,265 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [502 Valid, 1065 Invalid, 67 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 66 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-24 01:47:41,267 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 519 states. [2024-11-24 01:47:41,296 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 519 to 519. [2024-11-24 01:47:41,298 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 519 states, 511 states have (on average 1.4148727984344422) internal successors, (723), 511 states have internal predecessors, (723), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-11-24 01:47:41,301 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 519 states to 519 states and 735 transitions. [2024-11-24 01:47:41,302 INFO L78 Accepts]: Start accepts. Automaton has 519 states and 735 transitions. Word has length 324 [2024-11-24 01:47:41,303 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 01:47:41,304 INFO L471 AbstractCegarLoop]: Abstraction has 519 states and 735 transitions. [2024-11-24 01:47:41,304 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 59.4) internal successors, (297), 5 states have internal predecessors, (297), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-24 01:47:41,304 INFO L276 IsEmpty]: Start isEmpty. Operand 519 states and 735 transitions. [2024-11-24 01:47:41,311 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 326 [2024-11-24 01:47:41,312 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 01:47:41,312 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 01:47:41,312 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable20 [2024-11-24 01:47:41,313 INFO L396 AbstractCegarLoop]: === Iteration 22 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 01:47:41,313 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 01:47:41,314 INFO L85 PathProgramCache]: Analyzing trace with hash 56994795, now seen corresponding path program 1 times [2024-11-24 01:47:41,314 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 01:47:41,314 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1878963094] [2024-11-24 01:47:41,314 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 01:47:41,314 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 01:47:41,652 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 01:47:42,364 INFO L134 CoverageAnalysis]: Checked inductivity of 143 backedges. 83 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-24 01:47:42,365 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-24 01:47:42,365 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1878963094] [2024-11-24 01:47:42,365 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1878963094] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-24 01:47:42,365 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-24 01:47:42,365 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-24 01:47:42,365 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [74813469] [2024-11-24 01:47:42,365 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-24 01:47:42,366 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-24 01:47:42,366 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-24 01:47:42,367 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-24 01:47:42,367 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-24 01:47:42,368 INFO L87 Difference]: Start difference. First operand 519 states and 735 transitions. Second operand has 5 states, 5 states have (on average 59.6) internal successors, (298), 5 states have internal predecessors, (298), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-24 01:47:42,523 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 01:47:42,523 INFO L93 Difference]: Finished difference Result 845 states and 1198 transitions. [2024-11-24 01:47:42,524 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-24 01:47:42,524 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 59.6) internal successors, (298), 5 states have internal predecessors, (298), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 325 [2024-11-24 01:47:42,525 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 01:47:42,527 INFO L225 Difference]: With dead ends: 845 [2024-11-24 01:47:42,527 INFO L226 Difference]: Without dead ends: 519 [2024-11-24 01:47:42,528 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-11-24 01:47:42,530 INFO L435 NwaCegarLoop]: 528 mSDtfsCounter, 491 mSDsluCounter, 537 mSDsCounter, 0 mSdLazyCounter, 64 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 494 SdHoareTripleChecker+Valid, 1065 SdHoareTripleChecker+Invalid, 65 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 64 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-24 01:47:42,530 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [494 Valid, 1065 Invalid, 65 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 64 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-24 01:47:42,531 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 519 states. [2024-11-24 01:47:42,552 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 519 to 519. [2024-11-24 01:47:42,553 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 519 states, 511 states have (on average 1.4129158512720157) internal successors, (722), 511 states have internal predecessors, (722), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-11-24 01:47:42,556 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 519 states to 519 states and 734 transitions. [2024-11-24 01:47:42,557 INFO L78 Accepts]: Start accepts. Automaton has 519 states and 734 transitions. Word has length 325 [2024-11-24 01:47:42,557 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 01:47:42,557 INFO L471 AbstractCegarLoop]: Abstraction has 519 states and 734 transitions. [2024-11-24 01:47:42,558 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 59.6) internal successors, (298), 5 states have internal predecessors, (298), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-24 01:47:42,558 INFO L276 IsEmpty]: Start isEmpty. Operand 519 states and 734 transitions. [2024-11-24 01:47:42,563 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 327 [2024-11-24 01:47:42,564 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 01:47:42,564 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 01:47:42,564 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable21 [2024-11-24 01:47:42,565 INFO L396 AbstractCegarLoop]: === Iteration 23 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 01:47:42,565 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 01:47:42,566 INFO L85 PathProgramCache]: Analyzing trace with hash -1111568636, now seen corresponding path program 1 times [2024-11-24 01:47:42,566 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 01:47:42,566 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1818666857] [2024-11-24 01:47:42,566 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 01:47:42,566 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 01:47:42,861 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 01:47:43,658 INFO L134 CoverageAnalysis]: Checked inductivity of 143 backedges. 83 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-24 01:47:43,661 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-24 01:47:43,661 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1818666857] [2024-11-24 01:47:43,661 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1818666857] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-24 01:47:43,661 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-24 01:47:43,662 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-24 01:47:43,662 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1226623948] [2024-11-24 01:47:43,662 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-24 01:47:43,662 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-24 01:47:43,663 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-24 01:47:43,663 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-24 01:47:43,664 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-24 01:47:43,664 INFO L87 Difference]: Start difference. First operand 519 states and 734 transitions. Second operand has 5 states, 5 states have (on average 59.8) internal successors, (299), 5 states have internal predecessors, (299), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-24 01:47:43,783 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 01:47:43,783 INFO L93 Difference]: Finished difference Result 845 states and 1196 transitions. [2024-11-24 01:47:43,783 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-24 01:47:43,784 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 59.8) internal successors, (299), 5 states have internal predecessors, (299), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 326 [2024-11-24 01:47:43,784 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 01:47:43,787 INFO L225 Difference]: With dead ends: 845 [2024-11-24 01:47:43,787 INFO L226 Difference]: Without dead ends: 519 [2024-11-24 01:47:43,788 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-11-24 01:47:43,789 INFO L435 NwaCegarLoop]: 540 mSDtfsCounter, 476 mSDsluCounter, 549 mSDsCounter, 0 mSdLazyCounter, 38 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 479 SdHoareTripleChecker+Valid, 1089 SdHoareTripleChecker+Invalid, 39 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 38 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-24 01:47:43,789 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [479 Valid, 1089 Invalid, 39 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 38 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-24 01:47:43,791 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 519 states. [2024-11-24 01:47:43,813 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 519 to 519. [2024-11-24 01:47:43,814 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 519 states, 511 states have (on average 1.4109589041095891) internal successors, (721), 511 states have internal predecessors, (721), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-11-24 01:47:43,818 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 519 states to 519 states and 733 transitions. [2024-11-24 01:47:43,818 INFO L78 Accepts]: Start accepts. Automaton has 519 states and 733 transitions. Word has length 326 [2024-11-24 01:47:43,818 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 01:47:43,819 INFO L471 AbstractCegarLoop]: Abstraction has 519 states and 733 transitions. [2024-11-24 01:47:43,819 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 59.8) internal successors, (299), 5 states have internal predecessors, (299), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-24 01:47:43,819 INFO L276 IsEmpty]: Start isEmpty. Operand 519 states and 733 transitions. [2024-11-24 01:47:43,824 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 328 [2024-11-24 01:47:43,825 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 01:47:43,825 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 01:47:43,825 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable22 [2024-11-24 01:47:43,826 INFO L396 AbstractCegarLoop]: === Iteration 24 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 01:47:43,826 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 01:47:43,826 INFO L85 PathProgramCache]: Analyzing trace with hash -1755980618, now seen corresponding path program 1 times [2024-11-24 01:47:43,827 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 01:47:43,827 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [611504704] [2024-11-24 01:47:43,827 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 01:47:43,828 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 01:47:44,123 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 01:47:44,886 INFO L134 CoverageAnalysis]: Checked inductivity of 143 backedges. 83 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-24 01:47:44,887 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-24 01:47:44,887 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [611504704] [2024-11-24 01:47:44,887 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [611504704] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-24 01:47:44,887 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-24 01:47:44,887 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-24 01:47:44,887 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1562402688] [2024-11-24 01:47:44,887 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-24 01:47:44,888 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-24 01:47:44,888 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-24 01:47:44,889 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-24 01:47:44,890 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-24 01:47:44,890 INFO L87 Difference]: Start difference. First operand 519 states and 733 transitions. Second operand has 5 states, 5 states have (on average 60.0) internal successors, (300), 5 states have internal predecessors, (300), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-24 01:47:44,995 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 01:47:44,995 INFO L93 Difference]: Finished difference Result 845 states and 1194 transitions. [2024-11-24 01:47:44,996 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-24 01:47:44,996 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 60.0) internal successors, (300), 5 states have internal predecessors, (300), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 327 [2024-11-24 01:47:44,997 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 01:47:44,999 INFO L225 Difference]: With dead ends: 845 [2024-11-24 01:47:44,999 INFO L226 Difference]: Without dead ends: 519 [2024-11-24 01:47:45,000 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-11-24 01:47:45,000 INFO L435 NwaCegarLoop]: 540 mSDtfsCounter, 851 mSDsluCounter, 542 mSDsCounter, 0 mSdLazyCounter, 36 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 854 SdHoareTripleChecker+Valid, 1082 SdHoareTripleChecker+Invalid, 37 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 36 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-24 01:47:45,001 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [854 Valid, 1082 Invalid, 37 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 36 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-24 01:47:45,002 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 519 states. [2024-11-24 01:47:45,019 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 519 to 519. [2024-11-24 01:47:45,021 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 519 states, 511 states have (on average 1.4090019569471623) internal successors, (720), 511 states have internal predecessors, (720), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-11-24 01:47:45,024 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 519 states to 519 states and 732 transitions. [2024-11-24 01:47:45,024 INFO L78 Accepts]: Start accepts. Automaton has 519 states and 732 transitions. Word has length 327 [2024-11-24 01:47:45,025 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 01:47:45,025 INFO L471 AbstractCegarLoop]: Abstraction has 519 states and 732 transitions. [2024-11-24 01:47:45,025 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 60.0) internal successors, (300), 5 states have internal predecessors, (300), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-24 01:47:45,025 INFO L276 IsEmpty]: Start isEmpty. Operand 519 states and 732 transitions. [2024-11-24 01:47:45,030 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 329 [2024-11-24 01:47:45,030 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 01:47:45,031 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 01:47:45,031 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable23 [2024-11-24 01:47:45,031 INFO L396 AbstractCegarLoop]: === Iteration 25 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 01:47:45,032 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 01:47:45,032 INFO L85 PathProgramCache]: Analyzing trace with hash -82399441, now seen corresponding path program 1 times [2024-11-24 01:47:45,032 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 01:47:45,032 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2056208484] [2024-11-24 01:47:45,032 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 01:47:45,032 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 01:47:45,314 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 01:47:46,177 INFO L134 CoverageAnalysis]: Checked inductivity of 143 backedges. 83 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-24 01:47:46,177 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-24 01:47:46,177 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2056208484] [2024-11-24 01:47:46,177 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2056208484] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-24 01:47:46,178 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-24 01:47:46,178 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-24 01:47:46,178 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1211615860] [2024-11-24 01:47:46,178 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-24 01:47:46,179 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-24 01:47:46,179 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-24 01:47:46,180 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-24 01:47:46,181 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-24 01:47:46,181 INFO L87 Difference]: Start difference. First operand 519 states and 732 transitions. Second operand has 5 states, 5 states have (on average 60.2) internal successors, (301), 5 states have internal predecessors, (301), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-24 01:47:46,683 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 01:47:46,684 INFO L93 Difference]: Finished difference Result 845 states and 1192 transitions. [2024-11-24 01:47:46,684 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-24 01:47:46,685 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 60.2) internal successors, (301), 5 states have internal predecessors, (301), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 328 [2024-11-24 01:47:46,686 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 01:47:46,688 INFO L225 Difference]: With dead ends: 845 [2024-11-24 01:47:46,689 INFO L226 Difference]: Without dead ends: 519 [2024-11-24 01:47:46,690 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-11-24 01:47:46,690 INFO L435 NwaCegarLoop]: 401 mSDtfsCounter, 828 mSDsluCounter, 403 mSDsCounter, 0 mSdLazyCounter, 312 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 831 SdHoareTripleChecker+Valid, 804 SdHoareTripleChecker+Invalid, 313 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 312 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2024-11-24 01:47:46,691 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [831 Valid, 804 Invalid, 313 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 312 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2024-11-24 01:47:46,693 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 519 states. [2024-11-24 01:47:46,722 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 519 to 519. [2024-11-24 01:47:46,727 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 519 states, 511 states have (on average 1.4070450097847358) internal successors, (719), 511 states have internal predecessors, (719), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-11-24 01:47:46,733 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 519 states to 519 states and 731 transitions. [2024-11-24 01:47:46,733 INFO L78 Accepts]: Start accepts. Automaton has 519 states and 731 transitions. Word has length 328 [2024-11-24 01:47:46,734 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 01:47:46,734 INFO L471 AbstractCegarLoop]: Abstraction has 519 states and 731 transitions. [2024-11-24 01:47:46,735 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 60.2) internal successors, (301), 5 states have internal predecessors, (301), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-24 01:47:46,735 INFO L276 IsEmpty]: Start isEmpty. Operand 519 states and 731 transitions. [2024-11-24 01:47:46,742 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 330 [2024-11-24 01:47:46,742 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 01:47:46,743 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 01:47:46,743 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable24 [2024-11-24 01:47:46,743 INFO L396 AbstractCegarLoop]: === Iteration 26 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 01:47:46,743 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 01:47:46,744 INFO L85 PathProgramCache]: Analyzing trace with hash -1868897791, now seen corresponding path program 1 times [2024-11-24 01:47:46,744 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 01:47:46,744 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1474956532] [2024-11-24 01:47:46,744 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 01:47:46,744 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 01:47:47,539 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 01:47:48,508 INFO L134 CoverageAnalysis]: Checked inductivity of 143 backedges. 83 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-24 01:47:48,508 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-24 01:47:48,508 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1474956532] [2024-11-24 01:47:48,509 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1474956532] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-24 01:47:48,509 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-24 01:47:48,509 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-24 01:47:48,509 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1103838611] [2024-11-24 01:47:48,509 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-24 01:47:48,510 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-24 01:47:48,510 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-24 01:47:48,511 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-24 01:47:48,511 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-24 01:47:48,512 INFO L87 Difference]: Start difference. First operand 519 states and 731 transitions. Second operand has 4 states, 4 states have (on average 75.5) internal successors, (302), 4 states have internal predecessors, (302), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-24 01:47:48,620 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 01:47:48,621 INFO L93 Difference]: Finished difference Result 845 states and 1190 transitions. [2024-11-24 01:47:48,621 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-24 01:47:48,622 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 75.5) internal successors, (302), 4 states have internal predecessors, (302), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 329 [2024-11-24 01:47:48,622 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 01:47:48,626 INFO L225 Difference]: With dead ends: 845 [2024-11-24 01:47:48,627 INFO L226 Difference]: Without dead ends: 519 [2024-11-24 01:47:48,628 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-11-24 01:47:48,628 INFO L435 NwaCegarLoop]: 539 mSDtfsCounter, 382 mSDsluCounter, 541 mSDsCounter, 0 mSdLazyCounter, 34 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 382 SdHoareTripleChecker+Valid, 1080 SdHoareTripleChecker+Invalid, 34 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 34 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-24 01:47:48,629 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [382 Valid, 1080 Invalid, 34 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 34 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-24 01:47:48,631 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 519 states. [2024-11-24 01:47:48,654 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 519 to 519. [2024-11-24 01:47:48,655 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 519 states, 511 states have (on average 1.4050880626223092) internal successors, (718), 511 states have internal predecessors, (718), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-11-24 01:47:48,658 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 519 states to 519 states and 730 transitions. [2024-11-24 01:47:48,662 INFO L78 Accepts]: Start accepts. Automaton has 519 states and 730 transitions. Word has length 329 [2024-11-24 01:47:48,662 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 01:47:48,663 INFO L471 AbstractCegarLoop]: Abstraction has 519 states and 730 transitions. [2024-11-24 01:47:48,663 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 75.5) internal successors, (302), 4 states have internal predecessors, (302), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-24 01:47:48,663 INFO L276 IsEmpty]: Start isEmpty. Operand 519 states and 730 transitions. [2024-11-24 01:47:48,668 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 331 [2024-11-24 01:47:48,668 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 01:47:48,669 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 01:47:48,669 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable25 [2024-11-24 01:47:48,669 INFO L396 AbstractCegarLoop]: === Iteration 27 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 01:47:48,670 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 01:47:48,670 INFO L85 PathProgramCache]: Analyzing trace with hash -1273434243, now seen corresponding path program 1 times [2024-11-24 01:47:48,670 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 01:47:48,670 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [433729332] [2024-11-24 01:47:48,670 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 01:47:48,670 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 01:47:49,338 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 01:47:50,168 INFO L134 CoverageAnalysis]: Checked inductivity of 143 backedges. 83 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-24 01:47:50,169 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-24 01:47:50,169 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [433729332] [2024-11-24 01:47:50,169 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [433729332] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-24 01:47:50,170 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-24 01:47:50,170 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-24 01:47:50,170 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [591732633] [2024-11-24 01:47:50,170 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-24 01:47:50,171 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-24 01:47:50,171 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-24 01:47:50,172 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-24 01:47:50,172 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-24 01:47:50,172 INFO L87 Difference]: Start difference. First operand 519 states and 730 transitions. Second operand has 5 states, 5 states have (on average 60.6) internal successors, (303), 5 states have internal predecessors, (303), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-24 01:47:50,360 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 01:47:50,361 INFO L93 Difference]: Finished difference Result 845 states and 1188 transitions. [2024-11-24 01:47:50,361 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-24 01:47:50,362 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 60.6) internal successors, (303), 5 states have internal predecessors, (303), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 330 [2024-11-24 01:47:50,362 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 01:47:50,365 INFO L225 Difference]: With dead ends: 845 [2024-11-24 01:47:50,365 INFO L226 Difference]: Without dead ends: 519 [2024-11-24 01:47:50,366 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-11-24 01:47:50,366 INFO L435 NwaCegarLoop]: 524 mSDtfsCounter, 454 mSDsluCounter, 533 mSDsCounter, 0 mSdLazyCounter, 62 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 454 SdHoareTripleChecker+Valid, 1057 SdHoareTripleChecker+Invalid, 62 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 62 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-24 01:47:50,368 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [454 Valid, 1057 Invalid, 62 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 62 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-24 01:47:50,369 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 519 states. [2024-11-24 01:47:50,390 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 519 to 519. [2024-11-24 01:47:50,392 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 519 states, 511 states have (on average 1.4031311154598827) internal successors, (717), 511 states have internal predecessors, (717), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-11-24 01:47:50,395 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 519 states to 519 states and 729 transitions. [2024-11-24 01:47:50,396 INFO L78 Accepts]: Start accepts. Automaton has 519 states and 729 transitions. Word has length 330 [2024-11-24 01:47:50,396 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 01:47:50,396 INFO L471 AbstractCegarLoop]: Abstraction has 519 states and 729 transitions. [2024-11-24 01:47:50,397 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 60.6) internal successors, (303), 5 states have internal predecessors, (303), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-24 01:47:50,397 INFO L276 IsEmpty]: Start isEmpty. Operand 519 states and 729 transitions. [2024-11-24 01:47:50,403 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 332 [2024-11-24 01:47:50,403 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 01:47:50,404 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 01:47:50,404 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable26 [2024-11-24 01:47:50,404 INFO L396 AbstractCegarLoop]: === Iteration 28 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 01:47:50,405 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 01:47:50,405 INFO L85 PathProgramCache]: Analyzing trace with hash -951941311, now seen corresponding path program 1 times [2024-11-24 01:47:50,405 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 01:47:50,405 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [367921591] [2024-11-24 01:47:50,405 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 01:47:50,406 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 01:47:51,109 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 01:47:51,855 INFO L134 CoverageAnalysis]: Checked inductivity of 143 backedges. 83 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-24 01:47:51,855 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-24 01:47:51,855 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [367921591] [2024-11-24 01:47:51,855 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [367921591] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-24 01:47:51,856 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-24 01:47:51,856 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-24 01:47:51,856 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [175849543] [2024-11-24 01:47:51,856 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-24 01:47:51,857 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-24 01:47:51,857 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-24 01:47:51,858 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-24 01:47:51,858 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-24 01:47:51,859 INFO L87 Difference]: Start difference. First operand 519 states and 729 transitions. Second operand has 5 states, 5 states have (on average 60.8) internal successors, (304), 5 states have internal predecessors, (304), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-24 01:47:52,028 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 01:47:52,028 INFO L93 Difference]: Finished difference Result 845 states and 1186 transitions. [2024-11-24 01:47:52,029 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-24 01:47:52,029 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 60.8) internal successors, (304), 5 states have internal predecessors, (304), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 331 [2024-11-24 01:47:52,030 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 01:47:52,032 INFO L225 Difference]: With dead ends: 845 [2024-11-24 01:47:52,032 INFO L226 Difference]: Without dead ends: 519 [2024-11-24 01:47:52,033 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-11-24 01:47:52,034 INFO L435 NwaCegarLoop]: 524 mSDtfsCounter, 453 mSDsluCounter, 533 mSDsCounter, 0 mSdLazyCounter, 60 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 453 SdHoareTripleChecker+Valid, 1057 SdHoareTripleChecker+Invalid, 60 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 60 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-24 01:47:52,035 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [453 Valid, 1057 Invalid, 60 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 60 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-24 01:47:52,036 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 519 states. [2024-11-24 01:47:52,057 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 519 to 519. [2024-11-24 01:47:52,058 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 519 states, 511 states have (on average 1.401174168297456) internal successors, (716), 511 states have internal predecessors, (716), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-11-24 01:47:52,061 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 519 states to 519 states and 728 transitions. [2024-11-24 01:47:52,061 INFO L78 Accepts]: Start accepts. Automaton has 519 states and 728 transitions. Word has length 331 [2024-11-24 01:47:52,062 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 01:47:52,062 INFO L471 AbstractCegarLoop]: Abstraction has 519 states and 728 transitions. [2024-11-24 01:47:52,065 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 60.8) internal successors, (304), 5 states have internal predecessors, (304), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-24 01:47:52,066 INFO L276 IsEmpty]: Start isEmpty. Operand 519 states and 728 transitions. [2024-11-24 01:47:52,076 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 333 [2024-11-24 01:47:52,076 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 01:47:52,076 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 01:47:52,079 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable27 [2024-11-24 01:47:52,079 INFO L396 AbstractCegarLoop]: === Iteration 29 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 01:47:52,079 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 01:47:52,080 INFO L85 PathProgramCache]: Analyzing trace with hash 139590734, now seen corresponding path program 1 times [2024-11-24 01:47:52,080 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 01:47:52,080 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1560378000] [2024-11-24 01:47:52,080 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 01:47:52,080 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 01:47:52,812 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 01:47:53,710 INFO L134 CoverageAnalysis]: Checked inductivity of 143 backedges. 83 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-24 01:47:53,711 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-24 01:47:53,711 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1560378000] [2024-11-24 01:47:53,711 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1560378000] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-24 01:47:53,712 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-24 01:47:53,712 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-24 01:47:53,712 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [836544761] [2024-11-24 01:47:53,712 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-24 01:47:53,713 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-24 01:47:53,713 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-24 01:47:53,714 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-24 01:47:53,715 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-24 01:47:53,715 INFO L87 Difference]: Start difference. First operand 519 states and 728 transitions. Second operand has 5 states, 5 states have (on average 61.0) internal successors, (305), 5 states have internal predecessors, (305), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-24 01:47:53,874 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 01:47:53,874 INFO L93 Difference]: Finished difference Result 845 states and 1184 transitions. [2024-11-24 01:47:53,875 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-24 01:47:53,875 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 61.0) internal successors, (305), 5 states have internal predecessors, (305), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 332 [2024-11-24 01:47:53,875 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 01:47:53,878 INFO L225 Difference]: With dead ends: 845 [2024-11-24 01:47:53,878 INFO L226 Difference]: Without dead ends: 519 [2024-11-24 01:47:53,879 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-11-24 01:47:53,880 INFO L435 NwaCegarLoop]: 524 mSDtfsCounter, 842 mSDsluCounter, 526 mSDsCounter, 0 mSdLazyCounter, 58 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 842 SdHoareTripleChecker+Valid, 1050 SdHoareTripleChecker+Invalid, 58 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 58 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-24 01:47:53,881 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [842 Valid, 1050 Invalid, 58 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 58 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-24 01:47:53,882 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 519 states. [2024-11-24 01:47:53,900 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 519 to 519. [2024-11-24 01:47:53,901 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 519 states, 511 states have (on average 1.3992172211350293) internal successors, (715), 511 states have internal predecessors, (715), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-11-24 01:47:53,904 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 519 states to 519 states and 727 transitions. [2024-11-24 01:47:53,904 INFO L78 Accepts]: Start accepts. Automaton has 519 states and 727 transitions. Word has length 332 [2024-11-24 01:47:53,905 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 01:47:53,905 INFO L471 AbstractCegarLoop]: Abstraction has 519 states and 727 transitions. [2024-11-24 01:47:53,905 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 61.0) internal successors, (305), 5 states have internal predecessors, (305), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-24 01:47:53,905 INFO L276 IsEmpty]: Start isEmpty. Operand 519 states and 727 transitions. [2024-11-24 01:47:53,909 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 334 [2024-11-24 01:47:53,909 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 01:47:53,909 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 01:47:53,909 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable28 [2024-11-24 01:47:53,910 INFO L396 AbstractCegarLoop]: === Iteration 30 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 01:47:53,910 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 01:47:53,910 INFO L85 PathProgramCache]: Analyzing trace with hash -745808464, now seen corresponding path program 1 times [2024-11-24 01:47:53,911 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 01:47:53,911 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [511442650] [2024-11-24 01:47:53,911 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 01:47:53,911 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 01:47:54,962 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 01:47:56,303 INFO L134 CoverageAnalysis]: Checked inductivity of 143 backedges. 77 proven. 0 refuted. 0 times theorem prover too weak. 66 trivial. 0 not checked. [2024-11-24 01:47:56,303 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-24 01:47:56,303 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [511442650] [2024-11-24 01:47:56,303 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [511442650] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-24 01:47:56,304 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-24 01:47:56,304 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-24 01:47:56,304 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1833346617] [2024-11-24 01:47:56,304 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-24 01:47:56,304 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-24 01:47:56,305 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-24 01:47:56,307 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-24 01:47:56,307 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-11-24 01:47:56,308 INFO L87 Difference]: Start difference. First operand 519 states and 727 transitions. Second operand has 5 states, 5 states have (on average 60.6) internal successors, (303), 5 states have internal predecessors, (303), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-24 01:47:56,391 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 01:47:56,392 INFO L93 Difference]: Finished difference Result 941 states and 1298 transitions. [2024-11-24 01:47:56,392 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-11-24 01:47:56,393 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 60.6) internal successors, (303), 5 states have internal predecessors, (303), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 333 [2024-11-24 01:47:56,393 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 01:47:56,397 INFO L225 Difference]: With dead ends: 941 [2024-11-24 01:47:56,397 INFO L226 Difference]: Without dead ends: 613 [2024-11-24 01:47:56,398 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-11-24 01:47:56,398 INFO L435 NwaCegarLoop]: 546 mSDtfsCounter, 17 mSDsluCounter, 1629 mSDsCounter, 0 mSdLazyCounter, 32 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 17 SdHoareTripleChecker+Valid, 2175 SdHoareTripleChecker+Invalid, 32 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 32 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-24 01:47:56,399 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [17 Valid, 2175 Invalid, 32 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 32 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-24 01:47:56,400 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 613 states. [2024-11-24 01:47:56,421 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 613 to 609. [2024-11-24 01:47:56,423 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 609 states, 601 states have (on average 1.3660565723793676) internal successors, (821), 601 states have internal predecessors, (821), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-11-24 01:47:56,426 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 609 states to 609 states and 833 transitions. [2024-11-24 01:47:56,426 INFO L78 Accepts]: Start accepts. Automaton has 609 states and 833 transitions. Word has length 333 [2024-11-24 01:47:56,427 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 01:47:56,429 INFO L471 AbstractCegarLoop]: Abstraction has 609 states and 833 transitions. [2024-11-24 01:47:56,429 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 60.6) internal successors, (303), 5 states have internal predecessors, (303), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-24 01:47:56,429 INFO L276 IsEmpty]: Start isEmpty. Operand 609 states and 833 transitions. [2024-11-24 01:47:56,432 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 336 [2024-11-24 01:47:56,432 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 01:47:56,434 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 01:47:56,434 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable29 [2024-11-24 01:47:56,434 INFO L396 AbstractCegarLoop]: === Iteration 31 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 01:47:56,435 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 01:47:56,435 INFO L85 PathProgramCache]: Analyzing trace with hash 1591163324, now seen corresponding path program 1 times [2024-11-24 01:47:56,435 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 01:47:56,435 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2048665621] [2024-11-24 01:47:56,435 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 01:47:56,435 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 01:47:57,560 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 01:47:58,200 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 84 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-24 01:47:58,200 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-24 01:47:58,200 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2048665621] [2024-11-24 01:47:58,200 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2048665621] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-24 01:47:58,200 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-24 01:47:58,201 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-11-24 01:47:58,201 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1387624719] [2024-11-24 01:47:58,201 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-24 01:47:58,202 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-11-24 01:47:58,202 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-24 01:47:58,203 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-11-24 01:47:58,203 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2024-11-24 01:47:58,203 INFO L87 Difference]: Start difference. First operand 609 states and 833 transitions. Second operand has 6 states, 6 states have (on average 51.333333333333336) internal successors, (308), 6 states have internal predecessors, (308), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-24 01:47:59,027 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 01:47:59,028 INFO L93 Difference]: Finished difference Result 1423 states and 1954 transitions. [2024-11-24 01:47:59,028 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-24 01:47:59,028 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 51.333333333333336) internal successors, (308), 6 states have internal predecessors, (308), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 335 [2024-11-24 01:47:59,029 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 01:47:59,034 INFO L225 Difference]: With dead ends: 1423 [2024-11-24 01:47:59,034 INFO L226 Difference]: Without dead ends: 1052 [2024-11-24 01:47:59,035 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2024-11-24 01:47:59,036 INFO L435 NwaCegarLoop]: 544 mSDtfsCounter, 348 mSDsluCounter, 1977 mSDsCounter, 0 mSdLazyCounter, 607 mSolverCounterSat, 8 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 351 SdHoareTripleChecker+Valid, 2521 SdHoareTripleChecker+Invalid, 615 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 8 IncrementalHoareTripleChecker+Valid, 607 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.7s IncrementalHoareTripleChecker+Time [2024-11-24 01:47:59,036 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [351 Valid, 2521 Invalid, 615 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [8 Valid, 607 Invalid, 0 Unknown, 0 Unchecked, 0.7s Time] [2024-11-24 01:47:59,039 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1052 states. [2024-11-24 01:47:59,074 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1052 to 936. [2024-11-24 01:47:59,076 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 936 states, 925 states have (on average 1.3621621621621622) internal successors, (1260), 925 states have internal predecessors, (1260), 9 states have call successors, (9), 1 states have call predecessors, (9), 1 states have return successors, (9), 9 states have call predecessors, (9), 9 states have call successors, (9) [2024-11-24 01:47:59,080 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 936 states to 936 states and 1278 transitions. [2024-11-24 01:47:59,081 INFO L78 Accepts]: Start accepts. Automaton has 936 states and 1278 transitions. Word has length 335 [2024-11-24 01:47:59,082 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 01:47:59,082 INFO L471 AbstractCegarLoop]: Abstraction has 936 states and 1278 transitions. [2024-11-24 01:47:59,082 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 51.333333333333336) internal successors, (308), 6 states have internal predecessors, (308), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-24 01:47:59,082 INFO L276 IsEmpty]: Start isEmpty. Operand 936 states and 1278 transitions. [2024-11-24 01:47:59,086 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 337 [2024-11-24 01:47:59,086 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 01:47:59,086 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 01:47:59,087 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable30 [2024-11-24 01:47:59,087 INFO L396 AbstractCegarLoop]: === Iteration 32 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 01:47:59,087 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 01:47:59,087 INFO L85 PathProgramCache]: Analyzing trace with hash 1614923872, now seen corresponding path program 1 times [2024-11-24 01:47:59,088 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 01:47:59,088 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [122205609] [2024-11-24 01:47:59,088 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 01:47:59,088 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 01:48:00,103 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 01:48:01,312 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 84 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-24 01:48:01,312 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-24 01:48:01,312 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [122205609] [2024-11-24 01:48:01,313 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [122205609] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-24 01:48:01,313 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-24 01:48:01,313 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-11-24 01:48:01,313 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [955866800] [2024-11-24 01:48:01,313 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-24 01:48:01,314 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-11-24 01:48:01,314 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-24 01:48:01,316 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-11-24 01:48:01,316 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2024-11-24 01:48:01,317 INFO L87 Difference]: Start difference. First operand 936 states and 1278 transitions. Second operand has 6 states, 6 states have (on average 51.5) internal successors, (309), 6 states have internal predecessors, (309), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-24 01:48:02,222 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 01:48:02,222 INFO L93 Difference]: Finished difference Result 1330 states and 1820 transitions. [2024-11-24 01:48:02,223 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-24 01:48:02,223 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 51.5) internal successors, (309), 6 states have internal predecessors, (309), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 336 [2024-11-24 01:48:02,224 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 01:48:02,228 INFO L225 Difference]: With dead ends: 1330 [2024-11-24 01:48:02,228 INFO L226 Difference]: Without dead ends: 959 [2024-11-24 01:48:02,230 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2024-11-24 01:48:02,230 INFO L435 NwaCegarLoop]: 398 mSDtfsCounter, 766 mSDsluCounter, 1185 mSDsCounter, 0 mSdLazyCounter, 631 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.7s Time, 0 mProtectedPredicate, 0 mProtectedAction, 769 SdHoareTripleChecker+Valid, 1583 SdHoareTripleChecker+Invalid, 631 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 631 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.8s IncrementalHoareTripleChecker+Time [2024-11-24 01:48:02,231 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [769 Valid, 1583 Invalid, 631 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 631 Invalid, 0 Unknown, 0 Unchecked, 0.8s Time] [2024-11-24 01:48:02,235 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 959 states. [2024-11-24 01:48:02,269 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 959 to 937. [2024-11-24 01:48:02,270 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 937 states, 926 states have (on average 1.3617710583153348) internal successors, (1261), 926 states have internal predecessors, (1261), 9 states have call successors, (9), 1 states have call predecessors, (9), 1 states have return successors, (9), 9 states have call predecessors, (9), 9 states have call successors, (9) [2024-11-24 01:48:02,274 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 937 states to 937 states and 1279 transitions. [2024-11-24 01:48:02,275 INFO L78 Accepts]: Start accepts. Automaton has 937 states and 1279 transitions. Word has length 336 [2024-11-24 01:48:02,276 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 01:48:02,276 INFO L471 AbstractCegarLoop]: Abstraction has 937 states and 1279 transitions. [2024-11-24 01:48:02,277 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 51.5) internal successors, (309), 6 states have internal predecessors, (309), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-24 01:48:02,277 INFO L276 IsEmpty]: Start isEmpty. Operand 937 states and 1279 transitions. [2024-11-24 01:48:02,280 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 337 [2024-11-24 01:48:02,281 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 01:48:02,281 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 01:48:02,281 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable31 [2024-11-24 01:48:02,281 INFO L396 AbstractCegarLoop]: === Iteration 33 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 01:48:02,282 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 01:48:02,282 INFO L85 PathProgramCache]: Analyzing trace with hash -390800339, now seen corresponding path program 1 times [2024-11-24 01:48:02,282 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 01:48:02,282 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1171406399] [2024-11-24 01:48:02,282 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 01:48:02,283 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 01:48:03,243 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 01:48:04,383 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 30 proven. 0 refuted. 0 times theorem prover too weak. 114 trivial. 0 not checked. [2024-11-24 01:48:04,383 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-24 01:48:04,384 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1171406399] [2024-11-24 01:48:04,384 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1171406399] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-24 01:48:04,384 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-24 01:48:04,384 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2024-11-24 01:48:04,385 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1816997069] [2024-11-24 01:48:04,385 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-24 01:48:04,385 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2024-11-24 01:48:04,386 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-24 01:48:04,386 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2024-11-24 01:48:04,387 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2024-11-24 01:48:04,387 INFO L87 Difference]: Start difference. First operand 937 states and 1279 transitions. Second operand has 8 states, 8 states have (on average 32.25) internal successors, (258), 8 states have internal predecessors, (258), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-24 01:48:04,700 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 01:48:04,700 INFO L93 Difference]: Finished difference Result 2114 states and 2877 transitions. [2024-11-24 01:48:04,701 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2024-11-24 01:48:04,701 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 32.25) internal successors, (258), 8 states have internal predecessors, (258), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 336 [2024-11-24 01:48:04,701 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 01:48:04,707 INFO L225 Difference]: With dead ends: 2114 [2024-11-24 01:48:04,708 INFO L226 Difference]: Without dead ends: 1625 [2024-11-24 01:48:04,709 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=20, Invalid=52, Unknown=0, NotChecked=0, Total=72 [2024-11-24 01:48:04,710 INFO L435 NwaCegarLoop]: 1288 mSDtfsCounter, 782 mSDsluCounter, 6603 mSDsCounter, 0 mSdLazyCounter, 180 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 785 SdHoareTripleChecker+Valid, 7891 SdHoareTripleChecker+Invalid, 180 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 180 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-11-24 01:48:04,710 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [785 Valid, 7891 Invalid, 180 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 180 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-11-24 01:48:04,712 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1625 states. [2024-11-24 01:48:04,754 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1625 to 1004. [2024-11-24 01:48:04,756 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1004 states, 990 states have (on average 1.3656565656565656) internal successors, (1352), 990 states have internal predecessors, (1352), 12 states have call successors, (12), 1 states have call predecessors, (12), 1 states have return successors, (12), 12 states have call predecessors, (12), 12 states have call successors, (12) [2024-11-24 01:48:04,759 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1004 states to 1004 states and 1376 transitions. [2024-11-24 01:48:04,759 INFO L78 Accepts]: Start accepts. Automaton has 1004 states and 1376 transitions. Word has length 336 [2024-11-24 01:48:04,760 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 01:48:04,760 INFO L471 AbstractCegarLoop]: Abstraction has 1004 states and 1376 transitions. [2024-11-24 01:48:04,760 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 32.25) internal successors, (258), 8 states have internal predecessors, (258), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-24 01:48:04,760 INFO L276 IsEmpty]: Start isEmpty. Operand 1004 states and 1376 transitions. [2024-11-24 01:48:04,763 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 338 [2024-11-24 01:48:04,764 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 01:48:04,764 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 01:48:04,764 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable32 [2024-11-24 01:48:04,765 INFO L396 AbstractCegarLoop]: === Iteration 34 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 01:48:04,766 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 01:48:04,766 INFO L85 PathProgramCache]: Analyzing trace with hash -855877697, now seen corresponding path program 1 times [2024-11-24 01:48:04,766 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 01:48:04,766 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1648727943] [2024-11-24 01:48:04,766 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 01:48:04,767 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 01:48:05,835 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 01:48:06,524 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 46 proven. 0 refuted. 0 times theorem prover too weak. 98 trivial. 0 not checked. [2024-11-24 01:48:06,524 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-24 01:48:06,524 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1648727943] [2024-11-24 01:48:06,524 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1648727943] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-24 01:48:06,524 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-24 01:48:06,525 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2024-11-24 01:48:06,525 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1762401063] [2024-11-24 01:48:06,525 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-24 01:48:06,525 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2024-11-24 01:48:06,525 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-24 01:48:06,526 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-11-24 01:48:06,526 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2024-11-24 01:48:06,526 INFO L87 Difference]: Start difference. First operand 1004 states and 1376 transitions. Second operand has 7 states, 7 states have (on average 39.285714285714285) internal successors, (275), 7 states have internal predecessors, (275), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-24 01:48:07,021 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 01:48:07,021 INFO L93 Difference]: Finished difference Result 2132 states and 2919 transitions. [2024-11-24 01:48:07,021 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2024-11-24 01:48:07,022 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 39.285714285714285) internal successors, (275), 7 states have internal predecessors, (275), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 337 [2024-11-24 01:48:07,022 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 01:48:07,026 INFO L225 Difference]: With dead ends: 2132 [2024-11-24 01:48:07,026 INFO L226 Difference]: Without dead ends: 1020 [2024-11-24 01:48:07,028 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=27, Invalid=83, Unknown=0, NotChecked=0, Total=110 [2024-11-24 01:48:07,029 INFO L435 NwaCegarLoop]: 529 mSDtfsCounter, 630 mSDsluCounter, 1979 mSDsCounter, 0 mSdLazyCounter, 250 mSolverCounterSat, 8 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 633 SdHoareTripleChecker+Valid, 2508 SdHoareTripleChecker+Invalid, 258 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 8 IncrementalHoareTripleChecker+Valid, 250 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2024-11-24 01:48:07,029 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [633 Valid, 2508 Invalid, 258 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [8 Valid, 250 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2024-11-24 01:48:07,031 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1020 states. [2024-11-24 01:48:07,065 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1020 to 1012. [2024-11-24 01:48:07,071 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1012 states, 998 states have (on average 1.3587174348697395) internal successors, (1356), 998 states have internal predecessors, (1356), 12 states have call successors, (12), 1 states have call predecessors, (12), 1 states have return successors, (12), 12 states have call predecessors, (12), 12 states have call successors, (12) [2024-11-24 01:48:07,073 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1012 states to 1012 states and 1380 transitions. [2024-11-24 01:48:07,073 INFO L78 Accepts]: Start accepts. Automaton has 1012 states and 1380 transitions. Word has length 337 [2024-11-24 01:48:07,074 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 01:48:07,074 INFO L471 AbstractCegarLoop]: Abstraction has 1012 states and 1380 transitions. [2024-11-24 01:48:07,074 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 39.285714285714285) internal successors, (275), 7 states have internal predecessors, (275), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-24 01:48:07,074 INFO L276 IsEmpty]: Start isEmpty. Operand 1012 states and 1380 transitions. [2024-11-24 01:48:07,081 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 340 [2024-11-24 01:48:07,084 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 01:48:07,084 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 01:48:07,084 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable33 [2024-11-24 01:48:07,085 INFO L396 AbstractCegarLoop]: === Iteration 35 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 01:48:07,085 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 01:48:07,085 INFO L85 PathProgramCache]: Analyzing trace with hash 2025188781, now seen corresponding path program 1 times [2024-11-24 01:48:07,086 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 01:48:07,086 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1107392826] [2024-11-24 01:48:07,086 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 01:48:07,086 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 01:48:08,235 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 01:48:09,076 INFO L134 CoverageAnalysis]: Checked inductivity of 145 backedges. 52 proven. 0 refuted. 0 times theorem prover too weak. 93 trivial. 0 not checked. [2024-11-24 01:48:09,076 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-24 01:48:09,076 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1107392826] [2024-11-24 01:48:09,076 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1107392826] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-24 01:48:09,077 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-24 01:48:09,077 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2024-11-24 01:48:09,077 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1118997087] [2024-11-24 01:48:09,077 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-24 01:48:09,078 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2024-11-24 01:48:09,078 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-24 01:48:09,078 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2024-11-24 01:48:09,079 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2024-11-24 01:48:09,079 INFO L87 Difference]: Start difference. First operand 1012 states and 1380 transitions. Second operand has 8 states, 8 states have (on average 35.25) internal successors, (282), 8 states have internal predecessors, (282), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-24 01:48:10,321 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 01:48:10,321 INFO L93 Difference]: Finished difference Result 2518 states and 3403 transitions. [2024-11-24 01:48:10,322 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2024-11-24 01:48:10,322 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 35.25) internal successors, (282), 8 states have internal predecessors, (282), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 339 [2024-11-24 01:48:10,323 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 01:48:10,329 INFO L225 Difference]: With dead ends: 2518 [2024-11-24 01:48:10,329 INFO L226 Difference]: Without dead ends: 1878 [2024-11-24 01:48:10,331 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=37, Invalid=95, Unknown=0, NotChecked=0, Total=132 [2024-11-24 01:48:10,332 INFO L435 NwaCegarLoop]: 416 mSDtfsCounter, 1287 mSDsluCounter, 2000 mSDsCounter, 0 mSdLazyCounter, 970 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.9s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1290 SdHoareTripleChecker+Valid, 2416 SdHoareTripleChecker+Invalid, 970 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 970 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.1s IncrementalHoareTripleChecker+Time [2024-11-24 01:48:10,332 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1290 Valid, 2416 Invalid, 970 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 970 Invalid, 0 Unknown, 0 Unchecked, 1.1s Time] [2024-11-24 01:48:10,335 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1878 states. [2024-11-24 01:48:10,388 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1878 to 1870. [2024-11-24 01:48:10,392 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1870 states, 1844 states have (on average 1.3503253796095445) internal successors, (2490), 1844 states have internal predecessors, (2490), 24 states have call successors, (24), 1 states have call predecessors, (24), 1 states have return successors, (24), 24 states have call predecessors, (24), 24 states have call successors, (24) [2024-11-24 01:48:10,396 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1870 states to 1870 states and 2538 transitions. [2024-11-24 01:48:10,397 INFO L78 Accepts]: Start accepts. Automaton has 1870 states and 2538 transitions. Word has length 339 [2024-11-24 01:48:10,397 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 01:48:10,397 INFO L471 AbstractCegarLoop]: Abstraction has 1870 states and 2538 transitions. [2024-11-24 01:48:10,397 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 35.25) internal successors, (282), 8 states have internal predecessors, (282), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-24 01:48:10,398 INFO L276 IsEmpty]: Start isEmpty. Operand 1870 states and 2538 transitions. [2024-11-24 01:48:10,403 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 342 [2024-11-24 01:48:10,403 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 01:48:10,403 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 01:48:10,404 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable34 [2024-11-24 01:48:10,404 INFO L396 AbstractCegarLoop]: === Iteration 36 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 01:48:10,405 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 01:48:10,405 INFO L85 PathProgramCache]: Analyzing trace with hash -2002348361, now seen corresponding path program 1 times [2024-11-24 01:48:10,405 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 01:48:10,405 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1938028728] [2024-11-24 01:48:10,405 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 01:48:10,406 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 01:48:11,286 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 01:48:12,361 INFO L134 CoverageAnalysis]: Checked inductivity of 146 backedges. 79 proven. 4 refuted. 0 times theorem prover too weak. 63 trivial. 0 not checked. [2024-11-24 01:48:12,361 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-24 01:48:12,361 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1938028728] [2024-11-24 01:48:12,361 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1938028728] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-24 01:48:12,363 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [905106281] [2024-11-24 01:48:12,363 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 01:48:12,364 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-24 01:48:12,364 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_68366e95-16cf-4e82-8e6c-d18d732496f9/bin/uautomizer-verify-LYvppIcaGC/z3 [2024-11-24 01:48:12,366 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_68366e95-16cf-4e82-8e6c-d18d732496f9/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-24 01:48:12,370 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_68366e95-16cf-4e82-8e6c-d18d732496f9/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2024-11-24 01:48:13,827 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 01:48:13,840 INFO L256 TraceCheckSpWp]: Trace formula consists of 2047 conjuncts, 7 conjuncts are in the unsatisfiable core [2024-11-24 01:48:13,861 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-24 01:48:14,335 INFO L134 CoverageAnalysis]: Checked inductivity of 146 backedges. 88 proven. 0 refuted. 0 times theorem prover too weak. 58 trivial. 0 not checked. [2024-11-24 01:48:14,335 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-11-24 01:48:14,335 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [905106281] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-24 01:48:14,335 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-11-24 01:48:14,336 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [6] total 7 [2024-11-24 01:48:14,336 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [256769260] [2024-11-24 01:48:14,336 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-24 01:48:14,337 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-24 01:48:14,337 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-24 01:48:14,338 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-24 01:48:14,338 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2024-11-24 01:48:14,338 INFO L87 Difference]: Start difference. First operand 1870 states and 2538 transitions. Second operand has 4 states, 4 states have (on average 71.5) internal successors, (286), 4 states have internal predecessors, (286), 2 states have call successors, (6), 2 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-24 01:48:14,796 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 01:48:14,796 INFO L93 Difference]: Finished difference Result 2599 states and 3514 transitions. [2024-11-24 01:48:14,797 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-24 01:48:14,797 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 71.5) internal successors, (286), 4 states have internal predecessors, (286), 2 states have call successors, (6), 2 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 341 [2024-11-24 01:48:14,798 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 01:48:14,802 INFO L225 Difference]: With dead ends: 2599 [2024-11-24 01:48:14,802 INFO L226 Difference]: Without dead ends: 1010 [2024-11-24 01:48:14,805 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 350 GetRequests, 344 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2024-11-24 01:48:14,806 INFO L435 NwaCegarLoop]: 396 mSDtfsCounter, 458 mSDsluCounter, 398 mSDsCounter, 0 mSdLazyCounter, 309 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 458 SdHoareTripleChecker+Valid, 794 SdHoareTripleChecker+Invalid, 309 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 309 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2024-11-24 01:48:14,806 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [458 Valid, 794 Invalid, 309 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 309 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2024-11-24 01:48:14,808 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1010 states. [2024-11-24 01:48:14,871 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1010 to 1010. [2024-11-24 01:48:14,873 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1010 states, 996 states have (on average 1.3534136546184738) internal successors, (1348), 996 states have internal predecessors, (1348), 12 states have call successors, (12), 1 states have call predecessors, (12), 1 states have return successors, (12), 12 states have call predecessors, (12), 12 states have call successors, (12) [2024-11-24 01:48:14,875 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1010 states to 1010 states and 1372 transitions. [2024-11-24 01:48:14,875 INFO L78 Accepts]: Start accepts. Automaton has 1010 states and 1372 transitions. Word has length 341 [2024-11-24 01:48:14,876 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 01:48:14,876 INFO L471 AbstractCegarLoop]: Abstraction has 1010 states and 1372 transitions. [2024-11-24 01:48:14,876 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 71.5) internal successors, (286), 4 states have internal predecessors, (286), 2 states have call successors, (6), 2 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-24 01:48:14,876 INFO L276 IsEmpty]: Start isEmpty. Operand 1010 states and 1372 transitions. [2024-11-24 01:48:14,880 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 342 [2024-11-24 01:48:14,880 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 01:48:14,880 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 01:48:14,901 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_68366e95-16cf-4e82-8e6c-d18d732496f9/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Ended with exit code 0 [2024-11-24 01:48:15,081 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable35,3 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_68366e95-16cf-4e82-8e6c-d18d732496f9/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-24 01:48:15,082 INFO L396 AbstractCegarLoop]: === Iteration 37 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 01:48:15,082 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 01:48:15,083 INFO L85 PathProgramCache]: Analyzing trace with hash 615740921, now seen corresponding path program 1 times [2024-11-24 01:48:15,083 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 01:48:15,084 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [964238420] [2024-11-24 01:48:15,084 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 01:48:15,084 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 01:48:16,008 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 01:48:17,516 INFO L134 CoverageAnalysis]: Checked inductivity of 146 backedges. 20 proven. 0 refuted. 0 times theorem prover too weak. 126 trivial. 0 not checked. [2024-11-24 01:48:17,517 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-24 01:48:17,517 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [964238420] [2024-11-24 01:48:17,517 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [964238420] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-24 01:48:17,517 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-24 01:48:17,517 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2024-11-24 01:48:17,518 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1041172497] [2024-11-24 01:48:17,518 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-24 01:48:17,518 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2024-11-24 01:48:17,518 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-24 01:48:17,519 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2024-11-24 01:48:17,520 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=38, Unknown=0, NotChecked=0, Total=56 [2024-11-24 01:48:17,520 INFO L87 Difference]: Start difference. First operand 1010 states and 1372 transitions. Second operand has 8 states, 8 states have (on average 31.625) internal successors, (253), 8 states have internal predecessors, (253), 2 states have call successors, (4), 1 states have call predecessors, (4), 1 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) [2024-11-24 01:48:18,186 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 01:48:18,186 INFO L93 Difference]: Finished difference Result 1843 states and 2494 transitions. [2024-11-24 01:48:18,186 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2024-11-24 01:48:18,186 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 31.625) internal successors, (253), 8 states have internal predecessors, (253), 2 states have call successors, (4), 1 states have call predecessors, (4), 1 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) Word has length 341 [2024-11-24 01:48:18,187 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 01:48:18,189 INFO L225 Difference]: With dead ends: 1843 [2024-11-24 01:48:18,189 INFO L226 Difference]: Without dead ends: 1042 [2024-11-24 01:48:18,190 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=18, Invalid=38, Unknown=0, NotChecked=0, Total=56 [2024-11-24 01:48:18,191 INFO L435 NwaCegarLoop]: 394 mSDtfsCounter, 539 mSDsluCounter, 1931 mSDsCounter, 0 mSdLazyCounter, 950 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 541 SdHoareTripleChecker+Valid, 2325 SdHoareTripleChecker+Invalid, 953 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 950 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2024-11-24 01:48:18,191 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [541 Valid, 2325 Invalid, 953 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 950 Invalid, 0 Unknown, 0 Unchecked, 0.6s Time] [2024-11-24 01:48:18,193 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1042 states. [2024-11-24 01:48:18,219 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1042 to 1030. [2024-11-24 01:48:18,221 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1030 states, 1016 states have (on average 1.3543307086614174) internal successors, (1376), 1016 states have internal predecessors, (1376), 12 states have call successors, (12), 1 states have call predecessors, (12), 1 states have return successors, (12), 12 states have call predecessors, (12), 12 states have call successors, (12) [2024-11-24 01:48:18,223 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1030 states to 1030 states and 1400 transitions. [2024-11-24 01:48:18,223 INFO L78 Accepts]: Start accepts. Automaton has 1030 states and 1400 transitions. Word has length 341 [2024-11-24 01:48:18,224 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 01:48:18,224 INFO L471 AbstractCegarLoop]: Abstraction has 1030 states and 1400 transitions. [2024-11-24 01:48:18,224 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 31.625) internal successors, (253), 8 states have internal predecessors, (253), 2 states have call successors, (4), 1 states have call predecessors, (4), 1 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) [2024-11-24 01:48:18,224 INFO L276 IsEmpty]: Start isEmpty. Operand 1030 states and 1400 transitions. [2024-11-24 01:48:18,227 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 344 [2024-11-24 01:48:18,228 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 01:48:18,228 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 01:48:18,228 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable36 [2024-11-24 01:48:18,229 INFO L396 AbstractCegarLoop]: === Iteration 38 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 01:48:18,229 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 01:48:18,230 INFO L85 PathProgramCache]: Analyzing trace with hash 425632909, now seen corresponding path program 1 times [2024-11-24 01:48:18,230 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 01:48:18,230 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1384387379] [2024-11-24 01:48:18,230 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 01:48:18,230 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 01:48:19,241 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 01:48:20,089 INFO L134 CoverageAnalysis]: Checked inductivity of 147 backedges. 54 proven. 0 refuted. 0 times theorem prover too weak. 93 trivial. 0 not checked. [2024-11-24 01:48:20,089 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-24 01:48:20,089 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1384387379] [2024-11-24 01:48:20,089 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1384387379] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-24 01:48:20,090 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-24 01:48:20,090 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2024-11-24 01:48:20,090 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1465743352] [2024-11-24 01:48:20,090 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-24 01:48:20,090 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2024-11-24 01:48:20,090 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-24 01:48:20,091 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2024-11-24 01:48:20,091 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2024-11-24 01:48:20,092 INFO L87 Difference]: Start difference. First operand 1030 states and 1400 transitions. Second operand has 8 states, 8 states have (on average 35.75) internal successors, (286), 8 states have internal predecessors, (286), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) [2024-11-24 01:48:20,709 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 01:48:20,709 INFO L93 Difference]: Finished difference Result 2104 states and 2855 transitions. [2024-11-24 01:48:20,710 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2024-11-24 01:48:20,710 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 35.75) internal successors, (286), 8 states have internal predecessors, (286), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) Word has length 343 [2024-11-24 01:48:20,710 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 01:48:20,712 INFO L225 Difference]: With dead ends: 2104 [2024-11-24 01:48:20,712 INFO L226 Difference]: Without dead ends: 1046 [2024-11-24 01:48:20,714 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=22, Invalid=50, Unknown=0, NotChecked=0, Total=72 [2024-11-24 01:48:20,714 INFO L435 NwaCegarLoop]: 531 mSDtfsCounter, 536 mSDsluCounter, 2363 mSDsCounter, 0 mSdLazyCounter, 502 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 538 SdHoareTripleChecker+Valid, 2894 SdHoareTripleChecker+Invalid, 503 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 502 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2024-11-24 01:48:20,714 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [538 Valid, 2894 Invalid, 503 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 502 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2024-11-24 01:48:20,716 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1046 states. [2024-11-24 01:48:20,762 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1046 to 1038. [2024-11-24 01:48:20,768 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1038 states, 1024 states have (on average 1.34765625) internal successors, (1380), 1024 states have internal predecessors, (1380), 12 states have call successors, (12), 1 states have call predecessors, (12), 1 states have return successors, (12), 12 states have call predecessors, (12), 12 states have call successors, (12) [2024-11-24 01:48:20,774 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1038 states to 1038 states and 1404 transitions. [2024-11-24 01:48:20,774 INFO L78 Accepts]: Start accepts. Automaton has 1038 states and 1404 transitions. Word has length 343 [2024-11-24 01:48:20,775 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 01:48:20,775 INFO L471 AbstractCegarLoop]: Abstraction has 1038 states and 1404 transitions. [2024-11-24 01:48:20,775 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 35.75) internal successors, (286), 8 states have internal predecessors, (286), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) [2024-11-24 01:48:20,775 INFO L276 IsEmpty]: Start isEmpty. Operand 1038 states and 1404 transitions. [2024-11-24 01:48:20,778 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 346 [2024-11-24 01:48:20,778 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 01:48:20,778 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 01:48:20,779 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable37 [2024-11-24 01:48:20,779 INFO L396 AbstractCegarLoop]: === Iteration 39 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 01:48:20,779 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 01:48:20,779 INFO L85 PathProgramCache]: Analyzing trace with hash -119240141, now seen corresponding path program 1 times [2024-11-24 01:48:20,779 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 01:48:20,779 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1749193356] [2024-11-24 01:48:20,779 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 01:48:20,780 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 01:48:21,963 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 01:48:24,010 INFO L134 CoverageAnalysis]: Checked inductivity of 148 backedges. 4 proven. 84 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-24 01:48:24,010 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-24 01:48:24,010 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1749193356] [2024-11-24 01:48:24,010 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1749193356] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-24 01:48:24,010 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1125603490] [2024-11-24 01:48:24,010 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 01:48:24,010 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-24 01:48:24,010 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_68366e95-16cf-4e82-8e6c-d18d732496f9/bin/uautomizer-verify-LYvppIcaGC/z3 [2024-11-24 01:48:24,013 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_68366e95-16cf-4e82-8e6c-d18d732496f9/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-24 01:48:24,017 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_68366e95-16cf-4e82-8e6c-d18d732496f9/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2024-11-24 01:48:25,411 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 01:48:25,422 INFO L256 TraceCheckSpWp]: Trace formula consists of 2055 conjuncts, 33 conjuncts are in the unsatisfiable core [2024-11-24 01:48:25,431 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-24 01:48:26,723 INFO L134 CoverageAnalysis]: Checked inductivity of 148 backedges. 78 proven. 6 refuted. 0 times theorem prover too weak. 64 trivial. 0 not checked. [2024-11-24 01:48:26,723 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-24 01:48:28,521 INFO L134 CoverageAnalysis]: Checked inductivity of 148 backedges. 78 proven. 3 refuted. 0 times theorem prover too weak. 67 trivial. 0 not checked. [2024-11-24 01:48:28,522 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1125603490] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-24 01:48:28,522 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-24 01:48:28,522 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 9, 10] total 26 [2024-11-24 01:48:28,523 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2034075239] [2024-11-24 01:48:28,523 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-24 01:48:28,524 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 26 states [2024-11-24 01:48:28,524 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-24 01:48:28,525 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2024-11-24 01:48:28,525 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=89, Invalid=561, Unknown=0, NotChecked=0, Total=650 [2024-11-24 01:48:28,527 INFO L87 Difference]: Start difference. First operand 1038 states and 1404 transitions. Second operand has 26 states, 26 states have (on average 33.0) internal successors, (858), 26 states have internal predecessors, (858), 6 states have call successors, (15), 2 states have call predecessors, (15), 2 states have return successors, (15), 6 states have call predecessors, (15), 6 states have call successors, (15) [2024-11-24 01:48:31,027 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 01:48:31,028 INFO L93 Difference]: Finished difference Result 1870 states and 2520 transitions. [2024-11-24 01:48:31,028 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2024-11-24 01:48:31,028 INFO L78 Accepts]: Start accepts. Automaton has has 26 states, 26 states have (on average 33.0) internal successors, (858), 26 states have internal predecessors, (858), 6 states have call successors, (15), 2 states have call predecessors, (15), 2 states have return successors, (15), 6 states have call predecessors, (15), 6 states have call successors, (15) Word has length 345 [2024-11-24 01:48:31,028 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 01:48:31,031 INFO L225 Difference]: With dead ends: 1870 [2024-11-24 01:48:31,031 INFO L226 Difference]: Without dead ends: 1062 [2024-11-24 01:48:31,033 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 723 GetRequests, 677 SyntacticMatches, 0 SemanticMatches, 46 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 363 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=367, Invalid=1889, Unknown=0, NotChecked=0, Total=2256 [2024-11-24 01:48:31,033 INFO L435 NwaCegarLoop]: 483 mSDtfsCounter, 787 mSDsluCounter, 6381 mSDsCounter, 0 mSdLazyCounter, 3317 mSolverCounterSat, 5 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 787 SdHoareTripleChecker+Valid, 6864 SdHoareTripleChecker+Invalid, 3322 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 5 IncrementalHoareTripleChecker+Valid, 3317 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 2.0s IncrementalHoareTripleChecker+Time [2024-11-24 01:48:31,033 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [787 Valid, 6864 Invalid, 3322 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [5 Valid, 3317 Invalid, 0 Unknown, 0 Unchecked, 2.0s Time] [2024-11-24 01:48:31,035 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1062 states. [2024-11-24 01:48:31,073 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1062 to 1035. [2024-11-24 01:48:31,074 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1035 states, 1021 states have (on average 1.3379040156709108) internal successors, (1366), 1021 states have internal predecessors, (1366), 12 states have call successors, (12), 1 states have call predecessors, (12), 1 states have return successors, (12), 12 states have call predecessors, (12), 12 states have call successors, (12) [2024-11-24 01:48:31,077 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1035 states to 1035 states and 1390 transitions. [2024-11-24 01:48:31,078 INFO L78 Accepts]: Start accepts. Automaton has 1035 states and 1390 transitions. Word has length 345 [2024-11-24 01:48:31,078 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 01:48:31,078 INFO L471 AbstractCegarLoop]: Abstraction has 1035 states and 1390 transitions. [2024-11-24 01:48:31,079 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 26 states, 26 states have (on average 33.0) internal successors, (858), 26 states have internal predecessors, (858), 6 states have call successors, (15), 2 states have call predecessors, (15), 2 states have return successors, (15), 6 states have call predecessors, (15), 6 states have call successors, (15) [2024-11-24 01:48:31,079 INFO L276 IsEmpty]: Start isEmpty. Operand 1035 states and 1390 transitions. [2024-11-24 01:48:31,084 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 350 [2024-11-24 01:48:31,084 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 01:48:31,085 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 01:48:31,103 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_68366e95-16cf-4e82-8e6c-d18d732496f9/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Forceful destruction successful, exit code 0 [2024-11-24 01:48:31,285 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 4 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_68366e95-16cf-4e82-8e6c-d18d732496f9/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable38 [2024-11-24 01:48:31,286 INFO L396 AbstractCegarLoop]: === Iteration 40 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 01:48:31,286 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 01:48:31,286 INFO L85 PathProgramCache]: Analyzing trace with hash -1308830486, now seen corresponding path program 1 times [2024-11-24 01:48:31,286 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 01:48:31,286 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2033821927] [2024-11-24 01:48:31,286 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 01:48:31,287 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 01:48:31,700 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 01:48:32,268 INFO L134 CoverageAnalysis]: Checked inductivity of 149 backedges. 51 proven. 0 refuted. 0 times theorem prover too weak. 98 trivial. 0 not checked. [2024-11-24 01:48:32,269 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-24 01:48:32,269 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2033821927] [2024-11-24 01:48:32,269 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2033821927] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-24 01:48:32,269 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-24 01:48:32,269 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-24 01:48:32,269 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1839028631] [2024-11-24 01:48:32,269 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-24 01:48:32,270 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-24 01:48:32,270 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-24 01:48:32,270 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-24 01:48:32,270 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-11-24 01:48:32,271 INFO L87 Difference]: Start difference. First operand 1035 states and 1390 transitions. Second operand has 5 states, 5 states have (on average 57.6) internal successors, (288), 5 states have internal predecessors, (288), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-24 01:48:32,325 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 01:48:32,325 INFO L93 Difference]: Finished difference Result 1707 states and 2297 transitions. [2024-11-24 01:48:32,326 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-11-24 01:48:32,326 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 57.6) internal successors, (288), 5 states have internal predecessors, (288), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 349 [2024-11-24 01:48:32,327 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 01:48:32,334 INFO L225 Difference]: With dead ends: 1707 [2024-11-24 01:48:32,337 INFO L226 Difference]: Without dead ends: 1089 [2024-11-24 01:48:32,338 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-11-24 01:48:32,339 INFO L435 NwaCegarLoop]: 544 mSDtfsCounter, 16 mSDsluCounter, 1620 mSDsCounter, 0 mSdLazyCounter, 23 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 16 SdHoareTripleChecker+Valid, 2164 SdHoareTripleChecker+Invalid, 23 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 23 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-24 01:48:32,339 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [16 Valid, 2164 Invalid, 23 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 23 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-24 01:48:32,341 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1089 states. [2024-11-24 01:48:32,369 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1089 to 1089. [2024-11-24 01:48:32,370 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1089 states, 1075 states have (on average 1.3432558139534885) internal successors, (1444), 1075 states have internal predecessors, (1444), 12 states have call successors, (12), 1 states have call predecessors, (12), 1 states have return successors, (12), 12 states have call predecessors, (12), 12 states have call successors, (12) [2024-11-24 01:48:32,373 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1089 states to 1089 states and 1468 transitions. [2024-11-24 01:48:32,373 INFO L78 Accepts]: Start accepts. Automaton has 1089 states and 1468 transitions. Word has length 349 [2024-11-24 01:48:32,374 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 01:48:32,374 INFO L471 AbstractCegarLoop]: Abstraction has 1089 states and 1468 transitions. [2024-11-24 01:48:32,374 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 57.6) internal successors, (288), 5 states have internal predecessors, (288), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-24 01:48:32,374 INFO L276 IsEmpty]: Start isEmpty. Operand 1089 states and 1468 transitions. [2024-11-24 01:48:32,378 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 351 [2024-11-24 01:48:32,378 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 01:48:32,378 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 01:48:32,379 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable39 [2024-11-24 01:48:32,379 INFO L396 AbstractCegarLoop]: === Iteration 41 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 01:48:32,379 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 01:48:32,380 INFO L85 PathProgramCache]: Analyzing trace with hash 765704138, now seen corresponding path program 1 times [2024-11-24 01:48:32,380 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 01:48:32,380 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1803613465] [2024-11-24 01:48:32,380 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 01:48:32,380 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 01:48:33,503 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 01:48:35,405 INFO L134 CoverageAnalysis]: Checked inductivity of 150 backedges. 44 proven. 0 refuted. 0 times theorem prover too weak. 106 trivial. 0 not checked. [2024-11-24 01:48:35,405 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-24 01:48:35,405 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1803613465] [2024-11-24 01:48:35,406 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1803613465] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-24 01:48:35,406 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-24 01:48:35,406 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2024-11-24 01:48:35,406 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [706664109] [2024-11-24 01:48:35,406 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-24 01:48:35,406 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 9 states [2024-11-24 01:48:35,407 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-24 01:48:35,407 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2024-11-24 01:48:35,407 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=52, Unknown=0, NotChecked=0, Total=72 [2024-11-24 01:48:35,408 INFO L87 Difference]: Start difference. First operand 1089 states and 1468 transitions. Second operand has 9 states, 9 states have (on average 31.22222222222222) internal successors, (281), 9 states have internal predecessors, (281), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) [2024-11-24 01:48:36,947 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 01:48:36,947 INFO L93 Difference]: Finished difference Result 2596 states and 3460 transitions. [2024-11-24 01:48:36,948 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2024-11-24 01:48:36,948 INFO L78 Accepts]: Start accepts. Automaton has has 9 states, 9 states have (on average 31.22222222222222) internal successors, (281), 9 states have internal predecessors, (281), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) Word has length 350 [2024-11-24 01:48:36,948 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 01:48:36,954 INFO L225 Difference]: With dead ends: 2596 [2024-11-24 01:48:36,954 INFO L226 Difference]: Without dead ends: 1848 [2024-11-24 01:48:36,955 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=43, Invalid=113, Unknown=0, NotChecked=0, Total=156 [2024-11-24 01:48:36,956 INFO L435 NwaCegarLoop]: 585 mSDtfsCounter, 1392 mSDsluCounter, 2675 mSDsCounter, 0 mSdLazyCounter, 1470 mSolverCounterSat, 5 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1393 SdHoareTripleChecker+Valid, 3260 SdHoareTripleChecker+Invalid, 1475 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 5 IncrementalHoareTripleChecker+Valid, 1470 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.4s IncrementalHoareTripleChecker+Time [2024-11-24 01:48:36,956 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1393 Valid, 3260 Invalid, 1475 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [5 Valid, 1470 Invalid, 0 Unknown, 0 Unchecked, 1.4s Time] [2024-11-24 01:48:36,959 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1848 states. [2024-11-24 01:48:36,992 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1848 to 1207. [2024-11-24 01:48:36,994 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1207 states, 1189 states have (on average 1.343986543313709) internal successors, (1598), 1189 states have internal predecessors, (1598), 16 states have call successors, (16), 1 states have call predecessors, (16), 1 states have return successors, (16), 16 states have call predecessors, (16), 16 states have call successors, (16) [2024-11-24 01:48:36,996 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1207 states to 1207 states and 1630 transitions. [2024-11-24 01:48:36,997 INFO L78 Accepts]: Start accepts. Automaton has 1207 states and 1630 transitions. Word has length 350 [2024-11-24 01:48:36,997 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 01:48:36,997 INFO L471 AbstractCegarLoop]: Abstraction has 1207 states and 1630 transitions. [2024-11-24 01:48:36,998 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 9 states, 9 states have (on average 31.22222222222222) internal successors, (281), 9 states have internal predecessors, (281), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) [2024-11-24 01:48:36,998 INFO L276 IsEmpty]: Start isEmpty. Operand 1207 states and 1630 transitions. [2024-11-24 01:48:37,002 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 351 [2024-11-24 01:48:37,002 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 01:48:37,002 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 01:48:37,002 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable40 [2024-11-24 01:48:37,003 INFO L396 AbstractCegarLoop]: === Iteration 42 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 01:48:37,003 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 01:48:37,003 INFO L85 PathProgramCache]: Analyzing trace with hash -1673972598, now seen corresponding path program 1 times [2024-11-24 01:48:37,004 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 01:48:37,004 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1675310400] [2024-11-24 01:48:37,004 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 01:48:37,004 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 01:48:38,899 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 01:48:41,345 INFO L134 CoverageAnalysis]: Checked inductivity of 150 backedges. 40 proven. 0 refuted. 0 times theorem prover too weak. 110 trivial. 0 not checked. [2024-11-24 01:48:41,345 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-24 01:48:41,345 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1675310400] [2024-11-24 01:48:41,345 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1675310400] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-24 01:48:41,345 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-24 01:48:41,346 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2024-11-24 01:48:41,346 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1451692449] [2024-11-24 01:48:41,346 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-24 01:48:41,346 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 12 states [2024-11-24 01:48:41,346 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-24 01:48:41,347 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2024-11-24 01:48:41,347 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=30, Invalid=102, Unknown=0, NotChecked=0, Total=132 [2024-11-24 01:48:41,347 INFO L87 Difference]: Start difference. First operand 1207 states and 1630 transitions. Second operand has 12 states, 12 states have (on average 23.083333333333332) internal successors, (277), 12 states have internal predecessors, (277), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) [2024-11-24 01:48:42,083 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 01:48:42,083 INFO L93 Difference]: Finished difference Result 2299 states and 3101 transitions. [2024-11-24 01:48:42,083 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2024-11-24 01:48:42,084 INFO L78 Accepts]: Start accepts. Automaton has has 12 states, 12 states have (on average 23.083333333333332) internal successors, (277), 12 states have internal predecessors, (277), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) Word has length 350 [2024-11-24 01:48:42,084 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 01:48:42,089 INFO L225 Difference]: With dead ends: 2299 [2024-11-24 01:48:42,089 INFO L226 Difference]: Without dead ends: 1591 [2024-11-24 01:48:42,090 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 42 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=87, Invalid=255, Unknown=0, NotChecked=0, Total=342 [2024-11-24 01:48:42,092 INFO L435 NwaCegarLoop]: 836 mSDtfsCounter, 1909 mSDsluCounter, 4638 mSDsCounter, 0 mSdLazyCounter, 422 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1914 SdHoareTripleChecker+Valid, 5474 SdHoareTripleChecker+Invalid, 425 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 422 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2024-11-24 01:48:42,096 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1914 Valid, 5474 Invalid, 425 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 422 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2024-11-24 01:48:42,097 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1591 states. [2024-11-24 01:48:42,140 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1591 to 1264. [2024-11-24 01:48:42,142 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1264 states, 1243 states have (on average 1.341110217216412) internal successors, (1667), 1243 states have internal predecessors, (1667), 19 states have call successors, (19), 1 states have call predecessors, (19), 1 states have return successors, (19), 19 states have call predecessors, (19), 19 states have call successors, (19) [2024-11-24 01:48:42,144 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1264 states to 1264 states and 1705 transitions. [2024-11-24 01:48:42,145 INFO L78 Accepts]: Start accepts. Automaton has 1264 states and 1705 transitions. Word has length 350 [2024-11-24 01:48:42,145 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 01:48:42,145 INFO L471 AbstractCegarLoop]: Abstraction has 1264 states and 1705 transitions. [2024-11-24 01:48:42,146 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 12 states, 12 states have (on average 23.083333333333332) internal successors, (277), 12 states have internal predecessors, (277), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) [2024-11-24 01:48:42,146 INFO L276 IsEmpty]: Start isEmpty. Operand 1264 states and 1705 transitions. [2024-11-24 01:48:42,149 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 351 [2024-11-24 01:48:42,149 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 01:48:42,150 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 01:48:42,150 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable41 [2024-11-24 01:48:42,150 INFO L396 AbstractCegarLoop]: === Iteration 43 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 01:48:42,150 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 01:48:42,151 INFO L85 PathProgramCache]: Analyzing trace with hash -514430230, now seen corresponding path program 1 times [2024-11-24 01:48:42,151 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 01:48:42,151 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [502159851] [2024-11-24 01:48:42,151 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 01:48:42,151 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 01:48:43,998 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 01:48:47,861 INFO L134 CoverageAnalysis]: Checked inductivity of 148 backedges. 50 proven. 36 refuted. 0 times theorem prover too weak. 62 trivial. 0 not checked. [2024-11-24 01:48:47,862 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-24 01:48:47,862 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [502159851] [2024-11-24 01:48:47,862 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [502159851] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-24 01:48:47,862 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1540234036] [2024-11-24 01:48:47,862 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 01:48:47,862 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-24 01:48:47,862 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_68366e95-16cf-4e82-8e6c-d18d732496f9/bin/uautomizer-verify-LYvppIcaGC/z3 [2024-11-24 01:48:47,865 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_68366e95-16cf-4e82-8e6c-d18d732496f9/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-24 01:48:47,868 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_68366e95-16cf-4e82-8e6c-d18d732496f9/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2024-11-24 01:48:49,599 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 01:48:49,610 INFO L256 TraceCheckSpWp]: Trace formula consists of 2064 conjuncts, 11 conjuncts are in the unsatisfiable core [2024-11-24 01:48:49,616 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-24 01:48:49,739 INFO L134 CoverageAnalysis]: Checked inductivity of 148 backedges. 74 proven. 0 refuted. 0 times theorem prover too weak. 74 trivial. 0 not checked. [2024-11-24 01:48:49,740 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-11-24 01:48:49,740 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1540234036] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-24 01:48:49,740 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-11-24 01:48:49,740 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [17] total 21 [2024-11-24 01:48:49,740 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [436476803] [2024-11-24 01:48:49,741 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-24 01:48:49,741 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-11-24 01:48:49,744 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-24 01:48:49,745 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-11-24 01:48:49,746 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=52, Invalid=368, Unknown=0, NotChecked=0, Total=420 [2024-11-24 01:48:49,746 INFO L87 Difference]: Start difference. First operand 1264 states and 1705 transitions. Second operand has 6 states, 5 states have (on average 55.4) internal successors, (277), 6 states have internal predecessors, (277), 3 states have call successors, (6), 2 states have call predecessors, (6), 3 states have return successors, (6), 2 states have call predecessors, (6), 3 states have call successors, (6) [2024-11-24 01:48:49,836 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 01:48:49,837 INFO L93 Difference]: Finished difference Result 2136 states and 2872 transitions. [2024-11-24 01:48:49,837 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-24 01:48:49,838 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 5 states have (on average 55.4) internal successors, (277), 6 states have internal predecessors, (277), 3 states have call successors, (6), 2 states have call predecessors, (6), 3 states have return successors, (6), 2 states have call predecessors, (6), 3 states have call successors, (6) Word has length 350 [2024-11-24 01:48:49,838 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 01:48:49,841 INFO L225 Difference]: With dead ends: 2136 [2024-11-24 01:48:49,845 INFO L226 Difference]: Without dead ends: 1264 [2024-11-24 01:48:49,847 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 367 GetRequests, 348 SyntacticMatches, 0 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 87 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=52, Invalid=368, Unknown=0, NotChecked=0, Total=420 [2024-11-24 01:48:49,848 INFO L435 NwaCegarLoop]: 544 mSDtfsCounter, 0 mSDsluCounter, 2157 mSDsCounter, 0 mSdLazyCounter, 39 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 2701 SdHoareTripleChecker+Invalid, 39 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 39 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-24 01:48:49,848 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 2701 Invalid, 39 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 39 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-24 01:48:49,849 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1264 states. [2024-11-24 01:48:49,881 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1264 to 1264. [2024-11-24 01:48:49,883 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1264 states, 1243 states have (on average 1.337087691069992) internal successors, (1662), 1243 states have internal predecessors, (1662), 19 states have call successors, (19), 1 states have call predecessors, (19), 1 states have return successors, (19), 19 states have call predecessors, (19), 19 states have call successors, (19) [2024-11-24 01:48:49,885 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1264 states to 1264 states and 1700 transitions. [2024-11-24 01:48:49,886 INFO L78 Accepts]: Start accepts. Automaton has 1264 states and 1700 transitions. Word has length 350 [2024-11-24 01:48:49,886 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 01:48:49,888 INFO L471 AbstractCegarLoop]: Abstraction has 1264 states and 1700 transitions. [2024-11-24 01:48:49,888 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 5 states have (on average 55.4) internal successors, (277), 6 states have internal predecessors, (277), 3 states have call successors, (6), 2 states have call predecessors, (6), 3 states have return successors, (6), 2 states have call predecessors, (6), 3 states have call successors, (6) [2024-11-24 01:48:49,889 INFO L276 IsEmpty]: Start isEmpty. Operand 1264 states and 1700 transitions. [2024-11-24 01:48:49,892 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 353 [2024-11-24 01:48:49,892 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 01:48:49,893 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 01:48:49,913 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_68366e95-16cf-4e82-8e6c-d18d732496f9/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Ended with exit code 0 [2024-11-24 01:48:50,093 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable42,5 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_68366e95-16cf-4e82-8e6c-d18d732496f9/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-24 01:48:50,094 INFO L396 AbstractCegarLoop]: === Iteration 44 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 01:48:50,094 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 01:48:50,094 INFO L85 PathProgramCache]: Analyzing trace with hash -979521590, now seen corresponding path program 1 times [2024-11-24 01:48:50,094 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 01:48:50,094 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [964242425] [2024-11-24 01:48:50,094 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 01:48:50,095 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 01:48:51,167 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 01:48:52,014 INFO L134 CoverageAnalysis]: Checked inductivity of 149 backedges. 89 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-24 01:48:52,014 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-24 01:48:52,014 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [964242425] [2024-11-24 01:48:52,014 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [964242425] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-24 01:48:52,014 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-24 01:48:52,015 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-11-24 01:48:52,015 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [952020614] [2024-11-24 01:48:52,015 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-24 01:48:52,015 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-11-24 01:48:52,015 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-24 01:48:52,017 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-11-24 01:48:52,017 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2024-11-24 01:48:52,018 INFO L87 Difference]: Start difference. First operand 1264 states and 1700 transitions. Second operand has 6 states, 6 states have (on average 54.166666666666664) internal successors, (325), 6 states have internal predecessors, (325), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-24 01:48:52,886 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 01:48:52,887 INFO L93 Difference]: Finished difference Result 2427 states and 3247 transitions. [2024-11-24 01:48:52,887 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2024-11-24 01:48:52,887 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 54.166666666666664) internal successors, (325), 6 states have internal predecessors, (325), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 352 [2024-11-24 01:48:52,887 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 01:48:52,891 INFO L225 Difference]: With dead ends: 2427 [2024-11-24 01:48:52,891 INFO L226 Difference]: Without dead ends: 1885 [2024-11-24 01:48:52,892 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2024-11-24 01:48:52,892 INFO L435 NwaCegarLoop]: 605 mSDtfsCounter, 695 mSDsluCounter, 1569 mSDsCounter, 0 mSdLazyCounter, 858 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.7s Time, 0 mProtectedPredicate, 0 mProtectedAction, 695 SdHoareTripleChecker+Valid, 2174 SdHoareTripleChecker+Invalid, 860 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 858 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.8s IncrementalHoareTripleChecker+Time [2024-11-24 01:48:52,892 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [695 Valid, 2174 Invalid, 860 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 858 Invalid, 0 Unknown, 0 Unchecked, 0.8s Time] [2024-11-24 01:48:52,894 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1885 states. [2024-11-24 01:48:52,927 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1885 to 1651. [2024-11-24 01:48:52,930 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1651 states, 1630 states have (on average 1.3159509202453987) internal successors, (2145), 1630 states have internal predecessors, (2145), 19 states have call successors, (19), 1 states have call predecessors, (19), 1 states have return successors, (19), 19 states have call predecessors, (19), 19 states have call successors, (19) [2024-11-24 01:48:52,932 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1651 states to 1651 states and 2183 transitions. [2024-11-24 01:48:52,933 INFO L78 Accepts]: Start accepts. Automaton has 1651 states and 2183 transitions. Word has length 352 [2024-11-24 01:48:52,933 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 01:48:52,933 INFO L471 AbstractCegarLoop]: Abstraction has 1651 states and 2183 transitions. [2024-11-24 01:48:52,934 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 54.166666666666664) internal successors, (325), 6 states have internal predecessors, (325), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-24 01:48:52,934 INFO L276 IsEmpty]: Start isEmpty. Operand 1651 states and 2183 transitions. [2024-11-24 01:48:52,938 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 353 [2024-11-24 01:48:52,938 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 01:48:52,938 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 01:48:52,938 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable43 [2024-11-24 01:48:52,939 INFO L396 AbstractCegarLoop]: === Iteration 45 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 01:48:52,939 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 01:48:52,939 INFO L85 PathProgramCache]: Analyzing trace with hash 1621155369, now seen corresponding path program 1 times [2024-11-24 01:48:52,940 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 01:48:52,940 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [251361310] [2024-11-24 01:48:52,940 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 01:48:52,940 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 01:48:54,719 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 01:48:59,616 INFO L134 CoverageAnalysis]: Checked inductivity of 147 backedges. 50 proven. 37 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-24 01:48:59,616 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-24 01:48:59,616 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [251361310] [2024-11-24 01:48:59,616 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [251361310] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-24 01:48:59,616 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [127074608] [2024-11-24 01:48:59,616 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 01:48:59,616 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-24 01:48:59,616 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_68366e95-16cf-4e82-8e6c-d18d732496f9/bin/uautomizer-verify-LYvppIcaGC/z3 [2024-11-24 01:48:59,618 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_68366e95-16cf-4e82-8e6c-d18d732496f9/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-24 01:48:59,620 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_68366e95-16cf-4e82-8e6c-d18d732496f9/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2024-11-24 01:49:01,543 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 01:49:01,556 INFO L256 TraceCheckSpWp]: Trace formula consists of 2070 conjuncts, 20 conjuncts are in the unsatisfiable core [2024-11-24 01:49:01,564 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-24 01:49:01,897 INFO L134 CoverageAnalysis]: Checked inductivity of 147 backedges. 117 proven. 0 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2024-11-24 01:49:01,897 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-11-24 01:49:01,897 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [127074608] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-24 01:49:01,897 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-11-24 01:49:01,897 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [20] total 26 [2024-11-24 01:49:01,898 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2107156274] [2024-11-24 01:49:01,898 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-24 01:49:01,898 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2024-11-24 01:49:01,898 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-24 01:49:01,899 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2024-11-24 01:49:01,899 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=96, Invalid=554, Unknown=0, NotChecked=0, Total=650 [2024-11-24 01:49:01,900 INFO L87 Difference]: Start difference. First operand 1651 states and 2183 transitions. Second operand has 8 states, 8 states have (on average 40.625) internal successors, (325), 8 states have internal predecessors, (325), 2 states have call successors, (6), 2 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-24 01:49:02,690 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 01:49:02,691 INFO L93 Difference]: Finished difference Result 3631 states and 4818 transitions. [2024-11-24 01:49:02,691 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2024-11-24 01:49:02,691 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 40.625) internal successors, (325), 8 states have internal predecessors, (325), 2 states have call successors, (6), 2 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 352 [2024-11-24 01:49:02,692 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 01:49:02,697 INFO L225 Difference]: With dead ends: 3631 [2024-11-24 01:49:02,697 INFO L226 Difference]: Without dead ends: 2876 [2024-11-24 01:49:02,698 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 377 GetRequests, 351 SyntacticMatches, 0 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 217 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=108, Invalid=648, Unknown=0, NotChecked=0, Total=756 [2024-11-24 01:49:02,699 INFO L435 NwaCegarLoop]: 395 mSDtfsCounter, 1342 mSDsluCounter, 1951 mSDsCounter, 0 mSdLazyCounter, 930 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1348 SdHoareTripleChecker+Valid, 2346 SdHoareTripleChecker+Invalid, 933 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 930 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.7s IncrementalHoareTripleChecker+Time [2024-11-24 01:49:02,699 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1348 Valid, 2346 Invalid, 933 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 930 Invalid, 0 Unknown, 0 Unchecked, 0.7s Time] [2024-11-24 01:49:02,701 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2876 states. [2024-11-24 01:49:02,747 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2876 to 2444. [2024-11-24 01:49:02,749 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2444 states, 2408 states have (on average 1.298172757475083) internal successors, (3126), 2408 states have internal predecessors, (3126), 34 states have call successors, (34), 1 states have call predecessors, (34), 1 states have return successors, (34), 34 states have call predecessors, (34), 34 states have call successors, (34) [2024-11-24 01:49:02,752 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2444 states to 2444 states and 3194 transitions. [2024-11-24 01:49:02,753 INFO L78 Accepts]: Start accepts. Automaton has 2444 states and 3194 transitions. Word has length 352 [2024-11-24 01:49:02,753 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 01:49:02,753 INFO L471 AbstractCegarLoop]: Abstraction has 2444 states and 3194 transitions. [2024-11-24 01:49:02,753 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 40.625) internal successors, (325), 8 states have internal predecessors, (325), 2 states have call successors, (6), 2 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-24 01:49:02,753 INFO L276 IsEmpty]: Start isEmpty. Operand 2444 states and 3194 transitions. [2024-11-24 01:49:02,758 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 354 [2024-11-24 01:49:02,758 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 01:49:02,758 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 01:49:02,776 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_68366e95-16cf-4e82-8e6c-d18d732496f9/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Ended with exit code 0 [2024-11-24 01:49:02,959 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 6 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_68366e95-16cf-4e82-8e6c-d18d732496f9/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable44 [2024-11-24 01:49:02,959 INFO L396 AbstractCegarLoop]: === Iteration 46 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 01:49:02,960 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 01:49:02,960 INFO L85 PathProgramCache]: Analyzing trace with hash -1153544926, now seen corresponding path program 1 times [2024-11-24 01:49:02,960 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 01:49:02,960 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [834494090] [2024-11-24 01:49:02,960 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 01:49:02,960 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 01:49:05,263 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 01:49:10,015 INFO L134 CoverageAnalysis]: Checked inductivity of 147 backedges. 50 proven. 37 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-24 01:49:10,015 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-24 01:49:10,015 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [834494090] [2024-11-24 01:49:10,015 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [834494090] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-24 01:49:10,015 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [718358467] [2024-11-24 01:49:10,015 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 01:49:10,015 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-24 01:49:10,016 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_68366e95-16cf-4e82-8e6c-d18d732496f9/bin/uautomizer-verify-LYvppIcaGC/z3 [2024-11-24 01:49:10,018 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_68366e95-16cf-4e82-8e6c-d18d732496f9/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-24 01:49:10,020 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_68366e95-16cf-4e82-8e6c-d18d732496f9/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2024-11-24 01:49:12,122 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 01:49:12,133 INFO L256 TraceCheckSpWp]: Trace formula consists of 2073 conjuncts, 11 conjuncts are in the unsatisfiable core [2024-11-24 01:49:12,138 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-24 01:49:12,228 INFO L134 CoverageAnalysis]: Checked inductivity of 147 backedges. 57 proven. 0 refuted. 0 times theorem prover too weak. 90 trivial. 0 not checked. [2024-11-24 01:49:12,228 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-11-24 01:49:12,228 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [718358467] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-24 01:49:12,228 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-11-24 01:49:12,228 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [18] total 22 [2024-11-24 01:49:12,229 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [928043936] [2024-11-24 01:49:12,229 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-24 01:49:12,229 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-11-24 01:49:12,229 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-24 01:49:12,230 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-11-24 01:49:12,230 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=65, Invalid=397, Unknown=0, NotChecked=0, Total=462 [2024-11-24 01:49:12,230 INFO L87 Difference]: Start difference. First operand 2444 states and 3194 transitions. Second operand has 6 states, 5 states have (on average 55.2) internal successors, (276), 6 states have internal predecessors, (276), 3 states have call successors, (5), 2 states have call predecessors, (5), 3 states have return successors, (5), 2 states have call predecessors, (5), 3 states have call successors, (5) [2024-11-24 01:49:12,306 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 01:49:12,306 INFO L93 Difference]: Finished difference Result 4423 states and 5759 transitions. [2024-11-24 01:49:12,307 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-24 01:49:12,307 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 5 states have (on average 55.2) internal successors, (276), 6 states have internal predecessors, (276), 3 states have call successors, (5), 2 states have call predecessors, (5), 3 states have return successors, (5), 2 states have call predecessors, (5), 3 states have call successors, (5) Word has length 353 [2024-11-24 01:49:12,307 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 01:49:12,313 INFO L225 Difference]: With dead ends: 4423 [2024-11-24 01:49:12,313 INFO L226 Difference]: Without dead ends: 2444 [2024-11-24 01:49:12,316 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 370 GetRequests, 350 SyntacticMatches, 0 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 120 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=65, Invalid=397, Unknown=0, NotChecked=0, Total=462 [2024-11-24 01:49:12,316 INFO L435 NwaCegarLoop]: 543 mSDtfsCounter, 0 mSDsluCounter, 2153 mSDsCounter, 0 mSdLazyCounter, 39 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 2696 SdHoareTripleChecker+Invalid, 39 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 39 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-24 01:49:12,317 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 2696 Invalid, 39 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 39 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-24 01:49:12,319 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2444 states. [2024-11-24 01:49:12,368 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2444 to 2444. [2024-11-24 01:49:12,371 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2444 states, 2408 states have (on average 1.295265780730897) internal successors, (3119), 2408 states have internal predecessors, (3119), 34 states have call successors, (34), 1 states have call predecessors, (34), 1 states have return successors, (34), 34 states have call predecessors, (34), 34 states have call successors, (34) [2024-11-24 01:49:12,375 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2444 states to 2444 states and 3187 transitions. [2024-11-24 01:49:12,376 INFO L78 Accepts]: Start accepts. Automaton has 2444 states and 3187 transitions. Word has length 353 [2024-11-24 01:49:12,376 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 01:49:12,377 INFO L471 AbstractCegarLoop]: Abstraction has 2444 states and 3187 transitions. [2024-11-24 01:49:12,377 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 5 states have (on average 55.2) internal successors, (276), 6 states have internal predecessors, (276), 3 states have call successors, (5), 2 states have call predecessors, (5), 3 states have return successors, (5), 2 states have call predecessors, (5), 3 states have call successors, (5) [2024-11-24 01:49:12,377 INFO L276 IsEmpty]: Start isEmpty. Operand 2444 states and 3187 transitions. [2024-11-24 01:49:12,381 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 354 [2024-11-24 01:49:12,382 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 01:49:12,382 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 01:49:12,403 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_68366e95-16cf-4e82-8e6c-d18d732496f9/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Ended with exit code 0 [2024-11-24 01:49:12,582 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 7 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_68366e95-16cf-4e82-8e6c-d18d732496f9/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable45 [2024-11-24 01:49:12,583 INFO L396 AbstractCegarLoop]: === Iteration 47 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 01:49:12,583 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 01:49:12,583 INFO L85 PathProgramCache]: Analyzing trace with hash 1414674721, now seen corresponding path program 1 times [2024-11-24 01:49:12,583 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 01:49:12,583 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [695523662] [2024-11-24 01:49:12,583 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 01:49:12,584 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 01:49:13,274 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 01:49:14,010 INFO L134 CoverageAnalysis]: Checked inductivity of 149 backedges. 89 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-24 01:49:14,010 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-24 01:49:14,010 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [695523662] [2024-11-24 01:49:14,010 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [695523662] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-24 01:49:14,010 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-24 01:49:14,011 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-11-24 01:49:14,011 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1994471897] [2024-11-24 01:49:14,011 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-24 01:49:14,011 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-11-24 01:49:14,011 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-24 01:49:14,012 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-11-24 01:49:14,012 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2024-11-24 01:49:14,012 INFO L87 Difference]: Start difference. First operand 2444 states and 3187 transitions. Second operand has 6 states, 6 states have (on average 54.333333333333336) internal successors, (326), 6 states have internal predecessors, (326), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-24 01:49:14,633 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 01:49:14,634 INFO L93 Difference]: Finished difference Result 3221 states and 4236 transitions. [2024-11-24 01:49:14,634 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-24 01:49:14,634 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 54.333333333333336) internal successors, (326), 6 states have internal predecessors, (326), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 353 [2024-11-24 01:49:14,634 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 01:49:14,638 INFO L225 Difference]: With dead ends: 3221 [2024-11-24 01:49:14,638 INFO L226 Difference]: Without dead ends: 2639 [2024-11-24 01:49:14,639 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2024-11-24 01:49:14,639 INFO L435 NwaCegarLoop]: 395 mSDtfsCounter, 710 mSDsluCounter, 1156 mSDsCounter, 0 mSdLazyCounter, 602 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 713 SdHoareTripleChecker+Valid, 1551 SdHoareTripleChecker+Invalid, 605 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 602 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2024-11-24 01:49:14,640 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [713 Valid, 1551 Invalid, 605 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 602 Invalid, 0 Unknown, 0 Unchecked, 0.6s Time] [2024-11-24 01:49:14,642 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2639 states. [2024-11-24 01:49:14,675 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2639 to 1838. [2024-11-24 01:49:14,677 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1838 states, 1808 states have (on average 1.3080752212389382) internal successors, (2365), 1808 states have internal predecessors, (2365), 28 states have call successors, (28), 1 states have call predecessors, (28), 1 states have return successors, (28), 28 states have call predecessors, (28), 28 states have call successors, (28) [2024-11-24 01:49:14,680 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1838 states to 1838 states and 2421 transitions. [2024-11-24 01:49:14,681 INFO L78 Accepts]: Start accepts. Automaton has 1838 states and 2421 transitions. Word has length 353 [2024-11-24 01:49:14,681 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 01:49:14,681 INFO L471 AbstractCegarLoop]: Abstraction has 1838 states and 2421 transitions. [2024-11-24 01:49:14,681 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 54.333333333333336) internal successors, (326), 6 states have internal predecessors, (326), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-24 01:49:14,682 INFO L276 IsEmpty]: Start isEmpty. Operand 1838 states and 2421 transitions. [2024-11-24 01:49:14,685 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 355 [2024-11-24 01:49:14,685 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 01:49:14,686 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 01:49:14,686 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable46 [2024-11-24 01:49:14,686 INFO L396 AbstractCegarLoop]: === Iteration 48 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 01:49:14,687 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 01:49:14,687 INFO L85 PathProgramCache]: Analyzing trace with hash -507611325, now seen corresponding path program 1 times [2024-11-24 01:49:14,687 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 01:49:14,687 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2115177527] [2024-11-24 01:49:14,687 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 01:49:14,688 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 01:49:14,964 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 01:49:15,653 INFO L134 CoverageAnalysis]: Checked inductivity of 149 backedges. 41 proven. 0 refuted. 0 times theorem prover too weak. 108 trivial. 0 not checked. [2024-11-24 01:49:15,653 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-24 01:49:15,654 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2115177527] [2024-11-24 01:49:15,654 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2115177527] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-24 01:49:15,654 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-24 01:49:15,654 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-11-24 01:49:15,654 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1427860018] [2024-11-24 01:49:15,654 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-24 01:49:15,655 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-11-24 01:49:15,655 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-24 01:49:15,655 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-11-24 01:49:15,655 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2024-11-24 01:49:15,656 INFO L87 Difference]: Start difference. First operand 1838 states and 2421 transitions. Second operand has 6 states, 6 states have (on average 47.5) internal successors, (285), 6 states have internal predecessors, (285), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-24 01:49:16,108 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 01:49:16,108 INFO L93 Difference]: Finished difference Result 3071 states and 4028 transitions. [2024-11-24 01:49:16,109 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-24 01:49:16,109 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 47.5) internal successors, (285), 6 states have internal predecessors, (285), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 354 [2024-11-24 01:49:16,109 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 01:49:16,112 INFO L225 Difference]: With dead ends: 3071 [2024-11-24 01:49:16,112 INFO L226 Difference]: Without dead ends: 1886 [2024-11-24 01:49:16,113 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2024-11-24 01:49:16,114 INFO L435 NwaCegarLoop]: 399 mSDtfsCounter, 503 mSDsluCounter, 1163 mSDsCounter, 0 mSdLazyCounter, 618 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 503 SdHoareTripleChecker+Valid, 1562 SdHoareTripleChecker+Invalid, 619 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 618 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2024-11-24 01:49:16,114 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [503 Valid, 1562 Invalid, 619 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 618 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2024-11-24 01:49:16,116 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1886 states. [2024-11-24 01:49:16,145 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1886 to 1862. [2024-11-24 01:49:16,147 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1862 states, 1832 states have (on average 1.3040393013100438) internal successors, (2389), 1832 states have internal predecessors, (2389), 28 states have call successors, (28), 1 states have call predecessors, (28), 1 states have return successors, (28), 28 states have call predecessors, (28), 28 states have call successors, (28) [2024-11-24 01:49:16,151 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1862 states to 1862 states and 2445 transitions. [2024-11-24 01:49:16,151 INFO L78 Accepts]: Start accepts. Automaton has 1862 states and 2445 transitions. Word has length 354 [2024-11-24 01:49:16,152 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 01:49:16,152 INFO L471 AbstractCegarLoop]: Abstraction has 1862 states and 2445 transitions. [2024-11-24 01:49:16,152 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 47.5) internal successors, (285), 6 states have internal predecessors, (285), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-24 01:49:16,152 INFO L276 IsEmpty]: Start isEmpty. Operand 1862 states and 2445 transitions. [2024-11-24 01:49:16,156 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 355 [2024-11-24 01:49:16,156 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 01:49:16,156 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 01:49:16,157 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable47 [2024-11-24 01:49:16,157 INFO L396 AbstractCegarLoop]: === Iteration 49 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 01:49:16,157 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 01:49:16,158 INFO L85 PathProgramCache]: Analyzing trace with hash 1200514099, now seen corresponding path program 1 times [2024-11-24 01:49:16,158 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 01:49:16,158 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [220730228] [2024-11-24 01:49:16,158 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 01:49:16,158 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 01:49:17,770 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 01:49:19,905 INFO L134 CoverageAnalysis]: Checked inductivity of 148 backedges. 2 proven. 86 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-24 01:49:19,905 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-24 01:49:19,905 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [220730228] [2024-11-24 01:49:19,906 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [220730228] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-24 01:49:19,906 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1236499183] [2024-11-24 01:49:19,906 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 01:49:19,906 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-24 01:49:19,906 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_68366e95-16cf-4e82-8e6c-d18d732496f9/bin/uautomizer-verify-LYvppIcaGC/z3 [2024-11-24 01:49:19,908 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_68366e95-16cf-4e82-8e6c-d18d732496f9/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-24 01:49:19,909 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_68366e95-16cf-4e82-8e6c-d18d732496f9/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2024-11-24 01:49:22,655 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 01:49:22,667 INFO L256 TraceCheckSpWp]: Trace formula consists of 2076 conjuncts, 61 conjuncts are in the unsatisfiable core [2024-11-24 01:49:22,678 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-24 01:49:24,271 INFO L134 CoverageAnalysis]: Checked inductivity of 148 backedges. 120 proven. 4 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2024-11-24 01:49:24,272 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-24 01:49:26,870 INFO L134 CoverageAnalysis]: Checked inductivity of 148 backedges. 82 proven. 6 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-24 01:49:26,870 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1236499183] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-24 01:49:26,870 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-24 01:49:26,871 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 12, 12] total 33 [2024-11-24 01:49:26,871 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1747049399] [2024-11-24 01:49:26,871 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-24 01:49:26,872 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 33 states [2024-11-24 01:49:26,872 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-24 01:49:26,873 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 33 interpolants. [2024-11-24 01:49:26,874 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=120, Invalid=936, Unknown=0, NotChecked=0, Total=1056 [2024-11-24 01:49:26,875 INFO L87 Difference]: Start difference. First operand 1862 states and 2445 transitions. Second operand has 33 states, 33 states have (on average 26.90909090909091) internal successors, (888), 33 states have internal predecessors, (888), 6 states have call successors, (18), 2 states have call predecessors, (18), 2 states have return successors, (18), 6 states have call predecessors, (18), 6 states have call successors, (18) [2024-11-24 01:49:29,530 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 01:49:29,531 INFO L93 Difference]: Finished difference Result 3567 states and 4653 transitions. [2024-11-24 01:49:29,531 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2024-11-24 01:49:29,531 INFO L78 Accepts]: Start accepts. Automaton has has 33 states, 33 states have (on average 26.90909090909091) internal successors, (888), 33 states have internal predecessors, (888), 6 states have call successors, (18), 2 states have call predecessors, (18), 2 states have return successors, (18), 6 states have call predecessors, (18), 6 states have call successors, (18) Word has length 354 [2024-11-24 01:49:29,532 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 01:49:29,536 INFO L225 Difference]: With dead ends: 3567 [2024-11-24 01:49:29,536 INFO L226 Difference]: Without dead ends: 1908 [2024-11-24 01:49:29,539 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 740 GetRequests, 689 SyntacticMatches, 2 SemanticMatches, 49 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 500 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=367, Invalid=2183, Unknown=0, NotChecked=0, Total=2550 [2024-11-24 01:49:29,539 INFO L435 NwaCegarLoop]: 483 mSDtfsCounter, 1267 mSDsluCounter, 8040 mSDsCounter, 0 mSdLazyCounter, 4076 mSolverCounterSat, 15 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.8s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1270 SdHoareTripleChecker+Valid, 8523 SdHoareTripleChecker+Invalid, 4091 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 15 IncrementalHoareTripleChecker+Valid, 4076 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 2.2s IncrementalHoareTripleChecker+Time [2024-11-24 01:49:29,539 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1270 Valid, 8523 Invalid, 4091 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [15 Valid, 4076 Invalid, 0 Unknown, 0 Unchecked, 2.2s Time] [2024-11-24 01:49:29,541 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1908 states. [2024-11-24 01:49:29,582 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1908 to 1890. [2024-11-24 01:49:29,584 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1890 states, 1860 states have (on average 1.3016129032258064) internal successors, (2421), 1860 states have internal predecessors, (2421), 28 states have call successors, (28), 1 states have call predecessors, (28), 1 states have return successors, (28), 28 states have call predecessors, (28), 28 states have call successors, (28) [2024-11-24 01:49:29,587 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1890 states to 1890 states and 2477 transitions. [2024-11-24 01:49:29,588 INFO L78 Accepts]: Start accepts. Automaton has 1890 states and 2477 transitions. Word has length 354 [2024-11-24 01:49:29,588 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 01:49:29,588 INFO L471 AbstractCegarLoop]: Abstraction has 1890 states and 2477 transitions. [2024-11-24 01:49:29,588 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 33 states, 33 states have (on average 26.90909090909091) internal successors, (888), 33 states have internal predecessors, (888), 6 states have call successors, (18), 2 states have call predecessors, (18), 2 states have return successors, (18), 6 states have call predecessors, (18), 6 states have call successors, (18) [2024-11-24 01:49:29,588 INFO L276 IsEmpty]: Start isEmpty. Operand 1890 states and 2477 transitions. [2024-11-24 01:49:29,592 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 355 [2024-11-24 01:49:29,592 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 01:49:29,592 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 01:49:29,613 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_68366e95-16cf-4e82-8e6c-d18d732496f9/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Ended with exit code 0 [2024-11-24 01:49:29,793 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 8 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_68366e95-16cf-4e82-8e6c-d18d732496f9/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable48 [2024-11-24 01:49:29,793 INFO L396 AbstractCegarLoop]: === Iteration 50 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 01:49:29,794 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 01:49:29,794 INFO L85 PathProgramCache]: Analyzing trace with hash -1812099217, now seen corresponding path program 1 times [2024-11-24 01:49:29,794 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 01:49:29,794 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [34686678] [2024-11-24 01:49:29,794 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 01:49:29,794 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 01:49:30,124 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 01:49:31,020 INFO L134 CoverageAnalysis]: Checked inductivity of 145 backedges. 85 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-24 01:49:31,020 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-24 01:49:31,020 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [34686678] [2024-11-24 01:49:31,021 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [34686678] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-24 01:49:31,021 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-24 01:49:31,021 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-11-24 01:49:31,021 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1329372019] [2024-11-24 01:49:31,021 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-24 01:49:31,022 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-11-24 01:49:31,023 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-24 01:49:31,024 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-11-24 01:49:31,025 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2024-11-24 01:49:31,025 INFO L87 Difference]: Start difference. First operand 1890 states and 2477 transitions. Second operand has 6 states, 6 states have (on average 54.5) internal successors, (327), 6 states have internal predecessors, (327), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-24 01:49:31,156 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 01:49:31,157 INFO L93 Difference]: Finished difference Result 2951 states and 3889 transitions. [2024-11-24 01:49:31,157 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-24 01:49:31,158 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 54.5) internal successors, (327), 6 states have internal predecessors, (327), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 354 [2024-11-24 01:49:31,158 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 01:49:31,164 INFO L225 Difference]: With dead ends: 2951 [2024-11-24 01:49:31,164 INFO L226 Difference]: Without dead ends: 2345 [2024-11-24 01:49:31,166 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2024-11-24 01:49:31,167 INFO L435 NwaCegarLoop]: 938 mSDtfsCounter, 375 mSDsluCounter, 3343 mSDsCounter, 0 mSdLazyCounter, 42 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 375 SdHoareTripleChecker+Valid, 4281 SdHoareTripleChecker+Invalid, 42 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 42 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-24 01:49:31,167 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [375 Valid, 4281 Invalid, 42 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 42 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-24 01:49:31,171 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2345 states. [2024-11-24 01:49:31,221 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2345 to 1984. [2024-11-24 01:49:31,223 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1984 states, 1950 states have (on average 1.301025641025641) internal successors, (2537), 1950 states have internal predecessors, (2537), 32 states have call successors, (32), 1 states have call predecessors, (32), 1 states have return successors, (32), 32 states have call predecessors, (32), 32 states have call successors, (32) [2024-11-24 01:49:31,226 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1984 states to 1984 states and 2601 transitions. [2024-11-24 01:49:31,227 INFO L78 Accepts]: Start accepts. Automaton has 1984 states and 2601 transitions. Word has length 354 [2024-11-24 01:49:31,228 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 01:49:31,228 INFO L471 AbstractCegarLoop]: Abstraction has 1984 states and 2601 transitions. [2024-11-24 01:49:31,228 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 54.5) internal successors, (327), 6 states have internal predecessors, (327), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-24 01:49:31,228 INFO L276 IsEmpty]: Start isEmpty. Operand 1984 states and 2601 transitions. [2024-11-24 01:49:31,236 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 356 [2024-11-24 01:49:31,236 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 01:49:31,236 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 01:49:31,237 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable49 [2024-11-24 01:49:31,237 INFO L396 AbstractCegarLoop]: === Iteration 51 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 01:49:31,237 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 01:49:31,237 INFO L85 PathProgramCache]: Analyzing trace with hash -1050843708, now seen corresponding path program 1 times [2024-11-24 01:49:31,238 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 01:49:31,238 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [214671972] [2024-11-24 01:49:31,238 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 01:49:31,238 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 01:49:32,865 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 01:49:33,733 INFO L134 CoverageAnalysis]: Checked inductivity of 146 backedges. 83 proven. 3 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-24 01:49:33,733 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-24 01:49:33,733 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [214671972] [2024-11-24 01:49:33,733 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [214671972] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-24 01:49:33,733 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [786093456] [2024-11-24 01:49:33,734 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 01:49:33,734 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-24 01:49:33,734 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_68366e95-16cf-4e82-8e6c-d18d732496f9/bin/uautomizer-verify-LYvppIcaGC/z3 [2024-11-24 01:49:33,736 INFO L229 MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_68366e95-16cf-4e82-8e6c-d18d732496f9/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-24 01:49:33,740 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_68366e95-16cf-4e82-8e6c-d18d732496f9/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2024-11-24 01:49:36,554 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 01:49:36,564 INFO L256 TraceCheckSpWp]: Trace formula consists of 2077 conjuncts, 11 conjuncts are in the unsatisfiable core [2024-11-24 01:49:36,573 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-24 01:49:36,648 INFO L134 CoverageAnalysis]: Checked inductivity of 146 backedges. 121 proven. 0 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-11-24 01:49:36,649 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-11-24 01:49:36,649 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [786093456] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-24 01:49:36,649 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-11-24 01:49:36,649 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [7] total 11 [2024-11-24 01:49:36,649 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [498737254] [2024-11-24 01:49:36,649 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-24 01:49:36,650 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-11-24 01:49:36,650 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-24 01:49:36,651 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-11-24 01:49:36,651 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=90, Unknown=0, NotChecked=0, Total=110 [2024-11-24 01:49:36,651 INFO L87 Difference]: Start difference. First operand 1984 states and 2601 transitions. Second operand has 6 states, 5 states have (on average 66.0) internal successors, (330), 6 states have internal predecessors, (330), 3 states have call successors, (6), 2 states have call predecessors, (6), 3 states have return successors, (6), 2 states have call predecessors, (6), 3 states have call successors, (6) [2024-11-24 01:49:36,730 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 01:49:36,731 INFO L93 Difference]: Finished difference Result 3733 states and 4874 transitions. [2024-11-24 01:49:36,731 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-24 01:49:36,731 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 5 states have (on average 66.0) internal successors, (330), 6 states have internal predecessors, (330), 3 states have call successors, (6), 2 states have call predecessors, (6), 3 states have return successors, (6), 2 states have call predecessors, (6), 3 states have call successors, (6) Word has length 355 [2024-11-24 01:49:36,732 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 01:49:36,736 INFO L225 Difference]: With dead ends: 3733 [2024-11-24 01:49:36,737 INFO L226 Difference]: Without dead ends: 1984 [2024-11-24 01:49:36,739 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 362 GetRequests, 353 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=20, Invalid=90, Unknown=0, NotChecked=0, Total=110 [2024-11-24 01:49:36,739 INFO L435 NwaCegarLoop]: 542 mSDtfsCounter, 0 mSDsluCounter, 2149 mSDsCounter, 0 mSdLazyCounter, 39 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 2691 SdHoareTripleChecker+Invalid, 39 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 39 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-24 01:49:36,740 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 2691 Invalid, 39 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 39 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-24 01:49:36,742 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1984 states. [2024-11-24 01:49:36,791 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1984 to 1984. [2024-11-24 01:49:36,793 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1984 states, 1950 states have (on average 1.2969230769230768) internal successors, (2529), 1950 states have internal predecessors, (2529), 32 states have call successors, (32), 1 states have call predecessors, (32), 1 states have return successors, (32), 32 states have call predecessors, (32), 32 states have call successors, (32) [2024-11-24 01:49:36,796 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1984 states to 1984 states and 2593 transitions. [2024-11-24 01:49:36,797 INFO L78 Accepts]: Start accepts. Automaton has 1984 states and 2593 transitions. Word has length 355 [2024-11-24 01:49:36,798 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 01:49:36,798 INFO L471 AbstractCegarLoop]: Abstraction has 1984 states and 2593 transitions. [2024-11-24 01:49:36,798 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 5 states have (on average 66.0) internal successors, (330), 6 states have internal predecessors, (330), 3 states have call successors, (6), 2 states have call predecessors, (6), 3 states have return successors, (6), 2 states have call predecessors, (6), 3 states have call successors, (6) [2024-11-24 01:49:36,799 INFO L276 IsEmpty]: Start isEmpty. Operand 1984 states and 2593 transitions. [2024-11-24 01:49:36,804 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 357 [2024-11-24 01:49:36,804 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 01:49:36,804 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 01:49:36,827 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_68366e95-16cf-4e82-8e6c-d18d732496f9/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Ended with exit code 0 [2024-11-24 01:49:37,005 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable50,9 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_68366e95-16cf-4e82-8e6c-d18d732496f9/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-24 01:49:37,005 INFO L396 AbstractCegarLoop]: === Iteration 52 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 01:49:37,006 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 01:49:37,006 INFO L85 PathProgramCache]: Analyzing trace with hash 1150600425, now seen corresponding path program 1 times [2024-11-24 01:49:37,006 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 01:49:37,007 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1897253664] [2024-11-24 01:49:37,007 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 01:49:37,007 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 01:49:38,109 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 01:49:39,367 INFO L134 CoverageAnalysis]: Checked inductivity of 147 backedges. 80 proven. 4 refuted. 0 times theorem prover too weak. 63 trivial. 0 not checked. [2024-11-24 01:49:39,367 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-24 01:49:39,367 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1897253664] [2024-11-24 01:49:39,367 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1897253664] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-24 01:49:39,367 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1380410827] [2024-11-24 01:49:39,368 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 01:49:39,368 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-24 01:49:39,368 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_68366e95-16cf-4e82-8e6c-d18d732496f9/bin/uautomizer-verify-LYvppIcaGC/z3 [2024-11-24 01:49:39,372 INFO L229 MonitoredProcess]: Starting monitored process 10 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_68366e95-16cf-4e82-8e6c-d18d732496f9/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-24 01:49:39,373 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_68366e95-16cf-4e82-8e6c-d18d732496f9/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process [2024-11-24 01:49:42,579 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 01:49:42,592 INFO L256 TraceCheckSpWp]: Trace formula consists of 2080 conjuncts, 244 conjuncts are in the unsatisfiable core [2024-11-24 01:49:42,609 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-24 01:49:51,347 INFO L134 CoverageAnalysis]: Checked inductivity of 147 backedges. 50 proven. 37 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-24 01:49:51,347 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-24 01:50:06,542 INFO L134 CoverageAnalysis]: Checked inductivity of 147 backedges. 4 proven. 83 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-24 01:50:06,543 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1380410827] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-24 01:50:06,543 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-24 01:50:06,543 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 40, 36] total 78 [2024-11-24 01:50:06,543 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [674368476] [2024-11-24 01:50:06,543 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-24 01:50:06,544 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 78 states [2024-11-24 01:50:06,544 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-24 01:50:06,546 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 78 interpolants. [2024-11-24 01:50:06,547 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=1427, Invalid=4579, Unknown=0, NotChecked=0, Total=6006 [2024-11-24 01:50:06,547 INFO L87 Difference]: Start difference. First operand 1984 states and 2593 transitions. Second operand has 78 states, 78 states have (on average 11.756410256410257) internal successors, (917), 78 states have internal predecessors, (917), 9 states have call successors, (18), 1 states have call predecessors, (18), 1 states have return successors, (18), 9 states have call predecessors, (18), 9 states have call successors, (18) [2024-11-24 01:50:26,008 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 01:50:26,008 INFO L93 Difference]: Finished difference Result 13254 states and 17175 transitions. [2024-11-24 01:50:26,008 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 126 states. [2024-11-24 01:50:26,009 INFO L78 Accepts]: Start accepts. Automaton has has 78 states, 78 states have (on average 11.756410256410257) internal successors, (917), 78 states have internal predecessors, (917), 9 states have call successors, (18), 1 states have call predecessors, (18), 1 states have return successors, (18), 9 states have call predecessors, (18), 9 states have call successors, (18) Word has length 356 [2024-11-24 01:50:26,009 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 01:50:26,025 INFO L225 Difference]: With dead ends: 13254 [2024-11-24 01:50:26,025 INFO L226 Difference]: Without dead ends: 11491 [2024-11-24 01:50:26,035 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 824 GetRequests, 642 SyntacticMatches, 0 SemanticMatches, 182 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10480 ImplicationChecksByTransitivity, 11.5s TimeCoverageRelationStatistics Valid=5876, Invalid=27796, Unknown=0, NotChecked=0, Total=33672 [2024-11-24 01:50:26,035 INFO L435 NwaCegarLoop]: 469 mSDtfsCounter, 18826 mSDsluCounter, 17417 mSDsCounter, 0 mSdLazyCounter, 15348 mSolverCounterSat, 93 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 10.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 18844 SdHoareTripleChecker+Valid, 17886 SdHoareTripleChecker+Invalid, 15441 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.1s SdHoareTripleChecker+Time, 93 IncrementalHoareTripleChecker+Valid, 15348 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 11.5s IncrementalHoareTripleChecker+Time [2024-11-24 01:50:26,036 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [18844 Valid, 17886 Invalid, 15441 Unknown, 0 Unchecked, 0.1s Time], IncrementalHoareTripleChecker [93 Valid, 15348 Invalid, 0 Unknown, 0 Unchecked, 11.5s Time] [2024-11-24 01:50:26,042 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11491 states. [2024-11-24 01:50:26,177 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11491 to 3235. [2024-11-24 01:50:26,180 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3235 states, 3177 states have (on average 1.2914699401951526) internal successors, (4103), 3177 states have internal predecessors, (4103), 56 states have call successors, (56), 1 states have call predecessors, (56), 1 states have return successors, (56), 56 states have call predecessors, (56), 56 states have call successors, (56) [2024-11-24 01:50:26,185 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3235 states to 3235 states and 4215 transitions. [2024-11-24 01:50:26,186 INFO L78 Accepts]: Start accepts. Automaton has 3235 states and 4215 transitions. Word has length 356 [2024-11-24 01:50:26,186 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 01:50:26,187 INFO L471 AbstractCegarLoop]: Abstraction has 3235 states and 4215 transitions. [2024-11-24 01:50:26,187 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 78 states, 78 states have (on average 11.756410256410257) internal successors, (917), 78 states have internal predecessors, (917), 9 states have call successors, (18), 1 states have call predecessors, (18), 1 states have return successors, (18), 9 states have call predecessors, (18), 9 states have call successors, (18) [2024-11-24 01:50:26,187 INFO L276 IsEmpty]: Start isEmpty. Operand 3235 states and 4215 transitions. [2024-11-24 01:50:26,192 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 358 [2024-11-24 01:50:26,192 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 01:50:26,193 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 01:50:26,216 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_68366e95-16cf-4e82-8e6c-d18d732496f9/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Ended with exit code 0 [2024-11-24 01:50:26,393 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable51,10 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_68366e95-16cf-4e82-8e6c-d18d732496f9/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-24 01:50:26,393 INFO L396 AbstractCegarLoop]: === Iteration 53 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 01:50:26,394 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 01:50:26,394 INFO L85 PathProgramCache]: Analyzing trace with hash 414587049, now seen corresponding path program 1 times [2024-11-24 01:50:26,394 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 01:50:26,394 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [727060152] [2024-11-24 01:50:26,394 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 01:50:26,394 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 01:50:28,673 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-24 01:50:28,674 INFO L357 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-24 01:50:31,038 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-24 01:50:31,428 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-24 01:50:31,430 INFO L340 BasicCegarLoop]: Counterexample is feasible [2024-11-24 01:50:31,431 INFO L782 garLoopResultBuilder]: Registering result UNSAFE for location ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION (0 of 1 remaining) [2024-11-24 01:50:31,433 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable52 [2024-11-24 01:50:31,437 INFO L422 BasicCegarLoop]: Path program histogram: [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 01:50:31,807 INFO L170 ceAbstractionStarter]: Computing trace abstraction results [2024-11-24 01:50:31,813 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 24.11 01:50:31 BoogieIcfgContainer [2024-11-24 01:50:31,813 INFO L131 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2024-11-24 01:50:31,814 INFO L112 PluginConnector]: ------------------------Witness Printer---------------------------- [2024-11-24 01:50:31,814 INFO L270 PluginConnector]: Initializing Witness Printer... [2024-11-24 01:50:31,815 INFO L274 PluginConnector]: Witness Printer initialized [2024-11-24 01:50:31,816 INFO L184 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 24.11 01:47:18" (3/4) ... [2024-11-24 01:50:31,819 INFO L149 WitnessPrinter]: No result that supports witness generation found [2024-11-24 01:50:31,820 INFO L131 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2024-11-24 01:50:31,821 INFO L158 Benchmark]: Toolchain (without parser) took 198153.22ms. Allocated memory was 117.4MB in the beginning and 2.0GB in the end (delta: 1.8GB). Free memory was 91.2MB in the beginning and 1.5GB in the end (delta: -1.4GB). Peak memory consumption was 473.8MB. Max. memory is 16.1GB. [2024-11-24 01:50:31,822 INFO L158 Benchmark]: CDTParser took 0.49ms. Allocated memory is still 117.4MB. Free memory is still 72.6MB. There was no memory consumed. Max. memory is 16.1GB. [2024-11-24 01:50:31,822 INFO L158 Benchmark]: CACSL2BoogieTranslator took 686.79ms. Allocated memory is still 117.4MB. Free memory was 91.2MB in the beginning and 62.1MB in the end (delta: 29.1MB). Peak memory consumption was 33.6MB. Max. memory is 16.1GB. [2024-11-24 01:50:31,823 INFO L158 Benchmark]: Boogie Procedure Inliner took 257.54ms. Allocated memory is still 117.4MB. Free memory was 62.1MB in the beginning and 76.1MB in the end (delta: -14.1MB). Peak memory consumption was 41.6MB. Max. memory is 16.1GB. [2024-11-24 01:50:31,823 INFO L158 Benchmark]: Boogie Preprocessor took 397.53ms. Allocated memory is still 117.4MB. Free memory was 76.1MB in the beginning and 70.2MB in the end (delta: 6.0MB). Peak memory consumption was 17.1MB. Max. memory is 16.1GB. [2024-11-24 01:50:31,823 INFO L158 Benchmark]: RCFGBuilder took 3076.43ms. Allocated memory was 117.4MB in the beginning and 234.9MB in the end (delta: 117.4MB). Free memory was 70.0MB in the beginning and 76.9MB in the end (delta: -6.9MB). Peak memory consumption was 112.9MB. Max. memory is 16.1GB. [2024-11-24 01:50:31,823 INFO L158 Benchmark]: TraceAbstraction took 193716.23ms. Allocated memory was 234.9MB in the beginning and 2.0GB in the end (delta: 1.7GB). Free memory was 76.3MB in the beginning and 1.5GB in the end (delta: -1.4GB). Peak memory consumption was 1.1GB. Max. memory is 16.1GB. [2024-11-24 01:50:31,824 INFO L158 Benchmark]: Witness Printer took 5.90ms. Allocated memory is still 2.0GB. Free memory was 1.5GB in the beginning and 1.5GB in the end (delta: 171.8kB). There was no memory consumed. Max. memory is 16.1GB. [2024-11-24 01:50:31,826 INFO L338 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.49ms. Allocated memory is still 117.4MB. Free memory is still 72.6MB. There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 686.79ms. Allocated memory is still 117.4MB. Free memory was 91.2MB in the beginning and 62.1MB in the end (delta: 29.1MB). Peak memory consumption was 33.6MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 257.54ms. Allocated memory is still 117.4MB. Free memory was 62.1MB in the beginning and 76.1MB in the end (delta: -14.1MB). Peak memory consumption was 41.6MB. Max. memory is 16.1GB. * Boogie Preprocessor took 397.53ms. Allocated memory is still 117.4MB. Free memory was 76.1MB in the beginning and 70.2MB in the end (delta: 6.0MB). Peak memory consumption was 17.1MB. Max. memory is 16.1GB. * RCFGBuilder took 3076.43ms. Allocated memory was 117.4MB in the beginning and 234.9MB in the end (delta: 117.4MB). Free memory was 70.0MB in the beginning and 76.9MB in the end (delta: -6.9MB). Peak memory consumption was 112.9MB. Max. memory is 16.1GB. * TraceAbstraction took 193716.23ms. Allocated memory was 234.9MB in the beginning and 2.0GB in the end (delta: 1.7GB). Free memory was 76.3MB in the beginning and 1.5GB in the end (delta: -1.4GB). Peak memory consumption was 1.1GB. Max. memory is 16.1GB. * Witness Printer took 5.90ms. Allocated memory is still 2.0GB. Free memory was 1.5GB in the beginning and 1.5GB in the end (delta: 171.8kB). There was no memory consumed. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: ErrorAutomatonStatistics NumberErrorTraces: 0, NumberStatementsAllTraces: 0, NumberRelevantStatements: 0, 0.0s ErrorAutomatonConstructionTimeTotal, 0.0s FaulLocalizationTime, NumberStatementsFirstTrace: -1, TraceLengthAvg: 0, 0.0s ErrorAutomatonConstructionTimeAvg, 0.0s ErrorAutomatonDifferenceTimeAvg, 0.0s ErrorAutomatonDifferenceTimeTotal, NumberOfNoEnhancement: 0, NumberOfFiniteEnhancement: 0, NumberOfInfiniteEnhancement: 0 - UnprovableResult [Line: 22]: Unable to prove that a call to reach_error is unreachable Unable to prove that a call to reach_error is unreachable Reason: overapproximation of bitwiseOr at line 291, overapproximation of bitwiseOr at line 127, overapproximation of bitwiseOr at line 146, overapproximation of bitwiseAnd at line 107, overapproximation of bitwiseAnd at line 516, overapproximation of bitwiseAnd at line 111, overapproximation of bitwiseAnd at line 223, overapproximation of bitwiseAnd at line 229, overapproximation of bitwiseAnd at line 147, overapproximation of bitwiseAnd at line 235, overapproximation of bitwiseAnd at line 203, overapproximation of bitwiseAnd at line 211, overapproximation of bitwiseAnd at line 366, overapproximation of bitwiseAnd at line 385, overapproximation of bitwiseAnd at line 300, overapproximation of bitwiseAnd at line 404, overapproximation of bitwiseAnd at line 442. Possible FailurePath: [L27] const SORT_1 mask_SORT_1 = (SORT_1)-1 >> (sizeof(SORT_1) * 8 - 1); [L28] const SORT_1 msb_SORT_1 = (SORT_1)1 << (1 - 1); [L30] const SORT_3 mask_SORT_3 = (SORT_3)-1 >> (sizeof(SORT_3) * 8 - 128); [L31] const SORT_3 msb_SORT_3 = (SORT_3)1 << (128 - 1); [L33] const SORT_11 mask_SORT_11 = (SORT_11)-1 >> (sizeof(SORT_11) * 8 - 5); [L34] const SORT_11 msb_SORT_11 = (SORT_11)1 << (5 - 1); [L36] const SORT_13 mask_SORT_13 = (SORT_13)-1 >> (sizeof(SORT_13) * 8 - 4); [L37] const SORT_13 msb_SORT_13 = (SORT_13)1 << (4 - 1); [L39] const SORT_19 mask_SORT_19 = (SORT_19)-1 >> (sizeof(SORT_19) * 8 - 3); [L40] const SORT_19 msb_SORT_19 = (SORT_19)1 << (3 - 1); [L42] const SORT_40 mask_SORT_40 = (SORT_40)-1 >> (sizeof(SORT_40) * 8 - 2); [L43] const SORT_40 msb_SORT_40 = (SORT_40)1 << (2 - 1); [L45] const SORT_13 var_15 = 8; [L46] const SORT_19 var_20 = 7; [L47] const SORT_19 var_25 = 6; [L48] const SORT_19 var_30 = 5; [L49] const SORT_19 var_35 = 4; [L50] const SORT_40 var_41 = 3; [L51] const SORT_40 var_46 = 2; [L52] const SORT_1 var_51 = 1; [L53] const SORT_13 var_64 = 9; [L54] const SORT_11 var_81 = 0; [L55] const SORT_1 var_111 = 0; [L56] const SORT_3 var_268 = 0; [L58] SORT_1 input_2; [L59] SORT_3 input_4; [L60] SORT_1 input_5; [L61] SORT_1 input_6; [L62] SORT_1 input_7; [L63] SORT_1 input_8; [L64] SORT_3 input_9; [L65] SORT_1 input_109; [L67] EXPR __VERIFIER_nondet_uint128() & mask_SORT_3 VAL [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L67] SORT_3 state_10 = __VERIFIER_nondet_uint128() & mask_SORT_3; [L68] EXPR __VERIFIER_nondet_uchar() & mask_SORT_11 VAL [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L68] SORT_11 state_12 = __VERIFIER_nondet_uchar() & mask_SORT_11; [L69] EXPR __VERIFIER_nondet_uint128() & mask_SORT_3 VAL [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L69] SORT_3 state_18 = __VERIFIER_nondet_uint128() & mask_SORT_3; [L70] EXPR __VERIFIER_nondet_uint128() & mask_SORT_3 VAL [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_18=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L70] SORT_3 state_24 = __VERIFIER_nondet_uint128() & mask_SORT_3; [L71] EXPR __VERIFIER_nondet_uint128() & mask_SORT_3 VAL [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_18=0, state_24=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L71] SORT_3 state_29 = __VERIFIER_nondet_uint128() & mask_SORT_3; [L72] EXPR __VERIFIER_nondet_uint128() & mask_SORT_3 VAL [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L72] SORT_3 state_34 = __VERIFIER_nondet_uint128() & mask_SORT_3; [L73] EXPR __VERIFIER_nondet_uint128() & mask_SORT_3 VAL [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L73] SORT_3 state_39 = __VERIFIER_nondet_uint128() & mask_SORT_3; [L74] EXPR __VERIFIER_nondet_uint128() & mask_SORT_3 VAL [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L74] SORT_3 state_45 = __VERIFIER_nondet_uint128() & mask_SORT_3; [L75] EXPR __VERIFIER_nondet_uint128() & mask_SORT_3 VAL [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L75] SORT_3 state_50 = __VERIFIER_nondet_uint128() & mask_SORT_3; [L76] EXPR __VERIFIER_nondet_uint128() & mask_SORT_3 VAL [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L76] SORT_3 state_55 = __VERIFIER_nondet_uint128() & mask_SORT_3; [L77] EXPR __VERIFIER_nondet_uchar() & mask_SORT_11 VAL [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L77] SORT_11 state_60 = __VERIFIER_nondet_uchar() & mask_SORT_11; [L78] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L78] SORT_1 state_68 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L79] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L79] SORT_1 state_69 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L80] EXPR __VERIFIER_nondet_uchar() & mask_SORT_11 VAL [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L80] SORT_11 state_72 = __VERIFIER_nondet_uchar() & mask_SORT_11; [L81] EXPR __VERIFIER_nondet_uint128() & mask_SORT_3 VAL [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L81] SORT_3 state_87 = __VERIFIER_nondet_uint128() & mask_SORT_3; [L82] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L82] SORT_1 state_91 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L83] EXPR __VERIFIER_nondet_uchar() & mask_SORT_11 VAL [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L83] SORT_11 state_136 = __VERIFIER_nondet_uchar() & mask_SORT_11; [L85] SORT_1 init_92_arg_1 = var_51; [L86] state_91 = init_92_arg_1 VAL [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L89] input_2 = __VERIFIER_nondet_uchar() [L90] input_4 = __VERIFIER_nondet_uint128() [L91] input_5 = __VERIFIER_nondet_uchar() [L92] input_6 = __VERIFIER_nondet_uchar() [L93] input_7 = __VERIFIER_nondet_uchar() [L94] EXPR input_7 & mask_SORT_1 VAL [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L94] input_7 = input_7 & mask_SORT_1 [L95] input_8 = __VERIFIER_nondet_uchar() [L96] input_9 = __VERIFIER_nondet_uint128() [L97] input_109 = __VERIFIER_nondet_uchar() [L99] SORT_1 var_93_arg_0 = input_7; [L100] SORT_1 var_93_arg_1 = state_91; [L101] SORT_1 var_93 = var_93_arg_0 == var_93_arg_1; [L102] SORT_1 var_94_arg_0 = var_51; [L103] SORT_1 var_94 = ~var_94_arg_0; [L104] SORT_1 var_95_arg_0 = var_93; [L105] SORT_1 var_95_arg_1 = var_94; VAL [input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_95_arg_0=0, var_95_arg_1=-2] [L106] EXPR var_95_arg_0 | var_95_arg_1 VAL [input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L106] SORT_1 var_95 = var_95_arg_0 | var_95_arg_1; [L107] EXPR var_95 & mask_SORT_1 VAL [input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L107] var_95 = var_95 & mask_SORT_1 [L108] SORT_1 constr_96_arg_0 = var_95; VAL [constr_96_arg_0=1, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L109] CALL assume_abort_if_not(constr_96_arg_0) VAL [\old(cond)=1] [L23] COND FALSE !(!cond) VAL [\old(cond)=1] [L109] RET assume_abort_if_not(constr_96_arg_0) VAL [constr_96_arg_0=1, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L110] SORT_13 var_65_arg_0 = var_64; VAL [constr_96_arg_0=1, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_65_arg_0=9, var_81=0] [L111] EXPR var_65_arg_0 & mask_SORT_13 VAL [constr_96_arg_0=1, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L111] var_65_arg_0 = var_65_arg_0 & mask_SORT_13 [L112] SORT_11 var_65 = var_65_arg_0; [L113] SORT_11 var_66_arg_0 = state_60; [L114] SORT_11 var_66_arg_1 = var_65; [L115] SORT_1 var_66 = var_66_arg_0 == var_66_arg_1; [L116] SORT_1 var_97_arg_0 = var_66; [L117] SORT_1 var_97 = ~var_97_arg_0; [L118] SORT_1 var_98_arg_0 = input_6; [L119] SORT_1 var_98 = ~var_98_arg_0; [L120] SORT_1 var_99_arg_0 = var_97; [L121] SORT_1 var_99_arg_1 = var_98; VAL [constr_96_arg_0=1, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_99_arg_0=-1, var_99_arg_1=-1] [L122] EXPR var_99_arg_0 | var_99_arg_1 VAL [constr_96_arg_0=1, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L122] SORT_1 var_99 = var_99_arg_0 | var_99_arg_1; [L123] SORT_1 var_100_arg_0 = var_51; [L124] SORT_1 var_100 = ~var_100_arg_0; [L125] SORT_1 var_101_arg_0 = var_99; [L126] SORT_1 var_101_arg_1 = var_100; VAL [constr_96_arg_0=1, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_101_arg_0=255, var_101_arg_1=-2, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L127] EXPR var_101_arg_0 | var_101_arg_1 VAL [constr_96_arg_0=1, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L127] SORT_1 var_101 = var_101_arg_0 | var_101_arg_1; [L128] EXPR var_101 & mask_SORT_1 VAL [constr_96_arg_0=1, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L128] var_101 = var_101 & mask_SORT_1 [L129] SORT_1 constr_102_arg_0 = var_101; VAL [constr_102_arg_0=1, constr_96_arg_0=1, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L130] CALL assume_abort_if_not(constr_102_arg_0) VAL [\old(cond)=1] [L23] COND FALSE !(!cond) VAL [\old(cond)=1] [L130] RET assume_abort_if_not(constr_102_arg_0) VAL [constr_102_arg_0=1, constr_96_arg_0=1, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L131] SORT_11 var_61_arg_0 = state_60; [L132] SORT_1 var_61 = var_61_arg_0 != 0; [L133] SORT_1 var_62_arg_0 = var_61; [L134] SORT_1 var_62 = ~var_62_arg_0; [L135] SORT_1 var_103_arg_0 = var_62; [L136] SORT_1 var_103 = ~var_103_arg_0; [L137] SORT_1 var_104_arg_0 = input_5; [L138] SORT_1 var_104 = ~var_104_arg_0; [L139] SORT_1 var_105_arg_0 = var_103; [L140] SORT_1 var_105_arg_1 = var_104; VAL [constr_102_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_105_arg_0=-256, var_105_arg_1=-1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L141] EXPR var_105_arg_0 | var_105_arg_1 VAL [constr_102_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L141] SORT_1 var_105 = var_105_arg_0 | var_105_arg_1; [L142] SORT_1 var_106_arg_0 = var_51; [L143] SORT_1 var_106 = ~var_106_arg_0; [L144] SORT_1 var_107_arg_0 = var_105; [L145] SORT_1 var_107_arg_1 = var_106; VAL [constr_102_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_107_arg_0=255, var_107_arg_1=-2, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L146] EXPR var_107_arg_0 | var_107_arg_1 VAL [constr_102_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L146] SORT_1 var_107 = var_107_arg_0 | var_107_arg_1; [L147] EXPR var_107 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L147] var_107 = var_107 & mask_SORT_1 [L148] SORT_1 constr_108_arg_0 = var_107; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L149] CALL assume_abort_if_not(constr_108_arg_0) VAL [\old(cond)=1] [L23] COND FALSE !(!cond) VAL [\old(cond)=1] [L149] RET assume_abort_if_not(constr_108_arg_0) VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L151] SORT_1 var_112_arg_0 = state_91; [L152] SORT_1 var_112_arg_1 = var_111; [L153] SORT_1 var_112_arg_2 = var_51; [L154] SORT_1 var_112 = var_112_arg_0 ? var_112_arg_1 : var_112_arg_2; [L155] SORT_1 var_70_arg_0 = state_69; [L156] SORT_1 var_70 = ~var_70_arg_0; [L157] SORT_1 var_71_arg_0 = state_68; [L158] SORT_1 var_71_arg_1 = var_70; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_71_arg_0=0, var_71_arg_1=-1, var_81=0] [L159] EXPR var_71_arg_0 & var_71_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L159] SORT_1 var_71 = var_71_arg_0 & var_71_arg_1; [L160] SORT_11 var_73_arg_0 = state_72; [L161] SORT_1 var_73 = var_73_arg_0 != 0; [L162] SORT_1 var_74_arg_0 = var_71; [L163] SORT_1 var_74_arg_1 = var_73; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_74_arg_0=0, var_74_arg_1=0, var_81=0] [L164] EXPR var_74_arg_0 & var_74_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L164] SORT_1 var_74 = var_74_arg_0 & var_74_arg_1; [L165] SORT_1 var_75_arg_0 = state_68; [L166] SORT_1 var_75 = ~var_75_arg_0; [L167] SORT_1 var_76_arg_0 = input_6; [L168] SORT_1 var_76_arg_1 = var_75; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_74=0, var_76_arg_0=0, var_76_arg_1=-1, var_81=0] [L169] EXPR var_76_arg_0 & var_76_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_74=0, var_81=0] [L169] SORT_1 var_76 = var_76_arg_0 & var_76_arg_1; [L170] SORT_1 var_77_arg_0 = var_76; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_74=0, var_77_arg_0=0, var_81=0] [L171] EXPR var_77_arg_0 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_74=0, var_81=0] [L171] var_77_arg_0 = var_77_arg_0 & mask_SORT_1 [L172] SORT_11 var_77 = var_77_arg_0; [L173] SORT_11 var_78_arg_0 = state_72; [L174] SORT_11 var_78_arg_1 = var_77; [L175] SORT_11 var_78 = var_78_arg_0 + var_78_arg_1; [L176] SORT_1 var_79_arg_0 = input_5; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_74=0, var_78=0, var_79_arg_0=0, var_81=0] [L177] EXPR var_79_arg_0 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_74=0, var_78=0, var_81=0] [L177] var_79_arg_0 = var_79_arg_0 & mask_SORT_1 [L178] SORT_11 var_79 = var_79_arg_0; [L179] SORT_11 var_80_arg_0 = var_78; [L180] SORT_11 var_80_arg_1 = var_79; [L181] SORT_11 var_80 = var_80_arg_0 - var_80_arg_1; [L182] SORT_1 var_82_arg_0 = input_7; [L183] SORT_11 var_82_arg_1 = var_81; [L184] SORT_11 var_82_arg_2 = var_80; [L185] SORT_11 var_82 = var_82_arg_0 ? var_82_arg_1 : var_82_arg_2; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_74=0, var_81=0, var_82=0] [L186] EXPR var_82 & mask_SORT_11 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_74=0, var_81=0] [L186] var_82 = var_82 & mask_SORT_11 [L187] SORT_11 var_83_arg_0 = var_82; [L188] SORT_1 var_83 = var_83_arg_0 != 0; [L189] SORT_1 var_84_arg_0 = var_83; [L190] SORT_1 var_84 = ~var_84_arg_0; [L191] SORT_1 var_85_arg_0 = var_74; [L192] SORT_1 var_85_arg_1 = var_84; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85_arg_0=0, var_85_arg_1=-1] [L193] EXPR var_85_arg_0 & var_85_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0] [L193] SORT_1 var_85 = var_85_arg_0 & var_85_arg_1; [L194] SORT_1 var_86_arg_0 = var_85; [L195] SORT_1 var_86 = ~var_86_arg_0; [L196] SORT_11 var_14_arg_0 = state_12; [L197] SORT_13 var_14 = var_14_arg_0 >> 0; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L198] EXPR var_14 & mask_SORT_13 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L198] var_14 = var_14 & mask_SORT_13 [L199] SORT_13 var_56_arg_0 = var_14; [L200] SORT_1 var_56 = var_56_arg_0 != 0; [L201] SORT_1 var_57_arg_0 = var_56; [L202] SORT_1 var_57 = ~var_57_arg_0; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_57=-1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L203] EXPR var_57 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L203] var_57 = var_57 & mask_SORT_1 [L204] SORT_1 var_52_arg_0 = var_51; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_52_arg_0=1, var_57=0, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L205] EXPR var_52_arg_0 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_57=0, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L205] var_52_arg_0 = var_52_arg_0 & mask_SORT_1 [L206] SORT_13 var_52 = var_52_arg_0; [L207] SORT_13 var_53_arg_0 = var_14; [L208] SORT_13 var_53_arg_1 = var_52; [L209] SORT_1 var_53 = var_53_arg_0 == var_53_arg_1; [L210] SORT_40 var_47_arg_0 = var_46; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_47_arg_0=2, var_51=1, var_53=0, var_57=0, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L211] EXPR var_47_arg_0 & mask_SORT_40 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_53=0, var_57=0, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L211] var_47_arg_0 = var_47_arg_0 & mask_SORT_40 [L212] SORT_13 var_47 = var_47_arg_0; [L213] SORT_13 var_48_arg_0 = var_14; [L214] SORT_13 var_48_arg_1 = var_47; [L215] SORT_1 var_48 = var_48_arg_0 == var_48_arg_1; [L216] SORT_40 var_42_arg_0 = var_41; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_42_arg_0=3, var_46=2, var_48=0, var_51=1, var_53=0, var_57=0, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L217] EXPR var_42_arg_0 & mask_SORT_40 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_48=0, var_51=1, var_53=0, var_57=0, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L217] var_42_arg_0 = var_42_arg_0 & mask_SORT_40 [L218] SORT_13 var_42 = var_42_arg_0; [L219] SORT_13 var_43_arg_0 = var_14; [L220] SORT_13 var_43_arg_1 = var_42; [L221] SORT_1 var_43 = var_43_arg_0 == var_43_arg_1; [L222] SORT_19 var_36_arg_0 = var_35; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_36_arg_0=4, var_41=3, var_43=0, var_46=2, var_48=0, var_51=1, var_53=0, var_57=0, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L223] EXPR var_36_arg_0 & mask_SORT_19 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_43=0, var_46=2, var_48=0, var_51=1, var_53=0, var_57=0, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L223] var_36_arg_0 = var_36_arg_0 & mask_SORT_19 [L224] SORT_13 var_36 = var_36_arg_0; [L225] SORT_13 var_37_arg_0 = var_14; [L226] SORT_13 var_37_arg_1 = var_36; [L227] SORT_1 var_37 = var_37_arg_0 == var_37_arg_1; [L228] SORT_19 var_31_arg_0 = var_30; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_31_arg_0=5, var_35=4, var_37=0, var_41=3, var_43=0, var_46=2, var_48=0, var_51=1, var_53=0, var_57=0, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L229] EXPR var_31_arg_0 & mask_SORT_19 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_37=0, var_41=3, var_43=0, var_46=2, var_48=0, var_51=1, var_53=0, var_57=0, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L229] var_31_arg_0 = var_31_arg_0 & mask_SORT_19 [L230] SORT_13 var_31 = var_31_arg_0; [L231] SORT_13 var_32_arg_0 = var_14; [L232] SORT_13 var_32_arg_1 = var_31; [L233] SORT_1 var_32 = var_32_arg_0 == var_32_arg_1; [L234] SORT_19 var_26_arg_0 = var_25; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_26_arg_0=6, var_30=5, var_32=0, var_35=4, var_37=0, var_41=3, var_43=0, var_46=2, var_48=0, var_51=1, var_53=0, var_57=0, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L235] EXPR var_26_arg_0 & mask_SORT_19 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_32=0, var_35=4, var_37=0, var_41=3, var_43=0, var_46=2, var_48=0, var_51=1, var_53=0, var_57=0, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L235] var_26_arg_0 = var_26_arg_0 & mask_SORT_19 [L236] SORT_13 var_26 = var_26_arg_0; [L237] SORT_13 var_27_arg_0 = var_14; [L238] SORT_13 var_27_arg_1 = var_26; [L239] SORT_1 var_27 = var_27_arg_0 == var_27_arg_1; [L240] SORT_19 var_21_arg_0 = var_20; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_14=0, var_15=8, var_20=7, var_21_arg_0=7, var_25=6, var_268=0, var_27=0, var_30=5, var_32=0, var_35=4, var_37=0, var_41=3, var_43=0, var_46=2, var_48=0, var_51=1, var_53=0, var_57=0, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L241] EXPR var_21_arg_0 & mask_SORT_19 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_27=0, var_30=5, var_32=0, var_35=4, var_37=0, var_41=3, var_43=0, var_46=2, var_48=0, var_51=1, var_53=0, var_57=0, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L241] var_21_arg_0 = var_21_arg_0 & mask_SORT_19 [L242] SORT_13 var_21 = var_21_arg_0; [L243] SORT_13 var_22_arg_0 = var_14; [L244] SORT_13 var_22_arg_1 = var_21; [L245] SORT_1 var_22 = var_22_arg_0 == var_22_arg_1; [L246] SORT_13 var_16_arg_0 = var_14; [L247] SORT_13 var_16_arg_1 = var_15; [L248] SORT_1 var_16 = var_16_arg_0 == var_16_arg_1; [L249] SORT_1 var_17_arg_0 = var_16; [L250] SORT_3 var_17_arg_1 = state_10; [L251] SORT_3 var_17_arg_2 = input_9; [L252] SORT_3 var_17 = var_17_arg_0 ? var_17_arg_1 : var_17_arg_2; [L253] SORT_1 var_23_arg_0 = var_22; [L254] SORT_3 var_23_arg_1 = state_18; [L255] SORT_3 var_23_arg_2 = var_17; [L256] SORT_3 var_23 = var_23_arg_0 ? var_23_arg_1 : var_23_arg_2; [L257] SORT_1 var_28_arg_0 = var_27; [L258] SORT_3 var_28_arg_1 = state_24; [L259] SORT_3 var_28_arg_2 = var_23; [L260] SORT_3 var_28 = var_28_arg_0 ? var_28_arg_1 : var_28_arg_2; [L261] SORT_1 var_33_arg_0 = var_32; [L262] SORT_3 var_33_arg_1 = state_29; [L263] SORT_3 var_33_arg_2 = var_28; [L264] SORT_3 var_33 = var_33_arg_0 ? var_33_arg_1 : var_33_arg_2; [L265] SORT_1 var_38_arg_0 = var_37; [L266] SORT_3 var_38_arg_1 = state_34; [L267] SORT_3 var_38_arg_2 = var_33; [L268] SORT_3 var_38 = var_38_arg_0 ? var_38_arg_1 : var_38_arg_2; [L269] SORT_1 var_44_arg_0 = var_43; [L270] SORT_3 var_44_arg_1 = state_39; [L271] SORT_3 var_44_arg_2 = var_38; [L272] SORT_3 var_44 = var_44_arg_0 ? var_44_arg_1 : var_44_arg_2; [L273] SORT_1 var_49_arg_0 = var_48; [L274] SORT_3 var_49_arg_1 = state_45; [L275] SORT_3 var_49_arg_2 = var_44; [L276] SORT_3 var_49 = var_49_arg_0 ? var_49_arg_1 : var_49_arg_2; [L277] SORT_1 var_54_arg_0 = var_53; [L278] SORT_3 var_54_arg_1 = state_50; [L279] SORT_3 var_54_arg_2 = var_49; [L280] SORT_3 var_54 = var_54_arg_0 ? var_54_arg_1 : var_54_arg_2; [L281] SORT_1 var_58_arg_0 = var_57; [L282] SORT_3 var_58_arg_1 = state_55; [L283] SORT_3 var_58_arg_2 = var_54; [L284] SORT_3 var_58 = var_58_arg_0 ? var_58_arg_1 : var_58_arg_2; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_58=(((unsigned __int128) 18446744073709551615U << 64) | 18446744073709551615U), var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L285] EXPR var_58 & mask_SORT_3 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L285] var_58 = var_58 & mask_SORT_3 [L286] SORT_3 var_88_arg_0 = state_87; [L287] SORT_3 var_88_arg_1 = var_58; [L288] SORT_1 var_88 = var_88_arg_0 == var_88_arg_1; [L289] SORT_1 var_89_arg_0 = var_86; [L290] SORT_1 var_89_arg_1 = var_88; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0, var_89_arg_0=-1, var_89_arg_1=0] [L291] EXPR var_89_arg_0 | var_89_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L291] SORT_1 var_89 = var_89_arg_0 | var_89_arg_1; [L292] SORT_1 var_110_arg_0 = state_91; [L293] SORT_1 var_110_arg_1 = input_109; [L294] SORT_1 var_110_arg_2 = var_89; [L295] SORT_1 var_110 = var_110_arg_0 ? var_110_arg_1 : var_110_arg_2; [L296] SORT_1 var_113_arg_0 = var_110; [L297] SORT_1 var_113 = ~var_113_arg_0; [L298] SORT_1 var_114_arg_0 = var_112; [L299] SORT_1 var_114_arg_1 = var_113; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_114_arg_0=0, var_114_arg_1=-256, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L300] EXPR var_114_arg_0 & var_114_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L300] SORT_1 var_114 = var_114_arg_0 & var_114_arg_1; [L301] EXPR var_114 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L301] var_114 = var_114 & mask_SORT_1 [L302] SORT_1 bad_115_arg_0 = var_114; [L303] CALL __VERIFIER_assert(!(bad_115_arg_0)) [L22] COND FALSE !(!(cond)) [L303] RET __VERIFIER_assert(!(bad_115_arg_0)) [L305] SORT_11 var_137_arg_0 = state_136; [L306] SORT_13 var_137 = var_137_arg_0 >> 0; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L307] EXPR var_137 & mask_SORT_13 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L307] var_137 = var_137 & mask_SORT_13 [L308] SORT_13 var_194_arg_0 = var_137; [L309] SORT_13 var_194_arg_1 = var_15; [L310] SORT_1 var_194 = var_194_arg_0 == var_194_arg_1; [L311] SORT_1 var_195_arg_0 = input_6; [L312] SORT_1 var_195_arg_1 = var_194; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_137=0, var_15=8, var_195_arg_0=0, var_195_arg_1=0, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L313] EXPR var_195_arg_0 & var_195_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L313] SORT_1 var_195 = var_195_arg_0 & var_195_arg_1; [L314] EXPR var_195 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L314] var_195 = var_195 & mask_SORT_1 [L315] SORT_1 var_267_arg_0 = var_195; [L316] SORT_3 var_267_arg_1 = input_4; [L317] SORT_3 var_267_arg_2 = state_10; [L318] SORT_3 var_267 = var_267_arg_0 ? var_267_arg_1 : var_267_arg_2; [L319] SORT_1 var_269_arg_0 = input_7; [L320] SORT_3 var_269_arg_1 = var_268; [L321] SORT_3 var_269_arg_2 = var_267; [L322] SORT_3 var_269 = var_269_arg_0 ? var_269_arg_1 : var_269_arg_2; [L323] SORT_3 next_270_arg_1 = var_269; [L324] SORT_1 var_119_arg_0 = input_6; [L325] SORT_1 var_119_arg_1 = input_5; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_119_arg_0=0, var_119_arg_1=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L326] EXPR var_119_arg_0 | var_119_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L326] SORT_1 var_119 = var_119_arg_0 | var_119_arg_1; [L327] SORT_1 var_120_arg_0 = var_119; [L328] SORT_1 var_120_arg_1 = input_7; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120_arg_0=0, var_120_arg_1=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L329] EXPR var_120_arg_0 | var_120_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L329] SORT_1 var_120 = var_120_arg_0 | var_120_arg_1; [L330] EXPR var_120 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L330] var_120 = var_120 & mask_SORT_1 [L331] SORT_1 var_198_arg_0 = input_5; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_198_arg_0=0, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L332] EXPR var_198_arg_0 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L332] var_198_arg_0 = var_198_arg_0 & mask_SORT_1 [L333] SORT_11 var_198 = var_198_arg_0; [L334] SORT_11 var_199_arg_0 = state_12; [L335] SORT_11 var_199_arg_1 = var_198; [L336] SORT_11 var_199 = var_199_arg_0 + var_199_arg_1; [L337] SORT_1 var_271_arg_0 = var_120; [L338] SORT_11 var_271_arg_1 = var_199; [L339] SORT_11 var_271_arg_2 = state_12; [L340] SORT_11 var_271 = var_271_arg_0 ? var_271_arg_1 : var_271_arg_2; [L341] SORT_1 var_272_arg_0 = input_7; [L342] SORT_11 var_272_arg_1 = var_81; [L343] SORT_11 var_272_arg_2 = var_271; [L344] SORT_11 var_272 = var_272_arg_0 ? var_272_arg_1 : var_272_arg_2; [L345] SORT_11 next_273_arg_1 = var_272; [L346] SORT_19 var_187_arg_0 = var_20; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_187_arg_0=7, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L347] EXPR var_187_arg_0 & mask_SORT_19 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L347] var_187_arg_0 = var_187_arg_0 & mask_SORT_19 [L348] SORT_13 var_187 = var_187_arg_0; [L349] SORT_13 var_188_arg_0 = var_137; [L350] SORT_13 var_188_arg_1 = var_187; [L351] SORT_1 var_188 = var_188_arg_0 == var_188_arg_1; [L352] SORT_1 var_189_arg_0 = input_6; [L353] SORT_1 var_189_arg_1 = var_188; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_189_arg_0=0, var_189_arg_1=0, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L354] EXPR var_189_arg_0 & var_189_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L354] SORT_1 var_189 = var_189_arg_0 & var_189_arg_1; [L355] EXPR var_189 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L355] var_189 = var_189 & mask_SORT_1 [L356] SORT_1 var_274_arg_0 = var_189; [L357] SORT_3 var_274_arg_1 = input_4; [L358] SORT_3 var_274_arg_2 = state_18; [L359] SORT_3 var_274 = var_274_arg_0 ? var_274_arg_1 : var_274_arg_2; [L360] SORT_1 var_275_arg_0 = input_7; [L361] SORT_3 var_275_arg_1 = var_268; [L362] SORT_3 var_275_arg_2 = var_274; [L363] SORT_3 var_275 = var_275_arg_0 ? var_275_arg_1 : var_275_arg_2; [L364] SORT_3 next_276_arg_1 = var_275; [L365] SORT_19 var_180_arg_0 = var_25; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, state_136=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_180_arg_0=6, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L366] EXPR var_180_arg_0 & mask_SORT_19 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, state_136=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L366] var_180_arg_0 = var_180_arg_0 & mask_SORT_19 [L367] SORT_13 var_180 = var_180_arg_0; [L368] SORT_13 var_181_arg_0 = var_137; [L369] SORT_13 var_181_arg_1 = var_180; [L370] SORT_1 var_181 = var_181_arg_0 == var_181_arg_1; [L371] SORT_1 var_182_arg_0 = input_6; [L372] SORT_1 var_182_arg_1 = var_181; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, state_136=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_182_arg_0=0, var_182_arg_1=1, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L373] EXPR var_182_arg_0 & var_182_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, state_136=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L373] SORT_1 var_182 = var_182_arg_0 & var_182_arg_1; [L374] EXPR var_182 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, state_136=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L374] var_182 = var_182 & mask_SORT_1 [L375] SORT_1 var_277_arg_0 = var_182; [L376] SORT_3 var_277_arg_1 = input_4; [L377] SORT_3 var_277_arg_2 = state_24; [L378] SORT_3 var_277 = var_277_arg_0 ? var_277_arg_1 : var_277_arg_2; [L379] SORT_1 var_278_arg_0 = input_7; [L380] SORT_3 var_278_arg_1 = var_268; [L381] SORT_3 var_278_arg_2 = var_277; [L382] SORT_3 var_278 = var_278_arg_0 ? var_278_arg_1 : var_278_arg_2; [L383] SORT_3 next_279_arg_1 = var_278; [L384] SORT_19 var_173_arg_0 = var_30; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, state_136=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_173_arg_0=5, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L385] EXPR var_173_arg_0 & mask_SORT_19 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, state_136=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L385] var_173_arg_0 = var_173_arg_0 & mask_SORT_19 [L386] SORT_13 var_173 = var_173_arg_0; [L387] SORT_13 var_174_arg_0 = var_137; [L388] SORT_13 var_174_arg_1 = var_173; [L389] SORT_1 var_174 = var_174_arg_0 == var_174_arg_1; [L390] SORT_1 var_175_arg_0 = input_6; [L391] SORT_1 var_175_arg_1 = var_174; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, state_136=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_175_arg_0=0, var_175_arg_1=0, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L392] EXPR var_175_arg_0 & var_175_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, state_136=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L392] SORT_1 var_175 = var_175_arg_0 & var_175_arg_1; [L393] EXPR var_175 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, state_136=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L393] var_175 = var_175 & mask_SORT_1 [L394] SORT_1 var_280_arg_0 = var_175; [L395] SORT_3 var_280_arg_1 = input_4; [L396] SORT_3 var_280_arg_2 = state_29; [L397] SORT_3 var_280 = var_280_arg_0 ? var_280_arg_1 : var_280_arg_2; [L398] SORT_1 var_281_arg_0 = input_7; [L399] SORT_3 var_281_arg_1 = var_268; [L400] SORT_3 var_281_arg_2 = var_280; [L401] SORT_3 var_281 = var_281_arg_0 ? var_281_arg_1 : var_281_arg_2; [L402] SORT_3 next_282_arg_1 = var_281; [L403] SORT_19 var_166_arg_0 = var_35; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, state_136=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_166_arg_0=4, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L404] EXPR var_166_arg_0 & mask_SORT_19 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, state_136=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L404] var_166_arg_0 = var_166_arg_0 & mask_SORT_19 [L405] SORT_13 var_166 = var_166_arg_0; [L406] SORT_13 var_167_arg_0 = var_137; [L407] SORT_13 var_167_arg_1 = var_166; [L408] SORT_1 var_167 = var_167_arg_0 == var_167_arg_1; [L409] SORT_1 var_168_arg_0 = input_6; [L410] SORT_1 var_168_arg_1 = var_167; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, state_136=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_168_arg_0=0, var_168_arg_1=0, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L411] EXPR var_168_arg_0 & var_168_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, state_136=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L411] SORT_1 var_168 = var_168_arg_0 & var_168_arg_1; [L412] EXPR var_168 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, state_136=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L412] var_168 = var_168 & mask_SORT_1 [L413] SORT_1 var_283_arg_0 = var_168; [L414] SORT_3 var_283_arg_1 = input_4; [L415] SORT_3 var_283_arg_2 = state_34; [L416] SORT_3 var_283 = var_283_arg_0 ? var_283_arg_1 : var_283_arg_2; [L417] SORT_1 var_284_arg_0 = input_7; [L418] SORT_3 var_284_arg_1 = var_268; [L419] SORT_3 var_284_arg_2 = var_283; [L420] SORT_3 var_284 = var_284_arg_0 ? var_284_arg_1 : var_284_arg_2; [L421] SORT_3 next_285_arg_1 = var_284; [L422] SORT_40 var_159_arg_0 = var_41; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, state_136=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_159_arg_0=3, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L423] EXPR var_159_arg_0 & mask_SORT_40 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, state_136=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L423] var_159_arg_0 = var_159_arg_0 & mask_SORT_40 [L424] SORT_13 var_159 = var_159_arg_0; [L425] SORT_13 var_160_arg_0 = var_137; [L426] SORT_13 var_160_arg_1 = var_159; [L427] SORT_1 var_160 = var_160_arg_0 == var_160_arg_1; [L428] SORT_1 var_161_arg_0 = input_6; [L429] SORT_1 var_161_arg_1 = var_160; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, state_136=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_161_arg_0=0, var_161_arg_1=0, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L430] EXPR var_161_arg_0 & var_161_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, state_136=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L430] SORT_1 var_161 = var_161_arg_0 & var_161_arg_1; [L431] EXPR var_161 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, state_136=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L431] var_161 = var_161 & mask_SORT_1 [L432] SORT_1 var_286_arg_0 = var_161; [L433] SORT_3 var_286_arg_1 = input_4; [L434] SORT_3 var_286_arg_2 = state_39; [L435] SORT_3 var_286 = var_286_arg_0 ? var_286_arg_1 : var_286_arg_2; [L436] SORT_1 var_287_arg_0 = input_7; [L437] SORT_3 var_287_arg_1 = var_268; [L438] SORT_3 var_287_arg_2 = var_286; [L439] SORT_3 var_287 = var_287_arg_0 ? var_287_arg_1 : var_287_arg_2; [L440] SORT_3 next_288_arg_1 = var_287; [L441] SORT_40 var_152_arg_0 = var_46; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, state_136=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_152_arg_0=2, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L442] EXPR var_152_arg_0 & mask_SORT_40 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, state_136=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L442] var_152_arg_0 = var_152_arg_0 & mask_SORT_40 [L443] SORT_13 var_152 = var_152_arg_0; [L444] SORT_13 var_153_arg_0 = var_137; [L445] SORT_13 var_153_arg_1 = var_152; [L446] SORT_1 var_153 = var_153_arg_0 == var_153_arg_1; [L447] SORT_1 var_154_arg_0 = input_6; [L448] SORT_1 var_154_arg_1 = var_153; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, state_136=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_154_arg_0=0, var_154_arg_1=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L449] EXPR var_154_arg_0 & var_154_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, state_136=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L449] SORT_1 var_154 = var_154_arg_0 & var_154_arg_1; [L450] EXPR var_154 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, state_136=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L450] var_154 = var_154 & mask_SORT_1 [L451] SORT_1 var_289_arg_0 = var_154; [L452] SORT_3 var_289_arg_1 = input_4; [L453] SORT_3 var_289_arg_2 = state_45; [L454] SORT_3 var_289 = var_289_arg_0 ? var_289_arg_1 : var_289_arg_2; [L455] SORT_1 var_290_arg_0 = input_7; [L456] SORT_3 var_290_arg_1 = var_268; [L457] SORT_3 var_290_arg_2 = var_289; [L458] SORT_3 var_290 = var_290_arg_0 ? var_290_arg_1 : var_290_arg_2; [L459] SORT_3 next_291_arg_1 = var_290; [L460] SORT_1 var_145_arg_0 = var_51; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, state_136=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_145_arg_0=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L461] EXPR var_145_arg_0 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, state_136=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L461] var_145_arg_0 = var_145_arg_0 & mask_SORT_1 [L462] SORT_13 var_145 = var_145_arg_0; [L463] SORT_13 var_146_arg_0 = var_137; [L464] SORT_13 var_146_arg_1 = var_145; [L465] SORT_1 var_146 = var_146_arg_0 == var_146_arg_1; [L466] SORT_1 var_147_arg_0 = input_6; [L467] SORT_1 var_147_arg_1 = var_146; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, state_136=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_147_arg_0=0, var_147_arg_1=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L468] EXPR var_147_arg_0 & var_147_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, state_136=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L468] SORT_1 var_147 = var_147_arg_0 & var_147_arg_1; [L469] EXPR var_147 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, state_136=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L469] var_147 = var_147 & mask_SORT_1 [L470] SORT_1 var_292_arg_0 = var_147; [L471] SORT_3 var_292_arg_1 = input_4; [L472] SORT_3 var_292_arg_2 = state_50; [L473] SORT_3 var_292 = var_292_arg_0 ? var_292_arg_1 : var_292_arg_2; [L474] SORT_1 var_293_arg_0 = input_7; [L475] SORT_3 var_293_arg_1 = var_268; [L476] SORT_3 var_293_arg_2 = var_292; [L477] SORT_3 var_293 = var_293_arg_0 ? var_293_arg_1 : var_293_arg_2; [L478] SORT_3 next_294_arg_1 = var_293; [L479] SORT_13 var_138_arg_0 = var_137; [L480] SORT_1 var_138 = var_138_arg_0 != 0; [L481] SORT_1 var_139_arg_0 = var_138; [L482] SORT_1 var_139 = ~var_139_arg_0; [L483] SORT_1 var_140_arg_0 = input_6; [L484] SORT_1 var_140_arg_1 = var_139; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, state_136=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_140_arg_0=0, var_140_arg_1=-1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L485] EXPR var_140_arg_0 & var_140_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, state_136=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L485] SORT_1 var_140 = var_140_arg_0 & var_140_arg_1; [L486] EXPR var_140 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, state_136=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L486] var_140 = var_140 & mask_SORT_1 [L487] SORT_1 var_295_arg_0 = var_140; [L488] SORT_3 var_295_arg_1 = input_4; [L489] SORT_3 var_295_arg_2 = state_55; [L490] SORT_3 var_295 = var_295_arg_0 ? var_295_arg_1 : var_295_arg_2; [L491] SORT_1 var_296_arg_0 = input_7; [L492] SORT_3 var_296_arg_1 = var_268; [L493] SORT_3 var_296_arg_2 = var_295; [L494] SORT_3 var_296 = var_296_arg_0 ? var_296_arg_1 : var_296_arg_2; [L495] SORT_3 next_297_arg_1 = var_296; [L496] SORT_1 var_298_arg_0 = input_6; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, state_136=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_25=6, var_268=0, var_298_arg_0=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L497] EXPR var_298_arg_0 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, state_136=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L497] var_298_arg_0 = var_298_arg_0 & mask_SORT_1 [L498] SORT_11 var_298 = var_298_arg_0; [L499] SORT_11 var_299_arg_0 = state_60; [L500] SORT_11 var_299_arg_1 = var_298; [L501] SORT_11 var_299 = var_299_arg_0 + var_299_arg_1; [L502] SORT_1 var_300_arg_0 = input_5; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, state_136=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_25=6, var_268=0, var_299=0, var_300_arg_0=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L503] EXPR var_300_arg_0 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, state_136=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_25=6, var_268=0, var_299=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L503] var_300_arg_0 = var_300_arg_0 & mask_SORT_1 [L504] SORT_11 var_300 = var_300_arg_0; [L505] SORT_11 var_301_arg_0 = var_299; [L506] SORT_11 var_301_arg_1 = var_300; [L507] SORT_11 var_301 = var_301_arg_0 - var_301_arg_1; [L508] SORT_1 var_302_arg_0 = input_7; [L509] SORT_11 var_302_arg_1 = var_81; [L510] SORT_11 var_302_arg_2 = var_301; [L511] SORT_11 var_302 = var_302_arg_0 ? var_302_arg_1 : var_302_arg_2; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, state_136=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_25=6, var_268=0, var_302=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L512] EXPR var_302 & mask_SORT_11 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, state_136=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L512] var_302 = var_302 & mask_SORT_11 [L513] SORT_11 next_303_arg_1 = var_302; [L514] SORT_1 var_228_arg_0 = state_68; [L515] SORT_1 var_228 = ~var_228_arg_0; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, state_136=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_228=-1, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L516] EXPR var_228 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, state_136=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L516] var_228 = var_228 & mask_SORT_1 [L517] SORT_1 var_224_arg_0 = input_8; [L518] SORT_1 var_224_arg_1 = input_6; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, state_136=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_224_arg_0=0, var_224_arg_1=0, var_228=0, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L519] EXPR var_224_arg_0 & var_224_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, state_136=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_228=0, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L519] SORT_1 var_224 = var_224_arg_0 & var_224_arg_1; [L520] SORT_1 var_225_arg_0 = state_68; [L521] SORT_1 var_225_arg_1 = var_224; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, state_136=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_224=0, var_225_arg_0=0, var_225_arg_1=0, var_228=0, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L522] EXPR var_225_arg_0 | var_225_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, state_136=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_224=0, var_228=0, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L522] SORT_1 var_225 = var_225_arg_0 | var_225_arg_1; [L523] SORT_1 var_304_arg_0 = var_228; [L524] SORT_1 var_304_arg_1 = var_225; [L525] SORT_1 var_304_arg_2 = state_68; [L526] SORT_1 var_304 = var_304_arg_0 ? var_304_arg_1 : var_304_arg_2; [L527] SORT_1 var_305_arg_0 = input_7; [L528] SORT_1 var_305_arg_1 = var_111; [L529] SORT_1 var_305_arg_2 = var_304; [L530] SORT_1 var_305 = var_305_arg_0 ? var_305_arg_1 : var_305_arg_2; [L531] SORT_1 next_306_arg_1 = var_305; [L532] SORT_1 var_236_arg_0 = var_85; [L533] SORT_1 var_236_arg_1 = state_69; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, next_306_arg_1=0, state_136=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_224=0, var_228=0, var_236_arg_0=0, var_236_arg_1=0, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0] [L534] EXPR var_236_arg_0 | var_236_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, next_306_arg_1=0, state_136=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_224=0, var_228=0, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0] [L534] SORT_1 var_236 = var_236_arg_0 | var_236_arg_1; [L535] SORT_1 var_307_arg_0 = var_51; [L536] SORT_1 var_307_arg_1 = var_236; [L537] SORT_1 var_307_arg_2 = state_69; [L538] SORT_1 var_307 = var_307_arg_0 ? var_307_arg_1 : var_307_arg_2; [L539] SORT_1 var_308_arg_0 = input_7; [L540] SORT_1 var_308_arg_1 = var_111; [L541] SORT_1 var_308_arg_2 = var_307; [L542] SORT_1 var_308 = var_308_arg_0 ? var_308_arg_1 : var_308_arg_2; [L543] SORT_1 next_309_arg_1 = var_308; [L544] SORT_1 var_248_arg_0 = input_6; [L545] SORT_1 var_248_arg_1 = input_5; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, next_306_arg_1=0, next_309_arg_1=0, state_136=0, state_68=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_224=0, var_228=0, var_248_arg_0=0, var_248_arg_1=0, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0] [L546] EXPR var_248_arg_0 | var_248_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, next_306_arg_1=0, next_309_arg_1=0, state_136=0, state_68=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_224=0, var_228=0, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0] [L546] SORT_1 var_248 = var_248_arg_0 | var_248_arg_1; [L547] SORT_1 var_249_arg_0 = var_248; [L548] SORT_1 var_249_arg_1 = input_7; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, next_306_arg_1=0, next_309_arg_1=0, state_136=0, state_68=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_224=0, var_228=0, var_249_arg_0=0, var_249_arg_1=0, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0] [L549] EXPR var_249_arg_0 | var_249_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, next_306_arg_1=0, next_309_arg_1=0, state_136=0, state_68=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_224=0, var_228=0, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0] [L549] SORT_1 var_249 = var_249_arg_0 | var_249_arg_1; [L550] SORT_1 var_250_arg_0 = var_249; [L551] SORT_1 var_250_arg_1 = state_68; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, next_306_arg_1=0, next_309_arg_1=0, state_136=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_224=0, var_228=0, var_250_arg_0=0, var_250_arg_1=0, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0] [L552] EXPR var_250_arg_0 | var_250_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, next_306_arg_1=0, next_309_arg_1=0, state_136=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_224=0, var_228=0, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0] [L552] SORT_1 var_250 = var_250_arg_0 | var_250_arg_1; [L553] EXPR var_250 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, next_306_arg_1=0, next_309_arg_1=0, state_136=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_224=0, var_228=0, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0] [L553] var_250 = var_250 & mask_SORT_1 [L554] SORT_1 var_310_arg_0 = var_250; [L555] SORT_11 var_310_arg_1 = var_82; [L556] SORT_11 var_310_arg_2 = state_72; [L557] SORT_11 var_310 = var_310_arg_0 ? var_310_arg_1 : var_310_arg_2; [L558] SORT_1 var_311_arg_0 = input_7; [L559] SORT_11 var_311_arg_1 = var_81; [L560] SORT_11 var_311_arg_2 = var_310; [L561] SORT_11 var_311 = var_311_arg_0 ? var_311_arg_1 : var_311_arg_2; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, next_306_arg_1=0, next_309_arg_1=0, state_136=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_224=0, var_228=0, var_25=6, var_268=0, var_30=5, var_311=0, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L562] EXPR var_311 & mask_SORT_11 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, next_306_arg_1=0, next_309_arg_1=0, state_136=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_224=0, var_228=0, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L562] var_311 = var_311 & mask_SORT_11 [L563] SORT_11 next_312_arg_1 = var_311; [L564] SORT_1 var_233_arg_0 = var_224; [L565] SORT_1 var_233_arg_1 = var_228; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, next_306_arg_1=0, next_309_arg_1=0, next_312_arg_1=0, state_136=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_233_arg_0=0, var_233_arg_1=0, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L566] EXPR var_233_arg_0 & var_233_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, next_306_arg_1=0, next_309_arg_1=0, next_312_arg_1=0, state_136=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L566] SORT_1 var_233 = var_233_arg_0 & var_233_arg_1; [L567] EXPR var_233 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, next_306_arg_1=0, next_309_arg_1=0, next_312_arg_1=0, state_136=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L567] var_233 = var_233 & mask_SORT_1 [L568] SORT_1 var_313_arg_0 = var_233; [L569] SORT_3 var_313_arg_1 = input_4; [L570] SORT_3 var_313_arg_2 = state_87; [L571] SORT_3 var_313 = var_313_arg_0 ? var_313_arg_1 : var_313_arg_2; [L572] SORT_1 var_314_arg_0 = input_7; [L573] SORT_3 var_314_arg_1 = var_268; [L574] SORT_3 var_314_arg_2 = var_313; [L575] SORT_3 var_314 = var_314_arg_0 ? var_314_arg_1 : var_314_arg_2; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, next_306_arg_1=0, next_309_arg_1=0, next_312_arg_1=0, state_136=0, var_111=0, var_120=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_314=0, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L576] EXPR var_314 & mask_SORT_3 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, next_306_arg_1=0, next_309_arg_1=0, next_312_arg_1=0, state_136=0, var_111=0, var_120=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L576] var_314 = var_314 & mask_SORT_3 [L577] SORT_3 next_315_arg_1 = var_314; [L578] SORT_1 next_316_arg_1 = var_111; [L579] SORT_1 var_204_arg_0 = input_6; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, next_306_arg_1=0, next_309_arg_1=0, next_312_arg_1=0, next_315_arg_1=0, next_316_arg_1=0, state_136=0, var_111=0, var_120=0, var_15=8, var_204_arg_0=0, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L580] EXPR var_204_arg_0 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, next_306_arg_1=0, next_309_arg_1=0, next_312_arg_1=0, next_315_arg_1=0, next_316_arg_1=0, state_136=0, var_111=0, var_120=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L580] var_204_arg_0 = var_204_arg_0 & mask_SORT_1 [L581] SORT_11 var_204 = var_204_arg_0; [L582] SORT_11 var_205_arg_0 = state_136; [L583] SORT_11 var_205_arg_1 = var_204; [L584] SORT_11 var_205 = var_205_arg_0 + var_205_arg_1; [L585] SORT_1 var_317_arg_0 = var_120; [L586] SORT_11 var_317_arg_1 = var_205; [L587] SORT_11 var_317_arg_2 = state_136; [L588] SORT_11 var_317 = var_317_arg_0 ? var_317_arg_1 : var_317_arg_2; [L589] SORT_1 var_318_arg_0 = input_7; [L590] SORT_11 var_318_arg_1 = var_81; [L591] SORT_11 var_318_arg_2 = var_317; [L592] SORT_11 var_318 = var_318_arg_0 ? var_318_arg_1 : var_318_arg_2; [L593] SORT_11 next_319_arg_1 = var_318; [L595] state_10 = next_270_arg_1 [L596] state_12 = next_273_arg_1 [L597] state_18 = next_276_arg_1 [L598] state_24 = next_279_arg_1 [L599] state_29 = next_282_arg_1 [L600] state_34 = next_285_arg_1 [L601] state_39 = next_288_arg_1 [L602] state_45 = next_291_arg_1 [L603] state_50 = next_294_arg_1 [L604] state_55 = next_297_arg_1 [L605] state_60 = next_303_arg_1 [L606] state_68 = next_306_arg_1 [L607] state_69 = next_309_arg_1 [L608] state_72 = next_312_arg_1 [L609] state_87 = next_315_arg_1 [L610] state_91 = next_316_arg_1 [L611] state_136 = next_319_arg_1 [L89] input_2 = __VERIFIER_nondet_uchar() [L90] input_4 = __VERIFIER_nondet_uint128() [L91] input_5 = __VERIFIER_nondet_uchar() [L92] input_6 = __VERIFIER_nondet_uchar() [L93] input_7 = __VERIFIER_nondet_uchar() [L94] EXPR input_7 & mask_SORT_1 VAL [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L94] input_7 = input_7 & mask_SORT_1 [L95] input_8 = __VERIFIER_nondet_uchar() [L96] input_9 = __VERIFIER_nondet_uint128() [L97] input_109 = __VERIFIER_nondet_uchar() [L99] SORT_1 var_93_arg_0 = input_7; [L100] SORT_1 var_93_arg_1 = state_91; [L101] SORT_1 var_93 = var_93_arg_0 == var_93_arg_1; [L102] SORT_1 var_94_arg_0 = var_51; [L103] SORT_1 var_94 = ~var_94_arg_0; [L104] SORT_1 var_95_arg_0 = var_93; [L105] SORT_1 var_95_arg_1 = var_94; VAL [input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_95_arg_0=0, var_95_arg_1=-2] [L106] EXPR var_95_arg_0 | var_95_arg_1 VAL [input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L106] SORT_1 var_95 = var_95_arg_0 | var_95_arg_1; [L107] EXPR var_95 & mask_SORT_1 VAL [input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L107] var_95 = var_95 & mask_SORT_1 [L108] SORT_1 constr_96_arg_0 = var_95; VAL [constr_96_arg_0=1, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L109] CALL assume_abort_if_not(constr_96_arg_0) VAL [\old(cond)=1] [L23] COND FALSE !(!cond) VAL [\old(cond)=1] [L109] RET assume_abort_if_not(constr_96_arg_0) VAL [constr_96_arg_0=1, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L110] SORT_13 var_65_arg_0 = var_64; VAL [constr_96_arg_0=1, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_65_arg_0=9, var_81=0] [L111] EXPR var_65_arg_0 & mask_SORT_13 VAL [constr_96_arg_0=1, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L111] var_65_arg_0 = var_65_arg_0 & mask_SORT_13 [L112] SORT_11 var_65 = var_65_arg_0; [L113] SORT_11 var_66_arg_0 = state_60; [L114] SORT_11 var_66_arg_1 = var_65; [L115] SORT_1 var_66 = var_66_arg_0 == var_66_arg_1; [L116] SORT_1 var_97_arg_0 = var_66; [L117] SORT_1 var_97 = ~var_97_arg_0; [L118] SORT_1 var_98_arg_0 = input_6; [L119] SORT_1 var_98 = ~var_98_arg_0; [L120] SORT_1 var_99_arg_0 = var_97; [L121] SORT_1 var_99_arg_1 = var_98; VAL [constr_96_arg_0=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_99_arg_0=-1, var_99_arg_1=-1] [L122] EXPR var_99_arg_0 | var_99_arg_1 VAL [constr_96_arg_0=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L122] SORT_1 var_99 = var_99_arg_0 | var_99_arg_1; [L123] SORT_1 var_100_arg_0 = var_51; [L124] SORT_1 var_100 = ~var_100_arg_0; [L125] SORT_1 var_101_arg_0 = var_99; [L126] SORT_1 var_101_arg_1 = var_100; VAL [constr_96_arg_0=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_101_arg_0=255, var_101_arg_1=-2, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L127] EXPR var_101_arg_0 | var_101_arg_1 VAL [constr_96_arg_0=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L127] SORT_1 var_101 = var_101_arg_0 | var_101_arg_1; [L128] EXPR var_101 & mask_SORT_1 VAL [constr_96_arg_0=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L128] var_101 = var_101 & mask_SORT_1 [L129] SORT_1 constr_102_arg_0 = var_101; VAL [constr_102_arg_0=1, constr_96_arg_0=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L130] CALL assume_abort_if_not(constr_102_arg_0) VAL [\old(cond)=1] [L23] COND FALSE !(!cond) VAL [\old(cond)=1] [L130] RET assume_abort_if_not(constr_102_arg_0) VAL [constr_102_arg_0=1, constr_96_arg_0=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L131] SORT_11 var_61_arg_0 = state_60; [L132] SORT_1 var_61 = var_61_arg_0 != 0; [L133] SORT_1 var_62_arg_0 = var_61; [L134] SORT_1 var_62 = ~var_62_arg_0; [L135] SORT_1 var_103_arg_0 = var_62; [L136] SORT_1 var_103 = ~var_103_arg_0; [L137] SORT_1 var_104_arg_0 = input_5; [L138] SORT_1 var_104 = ~var_104_arg_0; [L139] SORT_1 var_105_arg_0 = var_103; [L140] SORT_1 var_105_arg_1 = var_104; VAL [constr_102_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_105_arg_0=-256, var_105_arg_1=-2, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L141] EXPR var_105_arg_0 | var_105_arg_1 VAL [constr_102_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L141] SORT_1 var_105 = var_105_arg_0 | var_105_arg_1; [L142] SORT_1 var_106_arg_0 = var_51; [L143] SORT_1 var_106 = ~var_106_arg_0; [L144] SORT_1 var_107_arg_0 = var_105; [L145] SORT_1 var_107_arg_1 = var_106; VAL [constr_102_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_107_arg_0=254, var_107_arg_1=-2, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L146] EXPR var_107_arg_0 | var_107_arg_1 VAL [constr_102_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L146] SORT_1 var_107 = var_107_arg_0 | var_107_arg_1; [L147] EXPR var_107 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L147] var_107 = var_107 & mask_SORT_1 [L148] SORT_1 constr_108_arg_0 = var_107; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L149] CALL assume_abort_if_not(constr_108_arg_0) VAL [\old(cond)=1] [L23] COND FALSE !(!cond) VAL [\old(cond)=1] [L149] RET assume_abort_if_not(constr_108_arg_0) VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L151] SORT_1 var_112_arg_0 = state_91; [L152] SORT_1 var_112_arg_1 = var_111; [L153] SORT_1 var_112_arg_2 = var_51; [L154] SORT_1 var_112 = var_112_arg_0 ? var_112_arg_1 : var_112_arg_2; [L155] SORT_1 var_70_arg_0 = state_69; [L156] SORT_1 var_70 = ~var_70_arg_0; [L157] SORT_1 var_71_arg_0 = state_68; [L158] SORT_1 var_71_arg_1 = var_70; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_71_arg_0=0, var_71_arg_1=-1, var_81=0] [L159] EXPR var_71_arg_0 & var_71_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L159] SORT_1 var_71 = var_71_arg_0 & var_71_arg_1; [L160] SORT_11 var_73_arg_0 = state_72; [L161] SORT_1 var_73 = var_73_arg_0 != 0; [L162] SORT_1 var_74_arg_0 = var_71; [L163] SORT_1 var_74_arg_1 = var_73; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_74_arg_0=0, var_74_arg_1=0, var_81=0] [L164] EXPR var_74_arg_0 & var_74_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L164] SORT_1 var_74 = var_74_arg_0 & var_74_arg_1; [L165] SORT_1 var_75_arg_0 = state_68; [L166] SORT_1 var_75 = ~var_75_arg_0; [L167] SORT_1 var_76_arg_0 = input_6; [L168] SORT_1 var_76_arg_1 = var_75; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_74=0, var_76_arg_0=0, var_76_arg_1=-1, var_81=0] [L169] EXPR var_76_arg_0 & var_76_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_74=0, var_81=0] [L169] SORT_1 var_76 = var_76_arg_0 & var_76_arg_1; [L170] SORT_1 var_77_arg_0 = var_76; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_74=0, var_77_arg_0=0, var_81=0] [L171] EXPR var_77_arg_0 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_74=0, var_81=0] [L171] var_77_arg_0 = var_77_arg_0 & mask_SORT_1 [L172] SORT_11 var_77 = var_77_arg_0; [L173] SORT_11 var_78_arg_0 = state_72; [L174] SORT_11 var_78_arg_1 = var_77; [L175] SORT_11 var_78 = var_78_arg_0 + var_78_arg_1; [L176] SORT_1 var_79_arg_0 = input_5; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_74=0, var_78=0, var_79_arg_0=1, var_81=0] [L177] EXPR var_79_arg_0 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_74=0, var_78=0, var_81=0] [L177] var_79_arg_0 = var_79_arg_0 & mask_SORT_1 [L178] SORT_11 var_79 = var_79_arg_0; [L179] SORT_11 var_80_arg_0 = var_78; [L180] SORT_11 var_80_arg_1 = var_79; [L181] SORT_11 var_80 = var_80_arg_0 - var_80_arg_1; [L182] SORT_1 var_82_arg_0 = input_7; [L183] SORT_11 var_82_arg_1 = var_81; [L184] SORT_11 var_82_arg_2 = var_80; [L185] SORT_11 var_82 = var_82_arg_0 ? var_82_arg_1 : var_82_arg_2; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_74=0, var_81=0, var_82=0] [L186] EXPR var_82 & mask_SORT_11 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_74=0, var_81=0] [L186] var_82 = var_82 & mask_SORT_11 [L187] SORT_11 var_83_arg_0 = var_82; [L188] SORT_1 var_83 = var_83_arg_0 != 0; [L189] SORT_1 var_84_arg_0 = var_83; [L190] SORT_1 var_84 = ~var_84_arg_0; [L191] SORT_1 var_85_arg_0 = var_74; [L192] SORT_1 var_85_arg_1 = var_84; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85_arg_0=0, var_85_arg_1=-1] [L193] EXPR var_85_arg_0 & var_85_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0] [L193] SORT_1 var_85 = var_85_arg_0 & var_85_arg_1; [L194] SORT_1 var_86_arg_0 = var_85; [L195] SORT_1 var_86 = ~var_86_arg_0; [L196] SORT_11 var_14_arg_0 = state_12; [L197] SORT_13 var_14 = var_14_arg_0 >> 0; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L198] EXPR var_14 & mask_SORT_13 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L198] var_14 = var_14 & mask_SORT_13 [L199] SORT_13 var_56_arg_0 = var_14; [L200] SORT_1 var_56 = var_56_arg_0 != 0; [L201] SORT_1 var_57_arg_0 = var_56; [L202] SORT_1 var_57 = ~var_57_arg_0; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_57=-1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L203] EXPR var_57 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L203] var_57 = var_57 & mask_SORT_1 [L204] SORT_1 var_52_arg_0 = var_51; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_52_arg_0=1, var_57=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L205] EXPR var_52_arg_0 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_57=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L205] var_52_arg_0 = var_52_arg_0 & mask_SORT_1 [L206] SORT_13 var_52 = var_52_arg_0; [L207] SORT_13 var_53_arg_0 = var_14; [L208] SORT_13 var_53_arg_1 = var_52; [L209] SORT_1 var_53 = var_53_arg_0 == var_53_arg_1; [L210] SORT_40 var_47_arg_0 = var_46; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_47_arg_0=2, var_51=1, var_53=0, var_57=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L211] EXPR var_47_arg_0 & mask_SORT_40 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_53=0, var_57=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L211] var_47_arg_0 = var_47_arg_0 & mask_SORT_40 [L212] SORT_13 var_47 = var_47_arg_0; [L213] SORT_13 var_48_arg_0 = var_14; [L214] SORT_13 var_48_arg_1 = var_47; [L215] SORT_1 var_48 = var_48_arg_0 == var_48_arg_1; [L216] SORT_40 var_42_arg_0 = var_41; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_42_arg_0=3, var_46=2, var_48=0, var_51=1, var_53=0, var_57=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L217] EXPR var_42_arg_0 & mask_SORT_40 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_48=0, var_51=1, var_53=0, var_57=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L217] var_42_arg_0 = var_42_arg_0 & mask_SORT_40 [L218] SORT_13 var_42 = var_42_arg_0; [L219] SORT_13 var_43_arg_0 = var_14; [L220] SORT_13 var_43_arg_1 = var_42; [L221] SORT_1 var_43 = var_43_arg_0 == var_43_arg_1; [L222] SORT_19 var_36_arg_0 = var_35; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_36_arg_0=4, var_41=3, var_43=0, var_46=2, var_48=0, var_51=1, var_53=0, var_57=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L223] EXPR var_36_arg_0 & mask_SORT_19 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_43=0, var_46=2, var_48=0, var_51=1, var_53=0, var_57=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L223] var_36_arg_0 = var_36_arg_0 & mask_SORT_19 [L224] SORT_13 var_36 = var_36_arg_0; [L225] SORT_13 var_37_arg_0 = var_14; [L226] SORT_13 var_37_arg_1 = var_36; [L227] SORT_1 var_37 = var_37_arg_0 == var_37_arg_1; [L228] SORT_19 var_31_arg_0 = var_30; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_31_arg_0=5, var_35=4, var_37=0, var_41=3, var_43=0, var_46=2, var_48=0, var_51=1, var_53=0, var_57=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L229] EXPR var_31_arg_0 & mask_SORT_19 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_37=0, var_41=3, var_43=0, var_46=2, var_48=0, var_51=1, var_53=0, var_57=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L229] var_31_arg_0 = var_31_arg_0 & mask_SORT_19 [L230] SORT_13 var_31 = var_31_arg_0; [L231] SORT_13 var_32_arg_0 = var_14; [L232] SORT_13 var_32_arg_1 = var_31; [L233] SORT_1 var_32 = var_32_arg_0 == var_32_arg_1; [L234] SORT_19 var_26_arg_0 = var_25; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_26_arg_0=6, var_30=5, var_32=1, var_35=4, var_37=0, var_41=3, var_43=0, var_46=2, var_48=0, var_51=1, var_53=0, var_57=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L235] EXPR var_26_arg_0 & mask_SORT_19 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_32=1, var_35=4, var_37=0, var_41=3, var_43=0, var_46=2, var_48=0, var_51=1, var_53=0, var_57=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L235] var_26_arg_0 = var_26_arg_0 & mask_SORT_19 [L236] SORT_13 var_26 = var_26_arg_0; [L237] SORT_13 var_27_arg_0 = var_14; [L238] SORT_13 var_27_arg_1 = var_26; [L239] SORT_1 var_27 = var_27_arg_0 == var_27_arg_1; [L240] SORT_19 var_21_arg_0 = var_20; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_14=0, var_15=8, var_20=7, var_21_arg_0=7, var_25=6, var_268=0, var_27=1, var_30=5, var_32=1, var_35=4, var_37=0, var_41=3, var_43=0, var_46=2, var_48=0, var_51=1, var_53=0, var_57=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L241] EXPR var_21_arg_0 & mask_SORT_19 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_27=1, var_30=5, var_32=1, var_35=4, var_37=0, var_41=3, var_43=0, var_46=2, var_48=0, var_51=1, var_53=0, var_57=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L241] var_21_arg_0 = var_21_arg_0 & mask_SORT_19 [L242] SORT_13 var_21 = var_21_arg_0; [L243] SORT_13 var_22_arg_0 = var_14; [L244] SORT_13 var_22_arg_1 = var_21; [L245] SORT_1 var_22 = var_22_arg_0 == var_22_arg_1; [L246] SORT_13 var_16_arg_0 = var_14; [L247] SORT_13 var_16_arg_1 = var_15; [L248] SORT_1 var_16 = var_16_arg_0 == var_16_arg_1; [L249] SORT_1 var_17_arg_0 = var_16; [L250] SORT_3 var_17_arg_1 = state_10; [L251] SORT_3 var_17_arg_2 = input_9; [L252] SORT_3 var_17 = var_17_arg_0 ? var_17_arg_1 : var_17_arg_2; [L253] SORT_1 var_23_arg_0 = var_22; [L254] SORT_3 var_23_arg_1 = state_18; [L255] SORT_3 var_23_arg_2 = var_17; [L256] SORT_3 var_23 = var_23_arg_0 ? var_23_arg_1 : var_23_arg_2; [L257] SORT_1 var_28_arg_0 = var_27; [L258] SORT_3 var_28_arg_1 = state_24; [L259] SORT_3 var_28_arg_2 = var_23; [L260] SORT_3 var_28 = var_28_arg_0 ? var_28_arg_1 : var_28_arg_2; [L261] SORT_1 var_33_arg_0 = var_32; [L262] SORT_3 var_33_arg_1 = state_29; [L263] SORT_3 var_33_arg_2 = var_28; [L264] SORT_3 var_33 = var_33_arg_0 ? var_33_arg_1 : var_33_arg_2; [L265] SORT_1 var_38_arg_0 = var_37; [L266] SORT_3 var_38_arg_1 = state_34; [L267] SORT_3 var_38_arg_2 = var_33; [L268] SORT_3 var_38 = var_38_arg_0 ? var_38_arg_1 : var_38_arg_2; [L269] SORT_1 var_44_arg_0 = var_43; [L270] SORT_3 var_44_arg_1 = state_39; [L271] SORT_3 var_44_arg_2 = var_38; [L272] SORT_3 var_44 = var_44_arg_0 ? var_44_arg_1 : var_44_arg_2; [L273] SORT_1 var_49_arg_0 = var_48; [L274] SORT_3 var_49_arg_1 = state_45; [L275] SORT_3 var_49_arg_2 = var_44; [L276] SORT_3 var_49 = var_49_arg_0 ? var_49_arg_1 : var_49_arg_2; [L277] SORT_1 var_54_arg_0 = var_53; [L278] SORT_3 var_54_arg_1 = state_50; [L279] SORT_3 var_54_arg_2 = var_49; [L280] SORT_3 var_54 = var_54_arg_0 ? var_54_arg_1 : var_54_arg_2; [L281] SORT_1 var_58_arg_0 = var_57; [L282] SORT_3 var_58_arg_1 = state_55; [L283] SORT_3 var_58_arg_2 = var_54; [L284] SORT_3 var_58 = var_58_arg_0 ? var_58_arg_1 : var_58_arg_2; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_58=0, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L285] EXPR var_58 & mask_SORT_3 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L285] var_58 = var_58 & mask_SORT_3 [L286] SORT_3 var_88_arg_0 = state_87; [L287] SORT_3 var_88_arg_1 = var_58; [L288] SORT_1 var_88 = var_88_arg_0 == var_88_arg_1; [L289] SORT_1 var_89_arg_0 = var_86; [L290] SORT_1 var_89_arg_1 = var_88; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0, var_89_arg_0=-1, var_89_arg_1=1] [L291] EXPR var_89_arg_0 | var_89_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L291] SORT_1 var_89 = var_89_arg_0 | var_89_arg_1; [L292] SORT_1 var_110_arg_0 = state_91; [L293] SORT_1 var_110_arg_1 = input_109; [L294] SORT_1 var_110_arg_2 = var_89; [L295] SORT_1 var_110 = var_110_arg_0 ? var_110_arg_1 : var_110_arg_2; [L296] SORT_1 var_113_arg_0 = var_110; [L297] SORT_1 var_113 = ~var_113_arg_0; [L298] SORT_1 var_114_arg_0 = var_112; [L299] SORT_1 var_114_arg_1 = var_113; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_114_arg_0=1, var_114_arg_1=-1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L300] EXPR var_114_arg_0 & var_114_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L300] SORT_1 var_114 = var_114_arg_0 & var_114_arg_1; [L301] EXPR var_114 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L301] var_114 = var_114 & mask_SORT_1 [L302] SORT_1 bad_115_arg_0 = var_114; [L303] CALL __VERIFIER_assert(!(bad_115_arg_0)) [L22] COND TRUE !(cond) [L22] reach_error() - StatisticsResult: Ultimate Automizer benchmark data CFG has 2 procedures, 392 locations, 1 error locations. Started 1 CEGAR loops. OverallTime: 193.2s, OverallIterations: 53, TraceHistogramMax: 6, PathProgramHistogramMax: 1, EmptinessCheckTime: 0.3s, AutomataDifference: 42.1s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, HoareTripleCheckerStatistics: 0 mSolverCounterUnknown, 49397 SdHoareTripleChecker+Valid, 29.2s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 49305 mSDsluCounter, 123894 SdHoareTripleChecker+Invalid, 24.9s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 0 IncrementalHoareTripleChecker+Unchecked, 95545 mSDsCounter, 193 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 34737 IncrementalHoareTripleChecker+Invalid, 34930 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 193 mSolverCounterUnsat, 28349 mSDtfsCounter, 34737 mSolverCounterSat, 0.7s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Unknown, PredicateUnifierStatistics: 0 DeclaredPredicates, 4557 GetRequests, 3989 SyntacticMatches, 2 SemanticMatches, 566 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11873 ImplicationChecksByTransitivity, 17.4s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=3235occurred in iteration=52, InterpolantAutomatonStates: 432, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 1.9s AutomataMinimizationTime, 52 MinimizatonAttempts, 11921 StatesRemovedByMinimization, 19 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 2.5s SsaConstructionTime, 38.8s SatisfiabilityAnalysisTime, 88.7s InterpolantComputationTime, 17096 NumberOfCodeBlocks, 17096 NumberOfCodeBlocksAsserted, 62 NumberOfCheckSat, 17730 ConstructedInterpolants, 0 QuantifiedInterpolants, 103173 SizeOfPredicates, 44 NumberOfNonLiveVariables, 17227 ConjunctsInSsa, 399 ConjunctsInUnsatCore, 64 InterpolantComputations, 49 PerfectInterpolantSequences, 6362/6796 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available, ConComCheckerStatistics: No data available RESULT: Ultimate could not prove your program: unable to determine feasibility of some traces [2024-11-24 01:50:31,877 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_68366e95-16cf-4e82-8e6c-d18d732496f9/bin/uautomizer-verify-LYvppIcaGC/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Ended with exit code 0 Received shutdown request... --- End real Ultimate output --- Execution finished normally Using bit-precise analysis Retrying with bit-precise analysis ### Bit-precise run ### Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_68366e95-16cf-4e82-8e6c-d18d732496f9/bin/uautomizer-verify-LYvppIcaGC/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_68366e95-16cf-4e82-8e6c-d18d732496f9/bin/uautomizer-verify-LYvppIcaGC/plugins/org.eclipse.equinox.launcher_1.6.800.v20240513-1750.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_68366e95-16cf-4e82-8e6c-d18d732496f9/bin/uautomizer-verify-LYvppIcaGC/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_68366e95-16cf-4e82-8e6c-d18d732496f9/bin/uautomizer-verify-LYvppIcaGC/config/AutomizerReach.xml -i ../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w128_d8_e0.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_68366e95-16cf-4e82-8e6c-d18d732496f9/bin/uautomizer-verify-LYvppIcaGC/config/svcomp-Reach-64bit-Automizer_Bitvector.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_68366e95-16cf-4e82-8e6c-d18d732496f9/bin/uautomizer-verify-LYvppIcaGC --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash cc215c1310f8b4d8a3ef1501261e91ba08e9c5718658396972a4e0020f5cf43f --- Real Ultimate output --- This is Ultimate 0.3.0-dev-6497de0 [2024-11-24 01:50:35,289 INFO L188 SettingsManager]: Resetting all preferences to default values... [2024-11-24 01:50:35,480 INFO L114 SettingsManager]: Loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_68366e95-16cf-4e82-8e6c-d18d732496f9/bin/uautomizer-verify-LYvppIcaGC/config/svcomp-Reach-64bit-Automizer_Bitvector.epf [2024-11-24 01:50:35,489 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2024-11-24 01:50:35,489 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2024-11-24 01:50:35,523 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2024-11-24 01:50:35,524 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2024-11-24 01:50:35,524 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2024-11-24 01:50:35,524 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2024-11-24 01:50:35,525 INFO L153 SettingsManager]: * Use memory slicer=true [2024-11-24 01:50:35,525 INFO L151 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2024-11-24 01:50:35,525 INFO L153 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2024-11-24 01:50:35,526 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2024-11-24 01:50:35,526 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2024-11-24 01:50:35,526 INFO L153 SettingsManager]: * Use SBE=true [2024-11-24 01:50:35,526 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2024-11-24 01:50:35,526 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2024-11-24 01:50:35,527 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2024-11-24 01:50:35,527 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2024-11-24 01:50:35,527 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2024-11-24 01:50:35,527 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2024-11-24 01:50:35,527 INFO L153 SettingsManager]: * Adapt memory model on pointer casts if necessary=true [2024-11-24 01:50:35,527 INFO L153 SettingsManager]: * Use bitvectors instead of ints=true [2024-11-24 01:50:35,527 INFO L153 SettingsManager]: * Memory model=HoenickeLindenmann_4ByteResolution [2024-11-24 01:50:35,528 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2024-11-24 01:50:35,528 INFO L153 SettingsManager]: * Behaviour of calls to undefined functions=OVERAPPROXIMATE_BEHAVIOUR [2024-11-24 01:50:35,528 INFO L153 SettingsManager]: * Use constant arrays=true [2024-11-24 01:50:35,528 INFO L151 SettingsManager]: Preferences of IcfgBuilder differ from their defaults: [2024-11-24 01:50:35,529 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-11-24 01:50:35,529 INFO L153 SettingsManager]: * Only consider context switches at boundaries of atomic blocks=true [2024-11-24 01:50:35,529 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2024-11-24 01:50:35,529 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2024-11-24 01:50:35,529 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2024-11-24 01:50:35,530 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-11-24 01:50:35,530 INFO L153 SettingsManager]: * Only consider context switches at boundaries of atomic blocks=true [2024-11-24 01:50:35,530 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2024-11-24 01:50:35,530 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2024-11-24 01:50:35,530 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2024-11-24 01:50:35,530 INFO L153 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2024-11-24 01:50:35,530 INFO L153 SettingsManager]: * Compute procedure contracts=false [2024-11-24 01:50:35,530 INFO L153 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopHeads [2024-11-24 01:50:35,531 INFO L153 SettingsManager]: * Trace refinement strategy=FOX [2024-11-24 01:50:35,531 INFO L153 SettingsManager]: * Command for external solver=cvc4 --incremental --print-success --lang smt [2024-11-24 01:50:35,531 INFO L153 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false [2024-11-24 01:50:35,531 INFO L153 SettingsManager]: * Automaton type used in concurrency analysis=PETRI_NET [2024-11-24 01:50:35,531 INFO L153 SettingsManager]: * Order on configurations for Petri net unfoldings=DBO [2024-11-24 01:50:35,531 INFO L153 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2024-11-24 01:50:35,531 INFO L153 SettingsManager]: * Looper check in Petri net analysis=SEMANTIC Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_68366e95-16cf-4e82-8e6c-d18d732496f9/bin/uautomizer-verify-LYvppIcaGC Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> cc215c1310f8b4d8a3ef1501261e91ba08e9c5718658396972a4e0020f5cf43f [2024-11-24 01:50:35,948 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2024-11-24 01:50:35,959 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2024-11-24 01:50:35,962 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2024-11-24 01:50:35,964 INFO L270 PluginConnector]: Initializing CDTParser... [2024-11-24 01:50:35,964 INFO L274 PluginConnector]: CDTParser initialized [2024-11-24 01:50:35,966 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_68366e95-16cf-4e82-8e6c-d18d732496f9/bin/uautomizer-verify-LYvppIcaGC/../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w128_d8_e0.c [2024-11-24 01:50:39,674 INFO L533 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_68366e95-16cf-4e82-8e6c-d18d732496f9/bin/uautomizer-verify-LYvppIcaGC/data/530cf4f8e/84dd2f0ad68f4281921db18fe0c341c3/FLAGddf72d8b1 [2024-11-24 01:50:40,109 INFO L384 CDTParser]: Found 1 translation units. [2024-11-24 01:50:40,114 INFO L180 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_68366e95-16cf-4e82-8e6c-d18d732496f9/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w128_d8_e0.c [2024-11-24 01:50:40,133 INFO L427 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_68366e95-16cf-4e82-8e6c-d18d732496f9/bin/uautomizer-verify-LYvppIcaGC/data/530cf4f8e/84dd2f0ad68f4281921db18fe0c341c3/FLAGddf72d8b1 [2024-11-24 01:50:40,281 INFO L435 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_68366e95-16cf-4e82-8e6c-d18d732496f9/bin/uautomizer-verify-LYvppIcaGC/data/530cf4f8e/84dd2f0ad68f4281921db18fe0c341c3 [2024-11-24 01:50:40,284 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2024-11-24 01:50:40,289 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2024-11-24 01:50:40,292 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2024-11-24 01:50:40,293 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2024-11-24 01:50:40,299 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2024-11-24 01:50:40,301 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 24.11 01:50:40" (1/1) ... [2024-11-24 01:50:40,304 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@3b5063a3 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.11 01:50:40, skipping insertion in model container [2024-11-24 01:50:40,305 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 24.11 01:50:40" (1/1) ... [2024-11-24 01:50:40,366 INFO L175 MainTranslator]: Built tables and reachable declarations [2024-11-24 01:50:40,603 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_68366e95-16cf-4e82-8e6c-d18d732496f9/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w128_d8_e0.c[1334,1347] [2024-11-24 01:50:40,849 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-11-24 01:50:40,869 INFO L200 MainTranslator]: Completed pre-run [2024-11-24 01:50:40,881 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_68366e95-16cf-4e82-8e6c-d18d732496f9/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w128_d8_e0.c[1334,1347] [2024-11-24 01:50:41,022 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-11-24 01:50:41,043 INFO L204 MainTranslator]: Completed translation [2024-11-24 01:50:41,044 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.11 01:50:41 WrapperNode [2024-11-24 01:50:41,044 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2024-11-24 01:50:41,046 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2024-11-24 01:50:41,047 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2024-11-24 01:50:41,047 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2024-11-24 01:50:41,059 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.11 01:50:41" (1/1) ... [2024-11-24 01:50:41,083 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.11 01:50:41" (1/1) ... [2024-11-24 01:50:41,160 INFO L138 Inliner]: procedures = 18, calls = 11, calls flagged for inlining = 3, calls inlined = 3, statements flattened = 638 [2024-11-24 01:50:41,160 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2024-11-24 01:50:41,161 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2024-11-24 01:50:41,162 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2024-11-24 01:50:41,162 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2024-11-24 01:50:41,178 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.11 01:50:41" (1/1) ... [2024-11-24 01:50:41,180 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.11 01:50:41" (1/1) ... [2024-11-24 01:50:41,190 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.11 01:50:41" (1/1) ... [2024-11-24 01:50:41,244 INFO L175 MemorySlicer]: Split 2 memory accesses to 1 slices as follows [2]. 100 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2]. The 0 writes are split as follows [0]. [2024-11-24 01:50:41,245 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.11 01:50:41" (1/1) ... [2024-11-24 01:50:41,245 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.11 01:50:41" (1/1) ... [2024-11-24 01:50:41,267 INFO L184 PluginConnector]: Executing the observer ReplaceArrayAssignments from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.11 01:50:41" (1/1) ... [2024-11-24 01:50:41,269 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.11 01:50:41" (1/1) ... [2024-11-24 01:50:41,274 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.11 01:50:41" (1/1) ... [2024-11-24 01:50:41,277 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.11 01:50:41" (1/1) ... [2024-11-24 01:50:41,281 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.11 01:50:41" (1/1) ... [2024-11-24 01:50:41,289 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2024-11-24 01:50:41,290 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2024-11-24 01:50:41,290 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2024-11-24 01:50:41,291 INFO L274 PluginConnector]: RCFGBuilder initialized [2024-11-24 01:50:41,292 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.11 01:50:41" (1/1) ... [2024-11-24 01:50:41,304 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2024-11-24 01:50:41,359 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_68366e95-16cf-4e82-8e6c-d18d732496f9/bin/uautomizer-verify-LYvppIcaGC/z3 [2024-11-24 01:50:41,378 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_68366e95-16cf-4e82-8e6c-d18d732496f9/bin/uautomizer-verify-LYvppIcaGC/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (exit command is (exit), workingDir is null) [2024-11-24 01:50:41,383 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_68366e95-16cf-4e82-8e6c-d18d732496f9/bin/uautomizer-verify-LYvppIcaGC/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Waiting until timeout for monitored process [2024-11-24 01:50:41,420 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2024-11-24 01:50:41,421 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~intINTTYPE1#0 [2024-11-24 01:50:41,421 INFO L130 BoogieDeclarations]: Found specification of procedure assume_abort_if_not [2024-11-24 01:50:41,421 INFO L138 BoogieDeclarations]: Found implementation of procedure assume_abort_if_not [2024-11-24 01:50:41,422 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2024-11-24 01:50:41,422 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2024-11-24 01:50:41,767 INFO L234 CfgBuilder]: Building ICFG [2024-11-24 01:50:41,770 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2024-11-24 01:50:42,734 INFO L? ?]: Removed 198 outVars from TransFormulas that were not future-live. [2024-11-24 01:50:42,734 INFO L283 CfgBuilder]: Performing block encoding [2024-11-24 01:50:42,750 INFO L307 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2024-11-24 01:50:42,750 INFO L312 CfgBuilder]: Removed 1 assume(true) statements. [2024-11-24 01:50:42,751 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 24.11 01:50:42 BoogieIcfgContainer [2024-11-24 01:50:42,751 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2024-11-24 01:50:42,754 INFO L112 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2024-11-24 01:50:42,754 INFO L270 PluginConnector]: Initializing TraceAbstraction... [2024-11-24 01:50:42,765 INFO L274 PluginConnector]: TraceAbstraction initialized [2024-11-24 01:50:42,766 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 24.11 01:50:40" (1/3) ... [2024-11-24 01:50:42,768 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@25494527 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 24.11 01:50:42, skipping insertion in model container [2024-11-24 01:50:42,769 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.11 01:50:41" (2/3) ... [2024-11-24 01:50:42,769 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@25494527 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 24.11 01:50:42, skipping insertion in model container [2024-11-24 01:50:42,769 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 24.11 01:50:42" (3/3) ... [2024-11-24 01:50:42,771 INFO L128 eAbstractionObserver]: Analyzing ICFG btor2c-lazyMod.circular_pointer_top_w128_d8_e0.c [2024-11-24 01:50:42,795 INFO L216 ceAbstractionStarter]: Automizer settings: Hoare:LoopHeads NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2024-11-24 01:50:42,799 INFO L151 ceAbstractionStarter]: Applying trace abstraction to ICFG btor2c-lazyMod.circular_pointer_top_w128_d8_e0.c that has 2 procedures, 20 locations, 1 initial locations, 1 loop locations, and 1 error locations. [2024-11-24 01:50:42,868 INFO L332 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2024-11-24 01:50:42,890 INFO L333 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mAutomataTypeConcurrency=PETRI_NET, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopHeads, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@12b1192d, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2024-11-24 01:50:42,891 INFO L334 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2024-11-24 01:50:42,896 INFO L276 IsEmpty]: Start isEmpty. Operand has 20 states, 14 states have (on average 1.2857142857142858) internal successors, (18), 15 states have internal predecessors, (18), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-24 01:50:42,906 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2024-11-24 01:50:42,907 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 01:50:42,907 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 01:50:42,908 INFO L396 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 01:50:42,916 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 01:50:42,916 INFO L85 PathProgramCache]: Analyzing trace with hash 1676994902, now seen corresponding path program 1 times [2024-11-24 01:50:42,932 INFO L118 FreeRefinementEngine]: Executing refinement strategy FOX [2024-11-24 01:50:42,934 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [98365695] [2024-11-24 01:50:42,935 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 01:50:42,937 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-24 01:50:42,937 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_68366e95-16cf-4e82-8e6c-d18d732496f9/bin/uautomizer-verify-LYvppIcaGC/z3 [2024-11-24 01:50:42,942 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_68366e95-16cf-4e82-8e6c-d18d732496f9/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-24 01:50:42,944 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_68366e95-16cf-4e82-8e6c-d18d732496f9/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2024-11-24 01:50:43,496 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 01:50:43,505 INFO L256 TraceCheckSpWp]: Trace formula consists of 262 conjuncts, 19 conjuncts are in the unsatisfiable core [2024-11-24 01:50:43,517 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-24 01:50:43,981 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-11-24 01:50:43,982 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-24 01:50:44,293 INFO L136 FreeRefinementEngine]: Strategy FOX found an infeasible trace [2024-11-24 01:50:44,294 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [98365695] [2024-11-24 01:50:44,294 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [98365695] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-24 01:50:44,295 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [893613619] [2024-11-24 01:50:44,295 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 01:50:44,295 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2024-11-24 01:50:44,299 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_68366e95-16cf-4e82-8e6c-d18d732496f9/bin/uautomizer-verify-LYvppIcaGC/cvc4 [2024-11-24 01:50:44,304 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_68366e95-16cf-4e82-8e6c-d18d732496f9/bin/uautomizer-verify-LYvppIcaGC/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2024-11-24 01:50:44,306 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_68366e95-16cf-4e82-8e6c-d18d732496f9/bin/uautomizer-verify-LYvppIcaGC/cvc4 --incremental --print-success --lang smt (3)] Waiting until timeout for monitored process [2024-11-24 01:50:45,119 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 01:50:45,129 INFO L256 TraceCheckSpWp]: Trace formula consists of 262 conjuncts, 15 conjuncts are in the unsatisfiable core [2024-11-24 01:50:45,142 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-24 01:50:45,309 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-24 01:50:45,310 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-11-24 01:50:45,310 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [893613619] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-24 01:50:45,311 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-11-24 01:50:45,311 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [7] total 7 [2024-11-24 01:50:45,315 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2068777822] [2024-11-24 01:50:45,316 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-24 01:50:45,322 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-24 01:50:45,323 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy FOX [2024-11-24 01:50:45,350 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-24 01:50:45,352 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=53, Unknown=0, NotChecked=0, Total=72 [2024-11-24 01:50:45,355 INFO L87 Difference]: Start difference. First operand has 20 states, 14 states have (on average 1.2857142857142858) internal successors, (18), 15 states have internal predecessors, (18), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Second operand has 4 states, 4 states have (on average 2.75) internal successors, (11), 4 states have internal predecessors, (11), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-24 01:50:45,566 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 01:50:45,567 INFO L93 Difference]: Finished difference Result 43 states and 63 transitions. [2024-11-24 01:50:45,569 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-24 01:50:45,571 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 2.75) internal successors, (11), 4 states have internal predecessors, (11), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 23 [2024-11-24 01:50:45,572 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 01:50:45,579 INFO L225 Difference]: With dead ends: 43 [2024-11-24 01:50:45,580 INFO L226 Difference]: Without dead ends: 25 [2024-11-24 01:50:45,586 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 48 GetRequests, 41 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=19, Invalid=53, Unknown=0, NotChecked=0, Total=72 [2024-11-24 01:50:45,590 INFO L435 NwaCegarLoop]: 14 mSDtfsCounter, 0 mSDsluCounter, 24 mSDsCounter, 0 mSdLazyCounter, 18 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 38 SdHoareTripleChecker+Invalid, 18 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 18 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-11-24 01:50:45,591 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 38 Invalid, 18 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 18 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-11-24 01:50:45,614 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25 states. [2024-11-24 01:50:45,636 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25 to 25. [2024-11-24 01:50:45,637 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 25 states, 17 states have (on average 1.0588235294117647) internal successors, (18), 17 states have internal predecessors, (18), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-11-24 01:50:45,644 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25 states to 25 states and 30 transitions. [2024-11-24 01:50:45,648 INFO L78 Accepts]: Start accepts. Automaton has 25 states and 30 transitions. Word has length 23 [2024-11-24 01:50:45,650 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 01:50:45,651 INFO L471 AbstractCegarLoop]: Abstraction has 25 states and 30 transitions. [2024-11-24 01:50:45,652 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 2.75) internal successors, (11), 4 states have internal predecessors, (11), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-24 01:50:45,653 INFO L276 IsEmpty]: Start isEmpty. Operand 25 states and 30 transitions. [2024-11-24 01:50:45,655 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2024-11-24 01:50:45,656 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 01:50:45,657 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1] [2024-11-24 01:50:45,676 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_68366e95-16cf-4e82-8e6c-d18d732496f9/bin/uautomizer-verify-LYvppIcaGC/cvc4 --incremental --print-success --lang smt (3)] Ended with exit code 0 [2024-11-24 01:50:45,876 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_68366e95-16cf-4e82-8e6c-d18d732496f9/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Ended with exit code 0 [2024-11-24 01:50:46,068 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_68366e95-16cf-4e82-8e6c-d18d732496f9/bin/uautomizer-verify-LYvppIcaGC/cvc4 --incremental --print-success --lang smt,2 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_68366e95-16cf-4e82-8e6c-d18d732496f9/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-24 01:50:46,069 INFO L396 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 01:50:46,070 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 01:50:46,071 INFO L85 PathProgramCache]: Analyzing trace with hash -1294995197, now seen corresponding path program 1 times [2024-11-24 01:50:46,072 INFO L118 FreeRefinementEngine]: Executing refinement strategy FOX [2024-11-24 01:50:46,072 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [948101055] [2024-11-24 01:50:46,073 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 01:50:46,073 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-24 01:50:46,073 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_68366e95-16cf-4e82-8e6c-d18d732496f9/bin/uautomizer-verify-LYvppIcaGC/z3 [2024-11-24 01:50:46,076 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_68366e95-16cf-4e82-8e6c-d18d732496f9/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-24 01:50:46,081 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_68366e95-16cf-4e82-8e6c-d18d732496f9/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2024-11-24 01:50:46,604 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 01:50:46,616 INFO L256 TraceCheckSpWp]: Trace formula consists of 486 conjuncts, 43 conjuncts are in the unsatisfiable core [2024-11-24 01:50:46,629 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-24 01:50:47,587 INFO L134 CoverageAnalysis]: Checked inductivity of 68 backedges. 0 proven. 23 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2024-11-24 01:50:47,588 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-24 01:50:47,869 INFO L136 FreeRefinementEngine]: Strategy FOX found an infeasible trace [2024-11-24 01:50:47,871 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [948101055] [2024-11-24 01:50:47,871 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [948101055] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-24 01:50:47,871 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [1867667746] [2024-11-24 01:50:47,871 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 01:50:47,872 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2024-11-24 01:50:47,872 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_68366e95-16cf-4e82-8e6c-d18d732496f9/bin/uautomizer-verify-LYvppIcaGC/cvc4 [2024-11-24 01:50:47,877 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_68366e95-16cf-4e82-8e6c-d18d732496f9/bin/uautomizer-verify-LYvppIcaGC/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2024-11-24 01:50:47,879 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_68366e95-16cf-4e82-8e6c-d18d732496f9/bin/uautomizer-verify-LYvppIcaGC/cvc4 --incremental --print-success --lang smt (5)] Waiting until timeout for monitored process [2024-11-24 01:50:49,071 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 01:50:49,121 INFO L256 TraceCheckSpWp]: Trace formula consists of 486 conjuncts, 40 conjuncts are in the unsatisfiable core [2024-11-24 01:50:49,144 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-24 01:50:49,718 INFO L134 CoverageAnalysis]: Checked inductivity of 68 backedges. 0 proven. 23 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2024-11-24 01:50:49,719 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-24 01:50:49,974 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [1867667746] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-24 01:50:49,974 INFO L185 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2024-11-24 01:50:49,974 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 9] total 10 [2024-11-24 01:50:49,974 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [760639409] [2024-11-24 01:50:49,974 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2024-11-24 01:50:49,975 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 10 states [2024-11-24 01:50:49,975 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy FOX [2024-11-24 01:50:49,977 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2024-11-24 01:50:49,978 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=108, Unknown=0, NotChecked=0, Total=132 [2024-11-24 01:50:49,979 INFO L87 Difference]: Start difference. First operand 25 states and 30 transitions. Second operand has 10 states, 9 states have (on average 2.4444444444444446) internal successors, (22), 10 states have internal predecessors, (22), 3 states have call successors, (6), 1 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 3 states have call successors, (6) [2024-11-24 01:50:50,716 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 01:50:50,716 INFO L93 Difference]: Finished difference Result 36 states and 44 transitions. [2024-11-24 01:50:50,717 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2024-11-24 01:50:50,717 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 9 states have (on average 2.4444444444444446) internal successors, (22), 10 states have internal predecessors, (22), 3 states have call successors, (6), 1 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 3 states have call successors, (6) Word has length 44 [2024-11-24 01:50:50,718 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 01:50:50,720 INFO L225 Difference]: With dead ends: 36 [2024-11-24 01:50:50,721 INFO L226 Difference]: Without dead ends: 34 [2024-11-24 01:50:50,722 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 98 GetRequests, 83 SyntacticMatches, 1 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 13 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=47, Invalid=193, Unknown=0, NotChecked=0, Total=240 [2024-11-24 01:50:50,725 INFO L435 NwaCegarLoop]: 12 mSDtfsCounter, 7 mSDsluCounter, 64 mSDsCounter, 0 mSdLazyCounter, 132 mSolverCounterSat, 7 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 7 SdHoareTripleChecker+Valid, 76 SdHoareTripleChecker+Invalid, 139 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 7 IncrementalHoareTripleChecker+Valid, 132 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2024-11-24 01:50:50,725 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [7 Valid, 76 Invalid, 139 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [7 Valid, 132 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2024-11-24 01:50:50,726 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34 states. [2024-11-24 01:50:50,735 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34 to 34. [2024-11-24 01:50:50,736 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 34 states, 23 states have (on average 1.0434782608695652) internal successors, (24), 23 states have internal predecessors, (24), 9 states have call successors, (9), 1 states have call predecessors, (9), 1 states have return successors, (9), 9 states have call predecessors, (9), 9 states have call successors, (9) [2024-11-24 01:50:50,737 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34 states to 34 states and 42 transitions. [2024-11-24 01:50:50,738 INFO L78 Accepts]: Start accepts. Automaton has 34 states and 42 transitions. Word has length 44 [2024-11-24 01:50:50,738 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 01:50:50,738 INFO L471 AbstractCegarLoop]: Abstraction has 34 states and 42 transitions. [2024-11-24 01:50:50,739 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 10 states, 9 states have (on average 2.4444444444444446) internal successors, (22), 10 states have internal predecessors, (22), 3 states have call successors, (6), 1 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 3 states have call successors, (6) [2024-11-24 01:50:50,739 INFO L276 IsEmpty]: Start isEmpty. Operand 34 states and 42 transitions. [2024-11-24 01:50:50,740 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2024-11-24 01:50:50,741 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 01:50:50,741 INFO L218 NwaCegarLoop]: trace histogram [9, 9, 9, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 1, 1, 1, 1] [2024-11-24 01:50:50,757 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_68366e95-16cf-4e82-8e6c-d18d732496f9/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Ended with exit code 0 [2024-11-24 01:50:50,951 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_68366e95-16cf-4e82-8e6c-d18d732496f9/bin/uautomizer-verify-LYvppIcaGC/cvc4 --incremental --print-success --lang smt (5)] Ended with exit code 0 [2024-11-24 01:50:51,145 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 4 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_68366e95-16cf-4e82-8e6c-d18d732496f9/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true,5 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_68366e95-16cf-4e82-8e6c-d18d732496f9/bin/uautomizer-verify-LYvppIcaGC/cvc4 --incremental --print-success --lang smt [2024-11-24 01:50:51,145 INFO L396 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 01:50:51,146 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 01:50:51,146 INFO L85 PathProgramCache]: Analyzing trace with hash 1531864950, now seen corresponding path program 2 times [2024-11-24 01:50:51,147 INFO L118 FreeRefinementEngine]: Executing refinement strategy FOX [2024-11-24 01:50:51,148 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1522411623] [2024-11-24 01:50:51,148 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2024-11-24 01:50:51,148 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-24 01:50:51,148 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_68366e95-16cf-4e82-8e6c-d18d732496f9/bin/uautomizer-verify-LYvppIcaGC/z3 [2024-11-24 01:50:51,151 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_68366e95-16cf-4e82-8e6c-d18d732496f9/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-24 01:50:51,155 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_68366e95-16cf-4e82-8e6c-d18d732496f9/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2024-11-24 01:50:52,204 INFO L229 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2024-11-24 01:50:52,204 INFO L230 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-24 01:50:52,217 INFO L256 TraceCheckSpWp]: Trace formula consists of 710 conjuncts, 88 conjuncts are in the unsatisfiable core [2024-11-24 01:50:52,241 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-24 01:51:13,308 INFO L134 CoverageAnalysis]: Checked inductivity of 169 backedges. 12 proven. 55 refuted. 0 times theorem prover too weak. 102 trivial. 0 not checked. [2024-11-24 01:51:13,308 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-24 01:51:20,895 WARN L851 $PredicateComparison]: unable to prove that (let ((.cse5 ((_ zero_extend 24) |c_ULTIMATE.start_main_~mask_SORT_1~0#1|))) (let ((.cse2 (forall ((|v_ULTIMATE.start_main_~var_114_arg_0~0#1_19| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_110_arg_1~0#1_17| (_ BitVec 8))) (= ((_ extract 7 0) (bvand .cse5 ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_114_arg_0~0#1_19|) ((_ zero_extend 24) ((_ extract 7 0) (bvnot ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_110_arg_1~0#1_17|))))))))))) (_ bv0 8)))) (.cse3 (= |c_ULTIMATE.start_main_~state_91~0#1| (_ bv0 8)))) (let ((.cse7 (or .cse2 .cse3)) (.cse9 ((_ zero_extend 24) |c_ULTIMATE.start_main_~state_68~0#1|)) (.cse8 (not .cse3))) (let ((.cse4 (and .cse7 (or (forall ((|v_ULTIMATE.start_main_~var_85_arg_1~0#1_17| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_114_arg_0~0#1_19| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_74_arg_1~0#1_17| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_71_arg_1~0#1_17| (_ BitVec 8))) (= ((_ extract 7 0) (bvand .cse5 ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) (bvnot ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) ((_ extract 7 0) (bvor (_ bv0 32) ((_ zero_extend 24) ((_ extract 7 0) (bvnot ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_74_arg_1~0#1_17|) ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_71_arg_1~0#1_17|) .cse9)))))) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_85_arg_1~0#1_17|))))))))))))))) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_114_arg_0~0#1_19|)))))) (_ bv0 8))) .cse8)))) (let ((.cse6 (= (_ bv0 32) ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |c_ULTIMATE.start_main_~mask_SORT_13~0#1|) ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) |c_ULTIMATE.start_main_~state_12~0#1|)))))))) (.cse1 (let ((.cse10 (= |c_ULTIMATE.start_main_~state_87~0#1| (bvand |c_ULTIMATE.start_main_~state_55~0#1| |c_ULTIMATE.start_main_~mask_SORT_3~0#1|)))) (and (or (and .cse7 (or .cse8 (forall ((|v_ULTIMATE.start_main_~var_85_arg_1~0#1_17| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_114_arg_0~0#1_19| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_74_arg_1~0#1_17| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_71_arg_1~0#1_17| (_ BitVec 8))) (= (_ bv0 8) ((_ extract 7 0) (bvand .cse5 ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) (bvnot ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) ((_ extract 7 0) (bvor (_ bv1 32) ((_ zero_extend 24) ((_ extract 7 0) (bvnot ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_74_arg_1~0#1_17|) ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_71_arg_1~0#1_17|) .cse9)))))) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_85_arg_1~0#1_17|))))))))))))))) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_114_arg_0~0#1_19|)))))))))) (not .cse10)) (or .cse4 .cse10))))) (and (or (let ((.cse0 (= ((_ extract 7 0) (bvand .cse5 (_ bv254 32))) (_ bv0 8)))) (and (or .cse0 .cse1) (or (not .cse0) (and (or .cse2 .cse3 (forall ((|v_ULTIMATE.start_main_~var_58_arg_2~0#1_15| (_ BitVec 128))) (not (= |c_ULTIMATE.start_main_~state_87~0#1| (bvand |v_ULTIMATE.start_main_~var_58_arg_2~0#1_15| |c_ULTIMATE.start_main_~mask_SORT_3~0#1|))))) (or (forall ((|v_ULTIMATE.start_main_~var_58_arg_2~0#1_15| (_ BitVec 128))) (= |c_ULTIMATE.start_main_~state_87~0#1| (bvand |v_ULTIMATE.start_main_~var_58_arg_2~0#1_15| |c_ULTIMATE.start_main_~mask_SORT_3~0#1|))) .cse4))))) .cse6) (or (= (_ bv0 8) ((_ extract 7 0) (bvand .cse5 (_ bv255 32)))) (not .cse6) .cse1))))))) is different from false [2024-11-24 01:51:22,300 INFO L136 FreeRefinementEngine]: Strategy FOX found an infeasible trace [2024-11-24 01:51:22,300 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1522411623] [2024-11-24 01:51:22,301 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1522411623] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-24 01:51:22,301 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [191809400] [2024-11-24 01:51:22,301 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2024-11-24 01:51:22,301 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2024-11-24 01:51:22,301 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_68366e95-16cf-4e82-8e6c-d18d732496f9/bin/uautomizer-verify-LYvppIcaGC/cvc4 [2024-11-24 01:51:22,306 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_68366e95-16cf-4e82-8e6c-d18d732496f9/bin/uautomizer-verify-LYvppIcaGC/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2024-11-24 01:51:22,307 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_68366e95-16cf-4e82-8e6c-d18d732496f9/bin/uautomizer-verify-LYvppIcaGC/cvc4 --incremental --print-success --lang smt (7)] Waiting until timeout for monitored process [2024-11-24 01:51:23,944 INFO L229 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2024-11-24 01:51:23,944 INFO L230 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-24 01:51:23,988 INFO L256 TraceCheckSpWp]: Trace formula consists of 710 conjuncts, 87 conjuncts are in the unsatisfiable core [2024-11-24 01:51:24,004 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-24 01:52:00,333 INFO L134 CoverageAnalysis]: Checked inductivity of 169 backedges. 12 proven. 55 refuted. 0 times theorem prover too weak. 102 trivial. 0 not checked. [2024-11-24 01:52:00,334 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-24 01:52:07,871 WARN L249 Executor]: External (MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_68366e95-16cf-4e82-8e6c-d18d732496f9/bin/uautomizer-verify-LYvppIcaGC/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1) with exit command (exit)) stderr output: (error "out of memory") [2024-11-24 01:52:07,872 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_68366e95-16cf-4e82-8e6c-d18d732496f9/bin/uautomizer-verify-LYvppIcaGC/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Forceful destruction successful, exit code 101 [2024-11-24 01:52:07,873 WARN L320 FreeRefinementEngine]: Global settings require throwing the following exception [2024-11-24 01:52:07,884 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_68366e95-16cf-4e82-8e6c-d18d732496f9/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Forceful destruction successful, exit code 0 [2024-11-24 01:52:08,083 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_68366e95-16cf-4e82-8e6c-d18d732496f9/bin/uautomizer-verify-LYvppIcaGC/cvc4 --incremental --print-success --lang smt (7)] Ended with exit code 0 [2024-11-24 01:52:08,273 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 6 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_68366e95-16cf-4e82-8e6c-d18d732496f9/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true,7 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_68366e95-16cf-4e82-8e6c-d18d732496f9/bin/uautomizer-verify-LYvppIcaGC/cvc4 --incremental --print-success --lang smt [2024-11-24 01:52:08,274 FATAL L? ?]: An unrecoverable error occured during an interaction with an SMT solver: de.uni_freiburg.informatik.ultimate.logic.SMTLIBException: External (MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_68366e95-16cf-4e82-8e6c-d18d732496f9/bin/uautomizer-verify-LYvppIcaGC/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1) with exit command (exit)) Received EOF on stdin. stderr output: (error "out of memory") at de.uni_freiburg.informatik.ultimate.smtsolver.external.Executor.parse(Executor.java:262) at de.uni_freiburg.informatik.ultimate.smtsolver.external.Executor.parseCheckSatResult(Executor.java:281) at de.uni_freiburg.informatik.ultimate.smtsolver.external.Scriptor.checkSat(Scriptor.java:155) at de.uni_freiburg.informatik.ultimate.logic.WrapperScript.checkSat(WrapperScript.java:163) at de.uni_freiburg.informatik.ultimate.logic.WrapperScript.checkSat(WrapperScript.java:163) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.ManagedScript.checkSat(ManagedScript.java:148) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.MonolithicImplicationChecker.checkImplication(MonolithicImplicationChecker.java:85) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier$PredicateComparison.compare(PredicateUnifier.java:842) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier$PredicateComparison.(PredicateUnifier.java:786) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate(PredicateUnifier.java:374) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate(PredicateUnifier.java:323) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.singletracecheck.TraceCheckSpWp$UnifyPostprocessor.postprocess(TraceCheckSpWp.java:555) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.predicates.IterativePredicateTransformer.applyPostprocessors(IterativePredicateTransformer.java:416) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.predicates.IterativePredicateTransformer.computeBackwardSequence(IterativePredicateTransformer.java:395) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.predicates.IterativePredicateTransformer.computeWeakestPreconditionSequence(IterativePredicateTransformer.java:267) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.singletracecheck.TraceCheckSpWp.computeInterpolantsUsingUnsatCore(TraceCheckSpWp.java:325) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.singletracecheck.TraceCheckSpWp.computeInterpolants(TraceCheckSpWp.java:181) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.singletracecheck.TraceCheckSpWp.(TraceCheckSpWp.java:160) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.IpTcStrategyModuleSpWp.construct(IpTcStrategyModuleSpWp.java:106) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.IpTcStrategyModuleSpWp.construct(IpTcStrategyModuleSpWp.java:1) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.IpTcStrategyModuleBase.getOrConstruct(IpTcStrategyModuleBase.java:101) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.IpTcStrategyModuleBase.getInterpolantComputationStatus(IpTcStrategyModuleBase.java:77) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.tracehandling.AutomatonFreeRefinementEngine.tryExecuteInterpolantGenerator(AutomatonFreeRefinementEngine.java:267) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.tracehandling.AutomatonFreeRefinementEngine.generateProof(AutomatonFreeRefinementEngine.java:148) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.tracehandling.AutomatonFreeRefinementEngine.executeStrategy(AutomatonFreeRefinementEngine.java:137) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.tracehandling.AutomatonFreeRefinementEngine.(AutomatonFreeRefinementEngine.java:85) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.TraceAbstractionRefinementEngine.(TraceAbstractionRefinementEngine.java:82) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.BasicCegarLoop.isCounterexampleFeasible(BasicCegarLoop.java:317) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.iterate(AbstractCegarLoop.java:407) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.startCegar(AbstractCegarLoop.java:342) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.runCegar(AbstractCegarLoop.java:324) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.executeCegarLoop(TraceAbstractionStarter.java:428) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.analyseProgram(TraceAbstractionStarter.java:314) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.analyseSequentialProgram(TraceAbstractionStarter.java:275) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.runCegarLoops(TraceAbstractionStarter.java:167) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.(TraceAbstractionStarter.java:140) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver.finish(TraceAbstractionObserver.java:132) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runObserver(PluginConnector.java:167) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runTool(PluginConnector.java:150) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.run(PluginConnector.java:127) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.executePluginConnector(ToolchainWalker.java:233) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.processPlugin(ToolchainWalker.java:227) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walkUnprotected(ToolchainWalker.java:144) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walk(ToolchainWalker.java:106) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainManager$Toolchain.processToolchain(ToolchainManager.java:319) at de.uni_freiburg.informatik.ultimate.core.coreplugin.toolchain.DefaultToolchainJob.run(DefaultToolchainJob.java:145) at org.eclipse.core.internal.jobs.Worker.run(Worker.java:63) Caused by: de.uni_freiburg.informatik.ultimate.logic.SMTLIBException: EOF at de.uni_freiburg.informatik.ultimate.smtsolver.external.Parser$Action$.CUP$do_action(Parser.java:1518) at de.uni_freiburg.informatik.ultimate.smtsolver.external.Parser.do_action(Parser.java:701) at com.github.jhoenicke.javacup.runtime.LRParser.parse(LRParser.java:383) at de.uni_freiburg.informatik.ultimate.smtsolver.external.Executor.parse(Executor.java:258) ... 46 more [2024-11-24 01:52:08,282 INFO L158 Benchmark]: Toolchain (without parser) took 87993.36ms. Allocated memory was 83.9MB in the beginning and 453.0MB in the end (delta: 369.1MB). Free memory was 59.4MB in the beginning and 388.9MB in the end (delta: -329.5MB). Peak memory consumption was 36.3MB. Max. memory is 16.1GB. [2024-11-24 01:52:08,282 INFO L158 Benchmark]: CDTParser took 0.55ms. Allocated memory is still 83.9MB. Free memory was 64.5MB in the beginning and 64.4MB in the end (delta: 34.9kB). There was no memory consumed. Max. memory is 16.1GB. [2024-11-24 01:52:08,282 INFO L158 Benchmark]: CACSL2BoogieTranslator took 753.24ms. Allocated memory is still 83.9MB. Free memory was 59.1MB in the beginning and 33.1MB in the end (delta: 26.0MB). Peak memory consumption was 25.2MB. Max. memory is 16.1GB. [2024-11-24 01:52:08,283 INFO L158 Benchmark]: Boogie Procedure Inliner took 114.82ms. Allocated memory is still 83.9MB. Free memory was 33.1MB in the beginning and 28.1MB in the end (delta: 5.0MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. [2024-11-24 01:52:08,283 INFO L158 Benchmark]: Boogie Preprocessor took 127.82ms. Allocated memory is still 83.9MB. Free memory was 28.1MB in the beginning and 22.5MB in the end (delta: 5.6MB). There was no memory consumed. Max. memory is 16.1GB. [2024-11-24 01:52:08,284 INFO L158 Benchmark]: RCFGBuilder took 1461.03ms. Allocated memory is still 83.9MB. Free memory was 22.5MB in the beginning and 51.1MB in the end (delta: -28.6MB). Peak memory consumption was 22.4MB. Max. memory is 16.1GB. [2024-11-24 01:52:08,284 INFO L158 Benchmark]: TraceAbstraction took 85525.25ms. Allocated memory was 83.9MB in the beginning and 453.0MB in the end (delta: 369.1MB). Free memory was 50.3MB in the beginning and 388.9MB in the end (delta: -338.6MB). Peak memory consumption was 27.5MB. Max. memory is 16.1GB. [2024-11-24 01:52:08,287 INFO L338 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.55ms. Allocated memory is still 83.9MB. Free memory was 64.5MB in the beginning and 64.4MB in the end (delta: 34.9kB). There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 753.24ms. Allocated memory is still 83.9MB. Free memory was 59.1MB in the beginning and 33.1MB in the end (delta: 26.0MB). Peak memory consumption was 25.2MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 114.82ms. Allocated memory is still 83.9MB. Free memory was 33.1MB in the beginning and 28.1MB in the end (delta: 5.0MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. * Boogie Preprocessor took 127.82ms. Allocated memory is still 83.9MB. Free memory was 28.1MB in the beginning and 22.5MB in the end (delta: 5.6MB). There was no memory consumed. Max. memory is 16.1GB. * RCFGBuilder took 1461.03ms. Allocated memory is still 83.9MB. Free memory was 22.5MB in the beginning and 51.1MB in the end (delta: -28.6MB). Peak memory consumption was 22.4MB. Max. memory is 16.1GB. * TraceAbstraction took 85525.25ms. Allocated memory was 83.9MB in the beginning and 453.0MB in the end (delta: 369.1MB). Free memory was 50.3MB in the beginning and 388.9MB in the end (delta: -338.6MB). Peak memory consumption was 27.5MB. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - ExceptionOrErrorResult: SMTLIBException: External (MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_68366e95-16cf-4e82-8e6c-d18d732496f9/bin/uautomizer-verify-LYvppIcaGC/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1) with exit command (exit)) Received EOF on stdin. stderr output: (error "out of memory") de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: SMTLIBException: External (MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_68366e95-16cf-4e82-8e6c-d18d732496f9/bin/uautomizer-verify-LYvppIcaGC/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1) with exit command (exit)) Received EOF on stdin. stderr output: (error "out of memory") : de.uni_freiburg.informatik.ultimate.smtsolver.external.Executor.parse(Executor.java:262) RESULT: Ultimate could not prove your program: Toolchain returned no result. Received shutdown request... --- End real Ultimate output --- Execution finished normally Writing output log to file Ultimate.log Result: ERROR: ExceptionOrErrorResult: SMTLIBException: External (MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_68366e95-16cf-4e82-8e6c-d18d732496f9/bin/uautomizer-verify-LYvppIcaGC/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1) with exit command (exit)) Received EOF on stdin. stderr output: (error "out of memory")