./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w32_d8_e0.c --full-output --architecture 64bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version 6497de01 Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d9cbd223-3e19-44a5-b1a1-87e0ec577546/bin/uautomizer-verify-LYvppIcaGC/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d9cbd223-3e19-44a5-b1a1-87e0ec577546/bin/uautomizer-verify-LYvppIcaGC/plugins/org.eclipse.equinox.launcher_1.6.800.v20240513-1750.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d9cbd223-3e19-44a5-b1a1-87e0ec577546/bin/uautomizer-verify-LYvppIcaGC/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d9cbd223-3e19-44a5-b1a1-87e0ec577546/bin/uautomizer-verify-LYvppIcaGC/config/AutomizerReach.xml -i ../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w32_d8_e0.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d9cbd223-3e19-44a5-b1a1-87e0ec577546/bin/uautomizer-verify-LYvppIcaGC/config/svcomp-Reach-64bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d9cbd223-3e19-44a5-b1a1-87e0ec577546/bin/uautomizer-verify-LYvppIcaGC --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash 5bfb987fcec0e4e87ab47a565086b76b03edc9a60525cd8ee77a0c461c0fdaaa --- Real Ultimate output --- This is Ultimate 0.3.0-dev-6497de0 [2024-11-24 01:40:03,934 INFO L188 SettingsManager]: Resetting all preferences to default values... [2024-11-24 01:40:04,035 INFO L114 SettingsManager]: Loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d9cbd223-3e19-44a5-b1a1-87e0ec577546/bin/uautomizer-verify-LYvppIcaGC/config/svcomp-Reach-64bit-Automizer_Default.epf [2024-11-24 01:40:04,047 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2024-11-24 01:40:04,047 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2024-11-24 01:40:04,092 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2024-11-24 01:40:04,093 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2024-11-24 01:40:04,094 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2024-11-24 01:40:04,094 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2024-11-24 01:40:04,095 INFO L153 SettingsManager]: * Use memory slicer=true [2024-11-24 01:40:04,096 INFO L151 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2024-11-24 01:40:04,096 INFO L153 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2024-11-24 01:40:04,096 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2024-11-24 01:40:04,097 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2024-11-24 01:40:04,097 INFO L153 SettingsManager]: * Use SBE=true [2024-11-24 01:40:04,097 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2024-11-24 01:40:04,097 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2024-11-24 01:40:04,097 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2024-11-24 01:40:04,097 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2024-11-24 01:40:04,097 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2024-11-24 01:40:04,097 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2024-11-24 01:40:04,097 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2024-11-24 01:40:04,097 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2024-11-24 01:40:04,098 INFO L153 SettingsManager]: * Behaviour of calls to undefined functions=OVERAPPROXIMATE_BEHAVIOUR [2024-11-24 01:40:04,098 INFO L153 SettingsManager]: * Use constant arrays=true [2024-11-24 01:40:04,098 INFO L151 SettingsManager]: Preferences of IcfgBuilder differ from their defaults: [2024-11-24 01:40:04,098 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-11-24 01:40:04,098 INFO L153 SettingsManager]: * Only consider context switches at boundaries of atomic blocks=true [2024-11-24 01:40:04,098 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2024-11-24 01:40:04,098 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2024-11-24 01:40:04,098 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2024-11-24 01:40:04,098 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-11-24 01:40:04,098 INFO L153 SettingsManager]: * Only consider context switches at boundaries of atomic blocks=true [2024-11-24 01:40:04,098 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2024-11-24 01:40:04,099 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2024-11-24 01:40:04,099 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2024-11-24 01:40:04,099 INFO L153 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2024-11-24 01:40:04,099 INFO L153 SettingsManager]: * Compute procedure contracts=false [2024-11-24 01:40:04,099 INFO L153 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopHeads [2024-11-24 01:40:04,099 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2024-11-24 01:40:04,099 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2024-11-24 01:40:04,099 INFO L153 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false [2024-11-24 01:40:04,099 INFO L153 SettingsManager]: * Automaton type used in concurrency analysis=PETRI_NET [2024-11-24 01:40:04,099 INFO L153 SettingsManager]: * Order on configurations for Petri net unfoldings=DBO [2024-11-24 01:40:04,099 INFO L153 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2024-11-24 01:40:04,099 INFO L153 SettingsManager]: * Looper check in Petri net analysis=SEMANTIC Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d9cbd223-3e19-44a5-b1a1-87e0ec577546/bin/uautomizer-verify-LYvppIcaGC Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 5bfb987fcec0e4e87ab47a565086b76b03edc9a60525cd8ee77a0c461c0fdaaa [2024-11-24 01:40:04,427 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2024-11-24 01:40:04,444 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2024-11-24 01:40:04,447 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2024-11-24 01:40:04,449 INFO L270 PluginConnector]: Initializing CDTParser... [2024-11-24 01:40:04,450 INFO L274 PluginConnector]: CDTParser initialized [2024-11-24 01:40:04,452 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d9cbd223-3e19-44a5-b1a1-87e0ec577546/bin/uautomizer-verify-LYvppIcaGC/../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w32_d8_e0.c [2024-11-24 01:40:07,830 INFO L533 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d9cbd223-3e19-44a5-b1a1-87e0ec577546/bin/uautomizer-verify-LYvppIcaGC/data/e3af9dab4/f19723f759764765a14f6d76f10f22a9/FLAG8ea94c2be [2024-11-24 01:40:08,252 INFO L384 CDTParser]: Found 1 translation units. [2024-11-24 01:40:08,256 INFO L180 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d9cbd223-3e19-44a5-b1a1-87e0ec577546/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w32_d8_e0.c [2024-11-24 01:40:08,273 INFO L427 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d9cbd223-3e19-44a5-b1a1-87e0ec577546/bin/uautomizer-verify-LYvppIcaGC/data/e3af9dab4/f19723f759764765a14f6d76f10f22a9/FLAG8ea94c2be [2024-11-24 01:40:08,300 INFO L435 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d9cbd223-3e19-44a5-b1a1-87e0ec577546/bin/uautomizer-verify-LYvppIcaGC/data/e3af9dab4/f19723f759764765a14f6d76f10f22a9 [2024-11-24 01:40:08,303 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2024-11-24 01:40:08,305 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2024-11-24 01:40:08,308 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2024-11-24 01:40:08,308 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2024-11-24 01:40:08,313 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2024-11-24 01:40:08,314 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 24.11 01:40:08" (1/1) ... [2024-11-24 01:40:08,316 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@e77ae02 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.11 01:40:08, skipping insertion in model container [2024-11-24 01:40:08,316 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 24.11 01:40:08" (1/1) ... [2024-11-24 01:40:08,366 INFO L175 MainTranslator]: Built tables and reachable declarations [2024-11-24 01:40:08,580 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d9cbd223-3e19-44a5-b1a1-87e0ec577546/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w32_d8_e0.c[1279,1292] [2024-11-24 01:40:08,793 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-11-24 01:40:08,802 INFO L200 MainTranslator]: Completed pre-run [2024-11-24 01:40:08,811 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d9cbd223-3e19-44a5-b1a1-87e0ec577546/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w32_d8_e0.c[1279,1292] [2024-11-24 01:40:08,971 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-11-24 01:40:08,988 INFO L204 MainTranslator]: Completed translation [2024-11-24 01:40:08,989 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.11 01:40:08 WrapperNode [2024-11-24 01:40:08,989 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2024-11-24 01:40:08,990 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2024-11-24 01:40:08,990 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2024-11-24 01:40:08,990 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2024-11-24 01:40:09,001 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.11 01:40:08" (1/1) ... [2024-11-24 01:40:09,041 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.11 01:40:08" (1/1) ... [2024-11-24 01:40:09,229 INFO L138 Inliner]: procedures = 17, calls = 11, calls flagged for inlining = 3, calls inlined = 3, statements flattened = 1382 [2024-11-24 01:40:09,230 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2024-11-24 01:40:09,231 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2024-11-24 01:40:09,233 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2024-11-24 01:40:09,233 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2024-11-24 01:40:09,243 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.11 01:40:08" (1/1) ... [2024-11-24 01:40:09,243 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.11 01:40:08" (1/1) ... [2024-11-24 01:40:09,275 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.11 01:40:08" (1/1) ... [2024-11-24 01:40:09,343 INFO L175 MemorySlicer]: Split 2 memory accesses to 1 slices as follows [2]. 100 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2]. The 0 writes are split as follows [0]. [2024-11-24 01:40:09,344 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.11 01:40:08" (1/1) ... [2024-11-24 01:40:09,344 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.11 01:40:08" (1/1) ... [2024-11-24 01:40:09,415 INFO L184 PluginConnector]: Executing the observer ReplaceArrayAssignments from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.11 01:40:08" (1/1) ... [2024-11-24 01:40:09,425 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.11 01:40:08" (1/1) ... [2024-11-24 01:40:09,444 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.11 01:40:08" (1/1) ... [2024-11-24 01:40:09,465 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.11 01:40:08" (1/1) ... [2024-11-24 01:40:09,472 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.11 01:40:08" (1/1) ... [2024-11-24 01:40:09,503 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2024-11-24 01:40:09,505 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2024-11-24 01:40:09,505 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2024-11-24 01:40:09,505 INFO L274 PluginConnector]: RCFGBuilder initialized [2024-11-24 01:40:09,507 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.11 01:40:08" (1/1) ... [2024-11-24 01:40:09,516 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2024-11-24 01:40:09,531 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d9cbd223-3e19-44a5-b1a1-87e0ec577546/bin/uautomizer-verify-LYvppIcaGC/z3 [2024-11-24 01:40:09,547 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d9cbd223-3e19-44a5-b1a1-87e0ec577546/bin/uautomizer-verify-LYvppIcaGC/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (exit command is (exit), workingDir is null) [2024-11-24 01:40:09,552 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d9cbd223-3e19-44a5-b1a1-87e0ec577546/bin/uautomizer-verify-LYvppIcaGC/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Waiting until timeout for monitored process [2024-11-24 01:40:09,581 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2024-11-24 01:40:09,581 INFO L130 BoogieDeclarations]: Found specification of procedure assume_abort_if_not [2024-11-24 01:40:09,581 INFO L138 BoogieDeclarations]: Found implementation of procedure assume_abort_if_not [2024-11-24 01:40:09,581 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#0 [2024-11-24 01:40:09,582 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2024-11-24 01:40:09,582 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2024-11-24 01:40:09,815 INFO L234 CfgBuilder]: Building ICFG [2024-11-24 01:40:09,818 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2024-11-24 01:40:12,236 INFO L? ?]: Removed 754 outVars from TransFormulas that were not future-live. [2024-11-24 01:40:12,237 INFO L283 CfgBuilder]: Performing block encoding [2024-11-24 01:40:12,264 INFO L307 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2024-11-24 01:40:12,264 INFO L312 CfgBuilder]: Removed 1 assume(true) statements. [2024-11-24 01:40:12,265 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 24.11 01:40:12 BoogieIcfgContainer [2024-11-24 01:40:12,265 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2024-11-24 01:40:12,267 INFO L112 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2024-11-24 01:40:12,268 INFO L270 PluginConnector]: Initializing TraceAbstraction... [2024-11-24 01:40:12,273 INFO L274 PluginConnector]: TraceAbstraction initialized [2024-11-24 01:40:12,273 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 24.11 01:40:08" (1/3) ... [2024-11-24 01:40:12,274 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@fcb7e92 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 24.11 01:40:12, skipping insertion in model container [2024-11-24 01:40:12,274 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.11 01:40:08" (2/3) ... [2024-11-24 01:40:12,275 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@fcb7e92 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 24.11 01:40:12, skipping insertion in model container [2024-11-24 01:40:12,275 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 24.11 01:40:12" (3/3) ... [2024-11-24 01:40:12,276 INFO L128 eAbstractionObserver]: Analyzing ICFG btor2c-lazyMod.circular_pointer_top_w32_d8_e0.c [2024-11-24 01:40:12,295 INFO L216 ceAbstractionStarter]: Automizer settings: Hoare:LoopHeads NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2024-11-24 01:40:12,297 INFO L151 ceAbstractionStarter]: Applying trace abstraction to ICFG btor2c-lazyMod.circular_pointer_top_w32_d8_e0.c that has 2 procedures, 392 locations, 1 initial locations, 1 loop locations, and 1 error locations. [2024-11-24 01:40:12,384 INFO L332 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2024-11-24 01:40:12,403 INFO L333 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mAutomataTypeConcurrency=PETRI_NET, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopHeads, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@406b88a6, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2024-11-24 01:40:12,403 INFO L334 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2024-11-24 01:40:12,410 INFO L276 IsEmpty]: Start isEmpty. Operand has 392 states, 386 states have (on average 1.4922279792746114) internal successors, (576), 387 states have internal predecessors, (576), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-24 01:40:12,429 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 118 [2024-11-24 01:40:12,430 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 01:40:12,431 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 01:40:12,431 INFO L396 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 01:40:12,438 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 01:40:12,439 INFO L85 PathProgramCache]: Analyzing trace with hash -1934366869, now seen corresponding path program 1 times [2024-11-24 01:40:12,448 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 01:40:12,448 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1047182407] [2024-11-24 01:40:12,449 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 01:40:12,450 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 01:40:12,658 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 01:40:13,062 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-11-24 01:40:13,064 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-24 01:40:13,065 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1047182407] [2024-11-24 01:40:13,067 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1047182407] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-24 01:40:13,068 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2069022174] [2024-11-24 01:40:13,068 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 01:40:13,068 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-24 01:40:13,068 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d9cbd223-3e19-44a5-b1a1-87e0ec577546/bin/uautomizer-verify-LYvppIcaGC/z3 [2024-11-24 01:40:13,074 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d9cbd223-3e19-44a5-b1a1-87e0ec577546/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-24 01:40:13,076 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d9cbd223-3e19-44a5-b1a1-87e0ec577546/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2024-11-24 01:40:13,579 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 01:40:13,585 INFO L256 TraceCheckSpWp]: Trace formula consists of 685 conjuncts, 1 conjuncts are in the unsatisfiable core [2024-11-24 01:40:13,594 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-24 01:40:13,624 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-11-24 01:40:13,628 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-11-24 01:40:13,628 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2069022174] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-24 01:40:13,628 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-11-24 01:40:13,629 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [2] total 2 [2024-11-24 01:40:13,631 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1564545519] [2024-11-24 01:40:13,633 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-24 01:40:13,638 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 2 states [2024-11-24 01:40:13,639 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-24 01:40:13,666 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2024-11-24 01:40:13,667 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2024-11-24 01:40:13,673 INFO L87 Difference]: Start difference. First operand has 392 states, 386 states have (on average 1.4922279792746114) internal successors, (576), 387 states have internal predecessors, (576), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Second operand has 2 states, 2 states have (on average 53.5) internal successors, (107), 2 states have internal predecessors, (107), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 2 states have call successors, (3) [2024-11-24 01:40:13,755 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 01:40:13,757 INFO L93 Difference]: Finished difference Result 711 states and 1061 transitions. [2024-11-24 01:40:13,761 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-11-24 01:40:13,762 INFO L78 Accepts]: Start accepts. Automaton has has 2 states, 2 states have (on average 53.5) internal successors, (107), 2 states have internal predecessors, (107), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 2 states have call successors, (3) Word has length 117 [2024-11-24 01:40:13,763 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 01:40:13,772 INFO L225 Difference]: With dead ends: 711 [2024-11-24 01:40:13,772 INFO L226 Difference]: Without dead ends: 389 [2024-11-24 01:40:13,776 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 118 GetRequests, 118 SyntacticMatches, 0 SemanticMatches, 0 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2024-11-24 01:40:13,779 INFO L435 NwaCegarLoop]: 577 mSDtfsCounter, 0 mSDsluCounter, 0 mSDsCounter, 0 mSdLazyCounter, 0 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 577 SdHoareTripleChecker+Invalid, 0 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 0 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-24 01:40:13,780 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 577 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 0 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-24 01:40:13,801 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 389 states. [2024-11-24 01:40:13,854 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 389 to 389. [2024-11-24 01:40:13,857 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 389 states, 384 states have (on average 1.4869791666666667) internal successors, (571), 384 states have internal predecessors, (571), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-24 01:40:13,866 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 389 states to 389 states and 577 transitions. [2024-11-24 01:40:13,869 INFO L78 Accepts]: Start accepts. Automaton has 389 states and 577 transitions. Word has length 117 [2024-11-24 01:40:13,870 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 01:40:13,870 INFO L471 AbstractCegarLoop]: Abstraction has 389 states and 577 transitions. [2024-11-24 01:40:13,870 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 2 states, 2 states have (on average 53.5) internal successors, (107), 2 states have internal predecessors, (107), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 2 states have call successors, (3) [2024-11-24 01:40:13,871 INFO L276 IsEmpty]: Start isEmpty. Operand 389 states and 577 transitions. [2024-11-24 01:40:13,878 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 118 [2024-11-24 01:40:13,878 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 01:40:13,878 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 01:40:13,892 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d9cbd223-3e19-44a5-b1a1-87e0ec577546/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Forceful destruction successful, exit code 0 [2024-11-24 01:40:14,079 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0,2 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d9cbd223-3e19-44a5-b1a1-87e0ec577546/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-24 01:40:14,079 INFO L396 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 01:40:14,080 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 01:40:14,080 INFO L85 PathProgramCache]: Analyzing trace with hash 504535717, now seen corresponding path program 1 times [2024-11-24 01:40:14,080 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 01:40:14,080 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1074822678] [2024-11-24 01:40:14,080 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 01:40:14,080 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 01:40:14,353 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 01:40:15,501 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-24 01:40:15,501 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-24 01:40:15,501 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1074822678] [2024-11-24 01:40:15,501 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1074822678] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-24 01:40:15,502 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-24 01:40:15,502 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-24 01:40:15,502 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1638511179] [2024-11-24 01:40:15,502 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-24 01:40:15,503 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-24 01:40:15,503 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-24 01:40:15,504 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-24 01:40:15,504 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-24 01:40:15,507 INFO L87 Difference]: Start difference. First operand 389 states and 577 transitions. Second operand has 4 states, 4 states have (on average 26.25) internal successors, (105), 4 states have internal predecessors, (105), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-24 01:40:15,567 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 01:40:15,567 INFO L93 Difference]: Finished difference Result 393 states and 581 transitions. [2024-11-24 01:40:15,567 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-24 01:40:15,568 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 26.25) internal successors, (105), 4 states have internal predecessors, (105), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 117 [2024-11-24 01:40:15,568 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 01:40:15,570 INFO L225 Difference]: With dead ends: 393 [2024-11-24 01:40:15,570 INFO L226 Difference]: Without dead ends: 391 [2024-11-24 01:40:15,571 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-24 01:40:15,572 INFO L435 NwaCegarLoop]: 575 mSDtfsCounter, 0 mSDsluCounter, 1144 mSDsCounter, 0 mSdLazyCounter, 11 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 1719 SdHoareTripleChecker+Invalid, 11 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 11 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-24 01:40:15,572 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 1719 Invalid, 11 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 11 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-24 01:40:15,573 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 391 states. [2024-11-24 01:40:15,590 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 391 to 391. [2024-11-24 01:40:15,592 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 391 states, 386 states have (on average 1.4844559585492227) internal successors, (573), 386 states have internal predecessors, (573), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-24 01:40:15,598 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 391 states to 391 states and 579 transitions. [2024-11-24 01:40:15,598 INFO L78 Accepts]: Start accepts. Automaton has 391 states and 579 transitions. Word has length 117 [2024-11-24 01:40:15,602 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 01:40:15,602 INFO L471 AbstractCegarLoop]: Abstraction has 391 states and 579 transitions. [2024-11-24 01:40:15,602 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 26.25) internal successors, (105), 4 states have internal predecessors, (105), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-24 01:40:15,602 INFO L276 IsEmpty]: Start isEmpty. Operand 391 states and 579 transitions. [2024-11-24 01:40:15,604 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 119 [2024-11-24 01:40:15,605 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 01:40:15,606 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 01:40:15,610 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2024-11-24 01:40:15,610 INFO L396 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 01:40:15,611 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 01:40:15,611 INFO L85 PathProgramCache]: Analyzing trace with hash -1537566187, now seen corresponding path program 1 times [2024-11-24 01:40:15,611 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 01:40:15,611 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [61538823] [2024-11-24 01:40:15,611 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 01:40:15,612 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 01:40:15,782 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 01:40:16,299 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-24 01:40:16,299 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-24 01:40:16,300 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [61538823] [2024-11-24 01:40:16,300 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [61538823] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-24 01:40:16,300 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-24 01:40:16,300 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-24 01:40:16,300 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1484078188] [2024-11-24 01:40:16,300 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-24 01:40:16,301 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-24 01:40:16,301 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-24 01:40:16,301 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-24 01:40:16,301 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-11-24 01:40:16,302 INFO L87 Difference]: Start difference. First operand 391 states and 579 transitions. Second operand has 5 states, 5 states have (on average 21.2) internal successors, (106), 5 states have internal predecessors, (106), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-24 01:40:16,887 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 01:40:16,887 INFO L93 Difference]: Finished difference Result 971 states and 1441 transitions. [2024-11-24 01:40:16,888 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-24 01:40:16,888 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 21.2) internal successors, (106), 5 states have internal predecessors, (106), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 118 [2024-11-24 01:40:16,890 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 01:40:16,892 INFO L225 Difference]: With dead ends: 971 [2024-11-24 01:40:16,892 INFO L226 Difference]: Without dead ends: 391 [2024-11-24 01:40:16,894 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2024-11-24 01:40:16,897 INFO L435 NwaCegarLoop]: 629 mSDtfsCounter, 1090 mSDsluCounter, 1058 mSDsCounter, 0 mSdLazyCounter, 246 mSolverCounterSat, 29 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1090 SdHoareTripleChecker+Valid, 1687 SdHoareTripleChecker+Invalid, 275 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 29 IncrementalHoareTripleChecker+Valid, 246 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2024-11-24 01:40:16,898 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1090 Valid, 1687 Invalid, 275 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [29 Valid, 246 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2024-11-24 01:40:16,900 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 391 states. [2024-11-24 01:40:16,914 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 391 to 391. [2024-11-24 01:40:16,919 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 391 states, 386 states have (on average 1.4818652849740932) internal successors, (572), 386 states have internal predecessors, (572), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-24 01:40:16,921 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 391 states to 391 states and 578 transitions. [2024-11-24 01:40:16,921 INFO L78 Accepts]: Start accepts. Automaton has 391 states and 578 transitions. Word has length 118 [2024-11-24 01:40:16,921 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 01:40:16,922 INFO L471 AbstractCegarLoop]: Abstraction has 391 states and 578 transitions. [2024-11-24 01:40:16,922 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 21.2) internal successors, (106), 5 states have internal predecessors, (106), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-24 01:40:16,922 INFO L276 IsEmpty]: Start isEmpty. Operand 391 states and 578 transitions. [2024-11-24 01:40:16,927 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 120 [2024-11-24 01:40:16,930 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 01:40:16,930 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 01:40:16,930 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2024-11-24 01:40:16,930 INFO L396 AbstractCegarLoop]: === Iteration 4 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 01:40:16,931 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 01:40:16,931 INFO L85 PathProgramCache]: Analyzing trace with hash 930225119, now seen corresponding path program 1 times [2024-11-24 01:40:16,931 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 01:40:16,932 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1855890164] [2024-11-24 01:40:16,932 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 01:40:16,932 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 01:40:17,046 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 01:40:17,414 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-24 01:40:17,414 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-24 01:40:17,414 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1855890164] [2024-11-24 01:40:17,414 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1855890164] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-24 01:40:17,414 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-24 01:40:17,414 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-24 01:40:17,415 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [756254688] [2024-11-24 01:40:17,415 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-24 01:40:17,416 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-24 01:40:17,416 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-24 01:40:17,417 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-24 01:40:17,417 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-24 01:40:17,418 INFO L87 Difference]: Start difference. First operand 391 states and 578 transitions. Second operand has 4 states, 4 states have (on average 26.75) internal successors, (107), 4 states have internal predecessors, (107), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-24 01:40:17,477 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 01:40:17,477 INFO L93 Difference]: Finished difference Result 714 states and 1055 transitions. [2024-11-24 01:40:17,478 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-24 01:40:17,478 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 26.75) internal successors, (107), 4 states have internal predecessors, (107), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 119 [2024-11-24 01:40:17,479 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 01:40:17,480 INFO L225 Difference]: With dead ends: 714 [2024-11-24 01:40:17,480 INFO L226 Difference]: Without dead ends: 393 [2024-11-24 01:40:17,481 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-24 01:40:17,484 INFO L435 NwaCegarLoop]: 574 mSDtfsCounter, 0 mSDsluCounter, 1138 mSDsCounter, 0 mSdLazyCounter, 15 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 1712 SdHoareTripleChecker+Invalid, 15 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 15 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-24 01:40:17,484 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 1712 Invalid, 15 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 15 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-24 01:40:17,485 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 393 states. [2024-11-24 01:40:17,500 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 393 to 393. [2024-11-24 01:40:17,502 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 393 states, 388 states have (on average 1.4793814432989691) internal successors, (574), 388 states have internal predecessors, (574), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-24 01:40:17,505 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 393 states to 393 states and 580 transitions. [2024-11-24 01:40:17,505 INFO L78 Accepts]: Start accepts. Automaton has 393 states and 580 transitions. Word has length 119 [2024-11-24 01:40:17,506 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 01:40:17,506 INFO L471 AbstractCegarLoop]: Abstraction has 393 states and 580 transitions. [2024-11-24 01:40:17,506 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 26.75) internal successors, (107), 4 states have internal predecessors, (107), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-24 01:40:17,507 INFO L276 IsEmpty]: Start isEmpty. Operand 393 states and 580 transitions. [2024-11-24 01:40:17,508 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 121 [2024-11-24 01:40:17,508 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 01:40:17,509 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 01:40:17,509 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3 [2024-11-24 01:40:17,509 INFO L396 AbstractCegarLoop]: === Iteration 5 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 01:40:17,509 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 01:40:17,510 INFO L85 PathProgramCache]: Analyzing trace with hash 1969209588, now seen corresponding path program 1 times [2024-11-24 01:40:17,510 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 01:40:17,511 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [453370786] [2024-11-24 01:40:17,512 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 01:40:17,512 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 01:40:17,680 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 01:40:18,302 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-24 01:40:18,303 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-24 01:40:18,303 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [453370786] [2024-11-24 01:40:18,303 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [453370786] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-24 01:40:18,303 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-24 01:40:18,303 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-24 01:40:18,303 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2043879024] [2024-11-24 01:40:18,303 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-24 01:40:18,304 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-24 01:40:18,306 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-24 01:40:18,306 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-24 01:40:18,307 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-24 01:40:18,307 INFO L87 Difference]: Start difference. First operand 393 states and 580 transitions. Second operand has 4 states, 4 states have (on average 27.0) internal successors, (108), 4 states have internal predecessors, (108), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-24 01:40:18,486 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 01:40:18,486 INFO L93 Difference]: Finished difference Result 716 states and 1056 transitions. [2024-11-24 01:40:18,487 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-24 01:40:18,487 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 27.0) internal successors, (108), 4 states have internal predecessors, (108), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 120 [2024-11-24 01:40:18,487 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 01:40:18,489 INFO L225 Difference]: With dead ends: 716 [2024-11-24 01:40:18,489 INFO L226 Difference]: Without dead ends: 393 [2024-11-24 01:40:18,490 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-11-24 01:40:18,490 INFO L435 NwaCegarLoop]: 534 mSDtfsCounter, 482 mSDsluCounter, 536 mSDsCounter, 0 mSdLazyCounter, 84 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 482 SdHoareTripleChecker+Valid, 1070 SdHoareTripleChecker+Invalid, 84 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 84 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-24 01:40:18,491 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [482 Valid, 1070 Invalid, 84 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 84 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-24 01:40:18,492 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 393 states. [2024-11-24 01:40:18,505 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 393 to 393. [2024-11-24 01:40:18,507 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 393 states, 388 states have (on average 1.4768041237113403) internal successors, (573), 388 states have internal predecessors, (573), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-24 01:40:18,509 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 393 states to 393 states and 579 transitions. [2024-11-24 01:40:18,509 INFO L78 Accepts]: Start accepts. Automaton has 393 states and 579 transitions. Word has length 120 [2024-11-24 01:40:18,510 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 01:40:18,510 INFO L471 AbstractCegarLoop]: Abstraction has 393 states and 579 transitions. [2024-11-24 01:40:18,510 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 27.0) internal successors, (108), 4 states have internal predecessors, (108), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-24 01:40:18,510 INFO L276 IsEmpty]: Start isEmpty. Operand 393 states and 579 transitions. [2024-11-24 01:40:18,512 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 122 [2024-11-24 01:40:18,512 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 01:40:18,512 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 01:40:18,512 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4 [2024-11-24 01:40:18,512 INFO L396 AbstractCegarLoop]: === Iteration 6 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 01:40:18,513 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 01:40:18,513 INFO L85 PathProgramCache]: Analyzing trace with hash -923559006, now seen corresponding path program 1 times [2024-11-24 01:40:18,513 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 01:40:18,513 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [202537870] [2024-11-24 01:40:18,513 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 01:40:18,513 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 01:40:18,623 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 01:40:18,959 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-24 01:40:18,960 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-24 01:40:18,960 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [202537870] [2024-11-24 01:40:18,960 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [202537870] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-24 01:40:18,960 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-24 01:40:18,960 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-24 01:40:18,961 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1617728205] [2024-11-24 01:40:18,961 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-24 01:40:18,961 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-24 01:40:18,961 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-24 01:40:18,962 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-24 01:40:18,962 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-11-24 01:40:18,962 INFO L87 Difference]: Start difference. First operand 393 states and 579 transitions. Second operand has 5 states, 5 states have (on average 21.8) internal successors, (109), 5 states have internal predecessors, (109), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-24 01:40:19,103 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 01:40:19,104 INFO L93 Difference]: Finished difference Result 718 states and 1056 transitions. [2024-11-24 01:40:19,104 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-11-24 01:40:19,105 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 21.8) internal successors, (109), 5 states have internal predecessors, (109), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 121 [2024-11-24 01:40:19,105 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 01:40:19,107 INFO L225 Difference]: With dead ends: 718 [2024-11-24 01:40:19,107 INFO L226 Difference]: Without dead ends: 393 [2024-11-24 01:40:19,108 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2024-11-24 01:40:19,109 INFO L435 NwaCegarLoop]: 568 mSDtfsCounter, 485 mSDsluCounter, 1106 mSDsCounter, 0 mSdLazyCounter, 54 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 485 SdHoareTripleChecker+Valid, 1674 SdHoareTripleChecker+Invalid, 54 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 54 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-24 01:40:19,109 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [485 Valid, 1674 Invalid, 54 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 54 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-24 01:40:19,110 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 393 states. [2024-11-24 01:40:19,120 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 393 to 393. [2024-11-24 01:40:19,121 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 393 states, 388 states have (on average 1.4742268041237114) internal successors, (572), 388 states have internal predecessors, (572), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-24 01:40:19,124 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 393 states to 393 states and 578 transitions. [2024-11-24 01:40:19,124 INFO L78 Accepts]: Start accepts. Automaton has 393 states and 578 transitions. Word has length 121 [2024-11-24 01:40:19,124 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 01:40:19,124 INFO L471 AbstractCegarLoop]: Abstraction has 393 states and 578 transitions. [2024-11-24 01:40:19,125 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 21.8) internal successors, (109), 5 states have internal predecessors, (109), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-24 01:40:19,125 INFO L276 IsEmpty]: Start isEmpty. Operand 393 states and 578 transitions. [2024-11-24 01:40:19,128 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 123 [2024-11-24 01:40:19,128 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 01:40:19,128 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 01:40:19,128 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5 [2024-11-24 01:40:19,129 INFO L396 AbstractCegarLoop]: === Iteration 7 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 01:40:19,129 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 01:40:19,129 INFO L85 PathProgramCache]: Analyzing trace with hash 728541133, now seen corresponding path program 1 times [2024-11-24 01:40:19,129 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 01:40:19,129 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1906027150] [2024-11-24 01:40:19,129 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 01:40:19,129 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 01:40:19,231 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 01:40:19,552 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-24 01:40:19,552 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-24 01:40:19,553 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1906027150] [2024-11-24 01:40:19,553 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1906027150] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-24 01:40:19,553 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-24 01:40:19,553 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-24 01:40:19,553 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [484517953] [2024-11-24 01:40:19,553 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-24 01:40:19,554 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-24 01:40:19,554 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-24 01:40:19,554 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-24 01:40:19,555 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-24 01:40:19,555 INFO L87 Difference]: Start difference. First operand 393 states and 578 transitions. Second operand has 5 states, 5 states have (on average 22.0) internal successors, (110), 5 states have internal predecessors, (110), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-24 01:40:19,712 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 01:40:19,712 INFO L93 Difference]: Finished difference Result 716 states and 1052 transitions. [2024-11-24 01:40:19,713 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-24 01:40:19,713 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 22.0) internal successors, (110), 5 states have internal predecessors, (110), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 122 [2024-11-24 01:40:19,714 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 01:40:19,715 INFO L225 Difference]: With dead ends: 716 [2024-11-24 01:40:19,715 INFO L226 Difference]: Without dead ends: 393 [2024-11-24 01:40:19,716 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-11-24 01:40:19,717 INFO L435 NwaCegarLoop]: 534 mSDtfsCounter, 1033 mSDsluCounter, 536 mSDsCounter, 0 mSdLazyCounter, 80 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1036 SdHoareTripleChecker+Valid, 1070 SdHoareTripleChecker+Invalid, 81 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 80 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-24 01:40:19,717 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1036 Valid, 1070 Invalid, 81 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 80 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-24 01:40:19,718 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 393 states. [2024-11-24 01:40:19,727 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 393 to 393. [2024-11-24 01:40:19,728 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 393 states, 388 states have (on average 1.4716494845360826) internal successors, (571), 388 states have internal predecessors, (571), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-24 01:40:19,730 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 393 states to 393 states and 577 transitions. [2024-11-24 01:40:19,731 INFO L78 Accepts]: Start accepts. Automaton has 393 states and 577 transitions. Word has length 122 [2024-11-24 01:40:19,731 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 01:40:19,731 INFO L471 AbstractCegarLoop]: Abstraction has 393 states and 577 transitions. [2024-11-24 01:40:19,731 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 22.0) internal successors, (110), 5 states have internal predecessors, (110), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-24 01:40:19,731 INFO L276 IsEmpty]: Start isEmpty. Operand 393 states and 577 transitions. [2024-11-24 01:40:19,732 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 124 [2024-11-24 01:40:19,733 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 01:40:19,733 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 01:40:19,733 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6 [2024-11-24 01:40:19,733 INFO L396 AbstractCegarLoop]: === Iteration 8 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 01:40:19,734 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 01:40:19,734 INFO L85 PathProgramCache]: Analyzing trace with hash 187884130, now seen corresponding path program 1 times [2024-11-24 01:40:19,734 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 01:40:19,734 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1929044144] [2024-11-24 01:40:19,734 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 01:40:19,734 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 01:40:19,827 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 01:40:20,179 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-24 01:40:20,180 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-24 01:40:20,180 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1929044144] [2024-11-24 01:40:20,181 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1929044144] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-24 01:40:20,181 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-24 01:40:20,181 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-24 01:40:20,181 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1320242146] [2024-11-24 01:40:20,181 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-24 01:40:20,182 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-24 01:40:20,182 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-24 01:40:20,183 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-24 01:40:20,183 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-24 01:40:20,183 INFO L87 Difference]: Start difference. First operand 393 states and 577 transitions. Second operand has 5 states, 5 states have (on average 22.2) internal successors, (111), 5 states have internal predecessors, (111), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-24 01:40:20,350 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 01:40:20,351 INFO L93 Difference]: Finished difference Result 716 states and 1050 transitions. [2024-11-24 01:40:20,351 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-24 01:40:20,351 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 22.2) internal successors, (111), 5 states have internal predecessors, (111), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 123 [2024-11-24 01:40:20,352 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 01:40:20,354 INFO L225 Difference]: With dead ends: 716 [2024-11-24 01:40:20,354 INFO L226 Difference]: Without dead ends: 393 [2024-11-24 01:40:20,355 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-11-24 01:40:20,356 INFO L435 NwaCegarLoop]: 534 mSDtfsCounter, 555 mSDsluCounter, 543 mSDsCounter, 0 mSdLazyCounter, 78 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 558 SdHoareTripleChecker+Valid, 1077 SdHoareTripleChecker+Invalid, 79 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 78 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-24 01:40:20,357 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [558 Valid, 1077 Invalid, 79 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 78 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-24 01:40:20,359 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 393 states. [2024-11-24 01:40:20,376 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 393 to 393. [2024-11-24 01:40:20,378 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 393 states, 388 states have (on average 1.4690721649484537) internal successors, (570), 388 states have internal predecessors, (570), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-24 01:40:20,381 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 393 states to 393 states and 576 transitions. [2024-11-24 01:40:20,382 INFO L78 Accepts]: Start accepts. Automaton has 393 states and 576 transitions. Word has length 123 [2024-11-24 01:40:20,382 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 01:40:20,382 INFO L471 AbstractCegarLoop]: Abstraction has 393 states and 576 transitions. [2024-11-24 01:40:20,382 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 22.2) internal successors, (111), 5 states have internal predecessors, (111), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-24 01:40:20,382 INFO L276 IsEmpty]: Start isEmpty. Operand 393 states and 576 transitions. [2024-11-24 01:40:20,384 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 125 [2024-11-24 01:40:20,384 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 01:40:20,384 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 01:40:20,384 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7 [2024-11-24 01:40:20,385 INFO L396 AbstractCegarLoop]: === Iteration 9 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 01:40:20,386 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 01:40:20,387 INFO L85 PathProgramCache]: Analyzing trace with hash 358061862, now seen corresponding path program 1 times [2024-11-24 01:40:20,389 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 01:40:20,391 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1514594387] [2024-11-24 01:40:20,392 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 01:40:20,392 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 01:40:20,566 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 01:40:21,022 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-24 01:40:21,023 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-24 01:40:21,024 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1514594387] [2024-11-24 01:40:21,024 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1514594387] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-24 01:40:21,025 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-24 01:40:21,025 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-24 01:40:21,025 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [609325555] [2024-11-24 01:40:21,025 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-24 01:40:21,025 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-24 01:40:21,026 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-24 01:40:21,026 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-24 01:40:21,028 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-24 01:40:21,029 INFO L87 Difference]: Start difference. First operand 393 states and 576 transitions. Second operand has 4 states, 4 states have (on average 28.0) internal successors, (112), 4 states have internal predecessors, (112), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-24 01:40:21,127 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 01:40:21,127 INFO L93 Difference]: Finished difference Result 716 states and 1048 transitions. [2024-11-24 01:40:21,128 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-24 01:40:21,128 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 28.0) internal successors, (112), 4 states have internal predecessors, (112), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 124 [2024-11-24 01:40:21,129 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 01:40:21,130 INFO L225 Difference]: With dead ends: 716 [2024-11-24 01:40:21,130 INFO L226 Difference]: Without dead ends: 393 [2024-11-24 01:40:21,131 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-11-24 01:40:21,132 INFO L435 NwaCegarLoop]: 550 mSDtfsCounter, 483 mSDsluCounter, 552 mSDsCounter, 0 mSdLazyCounter, 42 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 483 SdHoareTripleChecker+Valid, 1102 SdHoareTripleChecker+Invalid, 43 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 42 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-24 01:40:21,132 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [483 Valid, 1102 Invalid, 43 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 42 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-24 01:40:21,133 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 393 states. [2024-11-24 01:40:21,142 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 393 to 393. [2024-11-24 01:40:21,143 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 393 states, 388 states have (on average 1.4639175257731958) internal successors, (568), 388 states have internal predecessors, (568), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-24 01:40:21,146 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 393 states to 393 states and 574 transitions. [2024-11-24 01:40:21,146 INFO L78 Accepts]: Start accepts. Automaton has 393 states and 574 transitions. Word has length 124 [2024-11-24 01:40:21,147 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 01:40:21,147 INFO L471 AbstractCegarLoop]: Abstraction has 393 states and 574 transitions. [2024-11-24 01:40:21,147 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 28.0) internal successors, (112), 4 states have internal predecessors, (112), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-24 01:40:21,147 INFO L276 IsEmpty]: Start isEmpty. Operand 393 states and 574 transitions. [2024-11-24 01:40:21,149 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 127 [2024-11-24 01:40:21,149 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 01:40:21,149 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 01:40:21,149 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8 [2024-11-24 01:40:21,149 INFO L396 AbstractCegarLoop]: === Iteration 10 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 01:40:21,150 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 01:40:21,150 INFO L85 PathProgramCache]: Analyzing trace with hash 1506252195, now seen corresponding path program 1 times [2024-11-24 01:40:21,150 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 01:40:21,150 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1937891687] [2024-11-24 01:40:21,150 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 01:40:21,151 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 01:40:21,251 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 01:40:21,542 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-24 01:40:21,542 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-24 01:40:21,542 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1937891687] [2024-11-24 01:40:21,542 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1937891687] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-24 01:40:21,543 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-24 01:40:21,543 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-24 01:40:21,543 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1977433311] [2024-11-24 01:40:21,543 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-24 01:40:21,543 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-24 01:40:21,543 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-24 01:40:21,544 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-24 01:40:21,544 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-24 01:40:21,545 INFO L87 Difference]: Start difference. First operand 393 states and 574 transitions. Second operand has 5 states, 5 states have (on average 22.8) internal successors, (114), 5 states have internal predecessors, (114), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-24 01:40:21,684 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 01:40:21,684 INFO L93 Difference]: Finished difference Result 716 states and 1044 transitions. [2024-11-24 01:40:21,685 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-24 01:40:21,685 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 22.8) internal successors, (114), 5 states have internal predecessors, (114), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 126 [2024-11-24 01:40:21,686 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 01:40:21,687 INFO L225 Difference]: With dead ends: 716 [2024-11-24 01:40:21,687 INFO L226 Difference]: Without dead ends: 393 [2024-11-24 01:40:21,688 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-11-24 01:40:21,689 INFO L435 NwaCegarLoop]: 550 mSDtfsCounter, 1033 mSDsluCounter, 552 mSDsCounter, 0 mSdLazyCounter, 40 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1036 SdHoareTripleChecker+Valid, 1102 SdHoareTripleChecker+Invalid, 41 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 40 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-24 01:40:21,689 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1036 Valid, 1102 Invalid, 41 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 40 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-24 01:40:21,690 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 393 states. [2024-11-24 01:40:21,700 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 393 to 393. [2024-11-24 01:40:21,701 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 393 states, 388 states have (on average 1.461340206185567) internal successors, (567), 388 states have internal predecessors, (567), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-24 01:40:21,703 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 393 states to 393 states and 573 transitions. [2024-11-24 01:40:21,703 INFO L78 Accepts]: Start accepts. Automaton has 393 states and 573 transitions. Word has length 126 [2024-11-24 01:40:21,704 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 01:40:21,704 INFO L471 AbstractCegarLoop]: Abstraction has 393 states and 573 transitions. [2024-11-24 01:40:21,704 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 22.8) internal successors, (114), 5 states have internal predecessors, (114), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-24 01:40:21,704 INFO L276 IsEmpty]: Start isEmpty. Operand 393 states and 573 transitions. [2024-11-24 01:40:21,706 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 128 [2024-11-24 01:40:21,706 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 01:40:21,706 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 01:40:21,706 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable9 [2024-11-24 01:40:21,707 INFO L396 AbstractCegarLoop]: === Iteration 11 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 01:40:21,707 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 01:40:21,707 INFO L85 PathProgramCache]: Analyzing trace with hash -1413439803, now seen corresponding path program 1 times [2024-11-24 01:40:21,707 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 01:40:21,707 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1007430533] [2024-11-24 01:40:21,708 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 01:40:21,708 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 01:40:21,867 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 01:40:22,327 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-24 01:40:22,327 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-24 01:40:22,327 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1007430533] [2024-11-24 01:40:22,327 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1007430533] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-24 01:40:22,328 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-24 01:40:22,328 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-24 01:40:22,328 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2120053340] [2024-11-24 01:40:22,328 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-24 01:40:22,328 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-24 01:40:22,329 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-24 01:40:22,329 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-24 01:40:22,330 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-24 01:40:22,330 INFO L87 Difference]: Start difference. First operand 393 states and 573 transitions. Second operand has 4 states, 4 states have (on average 28.75) internal successors, (115), 4 states have internal predecessors, (115), 2 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2024-11-24 01:40:22,430 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 01:40:22,430 INFO L93 Difference]: Finished difference Result 716 states and 1042 transitions. [2024-11-24 01:40:22,430 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-24 01:40:22,431 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 28.75) internal successors, (115), 4 states have internal predecessors, (115), 2 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 127 [2024-11-24 01:40:22,431 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 01:40:22,433 INFO L225 Difference]: With dead ends: 716 [2024-11-24 01:40:22,433 INFO L226 Difference]: Without dead ends: 393 [2024-11-24 01:40:22,434 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-11-24 01:40:22,435 INFO L435 NwaCegarLoop]: 553 mSDtfsCounter, 518 mSDsluCounter, 555 mSDsCounter, 0 mSdLazyCounter, 32 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 520 SdHoareTripleChecker+Valid, 1108 SdHoareTripleChecker+Invalid, 32 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 32 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-24 01:40:22,436 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [520 Valid, 1108 Invalid, 32 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 32 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-24 01:40:22,438 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 393 states. [2024-11-24 01:40:22,448 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 393 to 393. [2024-11-24 01:40:22,449 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 393 states, 388 states have (on average 1.458762886597938) internal successors, (566), 388 states have internal predecessors, (566), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-24 01:40:22,451 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 393 states to 393 states and 572 transitions. [2024-11-24 01:40:22,452 INFO L78 Accepts]: Start accepts. Automaton has 393 states and 572 transitions. Word has length 127 [2024-11-24 01:40:22,452 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 01:40:22,452 INFO L471 AbstractCegarLoop]: Abstraction has 393 states and 572 transitions. [2024-11-24 01:40:22,452 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 28.75) internal successors, (115), 4 states have internal predecessors, (115), 2 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2024-11-24 01:40:22,452 INFO L276 IsEmpty]: Start isEmpty. Operand 393 states and 572 transitions. [2024-11-24 01:40:22,454 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 129 [2024-11-24 01:40:22,454 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 01:40:22,457 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 01:40:22,457 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable10 [2024-11-24 01:40:22,457 INFO L396 AbstractCegarLoop]: === Iteration 12 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 01:40:22,457 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 01:40:22,457 INFO L85 PathProgramCache]: Analyzing trace with hash -12372935, now seen corresponding path program 1 times [2024-11-24 01:40:22,458 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 01:40:22,458 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1973938286] [2024-11-24 01:40:22,458 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 01:40:22,458 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 01:40:22,732 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 01:40:23,207 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-24 01:40:23,207 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-24 01:40:23,207 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1973938286] [2024-11-24 01:40:23,207 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1973938286] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-24 01:40:23,207 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-24 01:40:23,208 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-24 01:40:23,208 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1533859378] [2024-11-24 01:40:23,208 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-24 01:40:23,208 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-24 01:40:23,208 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-24 01:40:23,209 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-24 01:40:23,209 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-24 01:40:23,209 INFO L87 Difference]: Start difference. First operand 393 states and 572 transitions. Second operand has 5 states, 5 states have (on average 23.2) internal successors, (116), 5 states have internal predecessors, (116), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-24 01:40:23,372 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 01:40:23,372 INFO L93 Difference]: Finished difference Result 716 states and 1040 transitions. [2024-11-24 01:40:23,373 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-24 01:40:23,374 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 23.2) internal successors, (116), 5 states have internal predecessors, (116), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 128 [2024-11-24 01:40:23,374 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 01:40:23,376 INFO L225 Difference]: With dead ends: 716 [2024-11-24 01:40:23,376 INFO L226 Difference]: Without dead ends: 393 [2024-11-24 01:40:23,377 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-11-24 01:40:23,377 INFO L435 NwaCegarLoop]: 530 mSDtfsCounter, 473 mSDsluCounter, 532 mSDsCounter, 0 mSdLazyCounter, 76 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 473 SdHoareTripleChecker+Valid, 1062 SdHoareTripleChecker+Invalid, 76 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 76 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-24 01:40:23,378 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [473 Valid, 1062 Invalid, 76 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 76 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-24 01:40:23,378 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 393 states. [2024-11-24 01:40:23,389 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 393 to 393. [2024-11-24 01:40:23,390 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 393 states, 388 states have (on average 1.4561855670103092) internal successors, (565), 388 states have internal predecessors, (565), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-24 01:40:23,392 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 393 states to 393 states and 571 transitions. [2024-11-24 01:40:23,393 INFO L78 Accepts]: Start accepts. Automaton has 393 states and 571 transitions. Word has length 128 [2024-11-24 01:40:23,393 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 01:40:23,393 INFO L471 AbstractCegarLoop]: Abstraction has 393 states and 571 transitions. [2024-11-24 01:40:23,393 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 23.2) internal successors, (116), 5 states have internal predecessors, (116), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-24 01:40:23,394 INFO L276 IsEmpty]: Start isEmpty. Operand 393 states and 571 transitions. [2024-11-24 01:40:23,395 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 130 [2024-11-24 01:40:23,395 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 01:40:23,395 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 01:40:23,396 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable11 [2024-11-24 01:40:23,396 INFO L396 AbstractCegarLoop]: === Iteration 13 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 01:40:23,396 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 01:40:23,396 INFO L85 PathProgramCache]: Analyzing trace with hash -1411160021, now seen corresponding path program 1 times [2024-11-24 01:40:23,397 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 01:40:23,397 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1572079117] [2024-11-24 01:40:23,397 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 01:40:23,397 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 01:40:23,646 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 01:40:24,149 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-24 01:40:24,149 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-24 01:40:24,149 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1572079117] [2024-11-24 01:40:24,149 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1572079117] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-24 01:40:24,150 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-24 01:40:24,150 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-24 01:40:24,150 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1633163796] [2024-11-24 01:40:24,150 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-24 01:40:24,150 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-24 01:40:24,151 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-24 01:40:24,151 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-24 01:40:24,151 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-24 01:40:24,152 INFO L87 Difference]: Start difference. First operand 393 states and 571 transitions. Second operand has 4 states, 4 states have (on average 29.25) internal successors, (117), 4 states have internal predecessors, (117), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-24 01:40:24,459 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 01:40:24,459 INFO L93 Difference]: Finished difference Result 718 states and 1040 transitions. [2024-11-24 01:40:24,460 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-24 01:40:24,460 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 29.25) internal successors, (117), 4 states have internal predecessors, (117), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 129 [2024-11-24 01:40:24,461 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 01:40:24,463 INFO L225 Difference]: With dead ends: 718 [2024-11-24 01:40:24,463 INFO L226 Difference]: Without dead ends: 393 [2024-11-24 01:40:24,464 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-24 01:40:24,465 INFO L435 NwaCegarLoop]: 562 mSDtfsCounter, 2 mSDsluCounter, 974 mSDsCounter, 0 mSdLazyCounter, 161 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2 SdHoareTripleChecker+Valid, 1536 SdHoareTripleChecker+Invalid, 161 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 161 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2024-11-24 01:40:24,465 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2 Valid, 1536 Invalid, 161 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 161 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2024-11-24 01:40:24,467 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 393 states. [2024-11-24 01:40:24,478 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 393 to 393. [2024-11-24 01:40:24,479 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 393 states, 388 states have (on average 1.4536082474226804) internal successors, (564), 388 states have internal predecessors, (564), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-24 01:40:24,482 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 393 states to 393 states and 570 transitions. [2024-11-24 01:40:24,482 INFO L78 Accepts]: Start accepts. Automaton has 393 states and 570 transitions. Word has length 129 [2024-11-24 01:40:24,483 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 01:40:24,483 INFO L471 AbstractCegarLoop]: Abstraction has 393 states and 570 transitions. [2024-11-24 01:40:24,483 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 29.25) internal successors, (117), 4 states have internal predecessors, (117), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-24 01:40:24,483 INFO L276 IsEmpty]: Start isEmpty. Operand 393 states and 570 transitions. [2024-11-24 01:40:24,485 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 131 [2024-11-24 01:40:24,485 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 01:40:24,485 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 01:40:24,486 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable12 [2024-11-24 01:40:24,486 INFO L396 AbstractCegarLoop]: === Iteration 14 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 01:40:24,486 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 01:40:24,486 INFO L85 PathProgramCache]: Analyzing trace with hash -1039408138, now seen corresponding path program 1 times [2024-11-24 01:40:24,487 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 01:40:24,487 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [723586339] [2024-11-24 01:40:24,487 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 01:40:24,487 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 01:40:24,695 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 01:40:25,124 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-24 01:40:25,124 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-24 01:40:25,124 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [723586339] [2024-11-24 01:40:25,125 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [723586339] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-24 01:40:25,125 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-24 01:40:25,125 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-24 01:40:25,125 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1674950594] [2024-11-24 01:40:25,125 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-24 01:40:25,126 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-24 01:40:25,126 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-24 01:40:25,126 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-24 01:40:25,126 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-24 01:40:25,127 INFO L87 Difference]: Start difference. First operand 393 states and 570 transitions. Second operand has 5 states, 5 states have (on average 23.6) internal successors, (118), 5 states have internal predecessors, (118), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-24 01:40:25,314 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 01:40:25,314 INFO L93 Difference]: Finished difference Result 716 states and 1036 transitions. [2024-11-24 01:40:25,315 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-24 01:40:25,315 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 23.6) internal successors, (118), 5 states have internal predecessors, (118), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 130 [2024-11-24 01:40:25,316 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 01:40:25,318 INFO L225 Difference]: With dead ends: 716 [2024-11-24 01:40:25,318 INFO L226 Difference]: Without dead ends: 393 [2024-11-24 01:40:25,319 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-11-24 01:40:25,319 INFO L435 NwaCegarLoop]: 529 mSDtfsCounter, 930 mSDsluCounter, 531 mSDsCounter, 0 mSdLazyCounter, 74 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 930 SdHoareTripleChecker+Valid, 1060 SdHoareTripleChecker+Invalid, 74 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 74 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-24 01:40:25,320 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [930 Valid, 1060 Invalid, 74 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 74 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-24 01:40:25,321 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 393 states. [2024-11-24 01:40:25,338 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 393 to 393. [2024-11-24 01:40:25,339 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 393 states, 388 states have (on average 1.4510309278350515) internal successors, (563), 388 states have internal predecessors, (563), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-24 01:40:25,345 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 393 states to 393 states and 569 transitions. [2024-11-24 01:40:25,345 INFO L78 Accepts]: Start accepts. Automaton has 393 states and 569 transitions. Word has length 130 [2024-11-24 01:40:25,346 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 01:40:25,346 INFO L471 AbstractCegarLoop]: Abstraction has 393 states and 569 transitions. [2024-11-24 01:40:25,346 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 23.6) internal successors, (118), 5 states have internal predecessors, (118), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-24 01:40:25,346 INFO L276 IsEmpty]: Start isEmpty. Operand 393 states and 569 transitions. [2024-11-24 01:40:25,348 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 132 [2024-11-24 01:40:25,348 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 01:40:25,348 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 01:40:25,349 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable13 [2024-11-24 01:40:25,349 INFO L396 AbstractCegarLoop]: === Iteration 15 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 01:40:25,349 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 01:40:25,350 INFO L85 PathProgramCache]: Analyzing trace with hash 1963964559, now seen corresponding path program 1 times [2024-11-24 01:40:25,350 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 01:40:25,350 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1665778827] [2024-11-24 01:40:25,350 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 01:40:25,350 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 01:40:25,555 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 01:40:26,016 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-24 01:40:26,017 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-24 01:40:26,017 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1665778827] [2024-11-24 01:40:26,017 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1665778827] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-24 01:40:26,017 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-24 01:40:26,017 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-24 01:40:26,017 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1237951122] [2024-11-24 01:40:26,018 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-24 01:40:26,018 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-24 01:40:26,018 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-24 01:40:26,019 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-24 01:40:26,019 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-24 01:40:26,019 INFO L87 Difference]: Start difference. First operand 393 states and 569 transitions. Second operand has 5 states, 5 states have (on average 23.8) internal successors, (119), 5 states have internal predecessors, (119), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-24 01:40:26,198 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 01:40:26,199 INFO L93 Difference]: Finished difference Result 716 states and 1034 transitions. [2024-11-24 01:40:26,199 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-24 01:40:26,200 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 23.8) internal successors, (119), 5 states have internal predecessors, (119), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 131 [2024-11-24 01:40:26,200 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 01:40:26,202 INFO L225 Difference]: With dead ends: 716 [2024-11-24 01:40:26,202 INFO L226 Difference]: Without dead ends: 393 [2024-11-24 01:40:26,203 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-11-24 01:40:26,204 INFO L435 NwaCegarLoop]: 529 mSDtfsCounter, 466 mSDsluCounter, 538 mSDsCounter, 0 mSdLazyCounter, 72 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 466 SdHoareTripleChecker+Valid, 1067 SdHoareTripleChecker+Invalid, 72 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 72 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-24 01:40:26,204 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [466 Valid, 1067 Invalid, 72 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 72 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-24 01:40:26,205 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 393 states. [2024-11-24 01:40:26,217 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 393 to 393. [2024-11-24 01:40:26,217 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 393 states, 388 states have (on average 1.4484536082474226) internal successors, (562), 388 states have internal predecessors, (562), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-24 01:40:26,220 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 393 states to 393 states and 568 transitions. [2024-11-24 01:40:26,220 INFO L78 Accepts]: Start accepts. Automaton has 393 states and 568 transitions. Word has length 131 [2024-11-24 01:40:26,220 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 01:40:26,220 INFO L471 AbstractCegarLoop]: Abstraction has 393 states and 568 transitions. [2024-11-24 01:40:26,221 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 23.8) internal successors, (119), 5 states have internal predecessors, (119), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-24 01:40:26,221 INFO L276 IsEmpty]: Start isEmpty. Operand 393 states and 568 transitions. [2024-11-24 01:40:26,222 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 133 [2024-11-24 01:40:26,222 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 01:40:26,222 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 01:40:26,222 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable14 [2024-11-24 01:40:26,222 INFO L396 AbstractCegarLoop]: === Iteration 16 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 01:40:26,223 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 01:40:26,223 INFO L85 PathProgramCache]: Analyzing trace with hash -1513937355, now seen corresponding path program 1 times [2024-11-24 01:40:26,223 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 01:40:26,223 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [737191775] [2024-11-24 01:40:26,223 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 01:40:26,223 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 01:40:26,418 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 01:40:26,641 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-24 01:40:26,642 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-24 01:40:26,642 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [737191775] [2024-11-24 01:40:26,643 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [737191775] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-24 01:40:26,643 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-24 01:40:26,643 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-24 01:40:26,643 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2064288870] [2024-11-24 01:40:26,643 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-24 01:40:26,643 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-24 01:40:26,643 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-24 01:40:26,644 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-24 01:40:26,644 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-24 01:40:26,645 INFO L87 Difference]: Start difference. First operand 393 states and 568 transitions. Second operand has 4 states, 4 states have (on average 30.0) internal successors, (120), 4 states have internal predecessors, (120), 2 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2024-11-24 01:40:26,736 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 01:40:26,737 INFO L93 Difference]: Finished difference Result 716 states and 1032 transitions. [2024-11-24 01:40:26,737 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-24 01:40:26,737 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 30.0) internal successors, (120), 4 states have internal predecessors, (120), 2 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 132 [2024-11-24 01:40:26,738 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 01:40:26,739 INFO L225 Difference]: With dead ends: 716 [2024-11-24 01:40:26,739 INFO L226 Difference]: Without dead ends: 393 [2024-11-24 01:40:26,740 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-11-24 01:40:26,742 INFO L435 NwaCegarLoop]: 549 mSDtfsCounter, 512 mSDsluCounter, 551 mSDsCounter, 0 mSdLazyCounter, 30 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 514 SdHoareTripleChecker+Valid, 1100 SdHoareTripleChecker+Invalid, 30 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 30 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-24 01:40:26,743 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [514 Valid, 1100 Invalid, 30 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 30 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-24 01:40:26,744 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 393 states. [2024-11-24 01:40:26,754 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 393 to 393. [2024-11-24 01:40:26,755 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 393 states, 388 states have (on average 1.4458762886597938) internal successors, (561), 388 states have internal predecessors, (561), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-24 01:40:26,757 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 393 states to 393 states and 567 transitions. [2024-11-24 01:40:26,758 INFO L78 Accepts]: Start accepts. Automaton has 393 states and 567 transitions. Word has length 132 [2024-11-24 01:40:26,758 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 01:40:26,758 INFO L471 AbstractCegarLoop]: Abstraction has 393 states and 567 transitions. [2024-11-24 01:40:26,758 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 30.0) internal successors, (120), 4 states have internal predecessors, (120), 2 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2024-11-24 01:40:26,758 INFO L276 IsEmpty]: Start isEmpty. Operand 393 states and 567 transitions. [2024-11-24 01:40:26,760 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 134 [2024-11-24 01:40:26,760 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 01:40:26,761 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 01:40:26,761 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable15 [2024-11-24 01:40:26,761 INFO L396 AbstractCegarLoop]: === Iteration 17 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 01:40:26,762 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 01:40:26,762 INFO L85 PathProgramCache]: Analyzing trace with hash -946071650, now seen corresponding path program 1 times [2024-11-24 01:40:26,762 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 01:40:26,763 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1508859649] [2024-11-24 01:40:26,763 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 01:40:26,763 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 01:40:26,967 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 01:40:28,121 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-24 01:40:28,121 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-24 01:40:28,121 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1508859649] [2024-11-24 01:40:28,121 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1508859649] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-24 01:40:28,121 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-24 01:40:28,122 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2024-11-24 01:40:28,122 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1130718191] [2024-11-24 01:40:28,122 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-24 01:40:28,122 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2024-11-24 01:40:28,122 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-24 01:40:28,123 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-11-24 01:40:28,123 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2024-11-24 01:40:28,123 INFO L87 Difference]: Start difference. First operand 393 states and 567 transitions. Second operand has 7 states, 7 states have (on average 17.285714285714285) internal successors, (121), 7 states have internal predecessors, (121), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-24 01:40:28,652 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 01:40:28,652 INFO L93 Difference]: Finished difference Result 780 states and 1123 transitions. [2024-11-24 01:40:28,653 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2024-11-24 01:40:28,653 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 17.285714285714285) internal successors, (121), 7 states have internal predecessors, (121), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 133 [2024-11-24 01:40:28,653 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 01:40:28,656 INFO L225 Difference]: With dead ends: 780 [2024-11-24 01:40:28,656 INFO L226 Difference]: Without dead ends: 397 [2024-11-24 01:40:28,657 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=27, Invalid=83, Unknown=0, NotChecked=0, Total=110 [2024-11-24 01:40:28,658 INFO L435 NwaCegarLoop]: 540 mSDtfsCounter, 642 mSDsluCounter, 2022 mSDsCounter, 0 mSdLazyCounter, 255 mSolverCounterSat, 8 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 645 SdHoareTripleChecker+Valid, 2562 SdHoareTripleChecker+Invalid, 263 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 8 IncrementalHoareTripleChecker+Valid, 255 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2024-11-24 01:40:28,658 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [645 Valid, 2562 Invalid, 263 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [8 Valid, 255 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2024-11-24 01:40:28,659 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 397 states. [2024-11-24 01:40:28,672 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 397 to 395. [2024-11-24 01:40:28,673 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 395 states, 390 states have (on average 1.4435897435897436) internal successors, (563), 390 states have internal predecessors, (563), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-24 01:40:28,676 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 395 states to 395 states and 569 transitions. [2024-11-24 01:40:28,676 INFO L78 Accepts]: Start accepts. Automaton has 395 states and 569 transitions. Word has length 133 [2024-11-24 01:40:28,677 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 01:40:28,677 INFO L471 AbstractCegarLoop]: Abstraction has 395 states and 569 transitions. [2024-11-24 01:40:28,677 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 17.285714285714285) internal successors, (121), 7 states have internal predecessors, (121), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-24 01:40:28,677 INFO L276 IsEmpty]: Start isEmpty. Operand 395 states and 569 transitions. [2024-11-24 01:40:28,678 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 135 [2024-11-24 01:40:28,679 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 01:40:28,679 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 01:40:28,679 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable16 [2024-11-24 01:40:28,679 INFO L396 AbstractCegarLoop]: === Iteration 18 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 01:40:28,680 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 01:40:28,680 INFO L85 PathProgramCache]: Analyzing trace with hash 2020339687, now seen corresponding path program 1 times [2024-11-24 01:40:28,680 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 01:40:28,680 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [318136930] [2024-11-24 01:40:28,681 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 01:40:28,681 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 01:40:28,893 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 01:40:29,741 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-24 01:40:29,742 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-24 01:40:29,742 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [318136930] [2024-11-24 01:40:29,742 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [318136930] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-24 01:40:29,742 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-24 01:40:29,742 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-11-24 01:40:29,742 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [820060785] [2024-11-24 01:40:29,743 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-24 01:40:29,743 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-11-24 01:40:29,743 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-24 01:40:29,744 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-11-24 01:40:29,744 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2024-11-24 01:40:29,745 INFO L87 Difference]: Start difference. First operand 395 states and 569 transitions. Second operand has 6 states, 6 states have (on average 20.333333333333332) internal successors, (122), 6 states have internal predecessors, (122), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-24 01:40:29,921 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 01:40:29,921 INFO L93 Difference]: Finished difference Result 842 states and 1202 transitions. [2024-11-24 01:40:29,922 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-24 01:40:29,922 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 20.333333333333332) internal successors, (122), 6 states have internal predecessors, (122), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 134 [2024-11-24 01:40:29,923 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 01:40:29,925 INFO L225 Difference]: With dead ends: 842 [2024-11-24 01:40:29,925 INFO L226 Difference]: Without dead ends: 517 [2024-11-24 01:40:29,926 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=23, Invalid=49, Unknown=0, NotChecked=0, Total=72 [2024-11-24 01:40:29,927 INFO L435 NwaCegarLoop]: 551 mSDtfsCounter, 857 mSDsluCounter, 1647 mSDsCounter, 0 mSdLazyCounter, 60 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 860 SdHoareTripleChecker+Valid, 2198 SdHoareTripleChecker+Invalid, 63 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 60 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-24 01:40:29,927 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [860 Valid, 2198 Invalid, 63 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 60 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-24 01:40:29,928 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 517 states. [2024-11-24 01:40:29,948 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 517 to 517. [2024-11-24 01:40:29,949 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 517 states, 509 states have (on average 1.4223968565815324) internal successors, (724), 509 states have internal predecessors, (724), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-11-24 01:40:29,952 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 517 states to 517 states and 736 transitions. [2024-11-24 01:40:29,953 INFO L78 Accepts]: Start accepts. Automaton has 517 states and 736 transitions. Word has length 134 [2024-11-24 01:40:29,953 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 01:40:29,953 INFO L471 AbstractCegarLoop]: Abstraction has 517 states and 736 transitions. [2024-11-24 01:40:29,954 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 20.333333333333332) internal successors, (122), 6 states have internal predecessors, (122), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-24 01:40:29,954 INFO L276 IsEmpty]: Start isEmpty. Operand 517 states and 736 transitions. [2024-11-24 01:40:29,958 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 323 [2024-11-24 01:40:29,959 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 01:40:29,959 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 01:40:29,959 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable17 [2024-11-24 01:40:29,960 INFO L396 AbstractCegarLoop]: === Iteration 19 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 01:40:29,960 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 01:40:29,960 INFO L85 PathProgramCache]: Analyzing trace with hash -545067660, now seen corresponding path program 1 times [2024-11-24 01:40:29,960 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 01:40:29,961 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1495097543] [2024-11-24 01:40:29,961 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 01:40:29,961 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 01:40:30,277 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 01:40:31,049 INFO L134 CoverageAnalysis]: Checked inductivity of 143 backedges. 83 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-24 01:40:31,050 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-24 01:40:31,050 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1495097543] [2024-11-24 01:40:31,050 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1495097543] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-24 01:40:31,050 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-24 01:40:31,050 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-24 01:40:31,050 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [641602353] [2024-11-24 01:40:31,051 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-24 01:40:31,051 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-24 01:40:31,051 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-24 01:40:31,052 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-24 01:40:31,053 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-24 01:40:31,053 INFO L87 Difference]: Start difference. First operand 517 states and 736 transitions. Second operand has 5 states, 5 states have (on average 59.0) internal successors, (295), 5 states have internal predecessors, (295), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-24 01:40:31,207 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 01:40:31,207 INFO L93 Difference]: Finished difference Result 842 states and 1201 transitions. [2024-11-24 01:40:31,208 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-24 01:40:31,208 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 59.0) internal successors, (295), 5 states have internal predecessors, (295), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 322 [2024-11-24 01:40:31,209 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 01:40:31,212 INFO L225 Difference]: With dead ends: 842 [2024-11-24 01:40:31,212 INFO L226 Difference]: Without dead ends: 517 [2024-11-24 01:40:31,213 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-11-24 01:40:31,213 INFO L435 NwaCegarLoop]: 528 mSDtfsCounter, 938 mSDsluCounter, 530 mSDsCounter, 0 mSdLazyCounter, 70 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 941 SdHoareTripleChecker+Valid, 1058 SdHoareTripleChecker+Invalid, 71 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 70 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-24 01:40:31,214 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [941 Valid, 1058 Invalid, 71 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 70 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-24 01:40:31,216 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 517 states. [2024-11-24 01:40:31,237 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 517 to 517. [2024-11-24 01:40:31,238 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 517 states, 509 states have (on average 1.4204322200392927) internal successors, (723), 509 states have internal predecessors, (723), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-11-24 01:40:31,241 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 517 states to 517 states and 735 transitions. [2024-11-24 01:40:31,242 INFO L78 Accepts]: Start accepts. Automaton has 517 states and 735 transitions. Word has length 322 [2024-11-24 01:40:31,242 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 01:40:31,243 INFO L471 AbstractCegarLoop]: Abstraction has 517 states and 735 transitions. [2024-11-24 01:40:31,243 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 59.0) internal successors, (295), 5 states have internal predecessors, (295), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-24 01:40:31,243 INFO L276 IsEmpty]: Start isEmpty. Operand 517 states and 735 transitions. [2024-11-24 01:40:31,249 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 324 [2024-11-24 01:40:31,249 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 01:40:31,250 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 01:40:31,250 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable18 [2024-11-24 01:40:31,250 INFO L396 AbstractCegarLoop]: === Iteration 20 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 01:40:31,251 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 01:40:31,251 INFO L85 PathProgramCache]: Analyzing trace with hash 344496768, now seen corresponding path program 1 times [2024-11-24 01:40:31,251 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 01:40:31,251 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [774100857] [2024-11-24 01:40:31,251 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 01:40:31,251 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 01:40:31,661 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 01:40:32,374 INFO L134 CoverageAnalysis]: Checked inductivity of 143 backedges. 83 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-24 01:40:32,374 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-24 01:40:32,375 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [774100857] [2024-11-24 01:40:32,375 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [774100857] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-24 01:40:32,375 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-24 01:40:32,375 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-24 01:40:32,375 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [884990298] [2024-11-24 01:40:32,375 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-24 01:40:32,376 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-24 01:40:32,376 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-24 01:40:32,377 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-24 01:40:32,377 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-24 01:40:32,377 INFO L87 Difference]: Start difference. First operand 517 states and 735 transitions. Second operand has 5 states, 5 states have (on average 59.2) internal successors, (296), 5 states have internal predecessors, (296), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-24 01:40:32,523 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 01:40:32,524 INFO L93 Difference]: Finished difference Result 842 states and 1199 transitions. [2024-11-24 01:40:32,524 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-24 01:40:32,524 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 59.2) internal successors, (296), 5 states have internal predecessors, (296), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 323 [2024-11-24 01:40:32,525 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 01:40:32,527 INFO L225 Difference]: With dead ends: 842 [2024-11-24 01:40:32,528 INFO L226 Difference]: Without dead ends: 517 [2024-11-24 01:40:32,528 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-11-24 01:40:32,529 INFO L435 NwaCegarLoop]: 528 mSDtfsCounter, 922 mSDsluCounter, 530 mSDsCounter, 0 mSdLazyCounter, 68 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 925 SdHoareTripleChecker+Valid, 1058 SdHoareTripleChecker+Invalid, 69 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 68 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-24 01:40:32,529 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [925 Valid, 1058 Invalid, 69 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 68 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-24 01:40:32,531 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 517 states. [2024-11-24 01:40:32,550 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 517 to 517. [2024-11-24 01:40:32,551 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 517 states, 509 states have (on average 1.418467583497053) internal successors, (722), 509 states have internal predecessors, (722), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-11-24 01:40:32,554 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 517 states to 517 states and 734 transitions. [2024-11-24 01:40:32,555 INFO L78 Accepts]: Start accepts. Automaton has 517 states and 734 transitions. Word has length 323 [2024-11-24 01:40:32,555 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 01:40:32,555 INFO L471 AbstractCegarLoop]: Abstraction has 517 states and 734 transitions. [2024-11-24 01:40:32,555 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 59.2) internal successors, (296), 5 states have internal predecessors, (296), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-24 01:40:32,556 INFO L276 IsEmpty]: Start isEmpty. Operand 517 states and 734 transitions. [2024-11-24 01:40:32,560 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 325 [2024-11-24 01:40:32,560 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 01:40:32,561 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 01:40:32,561 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable19 [2024-11-24 01:40:32,561 INFO L396 AbstractCegarLoop]: === Iteration 21 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 01:40:32,561 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 01:40:32,562 INFO L85 PathProgramCache]: Analyzing trace with hash 492464095, now seen corresponding path program 1 times [2024-11-24 01:40:32,562 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 01:40:32,562 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1547461960] [2024-11-24 01:40:32,562 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 01:40:32,562 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 01:40:32,930 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 01:40:33,627 INFO L134 CoverageAnalysis]: Checked inductivity of 143 backedges. 83 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-24 01:40:33,627 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-24 01:40:33,627 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1547461960] [2024-11-24 01:40:33,628 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1547461960] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-24 01:40:33,628 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-24 01:40:33,628 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-24 01:40:33,628 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2010233377] [2024-11-24 01:40:33,628 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-24 01:40:33,629 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-24 01:40:33,629 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-24 01:40:33,630 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-24 01:40:33,630 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-24 01:40:33,630 INFO L87 Difference]: Start difference. First operand 517 states and 734 transitions. Second operand has 5 states, 5 states have (on average 59.4) internal successors, (297), 5 states have internal predecessors, (297), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-24 01:40:33,764 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 01:40:33,765 INFO L93 Difference]: Finished difference Result 842 states and 1197 transitions. [2024-11-24 01:40:33,765 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-24 01:40:33,766 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 59.4) internal successors, (297), 5 states have internal predecessors, (297), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 324 [2024-11-24 01:40:33,766 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 01:40:33,769 INFO L225 Difference]: With dead ends: 842 [2024-11-24 01:40:33,769 INFO L226 Difference]: Without dead ends: 517 [2024-11-24 01:40:33,769 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-11-24 01:40:33,770 INFO L435 NwaCegarLoop]: 528 mSDtfsCounter, 906 mSDsluCounter, 530 mSDsCounter, 0 mSdLazyCounter, 66 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 909 SdHoareTripleChecker+Valid, 1058 SdHoareTripleChecker+Invalid, 67 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 66 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-24 01:40:33,771 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [909 Valid, 1058 Invalid, 67 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 66 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-24 01:40:33,772 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 517 states. [2024-11-24 01:40:33,788 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 517 to 517. [2024-11-24 01:40:33,789 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 517 states, 509 states have (on average 1.4165029469548134) internal successors, (721), 509 states have internal predecessors, (721), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-11-24 01:40:33,792 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 517 states to 517 states and 733 transitions. [2024-11-24 01:40:33,792 INFO L78 Accepts]: Start accepts. Automaton has 517 states and 733 transitions. Word has length 324 [2024-11-24 01:40:33,793 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 01:40:33,793 INFO L471 AbstractCegarLoop]: Abstraction has 517 states and 733 transitions. [2024-11-24 01:40:33,793 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 59.4) internal successors, (297), 5 states have internal predecessors, (297), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-24 01:40:33,793 INFO L276 IsEmpty]: Start isEmpty. Operand 517 states and 733 transitions. [2024-11-24 01:40:33,797 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 326 [2024-11-24 01:40:33,798 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 01:40:33,798 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 01:40:33,798 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable20 [2024-11-24 01:40:33,798 INFO L396 AbstractCegarLoop]: === Iteration 22 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 01:40:33,799 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 01:40:33,799 INFO L85 PathProgramCache]: Analyzing trace with hash -590877813, now seen corresponding path program 1 times [2024-11-24 01:40:33,799 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 01:40:33,799 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [21256028] [2024-11-24 01:40:33,799 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 01:40:33,799 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 01:40:34,120 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 01:40:34,701 INFO L134 CoverageAnalysis]: Checked inductivity of 143 backedges. 83 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-24 01:40:34,701 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-24 01:40:34,701 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [21256028] [2024-11-24 01:40:34,701 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [21256028] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-24 01:40:34,701 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-24 01:40:34,702 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-24 01:40:34,702 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [21997803] [2024-11-24 01:40:34,702 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-24 01:40:34,702 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-24 01:40:34,702 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-24 01:40:34,704 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-24 01:40:34,704 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-24 01:40:34,704 INFO L87 Difference]: Start difference. First operand 517 states and 733 transitions. Second operand has 5 states, 5 states have (on average 59.6) internal successors, (298), 5 states have internal predecessors, (298), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-24 01:40:34,833 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 01:40:34,833 INFO L93 Difference]: Finished difference Result 842 states and 1195 transitions. [2024-11-24 01:40:34,834 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-24 01:40:34,834 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 59.6) internal successors, (298), 5 states have internal predecessors, (298), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 325 [2024-11-24 01:40:34,838 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 01:40:34,840 INFO L225 Difference]: With dead ends: 842 [2024-11-24 01:40:34,840 INFO L226 Difference]: Without dead ends: 517 [2024-11-24 01:40:34,841 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-11-24 01:40:34,842 INFO L435 NwaCegarLoop]: 528 mSDtfsCounter, 491 mSDsluCounter, 537 mSDsCounter, 0 mSdLazyCounter, 64 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 494 SdHoareTripleChecker+Valid, 1065 SdHoareTripleChecker+Invalid, 65 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 64 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-24 01:40:34,843 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [494 Valid, 1065 Invalid, 65 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 64 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-24 01:40:34,844 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 517 states. [2024-11-24 01:40:34,863 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 517 to 517. [2024-11-24 01:40:34,864 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 517 states, 509 states have (on average 1.4145383104125737) internal successors, (720), 509 states have internal predecessors, (720), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-11-24 01:40:34,867 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 517 states to 517 states and 732 transitions. [2024-11-24 01:40:34,869 INFO L78 Accepts]: Start accepts. Automaton has 517 states and 732 transitions. Word has length 325 [2024-11-24 01:40:34,869 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 01:40:34,869 INFO L471 AbstractCegarLoop]: Abstraction has 517 states and 732 transitions. [2024-11-24 01:40:34,870 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 59.6) internal successors, (298), 5 states have internal predecessors, (298), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-24 01:40:34,871 INFO L276 IsEmpty]: Start isEmpty. Operand 517 states and 732 transitions. [2024-11-24 01:40:34,876 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 327 [2024-11-24 01:40:34,876 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 01:40:34,876 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 01:40:34,876 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable21 [2024-11-24 01:40:34,877 INFO L396 AbstractCegarLoop]: === Iteration 23 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 01:40:34,877 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 01:40:34,878 INFO L85 PathProgramCache]: Analyzing trace with hash 47349450, now seen corresponding path program 1 times [2024-11-24 01:40:34,878 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 01:40:34,878 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [804652921] [2024-11-24 01:40:34,878 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 01:40:34,878 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 01:40:35,202 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 01:40:35,853 INFO L134 CoverageAnalysis]: Checked inductivity of 143 backedges. 83 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-24 01:40:35,853 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-24 01:40:35,853 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [804652921] [2024-11-24 01:40:35,854 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [804652921] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-24 01:40:35,854 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-24 01:40:35,854 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-24 01:40:35,854 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [860874188] [2024-11-24 01:40:35,854 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-24 01:40:35,854 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-24 01:40:35,855 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-24 01:40:35,857 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-24 01:40:35,857 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-24 01:40:35,858 INFO L87 Difference]: Start difference. First operand 517 states and 732 transitions. Second operand has 5 states, 5 states have (on average 59.8) internal successors, (299), 5 states have internal predecessors, (299), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-24 01:40:35,983 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 01:40:35,983 INFO L93 Difference]: Finished difference Result 842 states and 1193 transitions. [2024-11-24 01:40:35,984 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-24 01:40:35,984 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 59.8) internal successors, (299), 5 states have internal predecessors, (299), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 326 [2024-11-24 01:40:35,985 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 01:40:35,987 INFO L225 Difference]: With dead ends: 842 [2024-11-24 01:40:35,987 INFO L226 Difference]: Without dead ends: 517 [2024-11-24 01:40:35,988 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-11-24 01:40:35,988 INFO L435 NwaCegarLoop]: 540 mSDtfsCounter, 867 mSDsluCounter, 542 mSDsCounter, 0 mSdLazyCounter, 38 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 870 SdHoareTripleChecker+Valid, 1082 SdHoareTripleChecker+Invalid, 39 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 38 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-24 01:40:35,989 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [870 Valid, 1082 Invalid, 39 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 38 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-24 01:40:35,990 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 517 states. [2024-11-24 01:40:36,008 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 517 to 517. [2024-11-24 01:40:36,009 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 517 states, 509 states have (on average 1.412573673870334) internal successors, (719), 509 states have internal predecessors, (719), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-11-24 01:40:36,012 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 517 states to 517 states and 731 transitions. [2024-11-24 01:40:36,012 INFO L78 Accepts]: Start accepts. Automaton has 517 states and 731 transitions. Word has length 326 [2024-11-24 01:40:36,013 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 01:40:36,013 INFO L471 AbstractCegarLoop]: Abstraction has 517 states and 731 transitions. [2024-11-24 01:40:36,013 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 59.8) internal successors, (299), 5 states have internal predecessors, (299), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-24 01:40:36,014 INFO L276 IsEmpty]: Start isEmpty. Operand 517 states and 731 transitions. [2024-11-24 01:40:36,018 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 328 [2024-11-24 01:40:36,018 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 01:40:36,019 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 01:40:36,019 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable22 [2024-11-24 01:40:36,019 INFO L396 AbstractCegarLoop]: === Iteration 24 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 01:40:36,020 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 01:40:36,020 INFO L85 PathProgramCache]: Analyzing trace with hash -421125866, now seen corresponding path program 1 times [2024-11-24 01:40:36,020 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 01:40:36,020 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [280531534] [2024-11-24 01:40:36,021 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 01:40:36,021 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 01:40:36,345 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 01:40:37,058 INFO L134 CoverageAnalysis]: Checked inductivity of 143 backedges. 83 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-24 01:40:37,058 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-24 01:40:37,058 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [280531534] [2024-11-24 01:40:37,058 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [280531534] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-24 01:40:37,058 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-24 01:40:37,059 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-24 01:40:37,059 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [745301351] [2024-11-24 01:40:37,059 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-24 01:40:37,060 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-24 01:40:37,060 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-24 01:40:37,061 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-24 01:40:37,061 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-24 01:40:37,061 INFO L87 Difference]: Start difference. First operand 517 states and 731 transitions. Second operand has 5 states, 5 states have (on average 60.0) internal successors, (300), 5 states have internal predecessors, (300), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-24 01:40:37,185 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 01:40:37,185 INFO L93 Difference]: Finished difference Result 842 states and 1191 transitions. [2024-11-24 01:40:37,186 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-24 01:40:37,186 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 60.0) internal successors, (300), 5 states have internal predecessors, (300), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 327 [2024-11-24 01:40:37,187 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 01:40:37,190 INFO L225 Difference]: With dead ends: 842 [2024-11-24 01:40:37,190 INFO L226 Difference]: Without dead ends: 517 [2024-11-24 01:40:37,191 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-11-24 01:40:37,192 INFO L435 NwaCegarLoop]: 540 mSDtfsCounter, 468 mSDsluCounter, 549 mSDsCounter, 0 mSdLazyCounter, 36 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 471 SdHoareTripleChecker+Valid, 1089 SdHoareTripleChecker+Invalid, 37 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 36 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-24 01:40:37,192 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [471 Valid, 1089 Invalid, 37 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 36 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-24 01:40:37,194 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 517 states. [2024-11-24 01:40:37,219 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 517 to 517. [2024-11-24 01:40:37,220 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 517 states, 509 states have (on average 1.4106090373280944) internal successors, (718), 509 states have internal predecessors, (718), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-11-24 01:40:37,224 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 517 states to 517 states and 730 transitions. [2024-11-24 01:40:37,227 INFO L78 Accepts]: Start accepts. Automaton has 517 states and 730 transitions. Word has length 327 [2024-11-24 01:40:37,227 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 01:40:37,228 INFO L471 AbstractCegarLoop]: Abstraction has 517 states and 730 transitions. [2024-11-24 01:40:37,228 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 60.0) internal successors, (300), 5 states have internal predecessors, (300), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-24 01:40:37,228 INFO L276 IsEmpty]: Start isEmpty. Operand 517 states and 730 transitions. [2024-11-24 01:40:37,235 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 329 [2024-11-24 01:40:37,236 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 01:40:37,236 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 01:40:37,236 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable23 [2024-11-24 01:40:37,237 INFO L396 AbstractCegarLoop]: === Iteration 25 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 01:40:37,238 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 01:40:37,238 INFO L85 PathProgramCache]: Analyzing trace with hash -1883442635, now seen corresponding path program 1 times [2024-11-24 01:40:37,238 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 01:40:37,238 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2075943938] [2024-11-24 01:40:37,238 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 01:40:37,239 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 01:40:37,667 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 01:40:38,327 INFO L134 CoverageAnalysis]: Checked inductivity of 143 backedges. 83 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-24 01:40:38,328 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-24 01:40:38,328 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2075943938] [2024-11-24 01:40:38,328 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2075943938] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-24 01:40:38,328 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-24 01:40:38,328 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-24 01:40:38,328 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1175847715] [2024-11-24 01:40:38,328 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-24 01:40:38,329 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-24 01:40:38,329 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-24 01:40:38,330 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-24 01:40:38,330 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-24 01:40:38,331 INFO L87 Difference]: Start difference. First operand 517 states and 730 transitions. Second operand has 5 states, 5 states have (on average 60.2) internal successors, (301), 5 states have internal predecessors, (301), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-24 01:40:38,756 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 01:40:38,756 INFO L93 Difference]: Finished difference Result 842 states and 1189 transitions. [2024-11-24 01:40:38,756 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-24 01:40:38,757 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 60.2) internal successors, (301), 5 states have internal predecessors, (301), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 328 [2024-11-24 01:40:38,757 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 01:40:38,759 INFO L225 Difference]: With dead ends: 842 [2024-11-24 01:40:38,760 INFO L226 Difference]: Without dead ends: 517 [2024-11-24 01:40:38,761 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-11-24 01:40:38,762 INFO L435 NwaCegarLoop]: 401 mSDtfsCounter, 791 mSDsluCounter, 403 mSDsCounter, 0 mSdLazyCounter, 312 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 791 SdHoareTripleChecker+Valid, 804 SdHoareTripleChecker+Invalid, 313 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 312 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2024-11-24 01:40:38,763 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [791 Valid, 804 Invalid, 313 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 312 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2024-11-24 01:40:38,764 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 517 states. [2024-11-24 01:40:38,783 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 517 to 517. [2024-11-24 01:40:38,788 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 517 states, 509 states have (on average 1.4086444007858545) internal successors, (717), 509 states have internal predecessors, (717), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-11-24 01:40:38,792 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 517 states to 517 states and 729 transitions. [2024-11-24 01:40:38,796 INFO L78 Accepts]: Start accepts. Automaton has 517 states and 729 transitions. Word has length 328 [2024-11-24 01:40:38,796 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 01:40:38,796 INFO L471 AbstractCegarLoop]: Abstraction has 517 states and 729 transitions. [2024-11-24 01:40:38,797 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 60.2) internal successors, (301), 5 states have internal predecessors, (301), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-24 01:40:38,797 INFO L276 IsEmpty]: Start isEmpty. Operand 517 states and 729 transitions. [2024-11-24 01:40:38,802 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 330 [2024-11-24 01:40:38,803 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 01:40:38,803 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 01:40:38,803 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable24 [2024-11-24 01:40:38,804 INFO L396 AbstractCegarLoop]: === Iteration 26 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 01:40:38,804 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 01:40:38,804 INFO L85 PathProgramCache]: Analyzing trace with hash -2098529503, now seen corresponding path program 1 times [2024-11-24 01:40:38,804 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 01:40:38,804 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [130968211] [2024-11-24 01:40:38,805 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 01:40:38,805 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 01:40:39,649 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 01:40:40,493 INFO L134 CoverageAnalysis]: Checked inductivity of 143 backedges. 83 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-24 01:40:40,493 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-24 01:40:40,493 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [130968211] [2024-11-24 01:40:40,493 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [130968211] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-24 01:40:40,493 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-24 01:40:40,493 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-24 01:40:40,494 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2029963863] [2024-11-24 01:40:40,494 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-24 01:40:40,494 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-24 01:40:40,494 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-24 01:40:40,495 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-24 01:40:40,495 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-24 01:40:40,496 INFO L87 Difference]: Start difference. First operand 517 states and 729 transitions. Second operand has 4 states, 4 states have (on average 75.5) internal successors, (302), 4 states have internal predecessors, (302), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-24 01:40:40,585 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 01:40:40,585 INFO L93 Difference]: Finished difference Result 842 states and 1187 transitions. [2024-11-24 01:40:40,586 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-24 01:40:40,586 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 75.5) internal successors, (302), 4 states have internal predecessors, (302), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 329 [2024-11-24 01:40:40,587 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 01:40:40,589 INFO L225 Difference]: With dead ends: 842 [2024-11-24 01:40:40,590 INFO L226 Difference]: Without dead ends: 517 [2024-11-24 01:40:40,591 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-11-24 01:40:40,592 INFO L435 NwaCegarLoop]: 539 mSDtfsCounter, 382 mSDsluCounter, 541 mSDsCounter, 0 mSdLazyCounter, 34 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 382 SdHoareTripleChecker+Valid, 1080 SdHoareTripleChecker+Invalid, 34 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 34 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-24 01:40:40,594 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [382 Valid, 1080 Invalid, 34 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 34 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-24 01:40:40,595 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 517 states. [2024-11-24 01:40:40,612 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 517 to 517. [2024-11-24 01:40:40,613 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 517 states, 509 states have (on average 1.4066797642436148) internal successors, (716), 509 states have internal predecessors, (716), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-11-24 01:40:40,616 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 517 states to 517 states and 728 transitions. [2024-11-24 01:40:40,617 INFO L78 Accepts]: Start accepts. Automaton has 517 states and 728 transitions. Word has length 329 [2024-11-24 01:40:40,617 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 01:40:40,617 INFO L471 AbstractCegarLoop]: Abstraction has 517 states and 728 transitions. [2024-11-24 01:40:40,618 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 75.5) internal successors, (302), 4 states have internal predecessors, (302), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-24 01:40:40,618 INFO L276 IsEmpty]: Start isEmpty. Operand 517 states and 728 transitions. [2024-11-24 01:40:40,623 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 331 [2024-11-24 01:40:40,623 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 01:40:40,624 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 01:40:40,624 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable25 [2024-11-24 01:40:40,626 INFO L396 AbstractCegarLoop]: === Iteration 27 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 01:40:40,626 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 01:40:40,627 INFO L85 PathProgramCache]: Analyzing trace with hash -33950269, now seen corresponding path program 1 times [2024-11-24 01:40:40,627 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 01:40:40,627 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [239508380] [2024-11-24 01:40:40,627 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 01:40:40,627 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 01:40:41,356 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 01:40:42,117 INFO L134 CoverageAnalysis]: Checked inductivity of 143 backedges. 83 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-24 01:40:42,117 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-24 01:40:42,117 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [239508380] [2024-11-24 01:40:42,117 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [239508380] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-24 01:40:42,118 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-24 01:40:42,118 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-24 01:40:42,118 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1846792185] [2024-11-24 01:40:42,118 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-24 01:40:42,119 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-24 01:40:42,119 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-24 01:40:42,120 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-24 01:40:42,120 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-24 01:40:42,121 INFO L87 Difference]: Start difference. First operand 517 states and 728 transitions. Second operand has 5 states, 5 states have (on average 60.6) internal successors, (303), 5 states have internal predecessors, (303), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-24 01:40:42,286 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 01:40:42,287 INFO L93 Difference]: Finished difference Result 842 states and 1185 transitions. [2024-11-24 01:40:42,287 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-24 01:40:42,288 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 60.6) internal successors, (303), 5 states have internal predecessors, (303), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 330 [2024-11-24 01:40:42,288 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 01:40:42,290 INFO L225 Difference]: With dead ends: 842 [2024-11-24 01:40:42,291 INFO L226 Difference]: Without dead ends: 517 [2024-11-24 01:40:42,291 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-11-24 01:40:42,292 INFO L435 NwaCegarLoop]: 524 mSDtfsCounter, 862 mSDsluCounter, 526 mSDsCounter, 0 mSdLazyCounter, 62 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 862 SdHoareTripleChecker+Valid, 1050 SdHoareTripleChecker+Invalid, 62 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 62 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-24 01:40:42,293 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [862 Valid, 1050 Invalid, 62 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 62 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-24 01:40:42,294 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 517 states. [2024-11-24 01:40:42,316 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 517 to 517. [2024-11-24 01:40:42,317 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 517 states, 509 states have (on average 1.4047151277013752) internal successors, (715), 509 states have internal predecessors, (715), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-11-24 01:40:42,320 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 517 states to 517 states and 727 transitions. [2024-11-24 01:40:42,321 INFO L78 Accepts]: Start accepts. Automaton has 517 states and 727 transitions. Word has length 330 [2024-11-24 01:40:42,322 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 01:40:42,322 INFO L471 AbstractCegarLoop]: Abstraction has 517 states and 727 transitions. [2024-11-24 01:40:42,322 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 60.6) internal successors, (303), 5 states have internal predecessors, (303), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-24 01:40:42,322 INFO L276 IsEmpty]: Start isEmpty. Operand 517 states and 727 transitions. [2024-11-24 01:40:42,328 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 332 [2024-11-24 01:40:42,328 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 01:40:42,329 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 01:40:42,329 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable26 [2024-11-24 01:40:42,330 INFO L396 AbstractCegarLoop]: === Iteration 28 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 01:40:42,330 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 01:40:42,330 INFO L85 PathProgramCache]: Analyzing trace with hash -1414511327, now seen corresponding path program 1 times [2024-11-24 01:40:42,331 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 01:40:42,331 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1615818936] [2024-11-24 01:40:42,331 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 01:40:42,331 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 01:40:43,322 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 01:40:44,075 INFO L134 CoverageAnalysis]: Checked inductivity of 143 backedges. 83 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-24 01:40:44,075 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-24 01:40:44,075 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1615818936] [2024-11-24 01:40:44,075 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1615818936] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-24 01:40:44,075 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-24 01:40:44,076 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-24 01:40:44,076 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1070318197] [2024-11-24 01:40:44,076 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-24 01:40:44,076 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-24 01:40:44,076 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-24 01:40:44,077 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-24 01:40:44,077 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-24 01:40:44,078 INFO L87 Difference]: Start difference. First operand 517 states and 727 transitions. Second operand has 5 states, 5 states have (on average 60.8) internal successors, (304), 5 states have internal predecessors, (304), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-24 01:40:44,234 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 01:40:44,234 INFO L93 Difference]: Finished difference Result 842 states and 1183 transitions. [2024-11-24 01:40:44,235 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-24 01:40:44,235 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 60.8) internal successors, (304), 5 states have internal predecessors, (304), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 331 [2024-11-24 01:40:44,236 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 01:40:44,238 INFO L225 Difference]: With dead ends: 842 [2024-11-24 01:40:44,238 INFO L226 Difference]: Without dead ends: 517 [2024-11-24 01:40:44,239 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-11-24 01:40:44,240 INFO L435 NwaCegarLoop]: 524 mSDtfsCounter, 852 mSDsluCounter, 526 mSDsCounter, 0 mSdLazyCounter, 60 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 852 SdHoareTripleChecker+Valid, 1050 SdHoareTripleChecker+Invalid, 60 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 60 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-24 01:40:44,240 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [852 Valid, 1050 Invalid, 60 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 60 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-24 01:40:44,242 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 517 states. [2024-11-24 01:40:44,288 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 517 to 517. [2024-11-24 01:40:44,289 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 517 states, 509 states have (on average 1.4027504911591355) internal successors, (714), 509 states have internal predecessors, (714), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-11-24 01:40:44,292 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 517 states to 517 states and 726 transitions. [2024-11-24 01:40:44,292 INFO L78 Accepts]: Start accepts. Automaton has 517 states and 726 transitions. Word has length 331 [2024-11-24 01:40:44,293 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 01:40:44,293 INFO L471 AbstractCegarLoop]: Abstraction has 517 states and 726 transitions. [2024-11-24 01:40:44,297 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 60.8) internal successors, (304), 5 states have internal predecessors, (304), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-24 01:40:44,297 INFO L276 IsEmpty]: Start isEmpty. Operand 517 states and 726 transitions. [2024-11-24 01:40:44,305 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 333 [2024-11-24 01:40:44,306 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 01:40:44,307 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 01:40:44,307 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable27 [2024-11-24 01:40:44,307 INFO L396 AbstractCegarLoop]: === Iteration 29 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 01:40:44,308 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 01:40:44,308 INFO L85 PathProgramCache]: Analyzing trace with hash -1547045420, now seen corresponding path program 1 times [2024-11-24 01:40:44,308 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 01:40:44,308 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2140611717] [2024-11-24 01:40:44,308 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 01:40:44,308 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 01:40:44,978 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 01:40:45,688 INFO L134 CoverageAnalysis]: Checked inductivity of 143 backedges. 83 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-24 01:40:45,689 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-24 01:40:45,689 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2140611717] [2024-11-24 01:40:45,689 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2140611717] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-24 01:40:45,689 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-24 01:40:45,689 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-24 01:40:45,690 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1323258723] [2024-11-24 01:40:45,690 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-24 01:40:45,690 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-24 01:40:45,690 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-24 01:40:45,692 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-24 01:40:45,692 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-24 01:40:45,692 INFO L87 Difference]: Start difference. First operand 517 states and 726 transitions. Second operand has 5 states, 5 states have (on average 61.0) internal successors, (305), 5 states have internal predecessors, (305), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-24 01:40:45,843 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 01:40:45,843 INFO L93 Difference]: Finished difference Result 842 states and 1181 transitions. [2024-11-24 01:40:45,844 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-24 01:40:45,844 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 61.0) internal successors, (305), 5 states have internal predecessors, (305), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 332 [2024-11-24 01:40:45,845 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 01:40:45,847 INFO L225 Difference]: With dead ends: 842 [2024-11-24 01:40:45,847 INFO L226 Difference]: Without dead ends: 517 [2024-11-24 01:40:45,848 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-11-24 01:40:45,853 INFO L435 NwaCegarLoop]: 524 mSDtfsCounter, 452 mSDsluCounter, 533 mSDsCounter, 0 mSdLazyCounter, 58 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 452 SdHoareTripleChecker+Valid, 1057 SdHoareTripleChecker+Invalid, 58 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 58 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-24 01:40:45,853 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [452 Valid, 1057 Invalid, 58 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 58 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-24 01:40:45,854 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 517 states. [2024-11-24 01:40:45,871 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 517 to 517. [2024-11-24 01:40:45,872 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 517 states, 509 states have (on average 1.4007858546168959) internal successors, (713), 509 states have internal predecessors, (713), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-11-24 01:40:45,875 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 517 states to 517 states and 725 transitions. [2024-11-24 01:40:45,875 INFO L78 Accepts]: Start accepts. Automaton has 517 states and 725 transitions. Word has length 332 [2024-11-24 01:40:45,876 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 01:40:45,876 INFO L471 AbstractCegarLoop]: Abstraction has 517 states and 725 transitions. [2024-11-24 01:40:45,876 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 61.0) internal successors, (305), 5 states have internal predecessors, (305), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-24 01:40:45,876 INFO L276 IsEmpty]: Start isEmpty. Operand 517 states and 725 transitions. [2024-11-24 01:40:45,878 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 334 [2024-11-24 01:40:45,879 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 01:40:45,879 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 01:40:45,879 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable28 [2024-11-24 01:40:45,880 INFO L396 AbstractCegarLoop]: === Iteration 30 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 01:40:45,880 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 01:40:45,880 INFO L85 PathProgramCache]: Analyzing trace with hash -1723789232, now seen corresponding path program 1 times [2024-11-24 01:40:45,880 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 01:40:45,880 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1481855169] [2024-11-24 01:40:45,881 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 01:40:45,881 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 01:40:46,897 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 01:40:48,175 INFO L134 CoverageAnalysis]: Checked inductivity of 143 backedges. 77 proven. 0 refuted. 0 times theorem prover too weak. 66 trivial. 0 not checked. [2024-11-24 01:40:48,175 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-24 01:40:48,175 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1481855169] [2024-11-24 01:40:48,176 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1481855169] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-24 01:40:48,176 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-24 01:40:48,176 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-24 01:40:48,176 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1651032915] [2024-11-24 01:40:48,176 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-24 01:40:48,177 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-24 01:40:48,177 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-24 01:40:48,178 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-24 01:40:48,179 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-11-24 01:40:48,179 INFO L87 Difference]: Start difference. First operand 517 states and 725 transitions. Second operand has 5 states, 5 states have (on average 60.6) internal successors, (303), 5 states have internal predecessors, (303), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-24 01:40:48,255 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 01:40:48,255 INFO L93 Difference]: Finished difference Result 932 states and 1289 transitions. [2024-11-24 01:40:48,255 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-11-24 01:40:48,256 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 60.6) internal successors, (303), 5 states have internal predecessors, (303), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 333 [2024-11-24 01:40:48,256 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 01:40:48,259 INFO L225 Difference]: With dead ends: 932 [2024-11-24 01:40:48,259 INFO L226 Difference]: Without dead ends: 605 [2024-11-24 01:40:48,260 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-11-24 01:40:48,261 INFO L435 NwaCegarLoop]: 546 mSDtfsCounter, 18 mSDsluCounter, 1629 mSDsCounter, 0 mSdLazyCounter, 32 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 18 SdHoareTripleChecker+Valid, 2175 SdHoareTripleChecker+Invalid, 32 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 32 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-24 01:40:48,262 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [18 Valid, 2175 Invalid, 32 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 32 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-24 01:40:48,263 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 605 states. [2024-11-24 01:40:48,284 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 605 to 601. [2024-11-24 01:40:48,285 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 601 states, 593 states have (on average 1.3709949409780775) internal successors, (813), 593 states have internal predecessors, (813), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-11-24 01:40:48,288 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 601 states to 601 states and 825 transitions. [2024-11-24 01:40:48,288 INFO L78 Accepts]: Start accepts. Automaton has 601 states and 825 transitions. Word has length 333 [2024-11-24 01:40:48,289 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 01:40:48,289 INFO L471 AbstractCegarLoop]: Abstraction has 601 states and 825 transitions. [2024-11-24 01:40:48,289 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 60.6) internal successors, (303), 5 states have internal predecessors, (303), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-24 01:40:48,289 INFO L276 IsEmpty]: Start isEmpty. Operand 601 states and 825 transitions. [2024-11-24 01:40:48,293 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 336 [2024-11-24 01:40:48,293 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 01:40:48,293 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 01:40:48,293 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable29 [2024-11-24 01:40:48,294 INFO L396 AbstractCegarLoop]: === Iteration 31 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 01:40:48,294 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 01:40:48,294 INFO L85 PathProgramCache]: Analyzing trace with hash -543443530, now seen corresponding path program 1 times [2024-11-24 01:40:48,294 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 01:40:48,295 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1751387994] [2024-11-24 01:40:48,295 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 01:40:48,295 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 01:40:49,380 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 01:40:50,084 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 84 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-24 01:40:50,084 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-24 01:40:50,084 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1751387994] [2024-11-24 01:40:50,084 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1751387994] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-24 01:40:50,084 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-24 01:40:50,085 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-11-24 01:40:50,085 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [531185999] [2024-11-24 01:40:50,085 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-24 01:40:50,086 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-11-24 01:40:50,086 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-24 01:40:50,087 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-11-24 01:40:50,087 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2024-11-24 01:40:50,087 INFO L87 Difference]: Start difference. First operand 601 states and 825 transitions. Second operand has 6 states, 6 states have (on average 51.333333333333336) internal successors, (308), 6 states have internal predecessors, (308), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-24 01:40:50,700 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 01:40:50,701 INFO L93 Difference]: Finished difference Result 1405 states and 1936 transitions. [2024-11-24 01:40:50,701 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-24 01:40:50,701 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 51.333333333333336) internal successors, (308), 6 states have internal predecessors, (308), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 335 [2024-11-24 01:40:50,702 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 01:40:50,707 INFO L225 Difference]: With dead ends: 1405 [2024-11-24 01:40:50,707 INFO L226 Difference]: Without dead ends: 1038 [2024-11-24 01:40:50,708 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2024-11-24 01:40:50,712 INFO L435 NwaCegarLoop]: 459 mSDtfsCounter, 588 mSDsluCounter, 1515 mSDsCounter, 0 mSdLazyCounter, 447 mSolverCounterSat, 8 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 591 SdHoareTripleChecker+Valid, 1974 SdHoareTripleChecker+Invalid, 455 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 8 IncrementalHoareTripleChecker+Valid, 447 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2024-11-24 01:40:50,712 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [591 Valid, 1974 Invalid, 455 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [8 Valid, 447 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2024-11-24 01:40:50,714 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1038 states. [2024-11-24 01:40:50,750 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1038 to 924. [2024-11-24 01:40:50,752 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 924 states, 913 states have (on average 1.366922234392114) internal successors, (1248), 913 states have internal predecessors, (1248), 9 states have call successors, (9), 1 states have call predecessors, (9), 1 states have return successors, (9), 9 states have call predecessors, (9), 9 states have call successors, (9) [2024-11-24 01:40:50,756 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 924 states to 924 states and 1266 transitions. [2024-11-24 01:40:50,757 INFO L78 Accepts]: Start accepts. Automaton has 924 states and 1266 transitions. Word has length 335 [2024-11-24 01:40:50,757 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 01:40:50,758 INFO L471 AbstractCegarLoop]: Abstraction has 924 states and 1266 transitions. [2024-11-24 01:40:50,758 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 51.333333333333336) internal successors, (308), 6 states have internal predecessors, (308), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-24 01:40:50,758 INFO L276 IsEmpty]: Start isEmpty. Operand 924 states and 1266 transitions. [2024-11-24 01:40:50,762 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 337 [2024-11-24 01:40:50,762 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 01:40:50,763 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 01:40:50,763 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable30 [2024-11-24 01:40:50,763 INFO L396 AbstractCegarLoop]: === Iteration 32 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 01:40:50,763 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 01:40:50,764 INFO L85 PathProgramCache]: Analyzing trace with hash 1268661504, now seen corresponding path program 1 times [2024-11-24 01:40:50,764 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 01:40:50,764 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1325247733] [2024-11-24 01:40:50,764 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 01:40:50,764 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 01:40:51,915 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 01:40:52,876 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 48 proven. 0 refuted. 0 times theorem prover too weak. 96 trivial. 0 not checked. [2024-11-24 01:40:52,876 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-24 01:40:52,876 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1325247733] [2024-11-24 01:40:52,876 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1325247733] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-24 01:40:52,876 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-24 01:40:52,877 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-24 01:40:52,877 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1197390396] [2024-11-24 01:40:52,877 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-24 01:40:52,879 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-24 01:40:52,879 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-24 01:40:52,880 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-24 01:40:52,880 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-11-24 01:40:52,881 INFO L87 Difference]: Start difference. First operand 924 states and 1266 transitions. Second operand has 5 states, 5 states have (on average 55.2) internal successors, (276), 5 states have internal predecessors, (276), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-24 01:40:53,351 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 01:40:53,351 INFO L93 Difference]: Finished difference Result 1597 states and 2161 transitions. [2024-11-24 01:40:53,352 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-11-24 01:40:53,352 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 55.2) internal successors, (276), 5 states have internal predecessors, (276), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 336 [2024-11-24 01:40:53,352 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 01:40:53,356 INFO L225 Difference]: With dead ends: 1597 [2024-11-24 01:40:53,356 INFO L226 Difference]: Without dead ends: 948 [2024-11-24 01:40:53,358 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-11-24 01:40:53,358 INFO L435 NwaCegarLoop]: 404 mSDtfsCounter, 468 mSDsluCounter, 787 mSDsCounter, 0 mSdLazyCounter, 457 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 468 SdHoareTripleChecker+Valid, 1191 SdHoareTripleChecker+Invalid, 457 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 457 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2024-11-24 01:40:53,358 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [468 Valid, 1191 Invalid, 457 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 457 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2024-11-24 01:40:53,362 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 948 states. [2024-11-24 01:40:53,387 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 948 to 942. [2024-11-24 01:40:53,390 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 942 states, 931 states have (on average 1.359828141783029) internal successors, (1266), 931 states have internal predecessors, (1266), 9 states have call successors, (9), 1 states have call predecessors, (9), 1 states have return successors, (9), 9 states have call predecessors, (9), 9 states have call successors, (9) [2024-11-24 01:40:53,394 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 942 states to 942 states and 1284 transitions. [2024-11-24 01:40:53,394 INFO L78 Accepts]: Start accepts. Automaton has 942 states and 1284 transitions. Word has length 336 [2024-11-24 01:40:53,395 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 01:40:53,395 INFO L471 AbstractCegarLoop]: Abstraction has 942 states and 1284 transitions. [2024-11-24 01:40:53,395 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 55.2) internal successors, (276), 5 states have internal predecessors, (276), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-24 01:40:53,395 INFO L276 IsEmpty]: Start isEmpty. Operand 942 states and 1284 transitions. [2024-11-24 01:40:53,398 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 339 [2024-11-24 01:40:53,399 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 01:40:53,399 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 01:40:53,399 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable31 [2024-11-24 01:40:53,399 INFO L396 AbstractCegarLoop]: === Iteration 33 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 01:40:53,400 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 01:40:53,400 INFO L85 PathProgramCache]: Analyzing trace with hash 931392926, now seen corresponding path program 1 times [2024-11-24 01:40:53,400 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 01:40:53,400 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [316189237] [2024-11-24 01:40:53,400 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 01:40:53,401 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 01:40:54,354 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 01:40:55,162 INFO L134 CoverageAnalysis]: Checked inductivity of 145 backedges. 85 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-24 01:40:55,162 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-24 01:40:55,162 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [316189237] [2024-11-24 01:40:55,162 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [316189237] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-24 01:40:55,163 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-24 01:40:55,163 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-11-24 01:40:55,163 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [364409872] [2024-11-24 01:40:55,163 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-24 01:40:55,164 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-11-24 01:40:55,164 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-24 01:40:55,165 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-11-24 01:40:55,165 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2024-11-24 01:40:55,165 INFO L87 Difference]: Start difference. First operand 942 states and 1284 transitions. Second operand has 6 states, 6 states have (on average 51.833333333333336) internal successors, (311), 6 states have internal predecessors, (311), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-24 01:40:55,904 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 01:40:55,905 INFO L93 Difference]: Finished difference Result 1338 states and 1828 transitions. [2024-11-24 01:40:55,905 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-24 01:40:55,905 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 51.833333333333336) internal successors, (311), 6 states have internal predecessors, (311), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 338 [2024-11-24 01:40:55,906 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 01:40:55,911 INFO L225 Difference]: With dead ends: 1338 [2024-11-24 01:40:55,911 INFO L226 Difference]: Without dead ends: 965 [2024-11-24 01:40:55,912 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2024-11-24 01:40:55,914 INFO L435 NwaCegarLoop]: 398 mSDtfsCounter, 1008 mSDsluCounter, 1171 mSDsCounter, 0 mSdLazyCounter, 631 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1011 SdHoareTripleChecker+Valid, 1569 SdHoareTripleChecker+Invalid, 631 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 631 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.7s IncrementalHoareTripleChecker+Time [2024-11-24 01:40:55,914 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1011 Valid, 1569 Invalid, 631 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 631 Invalid, 0 Unknown, 0 Unchecked, 0.7s Time] [2024-11-24 01:40:55,916 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 965 states. [2024-11-24 01:40:55,944 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 965 to 943. [2024-11-24 01:40:55,946 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 943 states, 932 states have (on average 1.359442060085837) internal successors, (1267), 932 states have internal predecessors, (1267), 9 states have call successors, (9), 1 states have call predecessors, (9), 1 states have return successors, (9), 9 states have call predecessors, (9), 9 states have call successors, (9) [2024-11-24 01:40:55,950 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 943 states to 943 states and 1285 transitions. [2024-11-24 01:40:55,951 INFO L78 Accepts]: Start accepts. Automaton has 943 states and 1285 transitions. Word has length 338 [2024-11-24 01:40:55,951 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 01:40:55,951 INFO L471 AbstractCegarLoop]: Abstraction has 943 states and 1285 transitions. [2024-11-24 01:40:55,952 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 51.833333333333336) internal successors, (311), 6 states have internal predecessors, (311), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-24 01:40:55,952 INFO L276 IsEmpty]: Start isEmpty. Operand 943 states and 1285 transitions. [2024-11-24 01:40:55,954 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 339 [2024-11-24 01:40:55,955 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 01:40:55,955 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 01:40:55,955 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable32 [2024-11-24 01:40:55,955 INFO L396 AbstractCegarLoop]: === Iteration 34 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 01:40:55,956 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 01:40:55,956 INFO L85 PathProgramCache]: Analyzing trace with hash 264224577, now seen corresponding path program 1 times [2024-11-24 01:40:55,956 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 01:40:55,956 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1961540360] [2024-11-24 01:40:55,956 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 01:40:55,956 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 01:40:56,790 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 01:40:58,163 INFO L134 CoverageAnalysis]: Checked inductivity of 145 backedges. 31 proven. 0 refuted. 0 times theorem prover too weak. 114 trivial. 0 not checked. [2024-11-24 01:40:58,163 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-24 01:40:58,163 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1961540360] [2024-11-24 01:40:58,164 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1961540360] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-24 01:40:58,164 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-24 01:40:58,164 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2024-11-24 01:40:58,164 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [388982521] [2024-11-24 01:40:58,164 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-24 01:40:58,165 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2024-11-24 01:40:58,165 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-24 01:40:58,166 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2024-11-24 01:40:58,166 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2024-11-24 01:40:58,167 INFO L87 Difference]: Start difference. First operand 943 states and 1285 transitions. Second operand has 8 states, 8 states have (on average 32.5) internal successors, (260), 8 states have internal predecessors, (260), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-24 01:40:58,451 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 01:40:58,451 INFO L93 Difference]: Finished difference Result 2126 states and 2889 transitions. [2024-11-24 01:40:58,451 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2024-11-24 01:40:58,452 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 32.5) internal successors, (260), 8 states have internal predecessors, (260), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 338 [2024-11-24 01:40:58,452 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 01:40:58,458 INFO L225 Difference]: With dead ends: 2126 [2024-11-24 01:40:58,458 INFO L226 Difference]: Without dead ends: 1635 [2024-11-24 01:40:58,460 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=20, Invalid=52, Unknown=0, NotChecked=0, Total=72 [2024-11-24 01:40:58,460 INFO L435 NwaCegarLoop]: 1264 mSDtfsCounter, 781 mSDsluCounter, 6513 mSDsCounter, 0 mSdLazyCounter, 172 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 784 SdHoareTripleChecker+Valid, 7777 SdHoareTripleChecker+Invalid, 172 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 172 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-11-24 01:40:58,461 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [784 Valid, 7777 Invalid, 172 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 172 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-11-24 01:40:58,463 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1635 states. [2024-11-24 01:40:58,503 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1635 to 1012. [2024-11-24 01:40:58,508 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1012 states, 998 states have (on average 1.3627254509018036) internal successors, (1360), 998 states have internal predecessors, (1360), 12 states have call successors, (12), 1 states have call predecessors, (12), 1 states have return successors, (12), 12 states have call predecessors, (12), 12 states have call successors, (12) [2024-11-24 01:40:58,510 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1012 states to 1012 states and 1384 transitions. [2024-11-24 01:40:58,510 INFO L78 Accepts]: Start accepts. Automaton has 1012 states and 1384 transitions. Word has length 338 [2024-11-24 01:40:58,511 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 01:40:58,511 INFO L471 AbstractCegarLoop]: Abstraction has 1012 states and 1384 transitions. [2024-11-24 01:40:58,511 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 32.5) internal successors, (260), 8 states have internal predecessors, (260), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-24 01:40:58,511 INFO L276 IsEmpty]: Start isEmpty. Operand 1012 states and 1384 transitions. [2024-11-24 01:40:58,518 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 340 [2024-11-24 01:40:58,518 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 01:40:58,519 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 01:40:58,519 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable33 [2024-11-24 01:40:58,519 INFO L396 AbstractCegarLoop]: === Iteration 35 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 01:40:58,519 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 01:40:58,521 INFO L85 PathProgramCache]: Analyzing trace with hash 2025188781, now seen corresponding path program 1 times [2024-11-24 01:40:58,521 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 01:40:58,521 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1606350000] [2024-11-24 01:40:58,521 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 01:40:58,521 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 01:40:59,816 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 01:41:00,818 INFO L134 CoverageAnalysis]: Checked inductivity of 145 backedges. 52 proven. 0 refuted. 0 times theorem prover too weak. 93 trivial. 0 not checked. [2024-11-24 01:41:00,818 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-24 01:41:00,818 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1606350000] [2024-11-24 01:41:00,819 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1606350000] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-24 01:41:00,819 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-24 01:41:00,819 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2024-11-24 01:41:00,819 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [84585035] [2024-11-24 01:41:00,819 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-24 01:41:00,820 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2024-11-24 01:41:00,820 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-24 01:41:00,821 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2024-11-24 01:41:00,821 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2024-11-24 01:41:00,821 INFO L87 Difference]: Start difference. First operand 1012 states and 1384 transitions. Second operand has 8 states, 8 states have (on average 35.25) internal successors, (282), 8 states have internal predecessors, (282), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-24 01:41:01,863 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 01:41:01,864 INFO L93 Difference]: Finished difference Result 2750 states and 3733 transitions. [2024-11-24 01:41:01,864 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2024-11-24 01:41:01,864 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 35.25) internal successors, (282), 8 states have internal predecessors, (282), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 339 [2024-11-24 01:41:01,865 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 01:41:01,872 INFO L225 Difference]: With dead ends: 2750 [2024-11-24 01:41:01,872 INFO L226 Difference]: Without dead ends: 1878 [2024-11-24 01:41:01,874 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=37, Invalid=95, Unknown=0, NotChecked=0, Total=132 [2024-11-24 01:41:01,875 INFO L435 NwaCegarLoop]: 416 mSDtfsCounter, 909 mSDsluCounter, 2000 mSDsCounter, 0 mSdLazyCounter, 970 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.8s Time, 0 mProtectedPredicate, 0 mProtectedAction, 912 SdHoareTripleChecker+Valid, 2416 SdHoareTripleChecker+Invalid, 971 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 970 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.9s IncrementalHoareTripleChecker+Time [2024-11-24 01:41:01,876 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [912 Valid, 2416 Invalid, 971 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 970 Invalid, 0 Unknown, 0 Unchecked, 0.9s Time] [2024-11-24 01:41:01,878 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1878 states. [2024-11-24 01:41:01,924 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1878 to 1870. [2024-11-24 01:41:01,927 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1870 states, 1844 states have (on average 1.3503253796095445) internal successors, (2490), 1844 states have internal predecessors, (2490), 24 states have call successors, (24), 1 states have call predecessors, (24), 1 states have return successors, (24), 24 states have call predecessors, (24), 24 states have call successors, (24) [2024-11-24 01:41:01,931 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1870 states to 1870 states and 2538 transitions. [2024-11-24 01:41:01,931 INFO L78 Accepts]: Start accepts. Automaton has 1870 states and 2538 transitions. Word has length 339 [2024-11-24 01:41:01,932 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 01:41:01,932 INFO L471 AbstractCegarLoop]: Abstraction has 1870 states and 2538 transitions. [2024-11-24 01:41:01,932 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 35.25) internal successors, (282), 8 states have internal predecessors, (282), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-24 01:41:01,932 INFO L276 IsEmpty]: Start isEmpty. Operand 1870 states and 2538 transitions. [2024-11-24 01:41:01,937 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 342 [2024-11-24 01:41:01,937 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 01:41:01,937 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 01:41:01,937 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable34 [2024-11-24 01:41:01,937 INFO L396 AbstractCegarLoop]: === Iteration 36 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 01:41:01,938 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 01:41:01,938 INFO L85 PathProgramCache]: Analyzing trace with hash -2002348361, now seen corresponding path program 1 times [2024-11-24 01:41:01,938 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 01:41:01,938 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1920052055] [2024-11-24 01:41:01,938 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 01:41:01,938 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 01:41:02,934 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 01:41:03,917 INFO L134 CoverageAnalysis]: Checked inductivity of 146 backedges. 79 proven. 4 refuted. 0 times theorem prover too weak. 63 trivial. 0 not checked. [2024-11-24 01:41:03,918 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-24 01:41:03,918 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1920052055] [2024-11-24 01:41:03,918 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1920052055] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-24 01:41:03,918 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1729937192] [2024-11-24 01:41:03,918 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 01:41:03,918 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-24 01:41:03,919 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d9cbd223-3e19-44a5-b1a1-87e0ec577546/bin/uautomizer-verify-LYvppIcaGC/z3 [2024-11-24 01:41:03,921 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d9cbd223-3e19-44a5-b1a1-87e0ec577546/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-24 01:41:03,925 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d9cbd223-3e19-44a5-b1a1-87e0ec577546/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2024-11-24 01:41:05,144 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 01:41:05,157 INFO L256 TraceCheckSpWp]: Trace formula consists of 2047 conjuncts, 7 conjuncts are in the unsatisfiable core [2024-11-24 01:41:05,178 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-24 01:41:05,567 INFO L134 CoverageAnalysis]: Checked inductivity of 146 backedges. 88 proven. 0 refuted. 0 times theorem prover too weak. 58 trivial. 0 not checked. [2024-11-24 01:41:05,567 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-11-24 01:41:05,568 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1729937192] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-24 01:41:05,568 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-11-24 01:41:05,568 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [6] total 7 [2024-11-24 01:41:05,568 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1446996774] [2024-11-24 01:41:05,568 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-24 01:41:05,568 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-24 01:41:05,569 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-24 01:41:05,572 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-24 01:41:05,572 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2024-11-24 01:41:05,572 INFO L87 Difference]: Start difference. First operand 1870 states and 2538 transitions. Second operand has 4 states, 4 states have (on average 71.5) internal successors, (286), 4 states have internal predecessors, (286), 2 states have call successors, (6), 2 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-24 01:41:05,943 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 01:41:05,943 INFO L93 Difference]: Finished difference Result 2599 states and 3514 transitions. [2024-11-24 01:41:05,944 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-24 01:41:05,944 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 71.5) internal successors, (286), 4 states have internal predecessors, (286), 2 states have call successors, (6), 2 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 341 [2024-11-24 01:41:05,944 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 01:41:05,947 INFO L225 Difference]: With dead ends: 2599 [2024-11-24 01:41:05,947 INFO L226 Difference]: Without dead ends: 1010 [2024-11-24 01:41:05,950 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 350 GetRequests, 344 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2024-11-24 01:41:05,951 INFO L435 NwaCegarLoop]: 396 mSDtfsCounter, 458 mSDsluCounter, 398 mSDsCounter, 0 mSdLazyCounter, 309 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 458 SdHoareTripleChecker+Valid, 794 SdHoareTripleChecker+Invalid, 309 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 309 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2024-11-24 01:41:05,951 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [458 Valid, 794 Invalid, 309 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 309 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2024-11-24 01:41:05,952 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1010 states. [2024-11-24 01:41:06,005 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1010 to 1010. [2024-11-24 01:41:06,006 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1010 states, 996 states have (on average 1.3534136546184738) internal successors, (1348), 996 states have internal predecessors, (1348), 12 states have call successors, (12), 1 states have call predecessors, (12), 1 states have return successors, (12), 12 states have call predecessors, (12), 12 states have call successors, (12) [2024-11-24 01:41:06,008 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1010 states to 1010 states and 1372 transitions. [2024-11-24 01:41:06,008 INFO L78 Accepts]: Start accepts. Automaton has 1010 states and 1372 transitions. Word has length 341 [2024-11-24 01:41:06,009 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 01:41:06,009 INFO L471 AbstractCegarLoop]: Abstraction has 1010 states and 1372 transitions. [2024-11-24 01:41:06,009 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 71.5) internal successors, (286), 4 states have internal predecessors, (286), 2 states have call successors, (6), 2 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-24 01:41:06,009 INFO L276 IsEmpty]: Start isEmpty. Operand 1010 states and 1372 transitions. [2024-11-24 01:41:06,012 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 342 [2024-11-24 01:41:06,012 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 01:41:06,012 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 01:41:06,028 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d9cbd223-3e19-44a5-b1a1-87e0ec577546/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Forceful destruction successful, exit code 0 [2024-11-24 01:41:06,218 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable35,3 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d9cbd223-3e19-44a5-b1a1-87e0ec577546/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-24 01:41:06,219 INFO L396 AbstractCegarLoop]: === Iteration 37 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 01:41:06,220 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 01:41:06,220 INFO L85 PathProgramCache]: Analyzing trace with hash 615740921, now seen corresponding path program 1 times [2024-11-24 01:41:06,221 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 01:41:06,221 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1784239137] [2024-11-24 01:41:06,221 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 01:41:06,221 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 01:41:06,973 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 01:41:07,662 INFO L134 CoverageAnalysis]: Checked inductivity of 146 backedges. 20 proven. 0 refuted. 0 times theorem prover too weak. 126 trivial. 0 not checked. [2024-11-24 01:41:07,662 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-24 01:41:07,662 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1784239137] [2024-11-24 01:41:07,662 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1784239137] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-24 01:41:07,662 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-24 01:41:07,662 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2024-11-24 01:41:07,662 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1941980661] [2024-11-24 01:41:07,663 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-24 01:41:07,663 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2024-11-24 01:41:07,663 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-24 01:41:07,664 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-11-24 01:41:07,665 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2024-11-24 01:41:07,665 INFO L87 Difference]: Start difference. First operand 1010 states and 1372 transitions. Second operand has 7 states, 7 states have (on average 36.142857142857146) internal successors, (253), 7 states have internal predecessors, (253), 2 states have call successors, (4), 1 states have call predecessors, (4), 1 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) [2024-11-24 01:41:08,197 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 01:41:08,197 INFO L93 Difference]: Finished difference Result 1839 states and 2488 transitions. [2024-11-24 01:41:08,198 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-24 01:41:08,198 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 36.142857142857146) internal successors, (253), 7 states have internal predecessors, (253), 2 states have call successors, (4), 1 states have call predecessors, (4), 1 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) Word has length 341 [2024-11-24 01:41:08,198 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 01:41:08,200 INFO L225 Difference]: With dead ends: 1839 [2024-11-24 01:41:08,200 INFO L226 Difference]: Without dead ends: 1026 [2024-11-24 01:41:08,202 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=27, Invalid=63, Unknown=0, NotChecked=0, Total=90 [2024-11-24 01:41:08,202 INFO L435 NwaCegarLoop]: 390 mSDtfsCounter, 536 mSDsluCounter, 1170 mSDsCounter, 0 mSdLazyCounter, 642 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 538 SdHoareTripleChecker+Valid, 1560 SdHoareTripleChecker+Invalid, 644 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 642 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2024-11-24 01:41:08,202 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [538 Valid, 1560 Invalid, 644 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 642 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2024-11-24 01:41:08,204 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1026 states. [2024-11-24 01:41:08,228 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1026 to 1018. [2024-11-24 01:41:08,230 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1018 states, 1004 states have (on average 1.346613545816733) internal successors, (1352), 1004 states have internal predecessors, (1352), 12 states have call successors, (12), 1 states have call predecessors, (12), 1 states have return successors, (12), 12 states have call predecessors, (12), 12 states have call successors, (12) [2024-11-24 01:41:08,232 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1018 states to 1018 states and 1376 transitions. [2024-11-24 01:41:08,232 INFO L78 Accepts]: Start accepts. Automaton has 1018 states and 1376 transitions. Word has length 341 [2024-11-24 01:41:08,233 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 01:41:08,233 INFO L471 AbstractCegarLoop]: Abstraction has 1018 states and 1376 transitions. [2024-11-24 01:41:08,233 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 36.142857142857146) internal successors, (253), 7 states have internal predecessors, (253), 2 states have call successors, (4), 1 states have call predecessors, (4), 1 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) [2024-11-24 01:41:08,233 INFO L276 IsEmpty]: Start isEmpty. Operand 1018 states and 1376 transitions. [2024-11-24 01:41:08,236 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 344 [2024-11-24 01:41:08,236 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 01:41:08,237 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 01:41:08,237 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable36 [2024-11-24 01:41:08,237 INFO L396 AbstractCegarLoop]: === Iteration 38 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 01:41:08,238 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 01:41:08,238 INFO L85 PathProgramCache]: Analyzing trace with hash 425632909, now seen corresponding path program 1 times [2024-11-24 01:41:08,238 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 01:41:08,238 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [396734000] [2024-11-24 01:41:08,238 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 01:41:08,238 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 01:41:09,166 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 01:41:09,894 INFO L134 CoverageAnalysis]: Checked inductivity of 147 backedges. 54 proven. 0 refuted. 0 times theorem prover too weak. 93 trivial. 0 not checked. [2024-11-24 01:41:09,894 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-24 01:41:09,895 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [396734000] [2024-11-24 01:41:09,895 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [396734000] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-24 01:41:09,895 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-24 01:41:09,895 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2024-11-24 01:41:09,895 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [976438071] [2024-11-24 01:41:09,895 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-24 01:41:09,895 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2024-11-24 01:41:09,896 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-24 01:41:09,896 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2024-11-24 01:41:09,896 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2024-11-24 01:41:09,896 INFO L87 Difference]: Start difference. First operand 1018 states and 1376 transitions. Second operand has 8 states, 8 states have (on average 35.75) internal successors, (286), 8 states have internal predecessors, (286), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) [2024-11-24 01:41:10,387 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 01:41:10,387 INFO L93 Difference]: Finished difference Result 1901 states and 2563 transitions. [2024-11-24 01:41:10,387 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2024-11-24 01:41:10,388 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 35.75) internal successors, (286), 8 states have internal predecessors, (286), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) Word has length 343 [2024-11-24 01:41:10,388 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 01:41:10,390 INFO L225 Difference]: With dead ends: 1901 [2024-11-24 01:41:10,390 INFO L226 Difference]: Without dead ends: 1026 [2024-11-24 01:41:10,391 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=22, Invalid=50, Unknown=0, NotChecked=0, Total=72 [2024-11-24 01:41:10,391 INFO L435 NwaCegarLoop]: 531 mSDtfsCounter, 573 mSDsluCounter, 2347 mSDsCounter, 0 mSdLazyCounter, 496 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 575 SdHoareTripleChecker+Valid, 2878 SdHoareTripleChecker+Invalid, 496 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 496 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2024-11-24 01:41:10,391 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [575 Valid, 2878 Invalid, 496 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 496 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2024-11-24 01:41:10,393 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1026 states. [2024-11-24 01:41:10,418 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1026 to 1022. [2024-11-24 01:41:10,419 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1022 states, 1008 states have (on average 1.3452380952380953) internal successors, (1356), 1008 states have internal predecessors, (1356), 12 states have call successors, (12), 1 states have call predecessors, (12), 1 states have return successors, (12), 12 states have call predecessors, (12), 12 states have call successors, (12) [2024-11-24 01:41:10,421 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1022 states to 1022 states and 1380 transitions. [2024-11-24 01:41:10,422 INFO L78 Accepts]: Start accepts. Automaton has 1022 states and 1380 transitions. Word has length 343 [2024-11-24 01:41:10,422 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 01:41:10,422 INFO L471 AbstractCegarLoop]: Abstraction has 1022 states and 1380 transitions. [2024-11-24 01:41:10,423 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 35.75) internal successors, (286), 8 states have internal predecessors, (286), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) [2024-11-24 01:41:10,423 INFO L276 IsEmpty]: Start isEmpty. Operand 1022 states and 1380 transitions. [2024-11-24 01:41:10,426 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 346 [2024-11-24 01:41:10,426 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 01:41:10,427 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 01:41:10,427 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable37 [2024-11-24 01:41:10,427 INFO L396 AbstractCegarLoop]: === Iteration 39 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 01:41:10,428 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 01:41:10,428 INFO L85 PathProgramCache]: Analyzing trace with hash -119240141, now seen corresponding path program 1 times [2024-11-24 01:41:10,428 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 01:41:10,428 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [190928512] [2024-11-24 01:41:10,428 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 01:41:10,428 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 01:41:11,765 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 01:41:13,100 INFO L134 CoverageAnalysis]: Checked inductivity of 148 backedges. 4 proven. 84 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-24 01:41:13,100 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-24 01:41:13,100 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [190928512] [2024-11-24 01:41:13,100 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [190928512] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-24 01:41:13,100 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [814933596] [2024-11-24 01:41:13,100 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 01:41:13,100 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-24 01:41:13,101 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d9cbd223-3e19-44a5-b1a1-87e0ec577546/bin/uautomizer-verify-LYvppIcaGC/z3 [2024-11-24 01:41:13,105 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d9cbd223-3e19-44a5-b1a1-87e0ec577546/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-24 01:41:13,108 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d9cbd223-3e19-44a5-b1a1-87e0ec577546/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2024-11-24 01:41:14,380 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 01:41:14,390 INFO L256 TraceCheckSpWp]: Trace formula consists of 2055 conjuncts, 33 conjuncts are in the unsatisfiable core [2024-11-24 01:41:14,401 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-24 01:41:15,577 INFO L134 CoverageAnalysis]: Checked inductivity of 148 backedges. 78 proven. 6 refuted. 0 times theorem prover too weak. 64 trivial. 0 not checked. [2024-11-24 01:41:15,577 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-24 01:41:17,353 INFO L134 CoverageAnalysis]: Checked inductivity of 148 backedges. 78 proven. 3 refuted. 0 times theorem prover too weak. 67 trivial. 0 not checked. [2024-11-24 01:41:17,354 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [814933596] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-24 01:41:17,354 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-24 01:41:17,354 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 9, 10] total 26 [2024-11-24 01:41:17,354 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [304591493] [2024-11-24 01:41:17,354 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-24 01:41:17,355 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 26 states [2024-11-24 01:41:17,355 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-24 01:41:17,357 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2024-11-24 01:41:17,357 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=89, Invalid=561, Unknown=0, NotChecked=0, Total=650 [2024-11-24 01:41:17,358 INFO L87 Difference]: Start difference. First operand 1022 states and 1380 transitions. Second operand has 26 states, 26 states have (on average 33.0) internal successors, (858), 26 states have internal predecessors, (858), 6 states have call successors, (15), 2 states have call predecessors, (15), 2 states have return successors, (15), 6 states have call predecessors, (15), 6 states have call successors, (15) [2024-11-24 01:41:19,754 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 01:41:19,754 INFO L93 Difference]: Finished difference Result 1820 states and 2445 transitions. [2024-11-24 01:41:19,755 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2024-11-24 01:41:19,755 INFO L78 Accepts]: Start accepts. Automaton has has 26 states, 26 states have (on average 33.0) internal successors, (858), 26 states have internal predecessors, (858), 6 states have call successors, (15), 2 states have call predecessors, (15), 2 states have return successors, (15), 6 states have call predecessors, (15), 6 states have call successors, (15) Word has length 345 [2024-11-24 01:41:19,755 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 01:41:19,758 INFO L225 Difference]: With dead ends: 1820 [2024-11-24 01:41:19,758 INFO L226 Difference]: Without dead ends: 1046 [2024-11-24 01:41:19,760 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 723 GetRequests, 677 SyntacticMatches, 0 SemanticMatches, 46 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 363 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=367, Invalid=1889, Unknown=0, NotChecked=0, Total=2256 [2024-11-24 01:41:19,760 INFO L435 NwaCegarLoop]: 483 mSDtfsCounter, 772 mSDsluCounter, 7268 mSDsCounter, 0 mSdLazyCounter, 3712 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 772 SdHoareTripleChecker+Valid, 7751 SdHoareTripleChecker+Invalid, 3716 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 3712 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.9s IncrementalHoareTripleChecker+Time [2024-11-24 01:41:19,761 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [772 Valid, 7751 Invalid, 3716 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 3712 Invalid, 0 Unknown, 0 Unchecked, 1.9s Time] [2024-11-24 01:41:19,762 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1046 states. [2024-11-24 01:41:19,785 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1046 to 1035. [2024-11-24 01:41:19,787 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1035 states, 1021 states have (on average 1.3379040156709108) internal successors, (1366), 1021 states have internal predecessors, (1366), 12 states have call successors, (12), 1 states have call predecessors, (12), 1 states have return successors, (12), 12 states have call predecessors, (12), 12 states have call successors, (12) [2024-11-24 01:41:19,789 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1035 states to 1035 states and 1390 transitions. [2024-11-24 01:41:19,789 INFO L78 Accepts]: Start accepts. Automaton has 1035 states and 1390 transitions. Word has length 345 [2024-11-24 01:41:19,789 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 01:41:19,790 INFO L471 AbstractCegarLoop]: Abstraction has 1035 states and 1390 transitions. [2024-11-24 01:41:19,790 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 26 states, 26 states have (on average 33.0) internal successors, (858), 26 states have internal predecessors, (858), 6 states have call successors, (15), 2 states have call predecessors, (15), 2 states have return successors, (15), 6 states have call predecessors, (15), 6 states have call successors, (15) [2024-11-24 01:41:19,790 INFO L276 IsEmpty]: Start isEmpty. Operand 1035 states and 1390 transitions. [2024-11-24 01:41:19,793 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 350 [2024-11-24 01:41:19,793 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 01:41:19,793 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 01:41:19,810 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d9cbd223-3e19-44a5-b1a1-87e0ec577546/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Forceful destruction successful, exit code 0 [2024-11-24 01:41:19,994 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable38,4 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d9cbd223-3e19-44a5-b1a1-87e0ec577546/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-24 01:41:19,994 INFO L396 AbstractCegarLoop]: === Iteration 40 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 01:41:19,995 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 01:41:19,995 INFO L85 PathProgramCache]: Analyzing trace with hash -1308830486, now seen corresponding path program 1 times [2024-11-24 01:41:19,995 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 01:41:19,995 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1173947345] [2024-11-24 01:41:19,995 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 01:41:19,995 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 01:41:20,266 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 01:41:20,839 INFO L134 CoverageAnalysis]: Checked inductivity of 149 backedges. 51 proven. 0 refuted. 0 times theorem prover too weak. 98 trivial. 0 not checked. [2024-11-24 01:41:20,840 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-24 01:41:20,840 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1173947345] [2024-11-24 01:41:20,840 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1173947345] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-24 01:41:20,840 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-24 01:41:20,840 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-24 01:41:20,841 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1379141005] [2024-11-24 01:41:20,841 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-24 01:41:20,841 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-24 01:41:20,841 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-24 01:41:20,842 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-24 01:41:20,842 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-11-24 01:41:20,842 INFO L87 Difference]: Start difference. First operand 1035 states and 1390 transitions. Second operand has 5 states, 5 states have (on average 57.6) internal successors, (288), 5 states have internal predecessors, (288), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-24 01:41:20,897 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 01:41:20,897 INFO L93 Difference]: Finished difference Result 1707 states and 2297 transitions. [2024-11-24 01:41:20,897 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-11-24 01:41:20,897 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 57.6) internal successors, (288), 5 states have internal predecessors, (288), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 349 [2024-11-24 01:41:20,898 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 01:41:20,905 INFO L225 Difference]: With dead ends: 1707 [2024-11-24 01:41:20,905 INFO L226 Difference]: Without dead ends: 1089 [2024-11-24 01:41:20,906 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-11-24 01:41:20,907 INFO L435 NwaCegarLoop]: 544 mSDtfsCounter, 16 mSDsluCounter, 1620 mSDsCounter, 0 mSdLazyCounter, 23 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 16 SdHoareTripleChecker+Valid, 2164 SdHoareTripleChecker+Invalid, 23 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 23 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-24 01:41:20,907 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [16 Valid, 2164 Invalid, 23 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 23 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-24 01:41:20,910 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1089 states. [2024-11-24 01:41:20,933 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1089 to 1089. [2024-11-24 01:41:20,934 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1089 states, 1075 states have (on average 1.3432558139534885) internal successors, (1444), 1075 states have internal predecessors, (1444), 12 states have call successors, (12), 1 states have call predecessors, (12), 1 states have return successors, (12), 12 states have call predecessors, (12), 12 states have call successors, (12) [2024-11-24 01:41:20,936 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1089 states to 1089 states and 1468 transitions. [2024-11-24 01:41:20,936 INFO L78 Accepts]: Start accepts. Automaton has 1089 states and 1468 transitions. Word has length 349 [2024-11-24 01:41:20,937 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 01:41:20,937 INFO L471 AbstractCegarLoop]: Abstraction has 1089 states and 1468 transitions. [2024-11-24 01:41:20,937 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 57.6) internal successors, (288), 5 states have internal predecessors, (288), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-24 01:41:20,938 INFO L276 IsEmpty]: Start isEmpty. Operand 1089 states and 1468 transitions. [2024-11-24 01:41:20,940 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 351 [2024-11-24 01:41:20,940 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 01:41:20,941 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 01:41:20,941 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable39 [2024-11-24 01:41:20,941 INFO L396 AbstractCegarLoop]: === Iteration 41 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 01:41:20,941 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 01:41:20,942 INFO L85 PathProgramCache]: Analyzing trace with hash 765704138, now seen corresponding path program 1 times [2024-11-24 01:41:20,942 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 01:41:20,942 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1767657064] [2024-11-24 01:41:20,942 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 01:41:20,942 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 01:41:21,913 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 01:41:23,564 INFO L134 CoverageAnalysis]: Checked inductivity of 150 backedges. 44 proven. 0 refuted. 0 times theorem prover too weak. 106 trivial. 0 not checked. [2024-11-24 01:41:23,564 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-24 01:41:23,564 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1767657064] [2024-11-24 01:41:23,564 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1767657064] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-24 01:41:23,564 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-24 01:41:23,564 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2024-11-24 01:41:23,564 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1189105944] [2024-11-24 01:41:23,564 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-24 01:41:23,565 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 9 states [2024-11-24 01:41:23,565 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-24 01:41:23,565 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2024-11-24 01:41:23,566 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=52, Unknown=0, NotChecked=0, Total=72 [2024-11-24 01:41:23,566 INFO L87 Difference]: Start difference. First operand 1089 states and 1468 transitions. Second operand has 9 states, 9 states have (on average 31.22222222222222) internal successors, (281), 9 states have internal predecessors, (281), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) [2024-11-24 01:41:24,784 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 01:41:24,784 INFO L93 Difference]: Finished difference Result 2624 states and 3500 transitions. [2024-11-24 01:41:24,785 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2024-11-24 01:41:24,785 INFO L78 Accepts]: Start accepts. Automaton has has 9 states, 9 states have (on average 31.22222222222222) internal successors, (281), 9 states have internal predecessors, (281), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) Word has length 350 [2024-11-24 01:41:24,785 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 01:41:24,791 INFO L225 Difference]: With dead ends: 2624 [2024-11-24 01:41:24,791 INFO L226 Difference]: Without dead ends: 1876 [2024-11-24 01:41:24,792 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 21 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=58, Invalid=152, Unknown=0, NotChecked=0, Total=210 [2024-11-24 01:41:24,793 INFO L435 NwaCegarLoop]: 585 mSDtfsCounter, 1394 mSDsluCounter, 2682 mSDsCounter, 0 mSdLazyCounter, 1500 mSolverCounterSat, 7 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.9s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1395 SdHoareTripleChecker+Valid, 3267 SdHoareTripleChecker+Invalid, 1507 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 7 IncrementalHoareTripleChecker+Valid, 1500 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.1s IncrementalHoareTripleChecker+Time [2024-11-24 01:41:24,793 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1395 Valid, 3267 Invalid, 1507 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [7 Valid, 1500 Invalid, 0 Unknown, 0 Unchecked, 1.1s Time] [2024-11-24 01:41:24,795 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1876 states. [2024-11-24 01:41:24,826 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1876 to 1235. [2024-11-24 01:41:24,827 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1235 states, 1217 states have (on average 1.3459326211996714) internal successors, (1638), 1217 states have internal predecessors, (1638), 16 states have call successors, (16), 1 states have call predecessors, (16), 1 states have return successors, (16), 16 states have call predecessors, (16), 16 states have call successors, (16) [2024-11-24 01:41:24,829 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1235 states to 1235 states and 1670 transitions. [2024-11-24 01:41:24,830 INFO L78 Accepts]: Start accepts. Automaton has 1235 states and 1670 transitions. Word has length 350 [2024-11-24 01:41:24,830 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 01:41:24,830 INFO L471 AbstractCegarLoop]: Abstraction has 1235 states and 1670 transitions. [2024-11-24 01:41:24,831 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 9 states, 9 states have (on average 31.22222222222222) internal successors, (281), 9 states have internal predecessors, (281), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) [2024-11-24 01:41:24,831 INFO L276 IsEmpty]: Start isEmpty. Operand 1235 states and 1670 transitions. [2024-11-24 01:41:24,834 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 351 [2024-11-24 01:41:24,834 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 01:41:24,835 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 01:41:24,835 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable40 [2024-11-24 01:41:24,835 INFO L396 AbstractCegarLoop]: === Iteration 42 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 01:41:24,835 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 01:41:24,836 INFO L85 PathProgramCache]: Analyzing trace with hash -1673972598, now seen corresponding path program 1 times [2024-11-24 01:41:24,836 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 01:41:24,836 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [28698859] [2024-11-24 01:41:24,836 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 01:41:24,836 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 01:41:26,639 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 01:41:32,156 INFO L134 CoverageAnalysis]: Checked inductivity of 150 backedges. 50 proven. 40 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-24 01:41:32,156 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-24 01:41:32,156 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [28698859] [2024-11-24 01:41:32,156 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [28698859] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-24 01:41:32,156 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1515080511] [2024-11-24 01:41:32,157 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 01:41:32,157 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-24 01:41:32,157 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d9cbd223-3e19-44a5-b1a1-87e0ec577546/bin/uautomizer-verify-LYvppIcaGC/z3 [2024-11-24 01:41:32,161 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d9cbd223-3e19-44a5-b1a1-87e0ec577546/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-24 01:41:32,163 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d9cbd223-3e19-44a5-b1a1-87e0ec577546/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2024-11-24 01:41:33,721 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 01:41:33,732 INFO L256 TraceCheckSpWp]: Trace formula consists of 2064 conjuncts, 20 conjuncts are in the unsatisfiable core [2024-11-24 01:41:33,740 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-24 01:41:34,042 INFO L134 CoverageAnalysis]: Checked inductivity of 150 backedges. 120 proven. 0 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2024-11-24 01:41:34,043 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-11-24 01:41:34,043 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1515080511] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-24 01:41:34,043 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-11-24 01:41:34,043 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [18] total 24 [2024-11-24 01:41:34,043 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1091808053] [2024-11-24 01:41:34,043 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-24 01:41:34,044 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2024-11-24 01:41:34,044 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-24 01:41:34,044 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2024-11-24 01:41:34,045 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=63, Invalid=489, Unknown=0, NotChecked=0, Total=552 [2024-11-24 01:41:34,045 INFO L87 Difference]: Start difference. First operand 1235 states and 1670 transitions. Second operand has 8 states, 8 states have (on average 40.375) internal successors, (323), 8 states have internal predecessors, (323), 2 states have call successors, (6), 2 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-24 01:41:34,829 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 01:41:34,829 INFO L93 Difference]: Finished difference Result 2723 states and 3688 transitions. [2024-11-24 01:41:34,829 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2024-11-24 01:41:34,830 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 40.375) internal successors, (323), 8 states have internal predecessors, (323), 2 states have call successors, (6), 2 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 350 [2024-11-24 01:41:34,830 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 01:41:34,836 INFO L225 Difference]: With dead ends: 2723 [2024-11-24 01:41:34,836 INFO L226 Difference]: Without dead ends: 2140 [2024-11-24 01:41:34,838 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 369 GetRequests, 345 SyntacticMatches, 0 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 138 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=75, Invalid=575, Unknown=0, NotChecked=0, Total=650 [2024-11-24 01:41:34,839 INFO L435 NwaCegarLoop]: 395 mSDtfsCounter, 928 mSDsluCounter, 1965 mSDsCounter, 0 mSdLazyCounter, 936 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 934 SdHoareTripleChecker+Valid, 2360 SdHoareTripleChecker+Invalid, 936 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 936 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.7s IncrementalHoareTripleChecker+Time [2024-11-24 01:41:34,841 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [934 Valid, 2360 Invalid, 936 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 936 Invalid, 0 Unknown, 0 Unchecked, 0.7s Time] [2024-11-24 01:41:34,843 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2140 states. [2024-11-24 01:41:34,895 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2140 to 1794. [2024-11-24 01:41:34,901 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1794 states, 1764 states have (on average 1.3310657596371882) internal successors, (2348), 1764 states have internal predecessors, (2348), 28 states have call successors, (28), 1 states have call predecessors, (28), 1 states have return successors, (28), 28 states have call predecessors, (28), 28 states have call successors, (28) [2024-11-24 01:41:34,908 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1794 states to 1794 states and 2404 transitions. [2024-11-24 01:41:34,909 INFO L78 Accepts]: Start accepts. Automaton has 1794 states and 2404 transitions. Word has length 350 [2024-11-24 01:41:34,910 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 01:41:34,910 INFO L471 AbstractCegarLoop]: Abstraction has 1794 states and 2404 transitions. [2024-11-24 01:41:34,911 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 40.375) internal successors, (323), 8 states have internal predecessors, (323), 2 states have call successors, (6), 2 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-24 01:41:34,912 INFO L276 IsEmpty]: Start isEmpty. Operand 1794 states and 2404 transitions. [2024-11-24 01:41:34,916 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 352 [2024-11-24 01:41:34,916 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 01:41:34,917 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 01:41:34,936 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d9cbd223-3e19-44a5-b1a1-87e0ec577546/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Ended with exit code 0 [2024-11-24 01:41:35,117 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 5 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d9cbd223-3e19-44a5-b1a1-87e0ec577546/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable41 [2024-11-24 01:41:35,118 INFO L396 AbstractCegarLoop]: === Iteration 43 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 01:41:35,118 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 01:41:35,119 INFO L85 PathProgramCache]: Analyzing trace with hash -1847452847, now seen corresponding path program 1 times [2024-11-24 01:41:35,120 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 01:41:35,120 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1945501216] [2024-11-24 01:41:35,120 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 01:41:35,120 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 01:41:37,390 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 01:41:38,917 INFO L134 CoverageAnalysis]: Checked inductivity of 150 backedges. 40 proven. 0 refuted. 0 times theorem prover too weak. 110 trivial. 0 not checked. [2024-11-24 01:41:38,917 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-24 01:41:38,917 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1945501216] [2024-11-24 01:41:38,917 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1945501216] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-24 01:41:38,917 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-24 01:41:38,918 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2024-11-24 01:41:38,918 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1112413430] [2024-11-24 01:41:38,918 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-24 01:41:38,918 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 12 states [2024-11-24 01:41:38,918 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-24 01:41:38,919 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2024-11-24 01:41:38,919 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=29, Invalid=103, Unknown=0, NotChecked=0, Total=132 [2024-11-24 01:41:38,919 INFO L87 Difference]: Start difference. First operand 1794 states and 2404 transitions. Second operand has 12 states, 12 states have (on average 23.25) internal successors, (279), 12 states have internal predecessors, (279), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) [2024-11-24 01:41:39,553 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 01:41:39,553 INFO L93 Difference]: Finished difference Result 3250 states and 4342 transitions. [2024-11-24 01:41:39,554 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2024-11-24 01:41:39,554 INFO L78 Accepts]: Start accepts. Automaton has has 12 states, 12 states have (on average 23.25) internal successors, (279), 12 states have internal predecessors, (279), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) Word has length 351 [2024-11-24 01:41:39,555 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 01:41:39,560 INFO L225 Difference]: With dead ends: 3250 [2024-11-24 01:41:39,560 INFO L226 Difference]: Without dead ends: 2408 [2024-11-24 01:41:39,562 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 28 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=60, Invalid=212, Unknown=0, NotChecked=0, Total=272 [2024-11-24 01:41:39,562 INFO L435 NwaCegarLoop]: 823 mSDtfsCounter, 1277 mSDsluCounter, 5925 mSDsCounter, 0 mSdLazyCounter, 552 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1282 SdHoareTripleChecker+Valid, 6748 SdHoareTripleChecker+Invalid, 554 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 552 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2024-11-24 01:41:39,563 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1282 Valid, 6748 Invalid, 554 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 552 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2024-11-24 01:41:39,565 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2408 states. [2024-11-24 01:41:39,610 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2408 to 1936. [2024-11-24 01:41:39,613 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1936 states, 1900 states have (on average 1.3294736842105264) internal successors, (2526), 1900 states have internal predecessors, (2526), 34 states have call successors, (34), 1 states have call predecessors, (34), 1 states have return successors, (34), 34 states have call predecessors, (34), 34 states have call successors, (34) [2024-11-24 01:41:39,616 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1936 states to 1936 states and 2594 transitions. [2024-11-24 01:41:39,617 INFO L78 Accepts]: Start accepts. Automaton has 1936 states and 2594 transitions. Word has length 351 [2024-11-24 01:41:39,617 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 01:41:39,617 INFO L471 AbstractCegarLoop]: Abstraction has 1936 states and 2594 transitions. [2024-11-24 01:41:39,617 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 12 states, 12 states have (on average 23.25) internal successors, (279), 12 states have internal predecessors, (279), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) [2024-11-24 01:41:39,617 INFO L276 IsEmpty]: Start isEmpty. Operand 1936 states and 2594 transitions. [2024-11-24 01:41:39,622 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 352 [2024-11-24 01:41:39,622 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 01:41:39,622 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 01:41:39,623 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable42 [2024-11-24 01:41:39,623 INFO L396 AbstractCegarLoop]: === Iteration 44 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 01:41:39,623 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 01:41:39,623 INFO L85 PathProgramCache]: Analyzing trace with hash -261377807, now seen corresponding path program 1 times [2024-11-24 01:41:39,624 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 01:41:39,624 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2044474303] [2024-11-24 01:41:39,624 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 01:41:39,624 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 01:41:41,160 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 01:41:45,256 INFO L134 CoverageAnalysis]: Checked inductivity of 148 backedges. 50 proven. 38 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-24 01:41:45,256 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-24 01:41:45,256 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2044474303] [2024-11-24 01:41:45,256 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2044474303] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-24 01:41:45,256 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1532248283] [2024-11-24 01:41:45,256 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 01:41:45,256 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-24 01:41:45,256 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d9cbd223-3e19-44a5-b1a1-87e0ec577546/bin/uautomizer-verify-LYvppIcaGC/z3 [2024-11-24 01:41:45,258 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d9cbd223-3e19-44a5-b1a1-87e0ec577546/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-24 01:41:45,259 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d9cbd223-3e19-44a5-b1a1-87e0ec577546/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2024-11-24 01:41:46,970 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 01:41:46,980 INFO L256 TraceCheckSpWp]: Trace formula consists of 2067 conjuncts, 11 conjuncts are in the unsatisfiable core [2024-11-24 01:41:46,987 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-24 01:41:47,102 INFO L134 CoverageAnalysis]: Checked inductivity of 148 backedges. 57 proven. 0 refuted. 0 times theorem prover too weak. 91 trivial. 0 not checked. [2024-11-24 01:41:47,102 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-11-24 01:41:47,102 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1532248283] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-24 01:41:47,102 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-11-24 01:41:47,102 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [18] total 22 [2024-11-24 01:41:47,102 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1607967921] [2024-11-24 01:41:47,103 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-24 01:41:47,103 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-11-24 01:41:47,103 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-24 01:41:47,104 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-11-24 01:41:47,104 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=56, Invalid=406, Unknown=0, NotChecked=0, Total=462 [2024-11-24 01:41:47,104 INFO L87 Difference]: Start difference. First operand 1936 states and 2594 transitions. Second operand has 6 states, 5 states have (on average 54.0) internal successors, (270), 6 states have internal predecessors, (270), 3 states have call successors, (5), 2 states have call predecessors, (5), 3 states have return successors, (5), 2 states have call predecessors, (5), 3 states have call successors, (5) [2024-11-24 01:41:47,180 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 01:41:47,180 INFO L93 Difference]: Finished difference Result 3495 states and 4673 transitions. [2024-11-24 01:41:47,180 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-24 01:41:47,180 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 5 states have (on average 54.0) internal successors, (270), 6 states have internal predecessors, (270), 3 states have call successors, (5), 2 states have call predecessors, (5), 3 states have return successors, (5), 2 states have call predecessors, (5), 3 states have call successors, (5) Word has length 351 [2024-11-24 01:41:47,180 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 01:41:47,185 INFO L225 Difference]: With dead ends: 3495 [2024-11-24 01:41:47,185 INFO L226 Difference]: Without dead ends: 1936 [2024-11-24 01:41:47,187 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 368 GetRequests, 348 SyntacticMatches, 0 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 116 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=56, Invalid=406, Unknown=0, NotChecked=0, Total=462 [2024-11-24 01:41:47,188 INFO L435 NwaCegarLoop]: 544 mSDtfsCounter, 0 mSDsluCounter, 2157 mSDsCounter, 0 mSdLazyCounter, 39 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 2701 SdHoareTripleChecker+Invalid, 39 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 39 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-24 01:41:47,188 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 2701 Invalid, 39 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 39 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-24 01:41:47,190 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1936 states. [2024-11-24 01:41:47,229 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1936 to 1936. [2024-11-24 01:41:47,231 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1936 states, 1900 states have (on average 1.3247368421052632) internal successors, (2517), 1900 states have internal predecessors, (2517), 34 states have call successors, (34), 1 states have call predecessors, (34), 1 states have return successors, (34), 34 states have call predecessors, (34), 34 states have call successors, (34) [2024-11-24 01:41:47,233 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1936 states to 1936 states and 2585 transitions. [2024-11-24 01:41:47,234 INFO L78 Accepts]: Start accepts. Automaton has 1936 states and 2585 transitions. Word has length 351 [2024-11-24 01:41:47,234 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 01:41:47,234 INFO L471 AbstractCegarLoop]: Abstraction has 1936 states and 2585 transitions. [2024-11-24 01:41:47,234 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 5 states have (on average 54.0) internal successors, (270), 6 states have internal predecessors, (270), 3 states have call successors, (5), 2 states have call predecessors, (5), 3 states have return successors, (5), 2 states have call predecessors, (5), 3 states have call successors, (5) [2024-11-24 01:41:47,234 INFO L276 IsEmpty]: Start isEmpty. Operand 1936 states and 2585 transitions. [2024-11-24 01:41:47,238 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 352 [2024-11-24 01:41:47,239 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 01:41:47,239 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 01:41:47,259 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d9cbd223-3e19-44a5-b1a1-87e0ec577546/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Forceful destruction successful, exit code 0 [2024-11-24 01:41:47,439 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable43,6 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d9cbd223-3e19-44a5-b1a1-87e0ec577546/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-24 01:41:47,440 INFO L396 AbstractCegarLoop]: === Iteration 45 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 01:41:47,440 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 01:41:47,440 INFO L85 PathProgramCache]: Analyzing trace with hash -176775888, now seen corresponding path program 1 times [2024-11-24 01:41:47,440 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 01:41:47,440 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [14867193] [2024-11-24 01:41:47,440 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 01:41:47,440 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 01:41:48,163 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 01:41:48,836 INFO L134 CoverageAnalysis]: Checked inductivity of 150 backedges. 90 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-24 01:41:48,836 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-24 01:41:48,836 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [14867193] [2024-11-24 01:41:48,836 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [14867193] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-24 01:41:48,836 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-24 01:41:48,836 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-11-24 01:41:48,836 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1004731977] [2024-11-24 01:41:48,837 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-24 01:41:48,837 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-11-24 01:41:48,837 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-24 01:41:48,837 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-11-24 01:41:48,837 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2024-11-24 01:41:48,837 INFO L87 Difference]: Start difference. First operand 1936 states and 2585 transitions. Second operand has 6 states, 6 states have (on average 54.0) internal successors, (324), 6 states have internal predecessors, (324), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-24 01:41:49,404 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 01:41:49,404 INFO L93 Difference]: Finished difference Result 2541 states and 3414 transitions. [2024-11-24 01:41:49,404 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-24 01:41:49,404 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 54.0) internal successors, (324), 6 states have internal predecessors, (324), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 351 [2024-11-24 01:41:49,405 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 01:41:49,407 INFO L225 Difference]: With dead ends: 2541 [2024-11-24 01:41:49,407 INFO L226 Difference]: Without dead ends: 2099 [2024-11-24 01:41:49,408 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2024-11-24 01:41:49,409 INFO L435 NwaCegarLoop]: 395 mSDtfsCounter, 944 mSDsluCounter, 1142 mSDsCounter, 0 mSdLazyCounter, 606 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 947 SdHoareTripleChecker+Valid, 1537 SdHoareTripleChecker+Invalid, 609 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 606 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2024-11-24 01:41:49,409 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [947 Valid, 1537 Invalid, 609 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 606 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2024-11-24 01:41:49,411 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2099 states. [2024-11-24 01:41:49,452 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2099 to 1521. [2024-11-24 01:41:49,454 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1521 states, 1491 states have (on average 1.3340040241448692) internal successors, (1989), 1491 states have internal predecessors, (1989), 28 states have call successors, (28), 1 states have call predecessors, (28), 1 states have return successors, (28), 28 states have call predecessors, (28), 28 states have call successors, (28) [2024-11-24 01:41:49,456 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1521 states to 1521 states and 2045 transitions. [2024-11-24 01:41:49,457 INFO L78 Accepts]: Start accepts. Automaton has 1521 states and 2045 transitions. Word has length 351 [2024-11-24 01:41:49,457 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 01:41:49,457 INFO L471 AbstractCegarLoop]: Abstraction has 1521 states and 2045 transitions. [2024-11-24 01:41:49,457 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 54.0) internal successors, (324), 6 states have internal predecessors, (324), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-24 01:41:49,457 INFO L276 IsEmpty]: Start isEmpty. Operand 1521 states and 2045 transitions. [2024-11-24 01:41:49,461 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 353 [2024-11-24 01:41:49,462 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 01:41:49,462 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 01:41:49,462 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable44 [2024-11-24 01:41:49,462 INFO L396 AbstractCegarLoop]: === Iteration 46 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 01:41:49,463 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 01:41:49,463 INFO L85 PathProgramCache]: Analyzing trace with hash -1461397040, now seen corresponding path program 1 times [2024-11-24 01:41:49,463 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 01:41:49,463 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1359426597] [2024-11-24 01:41:49,463 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 01:41:49,463 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 01:41:49,698 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 01:41:50,149 INFO L134 CoverageAnalysis]: Checked inductivity of 150 backedges. 42 proven. 0 refuted. 0 times theorem prover too weak. 108 trivial. 0 not checked. [2024-11-24 01:41:50,149 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-24 01:41:50,149 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1359426597] [2024-11-24 01:41:50,149 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1359426597] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-24 01:41:50,149 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-24 01:41:50,149 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-11-24 01:41:50,149 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [900815238] [2024-11-24 01:41:50,149 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-24 01:41:50,150 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-11-24 01:41:50,150 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-24 01:41:50,150 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-11-24 01:41:50,150 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2024-11-24 01:41:50,151 INFO L87 Difference]: Start difference. First operand 1521 states and 2045 transitions. Second operand has 6 states, 6 states have (on average 47.0) internal successors, (282), 6 states have internal predecessors, (282), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-24 01:41:50,584 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 01:41:50,584 INFO L93 Difference]: Finished difference Result 2379 states and 3188 transitions. [2024-11-24 01:41:50,585 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-24 01:41:50,585 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 47.0) internal successors, (282), 6 states have internal predecessors, (282), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 352 [2024-11-24 01:41:50,585 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 01:41:50,588 INFO L225 Difference]: With dead ends: 2379 [2024-11-24 01:41:50,588 INFO L226 Difference]: Without dead ends: 1569 [2024-11-24 01:41:50,589 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2024-11-24 01:41:50,590 INFO L435 NwaCegarLoop]: 399 mSDtfsCounter, 505 mSDsluCounter, 1177 mSDsCounter, 0 mSdLazyCounter, 622 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 505 SdHoareTripleChecker+Valid, 1576 SdHoareTripleChecker+Invalid, 623 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 622 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2024-11-24 01:41:50,590 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [505 Valid, 1576 Invalid, 623 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 622 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2024-11-24 01:41:50,591 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1569 states. [2024-11-24 01:41:50,614 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1569 to 1545. [2024-11-24 01:41:50,616 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1545 states, 1515 states have (on average 1.3287128712871288) internal successors, (2013), 1515 states have internal predecessors, (2013), 28 states have call successors, (28), 1 states have call predecessors, (28), 1 states have return successors, (28), 28 states have call predecessors, (28), 28 states have call successors, (28) [2024-11-24 01:41:50,617 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1545 states to 1545 states and 2069 transitions. [2024-11-24 01:41:50,617 INFO L78 Accepts]: Start accepts. Automaton has 1545 states and 2069 transitions. Word has length 352 [2024-11-24 01:41:50,618 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 01:41:50,618 INFO L471 AbstractCegarLoop]: Abstraction has 1545 states and 2069 transitions. [2024-11-24 01:41:50,618 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 47.0) internal successors, (282), 6 states have internal predecessors, (282), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-24 01:41:50,618 INFO L276 IsEmpty]: Start isEmpty. Operand 1545 states and 2069 transitions. [2024-11-24 01:41:50,621 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 353 [2024-11-24 01:41:50,621 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 01:41:50,621 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 01:41:50,621 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable45 [2024-11-24 01:41:50,621 INFO L396 AbstractCegarLoop]: === Iteration 47 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 01:41:50,622 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 01:41:50,622 INFO L85 PathProgramCache]: Analyzing trace with hash 1095260226, now seen corresponding path program 1 times [2024-11-24 01:41:50,622 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 01:41:50,622 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1362808796] [2024-11-24 01:41:50,622 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 01:41:50,622 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 01:41:52,128 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 01:41:53,987 INFO L134 CoverageAnalysis]: Checked inductivity of 149 backedges. 2 proven. 87 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-24 01:41:53,988 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-24 01:41:53,988 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1362808796] [2024-11-24 01:41:53,988 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1362808796] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-24 01:41:53,988 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1989713913] [2024-11-24 01:41:53,988 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 01:41:53,988 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-24 01:41:53,988 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d9cbd223-3e19-44a5-b1a1-87e0ec577546/bin/uautomizer-verify-LYvppIcaGC/z3 [2024-11-24 01:41:53,994 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d9cbd223-3e19-44a5-b1a1-87e0ec577546/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-24 01:41:53,997 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d9cbd223-3e19-44a5-b1a1-87e0ec577546/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2024-11-24 01:41:55,988 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 01:41:55,998 INFO L256 TraceCheckSpWp]: Trace formula consists of 2070 conjuncts, 11 conjuncts are in the unsatisfiable core [2024-11-24 01:41:56,004 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-24 01:41:56,079 INFO L134 CoverageAnalysis]: Checked inductivity of 149 backedges. 75 proven. 0 refuted. 0 times theorem prover too weak. 74 trivial. 0 not checked. [2024-11-24 01:41:56,080 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-11-24 01:41:56,080 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1989713913] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-24 01:41:56,080 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-11-24 01:41:56,080 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [13] total 17 [2024-11-24 01:41:56,080 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1298048973] [2024-11-24 01:41:56,080 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-24 01:41:56,081 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-11-24 01:41:56,081 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-24 01:41:56,082 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-11-24 01:41:56,082 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=35, Invalid=237, Unknown=0, NotChecked=0, Total=272 [2024-11-24 01:41:56,082 INFO L87 Difference]: Start difference. First operand 1545 states and 2069 transitions. Second operand has 6 states, 5 states have (on average 56.0) internal successors, (280), 6 states have internal predecessors, (280), 3 states have call successors, (6), 2 states have call predecessors, (6), 3 states have return successors, (6), 2 states have call predecessors, (6), 3 states have call successors, (6) [2024-11-24 01:41:56,151 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 01:41:56,151 INFO L93 Difference]: Finished difference Result 2559 states and 3422 transitions. [2024-11-24 01:41:56,151 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-24 01:41:56,152 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 5 states have (on average 56.0) internal successors, (280), 6 states have internal predecessors, (280), 3 states have call successors, (6), 2 states have call predecessors, (6), 3 states have return successors, (6), 2 states have call predecessors, (6), 3 states have call successors, (6) Word has length 352 [2024-11-24 01:41:56,152 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 01:41:56,155 INFO L225 Difference]: With dead ends: 2559 [2024-11-24 01:41:56,155 INFO L226 Difference]: Without dead ends: 1545 [2024-11-24 01:41:56,156 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 365 GetRequests, 349 SyntacticMatches, 1 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 32 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=35, Invalid=237, Unknown=0, NotChecked=0, Total=272 [2024-11-24 01:41:56,157 INFO L435 NwaCegarLoop]: 543 mSDtfsCounter, 0 mSDsluCounter, 2153 mSDsCounter, 0 mSdLazyCounter, 39 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 2696 SdHoareTripleChecker+Invalid, 39 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 39 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-24 01:41:56,157 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 2696 Invalid, 39 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 39 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-24 01:41:56,158 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1545 states. [2024-11-24 01:41:56,191 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1545 to 1545. [2024-11-24 01:41:56,193 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1545 states, 1515 states have (on average 1.3194719471947194) internal successors, (1999), 1515 states have internal predecessors, (1999), 28 states have call successors, (28), 1 states have call predecessors, (28), 1 states have return successors, (28), 28 states have call predecessors, (28), 28 states have call successors, (28) [2024-11-24 01:41:56,194 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1545 states to 1545 states and 2055 transitions. [2024-11-24 01:41:56,195 INFO L78 Accepts]: Start accepts. Automaton has 1545 states and 2055 transitions. Word has length 352 [2024-11-24 01:41:56,195 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 01:41:56,195 INFO L471 AbstractCegarLoop]: Abstraction has 1545 states and 2055 transitions. [2024-11-24 01:41:56,195 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 5 states have (on average 56.0) internal successors, (280), 6 states have internal predecessors, (280), 3 states have call successors, (6), 2 states have call predecessors, (6), 3 states have return successors, (6), 2 states have call predecessors, (6), 3 states have call successors, (6) [2024-11-24 01:41:56,195 INFO L276 IsEmpty]: Start isEmpty. Operand 1545 states and 2055 transitions. [2024-11-24 01:41:56,197 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 355 [2024-11-24 01:41:56,198 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 01:41:56,198 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 01:41:56,213 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d9cbd223-3e19-44a5-b1a1-87e0ec577546/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Forceful destruction successful, exit code 0 [2024-11-24 01:41:56,398 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable46,7 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d9cbd223-3e19-44a5-b1a1-87e0ec577546/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-24 01:41:56,398 INFO L396 AbstractCegarLoop]: === Iteration 48 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 01:41:56,399 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 01:41:56,399 INFO L85 PathProgramCache]: Analyzing trace with hash -2111060302, now seen corresponding path program 1 times [2024-11-24 01:41:56,399 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 01:41:56,399 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1448034011] [2024-11-24 01:41:56,399 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 01:41:56,399 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 01:41:57,191 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 01:41:58,170 INFO L134 CoverageAnalysis]: Checked inductivity of 150 backedges. 90 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-24 01:41:58,170 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-24 01:41:58,170 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1448034011] [2024-11-24 01:41:58,170 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1448034011] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-24 01:41:58,170 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-24 01:41:58,171 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2024-11-24 01:41:58,171 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1268695161] [2024-11-24 01:41:58,171 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-24 01:41:58,171 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 9 states [2024-11-24 01:41:58,171 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-24 01:41:58,172 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2024-11-24 01:41:58,172 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=52, Unknown=0, NotChecked=0, Total=72 [2024-11-24 01:41:58,172 INFO L87 Difference]: Start difference. First operand 1545 states and 2055 transitions. Second operand has 9 states, 9 states have (on average 36.333333333333336) internal successors, (327), 9 states have internal predecessors, (327), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) [2024-11-24 01:41:59,237 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 01:41:59,237 INFO L93 Difference]: Finished difference Result 2744 states and 3642 transitions. [2024-11-24 01:41:59,237 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2024-11-24 01:41:59,237 INFO L78 Accepts]: Start accepts. Automaton has has 9 states, 9 states have (on average 36.333333333333336) internal successors, (327), 9 states have internal predecessors, (327), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) Word has length 354 [2024-11-24 01:41:59,238 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 01:41:59,241 INFO L225 Difference]: With dead ends: 2744 [2024-11-24 01:41:59,241 INFO L226 Difference]: Without dead ends: 2187 [2024-11-24 01:41:59,242 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 13 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=43, Invalid=113, Unknown=0, NotChecked=0, Total=156 [2024-11-24 01:41:59,242 INFO L435 NwaCegarLoop]: 592 mSDtfsCounter, 1309 mSDsluCounter, 2709 mSDsCounter, 0 mSdLazyCounter, 1509 mSolverCounterSat, 6 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.8s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1310 SdHoareTripleChecker+Valid, 3301 SdHoareTripleChecker+Invalid, 1515 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 6 IncrementalHoareTripleChecker+Valid, 1509 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.0s IncrementalHoareTripleChecker+Time [2024-11-24 01:41:59,242 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1310 Valid, 3301 Invalid, 1515 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [6 Valid, 1509 Invalid, 0 Unknown, 0 Unchecked, 1.0s Time] [2024-11-24 01:41:59,244 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2187 states. [2024-11-24 01:41:59,275 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2187 to 1939. [2024-11-24 01:41:59,276 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1939 states, 1909 states have (on average 1.3053954950235727) internal successors, (2492), 1909 states have internal predecessors, (2492), 28 states have call successors, (28), 1 states have call predecessors, (28), 1 states have return successors, (28), 28 states have call predecessors, (28), 28 states have call successors, (28) [2024-11-24 01:41:59,278 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1939 states to 1939 states and 2548 transitions. [2024-11-24 01:41:59,279 INFO L78 Accepts]: Start accepts. Automaton has 1939 states and 2548 transitions. Word has length 354 [2024-11-24 01:41:59,279 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 01:41:59,279 INFO L471 AbstractCegarLoop]: Abstraction has 1939 states and 2548 transitions. [2024-11-24 01:41:59,279 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 9 states, 9 states have (on average 36.333333333333336) internal successors, (327), 9 states have internal predecessors, (327), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) [2024-11-24 01:41:59,279 INFO L276 IsEmpty]: Start isEmpty. Operand 1939 states and 2548 transitions. [2024-11-24 01:41:59,283 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 355 [2024-11-24 01:41:59,283 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 01:41:59,283 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 01:41:59,284 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable47 [2024-11-24 01:41:59,284 INFO L396 AbstractCegarLoop]: === Iteration 49 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 01:41:59,284 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 01:41:59,284 INFO L85 PathProgramCache]: Analyzing trace with hash 1200514099, now seen corresponding path program 1 times [2024-11-24 01:41:59,285 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 01:41:59,285 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [893502432] [2024-11-24 01:41:59,285 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 01:41:59,285 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 01:42:00,793 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 01:42:04,111 INFO L134 CoverageAnalysis]: Checked inductivity of 148 backedges. 50 proven. 36 refuted. 0 times theorem prover too weak. 62 trivial. 0 not checked. [2024-11-24 01:42:04,111 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-24 01:42:04,111 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [893502432] [2024-11-24 01:42:04,111 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [893502432] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-24 01:42:04,111 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1192764648] [2024-11-24 01:42:04,112 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 01:42:04,112 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-24 01:42:04,112 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d9cbd223-3e19-44a5-b1a1-87e0ec577546/bin/uautomizer-verify-LYvppIcaGC/z3 [2024-11-24 01:42:04,113 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d9cbd223-3e19-44a5-b1a1-87e0ec577546/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-24 01:42:04,116 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d9cbd223-3e19-44a5-b1a1-87e0ec577546/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2024-11-24 01:42:06,570 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 01:42:06,581 INFO L256 TraceCheckSpWp]: Trace formula consists of 2076 conjuncts, 55 conjuncts are in the unsatisfiable core [2024-11-24 01:42:06,594 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-24 01:42:07,786 INFO L134 CoverageAnalysis]: Checked inductivity of 148 backedges. 120 proven. 4 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2024-11-24 01:42:07,786 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-24 01:42:09,761 INFO L134 CoverageAnalysis]: Checked inductivity of 148 backedges. 82 proven. 6 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-24 01:42:09,762 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1192764648] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-24 01:42:09,762 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-24 01:42:09,762 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 10, 12] total 35 [2024-11-24 01:42:09,762 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [816253820] [2024-11-24 01:42:09,762 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-24 01:42:09,763 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 35 states [2024-11-24 01:42:09,763 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-24 01:42:09,764 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 35 interpolants. [2024-11-24 01:42:09,764 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=129, Invalid=1061, Unknown=0, NotChecked=0, Total=1190 [2024-11-24 01:42:09,764 INFO L87 Difference]: Start difference. First operand 1939 states and 2548 transitions. Second operand has 35 states, 35 states have (on average 23.857142857142858) internal successors, (835), 35 states have internal predecessors, (835), 7 states have call successors, (18), 2 states have call predecessors, (18), 2 states have return successors, (18), 7 states have call predecessors, (18), 7 states have call successors, (18) [2024-11-24 01:42:18,532 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 01:42:18,533 INFO L93 Difference]: Finished difference Result 8926 states and 11626 transitions. [2024-11-24 01:42:18,533 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 70 states. [2024-11-24 01:42:18,533 INFO L78 Accepts]: Start accepts. Automaton has has 35 states, 35 states have (on average 23.857142857142858) internal successors, (835), 35 states have internal predecessors, (835), 7 states have call successors, (18), 2 states have call predecessors, (18), 2 states have return successors, (18), 7 states have call predecessors, (18), 7 states have call successors, (18) Word has length 354 [2024-11-24 01:42:18,534 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 01:42:18,547 INFO L225 Difference]: With dead ends: 8926 [2024-11-24 01:42:18,547 INFO L226 Difference]: Without dead ends: 7610 [2024-11-24 01:42:18,552 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 791 GetRequests, 691 SyntacticMatches, 0 SemanticMatches, 100 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2628 ImplicationChecksByTransitivity, 2.5s TimeCoverageRelationStatistics Valid=1322, Invalid=8980, Unknown=0, NotChecked=0, Total=10302 [2024-11-24 01:42:18,552 INFO L435 NwaCegarLoop]: 936 mSDtfsCounter, 4606 mSDsluCounter, 18521 mSDsCounter, 0 mSdLazyCounter, 11670 mSolverCounterSat, 25 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 5.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 4609 SdHoareTripleChecker+Valid, 19457 SdHoareTripleChecker+Invalid, 11695 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.1s SdHoareTripleChecker+Time, 25 IncrementalHoareTripleChecker+Valid, 11670 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 6.4s IncrementalHoareTripleChecker+Time [2024-11-24 01:42:18,553 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [4609 Valid, 19457 Invalid, 11695 Unknown, 0 Unchecked, 0.1s Time], IncrementalHoareTripleChecker [25 Valid, 11670 Invalid, 0 Unknown, 0 Unchecked, 6.4s Time] [2024-11-24 01:42:18,558 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7610 states. [2024-11-24 01:42:18,646 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7610 to 3834. [2024-11-24 01:42:18,650 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3834 states, 3767 states have (on average 1.293071409609769) internal successors, (4871), 3767 states have internal predecessors, (4871), 65 states have call successors, (65), 1 states have call predecessors, (65), 1 states have return successors, (65), 65 states have call predecessors, (65), 65 states have call successors, (65) [2024-11-24 01:42:18,655 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3834 states to 3834 states and 5001 transitions. [2024-11-24 01:42:18,656 INFO L78 Accepts]: Start accepts. Automaton has 3834 states and 5001 transitions. Word has length 354 [2024-11-24 01:42:18,656 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 01:42:18,657 INFO L471 AbstractCegarLoop]: Abstraction has 3834 states and 5001 transitions. [2024-11-24 01:42:18,657 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 35 states, 35 states have (on average 23.857142857142858) internal successors, (835), 35 states have internal predecessors, (835), 7 states have call successors, (18), 2 states have call predecessors, (18), 2 states have return successors, (18), 7 states have call predecessors, (18), 7 states have call successors, (18) [2024-11-24 01:42:18,657 INFO L276 IsEmpty]: Start isEmpty. Operand 3834 states and 5001 transitions. [2024-11-24 01:42:18,662 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 356 [2024-11-24 01:42:18,663 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 01:42:18,663 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 01:42:18,683 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d9cbd223-3e19-44a5-b1a1-87e0ec577546/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Ended with exit code 0 [2024-11-24 01:42:18,863 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 8 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d9cbd223-3e19-44a5-b1a1-87e0ec577546/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable48 [2024-11-24 01:42:18,864 INFO L396 AbstractCegarLoop]: === Iteration 50 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 01:42:18,864 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 01:42:18,864 INFO L85 PathProgramCache]: Analyzing trace with hash 1341234832, now seen corresponding path program 1 times [2024-11-24 01:42:18,865 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 01:42:18,865 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1311376758] [2024-11-24 01:42:18,865 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 01:42:18,865 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 01:42:19,681 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 01:42:21,623 INFO L134 CoverageAnalysis]: Checked inductivity of 148 backedges. 2 proven. 86 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-24 01:42:21,623 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-24 01:42:21,623 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1311376758] [2024-11-24 01:42:21,623 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1311376758] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-24 01:42:21,623 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [532645461] [2024-11-24 01:42:21,624 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 01:42:21,624 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-24 01:42:21,624 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d9cbd223-3e19-44a5-b1a1-87e0ec577546/bin/uautomizer-verify-LYvppIcaGC/z3 [2024-11-24 01:42:21,627 INFO L229 MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d9cbd223-3e19-44a5-b1a1-87e0ec577546/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-24 01:42:21,629 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d9cbd223-3e19-44a5-b1a1-87e0ec577546/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2024-11-24 01:42:23,660 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 01:42:23,670 INFO L256 TraceCheckSpWp]: Trace formula consists of 2079 conjuncts, 11 conjuncts are in the unsatisfiable core [2024-11-24 01:42:23,675 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-24 01:42:23,746 INFO L134 CoverageAnalysis]: Checked inductivity of 148 backedges. 123 proven. 0 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-11-24 01:42:23,746 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-11-24 01:42:23,746 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [532645461] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-24 01:42:23,746 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-11-24 01:42:23,746 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [13] total 17 [2024-11-24 01:42:23,747 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [977792357] [2024-11-24 01:42:23,747 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-24 01:42:23,748 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-11-24 01:42:23,748 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-24 01:42:23,749 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-11-24 01:42:23,749 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=36, Invalid=236, Unknown=0, NotChecked=0, Total=272 [2024-11-24 01:42:23,750 INFO L87 Difference]: Start difference. First operand 3834 states and 5001 transitions. Second operand has 6 states, 5 states have (on average 66.0) internal successors, (330), 6 states have internal predecessors, (330), 3 states have call successors, (6), 2 states have call predecessors, (6), 3 states have return successors, (6), 2 states have call predecessors, (6), 3 states have call successors, (6) [2024-11-24 01:42:23,844 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 01:42:23,844 INFO L93 Difference]: Finished difference Result 7425 states and 9661 transitions. [2024-11-24 01:42:23,845 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-24 01:42:23,845 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 5 states have (on average 66.0) internal successors, (330), 6 states have internal predecessors, (330), 3 states have call successors, (6), 2 states have call predecessors, (6), 3 states have return successors, (6), 2 states have call predecessors, (6), 3 states have call successors, (6) Word has length 355 [2024-11-24 01:42:23,845 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 01:42:23,853 INFO L225 Difference]: With dead ends: 7425 [2024-11-24 01:42:23,854 INFO L226 Difference]: Without dead ends: 3834 [2024-11-24 01:42:23,857 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 370 GetRequests, 353 SyntacticMatches, 2 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 43 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=36, Invalid=236, Unknown=0, NotChecked=0, Total=272 [2024-11-24 01:42:23,858 INFO L435 NwaCegarLoop]: 542 mSDtfsCounter, 0 mSDsluCounter, 2149 mSDsCounter, 0 mSdLazyCounter, 39 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 2691 SdHoareTripleChecker+Invalid, 39 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 39 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-24 01:42:23,858 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 2691 Invalid, 39 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 39 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-24 01:42:23,861 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3834 states. [2024-11-24 01:42:23,936 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3834 to 3834. [2024-11-24 01:42:23,940 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3834 states, 3767 states have (on average 1.290151314043005) internal successors, (4860), 3767 states have internal predecessors, (4860), 65 states have call successors, (65), 1 states have call predecessors, (65), 1 states have return successors, (65), 65 states have call predecessors, (65), 65 states have call successors, (65) [2024-11-24 01:42:23,945 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3834 states to 3834 states and 4990 transitions. [2024-11-24 01:42:23,946 INFO L78 Accepts]: Start accepts. Automaton has 3834 states and 4990 transitions. Word has length 355 [2024-11-24 01:42:23,946 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 01:42:23,946 INFO L471 AbstractCegarLoop]: Abstraction has 3834 states and 4990 transitions. [2024-11-24 01:42:23,946 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 5 states have (on average 66.0) internal successors, (330), 6 states have internal predecessors, (330), 3 states have call successors, (6), 2 states have call predecessors, (6), 3 states have return successors, (6), 2 states have call predecessors, (6), 3 states have call successors, (6) [2024-11-24 01:42:23,947 INFO L276 IsEmpty]: Start isEmpty. Operand 3834 states and 4990 transitions. [2024-11-24 01:42:23,952 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 357 [2024-11-24 01:42:23,952 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 01:42:23,952 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 01:42:23,971 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d9cbd223-3e19-44a5-b1a1-87e0ec577546/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Forceful destruction successful, exit code 0 [2024-11-24 01:42:24,153 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 9 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d9cbd223-3e19-44a5-b1a1-87e0ec577546/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable49 [2024-11-24 01:42:24,153 INFO L396 AbstractCegarLoop]: === Iteration 51 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 01:42:24,154 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 01:42:24,154 INFO L85 PathProgramCache]: Analyzing trace with hash -752288331, now seen corresponding path program 1 times [2024-11-24 01:42:24,154 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 01:42:24,154 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [815853853] [2024-11-24 01:42:24,154 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 01:42:24,154 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 01:42:25,029 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 01:42:26,841 INFO L134 CoverageAnalysis]: Checked inductivity of 149 backedges. 2 proven. 87 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-24 01:42:26,841 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-24 01:42:26,841 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [815853853] [2024-11-24 01:42:26,841 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [815853853] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-24 01:42:26,841 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1719151870] [2024-11-24 01:42:26,841 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 01:42:26,841 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-24 01:42:26,842 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d9cbd223-3e19-44a5-b1a1-87e0ec577546/bin/uautomizer-verify-LYvppIcaGC/z3 [2024-11-24 01:42:26,843 INFO L229 MonitoredProcess]: Starting monitored process 10 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d9cbd223-3e19-44a5-b1a1-87e0ec577546/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-24 01:42:26,846 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d9cbd223-3e19-44a5-b1a1-87e0ec577546/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process [2024-11-24 01:42:29,489 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 01:42:29,500 INFO L256 TraceCheckSpWp]: Trace formula consists of 2082 conjuncts, 97 conjuncts are in the unsatisfiable core [2024-11-24 01:42:29,511 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-24 01:42:32,514 INFO L134 CoverageAnalysis]: Checked inductivity of 149 backedges. 118 proven. 7 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2024-11-24 01:42:32,514 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-24 01:42:36,164 INFO L134 CoverageAnalysis]: Checked inductivity of 149 backedges. 83 proven. 6 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-24 01:42:36,164 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1719151870] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-24 01:42:36,164 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-24 01:42:36,164 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 19, 12] total 40 [2024-11-24 01:42:36,164 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [332075691] [2024-11-24 01:42:36,165 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-24 01:42:36,165 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 40 states [2024-11-24 01:42:36,166 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-24 01:42:36,167 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 40 interpolants. [2024-11-24 01:42:36,167 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=265, Invalid=1295, Unknown=0, NotChecked=0, Total=1560 [2024-11-24 01:42:36,168 INFO L87 Difference]: Start difference. First operand 3834 states and 4990 transitions. Second operand has 40 states, 40 states have (on average 23.55) internal successors, (942), 40 states have internal predecessors, (942), 6 states have call successors, (18), 2 states have call predecessors, (18), 2 states have return successors, (18), 6 states have call predecessors, (18), 6 states have call successors, (18) [2024-11-24 01:42:42,125 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 01:42:42,125 INFO L93 Difference]: Finished difference Result 19225 states and 24795 transitions. [2024-11-24 01:42:42,125 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 52 states. [2024-11-24 01:42:42,126 INFO L78 Accepts]: Start accepts. Automaton has has 40 states, 40 states have (on average 23.55) internal successors, (942), 40 states have internal predecessors, (942), 6 states have call successors, (18), 2 states have call predecessors, (18), 2 states have return successors, (18), 6 states have call predecessors, (18), 6 states have call successors, (18) Word has length 356 [2024-11-24 01:42:42,126 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 01:42:42,144 INFO L225 Difference]: With dead ends: 19225 [2024-11-24 01:42:42,144 INFO L226 Difference]: Without dead ends: 15640 [2024-11-24 01:42:42,151 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 776 GetRequests, 686 SyntacticMatches, 2 SemanticMatches, 88 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2076 ImplicationChecksByTransitivity, 2.4s TimeCoverageRelationStatistics Valid=1137, Invalid=6873, Unknown=0, NotChecked=0, Total=8010 [2024-11-24 01:42:42,152 INFO L435 NwaCegarLoop]: 416 mSDtfsCounter, 3763 mSDsluCounter, 9265 mSDsCounter, 0 mSdLazyCounter, 6744 mSolverCounterSat, 32 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 3.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 3763 SdHoareTripleChecker+Valid, 9681 SdHoareTripleChecker+Invalid, 6776 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 32 IncrementalHoareTripleChecker+Valid, 6744 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 4.1s IncrementalHoareTripleChecker+Time [2024-11-24 01:42:42,152 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [3763 Valid, 9681 Invalid, 6776 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [32 Valid, 6744 Invalid, 0 Unknown, 0 Unchecked, 4.1s Time] [2024-11-24 01:42:42,161 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15640 states. [2024-11-24 01:42:42,325 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15640 to 3832. [2024-11-24 01:42:42,329 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3832 states, 3765 states have (on average 1.2895086321381142) internal successors, (4855), 3765 states have internal predecessors, (4855), 65 states have call successors, (65), 1 states have call predecessors, (65), 1 states have return successors, (65), 65 states have call predecessors, (65), 65 states have call successors, (65) [2024-11-24 01:42:42,335 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3832 states to 3832 states and 4985 transitions. [2024-11-24 01:42:42,336 INFO L78 Accepts]: Start accepts. Automaton has 3832 states and 4985 transitions. Word has length 356 [2024-11-24 01:42:42,337 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 01:42:42,337 INFO L471 AbstractCegarLoop]: Abstraction has 3832 states and 4985 transitions. [2024-11-24 01:42:42,337 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 40 states, 40 states have (on average 23.55) internal successors, (942), 40 states have internal predecessors, (942), 6 states have call successors, (18), 2 states have call predecessors, (18), 2 states have return successors, (18), 6 states have call predecessors, (18), 6 states have call successors, (18) [2024-11-24 01:42:42,338 INFO L276 IsEmpty]: Start isEmpty. Operand 3832 states and 4985 transitions. [2024-11-24 01:42:42,343 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 357 [2024-11-24 01:42:42,344 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 01:42:42,345 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 01:42:42,364 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d9cbd223-3e19-44a5-b1a1-87e0ec577546/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Ended with exit code 0 [2024-11-24 01:42:42,545 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable50,10 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d9cbd223-3e19-44a5-b1a1-87e0ec577546/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-24 01:42:42,546 INFO L396 AbstractCegarLoop]: === Iteration 52 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 01:42:42,546 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 01:42:42,546 INFO L85 PathProgramCache]: Analyzing trace with hash -152670903, now seen corresponding path program 1 times [2024-11-24 01:42:42,546 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 01:42:42,547 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1495702836] [2024-11-24 01:42:42,547 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 01:42:42,547 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 01:42:42,838 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 01:42:43,360 INFO L134 CoverageAnalysis]: Checked inductivity of 149 backedges. 53 proven. 0 refuted. 0 times theorem prover too weak. 96 trivial. 0 not checked. [2024-11-24 01:42:43,360 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-24 01:42:43,360 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1495702836] [2024-11-24 01:42:43,360 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1495702836] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-24 01:42:43,360 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-24 01:42:43,360 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-24 01:42:43,360 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1359493191] [2024-11-24 01:42:43,360 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-24 01:42:43,361 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-24 01:42:43,361 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-24 01:42:43,361 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-24 01:42:43,361 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-24 01:42:43,362 INFO L87 Difference]: Start difference. First operand 3832 states and 4985 transitions. Second operand has 5 states, 5 states have (on average 60.0) internal successors, (300), 5 states have internal predecessors, (300), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-24 01:42:43,470 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 01:42:43,470 INFO L93 Difference]: Finished difference Result 6479 states and 8420 transitions. [2024-11-24 01:42:43,471 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-24 01:42:43,471 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 60.0) internal successors, (300), 5 states have internal predecessors, (300), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 356 [2024-11-24 01:42:43,471 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 01:42:43,474 INFO L225 Difference]: With dead ends: 6479 [2024-11-24 01:42:43,474 INFO L226 Difference]: Without dead ends: 3856 [2024-11-24 01:42:43,476 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-24 01:42:43,477 INFO L435 NwaCegarLoop]: 541 mSDtfsCounter, 0 mSDsluCounter, 1072 mSDsCounter, 0 mSdLazyCounter, 16 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 1613 SdHoareTripleChecker+Invalid, 17 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 16 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-24 01:42:43,477 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 1613 Invalid, 17 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 16 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-24 01:42:43,479 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3856 states. [2024-11-24 01:42:43,585 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3856 to 3856. [2024-11-24 01:42:43,589 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3856 states, 3789 states have (on average 1.2855634732119292) internal successors, (4871), 3789 states have internal predecessors, (4871), 65 states have call successors, (65), 1 states have call predecessors, (65), 1 states have return successors, (65), 65 states have call predecessors, (65), 65 states have call successors, (65) [2024-11-24 01:42:43,594 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3856 states to 3856 states and 5001 transitions. [2024-11-24 01:42:43,595 INFO L78 Accepts]: Start accepts. Automaton has 3856 states and 5001 transitions. Word has length 356 [2024-11-24 01:42:43,595 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 01:42:43,596 INFO L471 AbstractCegarLoop]: Abstraction has 3856 states and 5001 transitions. [2024-11-24 01:42:43,596 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 60.0) internal successors, (300), 5 states have internal predecessors, (300), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-24 01:42:43,596 INFO L276 IsEmpty]: Start isEmpty. Operand 3856 states and 5001 transitions. [2024-11-24 01:42:43,601 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 358 [2024-11-24 01:42:43,601 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 01:42:43,602 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 01:42:43,602 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable51 [2024-11-24 01:42:43,602 INFO L396 AbstractCegarLoop]: === Iteration 53 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 01:42:43,602 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 01:42:43,603 INFO L85 PathProgramCache]: Analyzing trace with hash 1171553710, now seen corresponding path program 1 times [2024-11-24 01:42:43,603 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 01:42:43,603 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1270199663] [2024-11-24 01:42:43,603 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 01:42:43,603 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 01:42:43,882 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 01:42:45,019 INFO L134 CoverageAnalysis]: Checked inductivity of 149 backedges. 89 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-24 01:42:45,019 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-24 01:42:45,019 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1270199663] [2024-11-24 01:42:45,019 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1270199663] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-24 01:42:45,019 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-24 01:42:45,019 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-11-24 01:42:45,019 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [65893589] [2024-11-24 01:42:45,020 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-24 01:42:45,020 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-11-24 01:42:45,020 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-24 01:42:45,021 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-11-24 01:42:45,021 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2024-11-24 01:42:45,021 INFO L87 Difference]: Start difference. First operand 3856 states and 5001 transitions. Second operand has 6 states, 6 states have (on average 55.0) internal successors, (330), 6 states have internal predecessors, (330), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-24 01:42:45,179 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 01:42:45,179 INFO L93 Difference]: Finished difference Result 6244 states and 8144 transitions. [2024-11-24 01:42:45,179 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-24 01:42:45,179 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 55.0) internal successors, (330), 6 states have internal predecessors, (330), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 357 [2024-11-24 01:42:45,180 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 01:42:45,185 INFO L225 Difference]: With dead ends: 6244 [2024-11-24 01:42:45,185 INFO L226 Difference]: Without dead ends: 4899 [2024-11-24 01:42:45,188 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2024-11-24 01:42:45,188 INFO L435 NwaCegarLoop]: 922 mSDtfsCounter, 370 mSDsluCounter, 3293 mSDsCounter, 0 mSdLazyCounter, 42 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 370 SdHoareTripleChecker+Valid, 4215 SdHoareTripleChecker+Invalid, 42 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 42 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-24 01:42:45,188 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [370 Valid, 4215 Invalid, 42 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 42 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-24 01:42:45,192 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4899 states. [2024-11-24 01:42:45,299 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4899 to 4062. [2024-11-24 01:42:45,304 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4062 states, 3986 states have (on average 1.2852483692925238) internal successors, (5123), 3986 states have internal predecessors, (5123), 74 states have call successors, (74), 1 states have call predecessors, (74), 1 states have return successors, (74), 74 states have call predecessors, (74), 74 states have call successors, (74) [2024-11-24 01:42:45,309 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4062 states to 4062 states and 5271 transitions. [2024-11-24 01:42:45,310 INFO L78 Accepts]: Start accepts. Automaton has 4062 states and 5271 transitions. Word has length 357 [2024-11-24 01:42:45,311 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 01:42:45,311 INFO L471 AbstractCegarLoop]: Abstraction has 4062 states and 5271 transitions. [2024-11-24 01:42:45,311 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 55.0) internal successors, (330), 6 states have internal predecessors, (330), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-24 01:42:45,311 INFO L276 IsEmpty]: Start isEmpty. Operand 4062 states and 5271 transitions. [2024-11-24 01:42:45,318 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 358 [2024-11-24 01:42:45,318 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 01:42:45,318 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 01:42:45,318 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable52 [2024-11-24 01:42:45,319 INFO L396 AbstractCegarLoop]: === Iteration 54 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 01:42:45,320 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 01:42:45,320 INFO L85 PathProgramCache]: Analyzing trace with hash -1148173526, now seen corresponding path program 1 times [2024-11-24 01:42:45,324 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 01:42:45,324 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [147108674] [2024-11-24 01:42:45,324 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 01:42:45,324 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 01:42:47,104 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 01:42:48,854 INFO L134 CoverageAnalysis]: Checked inductivity of 150 backedges. 2 proven. 88 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-24 01:42:48,854 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-24 01:42:48,854 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [147108674] [2024-11-24 01:42:48,854 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [147108674] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-24 01:42:48,854 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1262932472] [2024-11-24 01:42:48,854 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 01:42:48,854 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-24 01:42:48,854 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d9cbd223-3e19-44a5-b1a1-87e0ec577546/bin/uautomizer-verify-LYvppIcaGC/z3 [2024-11-24 01:42:48,859 INFO L229 MonitoredProcess]: Starting monitored process 11 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d9cbd223-3e19-44a5-b1a1-87e0ec577546/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-24 01:42:48,860 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d9cbd223-3e19-44a5-b1a1-87e0ec577546/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Waiting until timeout for monitored process [2024-11-24 01:42:51,228 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 01:42:51,238 INFO L256 TraceCheckSpWp]: Trace formula consists of 2083 conjuncts, 76 conjuncts are in the unsatisfiable core [2024-11-24 01:42:51,247 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-24 01:42:54,278 INFO L134 CoverageAnalysis]: Checked inductivity of 150 backedges. 2 proven. 88 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-24 01:42:54,278 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-24 01:43:00,597 INFO L134 CoverageAnalysis]: Checked inductivity of 150 backedges. 34 proven. 54 refuted. 0 times theorem prover too weak. 62 trivial. 0 not checked. [2024-11-24 01:43:00,597 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1262932472] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-24 01:43:00,597 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-24 01:43:00,598 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 19, 13] total 37 [2024-11-24 01:43:00,598 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [490809420] [2024-11-24 01:43:00,598 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-24 01:43:00,598 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 37 states [2024-11-24 01:43:00,598 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-24 01:43:00,599 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 37 interpolants. [2024-11-24 01:43:00,599 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=192, Invalid=1140, Unknown=0, NotChecked=0, Total=1332 [2024-11-24 01:43:00,600 INFO L87 Difference]: Start difference. First operand 4062 states and 5271 transitions. Second operand has 37 states, 37 states have (on average 22.675675675675677) internal successors, (839), 37 states have internal predecessors, (839), 5 states have call successors, (15), 1 states have call predecessors, (15), 1 states have return successors, (15), 5 states have call predecessors, (15), 5 states have call successors, (15) [2024-11-24 01:43:04,184 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 01:43:04,185 INFO L93 Difference]: Finished difference Result 10487 states and 13558 transitions. [2024-11-24 01:43:04,185 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2024-11-24 01:43:04,185 INFO L78 Accepts]: Start accepts. Automaton has has 37 states, 37 states have (on average 22.675675675675677) internal successors, (839), 37 states have internal predecessors, (839), 5 states have call successors, (15), 1 states have call predecessors, (15), 1 states have return successors, (15), 5 states have call predecessors, (15), 5 states have call successors, (15) Word has length 357 [2024-11-24 01:43:04,186 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 01:43:04,192 INFO L225 Difference]: With dead ends: 10487 [2024-11-24 01:43:04,193 INFO L226 Difference]: Without dead ends: 8924 [2024-11-24 01:43:04,196 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 750 GetRequests, 689 SyntacticMatches, 1 SemanticMatches, 60 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 847 ImplicationChecksByTransitivity, 1.6s TimeCoverageRelationStatistics Valid=541, Invalid=3241, Unknown=0, NotChecked=0, Total=3782 [2024-11-24 01:43:04,196 INFO L435 NwaCegarLoop]: 432 mSDtfsCounter, 2724 mSDsluCounter, 6612 mSDsCounter, 0 mSdLazyCounter, 4589 mSolverCounterSat, 30 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 2.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2727 SdHoareTripleChecker+Valid, 7044 SdHoareTripleChecker+Invalid, 4619 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 30 IncrementalHoareTripleChecker+Valid, 4589 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 2.6s IncrementalHoareTripleChecker+Time [2024-11-24 01:43:04,197 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2727 Valid, 7044 Invalid, 4619 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [30 Valid, 4589 Invalid, 0 Unknown, 0 Unchecked, 2.6s Time] [2024-11-24 01:43:04,202 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8924 states. [2024-11-24 01:43:04,330 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8924 to 4054. [2024-11-24 01:43:04,333 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4054 states, 3978 states have (on average 1.2838109602815486) internal successors, (5107), 3978 states have internal predecessors, (5107), 74 states have call successors, (74), 1 states have call predecessors, (74), 1 states have return successors, (74), 74 states have call predecessors, (74), 74 states have call successors, (74) [2024-11-24 01:43:04,337 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4054 states to 4054 states and 5255 transitions. [2024-11-24 01:43:04,338 INFO L78 Accepts]: Start accepts. Automaton has 4054 states and 5255 transitions. Word has length 357 [2024-11-24 01:43:04,338 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 01:43:04,338 INFO L471 AbstractCegarLoop]: Abstraction has 4054 states and 5255 transitions. [2024-11-24 01:43:04,339 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 37 states, 37 states have (on average 22.675675675675677) internal successors, (839), 37 states have internal predecessors, (839), 5 states have call successors, (15), 1 states have call predecessors, (15), 1 states have return successors, (15), 5 states have call predecessors, (15), 5 states have call successors, (15) [2024-11-24 01:43:04,339 INFO L276 IsEmpty]: Start isEmpty. Operand 4054 states and 5255 transitions. [2024-11-24 01:43:04,342 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 358 [2024-11-24 01:43:04,342 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 01:43:04,343 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 01:43:04,368 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d9cbd223-3e19-44a5-b1a1-87e0ec577546/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Ended with exit code 0 [2024-11-24 01:43:04,543 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 11 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d9cbd223-3e19-44a5-b1a1-87e0ec577546/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable53 [2024-11-24 01:43:04,544 INFO L396 AbstractCegarLoop]: === Iteration 55 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 01:43:04,544 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 01:43:04,544 INFO L85 PathProgramCache]: Analyzing trace with hash 414587049, now seen corresponding path program 1 times [2024-11-24 01:43:04,544 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 01:43:04,544 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1119895925] [2024-11-24 01:43:04,544 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 01:43:04,545 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 01:43:07,099 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-24 01:43:07,099 INFO L357 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-24 01:43:09,422 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-24 01:43:09,788 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-24 01:43:09,789 INFO L340 BasicCegarLoop]: Counterexample is feasible [2024-11-24 01:43:09,791 INFO L782 garLoopResultBuilder]: Registering result UNSAFE for location ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION (0 of 1 remaining) [2024-11-24 01:43:09,794 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable54 [2024-11-24 01:43:09,798 INFO L422 BasicCegarLoop]: Path program histogram: [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 01:43:10,106 INFO L170 ceAbstractionStarter]: Computing trace abstraction results [2024-11-24 01:43:10,110 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 24.11 01:43:10 BoogieIcfgContainer [2024-11-24 01:43:10,110 INFO L131 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2024-11-24 01:43:10,111 INFO L112 PluginConnector]: ------------------------Witness Printer---------------------------- [2024-11-24 01:43:10,111 INFO L270 PluginConnector]: Initializing Witness Printer... [2024-11-24 01:43:10,111 INFO L274 PluginConnector]: Witness Printer initialized [2024-11-24 01:43:10,112 INFO L184 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 24.11 01:40:12" (3/4) ... [2024-11-24 01:43:10,115 INFO L149 WitnessPrinter]: No result that supports witness generation found [2024-11-24 01:43:10,115 INFO L131 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2024-11-24 01:43:10,116 INFO L158 Benchmark]: Toolchain (without parser) took 181811.46ms. Allocated memory was 167.8MB in the beginning and 2.1GB in the end (delta: 1.9GB). Free memory was 132.7MB in the beginning and 944.9MB in the end (delta: -812.2MB). Peak memory consumption was 1.1GB. Max. memory is 16.1GB. [2024-11-24 01:43:10,117 INFO L158 Benchmark]: CDTParser took 0.42ms. Allocated memory is still 167.8MB. Free memory is still 104.5MB. There was no memory consumed. Max. memory is 16.1GB. [2024-11-24 01:43:10,117 INFO L158 Benchmark]: CACSL2BoogieTranslator took 681.93ms. Allocated memory is still 167.8MB. Free memory was 132.4MB in the beginning and 103.8MB in the end (delta: 28.6MB). Peak memory consumption was 25.2MB. Max. memory is 16.1GB. [2024-11-24 01:43:10,117 INFO L158 Benchmark]: Boogie Procedure Inliner took 240.20ms. Allocated memory is still 167.8MB. Free memory was 103.8MB in the beginning and 75.5MB in the end (delta: 28.3MB). Peak memory consumption was 33.6MB. Max. memory is 16.1GB. [2024-11-24 01:43:10,117 INFO L158 Benchmark]: Boogie Preprocessor took 272.68ms. Allocated memory is still 167.8MB. Free memory was 75.5MB in the beginning and 59.8MB in the end (delta: 15.7MB). Peak memory consumption was 16.8MB. Max. memory is 16.1GB. [2024-11-24 01:43:10,117 INFO L158 Benchmark]: RCFGBuilder took 2759.77ms. Allocated memory is still 167.8MB. Free memory was 59.8MB in the beginning and 82.3MB in the end (delta: -22.5MB). Peak memory consumption was 48.2MB. Max. memory is 16.1GB. [2024-11-24 01:43:10,118 INFO L158 Benchmark]: TraceAbstraction took 177842.81ms. Allocated memory was 167.8MB in the beginning and 2.1GB in the end (delta: 1.9GB). Free memory was 81.3MB in the beginning and 946.0MB in the end (delta: -864.8MB). Peak memory consumption was 1.1GB. Max. memory is 16.1GB. [2024-11-24 01:43:10,118 INFO L158 Benchmark]: Witness Printer took 4.88ms. Allocated memory is still 2.1GB. Free memory was 946.0MB in the beginning and 945.3MB in the end (delta: 752.7kB). There was no memory consumed. Max. memory is 16.1GB. [2024-11-24 01:43:10,119 INFO L338 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.42ms. Allocated memory is still 167.8MB. Free memory is still 104.5MB. There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 681.93ms. Allocated memory is still 167.8MB. Free memory was 132.4MB in the beginning and 103.8MB in the end (delta: 28.6MB). Peak memory consumption was 25.2MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 240.20ms. Allocated memory is still 167.8MB. Free memory was 103.8MB in the beginning and 75.5MB in the end (delta: 28.3MB). Peak memory consumption was 33.6MB. Max. memory is 16.1GB. * Boogie Preprocessor took 272.68ms. Allocated memory is still 167.8MB. Free memory was 75.5MB in the beginning and 59.8MB in the end (delta: 15.7MB). Peak memory consumption was 16.8MB. Max. memory is 16.1GB. * RCFGBuilder took 2759.77ms. Allocated memory is still 167.8MB. Free memory was 59.8MB in the beginning and 82.3MB in the end (delta: -22.5MB). Peak memory consumption was 48.2MB. Max. memory is 16.1GB. * TraceAbstraction took 177842.81ms. Allocated memory was 167.8MB in the beginning and 2.1GB in the end (delta: 1.9GB). Free memory was 81.3MB in the beginning and 946.0MB in the end (delta: -864.8MB). Peak memory consumption was 1.1GB. Max. memory is 16.1GB. * Witness Printer took 4.88ms. Allocated memory is still 2.1GB. Free memory was 946.0MB in the beginning and 945.3MB in the end (delta: 752.7kB). There was no memory consumed. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: ErrorAutomatonStatistics NumberErrorTraces: 0, NumberStatementsAllTraces: 0, NumberRelevantStatements: 0, 0.0s ErrorAutomatonConstructionTimeTotal, 0.0s FaulLocalizationTime, NumberStatementsFirstTrace: -1, TraceLengthAvg: 0, 0.0s ErrorAutomatonConstructionTimeAvg, 0.0s ErrorAutomatonDifferenceTimeAvg, 0.0s ErrorAutomatonDifferenceTimeTotal, NumberOfNoEnhancement: 0, NumberOfFiniteEnhancement: 0, NumberOfInfiniteEnhancement: 0 - UnprovableResult [Line: 21]: Unable to prove that a call to reach_error is unreachable Unable to prove that a call to reach_error is unreachable Reason: overapproximation of bitwiseOr at line 126, overapproximation of bitwiseOr at line 145, overapproximation of bitwiseOr at line 290, overapproximation of bitwiseAnd at line 202, overapproximation of bitwiseAnd at line 384, overapproximation of bitwiseAnd at line 299, overapproximation of bitwiseAnd at line 210, overapproximation of bitwiseAnd at line 403, overapproximation of bitwiseAnd at line 146, overapproximation of bitwiseAnd at line 106, overapproximation of bitwiseAnd at line 110, overapproximation of bitwiseAnd at line 222, overapproximation of bitwiseAnd at line 365, overapproximation of bitwiseAnd at line 515, overapproximation of bitwiseAnd at line 228, overapproximation of bitwiseAnd at line 441, overapproximation of bitwiseAnd at line 234. Possible FailurePath: [L26] const SORT_1 mask_SORT_1 = (SORT_1)-1 >> (sizeof(SORT_1) * 8 - 1); [L27] const SORT_1 msb_SORT_1 = (SORT_1)1 << (1 - 1); [L29] const SORT_3 mask_SORT_3 = (SORT_3)-1 >> (sizeof(SORT_3) * 8 - 32); [L30] const SORT_3 msb_SORT_3 = (SORT_3)1 << (32 - 1); [L32] const SORT_11 mask_SORT_11 = (SORT_11)-1 >> (sizeof(SORT_11) * 8 - 5); [L33] const SORT_11 msb_SORT_11 = (SORT_11)1 << (5 - 1); [L35] const SORT_13 mask_SORT_13 = (SORT_13)-1 >> (sizeof(SORT_13) * 8 - 4); [L36] const SORT_13 msb_SORT_13 = (SORT_13)1 << (4 - 1); [L38] const SORT_19 mask_SORT_19 = (SORT_19)-1 >> (sizeof(SORT_19) * 8 - 3); [L39] const SORT_19 msb_SORT_19 = (SORT_19)1 << (3 - 1); [L41] const SORT_40 mask_SORT_40 = (SORT_40)-1 >> (sizeof(SORT_40) * 8 - 2); [L42] const SORT_40 msb_SORT_40 = (SORT_40)1 << (2 - 1); [L44] const SORT_13 var_15 = 8; [L45] const SORT_19 var_20 = 7; [L46] const SORT_19 var_25 = 6; [L47] const SORT_19 var_30 = 5; [L48] const SORT_19 var_35 = 4; [L49] const SORT_40 var_41 = 3; [L50] const SORT_40 var_46 = 2; [L51] const SORT_1 var_51 = 1; [L52] const SORT_13 var_64 = 9; [L53] const SORT_11 var_81 = 0; [L54] const SORT_1 var_111 = 0; [L55] const SORT_3 var_268 = 0; [L57] SORT_1 input_2; [L58] SORT_3 input_4; [L59] SORT_1 input_5; [L60] SORT_1 input_6; [L61] SORT_1 input_7; [L62] SORT_1 input_8; [L63] SORT_3 input_9; [L64] SORT_1 input_109; [L66] EXPR __VERIFIER_nondet_uint() & mask_SORT_3 VAL [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L66] SORT_3 state_10 = __VERIFIER_nondet_uint() & mask_SORT_3; [L67] EXPR __VERIFIER_nondet_uchar() & mask_SORT_11 VAL [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L67] SORT_11 state_12 = __VERIFIER_nondet_uchar() & mask_SORT_11; [L68] EXPR __VERIFIER_nondet_uint() & mask_SORT_3 VAL [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L68] SORT_3 state_18 = __VERIFIER_nondet_uint() & mask_SORT_3; [L69] EXPR __VERIFIER_nondet_uint() & mask_SORT_3 VAL [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_18=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L69] SORT_3 state_24 = __VERIFIER_nondet_uint() & mask_SORT_3; [L70] EXPR __VERIFIER_nondet_uint() & mask_SORT_3 VAL [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_18=0, state_24=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L70] SORT_3 state_29 = __VERIFIER_nondet_uint() & mask_SORT_3; [L71] EXPR __VERIFIER_nondet_uint() & mask_SORT_3 VAL [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L71] SORT_3 state_34 = __VERIFIER_nondet_uint() & mask_SORT_3; [L72] EXPR __VERIFIER_nondet_uint() & mask_SORT_3 VAL [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L72] SORT_3 state_39 = __VERIFIER_nondet_uint() & mask_SORT_3; [L73] EXPR __VERIFIER_nondet_uint() & mask_SORT_3 VAL [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L73] SORT_3 state_45 = __VERIFIER_nondet_uint() & mask_SORT_3; [L74] EXPR __VERIFIER_nondet_uint() & mask_SORT_3 VAL [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L74] SORT_3 state_50 = __VERIFIER_nondet_uint() & mask_SORT_3; [L75] EXPR __VERIFIER_nondet_uint() & mask_SORT_3 VAL [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L75] SORT_3 state_55 = __VERIFIER_nondet_uint() & mask_SORT_3; [L76] EXPR __VERIFIER_nondet_uchar() & mask_SORT_11 VAL [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L76] SORT_11 state_60 = __VERIFIER_nondet_uchar() & mask_SORT_11; [L77] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L77] SORT_1 state_68 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L78] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L78] SORT_1 state_69 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L79] EXPR __VERIFIER_nondet_uchar() & mask_SORT_11 VAL [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L79] SORT_11 state_72 = __VERIFIER_nondet_uchar() & mask_SORT_11; [L80] EXPR __VERIFIER_nondet_uint() & mask_SORT_3 VAL [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L80] SORT_3 state_87 = __VERIFIER_nondet_uint() & mask_SORT_3; [L81] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L81] SORT_1 state_91 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L82] EXPR __VERIFIER_nondet_uchar() & mask_SORT_11 VAL [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L82] SORT_11 state_136 = __VERIFIER_nondet_uchar() & mask_SORT_11; [L84] SORT_1 init_92_arg_1 = var_51; [L85] state_91 = init_92_arg_1 VAL [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L88] input_2 = __VERIFIER_nondet_uchar() [L89] input_4 = __VERIFIER_nondet_uint() [L90] input_5 = __VERIFIER_nondet_uchar() [L91] input_6 = __VERIFIER_nondet_uchar() [L92] input_7 = __VERIFIER_nondet_uchar() [L93] EXPR input_7 & mask_SORT_1 VAL [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L93] input_7 = input_7 & mask_SORT_1 [L94] input_8 = __VERIFIER_nondet_uchar() [L95] input_9 = __VERIFIER_nondet_uint() [L96] input_109 = __VERIFIER_nondet_uchar() [L98] SORT_1 var_93_arg_0 = input_7; [L99] SORT_1 var_93_arg_1 = state_91; [L100] SORT_1 var_93 = var_93_arg_0 == var_93_arg_1; [L101] SORT_1 var_94_arg_0 = var_51; [L102] SORT_1 var_94 = ~var_94_arg_0; [L103] SORT_1 var_95_arg_0 = var_93; [L104] SORT_1 var_95_arg_1 = var_94; VAL [input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_95_arg_0=0, var_95_arg_1=-2] [L105] EXPR var_95_arg_0 | var_95_arg_1 VAL [input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L105] SORT_1 var_95 = var_95_arg_0 | var_95_arg_1; [L106] EXPR var_95 & mask_SORT_1 VAL [input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L106] var_95 = var_95 & mask_SORT_1 [L107] SORT_1 constr_96_arg_0 = var_95; VAL [constr_96_arg_0=1, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L108] CALL assume_abort_if_not(constr_96_arg_0) VAL [\old(cond)=1] [L22] COND FALSE !(!cond) VAL [\old(cond)=1] [L108] RET assume_abort_if_not(constr_96_arg_0) VAL [constr_96_arg_0=1, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L109] SORT_13 var_65_arg_0 = var_64; VAL [constr_96_arg_0=1, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_65_arg_0=9, var_81=0] [L110] EXPR var_65_arg_0 & mask_SORT_13 VAL [constr_96_arg_0=1, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L110] var_65_arg_0 = var_65_arg_0 & mask_SORT_13 [L111] SORT_11 var_65 = var_65_arg_0; [L112] SORT_11 var_66_arg_0 = state_60; [L113] SORT_11 var_66_arg_1 = var_65; [L114] SORT_1 var_66 = var_66_arg_0 == var_66_arg_1; [L115] SORT_1 var_97_arg_0 = var_66; [L116] SORT_1 var_97 = ~var_97_arg_0; [L117] SORT_1 var_98_arg_0 = input_6; [L118] SORT_1 var_98 = ~var_98_arg_0; [L119] SORT_1 var_99_arg_0 = var_97; [L120] SORT_1 var_99_arg_1 = var_98; VAL [constr_96_arg_0=1, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_99_arg_0=-1, var_99_arg_1=-1] [L121] EXPR var_99_arg_0 | var_99_arg_1 VAL [constr_96_arg_0=1, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L121] SORT_1 var_99 = var_99_arg_0 | var_99_arg_1; [L122] SORT_1 var_100_arg_0 = var_51; [L123] SORT_1 var_100 = ~var_100_arg_0; [L124] SORT_1 var_101_arg_0 = var_99; [L125] SORT_1 var_101_arg_1 = var_100; VAL [constr_96_arg_0=1, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_101_arg_0=255, var_101_arg_1=-2, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L126] EXPR var_101_arg_0 | var_101_arg_1 VAL [constr_96_arg_0=1, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L126] SORT_1 var_101 = var_101_arg_0 | var_101_arg_1; [L127] EXPR var_101 & mask_SORT_1 VAL [constr_96_arg_0=1, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L127] var_101 = var_101 & mask_SORT_1 [L128] SORT_1 constr_102_arg_0 = var_101; VAL [constr_102_arg_0=1, constr_96_arg_0=1, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L129] CALL assume_abort_if_not(constr_102_arg_0) VAL [\old(cond)=1] [L22] COND FALSE !(!cond) VAL [\old(cond)=1] [L129] RET assume_abort_if_not(constr_102_arg_0) VAL [constr_102_arg_0=1, constr_96_arg_0=1, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L130] SORT_11 var_61_arg_0 = state_60; [L131] SORT_1 var_61 = var_61_arg_0 != 0; [L132] SORT_1 var_62_arg_0 = var_61; [L133] SORT_1 var_62 = ~var_62_arg_0; [L134] SORT_1 var_103_arg_0 = var_62; [L135] SORT_1 var_103 = ~var_103_arg_0; [L136] SORT_1 var_104_arg_0 = input_5; [L137] SORT_1 var_104 = ~var_104_arg_0; [L138] SORT_1 var_105_arg_0 = var_103; [L139] SORT_1 var_105_arg_1 = var_104; VAL [constr_102_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_105_arg_0=-256, var_105_arg_1=-1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L140] EXPR var_105_arg_0 | var_105_arg_1 VAL [constr_102_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L140] SORT_1 var_105 = var_105_arg_0 | var_105_arg_1; [L141] SORT_1 var_106_arg_0 = var_51; [L142] SORT_1 var_106 = ~var_106_arg_0; [L143] SORT_1 var_107_arg_0 = var_105; [L144] SORT_1 var_107_arg_1 = var_106; VAL [constr_102_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_107_arg_0=255, var_107_arg_1=-2, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L145] EXPR var_107_arg_0 | var_107_arg_1 VAL [constr_102_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L145] SORT_1 var_107 = var_107_arg_0 | var_107_arg_1; [L146] EXPR var_107 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L146] var_107 = var_107 & mask_SORT_1 [L147] SORT_1 constr_108_arg_0 = var_107; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L148] CALL assume_abort_if_not(constr_108_arg_0) VAL [\old(cond)=1] [L22] COND FALSE !(!cond) VAL [\old(cond)=1] [L148] RET assume_abort_if_not(constr_108_arg_0) VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L150] SORT_1 var_112_arg_0 = state_91; [L151] SORT_1 var_112_arg_1 = var_111; [L152] SORT_1 var_112_arg_2 = var_51; [L153] SORT_1 var_112 = var_112_arg_0 ? var_112_arg_1 : var_112_arg_2; [L154] SORT_1 var_70_arg_0 = state_69; [L155] SORT_1 var_70 = ~var_70_arg_0; [L156] SORT_1 var_71_arg_0 = state_68; [L157] SORT_1 var_71_arg_1 = var_70; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_71_arg_0=0, var_71_arg_1=-1, var_81=0] [L158] EXPR var_71_arg_0 & var_71_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L158] SORT_1 var_71 = var_71_arg_0 & var_71_arg_1; [L159] SORT_11 var_73_arg_0 = state_72; [L160] SORT_1 var_73 = var_73_arg_0 != 0; [L161] SORT_1 var_74_arg_0 = var_71; [L162] SORT_1 var_74_arg_1 = var_73; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_74_arg_0=0, var_74_arg_1=0, var_81=0] [L163] EXPR var_74_arg_0 & var_74_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L163] SORT_1 var_74 = var_74_arg_0 & var_74_arg_1; [L164] SORT_1 var_75_arg_0 = state_68; [L165] SORT_1 var_75 = ~var_75_arg_0; [L166] SORT_1 var_76_arg_0 = input_6; [L167] SORT_1 var_76_arg_1 = var_75; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_74=0, var_76_arg_0=0, var_76_arg_1=-1, var_81=0] [L168] EXPR var_76_arg_0 & var_76_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_74=0, var_81=0] [L168] SORT_1 var_76 = var_76_arg_0 & var_76_arg_1; [L169] SORT_1 var_77_arg_0 = var_76; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_74=0, var_77_arg_0=0, var_81=0] [L170] EXPR var_77_arg_0 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_74=0, var_81=0] [L170] var_77_arg_0 = var_77_arg_0 & mask_SORT_1 [L171] SORT_11 var_77 = var_77_arg_0; [L172] SORT_11 var_78_arg_0 = state_72; [L173] SORT_11 var_78_arg_1 = var_77; [L174] SORT_11 var_78 = var_78_arg_0 + var_78_arg_1; [L175] SORT_1 var_79_arg_0 = input_5; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_74=0, var_78=0, var_79_arg_0=0, var_81=0] [L176] EXPR var_79_arg_0 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_74=0, var_78=0, var_81=0] [L176] var_79_arg_0 = var_79_arg_0 & mask_SORT_1 [L177] SORT_11 var_79 = var_79_arg_0; [L178] SORT_11 var_80_arg_0 = var_78; [L179] SORT_11 var_80_arg_1 = var_79; [L180] SORT_11 var_80 = var_80_arg_0 - var_80_arg_1; [L181] SORT_1 var_82_arg_0 = input_7; [L182] SORT_11 var_82_arg_1 = var_81; [L183] SORT_11 var_82_arg_2 = var_80; [L184] SORT_11 var_82 = var_82_arg_0 ? var_82_arg_1 : var_82_arg_2; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_74=0, var_81=0, var_82=0] [L185] EXPR var_82 & mask_SORT_11 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_74=0, var_81=0] [L185] var_82 = var_82 & mask_SORT_11 [L186] SORT_11 var_83_arg_0 = var_82; [L187] SORT_1 var_83 = var_83_arg_0 != 0; [L188] SORT_1 var_84_arg_0 = var_83; [L189] SORT_1 var_84 = ~var_84_arg_0; [L190] SORT_1 var_85_arg_0 = var_74; [L191] SORT_1 var_85_arg_1 = var_84; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85_arg_0=0, var_85_arg_1=-1] [L192] EXPR var_85_arg_0 & var_85_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0] [L192] SORT_1 var_85 = var_85_arg_0 & var_85_arg_1; [L193] SORT_1 var_86_arg_0 = var_85; [L194] SORT_1 var_86 = ~var_86_arg_0; [L195] SORT_11 var_14_arg_0 = state_12; [L196] SORT_13 var_14 = var_14_arg_0 >> 0; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L197] EXPR var_14 & mask_SORT_13 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L197] var_14 = var_14 & mask_SORT_13 [L198] SORT_13 var_56_arg_0 = var_14; [L199] SORT_1 var_56 = var_56_arg_0 != 0; [L200] SORT_1 var_57_arg_0 = var_56; [L201] SORT_1 var_57 = ~var_57_arg_0; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_57=-1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L202] EXPR var_57 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L202] var_57 = var_57 & mask_SORT_1 [L203] SORT_1 var_52_arg_0 = var_51; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_52_arg_0=1, var_57=0, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L204] EXPR var_52_arg_0 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_57=0, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L204] var_52_arg_0 = var_52_arg_0 & mask_SORT_1 [L205] SORT_13 var_52 = var_52_arg_0; [L206] SORT_13 var_53_arg_0 = var_14; [L207] SORT_13 var_53_arg_1 = var_52; [L208] SORT_1 var_53 = var_53_arg_0 == var_53_arg_1; [L209] SORT_40 var_47_arg_0 = var_46; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_47_arg_0=2, var_51=1, var_53=0, var_57=0, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L210] EXPR var_47_arg_0 & mask_SORT_40 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_53=0, var_57=0, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L210] var_47_arg_0 = var_47_arg_0 & mask_SORT_40 [L211] SORT_13 var_47 = var_47_arg_0; [L212] SORT_13 var_48_arg_0 = var_14; [L213] SORT_13 var_48_arg_1 = var_47; [L214] SORT_1 var_48 = var_48_arg_0 == var_48_arg_1; [L215] SORT_40 var_42_arg_0 = var_41; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_42_arg_0=3, var_46=2, var_48=0, var_51=1, var_53=0, var_57=0, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L216] EXPR var_42_arg_0 & mask_SORT_40 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_48=0, var_51=1, var_53=0, var_57=0, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L216] var_42_arg_0 = var_42_arg_0 & mask_SORT_40 [L217] SORT_13 var_42 = var_42_arg_0; [L218] SORT_13 var_43_arg_0 = var_14; [L219] SORT_13 var_43_arg_1 = var_42; [L220] SORT_1 var_43 = var_43_arg_0 == var_43_arg_1; [L221] SORT_19 var_36_arg_0 = var_35; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_36_arg_0=4, var_41=3, var_43=0, var_46=2, var_48=0, var_51=1, var_53=0, var_57=0, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L222] EXPR var_36_arg_0 & mask_SORT_19 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_43=0, var_46=2, var_48=0, var_51=1, var_53=0, var_57=0, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L222] var_36_arg_0 = var_36_arg_0 & mask_SORT_19 [L223] SORT_13 var_36 = var_36_arg_0; [L224] SORT_13 var_37_arg_0 = var_14; [L225] SORT_13 var_37_arg_1 = var_36; [L226] SORT_1 var_37 = var_37_arg_0 == var_37_arg_1; [L227] SORT_19 var_31_arg_0 = var_30; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_31_arg_0=5, var_35=4, var_37=0, var_41=3, var_43=0, var_46=2, var_48=0, var_51=1, var_53=0, var_57=0, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L228] EXPR var_31_arg_0 & mask_SORT_19 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_37=0, var_41=3, var_43=0, var_46=2, var_48=0, var_51=1, var_53=0, var_57=0, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L228] var_31_arg_0 = var_31_arg_0 & mask_SORT_19 [L229] SORT_13 var_31 = var_31_arg_0; [L230] SORT_13 var_32_arg_0 = var_14; [L231] SORT_13 var_32_arg_1 = var_31; [L232] SORT_1 var_32 = var_32_arg_0 == var_32_arg_1; [L233] SORT_19 var_26_arg_0 = var_25; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_26_arg_0=6, var_30=5, var_32=0, var_35=4, var_37=0, var_41=3, var_43=0, var_46=2, var_48=0, var_51=1, var_53=0, var_57=0, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L234] EXPR var_26_arg_0 & mask_SORT_19 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_32=0, var_35=4, var_37=0, var_41=3, var_43=0, var_46=2, var_48=0, var_51=1, var_53=0, var_57=0, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L234] var_26_arg_0 = var_26_arg_0 & mask_SORT_19 [L235] SORT_13 var_26 = var_26_arg_0; [L236] SORT_13 var_27_arg_0 = var_14; [L237] SORT_13 var_27_arg_1 = var_26; [L238] SORT_1 var_27 = var_27_arg_0 == var_27_arg_1; [L239] SORT_19 var_21_arg_0 = var_20; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_14=0, var_15=8, var_20=7, var_21_arg_0=7, var_25=6, var_268=0, var_27=0, var_30=5, var_32=0, var_35=4, var_37=0, var_41=3, var_43=0, var_46=2, var_48=0, var_51=1, var_53=0, var_57=0, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L240] EXPR var_21_arg_0 & mask_SORT_19 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_27=0, var_30=5, var_32=0, var_35=4, var_37=0, var_41=3, var_43=0, var_46=2, var_48=0, var_51=1, var_53=0, var_57=0, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L240] var_21_arg_0 = var_21_arg_0 & mask_SORT_19 [L241] SORT_13 var_21 = var_21_arg_0; [L242] SORT_13 var_22_arg_0 = var_14; [L243] SORT_13 var_22_arg_1 = var_21; [L244] SORT_1 var_22 = var_22_arg_0 == var_22_arg_1; [L245] SORT_13 var_16_arg_0 = var_14; [L246] SORT_13 var_16_arg_1 = var_15; [L247] SORT_1 var_16 = var_16_arg_0 == var_16_arg_1; [L248] SORT_1 var_17_arg_0 = var_16; [L249] SORT_3 var_17_arg_1 = state_10; [L250] SORT_3 var_17_arg_2 = input_9; [L251] SORT_3 var_17 = var_17_arg_0 ? var_17_arg_1 : var_17_arg_2; [L252] SORT_1 var_23_arg_0 = var_22; [L253] SORT_3 var_23_arg_1 = state_18; [L254] SORT_3 var_23_arg_2 = var_17; [L255] SORT_3 var_23 = var_23_arg_0 ? var_23_arg_1 : var_23_arg_2; [L256] SORT_1 var_28_arg_0 = var_27; [L257] SORT_3 var_28_arg_1 = state_24; [L258] SORT_3 var_28_arg_2 = var_23; [L259] SORT_3 var_28 = var_28_arg_0 ? var_28_arg_1 : var_28_arg_2; [L260] SORT_1 var_33_arg_0 = var_32; [L261] SORT_3 var_33_arg_1 = state_29; [L262] SORT_3 var_33_arg_2 = var_28; [L263] SORT_3 var_33 = var_33_arg_0 ? var_33_arg_1 : var_33_arg_2; [L264] SORT_1 var_38_arg_0 = var_37; [L265] SORT_3 var_38_arg_1 = state_34; [L266] SORT_3 var_38_arg_2 = var_33; [L267] SORT_3 var_38 = var_38_arg_0 ? var_38_arg_1 : var_38_arg_2; [L268] SORT_1 var_44_arg_0 = var_43; [L269] SORT_3 var_44_arg_1 = state_39; [L270] SORT_3 var_44_arg_2 = var_38; [L271] SORT_3 var_44 = var_44_arg_0 ? var_44_arg_1 : var_44_arg_2; [L272] SORT_1 var_49_arg_0 = var_48; [L273] SORT_3 var_49_arg_1 = state_45; [L274] SORT_3 var_49_arg_2 = var_44; [L275] SORT_3 var_49 = var_49_arg_0 ? var_49_arg_1 : var_49_arg_2; [L276] SORT_1 var_54_arg_0 = var_53; [L277] SORT_3 var_54_arg_1 = state_50; [L278] SORT_3 var_54_arg_2 = var_49; [L279] SORT_3 var_54 = var_54_arg_0 ? var_54_arg_1 : var_54_arg_2; [L280] SORT_1 var_58_arg_0 = var_57; [L281] SORT_3 var_58_arg_1 = state_55; [L282] SORT_3 var_58_arg_2 = var_54; [L283] SORT_3 var_58 = var_58_arg_0 ? var_58_arg_1 : var_58_arg_2; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_58=4294967295, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L284] EXPR var_58 & mask_SORT_3 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L284] var_58 = var_58 & mask_SORT_3 [L285] SORT_3 var_88_arg_0 = state_87; [L286] SORT_3 var_88_arg_1 = var_58; [L287] SORT_1 var_88 = var_88_arg_0 == var_88_arg_1; [L288] SORT_1 var_89_arg_0 = var_86; [L289] SORT_1 var_89_arg_1 = var_88; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0, var_89_arg_0=-1, var_89_arg_1=0] [L290] EXPR var_89_arg_0 | var_89_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L290] SORT_1 var_89 = var_89_arg_0 | var_89_arg_1; [L291] SORT_1 var_110_arg_0 = state_91; [L292] SORT_1 var_110_arg_1 = input_109; [L293] SORT_1 var_110_arg_2 = var_89; [L294] SORT_1 var_110 = var_110_arg_0 ? var_110_arg_1 : var_110_arg_2; [L295] SORT_1 var_113_arg_0 = var_110; [L296] SORT_1 var_113 = ~var_113_arg_0; [L297] SORT_1 var_114_arg_0 = var_112; [L298] SORT_1 var_114_arg_1 = var_113; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_114_arg_0=0, var_114_arg_1=-256, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L299] EXPR var_114_arg_0 & var_114_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L299] SORT_1 var_114 = var_114_arg_0 & var_114_arg_1; [L300] EXPR var_114 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L300] var_114 = var_114 & mask_SORT_1 [L301] SORT_1 bad_115_arg_0 = var_114; [L302] CALL __VERIFIER_assert(!(bad_115_arg_0)) [L21] COND FALSE !(!(cond)) [L302] RET __VERIFIER_assert(!(bad_115_arg_0)) [L304] SORT_11 var_137_arg_0 = state_136; [L305] SORT_13 var_137 = var_137_arg_0 >> 0; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L306] EXPR var_137 & mask_SORT_13 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L306] var_137 = var_137 & mask_SORT_13 [L307] SORT_13 var_194_arg_0 = var_137; [L308] SORT_13 var_194_arg_1 = var_15; [L309] SORT_1 var_194 = var_194_arg_0 == var_194_arg_1; [L310] SORT_1 var_195_arg_0 = input_6; [L311] SORT_1 var_195_arg_1 = var_194; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_137=0, var_15=8, var_195_arg_0=0, var_195_arg_1=0, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L312] EXPR var_195_arg_0 & var_195_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L312] SORT_1 var_195 = var_195_arg_0 & var_195_arg_1; [L313] EXPR var_195 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L313] var_195 = var_195 & mask_SORT_1 [L314] SORT_1 var_267_arg_0 = var_195; [L315] SORT_3 var_267_arg_1 = input_4; [L316] SORT_3 var_267_arg_2 = state_10; [L317] SORT_3 var_267 = var_267_arg_0 ? var_267_arg_1 : var_267_arg_2; [L318] SORT_1 var_269_arg_0 = input_7; [L319] SORT_3 var_269_arg_1 = var_268; [L320] SORT_3 var_269_arg_2 = var_267; [L321] SORT_3 var_269 = var_269_arg_0 ? var_269_arg_1 : var_269_arg_2; [L322] SORT_3 next_270_arg_1 = var_269; [L323] SORT_1 var_119_arg_0 = input_6; [L324] SORT_1 var_119_arg_1 = input_5; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_119_arg_0=0, var_119_arg_1=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L325] EXPR var_119_arg_0 | var_119_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L325] SORT_1 var_119 = var_119_arg_0 | var_119_arg_1; [L326] SORT_1 var_120_arg_0 = var_119; [L327] SORT_1 var_120_arg_1 = input_7; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120_arg_0=0, var_120_arg_1=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L328] EXPR var_120_arg_0 | var_120_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L328] SORT_1 var_120 = var_120_arg_0 | var_120_arg_1; [L329] EXPR var_120 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L329] var_120 = var_120 & mask_SORT_1 [L330] SORT_1 var_198_arg_0 = input_5; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_198_arg_0=0, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L331] EXPR var_198_arg_0 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L331] var_198_arg_0 = var_198_arg_0 & mask_SORT_1 [L332] SORT_11 var_198 = var_198_arg_0; [L333] SORT_11 var_199_arg_0 = state_12; [L334] SORT_11 var_199_arg_1 = var_198; [L335] SORT_11 var_199 = var_199_arg_0 + var_199_arg_1; [L336] SORT_1 var_271_arg_0 = var_120; [L337] SORT_11 var_271_arg_1 = var_199; [L338] SORT_11 var_271_arg_2 = state_12; [L339] SORT_11 var_271 = var_271_arg_0 ? var_271_arg_1 : var_271_arg_2; [L340] SORT_1 var_272_arg_0 = input_7; [L341] SORT_11 var_272_arg_1 = var_81; [L342] SORT_11 var_272_arg_2 = var_271; [L343] SORT_11 var_272 = var_272_arg_0 ? var_272_arg_1 : var_272_arg_2; [L344] SORT_11 next_273_arg_1 = var_272; [L345] SORT_19 var_187_arg_0 = var_20; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_187_arg_0=7, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L346] EXPR var_187_arg_0 & mask_SORT_19 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L346] var_187_arg_0 = var_187_arg_0 & mask_SORT_19 [L347] SORT_13 var_187 = var_187_arg_0; [L348] SORT_13 var_188_arg_0 = var_137; [L349] SORT_13 var_188_arg_1 = var_187; [L350] SORT_1 var_188 = var_188_arg_0 == var_188_arg_1; [L351] SORT_1 var_189_arg_0 = input_6; [L352] SORT_1 var_189_arg_1 = var_188; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_189_arg_0=0, var_189_arg_1=0, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L353] EXPR var_189_arg_0 & var_189_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L353] SORT_1 var_189 = var_189_arg_0 & var_189_arg_1; [L354] EXPR var_189 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L354] var_189 = var_189 & mask_SORT_1 [L355] SORT_1 var_274_arg_0 = var_189; [L356] SORT_3 var_274_arg_1 = input_4; [L357] SORT_3 var_274_arg_2 = state_18; [L358] SORT_3 var_274 = var_274_arg_0 ? var_274_arg_1 : var_274_arg_2; [L359] SORT_1 var_275_arg_0 = input_7; [L360] SORT_3 var_275_arg_1 = var_268; [L361] SORT_3 var_275_arg_2 = var_274; [L362] SORT_3 var_275 = var_275_arg_0 ? var_275_arg_1 : var_275_arg_2; [L363] SORT_3 next_276_arg_1 = var_275; [L364] SORT_19 var_180_arg_0 = var_25; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, state_136=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_180_arg_0=6, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L365] EXPR var_180_arg_0 & mask_SORT_19 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, state_136=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L365] var_180_arg_0 = var_180_arg_0 & mask_SORT_19 [L366] SORT_13 var_180 = var_180_arg_0; [L367] SORT_13 var_181_arg_0 = var_137; [L368] SORT_13 var_181_arg_1 = var_180; [L369] SORT_1 var_181 = var_181_arg_0 == var_181_arg_1; [L370] SORT_1 var_182_arg_0 = input_6; [L371] SORT_1 var_182_arg_1 = var_181; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, state_136=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_182_arg_0=0, var_182_arg_1=0, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L372] EXPR var_182_arg_0 & var_182_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, state_136=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L372] SORT_1 var_182 = var_182_arg_0 & var_182_arg_1; [L373] EXPR var_182 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, state_136=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L373] var_182 = var_182 & mask_SORT_1 [L374] SORT_1 var_277_arg_0 = var_182; [L375] SORT_3 var_277_arg_1 = input_4; [L376] SORT_3 var_277_arg_2 = state_24; [L377] SORT_3 var_277 = var_277_arg_0 ? var_277_arg_1 : var_277_arg_2; [L378] SORT_1 var_278_arg_0 = input_7; [L379] SORT_3 var_278_arg_1 = var_268; [L380] SORT_3 var_278_arg_2 = var_277; [L381] SORT_3 var_278 = var_278_arg_0 ? var_278_arg_1 : var_278_arg_2; [L382] SORT_3 next_279_arg_1 = var_278; [L383] SORT_19 var_173_arg_0 = var_30; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, state_136=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_173_arg_0=5, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L384] EXPR var_173_arg_0 & mask_SORT_19 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, state_136=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L384] var_173_arg_0 = var_173_arg_0 & mask_SORT_19 [L385] SORT_13 var_173 = var_173_arg_0; [L386] SORT_13 var_174_arg_0 = var_137; [L387] SORT_13 var_174_arg_1 = var_173; [L388] SORT_1 var_174 = var_174_arg_0 == var_174_arg_1; [L389] SORT_1 var_175_arg_0 = input_6; [L390] SORT_1 var_175_arg_1 = var_174; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, state_136=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_175_arg_0=0, var_175_arg_1=0, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L391] EXPR var_175_arg_0 & var_175_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, state_136=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L391] SORT_1 var_175 = var_175_arg_0 & var_175_arg_1; [L392] EXPR var_175 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, state_136=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L392] var_175 = var_175 & mask_SORT_1 [L393] SORT_1 var_280_arg_0 = var_175; [L394] SORT_3 var_280_arg_1 = input_4; [L395] SORT_3 var_280_arg_2 = state_29; [L396] SORT_3 var_280 = var_280_arg_0 ? var_280_arg_1 : var_280_arg_2; [L397] SORT_1 var_281_arg_0 = input_7; [L398] SORT_3 var_281_arg_1 = var_268; [L399] SORT_3 var_281_arg_2 = var_280; [L400] SORT_3 var_281 = var_281_arg_0 ? var_281_arg_1 : var_281_arg_2; [L401] SORT_3 next_282_arg_1 = var_281; [L402] SORT_19 var_166_arg_0 = var_35; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, state_136=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_166_arg_0=4, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L403] EXPR var_166_arg_0 & mask_SORT_19 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, state_136=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L403] var_166_arg_0 = var_166_arg_0 & mask_SORT_19 [L404] SORT_13 var_166 = var_166_arg_0; [L405] SORT_13 var_167_arg_0 = var_137; [L406] SORT_13 var_167_arg_1 = var_166; [L407] SORT_1 var_167 = var_167_arg_0 == var_167_arg_1; [L408] SORT_1 var_168_arg_0 = input_6; [L409] SORT_1 var_168_arg_1 = var_167; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, state_136=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_168_arg_0=0, var_168_arg_1=0, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L410] EXPR var_168_arg_0 & var_168_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, state_136=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L410] SORT_1 var_168 = var_168_arg_0 & var_168_arg_1; [L411] EXPR var_168 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, state_136=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L411] var_168 = var_168 & mask_SORT_1 [L412] SORT_1 var_283_arg_0 = var_168; [L413] SORT_3 var_283_arg_1 = input_4; [L414] SORT_3 var_283_arg_2 = state_34; [L415] SORT_3 var_283 = var_283_arg_0 ? var_283_arg_1 : var_283_arg_2; [L416] SORT_1 var_284_arg_0 = input_7; [L417] SORT_3 var_284_arg_1 = var_268; [L418] SORT_3 var_284_arg_2 = var_283; [L419] SORT_3 var_284 = var_284_arg_0 ? var_284_arg_1 : var_284_arg_2; [L420] SORT_3 next_285_arg_1 = var_284; [L421] SORT_40 var_159_arg_0 = var_41; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, state_136=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_159_arg_0=3, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L422] EXPR var_159_arg_0 & mask_SORT_40 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, state_136=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L422] var_159_arg_0 = var_159_arg_0 & mask_SORT_40 [L423] SORT_13 var_159 = var_159_arg_0; [L424] SORT_13 var_160_arg_0 = var_137; [L425] SORT_13 var_160_arg_1 = var_159; [L426] SORT_1 var_160 = var_160_arg_0 == var_160_arg_1; [L427] SORT_1 var_161_arg_0 = input_6; [L428] SORT_1 var_161_arg_1 = var_160; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, state_136=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_161_arg_0=0, var_161_arg_1=0, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L429] EXPR var_161_arg_0 & var_161_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, state_136=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L429] SORT_1 var_161 = var_161_arg_0 & var_161_arg_1; [L430] EXPR var_161 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, state_136=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L430] var_161 = var_161 & mask_SORT_1 [L431] SORT_1 var_286_arg_0 = var_161; [L432] SORT_3 var_286_arg_1 = input_4; [L433] SORT_3 var_286_arg_2 = state_39; [L434] SORT_3 var_286 = var_286_arg_0 ? var_286_arg_1 : var_286_arg_2; [L435] SORT_1 var_287_arg_0 = input_7; [L436] SORT_3 var_287_arg_1 = var_268; [L437] SORT_3 var_287_arg_2 = var_286; [L438] SORT_3 var_287 = var_287_arg_0 ? var_287_arg_1 : var_287_arg_2; [L439] SORT_3 next_288_arg_1 = var_287; [L440] SORT_40 var_152_arg_0 = var_46; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, state_136=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_152_arg_0=2, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L441] EXPR var_152_arg_0 & mask_SORT_40 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, state_136=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L441] var_152_arg_0 = var_152_arg_0 & mask_SORT_40 [L442] SORT_13 var_152 = var_152_arg_0; [L443] SORT_13 var_153_arg_0 = var_137; [L444] SORT_13 var_153_arg_1 = var_152; [L445] SORT_1 var_153 = var_153_arg_0 == var_153_arg_1; [L446] SORT_1 var_154_arg_0 = input_6; [L447] SORT_1 var_154_arg_1 = var_153; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, state_136=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_154_arg_0=0, var_154_arg_1=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L448] EXPR var_154_arg_0 & var_154_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, state_136=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L448] SORT_1 var_154 = var_154_arg_0 & var_154_arg_1; [L449] EXPR var_154 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, state_136=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L449] var_154 = var_154 & mask_SORT_1 [L450] SORT_1 var_289_arg_0 = var_154; [L451] SORT_3 var_289_arg_1 = input_4; [L452] SORT_3 var_289_arg_2 = state_45; [L453] SORT_3 var_289 = var_289_arg_0 ? var_289_arg_1 : var_289_arg_2; [L454] SORT_1 var_290_arg_0 = input_7; [L455] SORT_3 var_290_arg_1 = var_268; [L456] SORT_3 var_290_arg_2 = var_289; [L457] SORT_3 var_290 = var_290_arg_0 ? var_290_arg_1 : var_290_arg_2; [L458] SORT_3 next_291_arg_1 = var_290; [L459] SORT_1 var_145_arg_0 = var_51; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, state_136=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_145_arg_0=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L460] EXPR var_145_arg_0 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, state_136=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L460] var_145_arg_0 = var_145_arg_0 & mask_SORT_1 [L461] SORT_13 var_145 = var_145_arg_0; [L462] SORT_13 var_146_arg_0 = var_137; [L463] SORT_13 var_146_arg_1 = var_145; [L464] SORT_1 var_146 = var_146_arg_0 == var_146_arg_1; [L465] SORT_1 var_147_arg_0 = input_6; [L466] SORT_1 var_147_arg_1 = var_146; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, state_136=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_147_arg_0=0, var_147_arg_1=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L467] EXPR var_147_arg_0 & var_147_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, state_136=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L467] SORT_1 var_147 = var_147_arg_0 & var_147_arg_1; [L468] EXPR var_147 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, state_136=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L468] var_147 = var_147 & mask_SORT_1 [L469] SORT_1 var_292_arg_0 = var_147; [L470] SORT_3 var_292_arg_1 = input_4; [L471] SORT_3 var_292_arg_2 = state_50; [L472] SORT_3 var_292 = var_292_arg_0 ? var_292_arg_1 : var_292_arg_2; [L473] SORT_1 var_293_arg_0 = input_7; [L474] SORT_3 var_293_arg_1 = var_268; [L475] SORT_3 var_293_arg_2 = var_292; [L476] SORT_3 var_293 = var_293_arg_0 ? var_293_arg_1 : var_293_arg_2; [L477] SORT_3 next_294_arg_1 = var_293; [L478] SORT_13 var_138_arg_0 = var_137; [L479] SORT_1 var_138 = var_138_arg_0 != 0; [L480] SORT_1 var_139_arg_0 = var_138; [L481] SORT_1 var_139 = ~var_139_arg_0; [L482] SORT_1 var_140_arg_0 = input_6; [L483] SORT_1 var_140_arg_1 = var_139; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, state_136=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_140_arg_0=0, var_140_arg_1=-1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L484] EXPR var_140_arg_0 & var_140_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, state_136=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L484] SORT_1 var_140 = var_140_arg_0 & var_140_arg_1; [L485] EXPR var_140 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, state_136=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L485] var_140 = var_140 & mask_SORT_1 [L486] SORT_1 var_295_arg_0 = var_140; [L487] SORT_3 var_295_arg_1 = input_4; [L488] SORT_3 var_295_arg_2 = state_55; [L489] SORT_3 var_295 = var_295_arg_0 ? var_295_arg_1 : var_295_arg_2; [L490] SORT_1 var_296_arg_0 = input_7; [L491] SORT_3 var_296_arg_1 = var_268; [L492] SORT_3 var_296_arg_2 = var_295; [L493] SORT_3 var_296 = var_296_arg_0 ? var_296_arg_1 : var_296_arg_2; [L494] SORT_3 next_297_arg_1 = var_296; [L495] SORT_1 var_298_arg_0 = input_6; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, state_136=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_25=6, var_268=0, var_298_arg_0=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L496] EXPR var_298_arg_0 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, state_136=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L496] var_298_arg_0 = var_298_arg_0 & mask_SORT_1 [L497] SORT_11 var_298 = var_298_arg_0; [L498] SORT_11 var_299_arg_0 = state_60; [L499] SORT_11 var_299_arg_1 = var_298; [L500] SORT_11 var_299 = var_299_arg_0 + var_299_arg_1; [L501] SORT_1 var_300_arg_0 = input_5; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, state_136=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_25=6, var_268=0, var_299=0, var_300_arg_0=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L502] EXPR var_300_arg_0 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, state_136=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_25=6, var_268=0, var_299=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L502] var_300_arg_0 = var_300_arg_0 & mask_SORT_1 [L503] SORT_11 var_300 = var_300_arg_0; [L504] SORT_11 var_301_arg_0 = var_299; [L505] SORT_11 var_301_arg_1 = var_300; [L506] SORT_11 var_301 = var_301_arg_0 - var_301_arg_1; [L507] SORT_1 var_302_arg_0 = input_7; [L508] SORT_11 var_302_arg_1 = var_81; [L509] SORT_11 var_302_arg_2 = var_301; [L510] SORT_11 var_302 = var_302_arg_0 ? var_302_arg_1 : var_302_arg_2; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, state_136=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_25=6, var_268=0, var_302=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L511] EXPR var_302 & mask_SORT_11 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, state_136=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L511] var_302 = var_302 & mask_SORT_11 [L512] SORT_11 next_303_arg_1 = var_302; [L513] SORT_1 var_228_arg_0 = state_68; [L514] SORT_1 var_228 = ~var_228_arg_0; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, state_136=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_228=-1, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L515] EXPR var_228 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, state_136=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L515] var_228 = var_228 & mask_SORT_1 [L516] SORT_1 var_224_arg_0 = input_8; [L517] SORT_1 var_224_arg_1 = input_6; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, state_136=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_224_arg_0=0, var_224_arg_1=0, var_228=1, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L518] EXPR var_224_arg_0 & var_224_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, state_136=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_228=1, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L518] SORT_1 var_224 = var_224_arg_0 & var_224_arg_1; [L519] SORT_1 var_225_arg_0 = state_68; [L520] SORT_1 var_225_arg_1 = var_224; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, state_136=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_224=0, var_225_arg_0=0, var_225_arg_1=0, var_228=1, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L521] EXPR var_225_arg_0 | var_225_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, state_136=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_224=0, var_228=1, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L521] SORT_1 var_225 = var_225_arg_0 | var_225_arg_1; [L522] SORT_1 var_304_arg_0 = var_228; [L523] SORT_1 var_304_arg_1 = var_225; [L524] SORT_1 var_304_arg_2 = state_68; [L525] SORT_1 var_304 = var_304_arg_0 ? var_304_arg_1 : var_304_arg_2; [L526] SORT_1 var_305_arg_0 = input_7; [L527] SORT_1 var_305_arg_1 = var_111; [L528] SORT_1 var_305_arg_2 = var_304; [L529] SORT_1 var_305 = var_305_arg_0 ? var_305_arg_1 : var_305_arg_2; [L530] SORT_1 next_306_arg_1 = var_305; [L531] SORT_1 var_236_arg_0 = var_85; [L532] SORT_1 var_236_arg_1 = state_69; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, next_306_arg_1=0, state_136=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_224=0, var_228=1, var_236_arg_0=0, var_236_arg_1=0, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0] [L533] EXPR var_236_arg_0 | var_236_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, next_306_arg_1=0, state_136=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_224=0, var_228=1, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0] [L533] SORT_1 var_236 = var_236_arg_0 | var_236_arg_1; [L534] SORT_1 var_307_arg_0 = var_51; [L535] SORT_1 var_307_arg_1 = var_236; [L536] SORT_1 var_307_arg_2 = state_69; [L537] SORT_1 var_307 = var_307_arg_0 ? var_307_arg_1 : var_307_arg_2; [L538] SORT_1 var_308_arg_0 = input_7; [L539] SORT_1 var_308_arg_1 = var_111; [L540] SORT_1 var_308_arg_2 = var_307; [L541] SORT_1 var_308 = var_308_arg_0 ? var_308_arg_1 : var_308_arg_2; [L542] SORT_1 next_309_arg_1 = var_308; [L543] SORT_1 var_248_arg_0 = input_6; [L544] SORT_1 var_248_arg_1 = input_5; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, next_306_arg_1=0, next_309_arg_1=0, state_136=0, state_68=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_224=0, var_228=1, var_248_arg_0=0, var_248_arg_1=0, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0] [L545] EXPR var_248_arg_0 | var_248_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, next_306_arg_1=0, next_309_arg_1=0, state_136=0, state_68=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_224=0, var_228=1, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0] [L545] SORT_1 var_248 = var_248_arg_0 | var_248_arg_1; [L546] SORT_1 var_249_arg_0 = var_248; [L547] SORT_1 var_249_arg_1 = input_7; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, next_306_arg_1=0, next_309_arg_1=0, state_136=0, state_68=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_224=0, var_228=1, var_249_arg_0=0, var_249_arg_1=0, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0] [L548] EXPR var_249_arg_0 | var_249_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, next_306_arg_1=0, next_309_arg_1=0, state_136=0, state_68=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_224=0, var_228=1, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0] [L548] SORT_1 var_249 = var_249_arg_0 | var_249_arg_1; [L549] SORT_1 var_250_arg_0 = var_249; [L550] SORT_1 var_250_arg_1 = state_68; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, next_306_arg_1=0, next_309_arg_1=0, state_136=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_224=0, var_228=1, var_250_arg_0=0, var_250_arg_1=0, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0] [L551] EXPR var_250_arg_0 | var_250_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, next_306_arg_1=0, next_309_arg_1=0, state_136=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_224=0, var_228=1, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0] [L551] SORT_1 var_250 = var_250_arg_0 | var_250_arg_1; [L552] EXPR var_250 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, next_306_arg_1=0, next_309_arg_1=0, state_136=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_224=0, var_228=1, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0] [L552] var_250 = var_250 & mask_SORT_1 [L553] SORT_1 var_310_arg_0 = var_250; [L554] SORT_11 var_310_arg_1 = var_82; [L555] SORT_11 var_310_arg_2 = state_72; [L556] SORT_11 var_310 = var_310_arg_0 ? var_310_arg_1 : var_310_arg_2; [L557] SORT_1 var_311_arg_0 = input_7; [L558] SORT_11 var_311_arg_1 = var_81; [L559] SORT_11 var_311_arg_2 = var_310; [L560] SORT_11 var_311 = var_311_arg_0 ? var_311_arg_1 : var_311_arg_2; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, next_306_arg_1=0, next_309_arg_1=0, state_136=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_224=0, var_228=1, var_25=6, var_268=0, var_30=5, var_311=0, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L561] EXPR var_311 & mask_SORT_11 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, next_306_arg_1=0, next_309_arg_1=0, state_136=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_224=0, var_228=1, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L561] var_311 = var_311 & mask_SORT_11 [L562] SORT_11 next_312_arg_1 = var_311; [L563] SORT_1 var_233_arg_0 = var_224; [L564] SORT_1 var_233_arg_1 = var_228; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, next_306_arg_1=0, next_309_arg_1=0, next_312_arg_1=0, state_136=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_233_arg_0=0, var_233_arg_1=1, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L565] EXPR var_233_arg_0 & var_233_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, next_306_arg_1=0, next_309_arg_1=0, next_312_arg_1=0, state_136=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L565] SORT_1 var_233 = var_233_arg_0 & var_233_arg_1; [L566] EXPR var_233 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, next_306_arg_1=0, next_309_arg_1=0, next_312_arg_1=0, state_136=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L566] var_233 = var_233 & mask_SORT_1 [L567] SORT_1 var_313_arg_0 = var_233; [L568] SORT_3 var_313_arg_1 = input_4; [L569] SORT_3 var_313_arg_2 = state_87; [L570] SORT_3 var_313 = var_313_arg_0 ? var_313_arg_1 : var_313_arg_2; [L571] SORT_1 var_314_arg_0 = input_7; [L572] SORT_3 var_314_arg_1 = var_268; [L573] SORT_3 var_314_arg_2 = var_313; [L574] SORT_3 var_314 = var_314_arg_0 ? var_314_arg_1 : var_314_arg_2; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, next_306_arg_1=0, next_309_arg_1=0, next_312_arg_1=0, state_136=0, var_111=0, var_120=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_314=0, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L575] EXPR var_314 & mask_SORT_3 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, next_306_arg_1=0, next_309_arg_1=0, next_312_arg_1=0, state_136=0, var_111=0, var_120=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L575] var_314 = var_314 & mask_SORT_3 [L576] SORT_3 next_315_arg_1 = var_314; [L577] SORT_1 next_316_arg_1 = var_111; [L578] SORT_1 var_204_arg_0 = input_6; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, next_306_arg_1=0, next_309_arg_1=0, next_312_arg_1=0, next_315_arg_1=0, next_316_arg_1=0, state_136=0, var_111=0, var_120=0, var_15=8, var_204_arg_0=0, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L579] EXPR var_204_arg_0 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, next_306_arg_1=0, next_309_arg_1=0, next_312_arg_1=0, next_315_arg_1=0, next_316_arg_1=0, state_136=0, var_111=0, var_120=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L579] var_204_arg_0 = var_204_arg_0 & mask_SORT_1 [L580] SORT_11 var_204 = var_204_arg_0; [L581] SORT_11 var_205_arg_0 = state_136; [L582] SORT_11 var_205_arg_1 = var_204; [L583] SORT_11 var_205 = var_205_arg_0 + var_205_arg_1; [L584] SORT_1 var_317_arg_0 = var_120; [L585] SORT_11 var_317_arg_1 = var_205; [L586] SORT_11 var_317_arg_2 = state_136; [L587] SORT_11 var_317 = var_317_arg_0 ? var_317_arg_1 : var_317_arg_2; [L588] SORT_1 var_318_arg_0 = input_7; [L589] SORT_11 var_318_arg_1 = var_81; [L590] SORT_11 var_318_arg_2 = var_317; [L591] SORT_11 var_318 = var_318_arg_0 ? var_318_arg_1 : var_318_arg_2; [L592] SORT_11 next_319_arg_1 = var_318; [L594] state_10 = next_270_arg_1 [L595] state_12 = next_273_arg_1 [L596] state_18 = next_276_arg_1 [L597] state_24 = next_279_arg_1 [L598] state_29 = next_282_arg_1 [L599] state_34 = next_285_arg_1 [L600] state_39 = next_288_arg_1 [L601] state_45 = next_291_arg_1 [L602] state_50 = next_294_arg_1 [L603] state_55 = next_297_arg_1 [L604] state_60 = next_303_arg_1 [L605] state_68 = next_306_arg_1 [L606] state_69 = next_309_arg_1 [L607] state_72 = next_312_arg_1 [L608] state_87 = next_315_arg_1 [L609] state_91 = next_316_arg_1 [L610] state_136 = next_319_arg_1 [L88] input_2 = __VERIFIER_nondet_uchar() [L89] input_4 = __VERIFIER_nondet_uint() [L90] input_5 = __VERIFIER_nondet_uchar() [L91] input_6 = __VERIFIER_nondet_uchar() [L92] input_7 = __VERIFIER_nondet_uchar() [L93] EXPR input_7 & mask_SORT_1 VAL [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L93] input_7 = input_7 & mask_SORT_1 [L94] input_8 = __VERIFIER_nondet_uchar() [L95] input_9 = __VERIFIER_nondet_uint() [L96] input_109 = __VERIFIER_nondet_uchar() [L98] SORT_1 var_93_arg_0 = input_7; [L99] SORT_1 var_93_arg_1 = state_91; [L100] SORT_1 var_93 = var_93_arg_0 == var_93_arg_1; [L101] SORT_1 var_94_arg_0 = var_51; [L102] SORT_1 var_94 = ~var_94_arg_0; [L103] SORT_1 var_95_arg_0 = var_93; [L104] SORT_1 var_95_arg_1 = var_94; VAL [input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_95_arg_0=0, var_95_arg_1=-2] [L105] EXPR var_95_arg_0 | var_95_arg_1 VAL [input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L105] SORT_1 var_95 = var_95_arg_0 | var_95_arg_1; [L106] EXPR var_95 & mask_SORT_1 VAL [input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L106] var_95 = var_95 & mask_SORT_1 [L107] SORT_1 constr_96_arg_0 = var_95; VAL [constr_96_arg_0=1, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L108] CALL assume_abort_if_not(constr_96_arg_0) VAL [\old(cond)=1] [L22] COND FALSE !(!cond) VAL [\old(cond)=1] [L108] RET assume_abort_if_not(constr_96_arg_0) VAL [constr_96_arg_0=1, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L109] SORT_13 var_65_arg_0 = var_64; VAL [constr_96_arg_0=1, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_65_arg_0=9, var_81=0] [L110] EXPR var_65_arg_0 & mask_SORT_13 VAL [constr_96_arg_0=1, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L110] var_65_arg_0 = var_65_arg_0 & mask_SORT_13 [L111] SORT_11 var_65 = var_65_arg_0; [L112] SORT_11 var_66_arg_0 = state_60; [L113] SORT_11 var_66_arg_1 = var_65; [L114] SORT_1 var_66 = var_66_arg_0 == var_66_arg_1; [L115] SORT_1 var_97_arg_0 = var_66; [L116] SORT_1 var_97 = ~var_97_arg_0; [L117] SORT_1 var_98_arg_0 = input_6; [L118] SORT_1 var_98 = ~var_98_arg_0; [L119] SORT_1 var_99_arg_0 = var_97; [L120] SORT_1 var_99_arg_1 = var_98; VAL [constr_96_arg_0=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_99_arg_0=-1, var_99_arg_1=-1] [L121] EXPR var_99_arg_0 | var_99_arg_1 VAL [constr_96_arg_0=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L121] SORT_1 var_99 = var_99_arg_0 | var_99_arg_1; [L122] SORT_1 var_100_arg_0 = var_51; [L123] SORT_1 var_100 = ~var_100_arg_0; [L124] SORT_1 var_101_arg_0 = var_99; [L125] SORT_1 var_101_arg_1 = var_100; VAL [constr_96_arg_0=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_101_arg_0=255, var_101_arg_1=-2, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L126] EXPR var_101_arg_0 | var_101_arg_1 VAL [constr_96_arg_0=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L126] SORT_1 var_101 = var_101_arg_0 | var_101_arg_1; [L127] EXPR var_101 & mask_SORT_1 VAL [constr_96_arg_0=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L127] var_101 = var_101 & mask_SORT_1 [L128] SORT_1 constr_102_arg_0 = var_101; VAL [constr_102_arg_0=1, constr_96_arg_0=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L129] CALL assume_abort_if_not(constr_102_arg_0) VAL [\old(cond)=1] [L22] COND FALSE !(!cond) VAL [\old(cond)=1] [L129] RET assume_abort_if_not(constr_102_arg_0) VAL [constr_102_arg_0=1, constr_96_arg_0=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L130] SORT_11 var_61_arg_0 = state_60; [L131] SORT_1 var_61 = var_61_arg_0 != 0; [L132] SORT_1 var_62_arg_0 = var_61; [L133] SORT_1 var_62 = ~var_62_arg_0; [L134] SORT_1 var_103_arg_0 = var_62; [L135] SORT_1 var_103 = ~var_103_arg_0; [L136] SORT_1 var_104_arg_0 = input_5; [L137] SORT_1 var_104 = ~var_104_arg_0; [L138] SORT_1 var_105_arg_0 = var_103; [L139] SORT_1 var_105_arg_1 = var_104; VAL [constr_102_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_105_arg_0=-256, var_105_arg_1=-2, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L140] EXPR var_105_arg_0 | var_105_arg_1 VAL [constr_102_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L140] SORT_1 var_105 = var_105_arg_0 | var_105_arg_1; [L141] SORT_1 var_106_arg_0 = var_51; [L142] SORT_1 var_106 = ~var_106_arg_0; [L143] SORT_1 var_107_arg_0 = var_105; [L144] SORT_1 var_107_arg_1 = var_106; VAL [constr_102_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_107_arg_0=254, var_107_arg_1=-2, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L145] EXPR var_107_arg_0 | var_107_arg_1 VAL [constr_102_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L145] SORT_1 var_107 = var_107_arg_0 | var_107_arg_1; [L146] EXPR var_107 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L146] var_107 = var_107 & mask_SORT_1 [L147] SORT_1 constr_108_arg_0 = var_107; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L148] CALL assume_abort_if_not(constr_108_arg_0) VAL [\old(cond)=1] [L22] COND FALSE !(!cond) VAL [\old(cond)=1] [L148] RET assume_abort_if_not(constr_108_arg_0) VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L150] SORT_1 var_112_arg_0 = state_91; [L151] SORT_1 var_112_arg_1 = var_111; [L152] SORT_1 var_112_arg_2 = var_51; [L153] SORT_1 var_112 = var_112_arg_0 ? var_112_arg_1 : var_112_arg_2; [L154] SORT_1 var_70_arg_0 = state_69; [L155] SORT_1 var_70 = ~var_70_arg_0; [L156] SORT_1 var_71_arg_0 = state_68; [L157] SORT_1 var_71_arg_1 = var_70; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_71_arg_0=0, var_71_arg_1=-1, var_81=0] [L158] EXPR var_71_arg_0 & var_71_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L158] SORT_1 var_71 = var_71_arg_0 & var_71_arg_1; [L159] SORT_11 var_73_arg_0 = state_72; [L160] SORT_1 var_73 = var_73_arg_0 != 0; [L161] SORT_1 var_74_arg_0 = var_71; [L162] SORT_1 var_74_arg_1 = var_73; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_74_arg_0=0, var_74_arg_1=0, var_81=0] [L163] EXPR var_74_arg_0 & var_74_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L163] SORT_1 var_74 = var_74_arg_0 & var_74_arg_1; [L164] SORT_1 var_75_arg_0 = state_68; [L165] SORT_1 var_75 = ~var_75_arg_0; [L166] SORT_1 var_76_arg_0 = input_6; [L167] SORT_1 var_76_arg_1 = var_75; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_74=0, var_76_arg_0=0, var_76_arg_1=-1, var_81=0] [L168] EXPR var_76_arg_0 & var_76_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_74=0, var_81=0] [L168] SORT_1 var_76 = var_76_arg_0 & var_76_arg_1; [L169] SORT_1 var_77_arg_0 = var_76; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_74=0, var_77_arg_0=0, var_81=0] [L170] EXPR var_77_arg_0 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_74=0, var_81=0] [L170] var_77_arg_0 = var_77_arg_0 & mask_SORT_1 [L171] SORT_11 var_77 = var_77_arg_0; [L172] SORT_11 var_78_arg_0 = state_72; [L173] SORT_11 var_78_arg_1 = var_77; [L174] SORT_11 var_78 = var_78_arg_0 + var_78_arg_1; [L175] SORT_1 var_79_arg_0 = input_5; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_74=0, var_78=0, var_79_arg_0=1, var_81=0] [L176] EXPR var_79_arg_0 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_74=0, var_78=0, var_81=0] [L176] var_79_arg_0 = var_79_arg_0 & mask_SORT_1 [L177] SORT_11 var_79 = var_79_arg_0; [L178] SORT_11 var_80_arg_0 = var_78; [L179] SORT_11 var_80_arg_1 = var_79; [L180] SORT_11 var_80 = var_80_arg_0 - var_80_arg_1; [L181] SORT_1 var_82_arg_0 = input_7; [L182] SORT_11 var_82_arg_1 = var_81; [L183] SORT_11 var_82_arg_2 = var_80; [L184] SORT_11 var_82 = var_82_arg_0 ? var_82_arg_1 : var_82_arg_2; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_74=0, var_81=0, var_82=0] [L185] EXPR var_82 & mask_SORT_11 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_74=0, var_81=0] [L185] var_82 = var_82 & mask_SORT_11 [L186] SORT_11 var_83_arg_0 = var_82; [L187] SORT_1 var_83 = var_83_arg_0 != 0; [L188] SORT_1 var_84_arg_0 = var_83; [L189] SORT_1 var_84 = ~var_84_arg_0; [L190] SORT_1 var_85_arg_0 = var_74; [L191] SORT_1 var_85_arg_1 = var_84; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85_arg_0=0, var_85_arg_1=-1] [L192] EXPR var_85_arg_0 & var_85_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0] [L192] SORT_1 var_85 = var_85_arg_0 & var_85_arg_1; [L193] SORT_1 var_86_arg_0 = var_85; [L194] SORT_1 var_86 = ~var_86_arg_0; [L195] SORT_11 var_14_arg_0 = state_12; [L196] SORT_13 var_14 = var_14_arg_0 >> 0; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L197] EXPR var_14 & mask_SORT_13 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L197] var_14 = var_14 & mask_SORT_13 [L198] SORT_13 var_56_arg_0 = var_14; [L199] SORT_1 var_56 = var_56_arg_0 != 0; [L200] SORT_1 var_57_arg_0 = var_56; [L201] SORT_1 var_57 = ~var_57_arg_0; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_57=-1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L202] EXPR var_57 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L202] var_57 = var_57 & mask_SORT_1 [L203] SORT_1 var_52_arg_0 = var_51; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_52_arg_0=1, var_57=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L204] EXPR var_52_arg_0 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_57=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L204] var_52_arg_0 = var_52_arg_0 & mask_SORT_1 [L205] SORT_13 var_52 = var_52_arg_0; [L206] SORT_13 var_53_arg_0 = var_14; [L207] SORT_13 var_53_arg_1 = var_52; [L208] SORT_1 var_53 = var_53_arg_0 == var_53_arg_1; [L209] SORT_40 var_47_arg_0 = var_46; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_47_arg_0=2, var_51=1, var_53=0, var_57=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L210] EXPR var_47_arg_0 & mask_SORT_40 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_53=0, var_57=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L210] var_47_arg_0 = var_47_arg_0 & mask_SORT_40 [L211] SORT_13 var_47 = var_47_arg_0; [L212] SORT_13 var_48_arg_0 = var_14; [L213] SORT_13 var_48_arg_1 = var_47; [L214] SORT_1 var_48 = var_48_arg_0 == var_48_arg_1; [L215] SORT_40 var_42_arg_0 = var_41; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_42_arg_0=3, var_46=2, var_48=1, var_51=1, var_53=0, var_57=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L216] EXPR var_42_arg_0 & mask_SORT_40 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_48=1, var_51=1, var_53=0, var_57=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L216] var_42_arg_0 = var_42_arg_0 & mask_SORT_40 [L217] SORT_13 var_42 = var_42_arg_0; [L218] SORT_13 var_43_arg_0 = var_14; [L219] SORT_13 var_43_arg_1 = var_42; [L220] SORT_1 var_43 = var_43_arg_0 == var_43_arg_1; [L221] SORT_19 var_36_arg_0 = var_35; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_36_arg_0=4, var_41=3, var_43=0, var_46=2, var_48=1, var_51=1, var_53=0, var_57=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L222] EXPR var_36_arg_0 & mask_SORT_19 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_43=0, var_46=2, var_48=1, var_51=1, var_53=0, var_57=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L222] var_36_arg_0 = var_36_arg_0 & mask_SORT_19 [L223] SORT_13 var_36 = var_36_arg_0; [L224] SORT_13 var_37_arg_0 = var_14; [L225] SORT_13 var_37_arg_1 = var_36; [L226] SORT_1 var_37 = var_37_arg_0 == var_37_arg_1; [L227] SORT_19 var_31_arg_0 = var_30; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_31_arg_0=5, var_35=4, var_37=0, var_41=3, var_43=0, var_46=2, var_48=1, var_51=1, var_53=0, var_57=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L228] EXPR var_31_arg_0 & mask_SORT_19 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_37=0, var_41=3, var_43=0, var_46=2, var_48=1, var_51=1, var_53=0, var_57=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L228] var_31_arg_0 = var_31_arg_0 & mask_SORT_19 [L229] SORT_13 var_31 = var_31_arg_0; [L230] SORT_13 var_32_arg_0 = var_14; [L231] SORT_13 var_32_arg_1 = var_31; [L232] SORT_1 var_32 = var_32_arg_0 == var_32_arg_1; [L233] SORT_19 var_26_arg_0 = var_25; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_26_arg_0=6, var_30=5, var_32=1, var_35=4, var_37=0, var_41=3, var_43=0, var_46=2, var_48=1, var_51=1, var_53=0, var_57=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L234] EXPR var_26_arg_0 & mask_SORT_19 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_32=1, var_35=4, var_37=0, var_41=3, var_43=0, var_46=2, var_48=1, var_51=1, var_53=0, var_57=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L234] var_26_arg_0 = var_26_arg_0 & mask_SORT_19 [L235] SORT_13 var_26 = var_26_arg_0; [L236] SORT_13 var_27_arg_0 = var_14; [L237] SORT_13 var_27_arg_1 = var_26; [L238] SORT_1 var_27 = var_27_arg_0 == var_27_arg_1; [L239] SORT_19 var_21_arg_0 = var_20; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_14=0, var_15=8, var_20=7, var_21_arg_0=7, var_25=6, var_268=0, var_27=0, var_30=5, var_32=1, var_35=4, var_37=0, var_41=3, var_43=0, var_46=2, var_48=1, var_51=1, var_53=0, var_57=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L240] EXPR var_21_arg_0 & mask_SORT_19 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_27=0, var_30=5, var_32=1, var_35=4, var_37=0, var_41=3, var_43=0, var_46=2, var_48=1, var_51=1, var_53=0, var_57=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L240] var_21_arg_0 = var_21_arg_0 & mask_SORT_19 [L241] SORT_13 var_21 = var_21_arg_0; [L242] SORT_13 var_22_arg_0 = var_14; [L243] SORT_13 var_22_arg_1 = var_21; [L244] SORT_1 var_22 = var_22_arg_0 == var_22_arg_1; [L245] SORT_13 var_16_arg_0 = var_14; [L246] SORT_13 var_16_arg_1 = var_15; [L247] SORT_1 var_16 = var_16_arg_0 == var_16_arg_1; [L248] SORT_1 var_17_arg_0 = var_16; [L249] SORT_3 var_17_arg_1 = state_10; [L250] SORT_3 var_17_arg_2 = input_9; [L251] SORT_3 var_17 = var_17_arg_0 ? var_17_arg_1 : var_17_arg_2; [L252] SORT_1 var_23_arg_0 = var_22; [L253] SORT_3 var_23_arg_1 = state_18; [L254] SORT_3 var_23_arg_2 = var_17; [L255] SORT_3 var_23 = var_23_arg_0 ? var_23_arg_1 : var_23_arg_2; [L256] SORT_1 var_28_arg_0 = var_27; [L257] SORT_3 var_28_arg_1 = state_24; [L258] SORT_3 var_28_arg_2 = var_23; [L259] SORT_3 var_28 = var_28_arg_0 ? var_28_arg_1 : var_28_arg_2; [L260] SORT_1 var_33_arg_0 = var_32; [L261] SORT_3 var_33_arg_1 = state_29; [L262] SORT_3 var_33_arg_2 = var_28; [L263] SORT_3 var_33 = var_33_arg_0 ? var_33_arg_1 : var_33_arg_2; [L264] SORT_1 var_38_arg_0 = var_37; [L265] SORT_3 var_38_arg_1 = state_34; [L266] SORT_3 var_38_arg_2 = var_33; [L267] SORT_3 var_38 = var_38_arg_0 ? var_38_arg_1 : var_38_arg_2; [L268] SORT_1 var_44_arg_0 = var_43; [L269] SORT_3 var_44_arg_1 = state_39; [L270] SORT_3 var_44_arg_2 = var_38; [L271] SORT_3 var_44 = var_44_arg_0 ? var_44_arg_1 : var_44_arg_2; [L272] SORT_1 var_49_arg_0 = var_48; [L273] SORT_3 var_49_arg_1 = state_45; [L274] SORT_3 var_49_arg_2 = var_44; [L275] SORT_3 var_49 = var_49_arg_0 ? var_49_arg_1 : var_49_arg_2; [L276] SORT_1 var_54_arg_0 = var_53; [L277] SORT_3 var_54_arg_1 = state_50; [L278] SORT_3 var_54_arg_2 = var_49; [L279] SORT_3 var_54 = var_54_arg_0 ? var_54_arg_1 : var_54_arg_2; [L280] SORT_1 var_58_arg_0 = var_57; [L281] SORT_3 var_58_arg_1 = state_55; [L282] SORT_3 var_58_arg_2 = var_54; [L283] SORT_3 var_58 = var_58_arg_0 ? var_58_arg_1 : var_58_arg_2; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_58=0, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L284] EXPR var_58 & mask_SORT_3 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L284] var_58 = var_58 & mask_SORT_3 [L285] SORT_3 var_88_arg_0 = state_87; [L286] SORT_3 var_88_arg_1 = var_58; [L287] SORT_1 var_88 = var_88_arg_0 == var_88_arg_1; [L288] SORT_1 var_89_arg_0 = var_86; [L289] SORT_1 var_89_arg_1 = var_88; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0, var_89_arg_0=-1, var_89_arg_1=1] [L290] EXPR var_89_arg_0 | var_89_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L290] SORT_1 var_89 = var_89_arg_0 | var_89_arg_1; [L291] SORT_1 var_110_arg_0 = state_91; [L292] SORT_1 var_110_arg_1 = input_109; [L293] SORT_1 var_110_arg_2 = var_89; [L294] SORT_1 var_110 = var_110_arg_0 ? var_110_arg_1 : var_110_arg_2; [L295] SORT_1 var_113_arg_0 = var_110; [L296] SORT_1 var_113 = ~var_113_arg_0; [L297] SORT_1 var_114_arg_0 = var_112; [L298] SORT_1 var_114_arg_1 = var_113; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_114_arg_0=1, var_114_arg_1=-1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L299] EXPR var_114_arg_0 & var_114_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L299] SORT_1 var_114 = var_114_arg_0 & var_114_arg_1; [L300] EXPR var_114 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L300] var_114 = var_114 & mask_SORT_1 [L301] SORT_1 bad_115_arg_0 = var_114; [L302] CALL __VERIFIER_assert(!(bad_115_arg_0)) [L21] COND TRUE !(cond) [L21] reach_error() - StatisticsResult: Ultimate Automizer benchmark data CFG has 2 procedures, 392 locations, 1 error locations. Started 1 CEGAR loops. OverallTime: 177.4s, OverallIterations: 55, TraceHistogramMax: 6, PathProgramHistogramMax: 1, EmptinessCheckTime: 0.2s, AutomataDifference: 36.4s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, HoareTripleCheckerStatistics: 0 mSolverCounterUnknown, 41514 SdHoareTripleChecker+Valid, 26.8s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 41439 mSDsluCounter, 137070 SdHoareTripleChecker+Invalid, 22.7s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 0 IncrementalHoareTripleChecker+Unchecked, 107502 mSDsCounter, 173 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 39072 IncrementalHoareTripleChecker+Invalid, 39245 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 173 mSolverCounterUnsat, 29568 mSDtfsCounter, 39072 mSolverCounterSat, 0.7s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Unknown, PredicateUnifierStatistics: 0 DeclaredPredicates, 5313 GetRequests, 4714 SyntacticMatches, 6 SemanticMatches, 593 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6353 ImplicationChecksByTransitivity, 10.9s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=4062occurred in iteration=53, InterpolantAutomatonStates: 446, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 2.2s AutomataMinimizationTime, 54 MinimizatonAttempts, 24402 StatesRemovedByMinimization, 20 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 2.5s SsaConstructionTime, 38.7s SatisfiabilityAnalysisTime, 78.1s InterpolantComputationTime, 18167 NumberOfCodeBlocks, 18167 NumberOfCodeBlocksAsserted, 65 NumberOfCheckSat, 19154 ConstructedInterpolants, 0 QuantifiedInterpolants, 107923 SizeOfPredicates, 33 NumberOfNonLiveVariables, 19308 ConjunctsInSsa, 322 ConjunctsInUnsatCore, 68 InterpolantComputations, 50 PerfectInterpolantSequences, 6696/7424 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available, ConComCheckerStatistics: No data available RESULT: Ultimate could not prove your program: unable to determine feasibility of some traces [2024-11-24 01:43:10,160 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d9cbd223-3e19-44a5-b1a1-87e0ec577546/bin/uautomizer-verify-LYvppIcaGC/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Ended with exit code 0 Received shutdown request... --- End real Ultimate output --- Execution finished normally Using bit-precise analysis Retrying with bit-precise analysis ### Bit-precise run ### Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d9cbd223-3e19-44a5-b1a1-87e0ec577546/bin/uautomizer-verify-LYvppIcaGC/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d9cbd223-3e19-44a5-b1a1-87e0ec577546/bin/uautomizer-verify-LYvppIcaGC/plugins/org.eclipse.equinox.launcher_1.6.800.v20240513-1750.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d9cbd223-3e19-44a5-b1a1-87e0ec577546/bin/uautomizer-verify-LYvppIcaGC/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d9cbd223-3e19-44a5-b1a1-87e0ec577546/bin/uautomizer-verify-LYvppIcaGC/config/AutomizerReach.xml -i ../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w32_d8_e0.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d9cbd223-3e19-44a5-b1a1-87e0ec577546/bin/uautomizer-verify-LYvppIcaGC/config/svcomp-Reach-64bit-Automizer_Bitvector.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d9cbd223-3e19-44a5-b1a1-87e0ec577546/bin/uautomizer-verify-LYvppIcaGC --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash 5bfb987fcec0e4e87ab47a565086b76b03edc9a60525cd8ee77a0c461c0fdaaa --- Real Ultimate output --- This is Ultimate 0.3.0-dev-6497de0 [2024-11-24 01:43:13,015 INFO L188 SettingsManager]: Resetting all preferences to default values... [2024-11-24 01:43:13,086 INFO L114 SettingsManager]: Loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d9cbd223-3e19-44a5-b1a1-87e0ec577546/bin/uautomizer-verify-LYvppIcaGC/config/svcomp-Reach-64bit-Automizer_Bitvector.epf [2024-11-24 01:43:13,092 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2024-11-24 01:43:13,092 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2024-11-24 01:43:13,161 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2024-11-24 01:43:13,162 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2024-11-24 01:43:13,162 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2024-11-24 01:43:13,163 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2024-11-24 01:43:13,169 INFO L153 SettingsManager]: * Use memory slicer=true [2024-11-24 01:43:13,169 INFO L151 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2024-11-24 01:43:13,169 INFO L153 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2024-11-24 01:43:13,170 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2024-11-24 01:43:13,170 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2024-11-24 01:43:13,170 INFO L153 SettingsManager]: * Use SBE=true [2024-11-24 01:43:13,170 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2024-11-24 01:43:13,170 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2024-11-24 01:43:13,170 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2024-11-24 01:43:13,170 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2024-11-24 01:43:13,170 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2024-11-24 01:43:13,171 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2024-11-24 01:43:13,171 INFO L153 SettingsManager]: * Adapt memory model on pointer casts if necessary=true [2024-11-24 01:43:13,171 INFO L153 SettingsManager]: * Use bitvectors instead of ints=true [2024-11-24 01:43:13,171 INFO L153 SettingsManager]: * Memory model=HoenickeLindenmann_4ByteResolution [2024-11-24 01:43:13,171 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2024-11-24 01:43:13,171 INFO L153 SettingsManager]: * Behaviour of calls to undefined functions=OVERAPPROXIMATE_BEHAVIOUR [2024-11-24 01:43:13,171 INFO L153 SettingsManager]: * Use constant arrays=true [2024-11-24 01:43:13,171 INFO L151 SettingsManager]: Preferences of IcfgBuilder differ from their defaults: [2024-11-24 01:43:13,171 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-11-24 01:43:13,172 INFO L153 SettingsManager]: * Only consider context switches at boundaries of atomic blocks=true [2024-11-24 01:43:13,172 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2024-11-24 01:43:13,173 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2024-11-24 01:43:13,174 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2024-11-24 01:43:13,174 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-11-24 01:43:13,174 INFO L153 SettingsManager]: * Only consider context switches at boundaries of atomic blocks=true [2024-11-24 01:43:13,174 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2024-11-24 01:43:13,174 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2024-11-24 01:43:13,174 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2024-11-24 01:43:13,174 INFO L153 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2024-11-24 01:43:13,174 INFO L153 SettingsManager]: * Compute procedure contracts=false [2024-11-24 01:43:13,174 INFO L153 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopHeads [2024-11-24 01:43:13,175 INFO L153 SettingsManager]: * Trace refinement strategy=FOX [2024-11-24 01:43:13,175 INFO L153 SettingsManager]: * Command for external solver=cvc4 --incremental --print-success --lang smt [2024-11-24 01:43:13,175 INFO L153 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false [2024-11-24 01:43:13,175 INFO L153 SettingsManager]: * Automaton type used in concurrency analysis=PETRI_NET [2024-11-24 01:43:13,175 INFO L153 SettingsManager]: * Order on configurations for Petri net unfoldings=DBO [2024-11-24 01:43:13,175 INFO L153 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2024-11-24 01:43:13,175 INFO L153 SettingsManager]: * Looper check in Petri net analysis=SEMANTIC Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d9cbd223-3e19-44a5-b1a1-87e0ec577546/bin/uautomizer-verify-LYvppIcaGC Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 5bfb987fcec0e4e87ab47a565086b76b03edc9a60525cd8ee77a0c461c0fdaaa [2024-11-24 01:43:13,550 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2024-11-24 01:43:13,558 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2024-11-24 01:43:13,561 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2024-11-24 01:43:13,562 INFO L270 PluginConnector]: Initializing CDTParser... [2024-11-24 01:43:13,563 INFO L274 PluginConnector]: CDTParser initialized [2024-11-24 01:43:13,564 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d9cbd223-3e19-44a5-b1a1-87e0ec577546/bin/uautomizer-verify-LYvppIcaGC/../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w32_d8_e0.c [2024-11-24 01:43:16,687 INFO L533 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d9cbd223-3e19-44a5-b1a1-87e0ec577546/bin/uautomizer-verify-LYvppIcaGC/data/74bf0cfcd/d1c262190a854545ac2a43e03fb501e2/FLAGd57ec4e75 [2024-11-24 01:43:17,008 INFO L384 CDTParser]: Found 1 translation units. [2024-11-24 01:43:17,009 INFO L180 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d9cbd223-3e19-44a5-b1a1-87e0ec577546/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w32_d8_e0.c [2024-11-24 01:43:17,020 INFO L427 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d9cbd223-3e19-44a5-b1a1-87e0ec577546/bin/uautomizer-verify-LYvppIcaGC/data/74bf0cfcd/d1c262190a854545ac2a43e03fb501e2/FLAGd57ec4e75 [2024-11-24 01:43:17,041 INFO L435 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d9cbd223-3e19-44a5-b1a1-87e0ec577546/bin/uautomizer-verify-LYvppIcaGC/data/74bf0cfcd/d1c262190a854545ac2a43e03fb501e2 [2024-11-24 01:43:17,044 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2024-11-24 01:43:17,046 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2024-11-24 01:43:17,050 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2024-11-24 01:43:17,050 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2024-11-24 01:43:17,056 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2024-11-24 01:43:17,057 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 24.11 01:43:17" (1/1) ... [2024-11-24 01:43:17,058 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@3db2b89b and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.11 01:43:17, skipping insertion in model container [2024-11-24 01:43:17,058 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 24.11 01:43:17" (1/1) ... [2024-11-24 01:43:17,118 INFO L175 MainTranslator]: Built tables and reachable declarations [2024-11-24 01:43:17,313 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d9cbd223-3e19-44a5-b1a1-87e0ec577546/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w32_d8_e0.c[1279,1292] [2024-11-24 01:43:17,531 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-11-24 01:43:17,545 INFO L200 MainTranslator]: Completed pre-run [2024-11-24 01:43:17,557 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d9cbd223-3e19-44a5-b1a1-87e0ec577546/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w32_d8_e0.c[1279,1292] [2024-11-24 01:43:17,722 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-11-24 01:43:17,752 INFO L204 MainTranslator]: Completed translation [2024-11-24 01:43:17,753 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.11 01:43:17 WrapperNode [2024-11-24 01:43:17,753 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2024-11-24 01:43:17,754 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2024-11-24 01:43:17,754 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2024-11-24 01:43:17,754 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2024-11-24 01:43:17,765 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.11 01:43:17" (1/1) ... [2024-11-24 01:43:17,789 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.11 01:43:17" (1/1) ... [2024-11-24 01:43:17,876 INFO L138 Inliner]: procedures = 17, calls = 11, calls flagged for inlining = 3, calls inlined = 3, statements flattened = 638 [2024-11-24 01:43:17,877 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2024-11-24 01:43:17,879 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2024-11-24 01:43:17,879 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2024-11-24 01:43:17,879 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2024-11-24 01:43:17,921 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.11 01:43:17" (1/1) ... [2024-11-24 01:43:17,921 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.11 01:43:17" (1/1) ... [2024-11-24 01:43:17,928 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.11 01:43:17" (1/1) ... [2024-11-24 01:43:17,947 INFO L175 MemorySlicer]: Split 2 memory accesses to 1 slices as follows [2]. 100 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2]. The 0 writes are split as follows [0]. [2024-11-24 01:43:17,948 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.11 01:43:17" (1/1) ... [2024-11-24 01:43:17,948 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.11 01:43:17" (1/1) ... [2024-11-24 01:43:17,966 INFO L184 PluginConnector]: Executing the observer ReplaceArrayAssignments from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.11 01:43:17" (1/1) ... [2024-11-24 01:43:17,972 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.11 01:43:17" (1/1) ... [2024-11-24 01:43:17,979 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.11 01:43:17" (1/1) ... [2024-11-24 01:43:17,982 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.11 01:43:17" (1/1) ... [2024-11-24 01:43:17,988 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.11 01:43:17" (1/1) ... [2024-11-24 01:43:18,001 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2024-11-24 01:43:18,002 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2024-11-24 01:43:18,002 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2024-11-24 01:43:18,002 INFO L274 PluginConnector]: RCFGBuilder initialized [2024-11-24 01:43:18,003 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.11 01:43:17" (1/1) ... [2024-11-24 01:43:18,012 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2024-11-24 01:43:18,031 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d9cbd223-3e19-44a5-b1a1-87e0ec577546/bin/uautomizer-verify-LYvppIcaGC/z3 [2024-11-24 01:43:18,047 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d9cbd223-3e19-44a5-b1a1-87e0ec577546/bin/uautomizer-verify-LYvppIcaGC/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (exit command is (exit), workingDir is null) [2024-11-24 01:43:18,050 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d9cbd223-3e19-44a5-b1a1-87e0ec577546/bin/uautomizer-verify-LYvppIcaGC/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Waiting until timeout for monitored process [2024-11-24 01:43:18,084 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2024-11-24 01:43:18,084 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~intINTTYPE1#0 [2024-11-24 01:43:18,084 INFO L130 BoogieDeclarations]: Found specification of procedure assume_abort_if_not [2024-11-24 01:43:18,085 INFO L138 BoogieDeclarations]: Found implementation of procedure assume_abort_if_not [2024-11-24 01:43:18,085 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2024-11-24 01:43:18,086 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2024-11-24 01:43:18,312 INFO L234 CfgBuilder]: Building ICFG [2024-11-24 01:43:18,315 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2024-11-24 01:43:19,051 INFO L? ?]: Removed 198 outVars from TransFormulas that were not future-live. [2024-11-24 01:43:19,052 INFO L283 CfgBuilder]: Performing block encoding [2024-11-24 01:43:19,062 INFO L307 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2024-11-24 01:43:19,062 INFO L312 CfgBuilder]: Removed 1 assume(true) statements. [2024-11-24 01:43:19,063 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 24.11 01:43:19 BoogieIcfgContainer [2024-11-24 01:43:19,063 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2024-11-24 01:43:19,067 INFO L112 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2024-11-24 01:43:19,068 INFO L270 PluginConnector]: Initializing TraceAbstraction... [2024-11-24 01:43:19,073 INFO L274 PluginConnector]: TraceAbstraction initialized [2024-11-24 01:43:19,074 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 24.11 01:43:17" (1/3) ... [2024-11-24 01:43:19,075 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@1a02393e and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 24.11 01:43:19, skipping insertion in model container [2024-11-24 01:43:19,075 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.11 01:43:17" (2/3) ... [2024-11-24 01:43:19,076 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@1a02393e and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 24.11 01:43:19, skipping insertion in model container [2024-11-24 01:43:19,077 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 24.11 01:43:19" (3/3) ... [2024-11-24 01:43:19,079 INFO L128 eAbstractionObserver]: Analyzing ICFG btor2c-lazyMod.circular_pointer_top_w32_d8_e0.c [2024-11-24 01:43:19,096 INFO L216 ceAbstractionStarter]: Automizer settings: Hoare:LoopHeads NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2024-11-24 01:43:19,099 INFO L151 ceAbstractionStarter]: Applying trace abstraction to ICFG btor2c-lazyMod.circular_pointer_top_w32_d8_e0.c that has 2 procedures, 20 locations, 1 initial locations, 1 loop locations, and 1 error locations. [2024-11-24 01:43:19,150 INFO L332 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2024-11-24 01:43:19,163 INFO L333 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mAutomataTypeConcurrency=PETRI_NET, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopHeads, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@bf8384a, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2024-11-24 01:43:19,163 INFO L334 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2024-11-24 01:43:19,167 INFO L276 IsEmpty]: Start isEmpty. Operand has 20 states, 14 states have (on average 1.2857142857142858) internal successors, (18), 15 states have internal predecessors, (18), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-24 01:43:19,175 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2024-11-24 01:43:19,176 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 01:43:19,177 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 01:43:19,178 INFO L396 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 01:43:19,185 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 01:43:19,185 INFO L85 PathProgramCache]: Analyzing trace with hash 1676994902, now seen corresponding path program 1 times [2024-11-24 01:43:19,201 INFO L118 FreeRefinementEngine]: Executing refinement strategy FOX [2024-11-24 01:43:19,202 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [939905637] [2024-11-24 01:43:19,202 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 01:43:19,203 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-24 01:43:19,203 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d9cbd223-3e19-44a5-b1a1-87e0ec577546/bin/uautomizer-verify-LYvppIcaGC/z3 [2024-11-24 01:43:19,208 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d9cbd223-3e19-44a5-b1a1-87e0ec577546/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-24 01:43:19,210 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d9cbd223-3e19-44a5-b1a1-87e0ec577546/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2024-11-24 01:43:19,600 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 01:43:19,613 INFO L256 TraceCheckSpWp]: Trace formula consists of 262 conjuncts, 19 conjuncts are in the unsatisfiable core [2024-11-24 01:43:19,626 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-24 01:43:20,028 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-11-24 01:43:20,029 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-24 01:43:20,271 INFO L136 FreeRefinementEngine]: Strategy FOX found an infeasible trace [2024-11-24 01:43:20,275 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [939905637] [2024-11-24 01:43:20,275 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [939905637] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-24 01:43:20,275 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [1253436436] [2024-11-24 01:43:20,276 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 01:43:20,276 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2024-11-24 01:43:20,276 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d9cbd223-3e19-44a5-b1a1-87e0ec577546/bin/uautomizer-verify-LYvppIcaGC/cvc4 [2024-11-24 01:43:20,282 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d9cbd223-3e19-44a5-b1a1-87e0ec577546/bin/uautomizer-verify-LYvppIcaGC/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2024-11-24 01:43:20,284 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d9cbd223-3e19-44a5-b1a1-87e0ec577546/bin/uautomizer-verify-LYvppIcaGC/cvc4 --incremental --print-success --lang smt (3)] Waiting until timeout for monitored process [2024-11-24 01:43:20,829 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 01:43:20,836 INFO L256 TraceCheckSpWp]: Trace formula consists of 262 conjuncts, 15 conjuncts are in the unsatisfiable core [2024-11-24 01:43:20,846 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-24 01:43:20,985 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-24 01:43:20,985 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-11-24 01:43:20,985 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [1253436436] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-24 01:43:20,985 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-11-24 01:43:20,985 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [7] total 7 [2024-11-24 01:43:20,988 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1015546247] [2024-11-24 01:43:20,990 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-24 01:43:20,994 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-24 01:43:20,994 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy FOX [2024-11-24 01:43:21,014 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-24 01:43:21,015 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=53, Unknown=0, NotChecked=0, Total=72 [2024-11-24 01:43:21,017 INFO L87 Difference]: Start difference. First operand has 20 states, 14 states have (on average 1.2857142857142858) internal successors, (18), 15 states have internal predecessors, (18), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Second operand has 4 states, 4 states have (on average 2.75) internal successors, (11), 4 states have internal predecessors, (11), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-24 01:43:21,132 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 01:43:21,133 INFO L93 Difference]: Finished difference Result 43 states and 63 transitions. [2024-11-24 01:43:21,134 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-24 01:43:21,135 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 2.75) internal successors, (11), 4 states have internal predecessors, (11), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 23 [2024-11-24 01:43:21,136 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 01:43:21,141 INFO L225 Difference]: With dead ends: 43 [2024-11-24 01:43:21,142 INFO L226 Difference]: Without dead ends: 25 [2024-11-24 01:43:21,145 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 48 GetRequests, 41 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=19, Invalid=53, Unknown=0, NotChecked=0, Total=72 [2024-11-24 01:43:21,148 INFO L435 NwaCegarLoop]: 14 mSDtfsCounter, 0 mSDsluCounter, 24 mSDsCounter, 0 mSdLazyCounter, 18 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 38 SdHoareTripleChecker+Invalid, 18 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 18 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-24 01:43:21,152 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 38 Invalid, 18 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 18 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-24 01:43:21,166 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25 states. [2024-11-24 01:43:21,186 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25 to 25. [2024-11-24 01:43:21,187 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 25 states, 17 states have (on average 1.0588235294117647) internal successors, (18), 17 states have internal predecessors, (18), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-11-24 01:43:21,192 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25 states to 25 states and 30 transitions. [2024-11-24 01:43:21,195 INFO L78 Accepts]: Start accepts. Automaton has 25 states and 30 transitions. Word has length 23 [2024-11-24 01:43:21,197 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 01:43:21,197 INFO L471 AbstractCegarLoop]: Abstraction has 25 states and 30 transitions. [2024-11-24 01:43:21,198 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 2.75) internal successors, (11), 4 states have internal predecessors, (11), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-24 01:43:21,198 INFO L276 IsEmpty]: Start isEmpty. Operand 25 states and 30 transitions. [2024-11-24 01:43:21,200 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2024-11-24 01:43:21,200 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 01:43:21,201 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1] [2024-11-24 01:43:21,208 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d9cbd223-3e19-44a5-b1a1-87e0ec577546/bin/uautomizer-verify-LYvppIcaGC/cvc4 --incremental --print-success --lang smt (3)] Forceful destruction successful, exit code 0 [2024-11-24 01:43:21,415 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d9cbd223-3e19-44a5-b1a1-87e0ec577546/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Ended with exit code 0 [2024-11-24 01:43:21,609 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d9cbd223-3e19-44a5-b1a1-87e0ec577546/bin/uautomizer-verify-LYvppIcaGC/cvc4 --incremental --print-success --lang smt,2 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d9cbd223-3e19-44a5-b1a1-87e0ec577546/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-24 01:43:21,610 INFO L396 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 01:43:21,613 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 01:43:21,613 INFO L85 PathProgramCache]: Analyzing trace with hash -1294995197, now seen corresponding path program 1 times [2024-11-24 01:43:21,614 INFO L118 FreeRefinementEngine]: Executing refinement strategy FOX [2024-11-24 01:43:21,614 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [585320458] [2024-11-24 01:43:21,614 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 01:43:21,614 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-24 01:43:21,614 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d9cbd223-3e19-44a5-b1a1-87e0ec577546/bin/uautomizer-verify-LYvppIcaGC/z3 [2024-11-24 01:43:21,618 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d9cbd223-3e19-44a5-b1a1-87e0ec577546/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-24 01:43:21,621 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d9cbd223-3e19-44a5-b1a1-87e0ec577546/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2024-11-24 01:43:22,063 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 01:43:22,074 INFO L256 TraceCheckSpWp]: Trace formula consists of 486 conjuncts, 43 conjuncts are in the unsatisfiable core [2024-11-24 01:43:22,085 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-24 01:43:22,797 INFO L134 CoverageAnalysis]: Checked inductivity of 68 backedges. 0 proven. 23 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2024-11-24 01:43:22,797 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-24 01:43:22,998 INFO L136 FreeRefinementEngine]: Strategy FOX found an infeasible trace [2024-11-24 01:43:22,998 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [585320458] [2024-11-24 01:43:22,998 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [585320458] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-24 01:43:22,999 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [1652478733] [2024-11-24 01:43:22,999 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 01:43:22,999 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2024-11-24 01:43:22,999 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d9cbd223-3e19-44a5-b1a1-87e0ec577546/bin/uautomizer-verify-LYvppIcaGC/cvc4 [2024-11-24 01:43:23,001 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d9cbd223-3e19-44a5-b1a1-87e0ec577546/bin/uautomizer-verify-LYvppIcaGC/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2024-11-24 01:43:23,005 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d9cbd223-3e19-44a5-b1a1-87e0ec577546/bin/uautomizer-verify-LYvppIcaGC/cvc4 --incremental --print-success --lang smt (5)] Waiting until timeout for monitored process [2024-11-24 01:43:23,910 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 01:43:23,997 INFO L256 TraceCheckSpWp]: Trace formula consists of 486 conjuncts, 40 conjuncts are in the unsatisfiable core [2024-11-24 01:43:24,013 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-24 01:43:24,450 INFO L134 CoverageAnalysis]: Checked inductivity of 68 backedges. 0 proven. 23 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2024-11-24 01:43:24,450 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-24 01:43:24,612 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [1652478733] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-24 01:43:24,612 INFO L185 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2024-11-24 01:43:24,612 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 9] total 10 [2024-11-24 01:43:24,613 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [471403109] [2024-11-24 01:43:24,613 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2024-11-24 01:43:24,613 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 10 states [2024-11-24 01:43:24,614 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy FOX [2024-11-24 01:43:24,614 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2024-11-24 01:43:24,614 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=108, Unknown=0, NotChecked=0, Total=132 [2024-11-24 01:43:24,615 INFO L87 Difference]: Start difference. First operand 25 states and 30 transitions. Second operand has 10 states, 9 states have (on average 2.4444444444444446) internal successors, (22), 10 states have internal predecessors, (22), 3 states have call successors, (6), 1 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 3 states have call successors, (6) [2024-11-24 01:43:25,071 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 01:43:25,072 INFO L93 Difference]: Finished difference Result 36 states and 44 transitions. [2024-11-24 01:43:25,072 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2024-11-24 01:43:25,072 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 9 states have (on average 2.4444444444444446) internal successors, (22), 10 states have internal predecessors, (22), 3 states have call successors, (6), 1 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 3 states have call successors, (6) Word has length 44 [2024-11-24 01:43:25,073 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 01:43:25,073 INFO L225 Difference]: With dead ends: 36 [2024-11-24 01:43:25,073 INFO L226 Difference]: Without dead ends: 34 [2024-11-24 01:43:25,074 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 98 GetRequests, 83 SyntacticMatches, 1 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 13 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=47, Invalid=193, Unknown=0, NotChecked=0, Total=240 [2024-11-24 01:43:25,075 INFO L435 NwaCegarLoop]: 12 mSDtfsCounter, 7 mSDsluCounter, 64 mSDsCounter, 0 mSdLazyCounter, 132 mSolverCounterSat, 7 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 7 SdHoareTripleChecker+Valid, 76 SdHoareTripleChecker+Invalid, 139 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 7 IncrementalHoareTripleChecker+Valid, 132 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2024-11-24 01:43:25,075 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [7 Valid, 76 Invalid, 139 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [7 Valid, 132 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2024-11-24 01:43:25,076 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34 states. [2024-11-24 01:43:25,081 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34 to 34. [2024-11-24 01:43:25,082 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 34 states, 23 states have (on average 1.0434782608695652) internal successors, (24), 23 states have internal predecessors, (24), 9 states have call successors, (9), 1 states have call predecessors, (9), 1 states have return successors, (9), 9 states have call predecessors, (9), 9 states have call successors, (9) [2024-11-24 01:43:25,083 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34 states to 34 states and 42 transitions. [2024-11-24 01:43:25,083 INFO L78 Accepts]: Start accepts. Automaton has 34 states and 42 transitions. Word has length 44 [2024-11-24 01:43:25,084 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 01:43:25,084 INFO L471 AbstractCegarLoop]: Abstraction has 34 states and 42 transitions. [2024-11-24 01:43:25,084 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 10 states, 9 states have (on average 2.4444444444444446) internal successors, (22), 10 states have internal predecessors, (22), 3 states have call successors, (6), 1 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 3 states have call successors, (6) [2024-11-24 01:43:25,084 INFO L276 IsEmpty]: Start isEmpty. Operand 34 states and 42 transitions. [2024-11-24 01:43:25,085 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2024-11-24 01:43:25,086 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 01:43:25,086 INFO L218 NwaCegarLoop]: trace histogram [9, 9, 9, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 1, 1, 1, 1] [2024-11-24 01:43:25,093 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d9cbd223-3e19-44a5-b1a1-87e0ec577546/bin/uautomizer-verify-LYvppIcaGC/cvc4 --incremental --print-success --lang smt (5)] Ended with exit code 0 [2024-11-24 01:43:25,300 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d9cbd223-3e19-44a5-b1a1-87e0ec577546/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Ended with exit code 0 [2024-11-24 01:43:25,494 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 5 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d9cbd223-3e19-44a5-b1a1-87e0ec577546/bin/uautomizer-verify-LYvppIcaGC/cvc4 --incremental --print-success --lang smt,4 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d9cbd223-3e19-44a5-b1a1-87e0ec577546/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-24 01:43:25,494 INFO L396 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 01:43:25,495 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 01:43:25,495 INFO L85 PathProgramCache]: Analyzing trace with hash 1531864950, now seen corresponding path program 2 times [2024-11-24 01:43:25,496 INFO L118 FreeRefinementEngine]: Executing refinement strategy FOX [2024-11-24 01:43:25,496 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1843122113] [2024-11-24 01:43:25,496 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2024-11-24 01:43:25,497 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-24 01:43:25,497 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d9cbd223-3e19-44a5-b1a1-87e0ec577546/bin/uautomizer-verify-LYvppIcaGC/z3 [2024-11-24 01:43:25,500 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d9cbd223-3e19-44a5-b1a1-87e0ec577546/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-24 01:43:25,501 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d9cbd223-3e19-44a5-b1a1-87e0ec577546/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2024-11-24 01:43:26,116 INFO L229 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2024-11-24 01:43:26,116 INFO L230 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-24 01:43:26,126 INFO L256 TraceCheckSpWp]: Trace formula consists of 710 conjuncts, 88 conjuncts are in the unsatisfiable core [2024-11-24 01:43:26,153 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-24 01:43:30,957 INFO L134 CoverageAnalysis]: Checked inductivity of 169 backedges. 12 proven. 55 refuted. 0 times theorem prover too weak. 102 trivial. 0 not checked. [2024-11-24 01:43:30,957 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-24 01:43:35,439 WARN L851 $PredicateComparison]: unable to prove that (let ((.cse9 ((_ zero_extend 24) |c_ULTIMATE.start_main_~mask_SORT_1~0#1|)) (.cse15 (= |c_ULTIMATE.start_main_~state_91~0#1| (_ bv0 8)))) (let ((.cse7 (= |c_ULTIMATE.start_main_~state_87~0#1| (bvand |c_ULTIMATE.start_main_~state_55~0#1| |c_ULTIMATE.start_main_~mask_SORT_3~0#1|))) (.cse12 (or (forall ((|v_ULTIMATE.start_main_~var_114_arg_0~0#1_19| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_110_arg_1~0#1_17| (_ BitVec 8))) (= ((_ extract 7 0) (bvand .cse9 ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_114_arg_0~0#1_19|) ((_ zero_extend 24) ((_ extract 7 0) (bvnot ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_110_arg_1~0#1_17|))))))))))) (_ bv0 8))) .cse15)) (.cse14 ((_ zero_extend 24) |c_ULTIMATE.start_main_~state_68~0#1|)) (.cse13 (not .cse15))) (let ((.cse6 (and .cse12 (or (forall ((|v_ULTIMATE.start_main_~var_85_arg_1~0#1_17| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_114_arg_0~0#1_19| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_74_arg_1~0#1_17| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_71_arg_1~0#1_17| (_ BitVec 8))) (= ((_ extract 7 0) (bvand .cse9 ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) (bvnot ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) ((_ extract 7 0) (bvor (_ bv0 32) ((_ zero_extend 24) ((_ extract 7 0) (bvnot ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_74_arg_1~0#1_17|) ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_71_arg_1~0#1_17|) .cse14)))))) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_85_arg_1~0#1_17|))))))))))))))) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_114_arg_0~0#1_19|)))))) (_ bv0 8))) .cse13))) (.cse8 (forall ((|v_ULTIMATE.start_main_~var_58_arg_2~0#1_15| (_ BitVec 32))) (= |c_ULTIMATE.start_main_~state_87~0#1| (bvand |c_ULTIMATE.start_main_~mask_SORT_3~0#1| |v_ULTIMATE.start_main_~var_58_arg_2~0#1_15|)))) (.cse1 (and .cse12 (or .cse13 (forall ((|v_ULTIMATE.start_main_~var_85_arg_1~0#1_17| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_114_arg_0~0#1_19| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_74_arg_1~0#1_17| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_71_arg_1~0#1_17| (_ BitVec 8))) (= (_ bv0 8) ((_ extract 7 0) (bvand .cse9 ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) (bvnot ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) ((_ extract 7 0) (bvor (_ bv1 32) ((_ zero_extend 24) ((_ extract 7 0) (bvnot ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_74_arg_1~0#1_17|) ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_71_arg_1~0#1_17|) .cse14)))))) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_85_arg_1~0#1_17|))))))))))))))) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_114_arg_0~0#1_19|))))))))))) (.cse2 (forall ((|v_ULTIMATE.start_main_~var_58_arg_2~0#1_15| (_ BitVec 32))) (not (= |c_ULTIMATE.start_main_~state_87~0#1| (bvand |c_ULTIMATE.start_main_~mask_SORT_3~0#1| |v_ULTIMATE.start_main_~var_58_arg_2~0#1_15|))))) (.cse5 (not .cse7)) (.cse0 (= (_ bv0 32) ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |c_ULTIMATE.start_main_~mask_SORT_13~0#1|) ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) |c_ULTIMATE.start_main_~state_12~0#1|))))))))) (and (or (not .cse0) (let ((.cse4 (= (_ bv0 8) ((_ extract 7 0) (bvand .cse9 (_ bv255 32)))))) (let ((.cse3 (not .cse4))) (and (or .cse1 (and (or .cse2 .cse3) (or .cse4 .cse5))) (or .cse6 (and (or .cse4 .cse7) (or .cse8 .cse3))))))) (or (let ((.cse10 (= ((_ extract 7 0) (bvand .cse9 (_ bv254 32))) (_ bv0 8)))) (let ((.cse11 (not .cse10))) (and (or .cse6 (and (or .cse10 .cse7) (or .cse11 .cse8))) (or .cse1 (and (or .cse11 .cse2) (or .cse10 .cse5)))))) .cse0))))) is different from false [2024-11-24 01:43:35,670 INFO L136 FreeRefinementEngine]: Strategy FOX found an infeasible trace [2024-11-24 01:43:35,670 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1843122113] [2024-11-24 01:43:35,670 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1843122113] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-24 01:43:35,670 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [633189713] [2024-11-24 01:43:35,670 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2024-11-24 01:43:35,670 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2024-11-24 01:43:35,670 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d9cbd223-3e19-44a5-b1a1-87e0ec577546/bin/uautomizer-verify-LYvppIcaGC/cvc4 [2024-11-24 01:43:35,672 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d9cbd223-3e19-44a5-b1a1-87e0ec577546/bin/uautomizer-verify-LYvppIcaGC/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2024-11-24 01:43:35,673 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d9cbd223-3e19-44a5-b1a1-87e0ec577546/bin/uautomizer-verify-LYvppIcaGC/cvc4 --incremental --print-success --lang smt (7)] Waiting until timeout for monitored process [2024-11-24 01:43:36,816 INFO L229 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2024-11-24 01:43:36,817 INFO L230 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-24 01:43:36,848 INFO L256 TraceCheckSpWp]: Trace formula consists of 710 conjuncts, 87 conjuncts are in the unsatisfiable core [2024-11-24 01:43:36,860 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-24 01:43:50,468 INFO L134 CoverageAnalysis]: Checked inductivity of 169 backedges. 12 proven. 55 refuted. 0 times theorem prover too weak. 102 trivial. 0 not checked. [2024-11-24 01:43:50,468 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-24 01:43:56,624 WARN L851 $PredicateComparison]: unable to prove that (let ((.cse9 ((_ zero_extend 24) |c_ULTIMATE.start_main_~mask_SORT_1~0#1|))) (let ((.cse6 (= |c_ULTIMATE.start_main_~state_87~0#1| (bvand |c_ULTIMATE.start_main_~state_55~0#1| |c_ULTIMATE.start_main_~mask_SORT_3~0#1|))) (.cse13 (forall ((|v_ULTIMATE.start_main_~var_110_arg_1~0#1_21| (_ BitVec 8))) (= (_ bv0 8) ((_ extract 7 0) (bvand .cse9 ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) |c_ULTIMATE.start_main_~var_111~0#1|))) ((_ zero_extend 24) ((_ extract 7 0) (bvnot ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_110_arg_1~0#1_21|)))))))))))))) (.cse12 ((_ zero_extend 24) |c_ULTIMATE.start_main_~state_68~0#1|))) (let ((.cse5 (and .cse13 (forall ((|v_ULTIMATE.start_main_~var_74_arg_1~0#1_21| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_112_arg_2~0#1_21| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_71_arg_1~0#1_21| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_85_arg_1~0#1_21| (_ BitVec 8))) (= (_ bv0 8) ((_ extract 7 0) (bvand .cse9 ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) (bvnot ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) ((_ extract 7 0) (bvor (_ bv1 32) ((_ zero_extend 24) ((_ extract 7 0) (bvnot ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_74_arg_1~0#1_21|) ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_71_arg_1~0#1_21|) .cse12)))))) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_85_arg_1~0#1_21|))))))))))))))) ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_112_arg_2~0#1_21|)))))))))))) (.cse2 (not .cse6)) (.cse3 (forall ((|v_ULTIMATE.start_main_~var_58_arg_2~0#1_19| (_ BitVec 32))) (not (= |c_ULTIMATE.start_main_~state_87~0#1| (bvand |c_ULTIMATE.start_main_~mask_SORT_3~0#1| |v_ULTIMATE.start_main_~var_58_arg_2~0#1_19|))))) (.cse7 (forall ((|v_ULTIMATE.start_main_~var_58_arg_2~0#1_19| (_ BitVec 32))) (= |c_ULTIMATE.start_main_~state_87~0#1| (bvand |c_ULTIMATE.start_main_~mask_SORT_3~0#1| |v_ULTIMATE.start_main_~var_58_arg_2~0#1_19|)))) (.cse8 (and (forall ((|v_ULTIMATE.start_main_~var_74_arg_1~0#1_21| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_112_arg_2~0#1_21| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_71_arg_1~0#1_21| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_85_arg_1~0#1_21| (_ BitVec 8))) (= ((_ extract 7 0) (bvand .cse9 ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) (bvnot ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) ((_ extract 7 0) (bvor (_ bv0 32) ((_ zero_extend 24) ((_ extract 7 0) (bvnot ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_74_arg_1~0#1_21|) ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_71_arg_1~0#1_21|) .cse12)))))) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_85_arg_1~0#1_21|))))))))))))))) ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_112_arg_2~0#1_21|)))))))) (_ bv0 8))) .cse13)) (.cse0 (= (_ bv0 32) ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |c_ULTIMATE.start_main_~mask_SORT_13~0#1|) ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) |c_ULTIMATE.start_main_~state_12~0#1|))))))))) (and (or (not .cse0) (let ((.cse1 (= (_ bv0 8) ((_ extract 7 0) (bvand .cse9 (_ bv255 32)))))) (let ((.cse4 (not .cse1))) (and (or (and (or .cse1 .cse2) (or .cse3 .cse4)) .cse5) (or (and (or .cse1 .cse6) (or .cse7 .cse4)) .cse8))))) (or (let ((.cse10 (= ((_ extract 7 0) (bvand .cse9 (_ bv254 32))) (_ bv0 8)))) (let ((.cse11 (not .cse10))) (and (or .cse5 (and (or .cse10 .cse2) (or .cse11 .cse3))) (or (and (or .cse10 .cse6) (or .cse11 .cse7)) .cse8)))) .cse0))))) is different from false [2024-11-24 01:43:57,642 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [633189713] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-24 01:43:57,643 INFO L185 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2024-11-24 01:43:57,643 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12] total 15 [2024-11-24 01:43:57,643 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1701374883] [2024-11-24 01:43:57,643 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2024-11-24 01:43:57,644 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 15 states [2024-11-24 01:43:57,644 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy FOX [2024-11-24 01:43:57,645 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2024-11-24 01:43:57,645 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=42, Invalid=203, Unknown=3, NotChecked=58, Total=306 [2024-11-24 01:43:57,645 INFO L87 Difference]: Start difference. First operand 34 states and 42 transitions. Second operand has 15 states, 12 states have (on average 2.8333333333333335) internal successors, (34), 15 states have internal predecessors, (34), 7 states have call successors, (13), 1 states have call predecessors, (13), 2 states have return successors, (13), 6 states have call predecessors, (13), 7 states have call successors, (13) [2024-11-24 01:44:07,147 WARN L249 Executor]: External (MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d9cbd223-3e19-44a5-b1a1-87e0ec577546/bin/uautomizer-verify-LYvppIcaGC/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1) with exit command (exit)) stderr output: (error "out of memory") [2024-11-24 01:44:07,148 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d9cbd223-3e19-44a5-b1a1-87e0ec577546/bin/uautomizer-verify-LYvppIcaGC/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Forceful destruction successful, exit code 101 [2024-11-24 01:44:07,148 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2024-11-24 01:44:07,148 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 142 GetRequests, 120 SyntacticMatches, 0 SemanticMatches, 21 ConstructedPredicates, 2 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 17.6s TimeCoverageRelationStatistics Valid=69, Invalid=356, Unknown=3, NotChecked=78, Total=506 [2024-11-24 01:44:07,149 INFO L435 NwaCegarLoop]: 9 mSDtfsCounter, 8 mSDsluCounter, 46 mSDsCounter, 0 mSdLazyCounter, 116 mSolverCounterSat, 8 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.9s Time, 0 mProtectedPredicate, 0 mProtectedAction, 8 SdHoareTripleChecker+Valid, 55 SdHoareTripleChecker+Invalid, 124 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 8 IncrementalHoareTripleChecker+Valid, 116 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 2.0s IncrementalHoareTripleChecker+Time [2024-11-24 01:44:07,149 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [8 Valid, 55 Invalid, 124 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [8 Valid, 116 Invalid, 0 Unknown, 0 Unchecked, 2.0s Time] [2024-11-24 01:44:07,164 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d9cbd223-3e19-44a5-b1a1-87e0ec577546/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Ended with exit code 0 [2024-11-24 01:44:07,358 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d9cbd223-3e19-44a5-b1a1-87e0ec577546/bin/uautomizer-verify-LYvppIcaGC/cvc4 --incremental --print-success --lang smt (7)] Forceful destruction successful, exit code 0 [2024-11-24 01:44:07,550 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 6 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d9cbd223-3e19-44a5-b1a1-87e0ec577546/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true,7 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d9cbd223-3e19-44a5-b1a1-87e0ec577546/bin/uautomizer-verify-LYvppIcaGC/cvc4 --incremental --print-success --lang smt [2024-11-24 01:44:07,551 FATAL L? ?]: An unrecoverable error occured during an interaction with an SMT solver: de.uni_freiburg.informatik.ultimate.logic.SMTLIBException: External (MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d9cbd223-3e19-44a5-b1a1-87e0ec577546/bin/uautomizer-verify-LYvppIcaGC/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1) with exit command (exit)) Received EOF on stdin. stderr output: (error "out of memory") at de.uni_freiburg.informatik.ultimate.smtsolver.external.Executor.parse(Executor.java:262) at de.uni_freiburg.informatik.ultimate.smtsolver.external.Executor.parseCheckSatResult(Executor.java:281) at de.uni_freiburg.informatik.ultimate.smtsolver.external.Scriptor.checkSat(Scriptor.java:155) at de.uni_freiburg.informatik.ultimate.logic.WrapperScript.checkSat(WrapperScript.java:163) at de.uni_freiburg.informatik.ultimate.logic.WrapperScript.checkSat(WrapperScript.java:163) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.ManagedScript.checkSat(ManagedScript.java:148) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.MonolithicImplicationChecker.checkImplication(MonolithicImplicationChecker.java:85) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier$PredicateComparison.compare(PredicateUnifier.java:912) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier$PredicateComparison.(PredicateUnifier.java:786) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate(PredicateUnifier.java:374) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicateForConjunction(PredicateUnifier.java:244) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.interpolantautomata.transitionappender.DeterministicInterpolantAutomaton.getOrConstructPredicate(DeterministicInterpolantAutomaton.java:283) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.interpolantautomata.transitionappender.DeterministicInterpolantAutomaton.constructSuccessorsAndTransitions(DeterministicInterpolantAutomaton.java:305) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.interpolantautomata.transitionappender.BasicAbstractInterpolantAutomaton.computeSuccs(BasicAbstractInterpolantAutomaton.java:79) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.interpolantautomata.transitionappender.BasicAbstractInterpolantAutomaton.computeSuccs(BasicAbstractInterpolantAutomaton.java:1) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.interpolantautomata.transitionappender.AbstractInterpolantAutomaton.internalSuccessors(AbstractInterpolantAutomaton.java:233) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.interpolantautomata.transitionappender.AbstractInterpolantAutomaton.internalSuccessors(AbstractInterpolantAutomaton.java:1) at de.uni_freiburg.informatik.ultimate.automata.nestedword.operations.TotalizeNwa.internalSuccessors(TotalizeNwa.java:246) at de.uni_freiburg.informatik.ultimate.automata.nestedword.operations.ComplementDeterministicNwa.internalSuccessors(ComplementDeterministicNwa.java:121) at de.uni_freiburg.informatik.ultimate.automata.nestedword.operations.ProductNwa.internalSuccessors(ProductNwa.java:218) at de.uni_freiburg.informatik.ultimate.automata.nestedword.operations.ProductNwa.internalSuccessors(ProductNwa.java:210) at de.uni_freiburg.informatik.ultimate.automata.nestedword.reachablestates.NestedWordAutomatonReachableStates$ReachableStatesComputation.addInternalsAndSuccessors(NestedWordAutomatonReachableStates.java:1058) at de.uni_freiburg.informatik.ultimate.automata.nestedword.reachablestates.NestedWordAutomatonReachableStates$ReachableStatesComputation.(NestedWordAutomatonReachableStates.java:960) at de.uni_freiburg.informatik.ultimate.automata.nestedword.reachablestates.NestedWordAutomatonReachableStates.(NestedWordAutomatonReachableStates.java:182) at de.uni_freiburg.informatik.ultimate.automata.nestedword.operations.Difference.computeDifference(Difference.java:137) at de.uni_freiburg.informatik.ultimate.automata.nestedword.operations.Difference.(Difference.java:90) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.NwaCegarLoop.computeAutomataDifference(NwaCegarLoop.java:376) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.NwaCegarLoop.refineAbstraction(NwaCegarLoop.java:348) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.refineAbstractionInternal(AbstractCegarLoop.java:463) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.iterate(AbstractCegarLoop.java:414) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.startCegar(AbstractCegarLoop.java:342) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.runCegar(AbstractCegarLoop.java:324) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.executeCegarLoop(TraceAbstractionStarter.java:428) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.analyseProgram(TraceAbstractionStarter.java:314) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.analyseSequentialProgram(TraceAbstractionStarter.java:275) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.runCegarLoops(TraceAbstractionStarter.java:167) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.(TraceAbstractionStarter.java:140) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver.finish(TraceAbstractionObserver.java:132) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runObserver(PluginConnector.java:167) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runTool(PluginConnector.java:150) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.run(PluginConnector.java:127) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.executePluginConnector(ToolchainWalker.java:233) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.processPlugin(ToolchainWalker.java:227) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walkUnprotected(ToolchainWalker.java:144) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walk(ToolchainWalker.java:106) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainManager$Toolchain.processToolchain(ToolchainManager.java:319) at de.uni_freiburg.informatik.ultimate.core.coreplugin.toolchain.DefaultToolchainJob.run(DefaultToolchainJob.java:145) at org.eclipse.core.internal.jobs.Worker.run(Worker.java:63) Caused by: de.uni_freiburg.informatik.ultimate.logic.SMTLIBException: EOF at de.uni_freiburg.informatik.ultimate.smtsolver.external.Parser$Action$.CUP$do_action(Parser.java:1518) at de.uni_freiburg.informatik.ultimate.smtsolver.external.Parser.do_action(Parser.java:701) at com.github.jhoenicke.javacup.runtime.LRParser.parse(LRParser.java:383) at de.uni_freiburg.informatik.ultimate.smtsolver.external.Executor.parse(Executor.java:258) ... 47 more [2024-11-24 01:44:07,556 INFO L158 Benchmark]: Toolchain (without parser) took 50510.39ms. Allocated memory was 83.9MB in the beginning and 587.2MB in the end (delta: 503.3MB). Free memory was 60.2MB in the beginning and 249.2MB in the end (delta: -188.9MB). Peak memory consumption was 313.0MB. Max. memory is 16.1GB. [2024-11-24 01:44:07,556 INFO L158 Benchmark]: CDTParser took 0.42ms. Allocated memory is still 83.9MB. Free memory is still 51.2MB. There was no memory consumed. Max. memory is 16.1GB. [2024-11-24 01:44:07,557 INFO L158 Benchmark]: CACSL2BoogieTranslator took 703.59ms. Allocated memory is still 83.9MB. Free memory was 60.1MB in the beginning and 34.6MB in the end (delta: 25.5MB). Peak memory consumption was 25.2MB. Max. memory is 16.1GB. [2024-11-24 01:44:07,560 INFO L158 Benchmark]: Boogie Procedure Inliner took 124.49ms. Allocated memory is still 83.9MB. Free memory was 34.6MB in the beginning and 29.6MB in the end (delta: 5.0MB). There was no memory consumed. Max. memory is 16.1GB. [2024-11-24 01:44:07,561 INFO L158 Benchmark]: Boogie Preprocessor took 122.18ms. Allocated memory is still 83.9MB. Free memory was 29.6MB in the beginning and 53.0MB in the end (delta: -23.4MB). Peak memory consumption was 12.8MB. Max. memory is 16.1GB. [2024-11-24 01:44:07,561 INFO L158 Benchmark]: RCFGBuilder took 1061.61ms. Allocated memory was 83.9MB in the beginning and 192.9MB in the end (delta: 109.1MB). Free memory was 53.0MB in the beginning and 128.9MB in the end (delta: -75.9MB). Peak memory consumption was 39.1MB. Max. memory is 16.1GB. [2024-11-24 01:44:07,561 INFO L158 Benchmark]: TraceAbstraction took 48488.30ms. Allocated memory was 192.9MB in the beginning and 587.2MB in the end (delta: 394.3MB). Free memory was 128.5MB in the beginning and 249.2MB in the end (delta: -120.7MB). Peak memory consumption was 271.6MB. Max. memory is 16.1GB. [2024-11-24 01:44:07,563 INFO L338 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.42ms. Allocated memory is still 83.9MB. Free memory is still 51.2MB. There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 703.59ms. Allocated memory is still 83.9MB. Free memory was 60.1MB in the beginning and 34.6MB in the end (delta: 25.5MB). Peak memory consumption was 25.2MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 124.49ms. Allocated memory is still 83.9MB. Free memory was 34.6MB in the beginning and 29.6MB in the end (delta: 5.0MB). There was no memory consumed. Max. memory is 16.1GB. * Boogie Preprocessor took 122.18ms. Allocated memory is still 83.9MB. Free memory was 29.6MB in the beginning and 53.0MB in the end (delta: -23.4MB). Peak memory consumption was 12.8MB. Max. memory is 16.1GB. * RCFGBuilder took 1061.61ms. Allocated memory was 83.9MB in the beginning and 192.9MB in the end (delta: 109.1MB). Free memory was 53.0MB in the beginning and 128.9MB in the end (delta: -75.9MB). Peak memory consumption was 39.1MB. Max. memory is 16.1GB. * TraceAbstraction took 48488.30ms. Allocated memory was 192.9MB in the beginning and 587.2MB in the end (delta: 394.3MB). Free memory was 128.5MB in the beginning and 249.2MB in the end (delta: -120.7MB). Peak memory consumption was 271.6MB. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - ExceptionOrErrorResult: SMTLIBException: External (MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d9cbd223-3e19-44a5-b1a1-87e0ec577546/bin/uautomizer-verify-LYvppIcaGC/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1) with exit command (exit)) Received EOF on stdin. stderr output: (error "out of memory") de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: SMTLIBException: External (MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d9cbd223-3e19-44a5-b1a1-87e0ec577546/bin/uautomizer-verify-LYvppIcaGC/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1) with exit command (exit)) Received EOF on stdin. stderr output: (error "out of memory") : de.uni_freiburg.informatik.ultimate.smtsolver.external.Executor.parse(Executor.java:262) RESULT: Ultimate could not prove your program: Toolchain returned no result. Received shutdown request... --- End real Ultimate output --- Execution finished normally Writing output log to file Ultimate.log Result: ERROR: ExceptionOrErrorResult: SMTLIBException: External (MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d9cbd223-3e19-44a5-b1a1-87e0ec577546/bin/uautomizer-verify-LYvppIcaGC/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1) with exit command (exit)) Received EOF on stdin. stderr output: (error "out of memory")