./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w8_d8_e0.c --full-output --architecture 64bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version 6497de01 Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_328789b6-5d68-4a2f-beb0-52c77b3443fd/bin/uautomizer-verify-LYvppIcaGC/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_328789b6-5d68-4a2f-beb0-52c77b3443fd/bin/uautomizer-verify-LYvppIcaGC/plugins/org.eclipse.equinox.launcher_1.6.800.v20240513-1750.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_328789b6-5d68-4a2f-beb0-52c77b3443fd/bin/uautomizer-verify-LYvppIcaGC/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_328789b6-5d68-4a2f-beb0-52c77b3443fd/bin/uautomizer-verify-LYvppIcaGC/config/AutomizerReach.xml -i ../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w8_d8_e0.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_328789b6-5d68-4a2f-beb0-52c77b3443fd/bin/uautomizer-verify-LYvppIcaGC/config/svcomp-Reach-64bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_328789b6-5d68-4a2f-beb0-52c77b3443fd/bin/uautomizer-verify-LYvppIcaGC --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash 892a8506f942e825df8a32caf9cdaec45fd7cb5b4dbda5bc8acf67b64cc58b84 --- Real Ultimate output --- This is Ultimate 0.3.0-dev-6497de0 [2024-11-24 00:01:25,040 INFO L188 SettingsManager]: Resetting all preferences to default values... [2024-11-24 00:01:25,162 INFO L114 SettingsManager]: Loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_328789b6-5d68-4a2f-beb0-52c77b3443fd/bin/uautomizer-verify-LYvppIcaGC/config/svcomp-Reach-64bit-Automizer_Default.epf [2024-11-24 00:01:25,172 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2024-11-24 00:01:25,172 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2024-11-24 00:01:25,203 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2024-11-24 00:01:25,204 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2024-11-24 00:01:25,205 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2024-11-24 00:01:25,205 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2024-11-24 00:01:25,206 INFO L153 SettingsManager]: * Use memory slicer=true [2024-11-24 00:01:25,206 INFO L151 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2024-11-24 00:01:25,206 INFO L153 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2024-11-24 00:01:25,206 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2024-11-24 00:01:25,207 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2024-11-24 00:01:25,207 INFO L153 SettingsManager]: * Use SBE=true [2024-11-24 00:01:25,207 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2024-11-24 00:01:25,207 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2024-11-24 00:01:25,208 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2024-11-24 00:01:25,208 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2024-11-24 00:01:25,208 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2024-11-24 00:01:25,208 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2024-11-24 00:01:25,208 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2024-11-24 00:01:25,209 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2024-11-24 00:01:25,209 INFO L153 SettingsManager]: * Behaviour of calls to undefined functions=OVERAPPROXIMATE_BEHAVIOUR [2024-11-24 00:01:25,209 INFO L153 SettingsManager]: * Use constant arrays=true [2024-11-24 00:01:25,209 INFO L151 SettingsManager]: Preferences of IcfgBuilder differ from their defaults: [2024-11-24 00:01:25,209 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-11-24 00:01:25,210 INFO L153 SettingsManager]: * Only consider context switches at boundaries of atomic blocks=true [2024-11-24 00:01:25,210 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2024-11-24 00:01:25,210 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2024-11-24 00:01:25,210 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2024-11-24 00:01:25,210 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-11-24 00:01:25,211 INFO L153 SettingsManager]: * Only consider context switches at boundaries of atomic blocks=true [2024-11-24 00:01:25,211 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2024-11-24 00:01:25,211 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2024-11-24 00:01:25,211 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2024-11-24 00:01:25,211 INFO L153 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2024-11-24 00:01:25,211 INFO L153 SettingsManager]: * Compute procedure contracts=false [2024-11-24 00:01:25,211 INFO L153 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopHeads [2024-11-24 00:01:25,212 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2024-11-24 00:01:25,212 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2024-11-24 00:01:25,212 INFO L153 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false [2024-11-24 00:01:25,212 INFO L153 SettingsManager]: * Automaton type used in concurrency analysis=PETRI_NET [2024-11-24 00:01:25,212 INFO L153 SettingsManager]: * Order on configurations for Petri net unfoldings=DBO [2024-11-24 00:01:25,212 INFO L153 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2024-11-24 00:01:25,213 INFO L153 SettingsManager]: * Looper check in Petri net analysis=SEMANTIC Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_328789b6-5d68-4a2f-beb0-52c77b3443fd/bin/uautomizer-verify-LYvppIcaGC Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 892a8506f942e825df8a32caf9cdaec45fd7cb5b4dbda5bc8acf67b64cc58b84 [2024-11-24 00:01:25,669 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2024-11-24 00:01:25,685 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2024-11-24 00:01:25,688 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2024-11-24 00:01:25,690 INFO L270 PluginConnector]: Initializing CDTParser... [2024-11-24 00:01:25,691 INFO L274 PluginConnector]: CDTParser initialized [2024-11-24 00:01:25,694 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_328789b6-5d68-4a2f-beb0-52c77b3443fd/bin/uautomizer-verify-LYvppIcaGC/../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w8_d8_e0.c [2024-11-24 00:01:29,056 INFO L533 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_328789b6-5d68-4a2f-beb0-52c77b3443fd/bin/uautomizer-verify-LYvppIcaGC/data/4de48f43b/5bf892dcc6d943f5a46c3189fa52d17d/FLAG77721d28f [2024-11-24 00:01:29,573 INFO L384 CDTParser]: Found 1 translation units. [2024-11-24 00:01:29,574 INFO L180 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_328789b6-5d68-4a2f-beb0-52c77b3443fd/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w8_d8_e0.c [2024-11-24 00:01:29,595 INFO L427 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_328789b6-5d68-4a2f-beb0-52c77b3443fd/bin/uautomizer-verify-LYvppIcaGC/data/4de48f43b/5bf892dcc6d943f5a46c3189fa52d17d/FLAG77721d28f [2024-11-24 00:01:29,623 INFO L435 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_328789b6-5d68-4a2f-beb0-52c77b3443fd/bin/uautomizer-verify-LYvppIcaGC/data/4de48f43b/5bf892dcc6d943f5a46c3189fa52d17d [2024-11-24 00:01:29,628 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2024-11-24 00:01:29,631 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2024-11-24 00:01:29,635 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2024-11-24 00:01:29,636 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2024-11-24 00:01:29,646 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2024-11-24 00:01:29,647 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 24.11 12:01:29" (1/1) ... [2024-11-24 00:01:29,648 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@1d05b2a7 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.11 12:01:29, skipping insertion in model container [2024-11-24 00:01:29,648 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 24.11 12:01:29" (1/1) ... [2024-11-24 00:01:29,723 INFO L175 MainTranslator]: Built tables and reachable declarations [2024-11-24 00:01:29,979 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_328789b6-5d68-4a2f-beb0-52c77b3443fd/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w8_d8_e0.c[1278,1291] [2024-11-24 00:01:30,295 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-11-24 00:01:30,308 INFO L200 MainTranslator]: Completed pre-run [2024-11-24 00:01:30,325 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_328789b6-5d68-4a2f-beb0-52c77b3443fd/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w8_d8_e0.c[1278,1291] [2024-11-24 00:01:30,491 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-11-24 00:01:30,515 INFO L204 MainTranslator]: Completed translation [2024-11-24 00:01:30,516 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.11 12:01:30 WrapperNode [2024-11-24 00:01:30,517 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2024-11-24 00:01:30,518 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2024-11-24 00:01:30,518 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2024-11-24 00:01:30,519 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2024-11-24 00:01:30,528 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.11 12:01:30" (1/1) ... [2024-11-24 00:01:30,558 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.11 12:01:30" (1/1) ... [2024-11-24 00:01:30,761 INFO L138 Inliner]: procedures = 17, calls = 11, calls flagged for inlining = 3, calls inlined = 3, statements flattened = 1382 [2024-11-24 00:01:30,762 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2024-11-24 00:01:30,763 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2024-11-24 00:01:30,765 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2024-11-24 00:01:30,765 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2024-11-24 00:01:30,779 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.11 12:01:30" (1/1) ... [2024-11-24 00:01:30,779 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.11 12:01:30" (1/1) ... [2024-11-24 00:01:30,822 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.11 12:01:30" (1/1) ... [2024-11-24 00:01:30,993 INFO L175 MemorySlicer]: Split 2 memory accesses to 1 slices as follows [2]. 100 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2]. The 0 writes are split as follows [0]. [2024-11-24 00:01:30,994 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.11 12:01:30" (1/1) ... [2024-11-24 00:01:30,994 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.11 12:01:30" (1/1) ... [2024-11-24 00:01:31,050 INFO L184 PluginConnector]: Executing the observer ReplaceArrayAssignments from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.11 12:01:30" (1/1) ... [2024-11-24 00:01:31,058 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.11 12:01:30" (1/1) ... [2024-11-24 00:01:31,078 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.11 12:01:30" (1/1) ... [2024-11-24 00:01:31,099 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.11 12:01:30" (1/1) ... [2024-11-24 00:01:31,112 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.11 12:01:30" (1/1) ... [2024-11-24 00:01:31,142 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2024-11-24 00:01:31,144 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2024-11-24 00:01:31,144 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2024-11-24 00:01:31,145 INFO L274 PluginConnector]: RCFGBuilder initialized [2024-11-24 00:01:31,146 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.11 12:01:30" (1/1) ... [2024-11-24 00:01:31,152 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2024-11-24 00:01:31,223 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_328789b6-5d68-4a2f-beb0-52c77b3443fd/bin/uautomizer-verify-LYvppIcaGC/z3 [2024-11-24 00:01:31,245 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_328789b6-5d68-4a2f-beb0-52c77b3443fd/bin/uautomizer-verify-LYvppIcaGC/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (exit command is (exit), workingDir is null) [2024-11-24 00:01:31,254 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_328789b6-5d68-4a2f-beb0-52c77b3443fd/bin/uautomizer-verify-LYvppIcaGC/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Waiting until timeout for monitored process [2024-11-24 00:01:31,286 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2024-11-24 00:01:31,287 INFO L130 BoogieDeclarations]: Found specification of procedure assume_abort_if_not [2024-11-24 00:01:31,287 INFO L138 BoogieDeclarations]: Found implementation of procedure assume_abort_if_not [2024-11-24 00:01:31,287 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#0 [2024-11-24 00:01:31,287 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2024-11-24 00:01:31,287 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2024-11-24 00:01:31,617 INFO L234 CfgBuilder]: Building ICFG [2024-11-24 00:01:31,619 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2024-11-24 00:01:34,384 INFO L? ?]: Removed 754 outVars from TransFormulas that were not future-live. [2024-11-24 00:01:34,385 INFO L283 CfgBuilder]: Performing block encoding [2024-11-24 00:01:34,408 INFO L307 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2024-11-24 00:01:34,408 INFO L312 CfgBuilder]: Removed 1 assume(true) statements. [2024-11-24 00:01:34,409 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 24.11 12:01:34 BoogieIcfgContainer [2024-11-24 00:01:34,409 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2024-11-24 00:01:34,411 INFO L112 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2024-11-24 00:01:34,412 INFO L270 PluginConnector]: Initializing TraceAbstraction... [2024-11-24 00:01:34,419 INFO L274 PluginConnector]: TraceAbstraction initialized [2024-11-24 00:01:34,420 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 24.11 12:01:29" (1/3) ... [2024-11-24 00:01:34,421 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@71914246 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 24.11 12:01:34, skipping insertion in model container [2024-11-24 00:01:34,421 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.11 12:01:30" (2/3) ... [2024-11-24 00:01:34,421 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@71914246 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 24.11 12:01:34, skipping insertion in model container [2024-11-24 00:01:34,422 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 24.11 12:01:34" (3/3) ... [2024-11-24 00:01:34,423 INFO L128 eAbstractionObserver]: Analyzing ICFG btor2c-lazyMod.circular_pointer_top_w8_d8_e0.c [2024-11-24 00:01:34,444 INFO L216 ceAbstractionStarter]: Automizer settings: Hoare:LoopHeads NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2024-11-24 00:01:34,445 INFO L151 ceAbstractionStarter]: Applying trace abstraction to ICFG btor2c-lazyMod.circular_pointer_top_w8_d8_e0.c that has 2 procedures, 392 locations, 1 initial locations, 1 loop locations, and 1 error locations. [2024-11-24 00:01:34,545 INFO L332 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2024-11-24 00:01:34,563 INFO L333 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mAutomataTypeConcurrency=PETRI_NET, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopHeads, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@7aa75284, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2024-11-24 00:01:34,563 INFO L334 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2024-11-24 00:01:34,569 INFO L276 IsEmpty]: Start isEmpty. Operand has 392 states, 386 states have (on average 1.4922279792746114) internal successors, (576), 387 states have internal predecessors, (576), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-24 00:01:34,582 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 118 [2024-11-24 00:01:34,582 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 00:01:34,583 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 00:01:34,584 INFO L396 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 00:01:34,589 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 00:01:34,590 INFO L85 PathProgramCache]: Analyzing trace with hash -1934366869, now seen corresponding path program 1 times [2024-11-24 00:01:34,598 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 00:01:34,599 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1047935328] [2024-11-24 00:01:34,599 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 00:01:34,600 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 00:01:34,847 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 00:01:35,118 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-11-24 00:01:35,120 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-24 00:01:35,123 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1047935328] [2024-11-24 00:01:35,124 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1047935328] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-24 00:01:35,124 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1585351198] [2024-11-24 00:01:35,124 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 00:01:35,124 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-24 00:01:35,124 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_328789b6-5d68-4a2f-beb0-52c77b3443fd/bin/uautomizer-verify-LYvppIcaGC/z3 [2024-11-24 00:01:35,130 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_328789b6-5d68-4a2f-beb0-52c77b3443fd/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-24 00:01:35,132 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_328789b6-5d68-4a2f-beb0-52c77b3443fd/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2024-11-24 00:01:35,623 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 00:01:35,629 INFO L256 TraceCheckSpWp]: Trace formula consists of 685 conjuncts, 1 conjuncts are in the unsatisfiable core [2024-11-24 00:01:35,638 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-24 00:01:35,677 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-11-24 00:01:35,677 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-11-24 00:01:35,678 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1585351198] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-24 00:01:35,678 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-11-24 00:01:35,678 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [2] total 2 [2024-11-24 00:01:35,681 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1346840100] [2024-11-24 00:01:35,682 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-24 00:01:35,688 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 2 states [2024-11-24 00:01:35,689 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-24 00:01:35,717 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2024-11-24 00:01:35,718 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2024-11-24 00:01:35,722 INFO L87 Difference]: Start difference. First operand has 392 states, 386 states have (on average 1.4922279792746114) internal successors, (576), 387 states have internal predecessors, (576), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Second operand has 2 states, 2 states have (on average 53.5) internal successors, (107), 2 states have internal predecessors, (107), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 2 states have call successors, (3) [2024-11-24 00:01:35,813 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 00:01:35,816 INFO L93 Difference]: Finished difference Result 711 states and 1061 transitions. [2024-11-24 00:01:35,817 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-11-24 00:01:35,819 INFO L78 Accepts]: Start accepts. Automaton has has 2 states, 2 states have (on average 53.5) internal successors, (107), 2 states have internal predecessors, (107), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 2 states have call successors, (3) Word has length 117 [2024-11-24 00:01:35,819 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 00:01:35,834 INFO L225 Difference]: With dead ends: 711 [2024-11-24 00:01:35,835 INFO L226 Difference]: Without dead ends: 389 [2024-11-24 00:01:35,840 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 118 GetRequests, 118 SyntacticMatches, 0 SemanticMatches, 0 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2024-11-24 00:01:35,846 INFO L435 NwaCegarLoop]: 577 mSDtfsCounter, 0 mSDsluCounter, 0 mSDsCounter, 0 mSdLazyCounter, 0 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 577 SdHoareTripleChecker+Invalid, 0 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 0 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-24 00:01:35,848 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 577 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 0 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-24 00:01:35,870 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 389 states. [2024-11-24 00:01:35,920 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 389 to 389. [2024-11-24 00:01:35,922 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 389 states, 384 states have (on average 1.4869791666666667) internal successors, (571), 384 states have internal predecessors, (571), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-24 00:01:35,928 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 389 states to 389 states and 577 transitions. [2024-11-24 00:01:35,931 INFO L78 Accepts]: Start accepts. Automaton has 389 states and 577 transitions. Word has length 117 [2024-11-24 00:01:35,931 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 00:01:35,931 INFO L471 AbstractCegarLoop]: Abstraction has 389 states and 577 transitions. [2024-11-24 00:01:35,932 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 2 states, 2 states have (on average 53.5) internal successors, (107), 2 states have internal predecessors, (107), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 2 states have call successors, (3) [2024-11-24 00:01:35,932 INFO L276 IsEmpty]: Start isEmpty. Operand 389 states and 577 transitions. [2024-11-24 00:01:35,935 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 118 [2024-11-24 00:01:35,936 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 00:01:35,936 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 00:01:35,949 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_328789b6-5d68-4a2f-beb0-52c77b3443fd/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Ended with exit code 0 [2024-11-24 00:01:36,137 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0,2 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_328789b6-5d68-4a2f-beb0-52c77b3443fd/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-24 00:01:36,138 INFO L396 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 00:01:36,138 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 00:01:36,139 INFO L85 PathProgramCache]: Analyzing trace with hash 504535717, now seen corresponding path program 1 times [2024-11-24 00:01:36,139 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 00:01:36,139 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1037758122] [2024-11-24 00:01:36,139 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 00:01:36,139 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 00:01:36,476 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 00:01:37,573 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-24 00:01:37,574 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-24 00:01:37,574 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1037758122] [2024-11-24 00:01:37,574 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1037758122] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-24 00:01:37,574 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-24 00:01:37,574 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-24 00:01:37,574 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [168630904] [2024-11-24 00:01:37,574 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-24 00:01:37,575 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-24 00:01:37,575 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-24 00:01:37,576 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-24 00:01:37,578 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-24 00:01:37,579 INFO L87 Difference]: Start difference. First operand 389 states and 577 transitions. Second operand has 4 states, 4 states have (on average 26.25) internal successors, (105), 4 states have internal predecessors, (105), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-24 00:01:37,648 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 00:01:37,652 INFO L93 Difference]: Finished difference Result 393 states and 581 transitions. [2024-11-24 00:01:37,653 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-24 00:01:37,656 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 26.25) internal successors, (105), 4 states have internal predecessors, (105), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 117 [2024-11-24 00:01:37,657 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 00:01:37,660 INFO L225 Difference]: With dead ends: 393 [2024-11-24 00:01:37,660 INFO L226 Difference]: Without dead ends: 391 [2024-11-24 00:01:37,661 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-24 00:01:37,666 INFO L435 NwaCegarLoop]: 575 mSDtfsCounter, 0 mSDsluCounter, 1144 mSDsCounter, 0 mSdLazyCounter, 11 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 1719 SdHoareTripleChecker+Invalid, 11 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 11 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-24 00:01:37,666 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 1719 Invalid, 11 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 11 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-24 00:01:37,667 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 391 states. [2024-11-24 00:01:37,692 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 391 to 391. [2024-11-24 00:01:37,693 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 391 states, 386 states have (on average 1.4844559585492227) internal successors, (573), 386 states have internal predecessors, (573), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-24 00:01:37,695 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 391 states to 391 states and 579 transitions. [2024-11-24 00:01:37,696 INFO L78 Accepts]: Start accepts. Automaton has 391 states and 579 transitions. Word has length 117 [2024-11-24 00:01:37,697 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 00:01:37,697 INFO L471 AbstractCegarLoop]: Abstraction has 391 states and 579 transitions. [2024-11-24 00:01:37,698 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 26.25) internal successors, (105), 4 states have internal predecessors, (105), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-24 00:01:37,698 INFO L276 IsEmpty]: Start isEmpty. Operand 391 states and 579 transitions. [2024-11-24 00:01:37,700 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 119 [2024-11-24 00:01:37,700 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 00:01:37,701 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 00:01:37,701 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2024-11-24 00:01:37,701 INFO L396 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 00:01:37,702 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 00:01:37,702 INFO L85 PathProgramCache]: Analyzing trace with hash -1537566187, now seen corresponding path program 1 times [2024-11-24 00:01:37,702 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 00:01:37,702 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1859589972] [2024-11-24 00:01:37,702 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 00:01:37,703 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 00:01:37,883 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 00:01:38,432 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-24 00:01:38,432 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-24 00:01:38,432 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1859589972] [2024-11-24 00:01:38,433 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1859589972] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-24 00:01:38,433 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-24 00:01:38,433 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-24 00:01:38,433 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [60701974] [2024-11-24 00:01:38,433 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-24 00:01:38,433 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-24 00:01:38,434 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-24 00:01:38,434 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-24 00:01:38,434 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-11-24 00:01:38,435 INFO L87 Difference]: Start difference. First operand 391 states and 579 transitions. Second operand has 5 states, 5 states have (on average 21.2) internal successors, (106), 5 states have internal predecessors, (106), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-24 00:01:39,075 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 00:01:39,075 INFO L93 Difference]: Finished difference Result 971 states and 1441 transitions. [2024-11-24 00:01:39,076 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-24 00:01:39,076 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 21.2) internal successors, (106), 5 states have internal predecessors, (106), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 118 [2024-11-24 00:01:39,077 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 00:01:39,079 INFO L225 Difference]: With dead ends: 971 [2024-11-24 00:01:39,082 INFO L226 Difference]: Without dead ends: 391 [2024-11-24 00:01:39,084 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2024-11-24 00:01:39,088 INFO L435 NwaCegarLoop]: 629 mSDtfsCounter, 1090 mSDsluCounter, 1058 mSDsCounter, 0 mSdLazyCounter, 246 mSolverCounterSat, 29 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1090 SdHoareTripleChecker+Valid, 1687 SdHoareTripleChecker+Invalid, 275 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 29 IncrementalHoareTripleChecker+Valid, 246 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2024-11-24 00:01:39,089 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1090 Valid, 1687 Invalid, 275 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [29 Valid, 246 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2024-11-24 00:01:39,090 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 391 states. [2024-11-24 00:01:39,113 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 391 to 391. [2024-11-24 00:01:39,114 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 391 states, 386 states have (on average 1.4818652849740932) internal successors, (572), 386 states have internal predecessors, (572), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-24 00:01:39,119 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 391 states to 391 states and 578 transitions. [2024-11-24 00:01:39,120 INFO L78 Accepts]: Start accepts. Automaton has 391 states and 578 transitions. Word has length 118 [2024-11-24 00:01:39,120 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 00:01:39,124 INFO L471 AbstractCegarLoop]: Abstraction has 391 states and 578 transitions. [2024-11-24 00:01:39,124 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 21.2) internal successors, (106), 5 states have internal predecessors, (106), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-24 00:01:39,125 INFO L276 IsEmpty]: Start isEmpty. Operand 391 states and 578 transitions. [2024-11-24 00:01:39,127 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 120 [2024-11-24 00:01:39,127 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 00:01:39,127 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 00:01:39,127 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2024-11-24 00:01:39,128 INFO L396 AbstractCegarLoop]: === Iteration 4 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 00:01:39,132 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 00:01:39,132 INFO L85 PathProgramCache]: Analyzing trace with hash 930225119, now seen corresponding path program 1 times [2024-11-24 00:01:39,132 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 00:01:39,132 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1958146020] [2024-11-24 00:01:39,132 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 00:01:39,132 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 00:01:39,264 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 00:01:39,732 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-24 00:01:39,733 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-24 00:01:39,733 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1958146020] [2024-11-24 00:01:39,734 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1958146020] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-24 00:01:39,734 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-24 00:01:39,734 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-24 00:01:39,734 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [553731782] [2024-11-24 00:01:39,734 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-24 00:01:39,735 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-24 00:01:39,736 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-24 00:01:39,738 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-24 00:01:39,738 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-24 00:01:39,738 INFO L87 Difference]: Start difference. First operand 391 states and 578 transitions. Second operand has 4 states, 4 states have (on average 26.75) internal successors, (107), 4 states have internal predecessors, (107), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-24 00:01:39,811 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 00:01:39,812 INFO L93 Difference]: Finished difference Result 714 states and 1055 transitions. [2024-11-24 00:01:39,812 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-24 00:01:39,813 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 26.75) internal successors, (107), 4 states have internal predecessors, (107), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 119 [2024-11-24 00:01:39,814 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 00:01:39,817 INFO L225 Difference]: With dead ends: 714 [2024-11-24 00:01:39,817 INFO L226 Difference]: Without dead ends: 393 [2024-11-24 00:01:39,818 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-24 00:01:39,819 INFO L435 NwaCegarLoop]: 574 mSDtfsCounter, 0 mSDsluCounter, 1138 mSDsCounter, 0 mSdLazyCounter, 15 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 1712 SdHoareTripleChecker+Invalid, 15 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 15 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-24 00:01:39,820 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 1712 Invalid, 15 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 15 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-24 00:01:39,825 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 393 states. [2024-11-24 00:01:39,836 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 393 to 393. [2024-11-24 00:01:39,838 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 393 states, 388 states have (on average 1.4793814432989691) internal successors, (574), 388 states have internal predecessors, (574), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-24 00:01:39,842 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 393 states to 393 states and 580 transitions. [2024-11-24 00:01:39,842 INFO L78 Accepts]: Start accepts. Automaton has 393 states and 580 transitions. Word has length 119 [2024-11-24 00:01:39,843 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 00:01:39,844 INFO L471 AbstractCegarLoop]: Abstraction has 393 states and 580 transitions. [2024-11-24 00:01:39,844 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 26.75) internal successors, (107), 4 states have internal predecessors, (107), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-24 00:01:39,844 INFO L276 IsEmpty]: Start isEmpty. Operand 393 states and 580 transitions. [2024-11-24 00:01:39,846 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 121 [2024-11-24 00:01:39,848 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 00:01:39,848 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 00:01:39,848 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3 [2024-11-24 00:01:39,848 INFO L396 AbstractCegarLoop]: === Iteration 5 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 00:01:39,849 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 00:01:39,850 INFO L85 PathProgramCache]: Analyzing trace with hash 1969209588, now seen corresponding path program 1 times [2024-11-24 00:01:39,850 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 00:01:39,850 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [211889457] [2024-11-24 00:01:39,851 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 00:01:39,851 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 00:01:40,027 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 00:01:40,781 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-24 00:01:40,783 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-24 00:01:40,783 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [211889457] [2024-11-24 00:01:40,785 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [211889457] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-24 00:01:40,785 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-24 00:01:40,785 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-24 00:01:40,785 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [481964175] [2024-11-24 00:01:40,785 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-24 00:01:40,786 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-24 00:01:40,786 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-24 00:01:40,787 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-24 00:01:40,787 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-24 00:01:40,787 INFO L87 Difference]: Start difference. First operand 393 states and 580 transitions. Second operand has 4 states, 4 states have (on average 27.0) internal successors, (108), 4 states have internal predecessors, (108), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-24 00:01:40,980 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 00:01:40,980 INFO L93 Difference]: Finished difference Result 716 states and 1056 transitions. [2024-11-24 00:01:40,981 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-24 00:01:40,981 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 27.0) internal successors, (108), 4 states have internal predecessors, (108), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 120 [2024-11-24 00:01:40,982 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 00:01:40,984 INFO L225 Difference]: With dead ends: 716 [2024-11-24 00:01:40,984 INFO L226 Difference]: Without dead ends: 393 [2024-11-24 00:01:40,985 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-11-24 00:01:40,986 INFO L435 NwaCegarLoop]: 534 mSDtfsCounter, 484 mSDsluCounter, 536 mSDsCounter, 0 mSdLazyCounter, 84 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 484 SdHoareTripleChecker+Valid, 1070 SdHoareTripleChecker+Invalid, 84 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 84 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-24 00:01:40,986 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [484 Valid, 1070 Invalid, 84 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 84 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-24 00:01:40,988 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 393 states. [2024-11-24 00:01:40,999 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 393 to 393. [2024-11-24 00:01:41,000 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 393 states, 388 states have (on average 1.4768041237113403) internal successors, (573), 388 states have internal predecessors, (573), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-24 00:01:41,003 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 393 states to 393 states and 579 transitions. [2024-11-24 00:01:41,003 INFO L78 Accepts]: Start accepts. Automaton has 393 states and 579 transitions. Word has length 120 [2024-11-24 00:01:41,004 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 00:01:41,004 INFO L471 AbstractCegarLoop]: Abstraction has 393 states and 579 transitions. [2024-11-24 00:01:41,004 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 27.0) internal successors, (108), 4 states have internal predecessors, (108), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-24 00:01:41,004 INFO L276 IsEmpty]: Start isEmpty. Operand 393 states and 579 transitions. [2024-11-24 00:01:41,006 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 122 [2024-11-24 00:01:41,006 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 00:01:41,006 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 00:01:41,007 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4 [2024-11-24 00:01:41,007 INFO L396 AbstractCegarLoop]: === Iteration 6 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 00:01:41,008 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 00:01:41,009 INFO L85 PathProgramCache]: Analyzing trace with hash -2133916823, now seen corresponding path program 1 times [2024-11-24 00:01:41,010 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 00:01:41,010 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1422705572] [2024-11-24 00:01:41,010 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 00:01:41,010 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 00:01:41,166 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 00:01:41,628 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-24 00:01:41,629 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-24 00:01:41,629 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1422705572] [2024-11-24 00:01:41,630 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1422705572] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-24 00:01:41,630 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-24 00:01:41,630 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-24 00:01:41,630 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1946999810] [2024-11-24 00:01:41,630 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-24 00:01:41,631 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-24 00:01:41,634 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-24 00:01:41,635 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-24 00:01:41,635 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-24 00:01:41,635 INFO L87 Difference]: Start difference. First operand 393 states and 579 transitions. Second operand has 5 states, 5 states have (on average 21.8) internal successors, (109), 5 states have internal predecessors, (109), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-24 00:01:41,800 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 00:01:41,801 INFO L93 Difference]: Finished difference Result 716 states and 1054 transitions. [2024-11-24 00:01:41,801 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-24 00:01:41,801 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 21.8) internal successors, (109), 5 states have internal predecessors, (109), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 121 [2024-11-24 00:01:41,802 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 00:01:41,804 INFO L225 Difference]: With dead ends: 716 [2024-11-24 00:01:41,804 INFO L226 Difference]: Without dead ends: 393 [2024-11-24 00:01:41,805 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-11-24 00:01:41,806 INFO L435 NwaCegarLoop]: 534 mSDtfsCounter, 1041 mSDsluCounter, 536 mSDsCounter, 0 mSdLazyCounter, 82 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1044 SdHoareTripleChecker+Valid, 1070 SdHoareTripleChecker+Invalid, 83 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 82 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-24 00:01:41,806 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1044 Valid, 1070 Invalid, 83 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 82 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-24 00:01:41,807 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 393 states. [2024-11-24 00:01:41,818 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 393 to 393. [2024-11-24 00:01:41,819 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 393 states, 388 states have (on average 1.4742268041237114) internal successors, (572), 388 states have internal predecessors, (572), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-24 00:01:41,821 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 393 states to 393 states and 578 transitions. [2024-11-24 00:01:41,822 INFO L78 Accepts]: Start accepts. Automaton has 393 states and 578 transitions. Word has length 121 [2024-11-24 00:01:41,822 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 00:01:41,822 INFO L471 AbstractCegarLoop]: Abstraction has 393 states and 578 transitions. [2024-11-24 00:01:41,822 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 21.8) internal successors, (109), 5 states have internal predecessors, (109), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-24 00:01:41,823 INFO L276 IsEmpty]: Start isEmpty. Operand 393 states and 578 transitions. [2024-11-24 00:01:41,824 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 123 [2024-11-24 00:01:41,824 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 00:01:41,824 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 00:01:41,824 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5 [2024-11-24 00:01:41,825 INFO L396 AbstractCegarLoop]: === Iteration 7 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 00:01:41,825 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 00:01:41,825 INFO L85 PathProgramCache]: Analyzing trace with hash 728541133, now seen corresponding path program 1 times [2024-11-24 00:01:41,825 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 00:01:41,826 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1724837492] [2024-11-24 00:01:41,826 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 00:01:41,826 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 00:01:41,929 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 00:01:42,307 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-24 00:01:42,308 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-24 00:01:42,308 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1724837492] [2024-11-24 00:01:42,308 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1724837492] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-24 00:01:42,308 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-24 00:01:42,308 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-24 00:01:42,309 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1429673542] [2024-11-24 00:01:42,309 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-24 00:01:42,309 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-24 00:01:42,309 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-24 00:01:42,310 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-24 00:01:42,310 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-24 00:01:42,310 INFO L87 Difference]: Start difference. First operand 393 states and 578 transitions. Second operand has 5 states, 5 states have (on average 22.0) internal successors, (110), 5 states have internal predecessors, (110), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-24 00:01:42,479 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 00:01:42,479 INFO L93 Difference]: Finished difference Result 716 states and 1052 transitions. [2024-11-24 00:01:42,480 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-24 00:01:42,480 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 22.0) internal successors, (110), 5 states have internal predecessors, (110), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 122 [2024-11-24 00:01:42,481 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 00:01:42,482 INFO L225 Difference]: With dead ends: 716 [2024-11-24 00:01:42,482 INFO L226 Difference]: Without dead ends: 393 [2024-11-24 00:01:42,486 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-11-24 00:01:42,487 INFO L435 NwaCegarLoop]: 534 mSDtfsCounter, 559 mSDsluCounter, 543 mSDsCounter, 0 mSdLazyCounter, 80 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 562 SdHoareTripleChecker+Valid, 1077 SdHoareTripleChecker+Invalid, 81 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 80 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-24 00:01:42,487 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [562 Valid, 1077 Invalid, 81 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 80 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-24 00:01:42,491 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 393 states. [2024-11-24 00:01:42,508 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 393 to 393. [2024-11-24 00:01:42,512 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 393 states, 388 states have (on average 1.4716494845360826) internal successors, (571), 388 states have internal predecessors, (571), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-24 00:01:42,515 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 393 states to 393 states and 577 transitions. [2024-11-24 00:01:42,517 INFO L78 Accepts]: Start accepts. Automaton has 393 states and 577 transitions. Word has length 122 [2024-11-24 00:01:42,518 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 00:01:42,518 INFO L471 AbstractCegarLoop]: Abstraction has 393 states and 577 transitions. [2024-11-24 00:01:42,518 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 22.0) internal successors, (110), 5 states have internal predecessors, (110), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-24 00:01:42,519 INFO L276 IsEmpty]: Start isEmpty. Operand 393 states and 577 transitions. [2024-11-24 00:01:42,520 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 124 [2024-11-24 00:01:42,520 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 00:01:42,520 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 00:01:42,521 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6 [2024-11-24 00:01:42,521 INFO L396 AbstractCegarLoop]: === Iteration 8 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 00:01:42,522 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 00:01:42,522 INFO L85 PathProgramCache]: Analyzing trace with hash 187884130, now seen corresponding path program 1 times [2024-11-24 00:01:42,522 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 00:01:42,522 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2110775843] [2024-11-24 00:01:42,523 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 00:01:42,523 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 00:01:42,641 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 00:01:42,975 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-24 00:01:42,976 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-24 00:01:42,976 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2110775843] [2024-11-24 00:01:42,976 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2110775843] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-24 00:01:42,976 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-24 00:01:42,977 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-24 00:01:42,977 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1555304568] [2024-11-24 00:01:42,977 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-24 00:01:42,977 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-24 00:01:42,977 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-24 00:01:42,978 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-24 00:01:42,978 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-24 00:01:42,978 INFO L87 Difference]: Start difference. First operand 393 states and 577 transitions. Second operand has 5 states, 5 states have (on average 22.2) internal successors, (111), 5 states have internal predecessors, (111), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-24 00:01:43,141 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 00:01:43,142 INFO L93 Difference]: Finished difference Result 716 states and 1050 transitions. [2024-11-24 00:01:43,142 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-24 00:01:43,143 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 22.2) internal successors, (111), 5 states have internal predecessors, (111), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 123 [2024-11-24 00:01:43,143 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 00:01:43,145 INFO L225 Difference]: With dead ends: 716 [2024-11-24 00:01:43,145 INFO L226 Difference]: Without dead ends: 393 [2024-11-24 00:01:43,146 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-11-24 00:01:43,147 INFO L435 NwaCegarLoop]: 534 mSDtfsCounter, 1025 mSDsluCounter, 536 mSDsCounter, 0 mSdLazyCounter, 78 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1028 SdHoareTripleChecker+Valid, 1070 SdHoareTripleChecker+Invalid, 79 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 78 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-24 00:01:43,147 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1028 Valid, 1070 Invalid, 79 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 78 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-24 00:01:43,149 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 393 states. [2024-11-24 00:01:43,162 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 393 to 393. [2024-11-24 00:01:43,163 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 393 states, 388 states have (on average 1.4690721649484537) internal successors, (570), 388 states have internal predecessors, (570), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-24 00:01:43,165 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 393 states to 393 states and 576 transitions. [2024-11-24 00:01:43,167 INFO L78 Accepts]: Start accepts. Automaton has 393 states and 576 transitions. Word has length 123 [2024-11-24 00:01:43,168 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 00:01:43,168 INFO L471 AbstractCegarLoop]: Abstraction has 393 states and 576 transitions. [2024-11-24 00:01:43,168 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 22.2) internal successors, (111), 5 states have internal predecessors, (111), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-24 00:01:43,168 INFO L276 IsEmpty]: Start isEmpty. Operand 393 states and 576 transitions. [2024-11-24 00:01:43,170 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 125 [2024-11-24 00:01:43,170 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 00:01:43,171 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 00:01:43,171 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7 [2024-11-24 00:01:43,171 INFO L396 AbstractCegarLoop]: === Iteration 9 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 00:01:43,172 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 00:01:43,172 INFO L85 PathProgramCache]: Analyzing trace with hash 358061862, now seen corresponding path program 1 times [2024-11-24 00:01:43,172 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 00:01:43,173 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [811777579] [2024-11-24 00:01:43,173 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 00:01:43,176 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 00:01:43,326 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 00:01:43,791 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-24 00:01:43,793 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-24 00:01:43,793 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [811777579] [2024-11-24 00:01:43,793 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [811777579] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-24 00:01:43,793 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-24 00:01:43,794 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-24 00:01:43,794 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2053430185] [2024-11-24 00:01:43,794 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-24 00:01:43,794 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-24 00:01:43,794 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-24 00:01:43,795 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-24 00:01:43,795 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-24 00:01:43,796 INFO L87 Difference]: Start difference. First operand 393 states and 576 transitions. Second operand has 4 states, 4 states have (on average 28.0) internal successors, (112), 4 states have internal predecessors, (112), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-24 00:01:43,947 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 00:01:43,947 INFO L93 Difference]: Finished difference Result 715 states and 1047 transitions. [2024-11-24 00:01:43,948 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-24 00:01:43,948 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 28.0) internal successors, (112), 4 states have internal predecessors, (112), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 124 [2024-11-24 00:01:43,949 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 00:01:43,950 INFO L225 Difference]: With dead ends: 715 [2024-11-24 00:01:43,951 INFO L226 Difference]: Without dead ends: 392 [2024-11-24 00:01:43,951 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-11-24 00:01:43,952 INFO L435 NwaCegarLoop]: 550 mSDtfsCounter, 479 mSDsluCounter, 552 mSDsCounter, 0 mSdLazyCounter, 41 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 479 SdHoareTripleChecker+Valid, 1102 SdHoareTripleChecker+Invalid, 42 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 41 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-24 00:01:43,952 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [479 Valid, 1102 Invalid, 42 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 41 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-24 00:01:43,953 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 392 states. [2024-11-24 00:01:43,964 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 392 to 392. [2024-11-24 00:01:43,965 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 392 states, 387 states have (on average 1.4651162790697674) internal successors, (567), 387 states have internal predecessors, (567), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-24 00:01:43,967 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 392 states to 392 states and 573 transitions. [2024-11-24 00:01:43,968 INFO L78 Accepts]: Start accepts. Automaton has 392 states and 573 transitions. Word has length 124 [2024-11-24 00:01:43,968 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 00:01:43,968 INFO L471 AbstractCegarLoop]: Abstraction has 392 states and 573 transitions. [2024-11-24 00:01:43,968 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 28.0) internal successors, (112), 4 states have internal predecessors, (112), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-24 00:01:43,968 INFO L276 IsEmpty]: Start isEmpty. Operand 392 states and 573 transitions. [2024-11-24 00:01:43,970 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 126 [2024-11-24 00:01:43,970 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 00:01:43,970 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 00:01:43,970 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8 [2024-11-24 00:01:43,970 INFO L396 AbstractCegarLoop]: === Iteration 10 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 00:01:43,971 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 00:01:43,971 INFO L85 PathProgramCache]: Analyzing trace with hash 1647365538, now seen corresponding path program 1 times [2024-11-24 00:01:43,971 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 00:01:43,971 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [871133409] [2024-11-24 00:01:43,971 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 00:01:43,971 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 00:01:44,080 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 00:01:44,397 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-24 00:01:44,397 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-24 00:01:44,397 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [871133409] [2024-11-24 00:01:44,397 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [871133409] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-24 00:01:44,398 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-24 00:01:44,398 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-24 00:01:44,398 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1755606834] [2024-11-24 00:01:44,398 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-24 00:01:44,398 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-24 00:01:44,398 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-24 00:01:44,399 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-24 00:01:44,399 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-11-24 00:01:44,399 INFO L87 Difference]: Start difference. First operand 392 states and 573 transitions. Second operand has 5 states, 5 states have (on average 22.6) internal successors, (113), 5 states have internal predecessors, (113), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-24 00:01:44,504 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 00:01:44,504 INFO L93 Difference]: Finished difference Result 716 states and 1044 transitions. [2024-11-24 00:01:44,505 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-11-24 00:01:44,505 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 22.6) internal successors, (113), 5 states have internal predecessors, (113), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 125 [2024-11-24 00:01:44,505 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 00:01:44,507 INFO L225 Difference]: With dead ends: 716 [2024-11-24 00:01:44,507 INFO L226 Difference]: Without dead ends: 392 [2024-11-24 00:01:44,508 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2024-11-24 00:01:44,511 INFO L435 NwaCegarLoop]: 562 mSDtfsCounter, 483 mSDsluCounter, 1116 mSDsCounter, 0 mSdLazyCounter, 32 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 483 SdHoareTripleChecker+Valid, 1678 SdHoareTripleChecker+Invalid, 32 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 32 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-24 00:01:44,512 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [483 Valid, 1678 Invalid, 32 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 32 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-24 00:01:44,514 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 392 states. [2024-11-24 00:01:44,524 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 392 to 392. [2024-11-24 00:01:44,525 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 392 states, 387 states have (on average 1.4625322997416021) internal successors, (566), 387 states have internal predecessors, (566), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-24 00:01:44,528 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 392 states to 392 states and 572 transitions. [2024-11-24 00:01:44,528 INFO L78 Accepts]: Start accepts. Automaton has 392 states and 572 transitions. Word has length 125 [2024-11-24 00:01:44,528 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 00:01:44,529 INFO L471 AbstractCegarLoop]: Abstraction has 392 states and 572 transitions. [2024-11-24 00:01:44,529 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 22.6) internal successors, (113), 5 states have internal predecessors, (113), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-24 00:01:44,529 INFO L276 IsEmpty]: Start isEmpty. Operand 392 states and 572 transitions. [2024-11-24 00:01:44,531 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 127 [2024-11-24 00:01:44,534 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 00:01:44,534 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 00:01:44,535 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable9 [2024-11-24 00:01:44,535 INFO L396 AbstractCegarLoop]: === Iteration 11 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 00:01:44,535 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 00:01:44,535 INFO L85 PathProgramCache]: Analyzing trace with hash 278777535, now seen corresponding path program 1 times [2024-11-24 00:01:44,535 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 00:01:44,535 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1511985602] [2024-11-24 00:01:44,535 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 00:01:44,535 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 00:01:44,674 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 00:01:45,077 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-24 00:01:45,077 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-24 00:01:45,077 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1511985602] [2024-11-24 00:01:45,077 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1511985602] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-24 00:01:45,077 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-24 00:01:45,077 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-24 00:01:45,078 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1029566276] [2024-11-24 00:01:45,078 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-24 00:01:45,078 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-24 00:01:45,078 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-24 00:01:45,079 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-24 00:01:45,079 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-24 00:01:45,079 INFO L87 Difference]: Start difference. First operand 392 states and 572 transitions. Second operand has 4 states, 4 states have (on average 28.5) internal successors, (114), 4 states have internal predecessors, (114), 2 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2024-11-24 00:01:45,176 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 00:01:45,176 INFO L93 Difference]: Finished difference Result 714 states and 1040 transitions. [2024-11-24 00:01:45,177 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-24 00:01:45,177 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 28.5) internal successors, (114), 4 states have internal predecessors, (114), 2 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 126 [2024-11-24 00:01:45,177 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 00:01:45,179 INFO L225 Difference]: With dead ends: 714 [2024-11-24 00:01:45,179 INFO L226 Difference]: Without dead ends: 392 [2024-11-24 00:01:45,180 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-11-24 00:01:45,181 INFO L435 NwaCegarLoop]: 552 mSDtfsCounter, 517 mSDsluCounter, 554 mSDsCounter, 0 mSdLazyCounter, 32 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 519 SdHoareTripleChecker+Valid, 1106 SdHoareTripleChecker+Invalid, 32 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 32 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-24 00:01:45,181 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [519 Valid, 1106 Invalid, 32 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 32 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-24 00:01:45,183 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 392 states. [2024-11-24 00:01:45,194 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 392 to 392. [2024-11-24 00:01:45,195 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 392 states, 387 states have (on average 1.4599483204134367) internal successors, (565), 387 states have internal predecessors, (565), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-24 00:01:45,198 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 392 states to 392 states and 571 transitions. [2024-11-24 00:01:45,198 INFO L78 Accepts]: Start accepts. Automaton has 392 states and 571 transitions. Word has length 126 [2024-11-24 00:01:45,198 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 00:01:45,198 INFO L471 AbstractCegarLoop]: Abstraction has 392 states and 571 transitions. [2024-11-24 00:01:45,199 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 28.5) internal successors, (114), 4 states have internal predecessors, (114), 2 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2024-11-24 00:01:45,199 INFO L276 IsEmpty]: Start isEmpty. Operand 392 states and 571 transitions. [2024-11-24 00:01:45,201 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 128 [2024-11-24 00:01:45,201 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 00:01:45,201 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 00:01:45,201 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable10 [2024-11-24 00:01:45,202 INFO L396 AbstractCegarLoop]: === Iteration 12 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 00:01:45,202 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 00:01:45,202 INFO L85 PathProgramCache]: Analyzing trace with hash -1200047413, now seen corresponding path program 1 times [2024-11-24 00:01:45,202 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 00:01:45,203 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [641763554] [2024-11-24 00:01:45,203 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 00:01:45,203 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 00:01:45,448 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 00:01:45,908 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-24 00:01:45,908 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-24 00:01:45,908 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [641763554] [2024-11-24 00:01:45,908 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [641763554] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-24 00:01:45,908 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-24 00:01:45,908 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-24 00:01:45,909 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [129659904] [2024-11-24 00:01:45,909 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-24 00:01:45,909 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-24 00:01:45,909 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-24 00:01:45,910 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-24 00:01:45,910 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-24 00:01:45,910 INFO L87 Difference]: Start difference. First operand 392 states and 571 transitions. Second operand has 5 states, 5 states have (on average 23.0) internal successors, (115), 5 states have internal predecessors, (115), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-24 00:01:46,079 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 00:01:46,079 INFO L93 Difference]: Finished difference Result 714 states and 1038 transitions. [2024-11-24 00:01:46,080 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-24 00:01:46,080 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 23.0) internal successors, (115), 5 states have internal predecessors, (115), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 127 [2024-11-24 00:01:46,081 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 00:01:46,082 INFO L225 Difference]: With dead ends: 714 [2024-11-24 00:01:46,082 INFO L226 Difference]: Without dead ends: 392 [2024-11-24 00:01:46,085 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-11-24 00:01:46,085 INFO L435 NwaCegarLoop]: 529 mSDtfsCounter, 473 mSDsluCounter, 531 mSDsCounter, 0 mSdLazyCounter, 76 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 473 SdHoareTripleChecker+Valid, 1060 SdHoareTripleChecker+Invalid, 76 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 76 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-24 00:01:46,086 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [473 Valid, 1060 Invalid, 76 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 76 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-24 00:01:46,087 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 392 states. [2024-11-24 00:01:46,099 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 392 to 392. [2024-11-24 00:01:46,100 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 392 states, 387 states have (on average 1.4573643410852712) internal successors, (564), 387 states have internal predecessors, (564), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-24 00:01:46,102 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 392 states to 392 states and 570 transitions. [2024-11-24 00:01:46,103 INFO L78 Accepts]: Start accepts. Automaton has 392 states and 570 transitions. Word has length 127 [2024-11-24 00:01:46,103 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 00:01:46,103 INFO L471 AbstractCegarLoop]: Abstraction has 392 states and 570 transitions. [2024-11-24 00:01:46,104 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 23.0) internal successors, (115), 5 states have internal predecessors, (115), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-24 00:01:46,104 INFO L276 IsEmpty]: Start isEmpty. Operand 392 states and 570 transitions. [2024-11-24 00:01:46,106 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 129 [2024-11-24 00:01:46,106 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 00:01:46,106 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 00:01:46,106 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable11 [2024-11-24 00:01:46,106 INFO L396 AbstractCegarLoop]: === Iteration 13 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 00:01:46,107 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 00:01:46,107 INFO L85 PathProgramCache]: Analyzing trace with hash 425636825, now seen corresponding path program 1 times [2024-11-24 00:01:46,107 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 00:01:46,107 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [672844151] [2024-11-24 00:01:46,107 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 00:01:46,108 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 00:01:46,332 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 00:01:47,012 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-24 00:01:47,012 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-24 00:01:47,012 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [672844151] [2024-11-24 00:01:47,012 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [672844151] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-24 00:01:47,012 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-24 00:01:47,012 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-24 00:01:47,013 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [724695561] [2024-11-24 00:01:47,013 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-24 00:01:47,013 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-24 00:01:47,013 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-24 00:01:47,014 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-24 00:01:47,014 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-11-24 00:01:47,015 INFO L87 Difference]: Start difference. First operand 392 states and 570 transitions. Second operand has 5 states, 5 states have (on average 23.2) internal successors, (116), 5 states have internal predecessors, (116), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-24 00:01:47,418 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 00:01:47,420 INFO L93 Difference]: Finished difference Result 720 states and 1044 transitions. [2024-11-24 00:01:47,421 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-11-24 00:01:47,421 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 23.2) internal successors, (116), 5 states have internal predecessors, (116), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 128 [2024-11-24 00:01:47,421 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 00:01:47,424 INFO L225 Difference]: With dead ends: 720 [2024-11-24 00:01:47,424 INFO L226 Difference]: Without dead ends: 396 [2024-11-24 00:01:47,424 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-11-24 00:01:47,425 INFO L435 NwaCegarLoop]: 560 mSDtfsCounter, 2 mSDsluCounter, 1527 mSDsCounter, 0 mSdLazyCounter, 176 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2 SdHoareTripleChecker+Valid, 2087 SdHoareTripleChecker+Invalid, 176 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 176 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2024-11-24 00:01:47,425 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2 Valid, 2087 Invalid, 176 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 176 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2024-11-24 00:01:47,427 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 396 states. [2024-11-24 00:01:47,438 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 396 to 394. [2024-11-24 00:01:47,440 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 394 states, 389 states have (on average 1.455012853470437) internal successors, (566), 389 states have internal predecessors, (566), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-24 00:01:47,442 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 394 states to 394 states and 572 transitions. [2024-11-24 00:01:47,443 INFO L78 Accepts]: Start accepts. Automaton has 394 states and 572 transitions. Word has length 128 [2024-11-24 00:01:47,443 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 00:01:47,444 INFO L471 AbstractCegarLoop]: Abstraction has 394 states and 572 transitions. [2024-11-24 00:01:47,444 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 23.2) internal successors, (116), 5 states have internal predecessors, (116), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-24 00:01:47,444 INFO L276 IsEmpty]: Start isEmpty. Operand 394 states and 572 transitions. [2024-11-24 00:01:47,445 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 130 [2024-11-24 00:01:47,446 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 00:01:47,446 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 00:01:47,446 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable12 [2024-11-24 00:01:47,446 INFO L396 AbstractCegarLoop]: === Iteration 14 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 00:01:47,447 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 00:01:47,447 INFO L85 PathProgramCache]: Analyzing trace with hash 1268912814, now seen corresponding path program 1 times [2024-11-24 00:01:47,447 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 00:01:47,447 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [369476987] [2024-11-24 00:01:47,447 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 00:01:47,447 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 00:01:47,657 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 00:01:48,166 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-24 00:01:48,166 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-24 00:01:48,166 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [369476987] [2024-11-24 00:01:48,166 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [369476987] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-24 00:01:48,166 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-24 00:01:48,166 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-24 00:01:48,166 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2041639163] [2024-11-24 00:01:48,166 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-24 00:01:48,167 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-24 00:01:48,167 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-24 00:01:48,168 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-24 00:01:48,168 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-24 00:01:48,168 INFO L87 Difference]: Start difference. First operand 394 states and 572 transitions. Second operand has 5 states, 5 states have (on average 23.4) internal successors, (117), 5 states have internal predecessors, (117), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-24 00:01:48,355 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 00:01:48,355 INFO L93 Difference]: Finished difference Result 718 states and 1040 transitions. [2024-11-24 00:01:48,356 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-24 00:01:48,356 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 23.4) internal successors, (117), 5 states have internal predecessors, (117), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 129 [2024-11-24 00:01:48,356 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 00:01:48,358 INFO L225 Difference]: With dead ends: 718 [2024-11-24 00:01:48,358 INFO L226 Difference]: Without dead ends: 394 [2024-11-24 00:01:48,359 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-11-24 00:01:48,359 INFO L435 NwaCegarLoop]: 529 mSDtfsCounter, 468 mSDsluCounter, 538 mSDsCounter, 0 mSdLazyCounter, 74 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 468 SdHoareTripleChecker+Valid, 1067 SdHoareTripleChecker+Invalid, 74 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 74 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-24 00:01:48,360 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [468 Valid, 1067 Invalid, 74 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 74 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-24 00:01:48,361 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 394 states. [2024-11-24 00:01:48,372 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 394 to 394. [2024-11-24 00:01:48,373 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 394 states, 389 states have (on average 1.4524421593830334) internal successors, (565), 389 states have internal predecessors, (565), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-24 00:01:48,375 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 394 states to 394 states and 571 transitions. [2024-11-24 00:01:48,375 INFO L78 Accepts]: Start accepts. Automaton has 394 states and 571 transitions. Word has length 129 [2024-11-24 00:01:48,375 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 00:01:48,376 INFO L471 AbstractCegarLoop]: Abstraction has 394 states and 571 transitions. [2024-11-24 00:01:48,376 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 23.4) internal successors, (117), 5 states have internal predecessors, (117), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-24 00:01:48,376 INFO L276 IsEmpty]: Start isEmpty. Operand 394 states and 571 transitions. [2024-11-24 00:01:48,377 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 131 [2024-11-24 00:01:48,377 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 00:01:48,377 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 00:01:48,378 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable13 [2024-11-24 00:01:48,378 INFO L396 AbstractCegarLoop]: === Iteration 15 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 00:01:48,378 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 00:01:48,378 INFO L85 PathProgramCache]: Analyzing trace with hash 507470039, now seen corresponding path program 1 times [2024-11-24 00:01:48,378 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 00:01:48,378 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1721159048] [2024-11-24 00:01:48,378 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 00:01:48,379 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 00:01:48,526 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 00:01:48,953 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-24 00:01:48,953 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-24 00:01:48,953 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1721159048] [2024-11-24 00:01:48,954 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1721159048] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-24 00:01:48,954 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-24 00:01:48,954 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-24 00:01:48,954 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1956339923] [2024-11-24 00:01:48,954 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-24 00:01:48,954 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-24 00:01:48,954 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-24 00:01:48,955 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-24 00:01:48,955 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-24 00:01:48,955 INFO L87 Difference]: Start difference. First operand 394 states and 571 transitions. Second operand has 5 states, 5 states have (on average 23.6) internal successors, (118), 5 states have internal predecessors, (118), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-24 00:01:49,158 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 00:01:49,159 INFO L93 Difference]: Finished difference Result 718 states and 1038 transitions. [2024-11-24 00:01:49,159 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-24 00:01:49,159 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 23.6) internal successors, (118), 5 states have internal predecessors, (118), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 130 [2024-11-24 00:01:49,160 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 00:01:49,162 INFO L225 Difference]: With dead ends: 718 [2024-11-24 00:01:49,162 INFO L226 Difference]: Without dead ends: 394 [2024-11-24 00:01:49,162 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-11-24 00:01:49,163 INFO L435 NwaCegarLoop]: 529 mSDtfsCounter, 926 mSDsluCounter, 531 mSDsCounter, 0 mSdLazyCounter, 72 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 926 SdHoareTripleChecker+Valid, 1060 SdHoareTripleChecker+Invalid, 72 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 72 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-24 00:01:49,163 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [926 Valid, 1060 Invalid, 72 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 72 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-24 00:01:49,164 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 394 states. [2024-11-24 00:01:49,176 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 394 to 394. [2024-11-24 00:01:49,177 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 394 states, 389 states have (on average 1.4498714652956297) internal successors, (564), 389 states have internal predecessors, (564), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-24 00:01:49,179 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 394 states to 394 states and 570 transitions. [2024-11-24 00:01:49,179 INFO L78 Accepts]: Start accepts. Automaton has 394 states and 570 transitions. Word has length 130 [2024-11-24 00:01:49,180 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 00:01:49,180 INFO L471 AbstractCegarLoop]: Abstraction has 394 states and 570 transitions. [2024-11-24 00:01:49,180 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 23.6) internal successors, (118), 5 states have internal predecessors, (118), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-24 00:01:49,180 INFO L276 IsEmpty]: Start isEmpty. Operand 394 states and 570 transitions. [2024-11-24 00:01:49,181 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 132 [2024-11-24 00:01:49,181 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 00:01:49,181 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 00:01:49,182 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable14 [2024-11-24 00:01:49,182 INFO L396 AbstractCegarLoop]: === Iteration 16 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 00:01:49,182 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 00:01:49,182 INFO L85 PathProgramCache]: Analyzing trace with hash 579372781, now seen corresponding path program 1 times [2024-11-24 00:01:49,182 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 00:01:49,182 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [198886694] [2024-11-24 00:01:49,182 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 00:01:49,182 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 00:01:49,384 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 00:01:49,655 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-24 00:01:49,655 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-24 00:01:49,655 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [198886694] [2024-11-24 00:01:49,656 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [198886694] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-24 00:01:49,656 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-24 00:01:49,656 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-24 00:01:49,657 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1462677060] [2024-11-24 00:01:49,658 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-24 00:01:49,658 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-24 00:01:49,658 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-24 00:01:49,659 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-24 00:01:49,659 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-24 00:01:49,659 INFO L87 Difference]: Start difference. First operand 394 states and 570 transitions. Second operand has 4 states, 4 states have (on average 29.75) internal successors, (119), 4 states have internal predecessors, (119), 2 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2024-11-24 00:01:49,764 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 00:01:49,765 INFO L93 Difference]: Finished difference Result 718 states and 1036 transitions. [2024-11-24 00:01:49,766 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-24 00:01:49,766 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 29.75) internal successors, (119), 4 states have internal predecessors, (119), 2 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 131 [2024-11-24 00:01:49,767 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 00:01:49,768 INFO L225 Difference]: With dead ends: 718 [2024-11-24 00:01:49,769 INFO L226 Difference]: Without dead ends: 394 [2024-11-24 00:01:49,769 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-11-24 00:01:49,771 INFO L435 NwaCegarLoop]: 549 mSDtfsCounter, 512 mSDsluCounter, 551 mSDsCounter, 0 mSdLazyCounter, 30 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 514 SdHoareTripleChecker+Valid, 1100 SdHoareTripleChecker+Invalid, 30 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 30 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-24 00:01:49,771 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [514 Valid, 1100 Invalid, 30 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 30 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-24 00:01:49,773 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 394 states. [2024-11-24 00:01:49,784 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 394 to 394. [2024-11-24 00:01:49,785 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 394 states, 389 states have (on average 1.4473007712082262) internal successors, (563), 389 states have internal predecessors, (563), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-24 00:01:49,787 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 394 states to 394 states and 569 transitions. [2024-11-24 00:01:49,788 INFO L78 Accepts]: Start accepts. Automaton has 394 states and 569 transitions. Word has length 131 [2024-11-24 00:01:49,788 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 00:01:49,788 INFO L471 AbstractCegarLoop]: Abstraction has 394 states and 569 transitions. [2024-11-24 00:01:49,789 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 29.75) internal successors, (119), 4 states have internal predecessors, (119), 2 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2024-11-24 00:01:49,789 INFO L276 IsEmpty]: Start isEmpty. Operand 394 states and 569 transitions. [2024-11-24 00:01:49,790 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 133 [2024-11-24 00:01:49,791 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 00:01:49,791 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 00:01:49,791 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable15 [2024-11-24 00:01:49,791 INFO L396 AbstractCegarLoop]: === Iteration 17 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 00:01:49,792 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 00:01:49,792 INFO L85 PathProgramCache]: Analyzing trace with hash -1064876956, now seen corresponding path program 1 times [2024-11-24 00:01:49,792 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 00:01:49,792 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [193278946] [2024-11-24 00:01:49,792 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 00:01:49,793 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 00:01:49,983 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 00:01:50,640 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-24 00:01:50,640 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-24 00:01:50,640 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [193278946] [2024-11-24 00:01:50,640 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [193278946] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-24 00:01:50,641 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-24 00:01:50,641 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2024-11-24 00:01:50,641 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [557200194] [2024-11-24 00:01:50,641 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-24 00:01:50,642 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2024-11-24 00:01:50,643 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-24 00:01:50,643 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-11-24 00:01:50,643 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2024-11-24 00:01:50,643 INFO L87 Difference]: Start difference. First operand 394 states and 569 transitions. Second operand has 7 states, 7 states have (on average 17.142857142857142) internal successors, (120), 7 states have internal predecessors, (120), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-24 00:01:51,137 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 00:01:51,138 INFO L93 Difference]: Finished difference Result 786 states and 1132 transitions. [2024-11-24 00:01:51,138 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2024-11-24 00:01:51,138 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 17.142857142857142) internal successors, (120), 7 states have internal predecessors, (120), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 132 [2024-11-24 00:01:51,139 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 00:01:51,141 INFO L225 Difference]: With dead ends: 786 [2024-11-24 00:01:51,141 INFO L226 Difference]: Without dead ends: 398 [2024-11-24 00:01:51,142 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=27, Invalid=83, Unknown=0, NotChecked=0, Total=110 [2024-11-24 00:01:51,143 INFO L435 NwaCegarLoop]: 539 mSDtfsCounter, 645 mSDsluCounter, 2018 mSDsCounter, 0 mSdLazyCounter, 256 mSolverCounterSat, 9 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 648 SdHoareTripleChecker+Valid, 2557 SdHoareTripleChecker+Invalid, 265 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 9 IncrementalHoareTripleChecker+Valid, 256 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2024-11-24 00:01:51,143 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [648 Valid, 2557 Invalid, 265 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [9 Valid, 256 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2024-11-24 00:01:51,144 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 398 states. [2024-11-24 00:01:51,156 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 398 to 396. [2024-11-24 00:01:51,157 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 396 states, 391 states have (on average 1.4424552429667519) internal successors, (564), 391 states have internal predecessors, (564), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-24 00:01:51,161 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 396 states to 396 states and 570 transitions. [2024-11-24 00:01:51,161 INFO L78 Accepts]: Start accepts. Automaton has 396 states and 570 transitions. Word has length 132 [2024-11-24 00:01:51,162 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 00:01:51,162 INFO L471 AbstractCegarLoop]: Abstraction has 396 states and 570 transitions. [2024-11-24 00:01:51,162 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 17.142857142857142) internal successors, (120), 7 states have internal predecessors, (120), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-24 00:01:51,162 INFO L276 IsEmpty]: Start isEmpty. Operand 396 states and 570 transitions. [2024-11-24 00:01:51,163 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 134 [2024-11-24 00:01:51,164 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 00:01:51,164 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 00:01:51,164 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable16 [2024-11-24 00:01:51,164 INFO L396 AbstractCegarLoop]: === Iteration 18 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 00:01:51,165 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 00:01:51,165 INFO L85 PathProgramCache]: Analyzing trace with hash 1940307707, now seen corresponding path program 1 times [2024-11-24 00:01:51,165 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 00:01:51,165 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1576744845] [2024-11-24 00:01:51,166 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 00:01:51,166 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 00:01:51,358 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 00:01:51,737 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-24 00:01:51,737 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-24 00:01:51,737 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1576744845] [2024-11-24 00:01:51,737 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1576744845] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-24 00:01:51,738 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-24 00:01:51,738 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-24 00:01:51,738 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1508113487] [2024-11-24 00:01:51,738 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-24 00:01:51,738 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-24 00:01:51,738 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-24 00:01:51,739 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-24 00:01:51,739 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-24 00:01:51,739 INFO L87 Difference]: Start difference. First operand 396 states and 570 transitions. Second operand has 4 states, 4 states have (on average 30.25) internal successors, (121), 4 states have internal predecessors, (121), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-24 00:01:51,823 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 00:01:51,823 INFO L93 Difference]: Finished difference Result 722 states and 1036 transitions. [2024-11-24 00:01:51,824 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-24 00:01:51,824 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 30.25) internal successors, (121), 4 states have internal predecessors, (121), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 133 [2024-11-24 00:01:51,824 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 00:01:51,826 INFO L225 Difference]: With dead ends: 722 [2024-11-24 00:01:51,826 INFO L226 Difference]: Without dead ends: 396 [2024-11-24 00:01:51,827 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-11-24 00:01:51,827 INFO L435 NwaCegarLoop]: 544 mSDtfsCounter, 469 mSDsluCounter, 546 mSDsCounter, 0 mSdLazyCounter, 36 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 469 SdHoareTripleChecker+Valid, 1090 SdHoareTripleChecker+Invalid, 36 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 36 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-24 00:01:51,827 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [469 Valid, 1090 Invalid, 36 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 36 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-24 00:01:51,828 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 396 states. [2024-11-24 00:01:51,838 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 396 to 396. [2024-11-24 00:01:51,839 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 396 states, 391 states have (on average 1.4398976982097187) internal successors, (563), 391 states have internal predecessors, (563), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-24 00:01:51,841 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 396 states to 396 states and 569 transitions. [2024-11-24 00:01:51,841 INFO L78 Accepts]: Start accepts. Automaton has 396 states and 569 transitions. Word has length 133 [2024-11-24 00:01:51,842 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 00:01:51,842 INFO L471 AbstractCegarLoop]: Abstraction has 396 states and 569 transitions. [2024-11-24 00:01:51,842 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 30.25) internal successors, (121), 4 states have internal predecessors, (121), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-24 00:01:51,842 INFO L276 IsEmpty]: Start isEmpty. Operand 396 states and 569 transitions. [2024-11-24 00:01:51,843 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 135 [2024-11-24 00:01:51,843 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 00:01:51,844 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 00:01:51,844 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable17 [2024-11-24 00:01:51,844 INFO L396 AbstractCegarLoop]: === Iteration 19 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 00:01:51,844 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 00:01:51,845 INFO L85 PathProgramCache]: Analyzing trace with hash 2020339687, now seen corresponding path program 1 times [2024-11-24 00:01:51,845 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 00:01:51,845 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [827424391] [2024-11-24 00:01:51,845 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 00:01:51,845 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 00:01:52,011 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 00:01:52,615 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-24 00:01:52,615 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-24 00:01:52,616 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [827424391] [2024-11-24 00:01:52,616 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [827424391] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-24 00:01:52,616 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-24 00:01:52,616 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-24 00:01:52,616 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1639467630] [2024-11-24 00:01:52,616 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-24 00:01:52,617 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-24 00:01:52,617 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-24 00:01:52,617 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-24 00:01:52,617 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-11-24 00:01:52,618 INFO L87 Difference]: Start difference. First operand 396 states and 569 transitions. Second operand has 5 states, 5 states have (on average 24.4) internal successors, (122), 5 states have internal predecessors, (122), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-24 00:01:52,691 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 00:01:52,692 INFO L93 Difference]: Finished difference Result 767 states and 1089 transitions. [2024-11-24 00:01:52,692 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-11-24 00:01:52,692 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 24.4) internal successors, (122), 5 states have internal predecessors, (122), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 134 [2024-11-24 00:01:52,693 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 00:01:52,695 INFO L225 Difference]: With dead ends: 767 [2024-11-24 00:01:52,695 INFO L226 Difference]: Without dead ends: 441 [2024-11-24 00:01:52,696 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-11-24 00:01:52,696 INFO L435 NwaCegarLoop]: 555 mSDtfsCounter, 17 mSDsluCounter, 1656 mSDsCounter, 0 mSdLazyCounter, 32 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 17 SdHoareTripleChecker+Valid, 2211 SdHoareTripleChecker+Invalid, 32 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 32 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-24 00:01:52,697 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [17 Valid, 2211 Invalid, 32 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 32 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-24 00:01:52,698 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 441 states. [2024-11-24 00:01:52,711 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 441 to 439. [2024-11-24 00:01:52,712 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 439 states, 434 states have (on average 1.4147465437788018) internal successors, (614), 434 states have internal predecessors, (614), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-24 00:01:52,714 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 439 states to 439 states and 620 transitions. [2024-11-24 00:01:52,714 INFO L78 Accepts]: Start accepts. Automaton has 439 states and 620 transitions. Word has length 134 [2024-11-24 00:01:52,715 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 00:01:52,715 INFO L471 AbstractCegarLoop]: Abstraction has 439 states and 620 transitions. [2024-11-24 00:01:52,715 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 24.4) internal successors, (122), 5 states have internal predecessors, (122), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-24 00:01:52,715 INFO L276 IsEmpty]: Start isEmpty. Operand 439 states and 620 transitions. [2024-11-24 00:01:52,717 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 136 [2024-11-24 00:01:52,717 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 00:01:52,717 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 00:01:52,717 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable18 [2024-11-24 00:01:52,718 INFO L396 AbstractCegarLoop]: === Iteration 20 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 00:01:52,718 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 00:01:52,718 INFO L85 PathProgramCache]: Analyzing trace with hash -885091725, now seen corresponding path program 1 times [2024-11-24 00:01:52,719 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 00:01:52,719 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [361335737] [2024-11-24 00:01:52,719 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 00:01:52,719 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 00:01:52,899 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 00:01:53,730 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-24 00:01:53,731 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-24 00:01:53,731 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [361335737] [2024-11-24 00:01:53,731 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [361335737] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-24 00:01:53,731 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-24 00:01:53,731 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-11-24 00:01:53,731 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1859224760] [2024-11-24 00:01:53,731 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-24 00:01:53,731 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-11-24 00:01:53,732 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-24 00:01:53,732 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-11-24 00:01:53,732 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2024-11-24 00:01:53,732 INFO L87 Difference]: Start difference. First operand 439 states and 620 transitions. Second operand has 6 states, 6 states have (on average 20.5) internal successors, (123), 6 states have internal predecessors, (123), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-24 00:01:53,916 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 00:01:53,916 INFO L93 Difference]: Finished difference Result 974 states and 1355 transitions. [2024-11-24 00:01:53,916 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-24 00:01:53,917 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 20.5) internal successors, (123), 6 states have internal predecessors, (123), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 135 [2024-11-24 00:01:53,917 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 00:01:53,919 INFO L225 Difference]: With dead ends: 974 [2024-11-24 00:01:53,920 INFO L226 Difference]: Without dead ends: 605 [2024-11-24 00:01:53,921 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=23, Invalid=49, Unknown=0, NotChecked=0, Total=72 [2024-11-24 00:01:53,924 INFO L435 NwaCegarLoop]: 549 mSDtfsCounter, 849 mSDsluCounter, 1641 mSDsCounter, 0 mSdLazyCounter, 60 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 852 SdHoareTripleChecker+Valid, 2190 SdHoareTripleChecker+Invalid, 63 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 60 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-24 00:01:53,925 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [852 Valid, 2190 Invalid, 63 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 60 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-24 00:01:53,926 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 605 states. [2024-11-24 00:01:53,948 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 605 to 605. [2024-11-24 00:01:53,949 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 605 states, 597 states have (on average 1.3835845896147403) internal successors, (826), 597 states have internal predecessors, (826), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-11-24 00:01:53,952 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 605 states to 605 states and 838 transitions. [2024-11-24 00:01:53,953 INFO L78 Accepts]: Start accepts. Automaton has 605 states and 838 transitions. Word has length 135 [2024-11-24 00:01:53,954 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 00:01:53,954 INFO L471 AbstractCegarLoop]: Abstraction has 605 states and 838 transitions. [2024-11-24 00:01:53,954 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 20.5) internal successors, (123), 6 states have internal predecessors, (123), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-24 00:01:53,955 INFO L276 IsEmpty]: Start isEmpty. Operand 605 states and 838 transitions. [2024-11-24 00:01:53,960 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 325 [2024-11-24 00:01:53,961 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 00:01:53,961 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 00:01:53,961 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable19 [2024-11-24 00:01:53,961 INFO L396 AbstractCegarLoop]: === Iteration 21 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 00:01:53,962 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 00:01:53,962 INFO L85 PathProgramCache]: Analyzing trace with hash 1773776762, now seen corresponding path program 1 times [2024-11-24 00:01:53,963 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 00:01:53,963 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2075469068] [2024-11-24 00:01:53,963 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 00:01:53,964 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 00:01:54,265 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 00:01:54,952 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 84 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-24 00:01:54,952 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-24 00:01:54,952 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2075469068] [2024-11-24 00:01:54,953 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2075469068] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-24 00:01:54,953 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-24 00:01:54,953 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-24 00:01:54,953 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1735700365] [2024-11-24 00:01:54,953 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-24 00:01:54,954 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-24 00:01:54,954 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-24 00:01:54,955 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-24 00:01:54,955 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-24 00:01:54,956 INFO L87 Difference]: Start difference. First operand 605 states and 838 transitions. Second operand has 5 states, 5 states have (on average 59.4) internal successors, (297), 5 states have internal predecessors, (297), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-24 00:01:55,114 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 00:01:55,115 INFO L93 Difference]: Finished difference Result 974 states and 1354 transitions. [2024-11-24 00:01:55,115 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-24 00:01:55,116 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 59.4) internal successors, (297), 5 states have internal predecessors, (297), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 324 [2024-11-24 00:01:55,116 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 00:01:55,119 INFO L225 Difference]: With dead ends: 974 [2024-11-24 00:01:55,120 INFO L226 Difference]: Without dead ends: 605 [2024-11-24 00:01:55,120 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-11-24 00:01:55,121 INFO L435 NwaCegarLoop]: 526 mSDtfsCounter, 512 mSDsluCounter, 535 mSDsCounter, 0 mSdLazyCounter, 70 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 515 SdHoareTripleChecker+Valid, 1061 SdHoareTripleChecker+Invalid, 71 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 70 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-24 00:01:55,122 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [515 Valid, 1061 Invalid, 71 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 70 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-24 00:01:55,124 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 605 states. [2024-11-24 00:01:55,149 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 605 to 605. [2024-11-24 00:01:55,150 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 605 states, 597 states have (on average 1.3819095477386936) internal successors, (825), 597 states have internal predecessors, (825), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-11-24 00:01:55,154 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 605 states to 605 states and 837 transitions. [2024-11-24 00:01:55,155 INFO L78 Accepts]: Start accepts. Automaton has 605 states and 837 transitions. Word has length 324 [2024-11-24 00:01:55,155 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 00:01:55,155 INFO L471 AbstractCegarLoop]: Abstraction has 605 states and 837 transitions. [2024-11-24 00:01:55,156 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 59.4) internal successors, (297), 5 states have internal predecessors, (297), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-24 00:01:55,156 INFO L276 IsEmpty]: Start isEmpty. Operand 605 states and 837 transitions. [2024-11-24 00:01:55,162 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 326 [2024-11-24 00:01:55,162 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 00:01:55,163 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 00:01:55,163 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable20 [2024-11-24 00:01:55,163 INFO L396 AbstractCegarLoop]: === Iteration 22 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 00:01:55,164 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 00:01:55,164 INFO L85 PathProgramCache]: Analyzing trace with hash -430837626, now seen corresponding path program 1 times [2024-11-24 00:01:55,164 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 00:01:55,164 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [736893830] [2024-11-24 00:01:55,164 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 00:01:55,164 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 00:01:55,559 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 00:01:56,167 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 84 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-24 00:01:56,168 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-24 00:01:56,168 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [736893830] [2024-11-24 00:01:56,168 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [736893830] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-24 00:01:56,168 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-24 00:01:56,168 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-24 00:01:56,168 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1605284319] [2024-11-24 00:01:56,168 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-24 00:01:56,169 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-24 00:01:56,170 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-24 00:01:56,171 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-24 00:01:56,171 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-24 00:01:56,171 INFO L87 Difference]: Start difference. First operand 605 states and 837 transitions. Second operand has 5 states, 5 states have (on average 59.6) internal successors, (298), 5 states have internal predecessors, (298), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-24 00:01:56,328 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 00:01:56,330 INFO L93 Difference]: Finished difference Result 974 states and 1352 transitions. [2024-11-24 00:01:56,330 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-24 00:01:56,331 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 59.6) internal successors, (298), 5 states have internal predecessors, (298), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 325 [2024-11-24 00:01:56,332 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 00:01:56,335 INFO L225 Difference]: With dead ends: 974 [2024-11-24 00:01:56,336 INFO L226 Difference]: Without dead ends: 605 [2024-11-24 00:01:56,337 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-11-24 00:01:56,339 INFO L435 NwaCegarLoop]: 526 mSDtfsCounter, 504 mSDsluCounter, 535 mSDsCounter, 0 mSdLazyCounter, 68 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 507 SdHoareTripleChecker+Valid, 1061 SdHoareTripleChecker+Invalid, 69 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 68 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-24 00:01:56,340 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [507 Valid, 1061 Invalid, 69 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 68 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-24 00:01:56,341 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 605 states. [2024-11-24 00:01:56,363 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 605 to 605. [2024-11-24 00:01:56,364 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 605 states, 597 states have (on average 1.3802345058626466) internal successors, (824), 597 states have internal predecessors, (824), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-11-24 00:01:56,368 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 605 states to 605 states and 836 transitions. [2024-11-24 00:01:56,368 INFO L78 Accepts]: Start accepts. Automaton has 605 states and 836 transitions. Word has length 325 [2024-11-24 00:01:56,369 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 00:01:56,370 INFO L471 AbstractCegarLoop]: Abstraction has 605 states and 836 transitions. [2024-11-24 00:01:56,370 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 59.6) internal successors, (298), 5 states have internal predecessors, (298), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-24 00:01:56,370 INFO L276 IsEmpty]: Start isEmpty. Operand 605 states and 836 transitions. [2024-11-24 00:01:56,376 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 327 [2024-11-24 00:01:56,376 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 00:01:56,376 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 00:01:56,376 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable21 [2024-11-24 00:01:56,380 INFO L396 AbstractCegarLoop]: === Iteration 23 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 00:01:56,381 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 00:01:56,381 INFO L85 PathProgramCache]: Analyzing trace with hash 64689519, now seen corresponding path program 1 times [2024-11-24 00:01:56,381 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 00:01:56,381 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1295249924] [2024-11-24 00:01:56,381 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 00:01:56,381 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 00:01:56,694 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 00:01:57,395 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 84 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-24 00:01:57,395 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-24 00:01:57,395 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1295249924] [2024-11-24 00:01:57,395 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1295249924] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-24 00:01:57,396 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-24 00:01:57,396 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-24 00:01:57,396 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1698382502] [2024-11-24 00:01:57,396 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-24 00:01:57,397 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-24 00:01:57,397 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-24 00:01:57,398 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-24 00:01:57,398 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-24 00:01:57,398 INFO L87 Difference]: Start difference. First operand 605 states and 836 transitions. Second operand has 5 states, 5 states have (on average 59.8) internal successors, (299), 5 states have internal predecessors, (299), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-24 00:01:57,553 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 00:01:57,553 INFO L93 Difference]: Finished difference Result 974 states and 1350 transitions. [2024-11-24 00:01:57,554 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-24 00:01:57,554 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 59.8) internal successors, (299), 5 states have internal predecessors, (299), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 326 [2024-11-24 00:01:57,555 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 00:01:57,557 INFO L225 Difference]: With dead ends: 974 [2024-11-24 00:01:57,558 INFO L226 Difference]: Without dead ends: 605 [2024-11-24 00:01:57,559 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-11-24 00:01:57,559 INFO L435 NwaCegarLoop]: 526 mSDtfsCounter, 900 mSDsluCounter, 528 mSDsCounter, 0 mSdLazyCounter, 66 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 903 SdHoareTripleChecker+Valid, 1054 SdHoareTripleChecker+Invalid, 67 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 66 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-24 00:01:57,560 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [903 Valid, 1054 Invalid, 67 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 66 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-24 00:01:57,561 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 605 states. [2024-11-24 00:01:57,582 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 605 to 605. [2024-11-24 00:01:57,584 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 605 states, 597 states have (on average 1.3785594639865997) internal successors, (823), 597 states have internal predecessors, (823), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-11-24 00:01:57,587 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 605 states to 605 states and 835 transitions. [2024-11-24 00:01:57,588 INFO L78 Accepts]: Start accepts. Automaton has 605 states and 835 transitions. Word has length 326 [2024-11-24 00:01:57,588 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 00:01:57,589 INFO L471 AbstractCegarLoop]: Abstraction has 605 states and 835 transitions. [2024-11-24 00:01:57,589 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 59.8) internal successors, (299), 5 states have internal predecessors, (299), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-24 00:01:57,589 INFO L276 IsEmpty]: Start isEmpty. Operand 605 states and 835 transitions. [2024-11-24 00:01:57,594 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 328 [2024-11-24 00:01:57,594 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 00:01:57,595 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 00:01:57,595 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable22 [2024-11-24 00:01:57,595 INFO L396 AbstractCegarLoop]: === Iteration 24 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 00:01:57,596 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 00:01:57,596 INFO L85 PathProgramCache]: Analyzing trace with hash -1440379429, now seen corresponding path program 1 times [2024-11-24 00:01:57,596 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 00:01:57,596 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [312781129] [2024-11-24 00:01:57,596 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 00:01:57,597 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 00:01:57,908 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 00:01:58,499 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 84 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-24 00:01:58,499 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-24 00:01:58,499 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [312781129] [2024-11-24 00:01:58,500 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [312781129] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-24 00:01:58,500 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-24 00:01:58,500 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-24 00:01:58,500 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1553603213] [2024-11-24 00:01:58,500 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-24 00:01:58,502 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-24 00:01:58,502 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-24 00:01:58,503 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-24 00:01:58,504 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-24 00:01:58,504 INFO L87 Difference]: Start difference. First operand 605 states and 835 transitions. Second operand has 5 states, 5 states have (on average 60.0) internal successors, (300), 5 states have internal predecessors, (300), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-24 00:01:58,651 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 00:01:58,651 INFO L93 Difference]: Finished difference Result 974 states and 1348 transitions. [2024-11-24 00:01:58,652 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-24 00:01:58,652 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 60.0) internal successors, (300), 5 states have internal predecessors, (300), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 327 [2024-11-24 00:01:58,653 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 00:01:58,656 INFO L225 Difference]: With dead ends: 974 [2024-11-24 00:01:58,656 INFO L226 Difference]: Without dead ends: 605 [2024-11-24 00:01:58,657 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-11-24 00:01:58,657 INFO L435 NwaCegarLoop]: 526 mSDtfsCounter, 884 mSDsluCounter, 528 mSDsCounter, 0 mSdLazyCounter, 64 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 887 SdHoareTripleChecker+Valid, 1054 SdHoareTripleChecker+Invalid, 65 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 64 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-24 00:01:58,658 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [887 Valid, 1054 Invalid, 65 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 64 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-24 00:01:58,659 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 605 states. [2024-11-24 00:01:58,681 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 605 to 605. [2024-11-24 00:01:58,683 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 605 states, 597 states have (on average 1.3768844221105527) internal successors, (822), 597 states have internal predecessors, (822), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-11-24 00:01:58,686 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 605 states to 605 states and 834 transitions. [2024-11-24 00:01:58,688 INFO L78 Accepts]: Start accepts. Automaton has 605 states and 834 transitions. Word has length 327 [2024-11-24 00:01:58,688 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 00:01:58,688 INFO L471 AbstractCegarLoop]: Abstraction has 605 states and 834 transitions. [2024-11-24 00:01:58,689 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 60.0) internal successors, (300), 5 states have internal predecessors, (300), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-24 00:01:58,689 INFO L276 IsEmpty]: Start isEmpty. Operand 605 states and 834 transitions. [2024-11-24 00:01:58,694 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 329 [2024-11-24 00:01:58,694 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 00:01:58,695 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 00:01:58,695 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable23 [2024-11-24 00:01:58,695 INFO L396 AbstractCegarLoop]: === Iteration 25 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 00:01:58,696 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 00:01:58,696 INFO L85 PathProgramCache]: Analyzing trace with hash -833179932, now seen corresponding path program 1 times [2024-11-24 00:01:58,696 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 00:01:58,696 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1183951334] [2024-11-24 00:01:58,696 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 00:01:58,696 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 00:01:59,023 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 00:01:59,678 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 84 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-24 00:01:59,678 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-24 00:01:59,678 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1183951334] [2024-11-24 00:01:59,678 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1183951334] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-24 00:01:59,679 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-24 00:01:59,679 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-24 00:01:59,679 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [460868173] [2024-11-24 00:01:59,679 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-24 00:01:59,680 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-24 00:01:59,680 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-24 00:01:59,681 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-24 00:01:59,681 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-24 00:01:59,681 INFO L87 Difference]: Start difference. First operand 605 states and 834 transitions. Second operand has 5 states, 5 states have (on average 60.2) internal successors, (301), 5 states have internal predecessors, (301), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-24 00:01:59,781 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 00:01:59,781 INFO L93 Difference]: Finished difference Result 974 states and 1346 transitions. [2024-11-24 00:01:59,782 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-24 00:01:59,782 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 60.2) internal successors, (301), 5 states have internal predecessors, (301), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 328 [2024-11-24 00:01:59,783 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 00:01:59,785 INFO L225 Difference]: With dead ends: 974 [2024-11-24 00:01:59,785 INFO L226 Difference]: Without dead ends: 605 [2024-11-24 00:01:59,786 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-11-24 00:01:59,786 INFO L435 NwaCegarLoop]: 540 mSDtfsCounter, 473 mSDsluCounter, 549 mSDsCounter, 0 mSdLazyCounter, 34 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 476 SdHoareTripleChecker+Valid, 1089 SdHoareTripleChecker+Invalid, 35 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 34 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-24 00:01:59,787 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [476 Valid, 1089 Invalid, 35 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 34 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-24 00:01:59,789 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 605 states. [2024-11-24 00:01:59,805 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 605 to 605. [2024-11-24 00:01:59,810 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 605 states, 597 states have (on average 1.3752093802345058) internal successors, (821), 597 states have internal predecessors, (821), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-11-24 00:01:59,814 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 605 states to 605 states and 833 transitions. [2024-11-24 00:01:59,814 INFO L78 Accepts]: Start accepts. Automaton has 605 states and 833 transitions. Word has length 328 [2024-11-24 00:01:59,818 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 00:01:59,819 INFO L471 AbstractCegarLoop]: Abstraction has 605 states and 833 transitions. [2024-11-24 00:01:59,820 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 60.2) internal successors, (301), 5 states have internal predecessors, (301), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-24 00:01:59,820 INFO L276 IsEmpty]: Start isEmpty. Operand 605 states and 833 transitions. [2024-11-24 00:01:59,824 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 330 [2024-11-24 00:01:59,826 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 00:01:59,826 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 00:01:59,827 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable24 [2024-11-24 00:01:59,827 INFO L396 AbstractCegarLoop]: === Iteration 26 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 00:01:59,827 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 00:01:59,827 INFO L85 PathProgramCache]: Analyzing trace with hash 16225968, now seen corresponding path program 1 times [2024-11-24 00:01:59,827 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 00:01:59,828 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [487787796] [2024-11-24 00:01:59,828 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 00:01:59,828 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 00:02:00,102 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 00:02:00,821 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 84 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-24 00:02:00,821 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-24 00:02:00,822 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [487787796] [2024-11-24 00:02:00,822 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [487787796] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-24 00:02:00,822 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-24 00:02:00,822 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-24 00:02:00,822 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1910724932] [2024-11-24 00:02:00,822 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-24 00:02:00,823 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-24 00:02:00,823 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-24 00:02:00,824 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-24 00:02:00,825 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-24 00:02:00,825 INFO L87 Difference]: Start difference. First operand 605 states and 833 transitions. Second operand has 5 states, 5 states have (on average 60.4) internal successors, (302), 5 states have internal predecessors, (302), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-24 00:02:00,912 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 00:02:00,912 INFO L93 Difference]: Finished difference Result 974 states and 1344 transitions. [2024-11-24 00:02:00,913 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-24 00:02:00,913 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 60.4) internal successors, (302), 5 states have internal predecessors, (302), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 329 [2024-11-24 00:02:00,914 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 00:02:00,916 INFO L225 Difference]: With dead ends: 974 [2024-11-24 00:02:00,916 INFO L226 Difference]: Without dead ends: 605 [2024-11-24 00:02:00,917 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-11-24 00:02:00,917 INFO L435 NwaCegarLoop]: 540 mSDtfsCounter, 465 mSDsluCounter, 549 mSDsCounter, 0 mSdLazyCounter, 32 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 468 SdHoareTripleChecker+Valid, 1089 SdHoareTripleChecker+Invalid, 33 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 32 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-24 00:02:00,918 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [468 Valid, 1089 Invalid, 33 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 32 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-24 00:02:00,919 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 605 states. [2024-11-24 00:02:00,938 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 605 to 605. [2024-11-24 00:02:00,939 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 605 states, 597 states have (on average 1.373534338358459) internal successors, (820), 597 states have internal predecessors, (820), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-11-24 00:02:00,941 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 605 states to 605 states and 832 transitions. [2024-11-24 00:02:00,942 INFO L78 Accepts]: Start accepts. Automaton has 605 states and 832 transitions. Word has length 329 [2024-11-24 00:02:00,942 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 00:02:00,942 INFO L471 AbstractCegarLoop]: Abstraction has 605 states and 832 transitions. [2024-11-24 00:02:00,943 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 60.4) internal successors, (302), 5 states have internal predecessors, (302), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-24 00:02:00,943 INFO L276 IsEmpty]: Start isEmpty. Operand 605 states and 832 transitions. [2024-11-24 00:02:00,948 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 331 [2024-11-24 00:02:00,948 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 00:02:00,948 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 00:02:00,948 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable25 [2024-11-24 00:02:00,949 INFO L396 AbstractCegarLoop]: === Iteration 27 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 00:02:00,949 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 00:02:00,949 INFO L85 PathProgramCache]: Analyzing trace with hash 1724038105, now seen corresponding path program 1 times [2024-11-24 00:02:00,949 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 00:02:00,950 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2061381058] [2024-11-24 00:02:00,950 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 00:02:00,950 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 00:02:01,235 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 00:02:01,892 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 84 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-24 00:02:01,892 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-24 00:02:01,892 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2061381058] [2024-11-24 00:02:01,893 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2061381058] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-24 00:02:01,893 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-24 00:02:01,893 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-24 00:02:01,893 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [25449433] [2024-11-24 00:02:01,893 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-24 00:02:01,894 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-24 00:02:01,894 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-24 00:02:01,895 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-24 00:02:01,895 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-24 00:02:01,895 INFO L87 Difference]: Start difference. First operand 605 states and 832 transitions. Second operand has 5 states, 5 states have (on average 60.6) internal successors, (303), 5 states have internal predecessors, (303), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-24 00:02:02,373 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 00:02:02,374 INFO L93 Difference]: Finished difference Result 974 states and 1342 transitions. [2024-11-24 00:02:02,374 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-24 00:02:02,375 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 60.6) internal successors, (303), 5 states have internal predecessors, (303), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 330 [2024-11-24 00:02:02,375 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 00:02:02,378 INFO L225 Difference]: With dead ends: 974 [2024-11-24 00:02:02,379 INFO L226 Difference]: Without dead ends: 605 [2024-11-24 00:02:02,380 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-11-24 00:02:02,380 INFO L435 NwaCegarLoop]: 398 mSDtfsCounter, 785 mSDsluCounter, 400 mSDsCounter, 0 mSdLazyCounter, 314 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 785 SdHoareTripleChecker+Valid, 798 SdHoareTripleChecker+Invalid, 315 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 314 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2024-11-24 00:02:02,381 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [785 Valid, 798 Invalid, 315 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 314 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2024-11-24 00:02:02,383 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 605 states. [2024-11-24 00:02:02,411 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 605 to 605. [2024-11-24 00:02:02,412 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 605 states, 597 states have (on average 1.3718592964824121) internal successors, (819), 597 states have internal predecessors, (819), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-11-24 00:02:02,416 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 605 states to 605 states and 831 transitions. [2024-11-24 00:02:02,417 INFO L78 Accepts]: Start accepts. Automaton has 605 states and 831 transitions. Word has length 330 [2024-11-24 00:02:02,417 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 00:02:02,417 INFO L471 AbstractCegarLoop]: Abstraction has 605 states and 831 transitions. [2024-11-24 00:02:02,418 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 60.6) internal successors, (303), 5 states have internal predecessors, (303), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-24 00:02:02,418 INFO L276 IsEmpty]: Start isEmpty. Operand 605 states and 831 transitions. [2024-11-24 00:02:02,425 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 332 [2024-11-24 00:02:02,425 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 00:02:02,426 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 00:02:02,426 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable26 [2024-11-24 00:02:02,426 INFO L396 AbstractCegarLoop]: === Iteration 28 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 00:02:02,427 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 00:02:02,427 INFO L85 PathProgramCache]: Analyzing trace with hash 1585990405, now seen corresponding path program 1 times [2024-11-24 00:02:02,427 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 00:02:02,427 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1495276426] [2024-11-24 00:02:02,427 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 00:02:02,427 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 00:02:03,441 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 00:02:04,430 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 84 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-24 00:02:04,430 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-24 00:02:04,430 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1495276426] [2024-11-24 00:02:04,430 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1495276426] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-24 00:02:04,430 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-24 00:02:04,430 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-24 00:02:04,431 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [898675159] [2024-11-24 00:02:04,431 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-24 00:02:04,432 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-24 00:02:04,432 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-24 00:02:04,434 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-24 00:02:04,434 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-24 00:02:04,434 INFO L87 Difference]: Start difference. First operand 605 states and 831 transitions. Second operand has 4 states, 4 states have (on average 76.0) internal successors, (304), 4 states have internal predecessors, (304), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-24 00:02:04,525 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 00:02:04,525 INFO L93 Difference]: Finished difference Result 974 states and 1340 transitions. [2024-11-24 00:02:04,525 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-24 00:02:04,526 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 76.0) internal successors, (304), 4 states have internal predecessors, (304), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 331 [2024-11-24 00:02:04,526 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 00:02:04,529 INFO L225 Difference]: With dead ends: 974 [2024-11-24 00:02:04,529 INFO L226 Difference]: Without dead ends: 605 [2024-11-24 00:02:04,530 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-11-24 00:02:04,531 INFO L435 NwaCegarLoop]: 539 mSDtfsCounter, 379 mSDsluCounter, 541 mSDsCounter, 0 mSdLazyCounter, 30 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 379 SdHoareTripleChecker+Valid, 1080 SdHoareTripleChecker+Invalid, 30 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 30 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-24 00:02:04,534 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [379 Valid, 1080 Invalid, 30 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 30 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-24 00:02:04,536 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 605 states. [2024-11-24 00:02:04,559 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 605 to 605. [2024-11-24 00:02:04,560 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 605 states, 597 states have (on average 1.3701842546063652) internal successors, (818), 597 states have internal predecessors, (818), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-11-24 00:02:04,563 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 605 states to 605 states and 830 transitions. [2024-11-24 00:02:04,564 INFO L78 Accepts]: Start accepts. Automaton has 605 states and 830 transitions. Word has length 331 [2024-11-24 00:02:04,564 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 00:02:04,564 INFO L471 AbstractCegarLoop]: Abstraction has 605 states and 830 transitions. [2024-11-24 00:02:04,565 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 76.0) internal successors, (304), 4 states have internal predecessors, (304), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-24 00:02:04,565 INFO L276 IsEmpty]: Start isEmpty. Operand 605 states and 830 transitions. [2024-11-24 00:02:04,571 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 333 [2024-11-24 00:02:04,571 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 00:02:04,571 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 00:02:04,571 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable27 [2024-11-24 00:02:04,572 INFO L396 AbstractCegarLoop]: === Iteration 29 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 00:02:04,572 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 00:02:04,572 INFO L85 PathProgramCache]: Analyzing trace with hash 1718975755, now seen corresponding path program 1 times [2024-11-24 00:02:04,572 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 00:02:04,573 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [610543257] [2024-11-24 00:02:04,573 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 00:02:04,573 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 00:02:05,418 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 00:02:06,236 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 84 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-24 00:02:06,236 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-24 00:02:06,237 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [610543257] [2024-11-24 00:02:06,237 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [610543257] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-24 00:02:06,237 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-24 00:02:06,237 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-24 00:02:06,237 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [682525222] [2024-11-24 00:02:06,237 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-24 00:02:06,238 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-24 00:02:06,238 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-24 00:02:06,239 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-24 00:02:06,240 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-24 00:02:06,240 INFO L87 Difference]: Start difference. First operand 605 states and 830 transitions. Second operand has 5 states, 5 states have (on average 61.0) internal successors, (305), 5 states have internal predecessors, (305), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-24 00:02:06,414 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 00:02:06,414 INFO L93 Difference]: Finished difference Result 974 states and 1338 transitions. [2024-11-24 00:02:06,415 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-24 00:02:06,415 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 61.0) internal successors, (305), 5 states have internal predecessors, (305), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 332 [2024-11-24 00:02:06,416 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 00:02:06,418 INFO L225 Difference]: With dead ends: 974 [2024-11-24 00:02:06,418 INFO L226 Difference]: Without dead ends: 605 [2024-11-24 00:02:06,419 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-11-24 00:02:06,420 INFO L435 NwaCegarLoop]: 522 mSDtfsCounter, 857 mSDsluCounter, 524 mSDsCounter, 0 mSdLazyCounter, 62 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 857 SdHoareTripleChecker+Valid, 1046 SdHoareTripleChecker+Invalid, 62 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 62 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-24 00:02:06,420 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [857 Valid, 1046 Invalid, 62 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 62 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-24 00:02:06,421 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 605 states. [2024-11-24 00:02:06,438 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 605 to 605. [2024-11-24 00:02:06,440 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 605 states, 597 states have (on average 1.3685092127303182) internal successors, (817), 597 states have internal predecessors, (817), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-11-24 00:02:06,443 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 605 states to 605 states and 829 transitions. [2024-11-24 00:02:06,443 INFO L78 Accepts]: Start accepts. Automaton has 605 states and 829 transitions. Word has length 332 [2024-11-24 00:02:06,443 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 00:02:06,444 INFO L471 AbstractCegarLoop]: Abstraction has 605 states and 829 transitions. [2024-11-24 00:02:06,444 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 61.0) internal successors, (305), 5 states have internal predecessors, (305), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-24 00:02:06,444 INFO L276 IsEmpty]: Start isEmpty. Operand 605 states and 829 transitions. [2024-11-24 00:02:06,447 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 334 [2024-11-24 00:02:06,447 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 00:02:06,447 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 00:02:06,447 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable28 [2024-11-24 00:02:06,448 INFO L396 AbstractCegarLoop]: === Iteration 30 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 00:02:06,448 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 00:02:06,448 INFO L85 PathProgramCache]: Analyzing trace with hash 1913081349, now seen corresponding path program 1 times [2024-11-24 00:02:06,448 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 00:02:06,449 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1080189391] [2024-11-24 00:02:06,449 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 00:02:06,449 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 00:02:07,190 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 00:02:07,983 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 84 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-24 00:02:07,983 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-24 00:02:07,984 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1080189391] [2024-11-24 00:02:07,984 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1080189391] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-24 00:02:07,984 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-24 00:02:07,984 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-24 00:02:07,984 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1410856331] [2024-11-24 00:02:07,984 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-24 00:02:07,985 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-24 00:02:07,985 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-24 00:02:07,986 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-24 00:02:07,986 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-24 00:02:07,986 INFO L87 Difference]: Start difference. First operand 605 states and 829 transitions. Second operand has 5 states, 5 states have (on average 61.2) internal successors, (306), 5 states have internal predecessors, (306), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-24 00:02:08,143 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 00:02:08,143 INFO L93 Difference]: Finished difference Result 974 states and 1336 transitions. [2024-11-24 00:02:08,144 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-24 00:02:08,144 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 61.2) internal successors, (306), 5 states have internal predecessors, (306), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 333 [2024-11-24 00:02:08,144 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 00:02:08,147 INFO L225 Difference]: With dead ends: 974 [2024-11-24 00:02:08,147 INFO L226 Difference]: Without dead ends: 605 [2024-11-24 00:02:08,148 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-11-24 00:02:08,148 INFO L435 NwaCegarLoop]: 522 mSDtfsCounter, 451 mSDsluCounter, 531 mSDsCounter, 0 mSdLazyCounter, 60 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 451 SdHoareTripleChecker+Valid, 1053 SdHoareTripleChecker+Invalid, 60 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 60 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-24 00:02:08,149 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [451 Valid, 1053 Invalid, 60 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 60 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-24 00:02:08,151 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 605 states. [2024-11-24 00:02:08,167 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 605 to 605. [2024-11-24 00:02:08,168 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 605 states, 597 states have (on average 1.3668341708542713) internal successors, (816), 597 states have internal predecessors, (816), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-11-24 00:02:08,171 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 605 states to 605 states and 828 transitions. [2024-11-24 00:02:08,171 INFO L78 Accepts]: Start accepts. Automaton has 605 states and 828 transitions. Word has length 333 [2024-11-24 00:02:08,172 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 00:02:08,172 INFO L471 AbstractCegarLoop]: Abstraction has 605 states and 828 transitions. [2024-11-24 00:02:08,172 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 61.2) internal successors, (306), 5 states have internal predecessors, (306), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-24 00:02:08,172 INFO L276 IsEmpty]: Start isEmpty. Operand 605 states and 828 transitions. [2024-11-24 00:02:08,175 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 335 [2024-11-24 00:02:08,175 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 00:02:08,176 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 00:02:08,176 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable29 [2024-11-24 00:02:08,176 INFO L396 AbstractCegarLoop]: === Iteration 31 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 00:02:08,176 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 00:02:08,177 INFO L85 PathProgramCache]: Analyzing trace with hash -898887142, now seen corresponding path program 1 times [2024-11-24 00:02:08,177 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 00:02:08,177 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2055730859] [2024-11-24 00:02:08,177 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 00:02:08,177 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 00:02:08,897 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 00:02:09,604 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 84 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-24 00:02:09,605 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-24 00:02:09,605 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2055730859] [2024-11-24 00:02:09,605 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2055730859] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-24 00:02:09,605 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-24 00:02:09,605 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-24 00:02:09,605 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1330043262] [2024-11-24 00:02:09,606 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-24 00:02:09,606 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-24 00:02:09,606 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-24 00:02:09,607 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-24 00:02:09,607 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-24 00:02:09,608 INFO L87 Difference]: Start difference. First operand 605 states and 828 transitions. Second operand has 5 states, 5 states have (on average 61.4) internal successors, (307), 5 states have internal predecessors, (307), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-24 00:02:09,755 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 00:02:09,756 INFO L93 Difference]: Finished difference Result 974 states and 1334 transitions. [2024-11-24 00:02:09,756 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-24 00:02:09,757 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 61.4) internal successors, (307), 5 states have internal predecessors, (307), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 334 [2024-11-24 00:02:09,757 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 00:02:09,760 INFO L225 Difference]: With dead ends: 974 [2024-11-24 00:02:09,760 INFO L226 Difference]: Without dead ends: 605 [2024-11-24 00:02:09,761 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-11-24 00:02:09,764 INFO L435 NwaCegarLoop]: 522 mSDtfsCounter, 837 mSDsluCounter, 524 mSDsCounter, 0 mSdLazyCounter, 58 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 837 SdHoareTripleChecker+Valid, 1046 SdHoareTripleChecker+Invalid, 58 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 58 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-24 00:02:09,765 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [837 Valid, 1046 Invalid, 58 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 58 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-24 00:02:09,766 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 605 states. [2024-11-24 00:02:09,787 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 605 to 605. [2024-11-24 00:02:09,789 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 605 states, 597 states have (on average 1.3651591289782246) internal successors, (815), 597 states have internal predecessors, (815), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-11-24 00:02:09,792 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 605 states to 605 states and 827 transitions. [2024-11-24 00:02:09,792 INFO L78 Accepts]: Start accepts. Automaton has 605 states and 827 transitions. Word has length 334 [2024-11-24 00:02:09,793 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 00:02:09,793 INFO L471 AbstractCegarLoop]: Abstraction has 605 states and 827 transitions. [2024-11-24 00:02:09,793 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 61.4) internal successors, (307), 5 states have internal predecessors, (307), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-24 00:02:09,793 INFO L276 IsEmpty]: Start isEmpty. Operand 605 states and 827 transitions. [2024-11-24 00:02:09,797 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 336 [2024-11-24 00:02:09,797 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 00:02:09,797 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 00:02:09,798 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable30 [2024-11-24 00:02:09,798 INFO L396 AbstractCegarLoop]: === Iteration 32 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 00:02:09,798 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 00:02:09,799 INFO L85 PathProgramCache]: Analyzing trace with hash -543443530, now seen corresponding path program 1 times [2024-11-24 00:02:09,799 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 00:02:09,799 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1399913909] [2024-11-24 00:02:09,799 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 00:02:09,799 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 00:02:11,089 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 00:02:11,755 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 84 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-24 00:02:11,756 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-24 00:02:11,756 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1399913909] [2024-11-24 00:02:11,756 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1399913909] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-24 00:02:11,756 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-24 00:02:11,756 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-11-24 00:02:11,756 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [641131585] [2024-11-24 00:02:11,756 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-24 00:02:11,757 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-11-24 00:02:11,757 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-24 00:02:11,758 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-11-24 00:02:11,759 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2024-11-24 00:02:11,759 INFO L87 Difference]: Start difference. First operand 605 states and 827 transitions. Second operand has 6 states, 6 states have (on average 51.333333333333336) internal successors, (308), 6 states have internal predecessors, (308), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-24 00:02:12,516 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 00:02:12,516 INFO L93 Difference]: Finished difference Result 1421 states and 1949 transitions. [2024-11-24 00:02:12,516 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-24 00:02:12,517 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 51.333333333333336) internal successors, (308), 6 states have internal predecessors, (308), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 335 [2024-11-24 00:02:12,517 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 00:02:12,522 INFO L225 Difference]: With dead ends: 1421 [2024-11-24 00:02:12,522 INFO L226 Difference]: Without dead ends: 1052 [2024-11-24 00:02:12,523 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2024-11-24 00:02:12,524 INFO L435 NwaCegarLoop]: 455 mSDtfsCounter, 352 mSDsluCounter, 1855 mSDsCounter, 0 mSdLazyCounter, 602 mSolverCounterSat, 9 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 355 SdHoareTripleChecker+Valid, 2310 SdHoareTripleChecker+Invalid, 611 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 9 IncrementalHoareTripleChecker+Valid, 602 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.7s IncrementalHoareTripleChecker+Time [2024-11-24 00:02:12,524 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [355 Valid, 2310 Invalid, 611 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [9 Valid, 602 Invalid, 0 Unknown, 0 Unchecked, 0.7s Time] [2024-11-24 00:02:12,528 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1052 states. [2024-11-24 00:02:12,555 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1052 to 930. [2024-11-24 00:02:12,557 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 930 states, 919 states have (on average 1.3612622415669207) internal successors, (1251), 919 states have internal predecessors, (1251), 9 states have call successors, (9), 1 states have call predecessors, (9), 1 states have return successors, (9), 9 states have call predecessors, (9), 9 states have call successors, (9) [2024-11-24 00:02:12,561 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 930 states to 930 states and 1269 transitions. [2024-11-24 00:02:12,562 INFO L78 Accepts]: Start accepts. Automaton has 930 states and 1269 transitions. Word has length 335 [2024-11-24 00:02:12,562 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 00:02:12,562 INFO L471 AbstractCegarLoop]: Abstraction has 930 states and 1269 transitions. [2024-11-24 00:02:12,563 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 51.333333333333336) internal successors, (308), 6 states have internal predecessors, (308), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-24 00:02:12,563 INFO L276 IsEmpty]: Start isEmpty. Operand 930 states and 1269 transitions. [2024-11-24 00:02:12,566 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 337 [2024-11-24 00:02:12,566 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 00:02:12,566 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 00:02:12,567 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable31 [2024-11-24 00:02:12,567 INFO L396 AbstractCegarLoop]: === Iteration 33 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 00:02:12,567 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 00:02:12,567 INFO L85 PathProgramCache]: Analyzing trace with hash 1268661504, now seen corresponding path program 1 times [2024-11-24 00:02:12,568 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 00:02:12,568 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1881043321] [2024-11-24 00:02:12,568 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 00:02:12,568 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 00:02:13,664 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 00:02:14,496 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 84 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-24 00:02:14,496 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-24 00:02:14,496 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1881043321] [2024-11-24 00:02:14,496 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1881043321] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-24 00:02:14,496 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-24 00:02:14,497 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-11-24 00:02:14,497 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [38199121] [2024-11-24 00:02:14,497 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-24 00:02:14,499 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-11-24 00:02:14,500 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-24 00:02:14,501 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-11-24 00:02:14,501 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2024-11-24 00:02:14,501 INFO L87 Difference]: Start difference. First operand 930 states and 1269 transitions. Second operand has 6 states, 6 states have (on average 51.5) internal successors, (309), 6 states have internal predecessors, (309), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-24 00:02:15,323 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 00:02:15,323 INFO L93 Difference]: Finished difference Result 1322 states and 1808 transitions. [2024-11-24 00:02:15,324 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-24 00:02:15,324 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 51.5) internal successors, (309), 6 states have internal predecessors, (309), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 336 [2024-11-24 00:02:15,325 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 00:02:15,328 INFO L225 Difference]: With dead ends: 1322 [2024-11-24 00:02:15,328 INFO L226 Difference]: Without dead ends: 953 [2024-11-24 00:02:15,329 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2024-11-24 00:02:15,331 INFO L435 NwaCegarLoop]: 395 mSDtfsCounter, 1004 mSDsluCounter, 1155 mSDsCounter, 0 mSdLazyCounter, 635 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1007 SdHoareTripleChecker+Valid, 1550 SdHoareTripleChecker+Invalid, 635 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 635 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.7s IncrementalHoareTripleChecker+Time [2024-11-24 00:02:15,332 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1007 Valid, 1550 Invalid, 635 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 635 Invalid, 0 Unknown, 0 Unchecked, 0.7s Time] [2024-11-24 00:02:15,334 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 953 states. [2024-11-24 00:02:15,360 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 953 to 931. [2024-11-24 00:02:15,362 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 931 states, 920 states have (on average 1.3608695652173912) internal successors, (1252), 920 states have internal predecessors, (1252), 9 states have call successors, (9), 1 states have call predecessors, (9), 1 states have return successors, (9), 9 states have call predecessors, (9), 9 states have call successors, (9) [2024-11-24 00:02:15,365 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 931 states to 931 states and 1270 transitions. [2024-11-24 00:02:15,366 INFO L78 Accepts]: Start accepts. Automaton has 931 states and 1270 transitions. Word has length 336 [2024-11-24 00:02:15,366 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 00:02:15,366 INFO L471 AbstractCegarLoop]: Abstraction has 931 states and 1270 transitions. [2024-11-24 00:02:15,367 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 51.5) internal successors, (309), 6 states have internal predecessors, (309), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-24 00:02:15,367 INFO L276 IsEmpty]: Start isEmpty. Operand 931 states and 1270 transitions. [2024-11-24 00:02:15,369 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 337 [2024-11-24 00:02:15,370 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 00:02:15,370 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 00:02:15,370 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable32 [2024-11-24 00:02:15,370 INFO L396 AbstractCegarLoop]: === Iteration 34 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 00:02:15,371 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 00:02:15,371 INFO L85 PathProgramCache]: Analyzing trace with hash 1769560103, now seen corresponding path program 1 times [2024-11-24 00:02:15,371 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 00:02:15,371 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [391594361] [2024-11-24 00:02:15,372 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 00:02:15,372 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 00:02:16,404 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 00:02:17,855 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 31 proven. 0 refuted. 0 times theorem prover too weak. 113 trivial. 0 not checked. [2024-11-24 00:02:17,856 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-24 00:02:17,856 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [391594361] [2024-11-24 00:02:17,856 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [391594361] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-24 00:02:17,856 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-24 00:02:17,856 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2024-11-24 00:02:17,856 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2073075810] [2024-11-24 00:02:17,856 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-24 00:02:17,857 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2024-11-24 00:02:17,857 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-24 00:02:17,858 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2024-11-24 00:02:17,858 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=36, Unknown=0, NotChecked=0, Total=56 [2024-11-24 00:02:17,858 INFO L87 Difference]: Start difference. First operand 931 states and 1270 transitions. Second operand has 8 states, 8 states have (on average 32.375) internal successors, (259), 8 states have internal predecessors, (259), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-24 00:02:19,835 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 00:02:19,835 INFO L93 Difference]: Finished difference Result 2098 states and 2855 transitions. [2024-11-24 00:02:19,836 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2024-11-24 00:02:19,836 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 32.375) internal successors, (259), 8 states have internal predecessors, (259), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 336 [2024-11-24 00:02:19,836 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 00:02:19,842 INFO L225 Difference]: With dead ends: 2098 [2024-11-24 00:02:19,843 INFO L226 Difference]: Without dead ends: 1615 [2024-11-24 00:02:19,844 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=26, Invalid=46, Unknown=0, NotChecked=0, Total=72 [2024-11-24 00:02:19,845 INFO L435 NwaCegarLoop]: 901 mSDtfsCounter, 1365 mSDsluCounter, 3323 mSDsCounter, 0 mSdLazyCounter, 1866 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1371 SdHoareTripleChecker+Valid, 4224 SdHoareTripleChecker+Invalid, 1867 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 1866 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.8s IncrementalHoareTripleChecker+Time [2024-11-24 00:02:19,845 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1371 Valid, 4224 Invalid, 1867 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 1866 Invalid, 0 Unknown, 0 Unchecked, 1.8s Time] [2024-11-24 00:02:19,848 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1615 states. [2024-11-24 00:02:19,900 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1615 to 1000. [2024-11-24 00:02:19,902 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1000 states, 986 states have (on average 1.3630831643002028) internal successors, (1344), 986 states have internal predecessors, (1344), 12 states have call successors, (12), 1 states have call predecessors, (12), 1 states have return successors, (12), 12 states have call predecessors, (12), 12 states have call successors, (12) [2024-11-24 00:02:19,905 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1000 states to 1000 states and 1368 transitions. [2024-11-24 00:02:19,906 INFO L78 Accepts]: Start accepts. Automaton has 1000 states and 1368 transitions. Word has length 336 [2024-11-24 00:02:19,906 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 00:02:19,906 INFO L471 AbstractCegarLoop]: Abstraction has 1000 states and 1368 transitions. [2024-11-24 00:02:19,906 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 32.375) internal successors, (259), 8 states have internal predecessors, (259), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-24 00:02:19,907 INFO L276 IsEmpty]: Start isEmpty. Operand 1000 states and 1368 transitions. [2024-11-24 00:02:19,911 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 338 [2024-11-24 00:02:19,912 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 00:02:19,912 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 00:02:19,912 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable33 [2024-11-24 00:02:19,913 INFO L396 AbstractCegarLoop]: === Iteration 35 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 00:02:19,913 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 00:02:19,913 INFO L85 PathProgramCache]: Analyzing trace with hash -1598035847, now seen corresponding path program 1 times [2024-11-24 00:02:19,913 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 00:02:19,914 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [522211876] [2024-11-24 00:02:19,914 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 00:02:19,914 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 00:02:21,503 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 00:02:23,169 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 39 proven. 0 refuted. 0 times theorem prover too weak. 105 trivial. 0 not checked. [2024-11-24 00:02:23,169 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-24 00:02:23,169 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [522211876] [2024-11-24 00:02:23,169 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [522211876] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-24 00:02:23,169 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-24 00:02:23,170 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-24 00:02:23,170 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1072575893] [2024-11-24 00:02:23,170 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-24 00:02:23,171 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-24 00:02:23,171 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-24 00:02:23,171 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-24 00:02:23,172 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-11-24 00:02:23,172 INFO L87 Difference]: Start difference. First operand 1000 states and 1368 transitions. Second operand has 5 states, 5 states have (on average 53.8) internal successors, (269), 5 states have internal predecessors, (269), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-24 00:02:23,589 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 00:02:23,589 INFO L93 Difference]: Finished difference Result 1660 states and 2245 transitions. [2024-11-24 00:02:23,589 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-11-24 00:02:23,589 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 53.8) internal successors, (269), 5 states have internal predecessors, (269), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 337 [2024-11-24 00:02:23,590 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 00:02:23,595 INFO L225 Difference]: With dead ends: 1660 [2024-11-24 00:02:23,595 INFO L226 Difference]: Without dead ends: 1012 [2024-11-24 00:02:23,596 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-11-24 00:02:23,597 INFO L435 NwaCegarLoop]: 401 mSDtfsCounter, 321 mSDsluCounter, 781 mSDsCounter, 0 mSdLazyCounter, 460 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 321 SdHoareTripleChecker+Valid, 1182 SdHoareTripleChecker+Invalid, 460 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 460 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2024-11-24 00:02:23,597 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [321 Valid, 1182 Invalid, 460 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 460 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2024-11-24 00:02:23,599 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1012 states. [2024-11-24 00:02:23,631 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1012 to 1006. [2024-11-24 00:02:23,633 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1006 states, 992 states have (on average 1.3608870967741935) internal successors, (1350), 992 states have internal predecessors, (1350), 12 states have call successors, (12), 1 states have call predecessors, (12), 1 states have return successors, (12), 12 states have call predecessors, (12), 12 states have call successors, (12) [2024-11-24 00:02:23,636 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1006 states to 1006 states and 1374 transitions. [2024-11-24 00:02:23,636 INFO L78 Accepts]: Start accepts. Automaton has 1006 states and 1374 transitions. Word has length 337 [2024-11-24 00:02:23,637 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 00:02:23,637 INFO L471 AbstractCegarLoop]: Abstraction has 1006 states and 1374 transitions. [2024-11-24 00:02:23,637 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 53.8) internal successors, (269), 5 states have internal predecessors, (269), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-24 00:02:23,637 INFO L276 IsEmpty]: Start isEmpty. Operand 1006 states and 1374 transitions. [2024-11-24 00:02:23,660 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 338 [2024-11-24 00:02:23,661 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 00:02:23,661 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 00:02:23,662 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable34 [2024-11-24 00:02:23,662 INFO L396 AbstractCegarLoop]: === Iteration 36 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 00:02:23,663 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 00:02:23,663 INFO L85 PathProgramCache]: Analyzing trace with hash 1040159943, now seen corresponding path program 1 times [2024-11-24 00:02:23,663 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 00:02:23,663 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [996327051] [2024-11-24 00:02:23,664 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 00:02:23,664 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 00:02:24,436 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 00:02:25,149 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 48 proven. 0 refuted. 0 times theorem prover too weak. 96 trivial. 0 not checked. [2024-11-24 00:02:25,150 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-24 00:02:25,150 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [996327051] [2024-11-24 00:02:25,150 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [996327051] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-24 00:02:25,150 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-24 00:02:25,150 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-24 00:02:25,150 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [482800050] [2024-11-24 00:02:25,150 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-24 00:02:25,151 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-24 00:02:25,151 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-24 00:02:25,152 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-24 00:02:25,152 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2024-11-24 00:02:25,152 INFO L87 Difference]: Start difference. First operand 1006 states and 1374 transitions. Second operand has 4 states, 4 states have (on average 69.25) internal successors, (277), 4 states have internal predecessors, (277), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-24 00:02:25,547 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 00:02:25,547 INFO L93 Difference]: Finished difference Result 1656 states and 2235 transitions. [2024-11-24 00:02:25,547 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-24 00:02:25,548 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 69.25) internal successors, (277), 4 states have internal predecessors, (277), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 337 [2024-11-24 00:02:25,548 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 00:02:25,552 INFO L225 Difference]: With dead ends: 1656 [2024-11-24 00:02:25,552 INFO L226 Difference]: Without dead ends: 1006 [2024-11-24 00:02:25,553 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2024-11-24 00:02:25,554 INFO L435 NwaCegarLoop]: 402 mSDtfsCounter, 499 mSDsluCounter, 401 mSDsCounter, 0 mSdLazyCounter, 299 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 499 SdHoareTripleChecker+Valid, 803 SdHoareTripleChecker+Invalid, 300 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 299 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2024-11-24 00:02:25,554 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [499 Valid, 803 Invalid, 300 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 299 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2024-11-24 00:02:25,556 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1006 states. [2024-11-24 00:02:25,584 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1006 to 1006. [2024-11-24 00:02:25,586 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1006 states, 992 states have (on average 1.3548387096774193) internal successors, (1344), 992 states have internal predecessors, (1344), 12 states have call successors, (12), 1 states have call predecessors, (12), 1 states have return successors, (12), 12 states have call predecessors, (12), 12 states have call successors, (12) [2024-11-24 00:02:25,588 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1006 states to 1006 states and 1368 transitions. [2024-11-24 00:02:25,588 INFO L78 Accepts]: Start accepts. Automaton has 1006 states and 1368 transitions. Word has length 337 [2024-11-24 00:02:25,589 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 00:02:25,589 INFO L471 AbstractCegarLoop]: Abstraction has 1006 states and 1368 transitions. [2024-11-24 00:02:25,589 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 69.25) internal successors, (277), 4 states have internal predecessors, (277), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-24 00:02:25,589 INFO L276 IsEmpty]: Start isEmpty. Operand 1006 states and 1368 transitions. [2024-11-24 00:02:25,593 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 340 [2024-11-24 00:02:25,593 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 00:02:25,593 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 00:02:25,594 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable35 [2024-11-24 00:02:25,594 INFO L396 AbstractCegarLoop]: === Iteration 37 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 00:02:25,594 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 00:02:25,595 INFO L85 PathProgramCache]: Analyzing trace with hash 2025188781, now seen corresponding path program 1 times [2024-11-24 00:02:25,595 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 00:02:25,595 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [608269626] [2024-11-24 00:02:25,595 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 00:02:25,595 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 00:02:26,848 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 00:02:27,556 INFO L134 CoverageAnalysis]: Checked inductivity of 145 backedges. 7 proven. 0 refuted. 0 times theorem prover too weak. 138 trivial. 0 not checked. [2024-11-24 00:02:27,556 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-24 00:02:27,556 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [608269626] [2024-11-24 00:02:27,556 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [608269626] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-24 00:02:27,556 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-24 00:02:27,557 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-11-24 00:02:27,557 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [930391629] [2024-11-24 00:02:27,557 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-24 00:02:27,557 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-11-24 00:02:27,558 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-24 00:02:27,558 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-11-24 00:02:27,558 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2024-11-24 00:02:27,559 INFO L87 Difference]: Start difference. First operand 1006 states and 1368 transitions. Second operand has 6 states, 6 states have (on average 40.0) internal successors, (240), 6 states have internal predecessors, (240), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-24 00:02:28,198 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 00:02:28,199 INFO L93 Difference]: Finished difference Result 1868 states and 2528 transitions. [2024-11-24 00:02:28,199 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-24 00:02:28,199 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 40.0) internal successors, (240), 6 states have internal predecessors, (240), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 339 [2024-11-24 00:02:28,199 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 00:02:28,203 INFO L225 Difference]: With dead ends: 1868 [2024-11-24 00:02:28,203 INFO L226 Difference]: Without dead ends: 1014 [2024-11-24 00:02:28,204 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=21, Invalid=51, Unknown=0, NotChecked=0, Total=72 [2024-11-24 00:02:28,205 INFO L435 NwaCegarLoop]: 389 mSDtfsCounter, 509 mSDsluCounter, 1160 mSDsCounter, 0 mSdLazyCounter, 650 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 512 SdHoareTripleChecker+Valid, 1549 SdHoareTripleChecker+Invalid, 650 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 650 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2024-11-24 00:02:28,205 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [512 Valid, 1549 Invalid, 650 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 650 Invalid, 0 Unknown, 0 Unchecked, 0.6s Time] [2024-11-24 00:02:28,207 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1014 states. [2024-11-24 00:02:28,243 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1014 to 1010. [2024-11-24 00:02:28,245 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1010 states, 996 states have (on average 1.3534136546184738) internal successors, (1348), 996 states have internal predecessors, (1348), 12 states have call successors, (12), 1 states have call predecessors, (12), 1 states have return successors, (12), 12 states have call predecessors, (12), 12 states have call successors, (12) [2024-11-24 00:02:28,248 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1010 states to 1010 states and 1372 transitions. [2024-11-24 00:02:28,248 INFO L78 Accepts]: Start accepts. Automaton has 1010 states and 1372 transitions. Word has length 339 [2024-11-24 00:02:28,248 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 00:02:28,248 INFO L471 AbstractCegarLoop]: Abstraction has 1010 states and 1372 transitions. [2024-11-24 00:02:28,249 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 40.0) internal successors, (240), 6 states have internal predecessors, (240), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-24 00:02:28,249 INFO L276 IsEmpty]: Start isEmpty. Operand 1010 states and 1372 transitions. [2024-11-24 00:02:28,253 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 342 [2024-11-24 00:02:28,254 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 00:02:28,254 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 00:02:28,254 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable36 [2024-11-24 00:02:28,254 INFO L396 AbstractCegarLoop]: === Iteration 38 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 00:02:28,255 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 00:02:28,255 INFO L85 PathProgramCache]: Analyzing trace with hash 615740921, now seen corresponding path program 1 times [2024-11-24 00:02:28,255 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 00:02:28,255 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [429407149] [2024-11-24 00:02:28,256 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 00:02:28,256 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 00:02:29,438 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 00:02:30,880 INFO L134 CoverageAnalysis]: Checked inductivity of 146 backedges. 4 proven. 82 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-24 00:02:30,880 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-24 00:02:30,881 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [429407149] [2024-11-24 00:02:30,881 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [429407149] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-24 00:02:30,881 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1498747949] [2024-11-24 00:02:30,881 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 00:02:30,881 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-24 00:02:30,881 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_328789b6-5d68-4a2f-beb0-52c77b3443fd/bin/uautomizer-verify-LYvppIcaGC/z3 [2024-11-24 00:02:30,886 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_328789b6-5d68-4a2f-beb0-52c77b3443fd/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-24 00:02:30,889 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_328789b6-5d68-4a2f-beb0-52c77b3443fd/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2024-11-24 00:02:32,275 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 00:02:32,284 INFO L256 TraceCheckSpWp]: Trace formula consists of 2047 conjuncts, 35 conjuncts are in the unsatisfiable core [2024-11-24 00:02:32,299 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-24 00:02:32,819 INFO L134 CoverageAnalysis]: Checked inductivity of 146 backedges. 60 proven. 0 refuted. 0 times theorem prover too weak. 86 trivial. 0 not checked. [2024-11-24 00:02:32,819 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-11-24 00:02:32,819 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1498747949] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-24 00:02:32,819 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-11-24 00:02:32,819 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [11] total 19 [2024-11-24 00:02:32,820 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2118973278] [2024-11-24 00:02:32,820 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-24 00:02:32,820 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 10 states [2024-11-24 00:02:32,821 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-24 00:02:32,822 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2024-11-24 00:02:32,822 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=43, Invalid=299, Unknown=0, NotChecked=0, Total=342 [2024-11-24 00:02:32,822 INFO L87 Difference]: Start difference. First operand 1010 states and 1372 transitions. Second operand has 10 states, 10 states have (on average 26.3) internal successors, (263), 10 states have internal predecessors, (263), 2 states have call successors, (5), 2 states have call predecessors, (5), 2 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) [2024-11-24 00:02:33,889 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 00:02:33,890 INFO L93 Difference]: Finished difference Result 1843 states and 2492 transitions. [2024-11-24 00:02:33,890 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2024-11-24 00:02:33,890 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 10 states have (on average 26.3) internal successors, (263), 10 states have internal predecessors, (263), 2 states have call successors, (5), 2 states have call predecessors, (5), 2 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) Word has length 341 [2024-11-24 00:02:33,891 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 00:02:33,894 INFO L225 Difference]: With dead ends: 1843 [2024-11-24 00:02:33,895 INFO L226 Difference]: Without dead ends: 1030 [2024-11-24 00:02:33,896 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 354 GetRequests, 334 SyntacticMatches, 0 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 67 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=55, Invalid=407, Unknown=0, NotChecked=0, Total=462 [2024-11-24 00:02:33,897 INFO L435 NwaCegarLoop]: 378 mSDtfsCounter, 496 mSDsluCounter, 2592 mSDsCounter, 0 mSdLazyCounter, 1374 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.8s Time, 0 mProtectedPredicate, 0 mProtectedAction, 497 SdHoareTripleChecker+Valid, 2970 SdHoareTripleChecker+Invalid, 1377 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 1374 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.9s IncrementalHoareTripleChecker+Time [2024-11-24 00:02:33,897 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [497 Valid, 2970 Invalid, 1377 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 1374 Invalid, 0 Unknown, 0 Unchecked, 0.9s Time] [2024-11-24 00:02:33,899 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1030 states. [2024-11-24 00:02:33,939 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1030 to 1022. [2024-11-24 00:02:33,941 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1022 states, 1008 states have (on average 1.3412698412698412) internal successors, (1352), 1008 states have internal predecessors, (1352), 12 states have call successors, (12), 1 states have call predecessors, (12), 1 states have return successors, (12), 12 states have call predecessors, (12), 12 states have call successors, (12) [2024-11-24 00:02:33,944 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1022 states to 1022 states and 1376 transitions. [2024-11-24 00:02:33,945 INFO L78 Accepts]: Start accepts. Automaton has 1022 states and 1376 transitions. Word has length 341 [2024-11-24 00:02:33,945 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 00:02:33,945 INFO L471 AbstractCegarLoop]: Abstraction has 1022 states and 1376 transitions. [2024-11-24 00:02:33,946 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 10 states, 10 states have (on average 26.3) internal successors, (263), 10 states have internal predecessors, (263), 2 states have call successors, (5), 2 states have call predecessors, (5), 2 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) [2024-11-24 00:02:33,946 INFO L276 IsEmpty]: Start isEmpty. Operand 1022 states and 1376 transitions. [2024-11-24 00:02:33,951 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 346 [2024-11-24 00:02:33,952 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 00:02:33,952 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 00:02:33,971 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_328789b6-5d68-4a2f-beb0-52c77b3443fd/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Forceful destruction successful, exit code 0 [2024-11-24 00:02:34,152 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_328789b6-5d68-4a2f-beb0-52c77b3443fd/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable37 [2024-11-24 00:02:34,153 INFO L396 AbstractCegarLoop]: === Iteration 39 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 00:02:34,153 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 00:02:34,154 INFO L85 PathProgramCache]: Analyzing trace with hash 545994611, now seen corresponding path program 1 times [2024-11-24 00:02:34,154 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 00:02:34,154 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1841984788] [2024-11-24 00:02:34,154 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 00:02:34,154 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 00:02:35,501 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 00:02:36,918 INFO L134 CoverageAnalysis]: Checked inductivity of 148 backedges. 4 proven. 84 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-24 00:02:36,918 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-24 00:02:36,918 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1841984788] [2024-11-24 00:02:36,918 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1841984788] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-24 00:02:36,918 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [410563381] [2024-11-24 00:02:36,918 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 00:02:36,918 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-24 00:02:36,919 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_328789b6-5d68-4a2f-beb0-52c77b3443fd/bin/uautomizer-verify-LYvppIcaGC/z3 [2024-11-24 00:02:36,924 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_328789b6-5d68-4a2f-beb0-52c77b3443fd/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-24 00:02:36,927 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_328789b6-5d68-4a2f-beb0-52c77b3443fd/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2024-11-24 00:02:38,250 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 00:02:38,260 INFO L256 TraceCheckSpWp]: Trace formula consists of 2055 conjuncts, 33 conjuncts are in the unsatisfiable core [2024-11-24 00:02:38,272 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-24 00:02:38,612 INFO L134 CoverageAnalysis]: Checked inductivity of 148 backedges. 40 proven. 0 refuted. 0 times theorem prover too weak. 108 trivial. 0 not checked. [2024-11-24 00:02:38,612 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-11-24 00:02:38,613 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [410563381] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-24 00:02:38,613 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-11-24 00:02:38,613 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [11] total 15 [2024-11-24 00:02:38,613 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1397990432] [2024-11-24 00:02:38,613 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-24 00:02:38,614 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-11-24 00:02:38,614 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-24 00:02:38,615 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-11-24 00:02:38,615 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=34, Invalid=176, Unknown=0, NotChecked=0, Total=210 [2024-11-24 00:02:38,615 INFO L87 Difference]: Start difference. First operand 1022 states and 1376 transitions. Second operand has 6 states, 6 states have (on average 43.0) internal successors, (258), 6 states have internal predecessors, (258), 2 states have call successors, (4), 2 states have call predecessors, (4), 2 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) [2024-11-24 00:02:39,139 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 00:02:39,140 INFO L93 Difference]: Finished difference Result 1851 states and 2481 transitions. [2024-11-24 00:02:39,140 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-24 00:02:39,140 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 43.0) internal successors, (258), 6 states have internal predecessors, (258), 2 states have call successors, (4), 2 states have call predecessors, (4), 2 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) Word has length 345 [2024-11-24 00:02:39,140 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 00:02:39,143 INFO L225 Difference]: With dead ends: 1851 [2024-11-24 00:02:39,143 INFO L226 Difference]: Without dead ends: 1038 [2024-11-24 00:02:39,144 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 355 GetRequests, 342 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 24 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=34, Invalid=176, Unknown=0, NotChecked=0, Total=210 [2024-11-24 00:02:39,144 INFO L435 NwaCegarLoop]: 387 mSDtfsCounter, 488 mSDsluCounter, 1154 mSDsCounter, 0 mSdLazyCounter, 650 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 490 SdHoareTripleChecker+Valid, 1541 SdHoareTripleChecker+Invalid, 651 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 650 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2024-11-24 00:02:39,144 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [490 Valid, 1541 Invalid, 651 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 650 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2024-11-24 00:02:39,146 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1038 states. [2024-11-24 00:02:39,173 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1038 to 1034. [2024-11-24 00:02:39,178 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1034 states, 1020 states have (on average 1.3372549019607842) internal successors, (1364), 1020 states have internal predecessors, (1364), 12 states have call successors, (12), 1 states have call predecessors, (12), 1 states have return successors, (12), 12 states have call predecessors, (12), 12 states have call successors, (12) [2024-11-24 00:02:39,180 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1034 states to 1034 states and 1388 transitions. [2024-11-24 00:02:39,181 INFO L78 Accepts]: Start accepts. Automaton has 1034 states and 1388 transitions. Word has length 345 [2024-11-24 00:02:39,185 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 00:02:39,185 INFO L471 AbstractCegarLoop]: Abstraction has 1034 states and 1388 transitions. [2024-11-24 00:02:39,185 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 43.0) internal successors, (258), 6 states have internal predecessors, (258), 2 states have call successors, (4), 2 states have call predecessors, (4), 2 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) [2024-11-24 00:02:39,185 INFO L276 IsEmpty]: Start isEmpty. Operand 1034 states and 1388 transitions. [2024-11-24 00:02:39,189 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 350 [2024-11-24 00:02:39,190 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 00:02:39,191 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 00:02:39,208 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_328789b6-5d68-4a2f-beb0-52c77b3443fd/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Ended with exit code 0 [2024-11-24 00:02:39,391 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 4 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_328789b6-5d68-4a2f-beb0-52c77b3443fd/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable38 [2024-11-24 00:02:39,392 INFO L396 AbstractCegarLoop]: === Iteration 40 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 00:02:39,392 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 00:02:39,393 INFO L85 PathProgramCache]: Analyzing trace with hash 568587949, now seen corresponding path program 1 times [2024-11-24 00:02:39,393 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 00:02:39,393 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [418567806] [2024-11-24 00:02:39,393 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 00:02:39,393 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 00:02:40,452 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 00:02:42,087 INFO L134 CoverageAnalysis]: Checked inductivity of 150 backedges. 4 proven. 86 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-24 00:02:42,088 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-24 00:02:42,088 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [418567806] [2024-11-24 00:02:42,088 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [418567806] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-24 00:02:42,088 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1736857540] [2024-11-24 00:02:42,088 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 00:02:42,088 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-24 00:02:42,088 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_328789b6-5d68-4a2f-beb0-52c77b3443fd/bin/uautomizer-verify-LYvppIcaGC/z3 [2024-11-24 00:02:42,090 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_328789b6-5d68-4a2f-beb0-52c77b3443fd/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-24 00:02:42,091 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_328789b6-5d68-4a2f-beb0-52c77b3443fd/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2024-11-24 00:02:44,263 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 00:02:44,275 INFO L256 TraceCheckSpWp]: Trace formula consists of 2063 conjuncts, 26 conjuncts are in the unsatisfiable core [2024-11-24 00:02:44,285 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-24 00:02:45,057 INFO L134 CoverageAnalysis]: Checked inductivity of 150 backedges. 120 proven. 0 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2024-11-24 00:02:45,057 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-11-24 00:02:45,057 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1736857540] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-24 00:02:45,058 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-11-24 00:02:45,058 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [11] total 18 [2024-11-24 00:02:45,059 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1826684009] [2024-11-24 00:02:45,059 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-24 00:02:45,060 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 9 states [2024-11-24 00:02:45,060 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-24 00:02:45,061 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2024-11-24 00:02:45,061 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=42, Invalid=264, Unknown=0, NotChecked=0, Total=306 [2024-11-24 00:02:45,062 INFO L87 Difference]: Start difference. First operand 1034 states and 1388 transitions. Second operand has 9 states, 9 states have (on average 35.77777777777778) internal successors, (322), 9 states have internal predecessors, (322), 2 states have call successors, (6), 2 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-24 00:02:45,903 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 00:02:45,903 INFO L93 Difference]: Finished difference Result 2441 states and 3260 transitions. [2024-11-24 00:02:45,903 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2024-11-24 00:02:45,903 INFO L78 Accepts]: Start accepts. Automaton has has 9 states, 9 states have (on average 35.77777777777778) internal successors, (322), 9 states have internal predecessors, (322), 2 states have call successors, (6), 2 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 349 [2024-11-24 00:02:45,904 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 00:02:45,909 INFO L225 Difference]: With dead ends: 2441 [2024-11-24 00:02:45,909 INFO L226 Difference]: Without dead ends: 1796 [2024-11-24 00:02:45,910 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 362 GetRequests, 343 SyntacticMatches, 0 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 62 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=60, Invalid=360, Unknown=0, NotChecked=0, Total=420 [2024-11-24 00:02:45,911 INFO L435 NwaCegarLoop]: 385 mSDtfsCounter, 1595 mSDsluCounter, 1708 mSDsCounter, 0 mSdLazyCounter, 941 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1598 SdHoareTripleChecker+Valid, 2093 SdHoareTripleChecker+Invalid, 942 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 941 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.7s IncrementalHoareTripleChecker+Time [2024-11-24 00:02:45,911 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1598 Valid, 2093 Invalid, 942 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 941 Invalid, 0 Unknown, 0 Unchecked, 0.7s Time] [2024-11-24 00:02:45,913 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1796 states. [2024-11-24 00:02:45,955 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1796 to 1450. [2024-11-24 00:02:45,957 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1450 states, 1427 states have (on average 1.3160476524176594) internal successors, (1878), 1427 states have internal predecessors, (1878), 21 states have call successors, (21), 1 states have call predecessors, (21), 1 states have return successors, (21), 21 states have call predecessors, (21), 21 states have call successors, (21) [2024-11-24 00:02:45,960 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1450 states to 1450 states and 1920 transitions. [2024-11-24 00:02:45,960 INFO L78 Accepts]: Start accepts. Automaton has 1450 states and 1920 transitions. Word has length 349 [2024-11-24 00:02:45,960 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 00:02:45,961 INFO L471 AbstractCegarLoop]: Abstraction has 1450 states and 1920 transitions. [2024-11-24 00:02:45,961 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 9 states, 9 states have (on average 35.77777777777778) internal successors, (322), 9 states have internal predecessors, (322), 2 states have call successors, (6), 2 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-24 00:02:45,961 INFO L276 IsEmpty]: Start isEmpty. Operand 1450 states and 1920 transitions. [2024-11-24 00:02:45,965 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 350 [2024-11-24 00:02:45,966 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 00:02:45,966 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 00:02:45,986 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_328789b6-5d68-4a2f-beb0-52c77b3443fd/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Ended with exit code 0 [2024-11-24 00:02:46,167 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 5 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_328789b6-5d68-4a2f-beb0-52c77b3443fd/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable39 [2024-11-24 00:02:46,167 INFO L396 AbstractCegarLoop]: === Iteration 41 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 00:02:46,168 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 00:02:46,168 INFO L85 PathProgramCache]: Analyzing trace with hash -96894230, now seen corresponding path program 1 times [2024-11-24 00:02:46,168 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 00:02:46,168 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [463130664] [2024-11-24 00:02:46,168 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 00:02:46,169 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 00:02:46,411 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 00:02:46,824 INFO L134 CoverageAnalysis]: Checked inductivity of 149 backedges. 48 proven. 0 refuted. 0 times theorem prover too weak. 101 trivial. 0 not checked. [2024-11-24 00:02:46,824 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-24 00:02:46,824 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [463130664] [2024-11-24 00:02:46,824 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [463130664] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-24 00:02:46,824 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-24 00:02:46,824 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-24 00:02:46,825 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1181554131] [2024-11-24 00:02:46,825 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-24 00:02:46,826 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-24 00:02:46,826 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-24 00:02:46,826 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-24 00:02:46,827 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-11-24 00:02:46,827 INFO L87 Difference]: Start difference. First operand 1450 states and 1920 transitions. Second operand has 5 states, 5 states have (on average 57.0) internal successors, (285), 5 states have internal predecessors, (285), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-24 00:02:46,901 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 00:02:46,901 INFO L93 Difference]: Finished difference Result 2245 states and 2981 transitions. [2024-11-24 00:02:46,902 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-11-24 00:02:46,902 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 57.0) internal successors, (285), 5 states have internal predecessors, (285), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 349 [2024-11-24 00:02:46,903 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 00:02:46,909 INFO L225 Difference]: With dead ends: 2245 [2024-11-24 00:02:46,909 INFO L226 Difference]: Without dead ends: 1540 [2024-11-24 00:02:46,910 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-11-24 00:02:46,911 INFO L435 NwaCegarLoop]: 544 mSDtfsCounter, 16 mSDsluCounter, 1620 mSDsCounter, 0 mSdLazyCounter, 23 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 16 SdHoareTripleChecker+Valid, 2164 SdHoareTripleChecker+Invalid, 23 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 23 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-24 00:02:46,911 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [16 Valid, 2164 Invalid, 23 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 23 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-24 00:02:46,913 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1540 states. [2024-11-24 00:02:46,990 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1540 to 1540. [2024-11-24 00:02:46,992 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1540 states, 1517 states have (on average 1.3236651285431773) internal successors, (2008), 1517 states have internal predecessors, (2008), 21 states have call successors, (21), 1 states have call predecessors, (21), 1 states have return successors, (21), 21 states have call predecessors, (21), 21 states have call successors, (21) [2024-11-24 00:02:46,995 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1540 states to 1540 states and 2050 transitions. [2024-11-24 00:02:46,996 INFO L78 Accepts]: Start accepts. Automaton has 1540 states and 2050 transitions. Word has length 349 [2024-11-24 00:02:46,997 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 00:02:46,997 INFO L471 AbstractCegarLoop]: Abstraction has 1540 states and 2050 transitions. [2024-11-24 00:02:46,997 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 57.0) internal successors, (285), 5 states have internal predecessors, (285), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-24 00:02:46,997 INFO L276 IsEmpty]: Start isEmpty. Operand 1540 states and 2050 transitions. [2024-11-24 00:02:47,001 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 351 [2024-11-24 00:02:47,002 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 00:02:47,002 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 00:02:47,002 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable40 [2024-11-24 00:02:47,002 INFO L396 AbstractCegarLoop]: === Iteration 42 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 00:02:47,003 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 00:02:47,003 INFO L85 PathProgramCache]: Analyzing trace with hash -1377398202, now seen corresponding path program 1 times [2024-11-24 00:02:47,003 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 00:02:47,004 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [427811198] [2024-11-24 00:02:47,004 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 00:02:47,004 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 00:02:48,319 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 00:02:49,842 INFO L134 CoverageAnalysis]: Checked inductivity of 150 backedges. 4 proven. 86 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-24 00:02:49,842 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-24 00:02:49,842 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [427811198] [2024-11-24 00:02:49,842 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [427811198] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-24 00:02:49,842 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1517137645] [2024-11-24 00:02:49,843 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 00:02:49,843 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-24 00:02:49,843 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_328789b6-5d68-4a2f-beb0-52c77b3443fd/bin/uautomizer-verify-LYvppIcaGC/z3 [2024-11-24 00:02:49,845 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_328789b6-5d68-4a2f-beb0-52c77b3443fd/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-24 00:02:49,846 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_328789b6-5d68-4a2f-beb0-52c77b3443fd/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2024-11-24 00:02:52,078 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 00:02:52,088 INFO L256 TraceCheckSpWp]: Trace formula consists of 2066 conjuncts, 24 conjuncts are in the unsatisfiable core [2024-11-24 00:02:52,095 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-24 00:02:52,425 INFO L134 CoverageAnalysis]: Checked inductivity of 150 backedges. 84 proven. 6 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-24 00:02:52,425 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-24 00:02:52,934 INFO L134 CoverageAnalysis]: Checked inductivity of 150 backedges. 90 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-24 00:02:52,934 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1517137645] provided 1 perfect and 1 imperfect interpolant sequences [2024-11-24 00:02:52,935 INFO L185 FreeRefinementEngine]: Found 1 perfect and 2 imperfect interpolant sequences. [2024-11-24 00:02:52,935 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [11, 8] total 22 [2024-11-24 00:02:52,935 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [400211012] [2024-11-24 00:02:52,935 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-24 00:02:52,936 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2024-11-24 00:02:52,936 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-24 00:02:52,937 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-11-24 00:02:52,937 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=52, Invalid=410, Unknown=0, NotChecked=0, Total=462 [2024-11-24 00:02:52,937 INFO L87 Difference]: Start difference. First operand 1540 states and 2050 transitions. Second operand has 7 states, 7 states have (on average 46.142857142857146) internal successors, (323), 7 states have internal predecessors, (323), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-24 00:02:53,119 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 00:02:53,119 INFO L93 Difference]: Finished difference Result 2330 states and 3121 transitions. [2024-11-24 00:02:53,120 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2024-11-24 00:02:53,120 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 46.142857142857146) internal successors, (323), 7 states have internal predecessors, (323), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 350 [2024-11-24 00:02:53,121 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 00:02:53,126 INFO L225 Difference]: With dead ends: 2330 [2024-11-24 00:02:53,127 INFO L226 Difference]: Without dead ends: 1934 [2024-11-24 00:02:53,128 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 712 GetRequests, 690 SyntacticMatches, 0 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 79 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=61, Invalid=491, Unknown=0, NotChecked=0, Total=552 [2024-11-24 00:02:53,129 INFO L435 NwaCegarLoop]: 966 mSDtfsCounter, 352 mSDsluCounter, 4382 mSDsCounter, 0 mSdLazyCounter, 74 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 352 SdHoareTripleChecker+Valid, 5348 SdHoareTripleChecker+Invalid, 75 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 74 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-24 00:02:53,129 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [352 Valid, 5348 Invalid, 75 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 74 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-24 00:02:53,131 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1934 states. [2024-11-24 00:02:53,175 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1934 to 1731. [2024-11-24 00:02:53,177 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1731 states, 1705 states have (on average 1.3184750733137829) internal successors, (2248), 1705 states have internal predecessors, (2248), 24 states have call successors, (24), 1 states have call predecessors, (24), 1 states have return successors, (24), 24 states have call predecessors, (24), 24 states have call successors, (24) [2024-11-24 00:02:53,182 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1731 states to 1731 states and 2296 transitions. [2024-11-24 00:02:53,184 INFO L78 Accepts]: Start accepts. Automaton has 1731 states and 2296 transitions. Word has length 350 [2024-11-24 00:02:53,185 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 00:02:53,189 INFO L471 AbstractCegarLoop]: Abstraction has 1731 states and 2296 transitions. [2024-11-24 00:02:53,189 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 46.142857142857146) internal successors, (323), 7 states have internal predecessors, (323), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-24 00:02:53,189 INFO L276 IsEmpty]: Start isEmpty. Operand 1731 states and 2296 transitions. [2024-11-24 00:02:53,193 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 352 [2024-11-24 00:02:53,195 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 00:02:53,196 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 00:02:53,218 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_328789b6-5d68-4a2f-beb0-52c77b3443fd/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Forceful destruction successful, exit code 0 [2024-11-24 00:02:53,396 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 6 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_328789b6-5d68-4a2f-beb0-52c77b3443fd/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable41 [2024-11-24 00:02:53,397 INFO L396 AbstractCegarLoop]: === Iteration 43 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 00:02:53,397 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 00:02:53,397 INFO L85 PathProgramCache]: Analyzing trace with hash 1364522509, now seen corresponding path program 1 times [2024-11-24 00:02:53,397 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 00:02:53,398 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [912984314] [2024-11-24 00:02:53,398 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 00:02:53,398 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 00:02:54,921 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 00:02:56,652 INFO L134 CoverageAnalysis]: Checked inductivity of 151 backedges. 44 proven. 0 refuted. 0 times theorem prover too weak. 107 trivial. 0 not checked. [2024-11-24 00:02:56,652 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-24 00:02:56,652 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [912984314] [2024-11-24 00:02:56,653 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [912984314] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-24 00:02:56,653 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-24 00:02:56,653 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2024-11-24 00:02:56,653 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1828295970] [2024-11-24 00:02:56,653 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-24 00:02:56,653 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 9 states [2024-11-24 00:02:56,653 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-24 00:02:56,654 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2024-11-24 00:02:56,655 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=52, Unknown=0, NotChecked=0, Total=72 [2024-11-24 00:02:56,655 INFO L87 Difference]: Start difference. First operand 1731 states and 2296 transitions. Second operand has 9 states, 9 states have (on average 31.11111111111111) internal successors, (280), 9 states have internal predecessors, (280), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) [2024-11-24 00:02:58,367 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 00:02:58,367 INFO L93 Difference]: Finished difference Result 4108 states and 5378 transitions. [2024-11-24 00:02:58,368 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2024-11-24 00:02:58,368 INFO L78 Accepts]: Start accepts. Automaton has has 9 states, 9 states have (on average 31.11111111111111) internal successors, (280), 9 states have internal predecessors, (280), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) Word has length 351 [2024-11-24 00:02:58,368 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 00:02:58,376 INFO L225 Difference]: With dead ends: 4108 [2024-11-24 00:02:58,377 INFO L226 Difference]: Without dead ends: 2976 [2024-11-24 00:02:58,379 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 20 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=61, Invalid=149, Unknown=0, NotChecked=0, Total=210 [2024-11-24 00:02:58,380 INFO L435 NwaCegarLoop]: 601 mSDtfsCounter, 849 mSDsluCounter, 2743 mSDsCounter, 0 mSdLazyCounter, 1576 mSolverCounterSat, 5 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 850 SdHoareTripleChecker+Valid, 3344 SdHoareTripleChecker+Invalid, 1581 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 5 IncrementalHoareTripleChecker+Valid, 1576 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.4s IncrementalHoareTripleChecker+Time [2024-11-24 00:02:58,381 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [850 Valid, 3344 Invalid, 1581 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [5 Valid, 1576 Invalid, 0 Unknown, 0 Unchecked, 1.4s Time] [2024-11-24 00:02:58,384 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2976 states. [2024-11-24 00:02:58,454 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2976 to 2023. [2024-11-24 00:02:58,456 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2023 states, 1989 states have (on average 1.3252890899949723) internal successors, (2636), 1989 states have internal predecessors, (2636), 32 states have call successors, (32), 1 states have call predecessors, (32), 1 states have return successors, (32), 32 states have call predecessors, (32), 32 states have call successors, (32) [2024-11-24 00:02:58,461 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2023 states to 2023 states and 2700 transitions. [2024-11-24 00:02:58,461 INFO L78 Accepts]: Start accepts. Automaton has 2023 states and 2700 transitions. Word has length 351 [2024-11-24 00:02:58,462 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 00:02:58,462 INFO L471 AbstractCegarLoop]: Abstraction has 2023 states and 2700 transitions. [2024-11-24 00:02:58,462 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 9 states, 9 states have (on average 31.11111111111111) internal successors, (280), 9 states have internal predecessors, (280), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) [2024-11-24 00:02:58,462 INFO L276 IsEmpty]: Start isEmpty. Operand 2023 states and 2700 transitions. [2024-11-24 00:02:58,470 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 352 [2024-11-24 00:02:58,471 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 00:02:58,471 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 00:02:58,471 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable42 [2024-11-24 00:02:58,472 INFO L396 AbstractCegarLoop]: === Iteration 44 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 00:02:58,472 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 00:02:58,472 INFO L85 PathProgramCache]: Analyzing trace with hash -1052605939, now seen corresponding path program 1 times [2024-11-24 00:02:58,472 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 00:02:58,473 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1321007612] [2024-11-24 00:02:58,473 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 00:02:58,473 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 00:03:00,696 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 00:03:02,285 INFO L134 CoverageAnalysis]: Checked inductivity of 151 backedges. 4 proven. 87 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-24 00:03:02,285 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-24 00:03:02,285 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1321007612] [2024-11-24 00:03:02,285 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1321007612] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-24 00:03:02,285 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1922377559] [2024-11-24 00:03:02,285 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 00:03:02,285 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-24 00:03:02,285 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_328789b6-5d68-4a2f-beb0-52c77b3443fd/bin/uautomizer-verify-LYvppIcaGC/z3 [2024-11-24 00:03:02,288 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_328789b6-5d68-4a2f-beb0-52c77b3443fd/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-24 00:03:02,292 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_328789b6-5d68-4a2f-beb0-52c77b3443fd/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2024-11-24 00:03:04,449 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 00:03:04,461 INFO L256 TraceCheckSpWp]: Trace formula consists of 2069 conjuncts, 42 conjuncts are in the unsatisfiable core [2024-11-24 00:03:04,473 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-24 00:03:05,575 INFO L134 CoverageAnalysis]: Checked inductivity of 151 backedges. 123 proven. 4 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2024-11-24 00:03:05,576 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-24 00:03:07,595 INFO L134 CoverageAnalysis]: Checked inductivity of 151 backedges. 87 proven. 4 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-24 00:03:07,595 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1922377559] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-24 00:03:07,595 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-24 00:03:07,595 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 8, 8] total 23 [2024-11-24 00:03:07,596 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [846290391] [2024-11-24 00:03:07,596 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-24 00:03:07,597 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 23 states [2024-11-24 00:03:07,597 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-24 00:03:07,598 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2024-11-24 00:03:07,598 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=64, Invalid=442, Unknown=0, NotChecked=0, Total=506 [2024-11-24 00:03:07,599 INFO L87 Difference]: Start difference. First operand 2023 states and 2700 transitions. Second operand has 23 states, 23 states have (on average 38.0) internal successors, (874), 23 states have internal predecessors, (874), 5 states have call successors, (18), 2 states have call predecessors, (18), 2 states have return successors, (18), 5 states have call predecessors, (18), 5 states have call successors, (18) [2024-11-24 00:03:09,655 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 00:03:09,655 INFO L93 Difference]: Finished difference Result 2709 states and 3619 transitions. [2024-11-24 00:03:09,656 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2024-11-24 00:03:09,656 INFO L78 Accepts]: Start accepts. Automaton has has 23 states, 23 states have (on average 38.0) internal successors, (874), 23 states have internal predecessors, (874), 5 states have call successors, (18), 2 states have call predecessors, (18), 2 states have return successors, (18), 5 states have call predecessors, (18), 5 states have call successors, (18) Word has length 351 [2024-11-24 00:03:09,657 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 00:03:09,660 INFO L225 Difference]: With dead ends: 2709 [2024-11-24 00:03:09,660 INFO L226 Difference]: Without dead ends: 2036 [2024-11-24 00:03:09,661 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 722 GetRequests, 690 SyntacticMatches, 0 SemanticMatches, 32 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 187 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=189, Invalid=933, Unknown=0, NotChecked=0, Total=1122 [2024-11-24 00:03:09,661 INFO L435 NwaCegarLoop]: 494 mSDtfsCounter, 842 mSDsluCounter, 5889 mSDsCounter, 0 mSdLazyCounter, 2829 mSolverCounterSat, 5 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 845 SdHoareTripleChecker+Valid, 6383 SdHoareTripleChecker+Invalid, 2834 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 5 IncrementalHoareTripleChecker+Valid, 2829 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.7s IncrementalHoareTripleChecker+Time [2024-11-24 00:03:09,662 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [845 Valid, 6383 Invalid, 2834 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [5 Valid, 2829 Invalid, 0 Unknown, 0 Unchecked, 1.7s Time] [2024-11-24 00:03:09,663 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2036 states. [2024-11-24 00:03:09,702 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2036 to 2028. [2024-11-24 00:03:09,704 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2028 states, 1994 states have (on average 1.324974924774323) internal successors, (2642), 1994 states have internal predecessors, (2642), 32 states have call successors, (32), 1 states have call predecessors, (32), 1 states have return successors, (32), 32 states have call predecessors, (32), 32 states have call successors, (32) [2024-11-24 00:03:09,708 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2028 states to 2028 states and 2706 transitions. [2024-11-24 00:03:09,708 INFO L78 Accepts]: Start accepts. Automaton has 2028 states and 2706 transitions. Word has length 351 [2024-11-24 00:03:09,709 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 00:03:09,709 INFO L471 AbstractCegarLoop]: Abstraction has 2028 states and 2706 transitions. [2024-11-24 00:03:09,709 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 23 states, 23 states have (on average 38.0) internal successors, (874), 23 states have internal predecessors, (874), 5 states have call successors, (18), 2 states have call predecessors, (18), 2 states have return successors, (18), 5 states have call predecessors, (18), 5 states have call successors, (18) [2024-11-24 00:03:09,710 INFO L276 IsEmpty]: Start isEmpty. Operand 2028 states and 2706 transitions. [2024-11-24 00:03:09,713 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 352 [2024-11-24 00:03:09,714 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 00:03:09,714 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 00:03:09,735 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_328789b6-5d68-4a2f-beb0-52c77b3443fd/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Ended with exit code 0 [2024-11-24 00:03:09,914 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 7 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_328789b6-5d68-4a2f-beb0-52c77b3443fd/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable43 [2024-11-24 00:03:09,915 INFO L396 AbstractCegarLoop]: === Iteration 45 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 00:03:09,916 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 00:03:09,916 INFO L85 PathProgramCache]: Analyzing trace with hash 619985329, now seen corresponding path program 1 times [2024-11-24 00:03:09,916 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 00:03:09,916 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2044481436] [2024-11-24 00:03:09,916 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 00:03:09,917 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 00:03:11,756 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 00:03:13,769 INFO L134 CoverageAnalysis]: Checked inductivity of 148 backedges. 38 proven. 0 refuted. 0 times theorem prover too weak. 110 trivial. 0 not checked. [2024-11-24 00:03:13,769 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-24 00:03:13,770 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2044481436] [2024-11-24 00:03:13,770 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2044481436] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-24 00:03:13,770 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-24 00:03:13,770 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2024-11-24 00:03:13,770 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [427700919] [2024-11-24 00:03:13,770 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-24 00:03:13,770 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 10 states [2024-11-24 00:03:13,771 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-24 00:03:13,771 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2024-11-24 00:03:13,771 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=69, Unknown=0, NotChecked=0, Total=90 [2024-11-24 00:03:13,772 INFO L87 Difference]: Start difference. First operand 2028 states and 2706 transitions. Second operand has 10 states, 10 states have (on average 27.9) internal successors, (279), 10 states have internal predecessors, (279), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) [2024-11-24 00:03:14,256 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 00:03:14,256 INFO L93 Difference]: Finished difference Result 3696 states and 4918 transitions. [2024-11-24 00:03:14,257 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2024-11-24 00:03:14,257 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 10 states have (on average 27.9) internal successors, (279), 10 states have internal predecessors, (279), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) Word has length 351 [2024-11-24 00:03:14,257 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 00:03:14,262 INFO L225 Difference]: With dead ends: 3696 [2024-11-24 00:03:14,262 INFO L226 Difference]: Without dead ends: 2618 [2024-11-24 00:03:14,264 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 19 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=56, Invalid=154, Unknown=0, NotChecked=0, Total=210 [2024-11-24 00:03:14,265 INFO L435 NwaCegarLoop]: 821 mSDtfsCounter, 1998 mSDsluCounter, 3957 mSDsCounter, 0 mSdLazyCounter, 332 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2003 SdHoareTripleChecker+Valid, 4778 SdHoareTripleChecker+Invalid, 336 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 332 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2024-11-24 00:03:14,265 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2003 Valid, 4778 Invalid, 336 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 332 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2024-11-24 00:03:14,267 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2618 states. [2024-11-24 00:03:14,314 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2618 to 2156. [2024-11-24 00:03:14,316 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2156 states, 2116 states have (on average 1.3232514177693762) internal successors, (2800), 2116 states have internal predecessors, (2800), 38 states have call successors, (38), 1 states have call predecessors, (38), 1 states have return successors, (38), 38 states have call predecessors, (38), 38 states have call successors, (38) [2024-11-24 00:03:14,318 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2156 states to 2156 states and 2876 transitions. [2024-11-24 00:03:14,319 INFO L78 Accepts]: Start accepts. Automaton has 2156 states and 2876 transitions. Word has length 351 [2024-11-24 00:03:14,319 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 00:03:14,319 INFO L471 AbstractCegarLoop]: Abstraction has 2156 states and 2876 transitions. [2024-11-24 00:03:14,319 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 10 states, 10 states have (on average 27.9) internal successors, (279), 10 states have internal predecessors, (279), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) [2024-11-24 00:03:14,319 INFO L276 IsEmpty]: Start isEmpty. Operand 2156 states and 2876 transitions. [2024-11-24 00:03:14,322 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 352 [2024-11-24 00:03:14,322 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 00:03:14,322 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 00:03:14,322 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable44 [2024-11-24 00:03:14,323 INFO L396 AbstractCegarLoop]: === Iteration 46 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 00:03:14,323 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 00:03:14,323 INFO L85 PathProgramCache]: Analyzing trace with hash -2088906927, now seen corresponding path program 1 times [2024-11-24 00:03:14,323 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 00:03:14,323 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [389411574] [2024-11-24 00:03:14,323 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 00:03:14,323 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 00:03:16,582 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 00:03:17,584 INFO L134 CoverageAnalysis]: Checked inductivity of 146 backedges. 83 proven. 3 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-24 00:03:17,584 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-24 00:03:17,584 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [389411574] [2024-11-24 00:03:17,584 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [389411574] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-24 00:03:17,585 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1393220901] [2024-11-24 00:03:17,585 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 00:03:17,585 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-24 00:03:17,585 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_328789b6-5d68-4a2f-beb0-52c77b3443fd/bin/uautomizer-verify-LYvppIcaGC/z3 [2024-11-24 00:03:17,587 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_328789b6-5d68-4a2f-beb0-52c77b3443fd/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-24 00:03:17,592 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_328789b6-5d68-4a2f-beb0-52c77b3443fd/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2024-11-24 00:03:19,428 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 00:03:19,439 INFO L256 TraceCheckSpWp]: Trace formula consists of 2067 conjuncts, 11 conjuncts are in the unsatisfiable core [2024-11-24 00:03:19,445 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-24 00:03:19,498 INFO L134 CoverageAnalysis]: Checked inductivity of 146 backedges. 55 proven. 0 refuted. 0 times theorem prover too weak. 91 trivial. 0 not checked. [2024-11-24 00:03:19,498 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-11-24 00:03:19,498 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1393220901] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-24 00:03:19,498 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-11-24 00:03:19,499 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [7] total 11 [2024-11-24 00:03:19,499 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1123981164] [2024-11-24 00:03:19,499 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-24 00:03:19,499 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-11-24 00:03:19,499 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-24 00:03:19,500 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-11-24 00:03:19,500 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=90, Unknown=0, NotChecked=0, Total=110 [2024-11-24 00:03:19,500 INFO L87 Difference]: Start difference. First operand 2156 states and 2876 transitions. Second operand has 6 states, 5 states have (on average 54.0) internal successors, (270), 6 states have internal predecessors, (270), 3 states have call successors, (5), 2 states have call predecessors, (5), 3 states have return successors, (5), 2 states have call predecessors, (5), 3 states have call successors, (5) [2024-11-24 00:03:19,575 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 00:03:19,576 INFO L93 Difference]: Finished difference Result 3835 states and 5104 transitions. [2024-11-24 00:03:19,576 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-24 00:03:19,576 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 5 states have (on average 54.0) internal successors, (270), 6 states have internal predecessors, (270), 3 states have call successors, (5), 2 states have call predecessors, (5), 3 states have return successors, (5), 2 states have call predecessors, (5), 3 states have call successors, (5) Word has length 351 [2024-11-24 00:03:19,576 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 00:03:19,582 INFO L225 Difference]: With dead ends: 3835 [2024-11-24 00:03:19,582 INFO L226 Difference]: Without dead ends: 2156 [2024-11-24 00:03:19,584 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 358 GetRequests, 349 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=20, Invalid=90, Unknown=0, NotChecked=0, Total=110 [2024-11-24 00:03:19,585 INFO L435 NwaCegarLoop]: 544 mSDtfsCounter, 0 mSDsluCounter, 2157 mSDsCounter, 0 mSdLazyCounter, 39 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 2701 SdHoareTripleChecker+Invalid, 39 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 39 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-24 00:03:19,585 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 2701 Invalid, 39 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 39 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-24 00:03:19,587 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2156 states. [2024-11-24 00:03:19,631 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2156 to 2156. [2024-11-24 00:03:19,633 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2156 states, 2116 states have (on average 1.3194706994328922) internal successors, (2792), 2116 states have internal predecessors, (2792), 38 states have call successors, (38), 1 states have call predecessors, (38), 1 states have return successors, (38), 38 states have call predecessors, (38), 38 states have call successors, (38) [2024-11-24 00:03:19,636 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2156 states to 2156 states and 2868 transitions. [2024-11-24 00:03:19,636 INFO L78 Accepts]: Start accepts. Automaton has 2156 states and 2868 transitions. Word has length 351 [2024-11-24 00:03:19,637 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 00:03:19,637 INFO L471 AbstractCegarLoop]: Abstraction has 2156 states and 2868 transitions. [2024-11-24 00:03:19,637 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 5 states have (on average 54.0) internal successors, (270), 6 states have internal predecessors, (270), 3 states have call successors, (5), 2 states have call predecessors, (5), 3 states have return successors, (5), 2 states have call predecessors, (5), 3 states have call successors, (5) [2024-11-24 00:03:19,637 INFO L276 IsEmpty]: Start isEmpty. Operand 2156 states and 2868 transitions. [2024-11-24 00:03:19,640 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 352 [2024-11-24 00:03:19,640 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 00:03:19,641 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 00:03:19,659 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_328789b6-5d68-4a2f-beb0-52c77b3443fd/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Ended with exit code 0 [2024-11-24 00:03:19,841 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 8 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_328789b6-5d68-4a2f-beb0-52c77b3443fd/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable45 [2024-11-24 00:03:19,841 INFO L396 AbstractCegarLoop]: === Iteration 47 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 00:03:19,842 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 00:03:19,842 INFO L85 PathProgramCache]: Analyzing trace with hash -2004305008, now seen corresponding path program 1 times [2024-11-24 00:03:19,842 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 00:03:19,842 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [558418225] [2024-11-24 00:03:19,842 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 00:03:19,843 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 00:03:20,825 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 00:03:21,393 INFO L134 CoverageAnalysis]: Checked inductivity of 148 backedges. 88 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-24 00:03:21,393 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-24 00:03:21,393 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [558418225] [2024-11-24 00:03:21,393 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [558418225] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-24 00:03:21,393 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-24 00:03:21,394 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-11-24 00:03:21,394 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2069884450] [2024-11-24 00:03:21,394 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-24 00:03:21,394 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-11-24 00:03:21,394 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-24 00:03:21,395 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-11-24 00:03:21,395 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2024-11-24 00:03:21,395 INFO L87 Difference]: Start difference. First operand 2156 states and 2868 transitions. Second operand has 6 states, 6 states have (on average 54.0) internal successors, (324), 6 states have internal predecessors, (324), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-24 00:03:22,426 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 00:03:22,426 INFO L93 Difference]: Finished difference Result 3488 states and 4647 transitions. [2024-11-24 00:03:22,427 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-24 00:03:22,427 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 54.0) internal successors, (324), 6 states have internal predecessors, (324), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 351 [2024-11-24 00:03:22,427 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 00:03:22,435 INFO L225 Difference]: With dead ends: 3488 [2024-11-24 00:03:22,435 INFO L226 Difference]: Without dead ends: 2808 [2024-11-24 00:03:22,437 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2024-11-24 00:03:22,438 INFO L435 NwaCegarLoop]: 689 mSDtfsCounter, 745 mSDsluCounter, 1758 mSDsCounter, 0 mSdLazyCounter, 989 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.8s Time, 0 mProtectedPredicate, 0 mProtectedAction, 748 SdHoareTripleChecker+Valid, 2447 SdHoareTripleChecker+Invalid, 990 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 989 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.9s IncrementalHoareTripleChecker+Time [2024-11-24 00:03:22,438 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [748 Valid, 2447 Invalid, 990 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 989 Invalid, 0 Unknown, 0 Unchecked, 0.9s Time] [2024-11-24 00:03:22,441 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2808 states. [2024-11-24 00:03:22,506 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2808 to 2230. [2024-11-24 00:03:22,509 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2230 states, 2188 states have (on average 1.320383912248629) internal successors, (2889), 2188 states have internal predecessors, (2889), 40 states have call successors, (40), 1 states have call predecessors, (40), 1 states have return successors, (40), 40 states have call predecessors, (40), 40 states have call successors, (40) [2024-11-24 00:03:22,513 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2230 states to 2230 states and 2969 transitions. [2024-11-24 00:03:22,514 INFO L78 Accepts]: Start accepts. Automaton has 2230 states and 2969 transitions. Word has length 351 [2024-11-24 00:03:22,514 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 00:03:22,514 INFO L471 AbstractCegarLoop]: Abstraction has 2230 states and 2969 transitions. [2024-11-24 00:03:22,515 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 54.0) internal successors, (324), 6 states have internal predecessors, (324), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-24 00:03:22,515 INFO L276 IsEmpty]: Start isEmpty. Operand 2230 states and 2969 transitions. [2024-11-24 00:03:22,519 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 352 [2024-11-24 00:03:22,520 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 00:03:22,520 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 00:03:22,520 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable46 [2024-11-24 00:03:22,520 INFO L396 AbstractCegarLoop]: === Iteration 48 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 00:03:22,521 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 00:03:22,521 INFO L85 PathProgramCache]: Analyzing trace with hash 1321779639, now seen corresponding path program 1 times [2024-11-24 00:03:22,522 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 00:03:22,522 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [77897819] [2024-11-24 00:03:22,522 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 00:03:22,522 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 00:03:23,695 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 00:03:26,093 INFO L134 CoverageAnalysis]: Checked inductivity of 148 backedges. 2 proven. 86 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-24 00:03:26,093 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-24 00:03:26,093 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [77897819] [2024-11-24 00:03:26,093 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [77897819] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-24 00:03:26,094 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1564952084] [2024-11-24 00:03:26,094 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 00:03:26,094 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-24 00:03:26,094 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_328789b6-5d68-4a2f-beb0-52c77b3443fd/bin/uautomizer-verify-LYvppIcaGC/z3 [2024-11-24 00:03:26,096 INFO L229 MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_328789b6-5d68-4a2f-beb0-52c77b3443fd/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-24 00:03:26,098 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_328789b6-5d68-4a2f-beb0-52c77b3443fd/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2024-11-24 00:03:28,084 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 00:03:28,096 INFO L256 TraceCheckSpWp]: Trace formula consists of 2067 conjuncts, 11 conjuncts are in the unsatisfiable core [2024-11-24 00:03:28,108 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-24 00:03:28,210 INFO L134 CoverageAnalysis]: Checked inductivity of 148 backedges. 123 proven. 0 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-11-24 00:03:28,210 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-11-24 00:03:28,211 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1564952084] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-24 00:03:28,211 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-11-24 00:03:28,211 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [13] total 17 [2024-11-24 00:03:28,211 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1233179175] [2024-11-24 00:03:28,211 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-24 00:03:28,212 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-11-24 00:03:28,212 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-24 00:03:28,213 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-11-24 00:03:28,213 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=36, Invalid=236, Unknown=0, NotChecked=0, Total=272 [2024-11-24 00:03:28,213 INFO L87 Difference]: Start difference. First operand 2230 states and 2969 transitions. Second operand has 6 states, 5 states have (on average 65.2) internal successors, (326), 6 states have internal predecessors, (326), 3 states have call successors, (6), 2 states have call predecessors, (6), 3 states have return successors, (6), 2 states have call predecessors, (6), 3 states have call successors, (6) [2024-11-24 00:03:28,378 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 00:03:28,378 INFO L93 Difference]: Finished difference Result 4179 states and 5541 transitions. [2024-11-24 00:03:28,379 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-24 00:03:28,379 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 5 states have (on average 65.2) internal successors, (326), 6 states have internal predecessors, (326), 3 states have call successors, (6), 2 states have call predecessors, (6), 3 states have return successors, (6), 2 states have call predecessors, (6), 3 states have call successors, (6) Word has length 351 [2024-11-24 00:03:28,380 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 00:03:28,386 INFO L225 Difference]: With dead ends: 4179 [2024-11-24 00:03:28,387 INFO L226 Difference]: Without dead ends: 2230 [2024-11-24 00:03:28,390 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 366 GetRequests, 349 SyntacticMatches, 2 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 43 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=36, Invalid=236, Unknown=0, NotChecked=0, Total=272 [2024-11-24 00:03:28,390 INFO L435 NwaCegarLoop]: 543 mSDtfsCounter, 0 mSDsluCounter, 2153 mSDsCounter, 0 mSdLazyCounter, 39 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 2696 SdHoareTripleChecker+Invalid, 39 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 39 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-24 00:03:28,391 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 2696 Invalid, 39 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 39 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-24 00:03:28,397 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2230 states. [2024-11-24 00:03:28,473 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2230 to 2230. [2024-11-24 00:03:28,480 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2230 states, 2188 states have (on average 1.3158135283363803) internal successors, (2879), 2188 states have internal predecessors, (2879), 40 states have call successors, (40), 1 states have call predecessors, (40), 1 states have return successors, (40), 40 states have call predecessors, (40), 40 states have call successors, (40) [2024-11-24 00:03:28,489 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2230 states to 2230 states and 2959 transitions. [2024-11-24 00:03:28,494 INFO L78 Accepts]: Start accepts. Automaton has 2230 states and 2959 transitions. Word has length 351 [2024-11-24 00:03:28,494 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 00:03:28,494 INFO L471 AbstractCegarLoop]: Abstraction has 2230 states and 2959 transitions. [2024-11-24 00:03:28,495 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 5 states have (on average 65.2) internal successors, (326), 6 states have internal predecessors, (326), 3 states have call successors, (6), 2 states have call predecessors, (6), 3 states have return successors, (6), 2 states have call predecessors, (6), 3 states have call successors, (6) [2024-11-24 00:03:28,495 INFO L276 IsEmpty]: Start isEmpty. Operand 2230 states and 2959 transitions. [2024-11-24 00:03:28,502 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 353 [2024-11-24 00:03:28,502 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 00:03:28,503 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 00:03:28,524 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_328789b6-5d68-4a2f-beb0-52c77b3443fd/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Ended with exit code 0 [2024-11-24 00:03:28,703 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 9 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_328789b6-5d68-4a2f-beb0-52c77b3443fd/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable47 [2024-11-24 00:03:28,703 INFO L396 AbstractCegarLoop]: === Iteration 49 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 00:03:28,704 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 00:03:28,704 INFO L85 PathProgramCache]: Analyzing trace with hash -1202829906, now seen corresponding path program 1 times [2024-11-24 00:03:28,704 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 00:03:28,704 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1082921318] [2024-11-24 00:03:28,704 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 00:03:28,704 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 00:03:29,935 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 00:03:32,235 INFO L134 CoverageAnalysis]: Checked inductivity of 149 backedges. 89 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-24 00:03:32,235 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-24 00:03:32,235 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1082921318] [2024-11-24 00:03:32,235 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1082921318] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-24 00:03:32,235 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-24 00:03:32,236 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2024-11-24 00:03:32,236 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1392944913] [2024-11-24 00:03:32,236 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-24 00:03:32,236 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 12 states [2024-11-24 00:03:32,236 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-24 00:03:32,237 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2024-11-24 00:03:32,237 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=107, Unknown=0, NotChecked=0, Total=132 [2024-11-24 00:03:32,237 INFO L87 Difference]: Start difference. First operand 2230 states and 2959 transitions. Second operand has 12 states, 12 states have (on average 27.083333333333332) internal successors, (325), 12 states have internal predecessors, (325), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) [2024-11-24 00:03:33,086 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 00:03:33,086 INFO L93 Difference]: Finished difference Result 6690 states and 8854 transitions. [2024-11-24 00:03:33,087 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2024-11-24 00:03:33,087 INFO L78 Accepts]: Start accepts. Automaton has has 12 states, 12 states have (on average 27.083333333333332) internal successors, (325), 12 states have internal predecessors, (325), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) Word has length 352 [2024-11-24 00:03:33,087 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 00:03:33,096 INFO L225 Difference]: With dead ends: 6690 [2024-11-24 00:03:33,096 INFO L226 Difference]: Without dead ends: 5894 [2024-11-24 00:03:33,099 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 30 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=82, Invalid=260, Unknown=0, NotChecked=0, Total=342 [2024-11-24 00:03:33,100 INFO L435 NwaCegarLoop]: 862 mSDtfsCounter, 2308 mSDsluCounter, 5752 mSDsCounter, 0 mSdLazyCounter, 648 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2313 SdHoareTripleChecker+Valid, 6614 SdHoareTripleChecker+Invalid, 652 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 648 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2024-11-24 00:03:33,100 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2313 Valid, 6614 Invalid, 652 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 648 Invalid, 0 Unknown, 0 Unchecked, 0.6s Time] [2024-11-24 00:03:33,105 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5894 states. [2024-11-24 00:03:33,222 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5894 to 3890. [2024-11-24 00:03:33,227 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3890 states, 3808 states have (on average 1.300420168067227) internal successors, (4952), 3808 states have internal predecessors, (4952), 80 states have call successors, (80), 1 states have call predecessors, (80), 1 states have return successors, (80), 80 states have call predecessors, (80), 80 states have call successors, (80) [2024-11-24 00:03:33,234 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3890 states to 3890 states and 5112 transitions. [2024-11-24 00:03:33,235 INFO L78 Accepts]: Start accepts. Automaton has 3890 states and 5112 transitions. Word has length 352 [2024-11-24 00:03:33,236 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 00:03:33,236 INFO L471 AbstractCegarLoop]: Abstraction has 3890 states and 5112 transitions. [2024-11-24 00:03:33,236 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 12 states, 12 states have (on average 27.083333333333332) internal successors, (325), 12 states have internal predecessors, (325), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) [2024-11-24 00:03:33,236 INFO L276 IsEmpty]: Start isEmpty. Operand 3890 states and 5112 transitions. [2024-11-24 00:03:33,243 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 354 [2024-11-24 00:03:33,244 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 00:03:33,244 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 00:03:33,244 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable48 [2024-11-24 00:03:33,244 INFO L396 AbstractCegarLoop]: === Iteration 50 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 00:03:33,245 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 00:03:33,245 INFO L85 PathProgramCache]: Analyzing trace with hash -453824989, now seen corresponding path program 1 times [2024-11-24 00:03:33,245 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 00:03:33,245 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1324880808] [2024-11-24 00:03:33,246 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 00:03:33,246 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 00:03:34,790 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 00:03:35,740 INFO L134 CoverageAnalysis]: Checked inductivity of 148 backedges. 81 proven. 4 refuted. 0 times theorem prover too weak. 63 trivial. 0 not checked. [2024-11-24 00:03:35,740 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-24 00:03:35,740 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1324880808] [2024-11-24 00:03:35,740 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1324880808] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-24 00:03:35,740 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [175390353] [2024-11-24 00:03:35,740 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 00:03:35,740 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-24 00:03:35,740 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_328789b6-5d68-4a2f-beb0-52c77b3443fd/bin/uautomizer-verify-LYvppIcaGC/z3 [2024-11-24 00:03:35,742 INFO L229 MonitoredProcess]: Starting monitored process 10 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_328789b6-5d68-4a2f-beb0-52c77b3443fd/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-24 00:03:35,743 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_328789b6-5d68-4a2f-beb0-52c77b3443fd/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process [2024-11-24 00:03:37,938 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 00:03:37,949 INFO L256 TraceCheckSpWp]: Trace formula consists of 2073 conjuncts, 11 conjuncts are in the unsatisfiable core [2024-11-24 00:03:37,955 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-24 00:03:38,011 INFO L134 CoverageAnalysis]: Checked inductivity of 148 backedges. 74 proven. 0 refuted. 0 times theorem prover too weak. 74 trivial. 0 not checked. [2024-11-24 00:03:38,011 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-11-24 00:03:38,011 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [175390353] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-24 00:03:38,011 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-11-24 00:03:38,011 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [6] total 10 [2024-11-24 00:03:38,012 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1681324249] [2024-11-24 00:03:38,012 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-24 00:03:38,013 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-11-24 00:03:38,013 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-24 00:03:38,013 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-11-24 00:03:38,014 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=73, Unknown=0, NotChecked=0, Total=90 [2024-11-24 00:03:38,014 INFO L87 Difference]: Start difference. First operand 3890 states and 5112 transitions. Second operand has 6 states, 5 states have (on average 56.2) internal successors, (281), 6 states have internal predecessors, (281), 3 states have call successors, (6), 2 states have call predecessors, (6), 3 states have return successors, (6), 2 states have call predecessors, (6), 3 states have call successors, (6) [2024-11-24 00:03:38,155 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 00:03:38,155 INFO L93 Difference]: Finished difference Result 6677 states and 8783 transitions. [2024-11-24 00:03:38,155 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-24 00:03:38,156 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 5 states have (on average 56.2) internal successors, (281), 6 states have internal predecessors, (281), 3 states have call successors, (6), 2 states have call predecessors, (6), 3 states have return successors, (6), 2 states have call predecessors, (6), 3 states have call successors, (6) Word has length 353 [2024-11-24 00:03:38,156 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 00:03:38,163 INFO L225 Difference]: With dead ends: 6677 [2024-11-24 00:03:38,164 INFO L226 Difference]: Without dead ends: 3890 [2024-11-24 00:03:38,168 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 360 GetRequests, 352 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=17, Invalid=73, Unknown=0, NotChecked=0, Total=90 [2024-11-24 00:03:38,168 INFO L435 NwaCegarLoop]: 542 mSDtfsCounter, 0 mSDsluCounter, 2149 mSDsCounter, 0 mSdLazyCounter, 39 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 2691 SdHoareTripleChecker+Invalid, 39 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 39 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-24 00:03:38,169 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 2691 Invalid, 39 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 39 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-24 00:03:38,172 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3890 states. [2024-11-24 00:03:38,282 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3890 to 3890. [2024-11-24 00:03:38,287 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3890 states, 3808 states have (on average 1.2899159663865547) internal successors, (4912), 3808 states have internal predecessors, (4912), 80 states have call successors, (80), 1 states have call predecessors, (80), 1 states have return successors, (80), 80 states have call predecessors, (80), 80 states have call successors, (80) [2024-11-24 00:03:38,294 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3890 states to 3890 states and 5072 transitions. [2024-11-24 00:03:38,295 INFO L78 Accepts]: Start accepts. Automaton has 3890 states and 5072 transitions. Word has length 353 [2024-11-24 00:03:38,295 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 00:03:38,295 INFO L471 AbstractCegarLoop]: Abstraction has 3890 states and 5072 transitions. [2024-11-24 00:03:38,295 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 5 states have (on average 56.2) internal successors, (281), 6 states have internal predecessors, (281), 3 states have call successors, (6), 2 states have call predecessors, (6), 3 states have return successors, (6), 2 states have call predecessors, (6), 3 states have call successors, (6) [2024-11-24 00:03:38,296 INFO L276 IsEmpty]: Start isEmpty. Operand 3890 states and 5072 transitions. [2024-11-24 00:03:38,303 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 356 [2024-11-24 00:03:38,303 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 00:03:38,303 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 00:03:38,326 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_328789b6-5d68-4a2f-beb0-52c77b3443fd/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Ended with exit code 0 [2024-11-24 00:03:38,504 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 10 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_328789b6-5d68-4a2f-beb0-52c77b3443fd/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable49 [2024-11-24 00:03:38,504 INFO L396 AbstractCegarLoop]: === Iteration 51 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 00:03:38,505 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 00:03:38,505 INFO L85 PathProgramCache]: Analyzing trace with hash 1011656559, now seen corresponding path program 1 times [2024-11-24 00:03:38,505 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 00:03:38,505 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1982237029] [2024-11-24 00:03:38,506 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 00:03:38,506 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 00:03:40,134 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 00:03:41,911 INFO L134 CoverageAnalysis]: Checked inductivity of 149 backedges. 89 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-24 00:03:41,912 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-24 00:03:41,912 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1982237029] [2024-11-24 00:03:41,912 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1982237029] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-24 00:03:41,912 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-24 00:03:41,912 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [14] imperfect sequences [] total 14 [2024-11-24 00:03:41,912 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1823444996] [2024-11-24 00:03:41,912 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-24 00:03:41,913 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 14 states [2024-11-24 00:03:41,913 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-24 00:03:41,913 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2024-11-24 00:03:41,913 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=33, Invalid=149, Unknown=0, NotChecked=0, Total=182 [2024-11-24 00:03:41,914 INFO L87 Difference]: Start difference. First operand 3890 states and 5072 transitions. Second operand has 14 states, 14 states have (on average 23.428571428571427) internal successors, (328), 14 states have internal predecessors, (328), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) [2024-11-24 00:03:44,575 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 00:03:44,575 INFO L93 Difference]: Finished difference Result 10103 states and 13021 transitions. [2024-11-24 00:03:44,575 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2024-11-24 00:03:44,576 INFO L78 Accepts]: Start accepts. Automaton has has 14 states, 14 states have (on average 23.428571428571427) internal successors, (328), 14 states have internal predecessors, (328), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) Word has length 355 [2024-11-24 00:03:44,576 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 00:03:44,589 INFO L225 Difference]: With dead ends: 10103 [2024-11-24 00:03:44,589 INFO L226 Difference]: Without dead ends: 8835 [2024-11-24 00:03:44,594 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 42 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=92, Invalid=328, Unknown=0, NotChecked=0, Total=420 [2024-11-24 00:03:44,594 INFO L435 NwaCegarLoop]: 579 mSDtfsCounter, 2359 mSDsluCounter, 5174 mSDsCounter, 0 mSdLazyCounter, 3161 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 2.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2363 SdHoareTripleChecker+Valid, 5753 SdHoareTripleChecker+Invalid, 3165 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 3161 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 2.3s IncrementalHoareTripleChecker+Time [2024-11-24 00:03:44,595 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2363 Valid, 5753 Invalid, 3165 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 3161 Invalid, 0 Unknown, 0 Unchecked, 2.3s Time] [2024-11-24 00:03:44,601 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8835 states. [2024-11-24 00:03:44,747 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8835 to 5008. [2024-11-24 00:03:44,754 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5008 states, 4910 states have (on average 1.285743380855397) internal successors, (6313), 4910 states have internal predecessors, (6313), 96 states have call successors, (96), 1 states have call predecessors, (96), 1 states have return successors, (96), 96 states have call predecessors, (96), 96 states have call successors, (96) [2024-11-24 00:03:44,762 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5008 states to 5008 states and 6505 transitions. [2024-11-24 00:03:44,763 INFO L78 Accepts]: Start accepts. Automaton has 5008 states and 6505 transitions. Word has length 355 [2024-11-24 00:03:44,763 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 00:03:44,763 INFO L471 AbstractCegarLoop]: Abstraction has 5008 states and 6505 transitions. [2024-11-24 00:03:44,764 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 14 states, 14 states have (on average 23.428571428571427) internal successors, (328), 14 states have internal predecessors, (328), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) [2024-11-24 00:03:44,764 INFO L276 IsEmpty]: Start isEmpty. Operand 5008 states and 6505 transitions. [2024-11-24 00:03:44,772 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 356 [2024-11-24 00:03:44,772 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 00:03:44,773 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 00:03:44,773 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable50 [2024-11-24 00:03:44,773 INFO L396 AbstractCegarLoop]: === Iteration 52 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 00:03:44,773 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 00:03:44,774 INFO L85 PathProgramCache]: Analyzing trace with hash 591247886, now seen corresponding path program 1 times [2024-11-24 00:03:44,774 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 00:03:44,774 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1802334029] [2024-11-24 00:03:44,774 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 00:03:44,774 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 00:03:46,853 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 00:03:47,761 INFO L134 CoverageAnalysis]: Checked inductivity of 147 backedges. 80 proven. 4 refuted. 0 times theorem prover too weak. 63 trivial. 0 not checked. [2024-11-24 00:03:47,762 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-24 00:03:47,762 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1802334029] [2024-11-24 00:03:47,762 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1802334029] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-24 00:03:47,762 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [265288185] [2024-11-24 00:03:47,762 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 00:03:47,762 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-24 00:03:47,762 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_328789b6-5d68-4a2f-beb0-52c77b3443fd/bin/uautomizer-verify-LYvppIcaGC/z3 [2024-11-24 00:03:47,765 INFO L229 MonitoredProcess]: Starting monitored process 11 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_328789b6-5d68-4a2f-beb0-52c77b3443fd/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-24 00:03:47,769 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_328789b6-5d68-4a2f-beb0-52c77b3443fd/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Waiting until timeout for monitored process [2024-11-24 00:03:50,413 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 00:03:50,423 INFO L256 TraceCheckSpWp]: Trace formula consists of 2079 conjuncts, 45 conjuncts are in the unsatisfiable core [2024-11-24 00:03:50,433 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-24 00:03:51,446 INFO L134 CoverageAnalysis]: Checked inductivity of 147 backedges. 116 proven. 4 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2024-11-24 00:03:51,446 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-24 00:03:53,855 INFO L134 CoverageAnalysis]: Checked inductivity of 147 backedges. 83 proven. 4 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-24 00:03:53,856 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [265288185] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-24 00:03:53,856 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-24 00:03:53,856 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 9, 11] total 21 [2024-11-24 00:03:53,856 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [697841261] [2024-11-24 00:03:53,857 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-24 00:03:53,857 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 21 states [2024-11-24 00:03:53,858 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-24 00:03:53,859 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2024-11-24 00:03:53,859 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=91, Invalid=329, Unknown=0, NotChecked=0, Total=420 [2024-11-24 00:03:53,859 INFO L87 Difference]: Start difference. First operand 5008 states and 6505 transitions. Second operand has 21 states, 21 states have (on average 27.714285714285715) internal successors, (582), 21 states have internal predecessors, (582), 4 states have call successors, (12), 2 states have call predecessors, (12), 2 states have return successors, (12), 4 states have call predecessors, (12), 4 states have call successors, (12) [2024-11-24 00:03:55,135 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 00:03:55,135 INFO L93 Difference]: Finished difference Result 9643 states and 12511 transitions. [2024-11-24 00:03:55,135 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2024-11-24 00:03:55,136 INFO L78 Accepts]: Start accepts. Automaton has has 21 states, 21 states have (on average 27.714285714285715) internal successors, (582), 21 states have internal predecessors, (582), 4 states have call successors, (12), 2 states have call predecessors, (12), 2 states have return successors, (12), 4 states have call predecessors, (12), 4 states have call successors, (12) Word has length 355 [2024-11-24 00:03:55,136 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 00:03:55,141 INFO L225 Difference]: With dead ends: 9643 [2024-11-24 00:03:55,141 INFO L226 Difference]: Without dead ends: 5008 [2024-11-24 00:03:55,146 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 720 GetRequests, 697 SyntacticMatches, 0 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 125 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=139, Invalid=461, Unknown=0, NotChecked=0, Total=600 [2024-11-24 00:03:55,147 INFO L435 NwaCegarLoop]: 378 mSDtfsCounter, 605 mSDsluCounter, 3739 mSDsCounter, 0 mSdLazyCounter, 1837 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.9s Time, 0 mProtectedPredicate, 0 mProtectedAction, 605 SdHoareTripleChecker+Valid, 4117 SdHoareTripleChecker+Invalid, 1838 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 1837 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.1s IncrementalHoareTripleChecker+Time [2024-11-24 00:03:55,147 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [605 Valid, 4117 Invalid, 1838 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 1837 Invalid, 0 Unknown, 0 Unchecked, 1.1s Time] [2024-11-24 00:03:55,149 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5008 states. [2024-11-24 00:03:55,273 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5008 to 4954. [2024-11-24 00:03:55,279 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4954 states, 4856 states have (on average 1.2848023064250411) internal successors, (6239), 4856 states have internal predecessors, (6239), 96 states have call successors, (96), 1 states have call predecessors, (96), 1 states have return successors, (96), 96 states have call predecessors, (96), 96 states have call successors, (96) [2024-11-24 00:03:55,287 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4954 states to 4954 states and 6431 transitions. [2024-11-24 00:03:55,288 INFO L78 Accepts]: Start accepts. Automaton has 4954 states and 6431 transitions. Word has length 355 [2024-11-24 00:03:55,288 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 00:03:55,288 INFO L471 AbstractCegarLoop]: Abstraction has 4954 states and 6431 transitions. [2024-11-24 00:03:55,289 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 21 states, 21 states have (on average 27.714285714285715) internal successors, (582), 21 states have internal predecessors, (582), 4 states have call successors, (12), 2 states have call predecessors, (12), 2 states have return successors, (12), 4 states have call predecessors, (12), 4 states have call successors, (12) [2024-11-24 00:03:55,289 INFO L276 IsEmpty]: Start isEmpty. Operand 4954 states and 6431 transitions. [2024-11-24 00:03:55,297 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 356 [2024-11-24 00:03:55,297 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 00:03:55,298 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 00:03:55,322 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_328789b6-5d68-4a2f-beb0-52c77b3443fd/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Ended with exit code 0 [2024-11-24 00:03:55,498 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable51,11 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_328789b6-5d68-4a2f-beb0-52c77b3443fd/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-24 00:03:55,498 INFO L396 AbstractCegarLoop]: === Iteration 53 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 00:03:55,500 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 00:03:55,500 INFO L85 PathProgramCache]: Analyzing trace with hash -1535399658, now seen corresponding path program 1 times [2024-11-24 00:03:55,500 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 00:03:55,500 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [439619867] [2024-11-24 00:03:55,500 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 00:03:55,500 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 00:03:58,124 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 00:04:02,832 INFO L134 CoverageAnalysis]: Checked inductivity of 148 backedges. 50 proven. 38 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-24 00:04:02,832 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-24 00:04:02,833 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [439619867] [2024-11-24 00:04:02,833 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [439619867] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-24 00:04:02,833 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1644426986] [2024-11-24 00:04:02,833 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 00:04:02,833 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-24 00:04:02,833 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_328789b6-5d68-4a2f-beb0-52c77b3443fd/bin/uautomizer-verify-LYvppIcaGC/z3 [2024-11-24 00:04:02,838 INFO L229 MonitoredProcess]: Starting monitored process 12 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_328789b6-5d68-4a2f-beb0-52c77b3443fd/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-24 00:04:02,839 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_328789b6-5d68-4a2f-beb0-52c77b3443fd/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Waiting until timeout for monitored process [2024-11-24 00:04:05,592 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 00:04:05,604 INFO L256 TraceCheckSpWp]: Trace formula consists of 2079 conjuncts, 217 conjuncts are in the unsatisfiable core [2024-11-24 00:04:05,620 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-24 00:04:09,267 INFO L134 CoverageAnalysis]: Checked inductivity of 148 backedges. 50 proven. 38 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-24 00:04:09,267 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-24 00:04:18,195 INFO L134 CoverageAnalysis]: Checked inductivity of 148 backedges. 50 proven. 38 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-24 00:04:18,196 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1644426986] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-24 00:04:18,196 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-24 00:04:18,196 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 37, 31] total 79 [2024-11-24 00:04:18,196 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1550003934] [2024-11-24 00:04:18,197 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-24 00:04:18,198 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 79 states [2024-11-24 00:04:18,198 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-24 00:04:18,203 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 79 interpolants. [2024-11-24 00:04:18,203 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=787, Invalid=5375, Unknown=0, NotChecked=0, Total=6162 [2024-11-24 00:04:18,204 INFO L87 Difference]: Start difference. First operand 4954 states and 6431 transitions. Second operand has 79 states, 79 states have (on average 10.91139240506329) internal successors, (862), 79 states have internal predecessors, (862), 10 states have call successors, (18), 1 states have call predecessors, (18), 1 states have return successors, (18), 10 states have call predecessors, (18), 10 states have call successors, (18) [2024-11-24 00:05:10,899 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 00:05:10,899 INFO L93 Difference]: Finished difference Result 65405 states and 84997 transitions. [2024-11-24 00:05:10,900 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 382 states. [2024-11-24 00:05:10,900 INFO L78 Accepts]: Start accepts. Automaton has has 79 states, 79 states have (on average 10.91139240506329) internal successors, (862), 79 states have internal predecessors, (862), 10 states have call successors, (18), 1 states have call predecessors, (18), 1 states have return successors, (18), 10 states have call predecessors, (18), 10 states have call successors, (18) Word has length 355 [2024-11-24 00:05:10,900 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 00:05:10,943 INFO L225 Difference]: With dead ends: 65405 [2024-11-24 00:05:10,943 INFO L226 Difference]: Without dead ends: 62220 [2024-11-24 00:05:10,963 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 1090 GetRequests, 647 SyntacticMatches, 2 SemanticMatches, 441 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 75527 ImplicationChecksByTransitivity, 27.0s TimeCoverageRelationStatistics Valid=22820, Invalid=172986, Unknown=0, NotChecked=0, Total=195806 [2024-11-24 00:05:10,963 INFO L435 NwaCegarLoop]: 1069 mSDtfsCounter, 29243 mSDsluCounter, 39910 mSDsCounter, 0 mSdLazyCounter, 29227 mSolverCounterSat, 200 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 19.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 29249 SdHoareTripleChecker+Valid, 40979 SdHoareTripleChecker+Invalid, 29427 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.2s SdHoareTripleChecker+Time, 200 IncrementalHoareTripleChecker+Valid, 29227 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 22.5s IncrementalHoareTripleChecker+Time [2024-11-24 00:05:10,964 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [29249 Valid, 40979 Invalid, 29427 Unknown, 0 Unchecked, 0.2s Time], IncrementalHoareTripleChecker [200 Valid, 29227 Invalid, 0 Unknown, 0 Unchecked, 22.5s Time] [2024-11-24 00:05:11,001 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 62220 states. [2024-11-24 00:05:11,519 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 62220 to 12493. [2024-11-24 00:05:11,528 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 12493 states, 12243 states have (on average 1.2813852813852813) internal successors, (15688), 12243 states have internal predecessors, (15688), 248 states have call successors, (248), 1 states have call predecessors, (248), 1 states have return successors, (248), 248 states have call predecessors, (248), 248 states have call successors, (248) [2024-11-24 00:05:11,546 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12493 states to 12493 states and 16184 transitions. [2024-11-24 00:05:11,548 INFO L78 Accepts]: Start accepts. Automaton has 12493 states and 16184 transitions. Word has length 355 [2024-11-24 00:05:11,549 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 00:05:11,549 INFO L471 AbstractCegarLoop]: Abstraction has 12493 states and 16184 transitions. [2024-11-24 00:05:11,549 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 79 states, 79 states have (on average 10.91139240506329) internal successors, (862), 79 states have internal predecessors, (862), 10 states have call successors, (18), 1 states have call predecessors, (18), 1 states have return successors, (18), 10 states have call predecessors, (18), 10 states have call successors, (18) [2024-11-24 00:05:11,549 INFO L276 IsEmpty]: Start isEmpty. Operand 12493 states and 16184 transitions. [2024-11-24 00:05:11,571 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 357 [2024-11-24 00:05:11,572 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 00:05:11,572 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 00:05:11,590 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_328789b6-5d68-4a2f-beb0-52c77b3443fd/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Ended with exit code 0 [2024-11-24 00:05:11,772 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable52,12 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_328789b6-5d68-4a2f-beb0-52c77b3443fd/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-24 00:05:11,773 INFO L396 AbstractCegarLoop]: === Iteration 54 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 00:05:11,773 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 00:05:11,773 INFO L85 PathProgramCache]: Analyzing trace with hash -132418615, now seen corresponding path program 1 times [2024-11-24 00:05:11,773 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 00:05:11,773 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1088846500] [2024-11-24 00:05:11,774 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 00:05:11,774 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 00:05:13,922 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 00:05:16,112 INFO L134 CoverageAnalysis]: Checked inductivity of 148 backedges. 54 proven. 34 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-24 00:05:16,113 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-24 00:05:16,113 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1088846500] [2024-11-24 00:05:16,113 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1088846500] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-24 00:05:16,113 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [61626034] [2024-11-24 00:05:16,113 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 00:05:16,113 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-24 00:05:16,113 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_328789b6-5d68-4a2f-beb0-52c77b3443fd/bin/uautomizer-verify-LYvppIcaGC/z3 [2024-11-24 00:05:16,115 INFO L229 MonitoredProcess]: Starting monitored process 13 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_328789b6-5d68-4a2f-beb0-52c77b3443fd/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-24 00:05:16,117 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_328789b6-5d68-4a2f-beb0-52c77b3443fd/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Waiting until timeout for monitored process [2024-11-24 00:05:18,659 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 00:05:18,672 INFO L256 TraceCheckSpWp]: Trace formula consists of 2082 conjuncts, 166 conjuncts are in the unsatisfiable core [2024-11-24 00:05:18,684 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-24 00:05:23,527 INFO L134 CoverageAnalysis]: Checked inductivity of 148 backedges. 50 proven. 38 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-24 00:05:23,527 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-24 00:05:32,058 INFO L134 CoverageAnalysis]: Checked inductivity of 148 backedges. 46 proven. 42 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-24 00:05:32,058 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [61626034] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-24 00:05:32,058 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-24 00:05:32,058 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 32, 29] total 70 [2024-11-24 00:05:32,058 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [631180263] [2024-11-24 00:05:32,058 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-24 00:05:32,059 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 70 states [2024-11-24 00:05:32,059 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-24 00:05:32,060 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 70 interpolants. [2024-11-24 00:05:32,060 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=644, Invalid=4186, Unknown=0, NotChecked=0, Total=4830 [2024-11-24 00:05:32,060 INFO L87 Difference]: Start difference. First operand 12493 states and 16184 transitions. Second operand has 70 states, 70 states have (on average 12.485714285714286) internal successors, (874), 70 states have internal predecessors, (874), 13 states have call successors, (18), 1 states have call predecessors, (18), 1 states have return successors, (18), 13 states have call predecessors, (18), 13 states have call successors, (18) [2024-11-24 00:06:09,641 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 00:06:09,641 INFO L93 Difference]: Finished difference Result 88765 states and 114940 transitions. [2024-11-24 00:06:09,642 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 213 states. [2024-11-24 00:06:09,642 INFO L78 Accepts]: Start accepts. Automaton has has 70 states, 70 states have (on average 12.485714285714286) internal successors, (874), 70 states have internal predecessors, (874), 13 states have call successors, (18), 1 states have call predecessors, (18), 1 states have return successors, (18), 13 states have call predecessors, (18), 13 states have call successors, (18) Word has length 356 [2024-11-24 00:06:09,642 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 00:06:09,727 INFO L225 Difference]: With dead ends: 88765 [2024-11-24 00:06:09,727 INFO L226 Difference]: Without dead ends: 80197 [2024-11-24 00:06:09,744 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 923 GetRequests, 656 SyntacticMatches, 0 SemanticMatches, 267 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 24925 ImplicationChecksByTransitivity, 13.6s TimeCoverageRelationStatistics Valid=8794, Invalid=63298, Unknown=0, NotChecked=0, Total=72092 [2024-11-24 00:06:09,744 INFO L435 NwaCegarLoop]: 1459 mSDtfsCounter, 34320 mSDsluCounter, 49444 mSDsCounter, 0 mSdLazyCounter, 34679 mSolverCounterSat, 262 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 20.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 34331 SdHoareTripleChecker+Valid, 50903 SdHoareTripleChecker+Invalid, 34941 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.2s SdHoareTripleChecker+Time, 262 IncrementalHoareTripleChecker+Valid, 34679 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 23.4s IncrementalHoareTripleChecker+Time [2024-11-24 00:06:09,744 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [34331 Valid, 50903 Invalid, 34941 Unknown, 0 Unchecked, 0.2s Time], IncrementalHoareTripleChecker [262 Valid, 34679 Invalid, 0 Unknown, 0 Unchecked, 23.4s Time] [2024-11-24 00:06:09,788 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 80197 states. [2024-11-24 00:06:10,504 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 80197 to 31439. [2024-11-24 00:06:10,531 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 31439 states, 30909 states have (on average 1.2838331877446698) internal successors, (39682), 30909 states have internal predecessors, (39682), 528 states have call successors, (528), 1 states have call predecessors, (528), 1 states have return successors, (528), 528 states have call predecessors, (528), 528 states have call successors, (528) [2024-11-24 00:06:10,568 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 31439 states to 31439 states and 40738 transitions. [2024-11-24 00:06:10,570 INFO L78 Accepts]: Start accepts. Automaton has 31439 states and 40738 transitions. Word has length 356 [2024-11-24 00:06:10,570 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 00:06:10,570 INFO L471 AbstractCegarLoop]: Abstraction has 31439 states and 40738 transitions. [2024-11-24 00:06:10,570 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 70 states, 70 states have (on average 12.485714285714286) internal successors, (874), 70 states have internal predecessors, (874), 13 states have call successors, (18), 1 states have call predecessors, (18), 1 states have return successors, (18), 13 states have call predecessors, (18), 13 states have call successors, (18) [2024-11-24 00:06:10,570 INFO L276 IsEmpty]: Start isEmpty. Operand 31439 states and 40738 transitions. [2024-11-24 00:06:10,602 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 357 [2024-11-24 00:06:10,602 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 00:06:10,602 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 00:06:10,629 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_328789b6-5d68-4a2f-beb0-52c77b3443fd/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Ended with exit code 0 [2024-11-24 00:06:10,802 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 13 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_328789b6-5d68-4a2f-beb0-52c77b3443fd/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable53 [2024-11-24 00:06:10,803 INFO L396 AbstractCegarLoop]: === Iteration 55 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 00:06:10,803 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 00:06:10,803 INFO L85 PathProgramCache]: Analyzing trace with hash 2041114541, now seen corresponding path program 1 times [2024-11-24 00:06:10,803 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 00:06:10,803 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [878400673] [2024-11-24 00:06:10,803 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 00:06:10,804 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 00:06:13,109 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 00:06:15,794 INFO L134 CoverageAnalysis]: Checked inductivity of 150 backedges. 2 proven. 88 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-24 00:06:15,794 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-24 00:06:15,794 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [878400673] [2024-11-24 00:06:15,794 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [878400673] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-24 00:06:15,794 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [425466527] [2024-11-24 00:06:15,795 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 00:06:15,795 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-24 00:06:15,795 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_328789b6-5d68-4a2f-beb0-52c77b3443fd/bin/uautomizer-verify-LYvppIcaGC/z3 [2024-11-24 00:06:15,798 INFO L229 MonitoredProcess]: Starting monitored process 14 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_328789b6-5d68-4a2f-beb0-52c77b3443fd/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-24 00:06:15,799 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_328789b6-5d68-4a2f-beb0-52c77b3443fd/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Waiting until timeout for monitored process [2024-11-24 00:06:18,660 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 00:06:18,677 INFO L256 TraceCheckSpWp]: Trace formula consists of 2082 conjuncts, 250 conjuncts are in the unsatisfiable core [2024-11-24 00:06:18,694 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-24 00:06:24,291 INFO L134 CoverageAnalysis]: Checked inductivity of 150 backedges. 14 proven. 76 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-24 00:06:24,291 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-24 00:06:40,631 INFO L134 CoverageAnalysis]: Checked inductivity of 150 backedges. 2 proven. 88 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-24 00:06:40,631 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [425466527] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-24 00:06:40,631 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-24 00:06:40,631 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 42, 43] total 96 [2024-11-24 00:06:40,631 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [535793028] [2024-11-24 00:06:40,631 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-24 00:06:40,632 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 96 states [2024-11-24 00:06:40,633 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-24 00:06:40,634 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 96 interpolants. [2024-11-24 00:06:40,635 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=1293, Invalid=7827, Unknown=0, NotChecked=0, Total=9120 [2024-11-24 00:06:40,636 INFO L87 Difference]: Start difference. First operand 31439 states and 40738 transitions. Second operand has 96 states, 96 states have (on average 10.135416666666666) internal successors, (973), 96 states have internal predecessors, (973), 12 states have call successors, (18), 1 states have call predecessors, (18), 1 states have return successors, (18), 12 states have call predecessors, (18), 12 states have call successors, (18) [2024-11-24 00:07:04,505 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 00:07:04,506 INFO L93 Difference]: Finished difference Result 81706 states and 104656 transitions. [2024-11-24 00:07:04,506 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 114 states. [2024-11-24 00:07:04,506 INFO L78 Accepts]: Start accepts. Automaton has has 96 states, 96 states have (on average 10.135416666666666) internal successors, (973), 96 states have internal predecessors, (973), 12 states have call successors, (18), 1 states have call predecessors, (18), 1 states have return successors, (18), 12 states have call predecessors, (18), 12 states have call successors, (18) Word has length 356 [2024-11-24 00:07:04,507 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 00:07:04,556 INFO L225 Difference]: With dead ends: 81706 [2024-11-24 00:07:04,556 INFO L226 Difference]: Without dead ends: 60457 [2024-11-24 00:07:04,580 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 823 GetRequests, 632 SyntacticMatches, 1 SemanticMatches, 190 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10833 ImplicationChecksByTransitivity, 14.0s TimeCoverageRelationStatistics Valid=4988, Invalid=31684, Unknown=0, NotChecked=0, Total=36672 [2024-11-24 00:07:04,581 INFO L435 NwaCegarLoop]: 938 mSDtfsCounter, 4838 mSDsluCounter, 28432 mSDsCounter, 0 mSdLazyCounter, 18385 mSolverCounterSat, 47 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 13.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 4842 SdHoareTripleChecker+Valid, 29370 SdHoareTripleChecker+Invalid, 18432 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.1s SdHoareTripleChecker+Time, 47 IncrementalHoareTripleChecker+Valid, 18385 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 15.0s IncrementalHoareTripleChecker+Time [2024-11-24 00:07:04,581 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [4842 Valid, 29370 Invalid, 18432 Unknown, 0 Unchecked, 0.1s Time], IncrementalHoareTripleChecker [47 Valid, 18385 Invalid, 0 Unknown, 0 Unchecked, 15.0s Time] [2024-11-24 00:07:04,607 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 60457 states. [2024-11-24 00:07:05,571 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 60457 to 33094. [2024-11-24 00:07:05,586 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 33094 states, 32498 states have (on average 1.2793094959689828) internal successors, (41575), 32498 states have internal predecessors, (41575), 594 states have call successors, (594), 1 states have call predecessors, (594), 1 states have return successors, (594), 594 states have call predecessors, (594), 594 states have call successors, (594) [2024-11-24 00:07:05,629 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33094 states to 33094 states and 42763 transitions. [2024-11-24 00:07:05,631 INFO L78 Accepts]: Start accepts. Automaton has 33094 states and 42763 transitions. Word has length 356 [2024-11-24 00:07:05,632 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 00:07:05,632 INFO L471 AbstractCegarLoop]: Abstraction has 33094 states and 42763 transitions. [2024-11-24 00:07:05,632 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 96 states, 96 states have (on average 10.135416666666666) internal successors, (973), 96 states have internal predecessors, (973), 12 states have call successors, (18), 1 states have call predecessors, (18), 1 states have return successors, (18), 12 states have call predecessors, (18), 12 states have call successors, (18) [2024-11-24 00:07:05,632 INFO L276 IsEmpty]: Start isEmpty. Operand 33094 states and 42763 transitions. [2024-11-24 00:07:05,671 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 357 [2024-11-24 00:07:05,671 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 00:07:05,671 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 00:07:05,696 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_328789b6-5d68-4a2f-beb0-52c77b3443fd/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Ended with exit code 0 [2024-11-24 00:07:05,872 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 14 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_328789b6-5d68-4a2f-beb0-52c77b3443fd/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable54 [2024-11-24 00:07:05,872 INFO L396 AbstractCegarLoop]: === Iteration 56 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 00:07:05,873 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 00:07:05,873 INFO L85 PathProgramCache]: Analyzing trace with hash -152670903, now seen corresponding path program 1 times [2024-11-24 00:07:05,873 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 00:07:05,873 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1982072046] [2024-11-24 00:07:05,873 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 00:07:05,873 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 00:07:06,105 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 00:07:07,083 INFO L134 CoverageAnalysis]: Checked inductivity of 149 backedges. 89 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-24 00:07:07,083 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-24 00:07:07,083 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1982072046] [2024-11-24 00:07:07,083 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1982072046] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-24 00:07:07,083 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-24 00:07:07,083 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-11-24 00:07:07,083 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1290393441] [2024-11-24 00:07:07,083 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-24 00:07:07,084 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-11-24 00:07:07,084 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-24 00:07:07,084 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-11-24 00:07:07,084 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2024-11-24 00:07:07,085 INFO L87 Difference]: Start difference. First operand 33094 states and 42763 transitions. Second operand has 6 states, 6 states have (on average 54.833333333333336) internal successors, (329), 6 states have internal predecessors, (329), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-24 00:07:07,823 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 00:07:07,823 INFO L93 Difference]: Finished difference Result 68223 states and 88355 transitions. [2024-11-24 00:07:07,824 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-24 00:07:07,824 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 54.833333333333336) internal successors, (329), 6 states have internal predecessors, (329), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 356 [2024-11-24 00:07:07,825 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 00:07:07,871 INFO L225 Difference]: With dead ends: 68223 [2024-11-24 00:07:07,872 INFO L226 Difference]: Without dead ends: 47698 [2024-11-24 00:07:07,888 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2024-11-24 00:07:07,888 INFO L435 NwaCegarLoop]: 930 mSDtfsCounter, 370 mSDsluCounter, 3317 mSDsCounter, 0 mSdLazyCounter, 42 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 370 SdHoareTripleChecker+Valid, 4247 SdHoareTripleChecker+Invalid, 42 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 42 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-24 00:07:07,888 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [370 Valid, 4247 Invalid, 42 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 42 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-24 00:07:07,908 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 47698 states. [2024-11-24 00:07:09,091 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 47698 to 39810. [2024-11-24 00:07:09,117 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 39810 states, 38846 states have (on average 1.270478298923956) internal successors, (49353), 38846 states have internal predecessors, (49353), 962 states have call successors, (962), 1 states have call predecessors, (962), 1 states have return successors, (962), 962 states have call predecessors, (962), 962 states have call successors, (962) [2024-11-24 00:07:09,167 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39810 states to 39810 states and 51277 transitions. [2024-11-24 00:07:09,170 INFO L78 Accepts]: Start accepts. Automaton has 39810 states and 51277 transitions. Word has length 356 [2024-11-24 00:07:09,171 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 00:07:09,171 INFO L471 AbstractCegarLoop]: Abstraction has 39810 states and 51277 transitions. [2024-11-24 00:07:09,171 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 54.833333333333336) internal successors, (329), 6 states have internal predecessors, (329), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-24 00:07:09,171 INFO L276 IsEmpty]: Start isEmpty. Operand 39810 states and 51277 transitions. [2024-11-24 00:07:09,214 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 358 [2024-11-24 00:07:09,214 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 00:07:09,215 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 00:07:09,215 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable55 [2024-11-24 00:07:09,215 INFO L396 AbstractCegarLoop]: === Iteration 57 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 00:07:09,215 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 00:07:09,215 INFO L85 PathProgramCache]: Analyzing trace with hash 414587049, now seen corresponding path program 1 times [2024-11-24 00:07:09,216 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-24 00:07:09,216 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [289987023] [2024-11-24 00:07:09,216 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 00:07:09,216 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 00:07:12,825 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-24 00:07:12,825 INFO L357 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-24 00:07:16,207 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-24 00:07:16,513 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-24 00:07:16,513 INFO L340 BasicCegarLoop]: Counterexample is feasible [2024-11-24 00:07:16,514 INFO L782 garLoopResultBuilder]: Registering result UNSAFE for location ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION (0 of 1 remaining) [2024-11-24 00:07:16,516 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable56 [2024-11-24 00:07:16,520 INFO L422 BasicCegarLoop]: Path program histogram: [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 00:07:16,838 INFO L170 ceAbstractionStarter]: Computing trace abstraction results [2024-11-24 00:07:16,843 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 24.11 12:07:16 BoogieIcfgContainer [2024-11-24 00:07:16,843 INFO L131 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2024-11-24 00:07:16,844 INFO L112 PluginConnector]: ------------------------Witness Printer---------------------------- [2024-11-24 00:07:16,844 INFO L270 PluginConnector]: Initializing Witness Printer... [2024-11-24 00:07:16,844 INFO L274 PluginConnector]: Witness Printer initialized [2024-11-24 00:07:16,845 INFO L184 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 24.11 12:01:34" (3/4) ... [2024-11-24 00:07:16,847 INFO L149 WitnessPrinter]: No result that supports witness generation found [2024-11-24 00:07:16,848 INFO L131 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2024-11-24 00:07:16,850 INFO L158 Benchmark]: Toolchain (without parser) took 347218.77ms. Allocated memory was 142.6MB in the beginning and 5.0GB in the end (delta: 4.9GB). Free memory was 106.3MB in the beginning and 4.2GB in the end (delta: -4.1GB). Peak memory consumption was 739.4MB. Max. memory is 16.1GB. [2024-11-24 00:07:16,850 INFO L158 Benchmark]: CDTParser took 1.76ms. Allocated memory is still 167.8MB. Free memory is still 103.7MB. There was no memory consumed. Max. memory is 16.1GB. [2024-11-24 00:07:16,852 INFO L158 Benchmark]: CACSL2BoogieTranslator took 882.80ms. Allocated memory is still 142.6MB. Free memory was 106.0MB in the beginning and 76.4MB in the end (delta: 29.6MB). Peak memory consumption was 33.6MB. Max. memory is 16.1GB. [2024-11-24 00:07:16,852 INFO L158 Benchmark]: Boogie Procedure Inliner took 243.91ms. Allocated memory is still 142.6MB. Free memory was 76.4MB in the beginning and 44.7MB in the end (delta: 31.8MB). Peak memory consumption was 25.2MB. Max. memory is 16.1GB. [2024-11-24 00:07:16,852 INFO L158 Benchmark]: Boogie Preprocessor took 380.04ms. Allocated memory was 142.6MB in the beginning and 151.0MB in the end (delta: 8.4MB). Free memory was 44.7MB in the beginning and 91.4MB in the end (delta: -46.7MB). Peak memory consumption was 36.7MB. Max. memory is 16.1GB. [2024-11-24 00:07:16,852 INFO L158 Benchmark]: RCFGBuilder took 3265.11ms. Allocated memory was 151.0MB in the beginning and 377.5MB in the end (delta: 226.5MB). Free memory was 91.4MB in the beginning and 263.8MB in the end (delta: -172.4MB). Peak memory consumption was 139.7MB. Max. memory is 16.1GB. [2024-11-24 00:07:16,853 INFO L158 Benchmark]: TraceAbstraction took 342431.65ms. Allocated memory was 377.5MB in the beginning and 5.0GB in the end (delta: 4.6GB). Free memory was 263.8MB in the beginning and 4.2GB in the end (delta: -4.0GB). Peak memory consumption was 855.1MB. Max. memory is 16.1GB. [2024-11-24 00:07:16,856 INFO L158 Benchmark]: Witness Printer took 4.93ms. Allocated memory is still 5.0GB. Free memory was 4.2GB in the beginning and 4.2GB in the end (delta: 102.7kB). There was no memory consumed. Max. memory is 16.1GB. [2024-11-24 00:07:16,857 INFO L338 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 1.76ms. Allocated memory is still 167.8MB. Free memory is still 103.7MB. There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 882.80ms. Allocated memory is still 142.6MB. Free memory was 106.0MB in the beginning and 76.4MB in the end (delta: 29.6MB). Peak memory consumption was 33.6MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 243.91ms. Allocated memory is still 142.6MB. Free memory was 76.4MB in the beginning and 44.7MB in the end (delta: 31.8MB). Peak memory consumption was 25.2MB. Max. memory is 16.1GB. * Boogie Preprocessor took 380.04ms. Allocated memory was 142.6MB in the beginning and 151.0MB in the end (delta: 8.4MB). Free memory was 44.7MB in the beginning and 91.4MB in the end (delta: -46.7MB). Peak memory consumption was 36.7MB. Max. memory is 16.1GB. * RCFGBuilder took 3265.11ms. Allocated memory was 151.0MB in the beginning and 377.5MB in the end (delta: 226.5MB). Free memory was 91.4MB in the beginning and 263.8MB in the end (delta: -172.4MB). Peak memory consumption was 139.7MB. Max. memory is 16.1GB. * TraceAbstraction took 342431.65ms. Allocated memory was 377.5MB in the beginning and 5.0GB in the end (delta: 4.6GB). Free memory was 263.8MB in the beginning and 4.2GB in the end (delta: -4.0GB). Peak memory consumption was 855.1MB. Max. memory is 16.1GB. * Witness Printer took 4.93ms. Allocated memory is still 5.0GB. Free memory was 4.2GB in the beginning and 4.2GB in the end (delta: 102.7kB). There was no memory consumed. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: ErrorAutomatonStatistics NumberErrorTraces: 0, NumberStatementsAllTraces: 0, NumberRelevantStatements: 0, 0.0s ErrorAutomatonConstructionTimeTotal, 0.0s FaulLocalizationTime, NumberStatementsFirstTrace: -1, TraceLengthAvg: 0, 0.0s ErrorAutomatonConstructionTimeAvg, 0.0s ErrorAutomatonDifferenceTimeAvg, 0.0s ErrorAutomatonDifferenceTimeTotal, NumberOfNoEnhancement: 0, NumberOfFiniteEnhancement: 0, NumberOfInfiniteEnhancement: 0 - UnprovableResult [Line: 21]: Unable to prove that a call to reach_error is unreachable Unable to prove that a call to reach_error is unreachable Reason: overapproximation of bitwiseOr at line 145, overapproximation of bitwiseOr at line 290, overapproximation of bitwiseOr at line 126, overapproximation of bitwiseAnd at line 210, overapproximation of bitwiseAnd at line 299, overapproximation of bitwiseAnd at line 515, overapproximation of bitwiseAnd at line 106, overapproximation of bitwiseAnd at line 110, overapproximation of bitwiseAnd at line 146, overapproximation of bitwiseAnd at line 222, overapproximation of bitwiseAnd at line 384, overapproximation of bitwiseAnd at line 441, overapproximation of bitwiseAnd at line 228, overapproximation of bitwiseAnd at line 202, overapproximation of bitwiseAnd at line 403, overapproximation of bitwiseAnd at line 365, overapproximation of bitwiseAnd at line 234. Possible FailurePath: [L26] const SORT_1 mask_SORT_1 = (SORT_1)-1 >> (sizeof(SORT_1) * 8 - 1); [L27] const SORT_1 msb_SORT_1 = (SORT_1)1 << (1 - 1); [L29] const SORT_3 mask_SORT_3 = (SORT_3)-1 >> (sizeof(SORT_3) * 8 - 8); [L30] const SORT_3 msb_SORT_3 = (SORT_3)1 << (8 - 1); [L32] const SORT_11 mask_SORT_11 = (SORT_11)-1 >> (sizeof(SORT_11) * 8 - 5); [L33] const SORT_11 msb_SORT_11 = (SORT_11)1 << (5 - 1); [L35] const SORT_13 mask_SORT_13 = (SORT_13)-1 >> (sizeof(SORT_13) * 8 - 4); [L36] const SORT_13 msb_SORT_13 = (SORT_13)1 << (4 - 1); [L38] const SORT_19 mask_SORT_19 = (SORT_19)-1 >> (sizeof(SORT_19) * 8 - 3); [L39] const SORT_19 msb_SORT_19 = (SORT_19)1 << (3 - 1); [L41] const SORT_40 mask_SORT_40 = (SORT_40)-1 >> (sizeof(SORT_40) * 8 - 2); [L42] const SORT_40 msb_SORT_40 = (SORT_40)1 << (2 - 1); [L44] const SORT_13 var_15 = 8; [L45] const SORT_19 var_20 = 7; [L46] const SORT_19 var_25 = 6; [L47] const SORT_19 var_30 = 5; [L48] const SORT_19 var_35 = 4; [L49] const SORT_40 var_41 = 3; [L50] const SORT_40 var_46 = 2; [L51] const SORT_1 var_51 = 1; [L52] const SORT_13 var_64 = 9; [L53] const SORT_11 var_81 = 0; [L54] const SORT_1 var_111 = 0; [L55] const SORT_3 var_268 = 0; [L57] SORT_1 input_2; [L58] SORT_3 input_4; [L59] SORT_1 input_5; [L60] SORT_1 input_6; [L61] SORT_1 input_7; [L62] SORT_1 input_8; [L63] SORT_3 input_9; [L64] SORT_1 input_109; [L66] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L66] SORT_3 state_10 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L67] EXPR __VERIFIER_nondet_uchar() & mask_SORT_11 VAL [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L67] SORT_11 state_12 = __VERIFIER_nondet_uchar() & mask_SORT_11; [L68] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L68] SORT_3 state_18 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L69] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_18=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L69] SORT_3 state_24 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L70] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_18=0, state_24=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L70] SORT_3 state_29 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L71] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L71] SORT_3 state_34 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L72] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L72] SORT_3 state_39 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L73] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L73] SORT_3 state_45 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L74] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L74] SORT_3 state_50 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L75] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L75] SORT_3 state_55 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L76] EXPR __VERIFIER_nondet_uchar() & mask_SORT_11 VAL [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L76] SORT_11 state_60 = __VERIFIER_nondet_uchar() & mask_SORT_11; [L77] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L77] SORT_1 state_68 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L78] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L78] SORT_1 state_69 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L79] EXPR __VERIFIER_nondet_uchar() & mask_SORT_11 VAL [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L79] SORT_11 state_72 = __VERIFIER_nondet_uchar() & mask_SORT_11; [L80] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L80] SORT_3 state_87 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L81] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L81] SORT_1 state_91 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L82] EXPR __VERIFIER_nondet_uchar() & mask_SORT_11 VAL [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L82] SORT_11 state_136 = __VERIFIER_nondet_uchar() & mask_SORT_11; [L84] SORT_1 init_92_arg_1 = var_51; [L85] state_91 = init_92_arg_1 VAL [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L88] input_2 = __VERIFIER_nondet_uchar() [L89] input_4 = __VERIFIER_nondet_uchar() [L90] input_5 = __VERIFIER_nondet_uchar() [L91] input_6 = __VERIFIER_nondet_uchar() [L92] input_7 = __VERIFIER_nondet_uchar() [L93] EXPR input_7 & mask_SORT_1 VAL [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L93] input_7 = input_7 & mask_SORT_1 [L94] input_8 = __VERIFIER_nondet_uchar() [L95] input_9 = __VERIFIER_nondet_uchar() [L96] input_109 = __VERIFIER_nondet_uchar() [L98] SORT_1 var_93_arg_0 = input_7; [L99] SORT_1 var_93_arg_1 = state_91; [L100] SORT_1 var_93 = var_93_arg_0 == var_93_arg_1; [L101] SORT_1 var_94_arg_0 = var_51; [L102] SORT_1 var_94 = ~var_94_arg_0; [L103] SORT_1 var_95_arg_0 = var_93; [L104] SORT_1 var_95_arg_1 = var_94; VAL [input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_95_arg_0=0, var_95_arg_1=-2] [L105] EXPR var_95_arg_0 | var_95_arg_1 VAL [input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L105] SORT_1 var_95 = var_95_arg_0 | var_95_arg_1; [L106] EXPR var_95 & mask_SORT_1 VAL [input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L106] var_95 = var_95 & mask_SORT_1 [L107] SORT_1 constr_96_arg_0 = var_95; VAL [constr_96_arg_0=1, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L108] CALL assume_abort_if_not(constr_96_arg_0) VAL [\old(cond)=1] [L22] COND FALSE !(!cond) VAL [\old(cond)=1] [L108] RET assume_abort_if_not(constr_96_arg_0) VAL [constr_96_arg_0=1, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L109] SORT_13 var_65_arg_0 = var_64; VAL [constr_96_arg_0=1, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_65_arg_0=9, var_81=0] [L110] EXPR var_65_arg_0 & mask_SORT_13 VAL [constr_96_arg_0=1, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L110] var_65_arg_0 = var_65_arg_0 & mask_SORT_13 [L111] SORT_11 var_65 = var_65_arg_0; [L112] SORT_11 var_66_arg_0 = state_60; [L113] SORT_11 var_66_arg_1 = var_65; [L114] SORT_1 var_66 = var_66_arg_0 == var_66_arg_1; [L115] SORT_1 var_97_arg_0 = var_66; [L116] SORT_1 var_97 = ~var_97_arg_0; [L117] SORT_1 var_98_arg_0 = input_6; [L118] SORT_1 var_98 = ~var_98_arg_0; [L119] SORT_1 var_99_arg_0 = var_97; [L120] SORT_1 var_99_arg_1 = var_98; VAL [constr_96_arg_0=1, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_99_arg_0=-1, var_99_arg_1=-1] [L121] EXPR var_99_arg_0 | var_99_arg_1 VAL [constr_96_arg_0=1, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L121] SORT_1 var_99 = var_99_arg_0 | var_99_arg_1; [L122] SORT_1 var_100_arg_0 = var_51; [L123] SORT_1 var_100 = ~var_100_arg_0; [L124] SORT_1 var_101_arg_0 = var_99; [L125] SORT_1 var_101_arg_1 = var_100; VAL [constr_96_arg_0=1, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_101_arg_0=255, var_101_arg_1=-2, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L126] EXPR var_101_arg_0 | var_101_arg_1 VAL [constr_96_arg_0=1, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L126] SORT_1 var_101 = var_101_arg_0 | var_101_arg_1; [L127] EXPR var_101 & mask_SORT_1 VAL [constr_96_arg_0=1, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L127] var_101 = var_101 & mask_SORT_1 [L128] SORT_1 constr_102_arg_0 = var_101; VAL [constr_102_arg_0=1, constr_96_arg_0=1, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L129] CALL assume_abort_if_not(constr_102_arg_0) VAL [\old(cond)=1] [L22] COND FALSE !(!cond) VAL [\old(cond)=1] [L129] RET assume_abort_if_not(constr_102_arg_0) VAL [constr_102_arg_0=1, constr_96_arg_0=1, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L130] SORT_11 var_61_arg_0 = state_60; [L131] SORT_1 var_61 = var_61_arg_0 != 0; [L132] SORT_1 var_62_arg_0 = var_61; [L133] SORT_1 var_62 = ~var_62_arg_0; [L134] SORT_1 var_103_arg_0 = var_62; [L135] SORT_1 var_103 = ~var_103_arg_0; [L136] SORT_1 var_104_arg_0 = input_5; [L137] SORT_1 var_104 = ~var_104_arg_0; [L138] SORT_1 var_105_arg_0 = var_103; [L139] SORT_1 var_105_arg_1 = var_104; VAL [constr_102_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_105_arg_0=-256, var_105_arg_1=-1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L140] EXPR var_105_arg_0 | var_105_arg_1 VAL [constr_102_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L140] SORT_1 var_105 = var_105_arg_0 | var_105_arg_1; [L141] SORT_1 var_106_arg_0 = var_51; [L142] SORT_1 var_106 = ~var_106_arg_0; [L143] SORT_1 var_107_arg_0 = var_105; [L144] SORT_1 var_107_arg_1 = var_106; VAL [constr_102_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_107_arg_0=255, var_107_arg_1=-2, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L145] EXPR var_107_arg_0 | var_107_arg_1 VAL [constr_102_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L145] SORT_1 var_107 = var_107_arg_0 | var_107_arg_1; [L146] EXPR var_107 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L146] var_107 = var_107 & mask_SORT_1 [L147] SORT_1 constr_108_arg_0 = var_107; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L148] CALL assume_abort_if_not(constr_108_arg_0) VAL [\old(cond)=1] [L22] COND FALSE !(!cond) VAL [\old(cond)=1] [L148] RET assume_abort_if_not(constr_108_arg_0) VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L150] SORT_1 var_112_arg_0 = state_91; [L151] SORT_1 var_112_arg_1 = var_111; [L152] SORT_1 var_112_arg_2 = var_51; [L153] SORT_1 var_112 = var_112_arg_0 ? var_112_arg_1 : var_112_arg_2; [L154] SORT_1 var_70_arg_0 = state_69; [L155] SORT_1 var_70 = ~var_70_arg_0; [L156] SORT_1 var_71_arg_0 = state_68; [L157] SORT_1 var_71_arg_1 = var_70; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_71_arg_0=0, var_71_arg_1=-1, var_81=0] [L158] EXPR var_71_arg_0 & var_71_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L158] SORT_1 var_71 = var_71_arg_0 & var_71_arg_1; [L159] SORT_11 var_73_arg_0 = state_72; [L160] SORT_1 var_73 = var_73_arg_0 != 0; [L161] SORT_1 var_74_arg_0 = var_71; [L162] SORT_1 var_74_arg_1 = var_73; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_74_arg_0=0, var_74_arg_1=0, var_81=0] [L163] EXPR var_74_arg_0 & var_74_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L163] SORT_1 var_74 = var_74_arg_0 & var_74_arg_1; [L164] SORT_1 var_75_arg_0 = state_68; [L165] SORT_1 var_75 = ~var_75_arg_0; [L166] SORT_1 var_76_arg_0 = input_6; [L167] SORT_1 var_76_arg_1 = var_75; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_74=0, var_76_arg_0=0, var_76_arg_1=-1, var_81=0] [L168] EXPR var_76_arg_0 & var_76_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_74=0, var_81=0] [L168] SORT_1 var_76 = var_76_arg_0 & var_76_arg_1; [L169] SORT_1 var_77_arg_0 = var_76; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_74=0, var_77_arg_0=0, var_81=0] [L170] EXPR var_77_arg_0 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_74=0, var_81=0] [L170] var_77_arg_0 = var_77_arg_0 & mask_SORT_1 [L171] SORT_11 var_77 = var_77_arg_0; [L172] SORT_11 var_78_arg_0 = state_72; [L173] SORT_11 var_78_arg_1 = var_77; [L174] SORT_11 var_78 = var_78_arg_0 + var_78_arg_1; [L175] SORT_1 var_79_arg_0 = input_5; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_74=0, var_78=0, var_79_arg_0=0, var_81=0] [L176] EXPR var_79_arg_0 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_74=0, var_78=0, var_81=0] [L176] var_79_arg_0 = var_79_arg_0 & mask_SORT_1 [L177] SORT_11 var_79 = var_79_arg_0; [L178] SORT_11 var_80_arg_0 = var_78; [L179] SORT_11 var_80_arg_1 = var_79; [L180] SORT_11 var_80 = var_80_arg_0 - var_80_arg_1; [L181] SORT_1 var_82_arg_0 = input_7; [L182] SORT_11 var_82_arg_1 = var_81; [L183] SORT_11 var_82_arg_2 = var_80; [L184] SORT_11 var_82 = var_82_arg_0 ? var_82_arg_1 : var_82_arg_2; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_74=0, var_81=0, var_82=0] [L185] EXPR var_82 & mask_SORT_11 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_74=0, var_81=0] [L185] var_82 = var_82 & mask_SORT_11 [L186] SORT_11 var_83_arg_0 = var_82; [L187] SORT_1 var_83 = var_83_arg_0 != 0; [L188] SORT_1 var_84_arg_0 = var_83; [L189] SORT_1 var_84 = ~var_84_arg_0; [L190] SORT_1 var_85_arg_0 = var_74; [L191] SORT_1 var_85_arg_1 = var_84; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85_arg_0=0, var_85_arg_1=-1] [L192] EXPR var_85_arg_0 & var_85_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0] [L192] SORT_1 var_85 = var_85_arg_0 & var_85_arg_1; [L193] SORT_1 var_86_arg_0 = var_85; [L194] SORT_1 var_86 = ~var_86_arg_0; [L195] SORT_11 var_14_arg_0 = state_12; [L196] SORT_13 var_14 = var_14_arg_0 >> 0; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L197] EXPR var_14 & mask_SORT_13 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L197] var_14 = var_14 & mask_SORT_13 [L198] SORT_13 var_56_arg_0 = var_14; [L199] SORT_1 var_56 = var_56_arg_0 != 0; [L200] SORT_1 var_57_arg_0 = var_56; [L201] SORT_1 var_57 = ~var_57_arg_0; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_57=-1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L202] EXPR var_57 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L202] var_57 = var_57 & mask_SORT_1 [L203] SORT_1 var_52_arg_0 = var_51; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_52_arg_0=1, var_57=0, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L204] EXPR var_52_arg_0 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_57=0, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L204] var_52_arg_0 = var_52_arg_0 & mask_SORT_1 [L205] SORT_13 var_52 = var_52_arg_0; [L206] SORT_13 var_53_arg_0 = var_14; [L207] SORT_13 var_53_arg_1 = var_52; [L208] SORT_1 var_53 = var_53_arg_0 == var_53_arg_1; [L209] SORT_40 var_47_arg_0 = var_46; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_47_arg_0=2, var_51=1, var_53=0, var_57=0, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L210] EXPR var_47_arg_0 & mask_SORT_40 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_53=0, var_57=0, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L210] var_47_arg_0 = var_47_arg_0 & mask_SORT_40 [L211] SORT_13 var_47 = var_47_arg_0; [L212] SORT_13 var_48_arg_0 = var_14; [L213] SORT_13 var_48_arg_1 = var_47; [L214] SORT_1 var_48 = var_48_arg_0 == var_48_arg_1; [L215] SORT_40 var_42_arg_0 = var_41; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_42_arg_0=3, var_46=2, var_48=0, var_51=1, var_53=0, var_57=0, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L216] EXPR var_42_arg_0 & mask_SORT_40 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_48=0, var_51=1, var_53=0, var_57=0, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L216] var_42_arg_0 = var_42_arg_0 & mask_SORT_40 [L217] SORT_13 var_42 = var_42_arg_0; [L218] SORT_13 var_43_arg_0 = var_14; [L219] SORT_13 var_43_arg_1 = var_42; [L220] SORT_1 var_43 = var_43_arg_0 == var_43_arg_1; [L221] SORT_19 var_36_arg_0 = var_35; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_36_arg_0=4, var_41=3, var_43=0, var_46=2, var_48=0, var_51=1, var_53=0, var_57=0, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L222] EXPR var_36_arg_0 & mask_SORT_19 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_43=0, var_46=2, var_48=0, var_51=1, var_53=0, var_57=0, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L222] var_36_arg_0 = var_36_arg_0 & mask_SORT_19 [L223] SORT_13 var_36 = var_36_arg_0; [L224] SORT_13 var_37_arg_0 = var_14; [L225] SORT_13 var_37_arg_1 = var_36; [L226] SORT_1 var_37 = var_37_arg_0 == var_37_arg_1; [L227] SORT_19 var_31_arg_0 = var_30; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_31_arg_0=5, var_35=4, var_37=0, var_41=3, var_43=0, var_46=2, var_48=0, var_51=1, var_53=0, var_57=0, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L228] EXPR var_31_arg_0 & mask_SORT_19 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_37=0, var_41=3, var_43=0, var_46=2, var_48=0, var_51=1, var_53=0, var_57=0, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L228] var_31_arg_0 = var_31_arg_0 & mask_SORT_19 [L229] SORT_13 var_31 = var_31_arg_0; [L230] SORT_13 var_32_arg_0 = var_14; [L231] SORT_13 var_32_arg_1 = var_31; [L232] SORT_1 var_32 = var_32_arg_0 == var_32_arg_1; [L233] SORT_19 var_26_arg_0 = var_25; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_26_arg_0=6, var_30=5, var_32=0, var_35=4, var_37=0, var_41=3, var_43=0, var_46=2, var_48=0, var_51=1, var_53=0, var_57=0, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L234] EXPR var_26_arg_0 & mask_SORT_19 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_32=0, var_35=4, var_37=0, var_41=3, var_43=0, var_46=2, var_48=0, var_51=1, var_53=0, var_57=0, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L234] var_26_arg_0 = var_26_arg_0 & mask_SORT_19 [L235] SORT_13 var_26 = var_26_arg_0; [L236] SORT_13 var_27_arg_0 = var_14; [L237] SORT_13 var_27_arg_1 = var_26; [L238] SORT_1 var_27 = var_27_arg_0 == var_27_arg_1; [L239] SORT_19 var_21_arg_0 = var_20; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_14=0, var_15=8, var_20=7, var_21_arg_0=7, var_25=6, var_268=0, var_27=0, var_30=5, var_32=0, var_35=4, var_37=0, var_41=3, var_43=0, var_46=2, var_48=0, var_51=1, var_53=0, var_57=0, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L240] EXPR var_21_arg_0 & mask_SORT_19 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_27=0, var_30=5, var_32=0, var_35=4, var_37=0, var_41=3, var_43=0, var_46=2, var_48=0, var_51=1, var_53=0, var_57=0, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L240] var_21_arg_0 = var_21_arg_0 & mask_SORT_19 [L241] SORT_13 var_21 = var_21_arg_0; [L242] SORT_13 var_22_arg_0 = var_14; [L243] SORT_13 var_22_arg_1 = var_21; [L244] SORT_1 var_22 = var_22_arg_0 == var_22_arg_1; [L245] SORT_13 var_16_arg_0 = var_14; [L246] SORT_13 var_16_arg_1 = var_15; [L247] SORT_1 var_16 = var_16_arg_0 == var_16_arg_1; [L248] SORT_1 var_17_arg_0 = var_16; [L249] SORT_3 var_17_arg_1 = state_10; [L250] SORT_3 var_17_arg_2 = input_9; [L251] SORT_3 var_17 = var_17_arg_0 ? var_17_arg_1 : var_17_arg_2; [L252] SORT_1 var_23_arg_0 = var_22; [L253] SORT_3 var_23_arg_1 = state_18; [L254] SORT_3 var_23_arg_2 = var_17; [L255] SORT_3 var_23 = var_23_arg_0 ? var_23_arg_1 : var_23_arg_2; [L256] SORT_1 var_28_arg_0 = var_27; [L257] SORT_3 var_28_arg_1 = state_24; [L258] SORT_3 var_28_arg_2 = var_23; [L259] SORT_3 var_28 = var_28_arg_0 ? var_28_arg_1 : var_28_arg_2; [L260] SORT_1 var_33_arg_0 = var_32; [L261] SORT_3 var_33_arg_1 = state_29; [L262] SORT_3 var_33_arg_2 = var_28; [L263] SORT_3 var_33 = var_33_arg_0 ? var_33_arg_1 : var_33_arg_2; [L264] SORT_1 var_38_arg_0 = var_37; [L265] SORT_3 var_38_arg_1 = state_34; [L266] SORT_3 var_38_arg_2 = var_33; [L267] SORT_3 var_38 = var_38_arg_0 ? var_38_arg_1 : var_38_arg_2; [L268] SORT_1 var_44_arg_0 = var_43; [L269] SORT_3 var_44_arg_1 = state_39; [L270] SORT_3 var_44_arg_2 = var_38; [L271] SORT_3 var_44 = var_44_arg_0 ? var_44_arg_1 : var_44_arg_2; [L272] SORT_1 var_49_arg_0 = var_48; [L273] SORT_3 var_49_arg_1 = state_45; [L274] SORT_3 var_49_arg_2 = var_44; [L275] SORT_3 var_49 = var_49_arg_0 ? var_49_arg_1 : var_49_arg_2; [L276] SORT_1 var_54_arg_0 = var_53; [L277] SORT_3 var_54_arg_1 = state_50; [L278] SORT_3 var_54_arg_2 = var_49; [L279] SORT_3 var_54 = var_54_arg_0 ? var_54_arg_1 : var_54_arg_2; [L280] SORT_1 var_58_arg_0 = var_57; [L281] SORT_3 var_58_arg_1 = state_55; [L282] SORT_3 var_58_arg_2 = var_54; [L283] SORT_3 var_58 = var_58_arg_0 ? var_58_arg_1 : var_58_arg_2; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_58=255, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L284] EXPR var_58 & mask_SORT_3 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L284] var_58 = var_58 & mask_SORT_3 [L285] SORT_3 var_88_arg_0 = state_87; [L286] SORT_3 var_88_arg_1 = var_58; [L287] SORT_1 var_88 = var_88_arg_0 == var_88_arg_1; [L288] SORT_1 var_89_arg_0 = var_86; [L289] SORT_1 var_89_arg_1 = var_88; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0, var_89_arg_0=-1, var_89_arg_1=0] [L290] EXPR var_89_arg_0 | var_89_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L290] SORT_1 var_89 = var_89_arg_0 | var_89_arg_1; [L291] SORT_1 var_110_arg_0 = state_91; [L292] SORT_1 var_110_arg_1 = input_109; [L293] SORT_1 var_110_arg_2 = var_89; [L294] SORT_1 var_110 = var_110_arg_0 ? var_110_arg_1 : var_110_arg_2; [L295] SORT_1 var_113_arg_0 = var_110; [L296] SORT_1 var_113 = ~var_113_arg_0; [L297] SORT_1 var_114_arg_0 = var_112; [L298] SORT_1 var_114_arg_1 = var_113; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_114_arg_0=0, var_114_arg_1=-256, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L299] EXPR var_114_arg_0 & var_114_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L299] SORT_1 var_114 = var_114_arg_0 & var_114_arg_1; [L300] EXPR var_114 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L300] var_114 = var_114 & mask_SORT_1 [L301] SORT_1 bad_115_arg_0 = var_114; [L302] CALL __VERIFIER_assert(!(bad_115_arg_0)) [L21] COND FALSE !(!(cond)) [L302] RET __VERIFIER_assert(!(bad_115_arg_0)) [L304] SORT_11 var_137_arg_0 = state_136; [L305] SORT_13 var_137 = var_137_arg_0 >> 0; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L306] EXPR var_137 & mask_SORT_13 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L306] var_137 = var_137 & mask_SORT_13 [L307] SORT_13 var_194_arg_0 = var_137; [L308] SORT_13 var_194_arg_1 = var_15; [L309] SORT_1 var_194 = var_194_arg_0 == var_194_arg_1; [L310] SORT_1 var_195_arg_0 = input_6; [L311] SORT_1 var_195_arg_1 = var_194; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_137=0, var_15=8, var_195_arg_0=0, var_195_arg_1=0, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L312] EXPR var_195_arg_0 & var_195_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L312] SORT_1 var_195 = var_195_arg_0 & var_195_arg_1; [L313] EXPR var_195 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L313] var_195 = var_195 & mask_SORT_1 [L314] SORT_1 var_267_arg_0 = var_195; [L315] SORT_3 var_267_arg_1 = input_4; [L316] SORT_3 var_267_arg_2 = state_10; [L317] SORT_3 var_267 = var_267_arg_0 ? var_267_arg_1 : var_267_arg_2; [L318] SORT_1 var_269_arg_0 = input_7; [L319] SORT_3 var_269_arg_1 = var_268; [L320] SORT_3 var_269_arg_2 = var_267; [L321] SORT_3 var_269 = var_269_arg_0 ? var_269_arg_1 : var_269_arg_2; [L322] SORT_3 next_270_arg_1 = var_269; [L323] SORT_1 var_119_arg_0 = input_6; [L324] SORT_1 var_119_arg_1 = input_5; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, next_270_arg_1=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_119_arg_0=0, var_119_arg_1=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L325] EXPR var_119_arg_0 | var_119_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, next_270_arg_1=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L325] SORT_1 var_119 = var_119_arg_0 | var_119_arg_1; [L326] SORT_1 var_120_arg_0 = var_119; [L327] SORT_1 var_120_arg_1 = input_7; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, next_270_arg_1=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120_arg_0=0, var_120_arg_1=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L328] EXPR var_120_arg_0 | var_120_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, next_270_arg_1=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L328] SORT_1 var_120 = var_120_arg_0 | var_120_arg_1; [L329] EXPR var_120 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, next_270_arg_1=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L329] var_120 = var_120 & mask_SORT_1 [L330] SORT_1 var_198_arg_0 = input_5; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, next_270_arg_1=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_198_arg_0=0, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L331] EXPR var_198_arg_0 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, next_270_arg_1=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L331] var_198_arg_0 = var_198_arg_0 & mask_SORT_1 [L332] SORT_11 var_198 = var_198_arg_0; [L333] SORT_11 var_199_arg_0 = state_12; [L334] SORT_11 var_199_arg_1 = var_198; [L335] SORT_11 var_199 = var_199_arg_0 + var_199_arg_1; [L336] SORT_1 var_271_arg_0 = var_120; [L337] SORT_11 var_271_arg_1 = var_199; [L338] SORT_11 var_271_arg_2 = state_12; [L339] SORT_11 var_271 = var_271_arg_0 ? var_271_arg_1 : var_271_arg_2; [L340] SORT_1 var_272_arg_0 = input_7; [L341] SORT_11 var_272_arg_1 = var_81; [L342] SORT_11 var_272_arg_2 = var_271; [L343] SORT_11 var_272 = var_272_arg_0 ? var_272_arg_1 : var_272_arg_2; [L344] SORT_11 next_273_arg_1 = var_272; [L345] SORT_19 var_187_arg_0 = var_20; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_187_arg_0=7, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L346] EXPR var_187_arg_0 & mask_SORT_19 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L346] var_187_arg_0 = var_187_arg_0 & mask_SORT_19 [L347] SORT_13 var_187 = var_187_arg_0; [L348] SORT_13 var_188_arg_0 = var_137; [L349] SORT_13 var_188_arg_1 = var_187; [L350] SORT_1 var_188 = var_188_arg_0 == var_188_arg_1; [L351] SORT_1 var_189_arg_0 = input_6; [L352] SORT_1 var_189_arg_1 = var_188; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_189_arg_0=0, var_189_arg_1=0, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L353] EXPR var_189_arg_0 & var_189_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L353] SORT_1 var_189 = var_189_arg_0 & var_189_arg_1; [L354] EXPR var_189 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L354] var_189 = var_189 & mask_SORT_1 [L355] SORT_1 var_274_arg_0 = var_189; [L356] SORT_3 var_274_arg_1 = input_4; [L357] SORT_3 var_274_arg_2 = state_18; [L358] SORT_3 var_274 = var_274_arg_0 ? var_274_arg_1 : var_274_arg_2; [L359] SORT_1 var_275_arg_0 = input_7; [L360] SORT_3 var_275_arg_1 = var_268; [L361] SORT_3 var_275_arg_2 = var_274; [L362] SORT_3 var_275 = var_275_arg_0 ? var_275_arg_1 : var_275_arg_2; [L363] SORT_3 next_276_arg_1 = var_275; [L364] SORT_19 var_180_arg_0 = var_25; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, state_136=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_180_arg_0=6, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L365] EXPR var_180_arg_0 & mask_SORT_19 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, state_136=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L365] var_180_arg_0 = var_180_arg_0 & mask_SORT_19 [L366] SORT_13 var_180 = var_180_arg_0; [L367] SORT_13 var_181_arg_0 = var_137; [L368] SORT_13 var_181_arg_1 = var_180; [L369] SORT_1 var_181 = var_181_arg_0 == var_181_arg_1; [L370] SORT_1 var_182_arg_0 = input_6; [L371] SORT_1 var_182_arg_1 = var_181; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, state_136=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_182_arg_0=0, var_182_arg_1=1, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L372] EXPR var_182_arg_0 & var_182_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, state_136=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L372] SORT_1 var_182 = var_182_arg_0 & var_182_arg_1; [L373] EXPR var_182 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, state_136=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L373] var_182 = var_182 & mask_SORT_1 [L374] SORT_1 var_277_arg_0 = var_182; [L375] SORT_3 var_277_arg_1 = input_4; [L376] SORT_3 var_277_arg_2 = state_24; [L377] SORT_3 var_277 = var_277_arg_0 ? var_277_arg_1 : var_277_arg_2; [L378] SORT_1 var_278_arg_0 = input_7; [L379] SORT_3 var_278_arg_1 = var_268; [L380] SORT_3 var_278_arg_2 = var_277; [L381] SORT_3 var_278 = var_278_arg_0 ? var_278_arg_1 : var_278_arg_2; [L382] SORT_3 next_279_arg_1 = var_278; [L383] SORT_19 var_173_arg_0 = var_30; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, state_136=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_173_arg_0=5, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L384] EXPR var_173_arg_0 & mask_SORT_19 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, state_136=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L384] var_173_arg_0 = var_173_arg_0 & mask_SORT_19 [L385] SORT_13 var_173 = var_173_arg_0; [L386] SORT_13 var_174_arg_0 = var_137; [L387] SORT_13 var_174_arg_1 = var_173; [L388] SORT_1 var_174 = var_174_arg_0 == var_174_arg_1; [L389] SORT_1 var_175_arg_0 = input_6; [L390] SORT_1 var_175_arg_1 = var_174; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, state_136=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_175_arg_0=0, var_175_arg_1=0, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L391] EXPR var_175_arg_0 & var_175_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, state_136=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L391] SORT_1 var_175 = var_175_arg_0 & var_175_arg_1; [L392] EXPR var_175 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, state_136=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L392] var_175 = var_175 & mask_SORT_1 [L393] SORT_1 var_280_arg_0 = var_175; [L394] SORT_3 var_280_arg_1 = input_4; [L395] SORT_3 var_280_arg_2 = state_29; [L396] SORT_3 var_280 = var_280_arg_0 ? var_280_arg_1 : var_280_arg_2; [L397] SORT_1 var_281_arg_0 = input_7; [L398] SORT_3 var_281_arg_1 = var_268; [L399] SORT_3 var_281_arg_2 = var_280; [L400] SORT_3 var_281 = var_281_arg_0 ? var_281_arg_1 : var_281_arg_2; [L401] SORT_3 next_282_arg_1 = var_281; [L402] SORT_19 var_166_arg_0 = var_35; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, state_136=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_166_arg_0=4, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L403] EXPR var_166_arg_0 & mask_SORT_19 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, state_136=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L403] var_166_arg_0 = var_166_arg_0 & mask_SORT_19 [L404] SORT_13 var_166 = var_166_arg_0; [L405] SORT_13 var_167_arg_0 = var_137; [L406] SORT_13 var_167_arg_1 = var_166; [L407] SORT_1 var_167 = var_167_arg_0 == var_167_arg_1; [L408] SORT_1 var_168_arg_0 = input_6; [L409] SORT_1 var_168_arg_1 = var_167; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, state_136=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_168_arg_0=0, var_168_arg_1=0, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L410] EXPR var_168_arg_0 & var_168_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, state_136=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L410] SORT_1 var_168 = var_168_arg_0 & var_168_arg_1; [L411] EXPR var_168 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, state_136=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L411] var_168 = var_168 & mask_SORT_1 [L412] SORT_1 var_283_arg_0 = var_168; [L413] SORT_3 var_283_arg_1 = input_4; [L414] SORT_3 var_283_arg_2 = state_34; [L415] SORT_3 var_283 = var_283_arg_0 ? var_283_arg_1 : var_283_arg_2; [L416] SORT_1 var_284_arg_0 = input_7; [L417] SORT_3 var_284_arg_1 = var_268; [L418] SORT_3 var_284_arg_2 = var_283; [L419] SORT_3 var_284 = var_284_arg_0 ? var_284_arg_1 : var_284_arg_2; [L420] SORT_3 next_285_arg_1 = var_284; [L421] SORT_40 var_159_arg_0 = var_41; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, state_136=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_159_arg_0=3, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L422] EXPR var_159_arg_0 & mask_SORT_40 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, state_136=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L422] var_159_arg_0 = var_159_arg_0 & mask_SORT_40 [L423] SORT_13 var_159 = var_159_arg_0; [L424] SORT_13 var_160_arg_0 = var_137; [L425] SORT_13 var_160_arg_1 = var_159; [L426] SORT_1 var_160 = var_160_arg_0 == var_160_arg_1; [L427] SORT_1 var_161_arg_0 = input_6; [L428] SORT_1 var_161_arg_1 = var_160; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, state_136=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_161_arg_0=0, var_161_arg_1=0, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L429] EXPR var_161_arg_0 & var_161_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, state_136=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L429] SORT_1 var_161 = var_161_arg_0 & var_161_arg_1; [L430] EXPR var_161 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, state_136=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L430] var_161 = var_161 & mask_SORT_1 [L431] SORT_1 var_286_arg_0 = var_161; [L432] SORT_3 var_286_arg_1 = input_4; [L433] SORT_3 var_286_arg_2 = state_39; [L434] SORT_3 var_286 = var_286_arg_0 ? var_286_arg_1 : var_286_arg_2; [L435] SORT_1 var_287_arg_0 = input_7; [L436] SORT_3 var_287_arg_1 = var_268; [L437] SORT_3 var_287_arg_2 = var_286; [L438] SORT_3 var_287 = var_287_arg_0 ? var_287_arg_1 : var_287_arg_2; [L439] SORT_3 next_288_arg_1 = var_287; [L440] SORT_40 var_152_arg_0 = var_46; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, state_136=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_152_arg_0=2, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L441] EXPR var_152_arg_0 & mask_SORT_40 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, state_136=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L441] var_152_arg_0 = var_152_arg_0 & mask_SORT_40 [L442] SORT_13 var_152 = var_152_arg_0; [L443] SORT_13 var_153_arg_0 = var_137; [L444] SORT_13 var_153_arg_1 = var_152; [L445] SORT_1 var_153 = var_153_arg_0 == var_153_arg_1; [L446] SORT_1 var_154_arg_0 = input_6; [L447] SORT_1 var_154_arg_1 = var_153; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, state_136=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_154_arg_0=0, var_154_arg_1=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L448] EXPR var_154_arg_0 & var_154_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, state_136=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L448] SORT_1 var_154 = var_154_arg_0 & var_154_arg_1; [L449] EXPR var_154 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, state_136=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L449] var_154 = var_154 & mask_SORT_1 [L450] SORT_1 var_289_arg_0 = var_154; [L451] SORT_3 var_289_arg_1 = input_4; [L452] SORT_3 var_289_arg_2 = state_45; [L453] SORT_3 var_289 = var_289_arg_0 ? var_289_arg_1 : var_289_arg_2; [L454] SORT_1 var_290_arg_0 = input_7; [L455] SORT_3 var_290_arg_1 = var_268; [L456] SORT_3 var_290_arg_2 = var_289; [L457] SORT_3 var_290 = var_290_arg_0 ? var_290_arg_1 : var_290_arg_2; [L458] SORT_3 next_291_arg_1 = var_290; [L459] SORT_1 var_145_arg_0 = var_51; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, state_136=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_145_arg_0=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L460] EXPR var_145_arg_0 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, state_136=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L460] var_145_arg_0 = var_145_arg_0 & mask_SORT_1 [L461] SORT_13 var_145 = var_145_arg_0; [L462] SORT_13 var_146_arg_0 = var_137; [L463] SORT_13 var_146_arg_1 = var_145; [L464] SORT_1 var_146 = var_146_arg_0 == var_146_arg_1; [L465] SORT_1 var_147_arg_0 = input_6; [L466] SORT_1 var_147_arg_1 = var_146; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, state_136=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_147_arg_0=0, var_147_arg_1=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L467] EXPR var_147_arg_0 & var_147_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, state_136=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L467] SORT_1 var_147 = var_147_arg_0 & var_147_arg_1; [L468] EXPR var_147 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, state_136=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L468] var_147 = var_147 & mask_SORT_1 [L469] SORT_1 var_292_arg_0 = var_147; [L470] SORT_3 var_292_arg_1 = input_4; [L471] SORT_3 var_292_arg_2 = state_50; [L472] SORT_3 var_292 = var_292_arg_0 ? var_292_arg_1 : var_292_arg_2; [L473] SORT_1 var_293_arg_0 = input_7; [L474] SORT_3 var_293_arg_1 = var_268; [L475] SORT_3 var_293_arg_2 = var_292; [L476] SORT_3 var_293 = var_293_arg_0 ? var_293_arg_1 : var_293_arg_2; [L477] SORT_3 next_294_arg_1 = var_293; [L478] SORT_13 var_138_arg_0 = var_137; [L479] SORT_1 var_138 = var_138_arg_0 != 0; [L480] SORT_1 var_139_arg_0 = var_138; [L481] SORT_1 var_139 = ~var_139_arg_0; [L482] SORT_1 var_140_arg_0 = input_6; [L483] SORT_1 var_140_arg_1 = var_139; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, state_136=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_140_arg_0=0, var_140_arg_1=-1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L484] EXPR var_140_arg_0 & var_140_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, state_136=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L484] SORT_1 var_140 = var_140_arg_0 & var_140_arg_1; [L485] EXPR var_140 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, state_136=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L485] var_140 = var_140 & mask_SORT_1 [L486] SORT_1 var_295_arg_0 = var_140; [L487] SORT_3 var_295_arg_1 = input_4; [L488] SORT_3 var_295_arg_2 = state_55; [L489] SORT_3 var_295 = var_295_arg_0 ? var_295_arg_1 : var_295_arg_2; [L490] SORT_1 var_296_arg_0 = input_7; [L491] SORT_3 var_296_arg_1 = var_268; [L492] SORT_3 var_296_arg_2 = var_295; [L493] SORT_3 var_296 = var_296_arg_0 ? var_296_arg_1 : var_296_arg_2; [L494] SORT_3 next_297_arg_1 = var_296; [L495] SORT_1 var_298_arg_0 = input_6; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, state_136=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_25=6, var_268=0, var_298_arg_0=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L496] EXPR var_298_arg_0 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, state_136=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L496] var_298_arg_0 = var_298_arg_0 & mask_SORT_1 [L497] SORT_11 var_298 = var_298_arg_0; [L498] SORT_11 var_299_arg_0 = state_60; [L499] SORT_11 var_299_arg_1 = var_298; [L500] SORT_11 var_299 = var_299_arg_0 + var_299_arg_1; [L501] SORT_1 var_300_arg_0 = input_5; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, state_136=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_25=6, var_268=0, var_299=0, var_300_arg_0=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L502] EXPR var_300_arg_0 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, state_136=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_25=6, var_268=0, var_299=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L502] var_300_arg_0 = var_300_arg_0 & mask_SORT_1 [L503] SORT_11 var_300 = var_300_arg_0; [L504] SORT_11 var_301_arg_0 = var_299; [L505] SORT_11 var_301_arg_1 = var_300; [L506] SORT_11 var_301 = var_301_arg_0 - var_301_arg_1; [L507] SORT_1 var_302_arg_0 = input_7; [L508] SORT_11 var_302_arg_1 = var_81; [L509] SORT_11 var_302_arg_2 = var_301; [L510] SORT_11 var_302 = var_302_arg_0 ? var_302_arg_1 : var_302_arg_2; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, state_136=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_25=6, var_268=0, var_302=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L511] EXPR var_302 & mask_SORT_11 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, state_136=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L511] var_302 = var_302 & mask_SORT_11 [L512] SORT_11 next_303_arg_1 = var_302; [L513] SORT_1 var_228_arg_0 = state_68; [L514] SORT_1 var_228 = ~var_228_arg_0; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, state_136=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_228=-1, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L515] EXPR var_228 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, state_136=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L515] var_228 = var_228 & mask_SORT_1 [L516] SORT_1 var_224_arg_0 = input_8; [L517] SORT_1 var_224_arg_1 = input_6; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, state_136=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_224_arg_0=0, var_224_arg_1=0, var_228=0, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L518] EXPR var_224_arg_0 & var_224_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, state_136=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_228=0, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L518] SORT_1 var_224 = var_224_arg_0 & var_224_arg_1; [L519] SORT_1 var_225_arg_0 = state_68; [L520] SORT_1 var_225_arg_1 = var_224; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, state_136=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_224=0, var_225_arg_0=0, var_225_arg_1=0, var_228=0, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L521] EXPR var_225_arg_0 | var_225_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, state_136=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_224=0, var_228=0, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L521] SORT_1 var_225 = var_225_arg_0 | var_225_arg_1; [L522] SORT_1 var_304_arg_0 = var_228; [L523] SORT_1 var_304_arg_1 = var_225; [L524] SORT_1 var_304_arg_2 = state_68; [L525] SORT_1 var_304 = var_304_arg_0 ? var_304_arg_1 : var_304_arg_2; [L526] SORT_1 var_305_arg_0 = input_7; [L527] SORT_1 var_305_arg_1 = var_111; [L528] SORT_1 var_305_arg_2 = var_304; [L529] SORT_1 var_305 = var_305_arg_0 ? var_305_arg_1 : var_305_arg_2; [L530] SORT_1 next_306_arg_1 = var_305; [L531] SORT_1 var_236_arg_0 = var_85; [L532] SORT_1 var_236_arg_1 = state_69; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, next_306_arg_1=0, state_136=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_224=0, var_228=0, var_236_arg_0=0, var_236_arg_1=0, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0] [L533] EXPR var_236_arg_0 | var_236_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, next_306_arg_1=0, state_136=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_224=0, var_228=0, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0] [L533] SORT_1 var_236 = var_236_arg_0 | var_236_arg_1; [L534] SORT_1 var_307_arg_0 = var_51; [L535] SORT_1 var_307_arg_1 = var_236; [L536] SORT_1 var_307_arg_2 = state_69; [L537] SORT_1 var_307 = var_307_arg_0 ? var_307_arg_1 : var_307_arg_2; [L538] SORT_1 var_308_arg_0 = input_7; [L539] SORT_1 var_308_arg_1 = var_111; [L540] SORT_1 var_308_arg_2 = var_307; [L541] SORT_1 var_308 = var_308_arg_0 ? var_308_arg_1 : var_308_arg_2; [L542] SORT_1 next_309_arg_1 = var_308; [L543] SORT_1 var_248_arg_0 = input_6; [L544] SORT_1 var_248_arg_1 = input_5; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, next_306_arg_1=0, next_309_arg_1=0, state_136=0, state_68=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_224=0, var_228=0, var_248_arg_0=0, var_248_arg_1=0, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0] [L545] EXPR var_248_arg_0 | var_248_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, next_306_arg_1=0, next_309_arg_1=0, state_136=0, state_68=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_224=0, var_228=0, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0] [L545] SORT_1 var_248 = var_248_arg_0 | var_248_arg_1; [L546] SORT_1 var_249_arg_0 = var_248; [L547] SORT_1 var_249_arg_1 = input_7; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, next_306_arg_1=0, next_309_arg_1=0, state_136=0, state_68=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_224=0, var_228=0, var_249_arg_0=0, var_249_arg_1=0, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0] [L548] EXPR var_249_arg_0 | var_249_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, next_306_arg_1=0, next_309_arg_1=0, state_136=0, state_68=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_224=0, var_228=0, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0] [L548] SORT_1 var_249 = var_249_arg_0 | var_249_arg_1; [L549] SORT_1 var_250_arg_0 = var_249; [L550] SORT_1 var_250_arg_1 = state_68; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, next_306_arg_1=0, next_309_arg_1=0, state_136=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_224=0, var_228=0, var_250_arg_0=0, var_250_arg_1=0, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0] [L551] EXPR var_250_arg_0 | var_250_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, next_306_arg_1=0, next_309_arg_1=0, state_136=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_224=0, var_228=0, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0] [L551] SORT_1 var_250 = var_250_arg_0 | var_250_arg_1; [L552] EXPR var_250 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, next_306_arg_1=0, next_309_arg_1=0, state_136=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_224=0, var_228=0, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0] [L552] var_250 = var_250 & mask_SORT_1 [L553] SORT_1 var_310_arg_0 = var_250; [L554] SORT_11 var_310_arg_1 = var_82; [L555] SORT_11 var_310_arg_2 = state_72; [L556] SORT_11 var_310 = var_310_arg_0 ? var_310_arg_1 : var_310_arg_2; [L557] SORT_1 var_311_arg_0 = input_7; [L558] SORT_11 var_311_arg_1 = var_81; [L559] SORT_11 var_311_arg_2 = var_310; [L560] SORT_11 var_311 = var_311_arg_0 ? var_311_arg_1 : var_311_arg_2; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, next_306_arg_1=0, next_309_arg_1=0, state_136=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_224=0, var_228=0, var_25=6, var_268=0, var_30=5, var_311=0, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L561] EXPR var_311 & mask_SORT_11 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, next_306_arg_1=0, next_309_arg_1=0, state_136=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_224=0, var_228=0, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L561] var_311 = var_311 & mask_SORT_11 [L562] SORT_11 next_312_arg_1 = var_311; [L563] SORT_1 var_233_arg_0 = var_224; [L564] SORT_1 var_233_arg_1 = var_228; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, next_306_arg_1=0, next_309_arg_1=0, next_312_arg_1=0, state_136=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_233_arg_0=0, var_233_arg_1=0, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L565] EXPR var_233_arg_0 & var_233_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, next_306_arg_1=0, next_309_arg_1=0, next_312_arg_1=0, state_136=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L565] SORT_1 var_233 = var_233_arg_0 & var_233_arg_1; [L566] EXPR var_233 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, next_306_arg_1=0, next_309_arg_1=0, next_312_arg_1=0, state_136=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L566] var_233 = var_233 & mask_SORT_1 [L567] SORT_1 var_313_arg_0 = var_233; [L568] SORT_3 var_313_arg_1 = input_4; [L569] SORT_3 var_313_arg_2 = state_87; [L570] SORT_3 var_313 = var_313_arg_0 ? var_313_arg_1 : var_313_arg_2; [L571] SORT_1 var_314_arg_0 = input_7; [L572] SORT_3 var_314_arg_1 = var_268; [L573] SORT_3 var_314_arg_2 = var_313; [L574] SORT_3 var_314 = var_314_arg_0 ? var_314_arg_1 : var_314_arg_2; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, next_306_arg_1=0, next_309_arg_1=0, next_312_arg_1=0, state_136=0, var_111=0, var_120=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_314=0, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L575] EXPR var_314 & mask_SORT_3 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, next_306_arg_1=0, next_309_arg_1=0, next_312_arg_1=0, state_136=0, var_111=0, var_120=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L575] var_314 = var_314 & mask_SORT_3 [L576] SORT_3 next_315_arg_1 = var_314; [L577] SORT_1 next_316_arg_1 = var_111; [L578] SORT_1 var_204_arg_0 = input_6; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, next_306_arg_1=0, next_309_arg_1=0, next_312_arg_1=0, next_315_arg_1=0, next_316_arg_1=0, state_136=0, var_111=0, var_120=0, var_15=8, var_204_arg_0=0, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L579] EXPR var_204_arg_0 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, next_306_arg_1=0, next_309_arg_1=0, next_312_arg_1=0, next_315_arg_1=0, next_316_arg_1=0, state_136=0, var_111=0, var_120=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L579] var_204_arg_0 = var_204_arg_0 & mask_SORT_1 [L580] SORT_11 var_204 = var_204_arg_0; [L581] SORT_11 var_205_arg_0 = state_136; [L582] SORT_11 var_205_arg_1 = var_204; [L583] SORT_11 var_205 = var_205_arg_0 + var_205_arg_1; [L584] SORT_1 var_317_arg_0 = var_120; [L585] SORT_11 var_317_arg_1 = var_205; [L586] SORT_11 var_317_arg_2 = state_136; [L587] SORT_11 var_317 = var_317_arg_0 ? var_317_arg_1 : var_317_arg_2; [L588] SORT_1 var_318_arg_0 = input_7; [L589] SORT_11 var_318_arg_1 = var_81; [L590] SORT_11 var_318_arg_2 = var_317; [L591] SORT_11 var_318 = var_318_arg_0 ? var_318_arg_1 : var_318_arg_2; [L592] SORT_11 next_319_arg_1 = var_318; [L594] state_10 = next_270_arg_1 [L595] state_12 = next_273_arg_1 [L596] state_18 = next_276_arg_1 [L597] state_24 = next_279_arg_1 [L598] state_29 = next_282_arg_1 [L599] state_34 = next_285_arg_1 [L600] state_39 = next_288_arg_1 [L601] state_45 = next_291_arg_1 [L602] state_50 = next_294_arg_1 [L603] state_55 = next_297_arg_1 [L604] state_60 = next_303_arg_1 [L605] state_68 = next_306_arg_1 [L606] state_69 = next_309_arg_1 [L607] state_72 = next_312_arg_1 [L608] state_87 = next_315_arg_1 [L609] state_91 = next_316_arg_1 [L610] state_136 = next_319_arg_1 [L88] input_2 = __VERIFIER_nondet_uchar() [L89] input_4 = __VERIFIER_nondet_uchar() [L90] input_5 = __VERIFIER_nondet_uchar() [L91] input_6 = __VERIFIER_nondet_uchar() [L92] input_7 = __VERIFIER_nondet_uchar() [L93] EXPR input_7 & mask_SORT_1 VAL [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L93] input_7 = input_7 & mask_SORT_1 [L94] input_8 = __VERIFIER_nondet_uchar() [L95] input_9 = __VERIFIER_nondet_uchar() [L96] input_109 = __VERIFIER_nondet_uchar() [L98] SORT_1 var_93_arg_0 = input_7; [L99] SORT_1 var_93_arg_1 = state_91; [L100] SORT_1 var_93 = var_93_arg_0 == var_93_arg_1; [L101] SORT_1 var_94_arg_0 = var_51; [L102] SORT_1 var_94 = ~var_94_arg_0; [L103] SORT_1 var_95_arg_0 = var_93; [L104] SORT_1 var_95_arg_1 = var_94; VAL [input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_95_arg_0=0, var_95_arg_1=-2] [L105] EXPR var_95_arg_0 | var_95_arg_1 VAL [input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L105] SORT_1 var_95 = var_95_arg_0 | var_95_arg_1; [L106] EXPR var_95 & mask_SORT_1 VAL [input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L106] var_95 = var_95 & mask_SORT_1 [L107] SORT_1 constr_96_arg_0 = var_95; VAL [constr_96_arg_0=1, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L108] CALL assume_abort_if_not(constr_96_arg_0) VAL [\old(cond)=1] [L22] COND FALSE !(!cond) VAL [\old(cond)=1] [L108] RET assume_abort_if_not(constr_96_arg_0) VAL [constr_96_arg_0=1, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L109] SORT_13 var_65_arg_0 = var_64; VAL [constr_96_arg_0=1, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_65_arg_0=9, var_81=0] [L110] EXPR var_65_arg_0 & mask_SORT_13 VAL [constr_96_arg_0=1, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L110] var_65_arg_0 = var_65_arg_0 & mask_SORT_13 [L111] SORT_11 var_65 = var_65_arg_0; [L112] SORT_11 var_66_arg_0 = state_60; [L113] SORT_11 var_66_arg_1 = var_65; [L114] SORT_1 var_66 = var_66_arg_0 == var_66_arg_1; [L115] SORT_1 var_97_arg_0 = var_66; [L116] SORT_1 var_97 = ~var_97_arg_0; [L117] SORT_1 var_98_arg_0 = input_6; [L118] SORT_1 var_98 = ~var_98_arg_0; [L119] SORT_1 var_99_arg_0 = var_97; [L120] SORT_1 var_99_arg_1 = var_98; VAL [constr_96_arg_0=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_99_arg_0=-1, var_99_arg_1=-1] [L121] EXPR var_99_arg_0 | var_99_arg_1 VAL [constr_96_arg_0=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L121] SORT_1 var_99 = var_99_arg_0 | var_99_arg_1; [L122] SORT_1 var_100_arg_0 = var_51; [L123] SORT_1 var_100 = ~var_100_arg_0; [L124] SORT_1 var_101_arg_0 = var_99; [L125] SORT_1 var_101_arg_1 = var_100; VAL [constr_96_arg_0=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_101_arg_0=255, var_101_arg_1=-2, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L126] EXPR var_101_arg_0 | var_101_arg_1 VAL [constr_96_arg_0=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L126] SORT_1 var_101 = var_101_arg_0 | var_101_arg_1; [L127] EXPR var_101 & mask_SORT_1 VAL [constr_96_arg_0=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L127] var_101 = var_101 & mask_SORT_1 [L128] SORT_1 constr_102_arg_0 = var_101; VAL [constr_102_arg_0=1, constr_96_arg_0=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L129] CALL assume_abort_if_not(constr_102_arg_0) VAL [\old(cond)=1] [L22] COND FALSE !(!cond) VAL [\old(cond)=1] [L129] RET assume_abort_if_not(constr_102_arg_0) VAL [constr_102_arg_0=1, constr_96_arg_0=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L130] SORT_11 var_61_arg_0 = state_60; [L131] SORT_1 var_61 = var_61_arg_0 != 0; [L132] SORT_1 var_62_arg_0 = var_61; [L133] SORT_1 var_62 = ~var_62_arg_0; [L134] SORT_1 var_103_arg_0 = var_62; [L135] SORT_1 var_103 = ~var_103_arg_0; [L136] SORT_1 var_104_arg_0 = input_5; [L137] SORT_1 var_104 = ~var_104_arg_0; [L138] SORT_1 var_105_arg_0 = var_103; [L139] SORT_1 var_105_arg_1 = var_104; VAL [constr_102_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_105_arg_0=-256, var_105_arg_1=-2, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L140] EXPR var_105_arg_0 | var_105_arg_1 VAL [constr_102_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L140] SORT_1 var_105 = var_105_arg_0 | var_105_arg_1; [L141] SORT_1 var_106_arg_0 = var_51; [L142] SORT_1 var_106 = ~var_106_arg_0; [L143] SORT_1 var_107_arg_0 = var_105; [L144] SORT_1 var_107_arg_1 = var_106; VAL [constr_102_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_107_arg_0=254, var_107_arg_1=-2, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L145] EXPR var_107_arg_0 | var_107_arg_1 VAL [constr_102_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L145] SORT_1 var_107 = var_107_arg_0 | var_107_arg_1; [L146] EXPR var_107 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L146] var_107 = var_107 & mask_SORT_1 [L147] SORT_1 constr_108_arg_0 = var_107; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L148] CALL assume_abort_if_not(constr_108_arg_0) VAL [\old(cond)=1] [L22] COND FALSE !(!cond) VAL [\old(cond)=1] [L148] RET assume_abort_if_not(constr_108_arg_0) VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L150] SORT_1 var_112_arg_0 = state_91; [L151] SORT_1 var_112_arg_1 = var_111; [L152] SORT_1 var_112_arg_2 = var_51; [L153] SORT_1 var_112 = var_112_arg_0 ? var_112_arg_1 : var_112_arg_2; [L154] SORT_1 var_70_arg_0 = state_69; [L155] SORT_1 var_70 = ~var_70_arg_0; [L156] SORT_1 var_71_arg_0 = state_68; [L157] SORT_1 var_71_arg_1 = var_70; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_71_arg_0=0, var_71_arg_1=-1, var_81=0] [L158] EXPR var_71_arg_0 & var_71_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L158] SORT_1 var_71 = var_71_arg_0 & var_71_arg_1; [L159] SORT_11 var_73_arg_0 = state_72; [L160] SORT_1 var_73 = var_73_arg_0 != 0; [L161] SORT_1 var_74_arg_0 = var_71; [L162] SORT_1 var_74_arg_1 = var_73; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_74_arg_0=0, var_74_arg_1=0, var_81=0] [L163] EXPR var_74_arg_0 & var_74_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L163] SORT_1 var_74 = var_74_arg_0 & var_74_arg_1; [L164] SORT_1 var_75_arg_0 = state_68; [L165] SORT_1 var_75 = ~var_75_arg_0; [L166] SORT_1 var_76_arg_0 = input_6; [L167] SORT_1 var_76_arg_1 = var_75; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_74=0, var_76_arg_0=0, var_76_arg_1=-1, var_81=0] [L168] EXPR var_76_arg_0 & var_76_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_74=0, var_81=0] [L168] SORT_1 var_76 = var_76_arg_0 & var_76_arg_1; [L169] SORT_1 var_77_arg_0 = var_76; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_74=0, var_77_arg_0=0, var_81=0] [L170] EXPR var_77_arg_0 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_74=0, var_81=0] [L170] var_77_arg_0 = var_77_arg_0 & mask_SORT_1 [L171] SORT_11 var_77 = var_77_arg_0; [L172] SORT_11 var_78_arg_0 = state_72; [L173] SORT_11 var_78_arg_1 = var_77; [L174] SORT_11 var_78 = var_78_arg_0 + var_78_arg_1; [L175] SORT_1 var_79_arg_0 = input_5; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_74=0, var_78=0, var_79_arg_0=1, var_81=0] [L176] EXPR var_79_arg_0 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_74=0, var_78=0, var_81=0] [L176] var_79_arg_0 = var_79_arg_0 & mask_SORT_1 [L177] SORT_11 var_79 = var_79_arg_0; [L178] SORT_11 var_80_arg_0 = var_78; [L179] SORT_11 var_80_arg_1 = var_79; [L180] SORT_11 var_80 = var_80_arg_0 - var_80_arg_1; [L181] SORT_1 var_82_arg_0 = input_7; [L182] SORT_11 var_82_arg_1 = var_81; [L183] SORT_11 var_82_arg_2 = var_80; [L184] SORT_11 var_82 = var_82_arg_0 ? var_82_arg_1 : var_82_arg_2; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_74=0, var_81=0, var_82=0] [L185] EXPR var_82 & mask_SORT_11 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_74=0, var_81=0] [L185] var_82 = var_82 & mask_SORT_11 [L186] SORT_11 var_83_arg_0 = var_82; [L187] SORT_1 var_83 = var_83_arg_0 != 0; [L188] SORT_1 var_84_arg_0 = var_83; [L189] SORT_1 var_84 = ~var_84_arg_0; [L190] SORT_1 var_85_arg_0 = var_74; [L191] SORT_1 var_85_arg_1 = var_84; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85_arg_0=0, var_85_arg_1=-1] [L192] EXPR var_85_arg_0 & var_85_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0] [L192] SORT_1 var_85 = var_85_arg_0 & var_85_arg_1; [L193] SORT_1 var_86_arg_0 = var_85; [L194] SORT_1 var_86 = ~var_86_arg_0; [L195] SORT_11 var_14_arg_0 = state_12; [L196] SORT_13 var_14 = var_14_arg_0 >> 0; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L197] EXPR var_14 & mask_SORT_13 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L197] var_14 = var_14 & mask_SORT_13 [L198] SORT_13 var_56_arg_0 = var_14; [L199] SORT_1 var_56 = var_56_arg_0 != 0; [L200] SORT_1 var_57_arg_0 = var_56; [L201] SORT_1 var_57 = ~var_57_arg_0; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_57=-1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L202] EXPR var_57 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L202] var_57 = var_57 & mask_SORT_1 [L203] SORT_1 var_52_arg_0 = var_51; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_52_arg_0=1, var_57=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L204] EXPR var_52_arg_0 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_57=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L204] var_52_arg_0 = var_52_arg_0 & mask_SORT_1 [L205] SORT_13 var_52 = var_52_arg_0; [L206] SORT_13 var_53_arg_0 = var_14; [L207] SORT_13 var_53_arg_1 = var_52; [L208] SORT_1 var_53 = var_53_arg_0 == var_53_arg_1; [L209] SORT_40 var_47_arg_0 = var_46; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_47_arg_0=2, var_51=1, var_53=0, var_57=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L210] EXPR var_47_arg_0 & mask_SORT_40 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_53=0, var_57=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L210] var_47_arg_0 = var_47_arg_0 & mask_SORT_40 [L211] SORT_13 var_47 = var_47_arg_0; [L212] SORT_13 var_48_arg_0 = var_14; [L213] SORT_13 var_48_arg_1 = var_47; [L214] SORT_1 var_48 = var_48_arg_0 == var_48_arg_1; [L215] SORT_40 var_42_arg_0 = var_41; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_42_arg_0=3, var_46=2, var_48=0, var_51=1, var_53=0, var_57=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L216] EXPR var_42_arg_0 & mask_SORT_40 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_48=0, var_51=1, var_53=0, var_57=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L216] var_42_arg_0 = var_42_arg_0 & mask_SORT_40 [L217] SORT_13 var_42 = var_42_arg_0; [L218] SORT_13 var_43_arg_0 = var_14; [L219] SORT_13 var_43_arg_1 = var_42; [L220] SORT_1 var_43 = var_43_arg_0 == var_43_arg_1; [L221] SORT_19 var_36_arg_0 = var_35; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_36_arg_0=4, var_41=3, var_43=0, var_46=2, var_48=0, var_51=1, var_53=0, var_57=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L222] EXPR var_36_arg_0 & mask_SORT_19 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_43=0, var_46=2, var_48=0, var_51=1, var_53=0, var_57=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L222] var_36_arg_0 = var_36_arg_0 & mask_SORT_19 [L223] SORT_13 var_36 = var_36_arg_0; [L224] SORT_13 var_37_arg_0 = var_14; [L225] SORT_13 var_37_arg_1 = var_36; [L226] SORT_1 var_37 = var_37_arg_0 == var_37_arg_1; [L227] SORT_19 var_31_arg_0 = var_30; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_31_arg_0=5, var_35=4, var_37=0, var_41=3, var_43=0, var_46=2, var_48=0, var_51=1, var_53=0, var_57=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L228] EXPR var_31_arg_0 & mask_SORT_19 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_37=0, var_41=3, var_43=0, var_46=2, var_48=0, var_51=1, var_53=0, var_57=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L228] var_31_arg_0 = var_31_arg_0 & mask_SORT_19 [L229] SORT_13 var_31 = var_31_arg_0; [L230] SORT_13 var_32_arg_0 = var_14; [L231] SORT_13 var_32_arg_1 = var_31; [L232] SORT_1 var_32 = var_32_arg_0 == var_32_arg_1; [L233] SORT_19 var_26_arg_0 = var_25; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_26_arg_0=6, var_30=5, var_32=0, var_35=4, var_37=0, var_41=3, var_43=0, var_46=2, var_48=0, var_51=1, var_53=0, var_57=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L234] EXPR var_26_arg_0 & mask_SORT_19 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_32=0, var_35=4, var_37=0, var_41=3, var_43=0, var_46=2, var_48=0, var_51=1, var_53=0, var_57=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L234] var_26_arg_0 = var_26_arg_0 & mask_SORT_19 [L235] SORT_13 var_26 = var_26_arg_0; [L236] SORT_13 var_27_arg_0 = var_14; [L237] SORT_13 var_27_arg_1 = var_26; [L238] SORT_1 var_27 = var_27_arg_0 == var_27_arg_1; [L239] SORT_19 var_21_arg_0 = var_20; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_14=0, var_15=8, var_20=7, var_21_arg_0=7, var_25=6, var_268=0, var_27=1, var_30=5, var_32=0, var_35=4, var_37=0, var_41=3, var_43=0, var_46=2, var_48=0, var_51=1, var_53=0, var_57=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L240] EXPR var_21_arg_0 & mask_SORT_19 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_27=1, var_30=5, var_32=0, var_35=4, var_37=0, var_41=3, var_43=0, var_46=2, var_48=0, var_51=1, var_53=0, var_57=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L240] var_21_arg_0 = var_21_arg_0 & mask_SORT_19 [L241] SORT_13 var_21 = var_21_arg_0; [L242] SORT_13 var_22_arg_0 = var_14; [L243] SORT_13 var_22_arg_1 = var_21; [L244] SORT_1 var_22 = var_22_arg_0 == var_22_arg_1; [L245] SORT_13 var_16_arg_0 = var_14; [L246] SORT_13 var_16_arg_1 = var_15; [L247] SORT_1 var_16 = var_16_arg_0 == var_16_arg_1; [L248] SORT_1 var_17_arg_0 = var_16; [L249] SORT_3 var_17_arg_1 = state_10; [L250] SORT_3 var_17_arg_2 = input_9; [L251] SORT_3 var_17 = var_17_arg_0 ? var_17_arg_1 : var_17_arg_2; [L252] SORT_1 var_23_arg_0 = var_22; [L253] SORT_3 var_23_arg_1 = state_18; [L254] SORT_3 var_23_arg_2 = var_17; [L255] SORT_3 var_23 = var_23_arg_0 ? var_23_arg_1 : var_23_arg_2; [L256] SORT_1 var_28_arg_0 = var_27; [L257] SORT_3 var_28_arg_1 = state_24; [L258] SORT_3 var_28_arg_2 = var_23; [L259] SORT_3 var_28 = var_28_arg_0 ? var_28_arg_1 : var_28_arg_2; [L260] SORT_1 var_33_arg_0 = var_32; [L261] SORT_3 var_33_arg_1 = state_29; [L262] SORT_3 var_33_arg_2 = var_28; [L263] SORT_3 var_33 = var_33_arg_0 ? var_33_arg_1 : var_33_arg_2; [L264] SORT_1 var_38_arg_0 = var_37; [L265] SORT_3 var_38_arg_1 = state_34; [L266] SORT_3 var_38_arg_2 = var_33; [L267] SORT_3 var_38 = var_38_arg_0 ? var_38_arg_1 : var_38_arg_2; [L268] SORT_1 var_44_arg_0 = var_43; [L269] SORT_3 var_44_arg_1 = state_39; [L270] SORT_3 var_44_arg_2 = var_38; [L271] SORT_3 var_44 = var_44_arg_0 ? var_44_arg_1 : var_44_arg_2; [L272] SORT_1 var_49_arg_0 = var_48; [L273] SORT_3 var_49_arg_1 = state_45; [L274] SORT_3 var_49_arg_2 = var_44; [L275] SORT_3 var_49 = var_49_arg_0 ? var_49_arg_1 : var_49_arg_2; [L276] SORT_1 var_54_arg_0 = var_53; [L277] SORT_3 var_54_arg_1 = state_50; [L278] SORT_3 var_54_arg_2 = var_49; [L279] SORT_3 var_54 = var_54_arg_0 ? var_54_arg_1 : var_54_arg_2; [L280] SORT_1 var_58_arg_0 = var_57; [L281] SORT_3 var_58_arg_1 = state_55; [L282] SORT_3 var_58_arg_2 = var_54; [L283] SORT_3 var_58 = var_58_arg_0 ? var_58_arg_1 : var_58_arg_2; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_58=0, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L284] EXPR var_58 & mask_SORT_3 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L284] var_58 = var_58 & mask_SORT_3 [L285] SORT_3 var_88_arg_0 = state_87; [L286] SORT_3 var_88_arg_1 = var_58; [L287] SORT_1 var_88 = var_88_arg_0 == var_88_arg_1; [L288] SORT_1 var_89_arg_0 = var_86; [L289] SORT_1 var_89_arg_1 = var_88; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0, var_89_arg_0=-1, var_89_arg_1=1] [L290] EXPR var_89_arg_0 | var_89_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L290] SORT_1 var_89 = var_89_arg_0 | var_89_arg_1; [L291] SORT_1 var_110_arg_0 = state_91; [L292] SORT_1 var_110_arg_1 = input_109; [L293] SORT_1 var_110_arg_2 = var_89; [L294] SORT_1 var_110 = var_110_arg_0 ? var_110_arg_1 : var_110_arg_2; [L295] SORT_1 var_113_arg_0 = var_110; [L296] SORT_1 var_113 = ~var_113_arg_0; [L297] SORT_1 var_114_arg_0 = var_112; [L298] SORT_1 var_114_arg_1 = var_113; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_114_arg_0=1, var_114_arg_1=-1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L299] EXPR var_114_arg_0 & var_114_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L299] SORT_1 var_114 = var_114_arg_0 & var_114_arg_1; [L300] EXPR var_114 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L300] var_114 = var_114 & mask_SORT_1 [L301] SORT_1 bad_115_arg_0 = var_114; [L302] CALL __VERIFIER_assert(!(bad_115_arg_0)) [L21] COND TRUE !(cond) [L21] reach_error() - StatisticsResult: Ultimate Automizer benchmark data CFG has 2 procedures, 392 locations, 1 error locations. Started 1 CEGAR loops. OverallTime: 342.0s, OverallIterations: 57, TraceHistogramMax: 6, PathProgramHistogramMax: 1, EmptinessCheckTime: 0.4s, AutomataDifference: 139.6s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, HoareTripleCheckerStatistics: 0 mSolverCounterUnknown, 102660 SdHoareTripleChecker+Valid, 80.3s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 102560 mSDsluCounter, 232478 SdHoareTripleChecker+Invalid, 69.5s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 0 IncrementalHoareTripleChecker+Unchecked, 199701 mSDsCounter, 602 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 103767 IncrementalHoareTripleChecker+Invalid, 104369 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 602 mSolverCounterUnsat, 32777 mSDtfsCounter, 103767 mSolverCounterSat, 1.1s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Unknown, PredicateUnifierStatistics: 0 DeclaredPredicates, 7598 GetRequests, 6311 SyntacticMatches, 5 SemanticMatches, 1282 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 112021 ImplicationChecksByTransitivity, 59.9s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=39810occurred in iteration=56, InterpolantAutomatonStates: 1013, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 5.9s AutomataMinimizationTime, 56 MinimizatonAttempts, 142958 StatesRemovedByMinimization, 23 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 3.1s SsaConstructionTime, 53.7s SatisfiabilityAnalysisTime, 113.9s InterpolantComputationTime, 19515 NumberOfCodeBlocks, 19515 NumberOfCodeBlocksAsserted, 70 NumberOfCheckSat, 21206 ConstructedInterpolants, 1 QuantifiedInterpolants, 152170 SizeOfPredicates, 89 NumberOfNonLiveVariables, 25514 ConjunctsInSsa, 872 ConjunctsInUnsatCore, 75 InterpolantComputations, 51 PerfectInterpolantSequences, 7170/8198 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available, ConComCheckerStatistics: No data available RESULT: Ultimate could not prove your program: unable to determine feasibility of some traces [2024-11-24 00:07:16,896 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_328789b6-5d68-4a2f-beb0-52c77b3443fd/bin/uautomizer-verify-LYvppIcaGC/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Forceful destruction successful, exit code 0 Received shutdown request... --- End real Ultimate output --- Execution finished normally Using bit-precise analysis Retrying with bit-precise analysis ### Bit-precise run ### Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_328789b6-5d68-4a2f-beb0-52c77b3443fd/bin/uautomizer-verify-LYvppIcaGC/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_328789b6-5d68-4a2f-beb0-52c77b3443fd/bin/uautomizer-verify-LYvppIcaGC/plugins/org.eclipse.equinox.launcher_1.6.800.v20240513-1750.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_328789b6-5d68-4a2f-beb0-52c77b3443fd/bin/uautomizer-verify-LYvppIcaGC/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_328789b6-5d68-4a2f-beb0-52c77b3443fd/bin/uautomizer-verify-LYvppIcaGC/config/AutomizerReach.xml -i ../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w8_d8_e0.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_328789b6-5d68-4a2f-beb0-52c77b3443fd/bin/uautomizer-verify-LYvppIcaGC/config/svcomp-Reach-64bit-Automizer_Bitvector.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_328789b6-5d68-4a2f-beb0-52c77b3443fd/bin/uautomizer-verify-LYvppIcaGC --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash 892a8506f942e825df8a32caf9cdaec45fd7cb5b4dbda5bc8acf67b64cc58b84 --- Real Ultimate output --- This is Ultimate 0.3.0-dev-6497de0 [2024-11-24 00:07:19,848 INFO L188 SettingsManager]: Resetting all preferences to default values... [2024-11-24 00:07:19,963 INFO L114 SettingsManager]: Loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_328789b6-5d68-4a2f-beb0-52c77b3443fd/bin/uautomizer-verify-LYvppIcaGC/config/svcomp-Reach-64bit-Automizer_Bitvector.epf [2024-11-24 00:07:19,971 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2024-11-24 00:07:19,975 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2024-11-24 00:07:20,021 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2024-11-24 00:07:20,023 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2024-11-24 00:07:20,023 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2024-11-24 00:07:20,024 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2024-11-24 00:07:20,024 INFO L153 SettingsManager]: * Use memory slicer=true [2024-11-24 00:07:20,024 INFO L151 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2024-11-24 00:07:20,024 INFO L153 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2024-11-24 00:07:20,024 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2024-11-24 00:07:20,024 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2024-11-24 00:07:20,025 INFO L153 SettingsManager]: * Use SBE=true [2024-11-24 00:07:20,025 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2024-11-24 00:07:20,025 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2024-11-24 00:07:20,025 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2024-11-24 00:07:20,027 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2024-11-24 00:07:20,027 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2024-11-24 00:07:20,027 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2024-11-24 00:07:20,027 INFO L153 SettingsManager]: * Adapt memory model on pointer casts if necessary=true [2024-11-24 00:07:20,028 INFO L153 SettingsManager]: * Use bitvectors instead of ints=true [2024-11-24 00:07:20,028 INFO L153 SettingsManager]: * Memory model=HoenickeLindenmann_4ByteResolution [2024-11-24 00:07:20,028 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2024-11-24 00:07:20,028 INFO L153 SettingsManager]: * Behaviour of calls to undefined functions=OVERAPPROXIMATE_BEHAVIOUR [2024-11-24 00:07:20,028 INFO L153 SettingsManager]: * Use constant arrays=true [2024-11-24 00:07:20,028 INFO L151 SettingsManager]: Preferences of IcfgBuilder differ from their defaults: [2024-11-24 00:07:20,029 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-11-24 00:07:20,029 INFO L153 SettingsManager]: * Only consider context switches at boundaries of atomic blocks=true [2024-11-24 00:07:20,029 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2024-11-24 00:07:20,029 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2024-11-24 00:07:20,030 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2024-11-24 00:07:20,030 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-11-24 00:07:20,030 INFO L153 SettingsManager]: * Only consider context switches at boundaries of atomic blocks=true [2024-11-24 00:07:20,030 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2024-11-24 00:07:20,030 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2024-11-24 00:07:20,031 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2024-11-24 00:07:20,031 INFO L153 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2024-11-24 00:07:20,031 INFO L153 SettingsManager]: * Compute procedure contracts=false [2024-11-24 00:07:20,031 INFO L153 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopHeads [2024-11-24 00:07:20,032 INFO L153 SettingsManager]: * Trace refinement strategy=FOX [2024-11-24 00:07:20,033 INFO L153 SettingsManager]: * Command for external solver=cvc4 --incremental --print-success --lang smt [2024-11-24 00:07:20,033 INFO L153 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false [2024-11-24 00:07:20,033 INFO L153 SettingsManager]: * Automaton type used in concurrency analysis=PETRI_NET [2024-11-24 00:07:20,033 INFO L153 SettingsManager]: * Order on configurations for Petri net unfoldings=DBO [2024-11-24 00:07:20,033 INFO L153 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2024-11-24 00:07:20,033 INFO L153 SettingsManager]: * Looper check in Petri net analysis=SEMANTIC Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_328789b6-5d68-4a2f-beb0-52c77b3443fd/bin/uautomizer-verify-LYvppIcaGC Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 892a8506f942e825df8a32caf9cdaec45fd7cb5b4dbda5bc8acf67b64cc58b84 [2024-11-24 00:07:20,424 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2024-11-24 00:07:20,436 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2024-11-24 00:07:20,440 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2024-11-24 00:07:20,441 INFO L270 PluginConnector]: Initializing CDTParser... [2024-11-24 00:07:20,442 INFO L274 PluginConnector]: CDTParser initialized [2024-11-24 00:07:20,443 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_328789b6-5d68-4a2f-beb0-52c77b3443fd/bin/uautomizer-verify-LYvppIcaGC/../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w8_d8_e0.c [2024-11-24 00:07:23,481 INFO L533 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_328789b6-5d68-4a2f-beb0-52c77b3443fd/bin/uautomizer-verify-LYvppIcaGC/data/62330aaa5/304a05321b2445f0b6c1bf0dd9835a93/FLAG7591fc301 [2024-11-24 00:07:23,878 INFO L384 CDTParser]: Found 1 translation units. [2024-11-24 00:07:23,880 INFO L180 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_328789b6-5d68-4a2f-beb0-52c77b3443fd/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w8_d8_e0.c [2024-11-24 00:07:23,903 INFO L427 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_328789b6-5d68-4a2f-beb0-52c77b3443fd/bin/uautomizer-verify-LYvppIcaGC/data/62330aaa5/304a05321b2445f0b6c1bf0dd9835a93/FLAG7591fc301 [2024-11-24 00:07:24,056 INFO L435 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_328789b6-5d68-4a2f-beb0-52c77b3443fd/bin/uautomizer-verify-LYvppIcaGC/data/62330aaa5/304a05321b2445f0b6c1bf0dd9835a93 [2024-11-24 00:07:24,058 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2024-11-24 00:07:24,061 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2024-11-24 00:07:24,064 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2024-11-24 00:07:24,065 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2024-11-24 00:07:24,070 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2024-11-24 00:07:24,071 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 24.11 12:07:24" (1/1) ... [2024-11-24 00:07:24,072 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@12605f90 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.11 12:07:24, skipping insertion in model container [2024-11-24 00:07:24,075 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 24.11 12:07:24" (1/1) ... [2024-11-24 00:07:24,130 INFO L175 MainTranslator]: Built tables and reachable declarations [2024-11-24 00:07:24,340 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_328789b6-5d68-4a2f-beb0-52c77b3443fd/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w8_d8_e0.c[1278,1291] [2024-11-24 00:07:24,557 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-11-24 00:07:24,572 INFO L200 MainTranslator]: Completed pre-run [2024-11-24 00:07:24,584 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_328789b6-5d68-4a2f-beb0-52c77b3443fd/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w8_d8_e0.c[1278,1291] [2024-11-24 00:07:24,688 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-11-24 00:07:24,710 INFO L204 MainTranslator]: Completed translation [2024-11-24 00:07:24,711 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.11 12:07:24 WrapperNode [2024-11-24 00:07:24,714 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2024-11-24 00:07:24,715 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2024-11-24 00:07:24,719 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2024-11-24 00:07:24,719 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2024-11-24 00:07:24,728 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.11 12:07:24" (1/1) ... [2024-11-24 00:07:24,748 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.11 12:07:24" (1/1) ... [2024-11-24 00:07:24,796 INFO L138 Inliner]: procedures = 17, calls = 11, calls flagged for inlining = 3, calls inlined = 3, statements flattened = 638 [2024-11-24 00:07:24,796 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2024-11-24 00:07:24,797 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2024-11-24 00:07:24,797 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2024-11-24 00:07:24,797 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2024-11-24 00:07:24,807 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.11 12:07:24" (1/1) ... [2024-11-24 00:07:24,807 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.11 12:07:24" (1/1) ... [2024-11-24 00:07:24,814 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.11 12:07:24" (1/1) ... [2024-11-24 00:07:24,834 INFO L175 MemorySlicer]: Split 2 memory accesses to 1 slices as follows [2]. 100 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2]. The 0 writes are split as follows [0]. [2024-11-24 00:07:24,835 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.11 12:07:24" (1/1) ... [2024-11-24 00:07:24,835 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.11 12:07:24" (1/1) ... [2024-11-24 00:07:24,852 INFO L184 PluginConnector]: Executing the observer ReplaceArrayAssignments from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.11 12:07:24" (1/1) ... [2024-11-24 00:07:24,854 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.11 12:07:24" (1/1) ... [2024-11-24 00:07:24,865 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.11 12:07:24" (1/1) ... [2024-11-24 00:07:24,868 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.11 12:07:24" (1/1) ... [2024-11-24 00:07:24,874 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.11 12:07:24" (1/1) ... [2024-11-24 00:07:24,887 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2024-11-24 00:07:24,888 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2024-11-24 00:07:24,888 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2024-11-24 00:07:24,889 INFO L274 PluginConnector]: RCFGBuilder initialized [2024-11-24 00:07:24,890 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.11 12:07:24" (1/1) ... [2024-11-24 00:07:24,899 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2024-11-24 00:07:24,914 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_328789b6-5d68-4a2f-beb0-52c77b3443fd/bin/uautomizer-verify-LYvppIcaGC/z3 [2024-11-24 00:07:24,929 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_328789b6-5d68-4a2f-beb0-52c77b3443fd/bin/uautomizer-verify-LYvppIcaGC/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (exit command is (exit), workingDir is null) [2024-11-24 00:07:24,936 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_328789b6-5d68-4a2f-beb0-52c77b3443fd/bin/uautomizer-verify-LYvppIcaGC/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Waiting until timeout for monitored process [2024-11-24 00:07:24,961 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2024-11-24 00:07:24,961 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~intINTTYPE1#0 [2024-11-24 00:07:24,962 INFO L130 BoogieDeclarations]: Found specification of procedure assume_abort_if_not [2024-11-24 00:07:24,962 INFO L138 BoogieDeclarations]: Found implementation of procedure assume_abort_if_not [2024-11-24 00:07:24,962 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2024-11-24 00:07:24,962 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2024-11-24 00:07:25,287 INFO L234 CfgBuilder]: Building ICFG [2024-11-24 00:07:25,290 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2024-11-24 00:07:26,220 INFO L? ?]: Removed 198 outVars from TransFormulas that were not future-live. [2024-11-24 00:07:26,220 INFO L283 CfgBuilder]: Performing block encoding [2024-11-24 00:07:26,231 INFO L307 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2024-11-24 00:07:26,232 INFO L312 CfgBuilder]: Removed 1 assume(true) statements. [2024-11-24 00:07:26,233 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 24.11 12:07:26 BoogieIcfgContainer [2024-11-24 00:07:26,233 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2024-11-24 00:07:26,236 INFO L112 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2024-11-24 00:07:26,236 INFO L270 PluginConnector]: Initializing TraceAbstraction... [2024-11-24 00:07:26,245 INFO L274 PluginConnector]: TraceAbstraction initialized [2024-11-24 00:07:26,246 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 24.11 12:07:24" (1/3) ... [2024-11-24 00:07:26,246 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@2714932b and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 24.11 12:07:26, skipping insertion in model container [2024-11-24 00:07:26,247 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.11 12:07:24" (2/3) ... [2024-11-24 00:07:26,247 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@2714932b and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 24.11 12:07:26, skipping insertion in model container [2024-11-24 00:07:26,247 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 24.11 12:07:26" (3/3) ... [2024-11-24 00:07:26,249 INFO L128 eAbstractionObserver]: Analyzing ICFG btor2c-lazyMod.circular_pointer_top_w8_d8_e0.c [2024-11-24 00:07:26,269 INFO L216 ceAbstractionStarter]: Automizer settings: Hoare:LoopHeads NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2024-11-24 00:07:26,273 INFO L151 ceAbstractionStarter]: Applying trace abstraction to ICFG btor2c-lazyMod.circular_pointer_top_w8_d8_e0.c that has 2 procedures, 20 locations, 1 initial locations, 1 loop locations, and 1 error locations. [2024-11-24 00:07:26,349 INFO L332 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2024-11-24 00:07:26,369 INFO L333 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mAutomataTypeConcurrency=PETRI_NET, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopHeads, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@1318a8c3, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2024-11-24 00:07:26,371 INFO L334 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2024-11-24 00:07:26,376 INFO L276 IsEmpty]: Start isEmpty. Operand has 20 states, 14 states have (on average 1.2857142857142858) internal successors, (18), 15 states have internal predecessors, (18), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-24 00:07:26,384 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2024-11-24 00:07:26,384 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 00:07:26,385 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 00:07:26,386 INFO L396 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 00:07:26,392 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 00:07:26,394 INFO L85 PathProgramCache]: Analyzing trace with hash 1676994902, now seen corresponding path program 1 times [2024-11-24 00:07:26,410 INFO L118 FreeRefinementEngine]: Executing refinement strategy FOX [2024-11-24 00:07:26,412 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [599832268] [2024-11-24 00:07:26,413 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 00:07:26,414 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-24 00:07:26,414 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_328789b6-5d68-4a2f-beb0-52c77b3443fd/bin/uautomizer-verify-LYvppIcaGC/z3 [2024-11-24 00:07:26,418 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_328789b6-5d68-4a2f-beb0-52c77b3443fd/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-24 00:07:26,423 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_328789b6-5d68-4a2f-beb0-52c77b3443fd/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2024-11-24 00:07:26,900 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 00:07:26,906 INFO L256 TraceCheckSpWp]: Trace formula consists of 262 conjuncts, 19 conjuncts are in the unsatisfiable core [2024-11-24 00:07:26,920 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-24 00:07:27,351 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-11-24 00:07:27,351 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-24 00:07:27,600 INFO L136 FreeRefinementEngine]: Strategy FOX found an infeasible trace [2024-11-24 00:07:27,600 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [599832268] [2024-11-24 00:07:27,603 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [599832268] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-24 00:07:27,603 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [174367429] [2024-11-24 00:07:27,603 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 00:07:27,603 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2024-11-24 00:07:27,603 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_328789b6-5d68-4a2f-beb0-52c77b3443fd/bin/uautomizer-verify-LYvppIcaGC/cvc4 [2024-11-24 00:07:27,607 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_328789b6-5d68-4a2f-beb0-52c77b3443fd/bin/uautomizer-verify-LYvppIcaGC/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2024-11-24 00:07:27,609 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_328789b6-5d68-4a2f-beb0-52c77b3443fd/bin/uautomizer-verify-LYvppIcaGC/cvc4 --incremental --print-success --lang smt (3)] Waiting until timeout for monitored process [2024-11-24 00:07:28,177 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 00:07:28,187 INFO L256 TraceCheckSpWp]: Trace formula consists of 262 conjuncts, 15 conjuncts are in the unsatisfiable core [2024-11-24 00:07:28,193 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-24 00:07:28,347 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-24 00:07:28,347 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-11-24 00:07:28,347 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [174367429] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-24 00:07:28,347 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-11-24 00:07:28,348 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [7] total 7 [2024-11-24 00:07:28,351 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1899971297] [2024-11-24 00:07:28,352 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-24 00:07:28,356 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-24 00:07:28,357 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy FOX [2024-11-24 00:07:28,380 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-24 00:07:28,381 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=53, Unknown=0, NotChecked=0, Total=72 [2024-11-24 00:07:28,383 INFO L87 Difference]: Start difference. First operand has 20 states, 14 states have (on average 1.2857142857142858) internal successors, (18), 15 states have internal predecessors, (18), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Second operand has 4 states, 4 states have (on average 2.75) internal successors, (11), 4 states have internal predecessors, (11), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-24 00:07:28,516 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 00:07:28,516 INFO L93 Difference]: Finished difference Result 43 states and 63 transitions. [2024-11-24 00:07:28,518 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-24 00:07:28,519 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 2.75) internal successors, (11), 4 states have internal predecessors, (11), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 23 [2024-11-24 00:07:28,520 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 00:07:28,526 INFO L225 Difference]: With dead ends: 43 [2024-11-24 00:07:28,526 INFO L226 Difference]: Without dead ends: 25 [2024-11-24 00:07:28,529 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 48 GetRequests, 41 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=19, Invalid=53, Unknown=0, NotChecked=0, Total=72 [2024-11-24 00:07:28,534 INFO L435 NwaCegarLoop]: 14 mSDtfsCounter, 0 mSDsluCounter, 24 mSDsCounter, 0 mSdLazyCounter, 18 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 38 SdHoareTripleChecker+Invalid, 18 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 18 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-24 00:07:28,537 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 38 Invalid, 18 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 18 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-24 00:07:28,552 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25 states. [2024-11-24 00:07:28,571 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25 to 25. [2024-11-24 00:07:28,572 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 25 states, 17 states have (on average 1.0588235294117647) internal successors, (18), 17 states have internal predecessors, (18), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-11-24 00:07:28,577 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25 states to 25 states and 30 transitions. [2024-11-24 00:07:28,580 INFO L78 Accepts]: Start accepts. Automaton has 25 states and 30 transitions. Word has length 23 [2024-11-24 00:07:28,582 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 00:07:28,582 INFO L471 AbstractCegarLoop]: Abstraction has 25 states and 30 transitions. [2024-11-24 00:07:28,583 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 2.75) internal successors, (11), 4 states have internal predecessors, (11), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-24 00:07:28,583 INFO L276 IsEmpty]: Start isEmpty. Operand 25 states and 30 transitions. [2024-11-24 00:07:28,586 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2024-11-24 00:07:28,587 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 00:07:28,587 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1] [2024-11-24 00:07:28,593 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_328789b6-5d68-4a2f-beb0-52c77b3443fd/bin/uautomizer-verify-LYvppIcaGC/cvc4 --incremental --print-success --lang smt (3)] Ended with exit code 0 [2024-11-24 00:07:28,797 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_328789b6-5d68-4a2f-beb0-52c77b3443fd/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Ended with exit code 0 [2024-11-24 00:07:28,991 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_328789b6-5d68-4a2f-beb0-52c77b3443fd/bin/uautomizer-verify-LYvppIcaGC/cvc4 --incremental --print-success --lang smt,2 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_328789b6-5d68-4a2f-beb0-52c77b3443fd/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-24 00:07:28,992 INFO L396 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 00:07:28,992 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 00:07:28,992 INFO L85 PathProgramCache]: Analyzing trace with hash -1294995197, now seen corresponding path program 1 times [2024-11-24 00:07:28,993 INFO L118 FreeRefinementEngine]: Executing refinement strategy FOX [2024-11-24 00:07:28,994 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [487901330] [2024-11-24 00:07:28,994 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 00:07:28,994 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-24 00:07:28,994 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_328789b6-5d68-4a2f-beb0-52c77b3443fd/bin/uautomizer-verify-LYvppIcaGC/z3 [2024-11-24 00:07:28,996 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_328789b6-5d68-4a2f-beb0-52c77b3443fd/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-24 00:07:28,998 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_328789b6-5d68-4a2f-beb0-52c77b3443fd/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2024-11-24 00:07:29,456 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 00:07:29,462 INFO L256 TraceCheckSpWp]: Trace formula consists of 486 conjuncts, 43 conjuncts are in the unsatisfiable core [2024-11-24 00:07:29,475 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-24 00:07:30,191 INFO L134 CoverageAnalysis]: Checked inductivity of 68 backedges. 0 proven. 23 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2024-11-24 00:07:30,192 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-24 00:07:30,432 INFO L136 FreeRefinementEngine]: Strategy FOX found an infeasible trace [2024-11-24 00:07:30,432 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [487901330] [2024-11-24 00:07:30,433 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [487901330] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-24 00:07:30,433 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [2045902741] [2024-11-24 00:07:30,433 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 00:07:30,433 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2024-11-24 00:07:30,433 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_328789b6-5d68-4a2f-beb0-52c77b3443fd/bin/uautomizer-verify-LYvppIcaGC/cvc4 [2024-11-24 00:07:30,436 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_328789b6-5d68-4a2f-beb0-52c77b3443fd/bin/uautomizer-verify-LYvppIcaGC/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2024-11-24 00:07:30,439 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_328789b6-5d68-4a2f-beb0-52c77b3443fd/bin/uautomizer-verify-LYvppIcaGC/cvc4 --incremental --print-success --lang smt (5)] Waiting until timeout for monitored process [2024-11-24 00:07:31,299 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 00:07:31,344 INFO L256 TraceCheckSpWp]: Trace formula consists of 486 conjuncts, 40 conjuncts are in the unsatisfiable core [2024-11-24 00:07:31,359 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-24 00:07:31,808 INFO L134 CoverageAnalysis]: Checked inductivity of 68 backedges. 0 proven. 23 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2024-11-24 00:07:31,809 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-24 00:07:32,009 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [2045902741] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-24 00:07:32,010 INFO L185 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2024-11-24 00:07:32,010 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 9] total 10 [2024-11-24 00:07:32,010 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [174237507] [2024-11-24 00:07:32,010 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2024-11-24 00:07:32,011 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 10 states [2024-11-24 00:07:32,012 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy FOX [2024-11-24 00:07:32,013 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2024-11-24 00:07:32,014 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=108, Unknown=0, NotChecked=0, Total=132 [2024-11-24 00:07:32,016 INFO L87 Difference]: Start difference. First operand 25 states and 30 transitions. Second operand has 10 states, 9 states have (on average 2.4444444444444446) internal successors, (22), 10 states have internal predecessors, (22), 3 states have call successors, (6), 1 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 3 states have call successors, (6) [2024-11-24 00:07:32,456 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 00:07:32,456 INFO L93 Difference]: Finished difference Result 36 states and 44 transitions. [2024-11-24 00:07:32,457 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2024-11-24 00:07:32,457 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 9 states have (on average 2.4444444444444446) internal successors, (22), 10 states have internal predecessors, (22), 3 states have call successors, (6), 1 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 3 states have call successors, (6) Word has length 44 [2024-11-24 00:07:32,457 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-24 00:07:32,458 INFO L225 Difference]: With dead ends: 36 [2024-11-24 00:07:32,458 INFO L226 Difference]: Without dead ends: 34 [2024-11-24 00:07:32,459 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 98 GetRequests, 83 SyntacticMatches, 1 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 13 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=47, Invalid=193, Unknown=0, NotChecked=0, Total=240 [2024-11-24 00:07:32,460 INFO L435 NwaCegarLoop]: 12 mSDtfsCounter, 7 mSDsluCounter, 64 mSDsCounter, 0 mSdLazyCounter, 132 mSolverCounterSat, 7 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 7 SdHoareTripleChecker+Valid, 76 SdHoareTripleChecker+Invalid, 139 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 7 IncrementalHoareTripleChecker+Valid, 132 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2024-11-24 00:07:32,460 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [7 Valid, 76 Invalid, 139 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [7 Valid, 132 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2024-11-24 00:07:32,461 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34 states. [2024-11-24 00:07:32,467 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34 to 34. [2024-11-24 00:07:32,468 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 34 states, 23 states have (on average 1.0434782608695652) internal successors, (24), 23 states have internal predecessors, (24), 9 states have call successors, (9), 1 states have call predecessors, (9), 1 states have return successors, (9), 9 states have call predecessors, (9), 9 states have call successors, (9) [2024-11-24 00:07:32,469 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34 states to 34 states and 42 transitions. [2024-11-24 00:07:32,469 INFO L78 Accepts]: Start accepts. Automaton has 34 states and 42 transitions. Word has length 44 [2024-11-24 00:07:32,470 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-24 00:07:32,470 INFO L471 AbstractCegarLoop]: Abstraction has 34 states and 42 transitions. [2024-11-24 00:07:32,470 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 10 states, 9 states have (on average 2.4444444444444446) internal successors, (22), 10 states have internal predecessors, (22), 3 states have call successors, (6), 1 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 3 states have call successors, (6) [2024-11-24 00:07:32,470 INFO L276 IsEmpty]: Start isEmpty. Operand 34 states and 42 transitions. [2024-11-24 00:07:32,472 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2024-11-24 00:07:32,472 INFO L210 NwaCegarLoop]: Found error trace [2024-11-24 00:07:32,472 INFO L218 NwaCegarLoop]: trace histogram [9, 9, 9, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 1, 1, 1, 1] [2024-11-24 00:07:32,484 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_328789b6-5d68-4a2f-beb0-52c77b3443fd/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Ended with exit code 0 [2024-11-24 00:07:32,678 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_328789b6-5d68-4a2f-beb0-52c77b3443fd/bin/uautomizer-verify-LYvppIcaGC/cvc4 --incremental --print-success --lang smt (5)] Ended with exit code 0 [2024-11-24 00:07:32,874 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 4 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_328789b6-5d68-4a2f-beb0-52c77b3443fd/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true,5 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_328789b6-5d68-4a2f-beb0-52c77b3443fd/bin/uautomizer-verify-LYvppIcaGC/cvc4 --incremental --print-success --lang smt [2024-11-24 00:07:32,875 INFO L396 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-24 00:07:32,875 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 00:07:32,876 INFO L85 PathProgramCache]: Analyzing trace with hash 1531864950, now seen corresponding path program 2 times [2024-11-24 00:07:32,877 INFO L118 FreeRefinementEngine]: Executing refinement strategy FOX [2024-11-24 00:07:32,877 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1411770356] [2024-11-24 00:07:32,877 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2024-11-24 00:07:32,877 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-24 00:07:32,878 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_328789b6-5d68-4a2f-beb0-52c77b3443fd/bin/uautomizer-verify-LYvppIcaGC/z3 [2024-11-24 00:07:32,879 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_328789b6-5d68-4a2f-beb0-52c77b3443fd/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-24 00:07:32,881 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_328789b6-5d68-4a2f-beb0-52c77b3443fd/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2024-11-24 00:07:33,432 INFO L229 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2024-11-24 00:07:33,432 INFO L230 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-24 00:07:33,439 INFO L256 TraceCheckSpWp]: Trace formula consists of 710 conjuncts, 88 conjuncts are in the unsatisfiable core [2024-11-24 00:07:33,466 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-24 00:07:38,273 INFO L134 CoverageAnalysis]: Checked inductivity of 169 backedges. 12 proven. 55 refuted. 0 times theorem prover too weak. 102 trivial. 0 not checked. [2024-11-24 00:07:38,274 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-24 00:07:42,864 WARN L851 $PredicateComparison]: unable to prove that (let ((.cse0 ((_ zero_extend 24) |c_ULTIMATE.start_main_~mask_SORT_1~0#1|))) (let ((.cse7 (forall ((|v_ULTIMATE.start_main_~var_114_arg_0~0#1_19| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_110_arg_1~0#1_17| (_ BitVec 8))) (= ((_ extract 7 0) (bvand .cse0 ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_114_arg_0~0#1_19|) ((_ zero_extend 24) ((_ extract 7 0) (bvnot ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_110_arg_1~0#1_17|))))))))))) (_ bv0 8)))) (.cse8 (= |c_ULTIMATE.start_main_~state_91~0#1| (_ bv0 8)))) (let ((.cse10 (or .cse7 .cse8)) (.cse12 ((_ zero_extend 24) |c_ULTIMATE.start_main_~state_68~0#1|)) (.cse11 (not .cse8))) (let ((.cse4 (and .cse10 (or (forall ((|v_ULTIMATE.start_main_~var_85_arg_1~0#1_17| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_114_arg_0~0#1_19| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_74_arg_1~0#1_17| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_71_arg_1~0#1_17| (_ BitVec 8))) (= ((_ extract 7 0) (bvand .cse0 ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) (bvnot ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) ((_ extract 7 0) (bvor (_ bv0 32) ((_ zero_extend 24) ((_ extract 7 0) (bvnot ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_74_arg_1~0#1_17|) ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_71_arg_1~0#1_17|) .cse12)))))) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_85_arg_1~0#1_17|))))))))))))))) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_114_arg_0~0#1_19|)))))) (_ bv0 8))) .cse11))) (.cse5 ((_ zero_extend 24) |c_ULTIMATE.start_main_~mask_SORT_3~0#1|)) (.cse6 ((_ zero_extend 24) |c_ULTIMATE.start_main_~state_87~0#1|))) (let ((.cse1 (let ((.cse9 (= ((_ zero_extend 24) ((_ extract 7 0) (bvand .cse5 ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) |c_ULTIMATE.start_main_~state_55~0#1|)))))) .cse6))) (and (or .cse4 .cse9) (or (and .cse10 (or .cse11 (forall ((|v_ULTIMATE.start_main_~var_85_arg_1~0#1_17| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_114_arg_0~0#1_19| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_74_arg_1~0#1_17| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_71_arg_1~0#1_17| (_ BitVec 8))) (= (_ bv0 8) ((_ extract 7 0) (bvand .cse0 ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) (bvnot ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) ((_ extract 7 0) (bvor (_ bv1 32) ((_ zero_extend 24) ((_ extract 7 0) (bvnot ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_74_arg_1~0#1_17|) ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_71_arg_1~0#1_17|) .cse12)))))) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_85_arg_1~0#1_17|))))))))))))))) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_114_arg_0~0#1_19|)))))))))) (not .cse9))))) (.cse2 (= (_ bv0 32) ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |c_ULTIMATE.start_main_~mask_SORT_13~0#1|) ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) |c_ULTIMATE.start_main_~state_12~0#1|))))))))) (and (or (= (_ bv0 8) ((_ extract 7 0) (bvand .cse0 (_ bv255 32)))) .cse1 (not .cse2)) (or (let ((.cse3 (= ((_ extract 7 0) (bvand .cse0 (_ bv254 32))) (_ bv0 8)))) (and (or .cse3 .cse1) (or (not .cse3) (and (or .cse4 (forall ((|v_ULTIMATE.start_main_~var_58_arg_2~0#1_15| (_ BitVec 8))) (= ((_ zero_extend 24) ((_ extract 7 0) (bvand .cse5 ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_58_arg_2~0#1_15|)))))) .cse6))) (or (forall ((|v_ULTIMATE.start_main_~var_58_arg_2~0#1_15| (_ BitVec 8))) (not (= ((_ zero_extend 24) ((_ extract 7 0) (bvand .cse5 ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_58_arg_2~0#1_15|)))))) .cse6))) .cse7 .cse8))))) .cse2))))))) is different from false [2024-11-24 00:07:43,148 INFO L136 FreeRefinementEngine]: Strategy FOX found an infeasible trace [2024-11-24 00:07:43,148 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1411770356] [2024-11-24 00:07:43,148 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1411770356] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-24 00:07:43,148 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [1558826137] [2024-11-24 00:07:43,149 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2024-11-24 00:07:43,149 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2024-11-24 00:07:43,149 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_328789b6-5d68-4a2f-beb0-52c77b3443fd/bin/uautomizer-verify-LYvppIcaGC/cvc4 [2024-11-24 00:07:43,151 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_328789b6-5d68-4a2f-beb0-52c77b3443fd/bin/uautomizer-verify-LYvppIcaGC/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2024-11-24 00:07:43,154 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_328789b6-5d68-4a2f-beb0-52c77b3443fd/bin/uautomizer-verify-LYvppIcaGC/cvc4 --incremental --print-success --lang smt (7)] Waiting until timeout for monitored process [2024-11-24 00:07:44,403 INFO L229 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2024-11-24 00:07:44,403 INFO L230 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-24 00:07:44,441 INFO L256 TraceCheckSpWp]: Trace formula consists of 710 conjuncts, 87 conjuncts are in the unsatisfiable core [2024-11-24 00:07:44,460 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-24 00:08:01,061 INFO L134 CoverageAnalysis]: Checked inductivity of 169 backedges. 12 proven. 55 refuted. 0 times theorem prover too weak. 102 trivial. 0 not checked. [2024-11-24 00:08:01,061 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-24 00:08:06,197 WARN L249 Executor]: External (MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_328789b6-5d68-4a2f-beb0-52c77b3443fd/bin/uautomizer-verify-LYvppIcaGC/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1) with exit command (exit)) stderr output: (error "out of memory") [2024-11-24 00:08:06,197 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_328789b6-5d68-4a2f-beb0-52c77b3443fd/bin/uautomizer-verify-LYvppIcaGC/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Ended with exit code 101 [2024-11-24 00:08:06,198 WARN L320 FreeRefinementEngine]: Global settings require throwing the following exception [2024-11-24 00:08:06,207 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_328789b6-5d68-4a2f-beb0-52c77b3443fd/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Ended with exit code 0 [2024-11-24 00:08:06,406 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_328789b6-5d68-4a2f-beb0-52c77b3443fd/bin/uautomizer-verify-LYvppIcaGC/cvc4 --incremental --print-success --lang smt (7)] Ended with exit code 0 [2024-11-24 00:08:06,598 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 6 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_328789b6-5d68-4a2f-beb0-52c77b3443fd/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true,7 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_328789b6-5d68-4a2f-beb0-52c77b3443fd/bin/uautomizer-verify-LYvppIcaGC/cvc4 --incremental --print-success --lang smt [2024-11-24 00:08:06,599 FATAL L? ?]: An unrecoverable error occured during an interaction with an SMT solver: de.uni_freiburg.informatik.ultimate.logic.SMTLIBException: External (MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_328789b6-5d68-4a2f-beb0-52c77b3443fd/bin/uautomizer-verify-LYvppIcaGC/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1) with exit command (exit)) Received EOF on stdin. stderr output: (error "out of memory") at de.uni_freiburg.informatik.ultimate.smtsolver.external.Executor.parse(Executor.java:262) at de.uni_freiburg.informatik.ultimate.smtsolver.external.Executor.parseCheckSatResult(Executor.java:281) at de.uni_freiburg.informatik.ultimate.smtsolver.external.Scriptor.checkSat(Scriptor.java:155) at de.uni_freiburg.informatik.ultimate.logic.WrapperScript.checkSat(WrapperScript.java:163) at de.uni_freiburg.informatik.ultimate.logic.WrapperScript.checkSat(WrapperScript.java:163) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.ManagedScript.checkSat(ManagedScript.java:148) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.MonolithicImplicationChecker.checkImplication(MonolithicImplicationChecker.java:85) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier$PredicateComparison.compare(PredicateUnifier.java:842) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier$PredicateComparison.(PredicateUnifier.java:786) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate(PredicateUnifier.java:374) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate(PredicateUnifier.java:323) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.singletracecheck.TraceCheckSpWp$UnifyPostprocessor.postprocess(TraceCheckSpWp.java:555) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.predicates.IterativePredicateTransformer.applyPostprocessors(IterativePredicateTransformer.java:416) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.predicates.IterativePredicateTransformer.computeBackwardSequence(IterativePredicateTransformer.java:395) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.predicates.IterativePredicateTransformer.computeWeakestPreconditionSequence(IterativePredicateTransformer.java:267) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.singletracecheck.TraceCheckSpWp.computeInterpolantsUsingUnsatCore(TraceCheckSpWp.java:325) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.singletracecheck.TraceCheckSpWp.computeInterpolants(TraceCheckSpWp.java:181) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.singletracecheck.TraceCheckSpWp.(TraceCheckSpWp.java:160) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.IpTcStrategyModuleSpWp.construct(IpTcStrategyModuleSpWp.java:106) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.IpTcStrategyModuleSpWp.construct(IpTcStrategyModuleSpWp.java:1) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.IpTcStrategyModuleBase.getOrConstruct(IpTcStrategyModuleBase.java:101) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.IpTcStrategyModuleBase.getInterpolantComputationStatus(IpTcStrategyModuleBase.java:77) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.tracehandling.AutomatonFreeRefinementEngine.tryExecuteInterpolantGenerator(AutomatonFreeRefinementEngine.java:267) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.tracehandling.AutomatonFreeRefinementEngine.generateProof(AutomatonFreeRefinementEngine.java:148) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.tracehandling.AutomatonFreeRefinementEngine.executeStrategy(AutomatonFreeRefinementEngine.java:137) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.tracehandling.AutomatonFreeRefinementEngine.(AutomatonFreeRefinementEngine.java:85) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.TraceAbstractionRefinementEngine.(TraceAbstractionRefinementEngine.java:82) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.BasicCegarLoop.isCounterexampleFeasible(BasicCegarLoop.java:317) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.iterate(AbstractCegarLoop.java:407) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.startCegar(AbstractCegarLoop.java:342) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.runCegar(AbstractCegarLoop.java:324) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.executeCegarLoop(TraceAbstractionStarter.java:428) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.analyseProgram(TraceAbstractionStarter.java:314) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.analyseSequentialProgram(TraceAbstractionStarter.java:275) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.runCegarLoops(TraceAbstractionStarter.java:167) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.(TraceAbstractionStarter.java:140) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver.finish(TraceAbstractionObserver.java:132) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runObserver(PluginConnector.java:167) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runTool(PluginConnector.java:150) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.run(PluginConnector.java:127) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.executePluginConnector(ToolchainWalker.java:233) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.processPlugin(ToolchainWalker.java:227) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walkUnprotected(ToolchainWalker.java:144) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walk(ToolchainWalker.java:106) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainManager$Toolchain.processToolchain(ToolchainManager.java:319) at de.uni_freiburg.informatik.ultimate.core.coreplugin.toolchain.DefaultToolchainJob.run(DefaultToolchainJob.java:145) at org.eclipse.core.internal.jobs.Worker.run(Worker.java:63) Caused by: de.uni_freiburg.informatik.ultimate.logic.SMTLIBException: EOF at de.uni_freiburg.informatik.ultimate.smtsolver.external.Parser$Action$.CUP$do_action(Parser.java:1518) at de.uni_freiburg.informatik.ultimate.smtsolver.external.Parser.do_action(Parser.java:701) at com.github.jhoenicke.javacup.runtime.LRParser.parse(LRParser.java:383) at de.uni_freiburg.informatik.ultimate.smtsolver.external.Executor.parse(Executor.java:258) ... 46 more [2024-11-24 00:08:06,606 INFO L158 Benchmark]: Toolchain (without parser) took 42544.83ms. Allocated memory was 117.4MB in the beginning and 671.1MB in the end (delta: 553.6MB). Free memory was 92.5MB in the beginning and 243.7MB in the end (delta: -151.3MB). Peak memory consumption was 405.0MB. Max. memory is 16.1GB. [2024-11-24 00:08:06,606 INFO L158 Benchmark]: CDTParser took 0.29ms. Allocated memory is still 117.4MB. Free memory is still 85.0MB. There was no memory consumed. Max. memory is 16.1GB. [2024-11-24 00:08:06,607 INFO L158 Benchmark]: CACSL2BoogieTranslator took 651.18ms. Allocated memory is still 117.4MB. Free memory was 92.3MB in the beginning and 66.3MB in the end (delta: 26.0MB). Peak memory consumption was 25.2MB. Max. memory is 16.1GB. [2024-11-24 00:08:06,607 INFO L158 Benchmark]: Boogie Procedure Inliner took 80.92ms. Allocated memory is still 117.4MB. Free memory was 66.3MB in the beginning and 61.4MB in the end (delta: 4.9MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. [2024-11-24 00:08:06,608 INFO L158 Benchmark]: Boogie Preprocessor took 90.61ms. Allocated memory is still 117.4MB. Free memory was 61.4MB in the beginning and 55.4MB in the end (delta: 5.9MB). There was no memory consumed. Max. memory is 16.1GB. [2024-11-24 00:08:06,608 INFO L158 Benchmark]: RCFGBuilder took 1345.65ms. Allocated memory was 117.4MB in the beginning and 260.0MB in the end (delta: 142.6MB). Free memory was 55.4MB in the beginning and 222.5MB in the end (delta: -167.1MB). Peak memory consumption was 31.5MB. Max. memory is 16.1GB. [2024-11-24 00:08:06,609 INFO L158 Benchmark]: TraceAbstraction took 40369.28ms. Allocated memory was 260.0MB in the beginning and 671.1MB in the end (delta: 411.0MB). Free memory was 221.9MB in the beginning and 243.7MB in the end (delta: -21.8MB). Peak memory consumption was 395.4MB. Max. memory is 16.1GB. [2024-11-24 00:08:06,611 INFO L338 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.29ms. Allocated memory is still 117.4MB. Free memory is still 85.0MB. There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 651.18ms. Allocated memory is still 117.4MB. Free memory was 92.3MB in the beginning and 66.3MB in the end (delta: 26.0MB). Peak memory consumption was 25.2MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 80.92ms. Allocated memory is still 117.4MB. Free memory was 66.3MB in the beginning and 61.4MB in the end (delta: 4.9MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. * Boogie Preprocessor took 90.61ms. Allocated memory is still 117.4MB. Free memory was 61.4MB in the beginning and 55.4MB in the end (delta: 5.9MB). There was no memory consumed. Max. memory is 16.1GB. * RCFGBuilder took 1345.65ms. Allocated memory was 117.4MB in the beginning and 260.0MB in the end (delta: 142.6MB). Free memory was 55.4MB in the beginning and 222.5MB in the end (delta: -167.1MB). Peak memory consumption was 31.5MB. Max. memory is 16.1GB. * TraceAbstraction took 40369.28ms. Allocated memory was 260.0MB in the beginning and 671.1MB in the end (delta: 411.0MB). Free memory was 221.9MB in the beginning and 243.7MB in the end (delta: -21.8MB). Peak memory consumption was 395.4MB. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - ExceptionOrErrorResult: SMTLIBException: External (MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_328789b6-5d68-4a2f-beb0-52c77b3443fd/bin/uautomizer-verify-LYvppIcaGC/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1) with exit command (exit)) Received EOF on stdin. stderr output: (error "out of memory") de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: SMTLIBException: External (MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_328789b6-5d68-4a2f-beb0-52c77b3443fd/bin/uautomizer-verify-LYvppIcaGC/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1) with exit command (exit)) Received EOF on stdin. stderr output: (error "out of memory") : de.uni_freiburg.informatik.ultimate.smtsolver.external.Executor.parse(Executor.java:262) RESULT: Ultimate could not prove your program: Toolchain returned no result. Received shutdown request... --- End real Ultimate output --- Execution finished normally Writing output log to file Ultimate.log Result: ERROR: ExceptionOrErrorResult: SMTLIBException: External (MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_328789b6-5d68-4a2f-beb0-52c77b3443fd/bin/uautomizer-verify-LYvppIcaGC/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1) with exit command (exit)) Received EOF on stdin. stderr output: (error "out of memory")