./Ultimate.py --spec ../../sv-benchmarks/c/properties/termination.prp --file ../../sv-benchmarks/c/termination-memory-alloca/GulwaniJainKoskinen-2009PLDI-Fig1-alloca-2.i --full-output --architecture 64bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version d790fecc Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/plugins/org.eclipse.equinox.launcher_1.6.800.v20240513-1750.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/config/AutomizerTermination.xml -i ../../sv-benchmarks/c/termination-memory-alloca/GulwaniJainKoskinen-2009PLDI-Fig1-alloca-2.i -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/config/svcomp-Termination-64bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash 8fbd99b1bfb27b318d252229087f8d9132096866b72085e8874326b5a6d541b4 --- Real Ultimate output --- This is Ultimate 0.3.0-dev-d790fec [2024-11-28 04:28:56,498 INFO L188 SettingsManager]: Resetting all preferences to default values... [2024-11-28 04:28:56,564 INFO L114 SettingsManager]: Loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/config/svcomp-Termination-64bit-Automizer_Default.epf [2024-11-28 04:28:56,570 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2024-11-28 04:28:56,570 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2024-11-28 04:28:56,595 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2024-11-28 04:28:56,596 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2024-11-28 04:28:56,596 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2024-11-28 04:28:56,597 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2024-11-28 04:28:56,597 INFO L153 SettingsManager]: * Use memory slicer=true [2024-11-28 04:28:56,597 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2024-11-28 04:28:56,598 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2024-11-28 04:28:56,598 INFO L153 SettingsManager]: * Use SBE=true [2024-11-28 04:28:56,598 INFO L151 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2024-11-28 04:28:56,598 INFO L153 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2024-11-28 04:28:56,598 INFO L153 SettingsManager]: * Use old map elimination=false [2024-11-28 04:28:56,598 INFO L153 SettingsManager]: * Use external solver (rank synthesis)=false [2024-11-28 04:28:56,598 INFO L153 SettingsManager]: * Use only trivial implications for array writes=true [2024-11-28 04:28:56,599 INFO L153 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2024-11-28 04:28:56,599 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2024-11-28 04:28:56,599 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2024-11-28 04:28:56,599 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2024-11-28 04:28:56,599 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2024-11-28 04:28:56,599 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2024-11-28 04:28:56,599 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2024-11-28 04:28:56,600 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2024-11-28 04:28:56,600 INFO L153 SettingsManager]: * Check unreachability of reach_error function=false [2024-11-28 04:28:56,600 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2024-11-28 04:28:56,600 INFO L153 SettingsManager]: * Assume nondeterminstic values are in range=false [2024-11-28 04:28:56,600 INFO L153 SettingsManager]: * Behaviour of calls to undefined functions=OVERAPPROXIMATE_BEHAVIOUR [2024-11-28 04:28:56,600 INFO L153 SettingsManager]: * Use constant arrays=true [2024-11-28 04:28:56,600 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2024-11-28 04:28:56,600 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-11-28 04:28:56,600 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2024-11-28 04:28:56,601 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL_NO_AM [2024-11-28 04:28:56,601 INFO L151 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2024-11-28 04:28:56,601 INFO L153 SettingsManager]: * TransformationType=MODULO_NEIGHBOR Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 8fbd99b1bfb27b318d252229087f8d9132096866b72085e8874326b5a6d541b4 [2024-11-28 04:28:56,879 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2024-11-28 04:28:56,888 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2024-11-28 04:28:56,890 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2024-11-28 04:28:56,892 INFO L270 PluginConnector]: Initializing CDTParser... [2024-11-28 04:28:56,892 INFO L274 PluginConnector]: CDTParser initialized [2024-11-28 04:28:56,894 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/../../sv-benchmarks/c/termination-memory-alloca/GulwaniJainKoskinen-2009PLDI-Fig1-alloca-2.i [2024-11-28 04:29:00,017 INFO L533 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/data/eb6b528eb/2a5683a7f1574680a074ddd0653220c6/FLAG4562e1a25 [2024-11-28 04:29:00,436 INFO L384 CDTParser]: Found 1 translation units. [2024-11-28 04:29:00,436 INFO L180 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/sv-benchmarks/c/termination-memory-alloca/GulwaniJainKoskinen-2009PLDI-Fig1-alloca-2.i [2024-11-28 04:29:00,460 INFO L427 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/data/eb6b528eb/2a5683a7f1574680a074ddd0653220c6/FLAG4562e1a25 [2024-11-28 04:29:00,491 INFO L435 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/data/eb6b528eb/2a5683a7f1574680a074ddd0653220c6 [2024-11-28 04:29:00,495 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2024-11-28 04:29:00,497 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2024-11-28 04:29:00,499 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2024-11-28 04:29:00,500 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2024-11-28 04:29:00,508 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2024-11-28 04:29:00,509 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.11 04:29:00" (1/1) ... [2024-11-28 04:29:00,510 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@349a3b2c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 04:29:00, skipping insertion in model container [2024-11-28 04:29:00,510 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.11 04:29:00" (1/1) ... [2024-11-28 04:29:00,555 INFO L175 MainTranslator]: Built tables and reachable declarations [2024-11-28 04:29:00,961 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-11-28 04:29:00,976 INFO L200 MainTranslator]: Completed pre-run [2024-11-28 04:29:01,031 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-11-28 04:29:01,056 INFO L204 MainTranslator]: Completed translation [2024-11-28 04:29:01,057 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 04:29:01 WrapperNode [2024-11-28 04:29:01,057 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2024-11-28 04:29:01,059 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2024-11-28 04:29:01,059 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2024-11-28 04:29:01,059 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2024-11-28 04:29:01,069 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 04:29:01" (1/1) ... [2024-11-28 04:29:01,081 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 04:29:01" (1/1) ... [2024-11-28 04:29:01,102 INFO L138 Inliner]: procedures = 110, calls = 24, calls flagged for inlining = 2, calls inlined = 2, statements flattened = 75 [2024-11-28 04:29:01,102 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2024-11-28 04:29:01,103 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2024-11-28 04:29:01,103 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2024-11-28 04:29:01,103 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2024-11-28 04:29:01,113 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 04:29:01" (1/1) ... [2024-11-28 04:29:01,113 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 04:29:01" (1/1) ... [2024-11-28 04:29:01,119 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 04:29:01" (1/1) ... [2024-11-28 04:29:01,135 INFO L175 MemorySlicer]: Split 14 memory accesses to 3 slices as follows [5, 3, 6]. 43 percent of accesses are in the largest equivalence class. The 0 initializations are split as follows [0, 0, 0]. The 5 writes are split as follows [1, 1, 3]. [2024-11-28 04:29:01,136 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 04:29:01" (1/1) ... [2024-11-28 04:29:01,136 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 04:29:01" (1/1) ... [2024-11-28 04:29:01,146 INFO L184 PluginConnector]: Executing the observer ReplaceArrayAssignments from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 04:29:01" (1/1) ... [2024-11-28 04:29:01,147 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 04:29:01" (1/1) ... [2024-11-28 04:29:01,150 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 04:29:01" (1/1) ... [2024-11-28 04:29:01,151 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 04:29:01" (1/1) ... [2024-11-28 04:29:01,153 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 04:29:01" (1/1) ... [2024-11-28 04:29:01,155 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2024-11-28 04:29:01,160 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2024-11-28 04:29:01,160 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2024-11-28 04:29:01,160 INFO L274 PluginConnector]: RCFGBuilder initialized [2024-11-28 04:29:01,161 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 04:29:01" (1/1) ... [2024-11-28 04:29:01,175 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-28 04:29:01,190 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 04:29:01,207 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-28 04:29:01,214 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2024-11-28 04:29:01,239 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#0 [2024-11-28 04:29:01,239 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#1 [2024-11-28 04:29:01,239 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#2 [2024-11-28 04:29:01,239 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#0 [2024-11-28 04:29:01,239 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#1 [2024-11-28 04:29:01,239 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#2 [2024-11-28 04:29:01,239 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2024-11-28 04:29:01,239 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2024-11-28 04:29:01,239 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2024-11-28 04:29:01,240 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2024-11-28 04:29:01,325 INFO L234 CfgBuilder]: Building ICFG [2024-11-28 04:29:01,327 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2024-11-28 04:29:01,544 INFO L? ?]: Removed 11 outVars from TransFormulas that were not future-live. [2024-11-28 04:29:01,544 INFO L283 CfgBuilder]: Performing block encoding [2024-11-28 04:29:01,553 INFO L307 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2024-11-28 04:29:01,553 INFO L312 CfgBuilder]: Removed 1 assume(true) statements. [2024-11-28 04:29:01,554 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.11 04:29:01 BoogieIcfgContainer [2024-11-28 04:29:01,554 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2024-11-28 04:29:01,555 INFO L112 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2024-11-28 04:29:01,555 INFO L270 PluginConnector]: Initializing BuchiAutomizer... [2024-11-28 04:29:01,562 INFO L274 PluginConnector]: BuchiAutomizer initialized [2024-11-28 04:29:01,563 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2024-11-28 04:29:01,563 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 28.11 04:29:00" (1/3) ... [2024-11-28 04:29:01,564 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@6ae7bd5f and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 28.11 04:29:01, skipping insertion in model container [2024-11-28 04:29:01,564 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2024-11-28 04:29:01,565 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 04:29:01" (2/3) ... [2024-11-28 04:29:01,565 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@6ae7bd5f and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 28.11 04:29:01, skipping insertion in model container [2024-11-28 04:29:01,565 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2024-11-28 04:29:01,565 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.11 04:29:01" (3/3) ... [2024-11-28 04:29:01,567 INFO L363 chiAutomizerObserver]: Analyzing ICFG GulwaniJainKoskinen-2009PLDI-Fig1-alloca-2.i [2024-11-28 04:29:01,622 INFO L300 stractBuchiCegarLoop]: Interprodecural is true [2024-11-28 04:29:01,622 INFO L301 stractBuchiCegarLoop]: Hoare is None [2024-11-28 04:29:01,622 INFO L302 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2024-11-28 04:29:01,622 INFO L303 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2024-11-28 04:29:01,623 INFO L304 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2024-11-28 04:29:01,624 INFO L305 stractBuchiCegarLoop]: Difference is false [2024-11-28 04:29:01,624 INFO L306 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2024-11-28 04:29:01,624 INFO L310 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2024-11-28 04:29:01,630 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 14 states, 13 states have (on average 1.4615384615384615) internal successors, (19), 13 states have internal predecessors, (19), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 04:29:01,649 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2024-11-28 04:29:01,649 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-28 04:29:01,650 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-28 04:29:01,655 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1] [2024-11-28 04:29:01,655 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1] [2024-11-28 04:29:01,655 INFO L332 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2024-11-28 04:29:01,656 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 14 states, 13 states have (on average 1.4615384615384615) internal successors, (19), 13 states have internal predecessors, (19), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 04:29:01,659 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2024-11-28 04:29:01,659 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-28 04:29:01,659 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-28 04:29:01,660 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1] [2024-11-28 04:29:01,660 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1] [2024-11-28 04:29:01,669 INFO L747 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~nondet4#1, main_#t~nondet5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~mem8#1, main_#t~short9#1, main_#t~malloc10#1.base, main_#t~malloc10#1.offset, main_#t~mem11#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~nondet14#1, main_#t~short15#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~id~0#1.base, main_~id~0#1.offset, main_~maxId~0#1.base, main_~maxId~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~id~0#1.base, main_~id~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~maxId~0#1.base, main_~maxId~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset;havoc main_#t~nondet4#1;call write~int#0(main_#t~nondet4#1, main_~id~0#1.base, main_~id~0#1.offset, 4);havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;call write~int#1(main_#t~nondet5#1, main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);havoc main_#t~nondet5#1;call main_#t~mem6#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short9#1 := 0 <= main_#t~mem6#1;" "assume !main_#t~short9#1;" "assume main_#t~short9#1;havoc main_#t~mem6#1;havoc main_#t~mem7#1;havoc main_#t~mem8#1;havoc main_#t~short9#1;call main_#t~malloc10#1.base, main_#t~malloc10#1.offset := #Ultimate.allocOnStack(4);main_~tmp~0#1.base, main_~tmp~0#1.offset := main_#t~malloc10#1.base, main_#t~malloc10#1.offset;call main_#t~mem11#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);call write~int#2(1 + main_#t~mem11#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem11#1;" [2024-11-28 04:29:01,669 INFO L749 eck$LassoCheckResult]: Loop: "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#2(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);" [2024-11-28 04:29:01,674 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 04:29:01,675 INFO L85 PathProgramCache]: Analyzing trace with hash 925671, now seen corresponding path program 1 times [2024-11-28 04:29:01,685 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM [2024-11-28 04:29:01,685 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1165442277] [2024-11-28 04:29:01,686 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 04:29:01,686 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 04:29:01,792 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 04:29:01,890 INFO L136 FreeRefinementEngine]: Strategy CAMEL_NO_AM found an infeasible trace [2024-11-28 04:29:01,891 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1165442277] [2024-11-28 04:29:01,892 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1165442277] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-28 04:29:01,893 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1341543480] [2024-11-28 04:29:01,893 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 04:29:01,893 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-28 04:29:01,893 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 04:29:01,898 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-28 04:29:01,900 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2024-11-28 04:29:02,023 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 04:29:02,028 INFO L256 TraceCheckSpWp]: Trace formula consists of 84 conjuncts, 2 conjuncts are in the unsatisfiable core [2024-11-28 04:29:02,031 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-28 04:29:02,042 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-28 04:29:02,050 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1341543480] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-28 04:29:02,050 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-28 04:29:02,050 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [2, 2, 2] total 2 [2024-11-28 04:29:02,053 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2039045909] [2024-11-28 04:29:02,054 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-28 04:29:02,058 INFO L752 eck$LassoCheckResult]: stem already infeasible [2024-11-28 04:29:02,059 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 04:29:02,059 INFO L85 PathProgramCache]: Analyzing trace with hash 43042169, now seen corresponding path program 1 times [2024-11-28 04:29:02,060 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM [2024-11-28 04:29:02,060 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1100095229] [2024-11-28 04:29:02,060 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 04:29:02,060 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 04:29:02,085 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-28 04:29:02,085 INFO L357 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-28 04:29:02,106 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-28 04:29:02,134 INFO L130 FreeRefinementEngine]: Strategy CAMEL_NO_AM found a feasible trace [2024-11-28 04:29:02,506 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL_NO_AM [2024-11-28 04:29:02,537 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2024-11-28 04:29:02,537 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-11-28 04:29:02,539 INFO L87 Difference]: Start difference. First operand has 14 states, 13 states have (on average 1.4615384615384615) internal successors, (19), 13 states have internal predecessors, (19), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 3 states, 2 states have (on average 2.0) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 04:29:02,565 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 04:29:02,565 INFO L93 Difference]: Finished difference Result 15 states and 19 transitions. [2024-11-28 04:29:02,566 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 15 states and 19 transitions. [2024-11-28 04:29:02,569 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2024-11-28 04:29:02,605 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 15 states to 9 states and 11 transitions. [2024-11-28 04:29:02,610 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 9 [2024-11-28 04:29:02,612 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 9 [2024-11-28 04:29:02,612 INFO L73 IsDeterministic]: Start isDeterministic. Operand 9 states and 11 transitions. [2024-11-28 04:29:02,613 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-28 04:29:02,613 INFO L218 hiAutomatonCegarLoop]: Abstraction has 9 states and 11 transitions. [2024-11-28 04:29:02,626 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9 states and 11 transitions. [2024-11-28 04:29:02,637 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9 to 9. [2024-11-28 04:29:02,638 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 9 states, 9 states have (on average 1.2222222222222223) internal successors, (11), 8 states have internal predecessors, (11), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 04:29:02,639 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 11 transitions. [2024-11-28 04:29:02,640 INFO L240 hiAutomatonCegarLoop]: Abstraction has 9 states and 11 transitions. [2024-11-28 04:29:02,642 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-11-28 04:29:02,646 INFO L425 stractBuchiCegarLoop]: Abstraction has 9 states and 11 transitions. [2024-11-28 04:29:02,646 INFO L332 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2024-11-28 04:29:02,647 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 9 states and 11 transitions. [2024-11-28 04:29:02,647 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2024-11-28 04:29:02,648 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-28 04:29:02,648 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-28 04:29:02,649 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1] [2024-11-28 04:29:02,649 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1] [2024-11-28 04:29:02,649 INFO L747 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~nondet4#1, main_#t~nondet5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~mem8#1, main_#t~short9#1, main_#t~malloc10#1.base, main_#t~malloc10#1.offset, main_#t~mem11#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~nondet14#1, main_#t~short15#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~id~0#1.base, main_~id~0#1.offset, main_~maxId~0#1.base, main_~maxId~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~id~0#1.base, main_~id~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~maxId~0#1.base, main_~maxId~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset;havoc main_#t~nondet4#1;call write~int#0(main_#t~nondet4#1, main_~id~0#1.base, main_~id~0#1.offset, 4);havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;call write~int#1(main_#t~nondet5#1, main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);havoc main_#t~nondet5#1;call main_#t~mem6#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short9#1 := 0 <= main_#t~mem6#1;" "assume main_#t~short9#1;call main_#t~mem7#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);call main_#t~mem8#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);main_#t~short9#1 := main_#t~mem7#1 < main_#t~mem8#1;" "assume main_#t~short9#1;havoc main_#t~mem6#1;havoc main_#t~mem7#1;havoc main_#t~mem8#1;havoc main_#t~short9#1;call main_#t~malloc10#1.base, main_#t~malloc10#1.offset := #Ultimate.allocOnStack(4);main_~tmp~0#1.base, main_~tmp~0#1.offset := main_#t~malloc10#1.base, main_#t~malloc10#1.offset;call main_#t~mem11#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);call write~int#2(1 + main_#t~mem11#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem11#1;" [2024-11-28 04:29:02,649 INFO L749 eck$LassoCheckResult]: Loop: "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#2(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);" [2024-11-28 04:29:02,650 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 04:29:02,651 INFO L85 PathProgramCache]: Analyzing trace with hash 925609, now seen corresponding path program 1 times [2024-11-28 04:29:02,652 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM [2024-11-28 04:29:02,652 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [632452746] [2024-11-28 04:29:02,653 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 04:29:02,653 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 04:29:02,721 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-28 04:29:02,724 INFO L357 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-28 04:29:02,762 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-28 04:29:02,772 INFO L130 FreeRefinementEngine]: Strategy CAMEL_NO_AM found a feasible trace [2024-11-28 04:29:02,772 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 04:29:02,774 INFO L85 PathProgramCache]: Analyzing trace with hash 43042169, now seen corresponding path program 2 times [2024-11-28 04:29:02,774 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM [2024-11-28 04:29:02,774 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [331854891] [2024-11-28 04:29:02,775 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 04:29:02,775 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 04:29:02,793 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-28 04:29:02,794 INFO L357 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-28 04:29:02,813 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-28 04:29:02,815 INFO L130 FreeRefinementEngine]: Strategy CAMEL_NO_AM found a feasible trace [2024-11-28 04:29:02,820 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 04:29:02,820 INFO L85 PathProgramCache]: Analyzing trace with hash -533975343, now seen corresponding path program 1 times [2024-11-28 04:29:02,821 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM [2024-11-28 04:29:02,821 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [262709224] [2024-11-28 04:29:02,821 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 04:29:02,821 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 04:29:02,885 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-28 04:29:02,885 INFO L357 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-28 04:29:02,924 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-28 04:29:02,932 INFO L130 FreeRefinementEngine]: Strategy CAMEL_NO_AM found a feasible trace [2024-11-28 04:29:04,181 INFO L204 LassoAnalysis]: Preferences: [2024-11-28 04:29:04,182 INFO L125 ssoRankerPreferences]: Compute integeral hull: false [2024-11-28 04:29:04,183 INFO L126 ssoRankerPreferences]: Enable LassoPartitioneer: true [2024-11-28 04:29:04,183 INFO L127 ssoRankerPreferences]: Term annotations enabled: false [2024-11-28 04:29:04,183 INFO L128 ssoRankerPreferences]: Use exernal solver: false [2024-11-28 04:29:04,183 INFO L129 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-28 04:29:04,183 INFO L130 ssoRankerPreferences]: Dump SMT script to file: false [2024-11-28 04:29:04,183 INFO L131 ssoRankerPreferences]: Path of dumped script: [2024-11-28 04:29:04,184 INFO L132 ssoRankerPreferences]: Filename of dumped script: GulwaniJainKoskinen-2009PLDI-Fig1-alloca-2.i_Iteration2_Lasso [2024-11-28 04:29:04,184 INFO L133 ssoRankerPreferences]: MapElimAlgo: Frank [2024-11-28 04:29:04,184 INFO L241 LassoAnalysis]: Starting lasso preprocessing... [2024-11-28 04:29:04,204 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-28 04:29:04,212 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-28 04:29:04,214 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-28 04:29:04,217 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-28 04:29:04,220 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-28 04:29:04,223 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-28 04:29:04,229 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-28 04:29:04,232 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-28 04:29:04,235 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-28 04:29:04,238 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-28 04:29:04,241 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-28 04:29:04,244 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-28 04:29:04,249 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-28 04:29:04,252 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-28 04:29:04,255 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-28 04:29:04,258 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-28 04:29:04,911 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-28 04:29:04,915 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-28 04:29:04,919 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-28 04:29:04,922 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-28 04:29:05,425 INFO L259 LassoAnalysis]: Preprocessing complete. [2024-11-28 04:29:05,433 INFO L451 LassoAnalysis]: Using template 'affine'. [2024-11-28 04:29:05,435 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-28 04:29:05,436 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 04:29:05,440 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-28 04:29:05,443 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Waiting until timeout for monitored process [2024-11-28 04:29:05,444 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-28 04:29:05,459 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-28 04:29:05,459 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-28 04:29:05,459 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-28 04:29:05,459 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-28 04:29:05,459 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-28 04:29:05,464 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-28 04:29:05,464 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-28 04:29:05,470 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-28 04:29:05,480 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Ended with exit code 0 [2024-11-28 04:29:05,480 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-28 04:29:05,481 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 04:29:05,483 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-28 04:29:05,487 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Waiting until timeout for monitored process [2024-11-28 04:29:05,488 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-28 04:29:05,504 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-28 04:29:05,504 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-28 04:29:05,504 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-28 04:29:05,504 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-28 04:29:05,504 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-28 04:29:05,506 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-28 04:29:05,506 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-28 04:29:05,509 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-28 04:29:05,519 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Ended with exit code 0 [2024-11-28 04:29:05,519 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-28 04:29:05,519 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 04:29:05,521 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-28 04:29:05,522 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Waiting until timeout for monitored process [2024-11-28 04:29:05,524 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-28 04:29:05,535 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-28 04:29:05,535 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-28 04:29:05,536 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-28 04:29:05,536 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-28 04:29:05,536 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-28 04:29:05,536 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-28 04:29:05,536 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-28 04:29:05,543 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-28 04:29:05,553 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Forceful destruction successful, exit code 0 [2024-11-28 04:29:05,553 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-28 04:29:05,553 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 04:29:05,555 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-28 04:29:05,557 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (6)] Waiting until timeout for monitored process [2024-11-28 04:29:05,557 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-28 04:29:05,568 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-28 04:29:05,568 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-28 04:29:05,569 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-28 04:29:05,569 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-28 04:29:05,569 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-28 04:29:05,569 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-28 04:29:05,569 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-28 04:29:05,571 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-28 04:29:05,578 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (6)] Ended with exit code 0 [2024-11-28 04:29:05,578 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-28 04:29:05,578 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 04:29:05,580 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-28 04:29:05,581 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (7)] Waiting until timeout for monitored process [2024-11-28 04:29:05,583 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-28 04:29:05,594 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-28 04:29:05,594 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-28 04:29:05,595 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-28 04:29:05,595 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-28 04:29:05,595 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-28 04:29:05,595 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-28 04:29:05,595 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-28 04:29:05,598 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-28 04:29:05,604 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (7)] Forceful destruction successful, exit code 0 [2024-11-28 04:29:05,604 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-28 04:29:05,605 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 04:29:05,606 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-28 04:29:05,608 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (8)] Waiting until timeout for monitored process [2024-11-28 04:29:05,609 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-28 04:29:05,620 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-28 04:29:05,620 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-28 04:29:05,620 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-28 04:29:05,620 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-28 04:29:05,624 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-28 04:29:05,624 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-28 04:29:05,630 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-28 04:29:05,640 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (8)] Ended with exit code 0 [2024-11-28 04:29:05,642 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-28 04:29:05,642 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 04:29:05,646 INFO L229 MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-28 04:29:05,648 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (9)] Waiting until timeout for monitored process [2024-11-28 04:29:05,652 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-28 04:29:05,667 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-28 04:29:05,667 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-28 04:29:05,667 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-28 04:29:05,667 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-28 04:29:05,667 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-28 04:29:05,669 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-28 04:29:05,669 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-28 04:29:05,671 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-28 04:29:05,681 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (9)] Ended with exit code 0 [2024-11-28 04:29:05,682 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-28 04:29:05,682 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 04:29:05,685 INFO L229 MonitoredProcess]: Starting monitored process 10 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-28 04:29:05,688 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (10)] Waiting until timeout for monitored process [2024-11-28 04:29:05,689 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-28 04:29:05,703 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-28 04:29:05,703 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-28 04:29:05,703 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-28 04:29:05,704 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-28 04:29:05,704 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-28 04:29:05,704 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-28 04:29:05,704 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-28 04:29:05,706 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-28 04:29:05,716 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (10)] Ended with exit code 0 [2024-11-28 04:29:05,717 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-28 04:29:05,717 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 04:29:05,719 INFO L229 MonitoredProcess]: Starting monitored process 11 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-28 04:29:05,723 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (11)] Waiting until timeout for monitored process [2024-11-28 04:29:05,723 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-28 04:29:05,739 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-28 04:29:05,739 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-28 04:29:05,739 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-28 04:29:05,739 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-28 04:29:05,739 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-28 04:29:05,743 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-28 04:29:05,743 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-28 04:29:05,745 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-28 04:29:05,755 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (11)] Forceful destruction successful, exit code 0 [2024-11-28 04:29:05,755 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-28 04:29:05,755 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 04:29:05,758 INFO L229 MonitoredProcess]: Starting monitored process 12 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-28 04:29:05,760 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (12)] Waiting until timeout for monitored process [2024-11-28 04:29:05,761 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-28 04:29:05,772 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-28 04:29:05,773 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-28 04:29:05,773 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-28 04:29:05,773 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-28 04:29:05,773 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-28 04:29:05,774 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-28 04:29:05,774 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-28 04:29:05,776 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-28 04:29:05,782 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (12)] Ended with exit code 0 [2024-11-28 04:29:05,782 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-28 04:29:05,782 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 04:29:05,784 INFO L229 MonitoredProcess]: Starting monitored process 13 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-28 04:29:05,785 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (13)] Waiting until timeout for monitored process [2024-11-28 04:29:05,786 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-28 04:29:05,801 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-28 04:29:05,801 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-28 04:29:05,801 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-28 04:29:05,801 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-28 04:29:05,801 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-28 04:29:05,802 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-28 04:29:05,802 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-28 04:29:05,804 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-28 04:29:05,814 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (13)] Ended with exit code 0 [2024-11-28 04:29:05,814 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-28 04:29:05,814 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 04:29:05,820 INFO L229 MonitoredProcess]: Starting monitored process 14 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-28 04:29:05,823 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (14)] Waiting until timeout for monitored process [2024-11-28 04:29:05,824 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-28 04:29:05,838 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-28 04:29:05,838 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-28 04:29:05,838 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-28 04:29:05,838 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-28 04:29:05,838 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-28 04:29:05,839 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-28 04:29:05,839 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-28 04:29:05,843 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-28 04:29:05,852 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (14)] Ended with exit code 0 [2024-11-28 04:29:05,853 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-28 04:29:05,853 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 04:29:05,855 INFO L229 MonitoredProcess]: Starting monitored process 15 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-28 04:29:05,859 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (15)] Waiting until timeout for monitored process [2024-11-28 04:29:05,859 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-28 04:29:05,874 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-28 04:29:05,874 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-28 04:29:05,874 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-28 04:29:05,874 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-28 04:29:05,879 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-28 04:29:05,879 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-28 04:29:05,883 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-28 04:29:05,893 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (15)] Forceful destruction successful, exit code 0 [2024-11-28 04:29:05,893 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-28 04:29:05,894 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 04:29:05,896 INFO L229 MonitoredProcess]: Starting monitored process 16 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-28 04:29:05,899 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (16)] Waiting until timeout for monitored process [2024-11-28 04:29:05,900 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-28 04:29:05,915 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-28 04:29:05,915 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-28 04:29:05,916 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-28 04:29:05,916 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-28 04:29:05,916 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-28 04:29:05,920 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-28 04:29:05,920 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-28 04:29:05,924 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-28 04:29:05,934 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (16)] Forceful destruction successful, exit code 0 [2024-11-28 04:29:05,934 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-28 04:29:05,934 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 04:29:05,936 INFO L229 MonitoredProcess]: Starting monitored process 17 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-28 04:29:05,940 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (17)] Waiting until timeout for monitored process [2024-11-28 04:29:05,942 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-28 04:29:05,958 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-28 04:29:05,958 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-28 04:29:05,958 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-28 04:29:05,958 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-28 04:29:05,958 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-28 04:29:05,959 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-28 04:29:05,959 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-28 04:29:05,962 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-28 04:29:05,972 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (17)] Forceful destruction successful, exit code 0 [2024-11-28 04:29:05,972 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-28 04:29:05,972 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 04:29:05,974 INFO L229 MonitoredProcess]: Starting monitored process 18 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-28 04:29:05,976 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (18)] Waiting until timeout for monitored process [2024-11-28 04:29:05,977 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-28 04:29:05,988 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-28 04:29:05,989 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-28 04:29:05,989 INFO L204 nArgumentSynthesizer]: 2 loop disjuncts [2024-11-28 04:29:05,989 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-28 04:29:06,008 INFO L401 nArgumentSynthesizer]: We have 16 Motzkin's Theorem applications. [2024-11-28 04:29:06,008 INFO L402 nArgumentSynthesizer]: A total of 4 supporting invariants were added. [2024-11-28 04:29:06,043 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2024-11-28 04:29:06,127 INFO L443 ModelExtractionUtils]: Simplification made 17 calls to the SMT solver. [2024-11-28 04:29:06,131 INFO L444 ModelExtractionUtils]: 6 out of 26 variables were initially zero. Simplification set additionally 12 variables to zero. [2024-11-28 04:29:06,134 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-28 04:29:06,134 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 04:29:06,138 INFO L229 MonitoredProcess]: Starting monitored process 19 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-28 04:29:06,141 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (19)] Waiting until timeout for monitored process [2024-11-28 04:29:06,142 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2024-11-28 04:29:06,167 INFO L438 nArgumentSynthesizer]: Removed 1 redundant supporting invariants from a total of 4. [2024-11-28 04:29:06,167 INFO L474 LassoAnalysis]: Proved termination. [2024-11-28 04:29:06,167 INFO L476 LassoAnalysis]: Termination argument consisting of: Ranking function f(v_rep(select (select #memory_int#2 ULTIMATE.start_main_~tmp~0#1.base) 0)_1) = 2*v_rep(select (select #memory_int#2 ULTIMATE.start_main_~tmp~0#1.base) 0)_1 + 1 Supporting invariants [1*v_rep(select (select #memory_int#2 ULTIMATE.start_main_~tmp~0#1.base) 0)_1 >= 0, 1*v_rep(select (select #memory_int#1 ULTIMATE.start_main_~maxId~0#1.base) ULTIMATE.start_main_~maxId~0#1.offset)_1 - 1 >= 0, 1*v_rep(select (select #memory_int#0 ULTIMATE.start_main_~id~0#1.base) ULTIMATE.start_main_~id~0#1.offset)_1 >= 0] [2024-11-28 04:29:06,179 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (18)] Ended with exit code 0 [2024-11-28 04:29:06,316 INFO L156 tatePredicateManager]: 23 out of 25 supporting invariants were superfluous and have been removed [2024-11-28 04:29:06,330 WARN L970 BoogieBacktranslator]: Unfinished Backtranslation: Unknown variable: #memory_int#2 [2024-11-28 04:29:06,331 WARN L970 BoogieBacktranslator]: Unfinished Backtranslation: Cannot backtranslate array access to array IdentifierExpression[#memory_int#2,GLOBAL] [2024-11-28 04:29:06,331 WARN L970 BoogieBacktranslator]: Unfinished Backtranslation: Cannot backtranslate array access to array ArrayAccessExpression[IdentifierExpression[#memory_int#2,GLOBAL],[IdentifierExpression[~tmp~0!base,]]] [2024-11-28 04:29:06,373 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 04:29:06,413 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 04:29:06,416 INFO L256 TraceCheckSpWp]: Trace formula consists of 97 conjuncts, 13 conjuncts are in the unsatisfiable core [2024-11-28 04:29:06,419 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-28 04:29:06,537 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2024-11-28 04:29:06,617 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 04:29:06,618 INFO L256 TraceCheckSpWp]: Trace formula consists of 42 conjuncts, 11 conjuncts are in the unsatisfiable core [2024-11-28 04:29:06,619 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-28 04:29:06,748 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-28 04:29:06,752 INFO L141 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.3 stem predicates 2 loop predicates [2024-11-28 04:29:06,754 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand 9 states and 11 transitions. cyclomatic complexity: 3 Second operand has 6 states, 6 states have (on average 1.5) internal successors, (9), 6 states have internal predecessors, (9), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 04:29:06,898 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand 9 states and 11 transitions. cyclomatic complexity: 3. Second operand has 6 states, 6 states have (on average 1.5) internal successors, (9), 6 states have internal predecessors, (9), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 19 states and 25 transitions. Complement of second has 9 states. [2024-11-28 04:29:06,900 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 6 states 3 stem states 2 non-accepting loop states 1 accepting loop states [2024-11-28 04:29:06,901 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6 states, 6 states have (on average 1.5) internal successors, (9), 6 states have internal predecessors, (9), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 04:29:06,903 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6 states to 6 states and 10 transitions. [2024-11-28 04:29:06,909 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 6 states and 10 transitions. Stem has 4 letters. Loop has 5 letters. [2024-11-28 04:29:06,910 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2024-11-28 04:29:06,910 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 6 states and 10 transitions. Stem has 9 letters. Loop has 5 letters. [2024-11-28 04:29:06,910 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2024-11-28 04:29:06,911 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 6 states and 10 transitions. Stem has 4 letters. Loop has 10 letters. [2024-11-28 04:29:06,911 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2024-11-28 04:29:06,911 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 19 states and 25 transitions. [2024-11-28 04:29:06,912 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2024-11-28 04:29:06,913 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 19 states to 19 states and 25 transitions. [2024-11-28 04:29:06,914 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 13 [2024-11-28 04:29:06,914 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 14 [2024-11-28 04:29:06,914 INFO L73 IsDeterministic]: Start isDeterministic. Operand 19 states and 25 transitions. [2024-11-28 04:29:06,915 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-11-28 04:29:06,915 INFO L218 hiAutomatonCegarLoop]: Abstraction has 19 states and 25 transitions. [2024-11-28 04:29:06,915 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19 states and 25 transitions. [2024-11-28 04:29:06,916 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19 to 19. [2024-11-28 04:29:06,918 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 19 states, 19 states have (on average 1.3157894736842106) internal successors, (25), 18 states have internal predecessors, (25), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 04:29:06,919 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19 states to 19 states and 25 transitions. [2024-11-28 04:29:06,919 INFO L240 hiAutomatonCegarLoop]: Abstraction has 19 states and 25 transitions. [2024-11-28 04:29:06,919 INFO L425 stractBuchiCegarLoop]: Abstraction has 19 states and 25 transitions. [2024-11-28 04:29:06,920 INFO L332 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2024-11-28 04:29:06,920 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 19 states and 25 transitions. [2024-11-28 04:29:06,920 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2024-11-28 04:29:06,922 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-28 04:29:06,922 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-28 04:29:06,923 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 04:29:06,923 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1] [2024-11-28 04:29:06,923 INFO L747 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~nondet4#1, main_#t~nondet5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~mem8#1, main_#t~short9#1, main_#t~malloc10#1.base, main_#t~malloc10#1.offset, main_#t~mem11#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~nondet14#1, main_#t~short15#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~id~0#1.base, main_~id~0#1.offset, main_~maxId~0#1.base, main_~maxId~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~id~0#1.base, main_~id~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~maxId~0#1.base, main_~maxId~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset;havoc main_#t~nondet4#1;call write~int#0(main_#t~nondet4#1, main_~id~0#1.base, main_~id~0#1.offset, 4);havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;call write~int#1(main_#t~nondet5#1, main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);havoc main_#t~nondet5#1;call main_#t~mem6#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short9#1 := 0 <= main_#t~mem6#1;" "assume main_#t~short9#1;call main_#t~mem7#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);call main_#t~mem8#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);main_#t~short9#1 := main_#t~mem7#1 < main_#t~mem8#1;" "assume main_#t~short9#1;havoc main_#t~mem6#1;havoc main_#t~mem7#1;havoc main_#t~mem8#1;havoc main_#t~short9#1;call main_#t~malloc10#1.base, main_#t~malloc10#1.offset := #Ultimate.allocOnStack(4);main_~tmp~0#1.base, main_~tmp~0#1.offset := main_#t~malloc10#1.base, main_#t~malloc10#1.offset;call main_#t~mem11#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);call write~int#2(1 + main_#t~mem11#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem11#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume !main_#t~short15#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" [2024-11-28 04:29:06,923 INFO L749 eck$LassoCheckResult]: Loop: "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#2(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);" [2024-11-28 04:29:06,923 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 04:29:06,924 INFO L85 PathProgramCache]: Analyzing trace with hash -533915763, now seen corresponding path program 1 times [2024-11-28 04:29:06,924 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM [2024-11-28 04:29:06,924 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [282799934] [2024-11-28 04:29:06,924 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 04:29:06,924 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 04:29:06,945 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 04:29:07,202 INFO L136 FreeRefinementEngine]: Strategy CAMEL_NO_AM found an infeasible trace [2024-11-28 04:29:07,203 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [282799934] [2024-11-28 04:29:07,203 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [282799934] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-28 04:29:07,203 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1911739208] [2024-11-28 04:29:07,203 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 04:29:07,203 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-28 04:29:07,204 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 04:29:07,206 INFO L229 MonitoredProcess]: Starting monitored process 20 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-28 04:29:07,212 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (20)] Waiting until timeout for monitored process [2024-11-28 04:29:07,287 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 04:29:07,288 INFO L256 TraceCheckSpWp]: Trace formula consists of 133 conjuncts, 2 conjuncts are in the unsatisfiable core [2024-11-28 04:29:07,289 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-28 04:29:07,297 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-28 04:29:07,299 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1911739208] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-28 04:29:07,300 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-28 04:29:07,300 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 3, 3] total 5 [2024-11-28 04:29:07,300 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1577536923] [2024-11-28 04:29:07,300 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-28 04:29:07,300 INFO L752 eck$LassoCheckResult]: stem already infeasible [2024-11-28 04:29:07,300 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 04:29:07,301 INFO L85 PathProgramCache]: Analyzing trace with hash 43042169, now seen corresponding path program 3 times [2024-11-28 04:29:07,301 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM [2024-11-28 04:29:07,301 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1324641675] [2024-11-28 04:29:07,301 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 04:29:07,301 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 04:29:07,308 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-28 04:29:07,309 INFO L357 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-28 04:29:07,312 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-28 04:29:07,315 INFO L130 FreeRefinementEngine]: Strategy CAMEL_NO_AM found a feasible trace [2024-11-28 04:29:07,546 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL_NO_AM [2024-11-28 04:29:07,547 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-28 04:29:07,547 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-11-28 04:29:07,547 INFO L87 Difference]: Start difference. First operand 19 states and 25 transitions. cyclomatic complexity: 8 Second operand has 5 states, 5 states have (on average 2.6) internal successors, (13), 5 states have internal predecessors, (13), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 04:29:07,599 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 04:29:07,599 INFO L93 Difference]: Finished difference Result 30 states and 33 transitions. [2024-11-28 04:29:07,599 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 30 states and 33 transitions. [2024-11-28 04:29:07,600 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2024-11-28 04:29:07,602 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 30 states to 27 states and 30 transitions. [2024-11-28 04:29:07,602 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 18 [2024-11-28 04:29:07,603 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 18 [2024-11-28 04:29:07,603 INFO L73 IsDeterministic]: Start isDeterministic. Operand 27 states and 30 transitions. [2024-11-28 04:29:07,603 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-11-28 04:29:07,603 INFO L218 hiAutomatonCegarLoop]: Abstraction has 27 states and 30 transitions. [2024-11-28 04:29:07,603 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27 states and 30 transitions. [2024-11-28 04:29:07,605 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27 to 19. [2024-11-28 04:29:07,605 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 19 states, 19 states have (on average 1.1578947368421053) internal successors, (22), 18 states have internal predecessors, (22), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 04:29:07,606 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19 states to 19 states and 22 transitions. [2024-11-28 04:29:07,606 INFO L240 hiAutomatonCegarLoop]: Abstraction has 19 states and 22 transitions. [2024-11-28 04:29:07,606 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-11-28 04:29:07,607 INFO L425 stractBuchiCegarLoop]: Abstraction has 19 states and 22 transitions. [2024-11-28 04:29:07,607 INFO L332 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2024-11-28 04:29:07,607 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 19 states and 22 transitions. [2024-11-28 04:29:07,608 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2024-11-28 04:29:07,608 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-28 04:29:07,608 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-28 04:29:07,608 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 04:29:07,609 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1] [2024-11-28 04:29:07,609 INFO L747 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~nondet4#1, main_#t~nondet5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~mem8#1, main_#t~short9#1, main_#t~malloc10#1.base, main_#t~malloc10#1.offset, main_#t~mem11#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~nondet14#1, main_#t~short15#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~id~0#1.base, main_~id~0#1.offset, main_~maxId~0#1.base, main_~maxId~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~id~0#1.base, main_~id~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~maxId~0#1.base, main_~maxId~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset;havoc main_#t~nondet4#1;call write~int#0(main_#t~nondet4#1, main_~id~0#1.base, main_~id~0#1.offset, 4);havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;call write~int#1(main_#t~nondet5#1, main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);havoc main_#t~nondet5#1;call main_#t~mem6#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short9#1 := 0 <= main_#t~mem6#1;" "assume main_#t~short9#1;call main_#t~mem7#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);call main_#t~mem8#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);main_#t~short9#1 := main_#t~mem7#1 < main_#t~mem8#1;" "assume main_#t~short9#1;havoc main_#t~mem6#1;havoc main_#t~mem7#1;havoc main_#t~mem8#1;havoc main_#t~short9#1;call main_#t~malloc10#1.base, main_#t~malloc10#1.offset := #Ultimate.allocOnStack(4);main_~tmp~0#1.base, main_~tmp~0#1.offset := main_#t~malloc10#1.base, main_#t~malloc10#1.offset;call main_#t~mem11#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);call write~int#2(1 + main_#t~mem11#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem11#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" [2024-11-28 04:29:07,609 INFO L749 eck$LassoCheckResult]: Loop: "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#2(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);" [2024-11-28 04:29:07,609 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 04:29:07,609 INFO L85 PathProgramCache]: Analyzing trace with hash -533975345, now seen corresponding path program 1 times [2024-11-28 04:29:07,610 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM [2024-11-28 04:29:07,610 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [848920467] [2024-11-28 04:29:07,610 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 04:29:07,610 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 04:29:07,668 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-28 04:29:07,672 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (19)] Ended with exit code 0 [2024-11-28 04:29:07,673 INFO L357 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-28 04:29:07,690 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-28 04:29:07,694 INFO L130 FreeRefinementEngine]: Strategy CAMEL_NO_AM found a feasible trace [2024-11-28 04:29:07,695 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 04:29:07,695 INFO L85 PathProgramCache]: Analyzing trace with hash 43042169, now seen corresponding path program 4 times [2024-11-28 04:29:07,695 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM [2024-11-28 04:29:07,695 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1973709532] [2024-11-28 04:29:07,695 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 04:29:07,696 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 04:29:07,705 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-28 04:29:07,705 INFO L357 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-28 04:29:07,709 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-28 04:29:07,711 INFO L130 FreeRefinementEngine]: Strategy CAMEL_NO_AM found a feasible trace [2024-11-28 04:29:07,712 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 04:29:07,712 INFO L85 PathProgramCache]: Analyzing trace with hash 1012377451, now seen corresponding path program 1 times [2024-11-28 04:29:07,712 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM [2024-11-28 04:29:07,712 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [813024360] [2024-11-28 04:29:07,712 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 04:29:07,713 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 04:29:07,750 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-28 04:29:07,751 INFO L357 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-28 04:29:07,775 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-28 04:29:07,784 INFO L130 FreeRefinementEngine]: Strategy CAMEL_NO_AM found a feasible trace [2024-11-28 04:29:09,528 INFO L204 LassoAnalysis]: Preferences: [2024-11-28 04:29:09,528 INFO L125 ssoRankerPreferences]: Compute integeral hull: false [2024-11-28 04:29:09,528 INFO L126 ssoRankerPreferences]: Enable LassoPartitioneer: true [2024-11-28 04:29:09,528 INFO L127 ssoRankerPreferences]: Term annotations enabled: false [2024-11-28 04:29:09,529 INFO L128 ssoRankerPreferences]: Use exernal solver: false [2024-11-28 04:29:09,529 INFO L129 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-28 04:29:09,529 INFO L130 ssoRankerPreferences]: Dump SMT script to file: false [2024-11-28 04:29:09,529 INFO L131 ssoRankerPreferences]: Path of dumped script: [2024-11-28 04:29:09,529 INFO L132 ssoRankerPreferences]: Filename of dumped script: GulwaniJainKoskinen-2009PLDI-Fig1-alloca-2.i_Iteration4_Lasso [2024-11-28 04:29:09,529 INFO L133 ssoRankerPreferences]: MapElimAlgo: Frank [2024-11-28 04:29:09,529 INFO L241 LassoAnalysis]: Starting lasso preprocessing... [2024-11-28 04:29:09,533 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-28 04:29:09,536 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-28 04:29:09,540 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-28 04:29:09,543 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-28 04:29:10,110 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-28 04:29:10,112 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-28 04:29:10,115 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-28 04:29:10,117 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-28 04:29:10,119 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-28 04:29:10,121 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-28 04:29:10,123 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-28 04:29:10,125 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-28 04:29:10,128 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-28 04:29:10,132 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-28 04:29:10,135 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-28 04:29:10,138 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-28 04:29:10,142 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-28 04:29:10,144 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-28 04:29:10,147 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-28 04:29:10,151 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-28 04:29:10,610 INFO L259 LassoAnalysis]: Preprocessing complete. [2024-11-28 04:29:10,610 INFO L451 LassoAnalysis]: Using template 'affine'. [2024-11-28 04:29:10,610 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-28 04:29:10,610 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 04:29:10,612 INFO L229 MonitoredProcess]: Starting monitored process 21 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-28 04:29:10,614 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (21)] Waiting until timeout for monitored process [2024-11-28 04:29:10,615 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-28 04:29:10,628 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-28 04:29:10,628 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-28 04:29:10,628 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-28 04:29:10,628 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-28 04:29:10,629 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-28 04:29:10,629 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-28 04:29:10,629 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-28 04:29:10,631 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-28 04:29:10,641 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (21)] Ended with exit code 0 [2024-11-28 04:29:10,642 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-28 04:29:10,642 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 04:29:10,644 INFO L229 MonitoredProcess]: Starting monitored process 22 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-28 04:29:10,650 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (22)] Waiting until timeout for monitored process [2024-11-28 04:29:10,651 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-28 04:29:10,667 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-28 04:29:10,668 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-28 04:29:10,668 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-28 04:29:10,668 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-28 04:29:10,668 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-28 04:29:10,668 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-28 04:29:10,668 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-28 04:29:10,673 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-28 04:29:10,684 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (22)] Ended with exit code 0 [2024-11-28 04:29:10,685 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-28 04:29:10,685 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 04:29:10,687 INFO L229 MonitoredProcess]: Starting monitored process 23 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-28 04:29:10,688 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (23)] Waiting until timeout for monitored process [2024-11-28 04:29:10,690 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-28 04:29:10,703 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-28 04:29:10,704 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-28 04:29:10,704 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-28 04:29:10,704 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-28 04:29:10,704 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-28 04:29:10,704 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-28 04:29:10,704 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-28 04:29:10,706 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-28 04:29:10,712 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (23)] Ended with exit code 0 [2024-11-28 04:29:10,712 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-28 04:29:10,712 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 04:29:10,714 INFO L229 MonitoredProcess]: Starting monitored process 24 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-28 04:29:10,716 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (24)] Waiting until timeout for monitored process [2024-11-28 04:29:10,717 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-28 04:29:10,734 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-28 04:29:10,734 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-28 04:29:10,734 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-28 04:29:10,734 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-28 04:29:10,738 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-28 04:29:10,738 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-28 04:29:10,746 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-28 04:29:10,759 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (24)] Ended with exit code 0 [2024-11-28 04:29:10,761 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-28 04:29:10,761 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 04:29:10,763 INFO L229 MonitoredProcess]: Starting monitored process 25 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-28 04:29:10,767 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (25)] Waiting until timeout for monitored process [2024-11-28 04:29:10,768 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-28 04:29:10,785 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-28 04:29:10,785 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-28 04:29:10,785 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-28 04:29:10,785 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-28 04:29:10,787 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-28 04:29:10,787 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-28 04:29:10,792 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-28 04:29:10,803 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (25)] Forceful destruction successful, exit code 0 [2024-11-28 04:29:10,803 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-28 04:29:10,804 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 04:29:10,806 INFO L229 MonitoredProcess]: Starting monitored process 26 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-28 04:29:10,810 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (26)] Waiting until timeout for monitored process [2024-11-28 04:29:10,812 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-28 04:29:10,829 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-28 04:29:10,829 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-28 04:29:10,829 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-28 04:29:10,829 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-28 04:29:10,841 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-28 04:29:10,841 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-28 04:29:10,854 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-28 04:29:10,865 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (26)] Ended with exit code 0 [2024-11-28 04:29:10,865 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-28 04:29:10,866 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 04:29:10,868 INFO L229 MonitoredProcess]: Starting monitored process 27 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-28 04:29:10,874 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-28 04:29:10,874 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (27)] Waiting until timeout for monitored process [2024-11-28 04:29:10,892 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-28 04:29:10,892 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-28 04:29:10,892 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-28 04:29:10,892 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-28 04:29:10,897 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-28 04:29:10,897 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-28 04:29:10,912 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-28 04:29:10,923 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (27)] Ended with exit code 0 [2024-11-28 04:29:10,924 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-28 04:29:10,924 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 04:29:10,926 INFO L229 MonitoredProcess]: Starting monitored process 28 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-28 04:29:10,929 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (28)] Waiting until timeout for monitored process [2024-11-28 04:29:10,931 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-28 04:29:10,949 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-28 04:29:10,949 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-28 04:29:10,949 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-28 04:29:10,949 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-28 04:29:10,953 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-28 04:29:10,954 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-28 04:29:10,962 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-28 04:29:10,973 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (28)] Forceful destruction successful, exit code 0 [2024-11-28 04:29:10,973 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-28 04:29:10,974 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 04:29:10,976 INFO L229 MonitoredProcess]: Starting monitored process 29 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-28 04:29:10,979 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (29)] Waiting until timeout for monitored process [2024-11-28 04:29:10,980 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-28 04:29:10,997 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-28 04:29:10,997 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-28 04:29:10,997 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-28 04:29:10,997 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-28 04:29:11,001 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-28 04:29:11,001 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-28 04:29:11,008 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-28 04:29:11,019 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (29)] Forceful destruction successful, exit code 0 [2024-11-28 04:29:11,020 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-28 04:29:11,020 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 04:29:11,022 INFO L229 MonitoredProcess]: Starting monitored process 30 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-28 04:29:11,026 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (30)] Waiting until timeout for monitored process [2024-11-28 04:29:11,027 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-28 04:29:11,040 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-28 04:29:11,040 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-28 04:29:11,040 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-28 04:29:11,040 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-28 04:29:11,044 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-28 04:29:11,044 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-28 04:29:11,053 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-28 04:29:11,064 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (30)] Ended with exit code 0 [2024-11-28 04:29:11,064 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-28 04:29:11,064 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 04:29:11,067 INFO L229 MonitoredProcess]: Starting monitored process 31 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-28 04:29:11,069 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (31)] Waiting until timeout for monitored process [2024-11-28 04:29:11,070 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-28 04:29:11,083 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-28 04:29:11,084 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-28 04:29:11,084 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-28 04:29:11,084 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-28 04:29:11,090 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-28 04:29:11,090 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-28 04:29:11,098 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-28 04:29:11,109 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (31)] Ended with exit code 0 [2024-11-28 04:29:11,110 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-28 04:29:11,110 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 04:29:11,112 INFO L229 MonitoredProcess]: Starting monitored process 32 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-28 04:29:11,116 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (32)] Waiting until timeout for monitored process [2024-11-28 04:29:11,117 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-28 04:29:11,134 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-28 04:29:11,134 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-28 04:29:11,134 INFO L204 nArgumentSynthesizer]: 2 loop disjuncts [2024-11-28 04:29:11,134 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-28 04:29:11,148 INFO L401 nArgumentSynthesizer]: We have 16 Motzkin's Theorem applications. [2024-11-28 04:29:11,149 INFO L402 nArgumentSynthesizer]: A total of 4 supporting invariants were added. [2024-11-28 04:29:11,180 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2024-11-28 04:29:11,223 INFO L443 ModelExtractionUtils]: Simplification made 14 calls to the SMT solver. [2024-11-28 04:29:11,223 INFO L444 ModelExtractionUtils]: 6 out of 26 variables were initially zero. Simplification set additionally 12 variables to zero. [2024-11-28 04:29:11,224 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-28 04:29:11,224 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 04:29:11,229 INFO L229 MonitoredProcess]: Starting monitored process 33 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-28 04:29:11,231 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (33)] Waiting until timeout for monitored process [2024-11-28 04:29:11,232 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2024-11-28 04:29:11,252 INFO L438 nArgumentSynthesizer]: Removed 2 redundant supporting invariants from a total of 4. [2024-11-28 04:29:11,252 INFO L474 LassoAnalysis]: Proved termination. [2024-11-28 04:29:11,252 INFO L476 LassoAnalysis]: Termination argument consisting of: Ranking function f(v_rep(select (select #memory_int#0 ULTIMATE.start_main_~id~0#1.base) 0)_1, v_rep(select (select #memory_int#2 ULTIMATE.start_main_~tmp~0#1.base) ULTIMATE.start_main_~tmp~0#1.offset)_2) = 1*v_rep(select (select #memory_int#0 ULTIMATE.start_main_~id~0#1.base) 0)_1 + 2*v_rep(select (select #memory_int#2 ULTIMATE.start_main_~tmp~0#1.base) ULTIMATE.start_main_~tmp~0#1.offset)_2 Supporting invariants [1*v_rep(select (select #memory_int#0 ULTIMATE.start_main_~id~0#1.base) ULTIMATE.start_main_~id~0#1.offset)_2 >= 0, 1*v_rep(select (select #memory_int#1 ULTIMATE.start_main_~maxId~0#1.base) ULTIMATE.start_main_~maxId~0#1.offset)_2 - 1 >= 0] [2024-11-28 04:29:11,259 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (32)] Forceful destruction successful, exit code 0 [2024-11-28 04:29:11,381 INFO L156 tatePredicateManager]: 21 out of 24 supporting invariants were superfluous and have been removed [2024-11-28 04:29:11,389 WARN L970 BoogieBacktranslator]: Unfinished Backtranslation: Unknown variable: #memory_int#0 [2024-11-28 04:29:11,389 WARN L970 BoogieBacktranslator]: Unfinished Backtranslation: Cannot backtranslate array access to array IdentifierExpression[#memory_int#0,GLOBAL] [2024-11-28 04:29:11,389 WARN L970 BoogieBacktranslator]: Unfinished Backtranslation: Cannot backtranslate array access to array ArrayAccessExpression[IdentifierExpression[#memory_int#0,GLOBAL],[IdentifierExpression[~id~0!base,]]] [2024-11-28 04:29:11,389 WARN L970 BoogieBacktranslator]: Unfinished Backtranslation: Unknown variable: #memory_int#2 [2024-11-28 04:29:11,390 WARN L970 BoogieBacktranslator]: Unfinished Backtranslation: Cannot backtranslate array access to array IdentifierExpression[#memory_int#2,GLOBAL] [2024-11-28 04:29:11,390 WARN L970 BoogieBacktranslator]: Unfinished Backtranslation: Cannot backtranslate array access to array ArrayAccessExpression[IdentifierExpression[#memory_int#2,GLOBAL],[IdentifierExpression[~tmp~0!base,]]] [2024-11-28 04:29:11,432 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 04:29:11,476 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 04:29:11,477 INFO L256 TraceCheckSpWp]: Trace formula consists of 134 conjuncts, 13 conjuncts are in the unsatisfiable core [2024-11-28 04:29:11,479 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-28 04:29:11,599 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 13 [2024-11-28 04:29:11,685 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 13 [2024-11-28 04:29:11,744 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 04:29:11,745 INFO L256 TraceCheckSpWp]: Trace formula consists of 43 conjuncts, 12 conjuncts are in the unsatisfiable core [2024-11-28 04:29:11,747 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-28 04:29:11,882 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-28 04:29:11,883 INFO L141 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.5 stem predicates 2 loop predicates [2024-11-28 04:29:11,883 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand 19 states and 22 transitions. cyclomatic complexity: 5 Second operand has 8 states, 8 states have (on average 1.75) internal successors, (14), 8 states have internal predecessors, (14), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 04:29:12,104 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand 19 states and 22 transitions. cyclomatic complexity: 5. Second operand has 8 states, 8 states have (on average 1.75) internal successors, (14), 8 states have internal predecessors, (14), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 39 states and 44 transitions. Complement of second has 12 states. [2024-11-28 04:29:12,105 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 9 states 5 stem states 2 non-accepting loop states 2 accepting loop states [2024-11-28 04:29:12,106 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 8 states, 8 states have (on average 1.75) internal successors, (14), 8 states have internal predecessors, (14), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 04:29:12,106 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 21 transitions. [2024-11-28 04:29:12,106 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 9 states and 21 transitions. Stem has 9 letters. Loop has 5 letters. [2024-11-28 04:29:12,107 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2024-11-28 04:29:12,107 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 9 states and 21 transitions. Stem has 14 letters. Loop has 5 letters. [2024-11-28 04:29:12,107 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2024-11-28 04:29:12,107 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 9 states and 21 transitions. Stem has 9 letters. Loop has 10 letters. [2024-11-28 04:29:12,107 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2024-11-28 04:29:12,107 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 39 states and 44 transitions. [2024-11-28 04:29:12,108 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2024-11-28 04:29:12,113 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 39 states to 39 states and 44 transitions. [2024-11-28 04:29:12,113 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 23 [2024-11-28 04:29:12,113 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 25 [2024-11-28 04:29:12,113 INFO L73 IsDeterministic]: Start isDeterministic. Operand 39 states and 44 transitions. [2024-11-28 04:29:12,113 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-11-28 04:29:12,113 INFO L218 hiAutomatonCegarLoop]: Abstraction has 39 states and 44 transitions. [2024-11-28 04:29:12,113 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 39 states and 44 transitions. [2024-11-28 04:29:12,115 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 39 to 24. [2024-11-28 04:29:12,115 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 24 states, 24 states have (on average 1.1666666666666667) internal successors, (28), 23 states have internal predecessors, (28), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 04:29:12,115 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24 states to 24 states and 28 transitions. [2024-11-28 04:29:12,116 INFO L240 hiAutomatonCegarLoop]: Abstraction has 24 states and 28 transitions. [2024-11-28 04:29:12,116 INFO L425 stractBuchiCegarLoop]: Abstraction has 24 states and 28 transitions. [2024-11-28 04:29:12,116 INFO L332 stractBuchiCegarLoop]: ======== Iteration 5 ============ [2024-11-28 04:29:12,116 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 24 states and 28 transitions. [2024-11-28 04:29:12,117 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2024-11-28 04:29:12,117 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-28 04:29:12,117 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-28 04:29:12,117 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [2, 2, 2, 2, 2, 1, 1, 1, 1] [2024-11-28 04:29:12,117 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1] [2024-11-28 04:29:12,118 INFO L747 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~nondet4#1, main_#t~nondet5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~mem8#1, main_#t~short9#1, main_#t~malloc10#1.base, main_#t~malloc10#1.offset, main_#t~mem11#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~nondet14#1, main_#t~short15#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~id~0#1.base, main_~id~0#1.offset, main_~maxId~0#1.base, main_~maxId~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~id~0#1.base, main_~id~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~maxId~0#1.base, main_~maxId~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset;havoc main_#t~nondet4#1;call write~int#0(main_#t~nondet4#1, main_~id~0#1.base, main_~id~0#1.offset, 4);havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;call write~int#1(main_#t~nondet5#1, main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);havoc main_#t~nondet5#1;call main_#t~mem6#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short9#1 := 0 <= main_#t~mem6#1;" "assume main_#t~short9#1;call main_#t~mem7#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);call main_#t~mem8#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);main_#t~short9#1 := main_#t~mem7#1 < main_#t~mem8#1;" "assume main_#t~short9#1;havoc main_#t~mem6#1;havoc main_#t~mem7#1;havoc main_#t~mem8#1;havoc main_#t~short9#1;call main_#t~malloc10#1.base, main_#t~malloc10#1.offset := #Ultimate.allocOnStack(4);main_~tmp~0#1.base, main_~tmp~0#1.offset := main_#t~malloc10#1.base, main_#t~malloc10#1.offset;call main_#t~mem11#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);call write~int#2(1 + main_#t~mem11#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem11#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" [2024-11-28 04:29:12,118 INFO L749 eck$LassoCheckResult]: Loop: "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#2(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);" [2024-11-28 04:29:12,118 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 04:29:12,119 INFO L85 PathProgramCache]: Analyzing trace with hash 1012377449, now seen corresponding path program 2 times [2024-11-28 04:29:12,119 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM [2024-11-28 04:29:12,119 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [817999502] [2024-11-28 04:29:12,119 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 04:29:12,119 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 04:29:12,175 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-28 04:29:12,175 INFO L357 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-28 04:29:12,204 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-28 04:29:12,211 INFO L130 FreeRefinementEngine]: Strategy CAMEL_NO_AM found a feasible trace [2024-11-28 04:29:12,214 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 04:29:12,215 INFO L85 PathProgramCache]: Analyzing trace with hash 43042169, now seen corresponding path program 5 times [2024-11-28 04:29:12,216 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM [2024-11-28 04:29:12,216 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1553242330] [2024-11-28 04:29:12,216 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 04:29:12,216 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 04:29:12,224 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-28 04:29:12,225 INFO L357 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-28 04:29:12,231 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-28 04:29:12,234 INFO L130 FreeRefinementEngine]: Strategy CAMEL_NO_AM found a feasible trace [2024-11-28 04:29:12,236 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 04:29:12,236 INFO L85 PathProgramCache]: Analyzing trace with hash -1889435887, now seen corresponding path program 2 times [2024-11-28 04:29:12,236 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM [2024-11-28 04:29:12,236 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1951524764] [2024-11-28 04:29:12,237 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 04:29:12,237 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 04:29:12,281 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-28 04:29:12,281 INFO L357 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-28 04:29:12,311 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-28 04:29:12,321 INFO L130 FreeRefinementEngine]: Strategy CAMEL_NO_AM found a feasible trace [2024-11-28 04:29:13,411 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (33)] Ended with exit code 0 [2024-11-28 04:29:13,828 INFO L204 LassoAnalysis]: Preferences: [2024-11-28 04:29:13,829 INFO L125 ssoRankerPreferences]: Compute integeral hull: false [2024-11-28 04:29:13,829 INFO L126 ssoRankerPreferences]: Enable LassoPartitioneer: true [2024-11-28 04:29:13,829 INFO L127 ssoRankerPreferences]: Term annotations enabled: false [2024-11-28 04:29:13,829 INFO L128 ssoRankerPreferences]: Use exernal solver: false [2024-11-28 04:29:13,829 INFO L129 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-28 04:29:13,829 INFO L130 ssoRankerPreferences]: Dump SMT script to file: false [2024-11-28 04:29:13,829 INFO L131 ssoRankerPreferences]: Path of dumped script: [2024-11-28 04:29:13,829 INFO L132 ssoRankerPreferences]: Filename of dumped script: GulwaniJainKoskinen-2009PLDI-Fig1-alloca-2.i_Iteration5_Lasso [2024-11-28 04:29:13,829 INFO L133 ssoRankerPreferences]: MapElimAlgo: Frank [2024-11-28 04:29:13,829 INFO L241 LassoAnalysis]: Starting lasso preprocessing... [2024-11-28 04:29:13,832 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-28 04:29:13,836 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-28 04:29:14,356 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-28 04:29:14,360 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-28 04:29:14,362 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-28 04:29:14,365 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-28 04:29:14,367 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-28 04:29:14,370 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-28 04:29:14,373 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-28 04:29:14,376 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-28 04:29:14,378 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-28 04:29:14,381 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-28 04:29:14,385 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-28 04:29:14,387 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-28 04:29:14,390 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-28 04:29:14,394 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-28 04:29:14,397 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-28 04:29:14,399 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-28 04:29:14,402 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-28 04:29:14,404 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-28 04:29:14,812 INFO L259 LassoAnalysis]: Preprocessing complete. [2024-11-28 04:29:14,812 INFO L451 LassoAnalysis]: Using template 'affine'. [2024-11-28 04:29:14,813 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-28 04:29:14,813 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 04:29:14,821 INFO L229 MonitoredProcess]: Starting monitored process 34 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-28 04:29:14,822 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (34)] Waiting until timeout for monitored process [2024-11-28 04:29:14,824 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-28 04:29:14,837 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-28 04:29:14,837 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-28 04:29:14,837 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-28 04:29:14,837 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-28 04:29:14,837 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-28 04:29:14,838 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-28 04:29:14,838 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-28 04:29:14,839 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-28 04:29:14,844 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (34)] Forceful destruction successful, exit code 0 [2024-11-28 04:29:14,845 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-28 04:29:14,845 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 04:29:14,846 INFO L229 MonitoredProcess]: Starting monitored process 35 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-28 04:29:14,847 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (35)] Waiting until timeout for monitored process [2024-11-28 04:29:14,849 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-28 04:29:14,860 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-28 04:29:14,860 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-28 04:29:14,860 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-28 04:29:14,860 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-28 04:29:14,863 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-28 04:29:14,863 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-28 04:29:14,872 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-28 04:29:14,879 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (35)] Ended with exit code 0 [2024-11-28 04:29:14,880 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-28 04:29:14,880 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 04:29:14,881 INFO L229 MonitoredProcess]: Starting monitored process 36 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-28 04:29:14,883 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (36)] Waiting until timeout for monitored process [2024-11-28 04:29:14,884 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-28 04:29:14,895 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-28 04:29:14,895 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-28 04:29:14,895 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-28 04:29:14,895 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-28 04:29:14,898 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-28 04:29:14,898 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-28 04:29:14,903 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-28 04:29:14,910 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (36)] Ended with exit code 0 [2024-11-28 04:29:14,911 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-28 04:29:14,911 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 04:29:14,912 INFO L229 MonitoredProcess]: Starting monitored process 37 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-28 04:29:14,913 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (37)] Waiting until timeout for monitored process [2024-11-28 04:29:14,915 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-28 04:29:14,926 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-28 04:29:14,926 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-28 04:29:14,926 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-28 04:29:14,926 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-28 04:29:14,930 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-28 04:29:14,930 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-28 04:29:14,937 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-28 04:29:14,947 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (37)] Ended with exit code 0 [2024-11-28 04:29:14,947 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-28 04:29:14,947 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 04:29:14,950 INFO L229 MonitoredProcess]: Starting monitored process 38 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-28 04:29:14,952 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (38)] Waiting until timeout for monitored process [2024-11-28 04:29:14,954 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-28 04:29:14,967 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-28 04:29:14,967 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-28 04:29:14,967 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-28 04:29:14,967 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-28 04:29:14,970 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-28 04:29:14,970 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-28 04:29:14,976 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-28 04:29:14,986 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (38)] Ended with exit code 0 [2024-11-28 04:29:14,986 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-28 04:29:14,987 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 04:29:14,990 INFO L229 MonitoredProcess]: Starting monitored process 39 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-28 04:29:14,993 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (39)] Waiting until timeout for monitored process [2024-11-28 04:29:14,993 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-28 04:29:15,005 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-28 04:29:15,005 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-28 04:29:15,005 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-28 04:29:15,005 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-28 04:29:15,007 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-28 04:29:15,007 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-28 04:29:15,010 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-28 04:29:15,017 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (39)] Forceful destruction successful, exit code 0 [2024-11-28 04:29:15,017 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-28 04:29:15,018 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 04:29:15,019 INFO L229 MonitoredProcess]: Starting monitored process 40 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-28 04:29:15,020 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (40)] Waiting until timeout for monitored process [2024-11-28 04:29:15,022 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-28 04:29:15,033 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-28 04:29:15,033 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-28 04:29:15,034 INFO L204 nArgumentSynthesizer]: 2 loop disjuncts [2024-11-28 04:29:15,034 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-28 04:29:15,047 INFO L401 nArgumentSynthesizer]: We have 16 Motzkin's Theorem applications. [2024-11-28 04:29:15,047 INFO L402 nArgumentSynthesizer]: A total of 4 supporting invariants were added. [2024-11-28 04:29:15,075 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2024-11-28 04:29:15,153 INFO L443 ModelExtractionUtils]: Simplification made 24 calls to the SMT solver. [2024-11-28 04:29:15,153 INFO L444 ModelExtractionUtils]: 2 out of 31 variables were initially zero. Simplification set additionally 21 variables to zero. [2024-11-28 04:29:15,153 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-28 04:29:15,153 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 04:29:15,158 INFO L229 MonitoredProcess]: Starting monitored process 41 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-28 04:29:15,161 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (41)] Waiting until timeout for monitored process [2024-11-28 04:29:15,162 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2024-11-28 04:29:15,179 INFO L438 nArgumentSynthesizer]: Removed 2 redundant supporting invariants from a total of 4. [2024-11-28 04:29:15,179 INFO L474 LassoAnalysis]: Proved termination. [2024-11-28 04:29:15,179 INFO L476 LassoAnalysis]: Termination argument consisting of: Ranking function f(v_rep(select (select #memory_int#2 ULTIMATE.start_main_~tmp~0#1.base) 0)_2, v_rep(select (select #memory_int#1 ULTIMATE.start_main_~maxId~0#1.base) 0)_1) = 1*v_rep(select (select #memory_int#2 ULTIMATE.start_main_~tmp~0#1.base) 0)_2 - 1*v_rep(select (select #memory_int#1 ULTIMATE.start_main_~maxId~0#1.base) 0)_1 + 1 Supporting invariants [1*v_rep(select (select #memory_int#1 ULTIMATE.start_main_~maxId~0#1.base) 0)_1 - 2 >= 0, 1*v_rep(select (select #memory_int#1 ULTIMATE.start_main_~maxId~0#1.base) ULTIMATE.start_main_~maxId~0#1.offset)_3 - 2 >= 0] [2024-11-28 04:29:15,187 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (40)] Forceful destruction successful, exit code 0 [2024-11-28 04:29:15,272 INFO L156 tatePredicateManager]: 22 out of 25 supporting invariants were superfluous and have been removed [2024-11-28 04:29:15,278 WARN L970 BoogieBacktranslator]: Unfinished Backtranslation: Unknown variable: #memory_int#2 [2024-11-28 04:29:15,278 WARN L970 BoogieBacktranslator]: Unfinished Backtranslation: Cannot backtranslate array access to array IdentifierExpression[#memory_int#2,GLOBAL] [2024-11-28 04:29:15,278 WARN L970 BoogieBacktranslator]: Unfinished Backtranslation: Cannot backtranslate array access to array ArrayAccessExpression[IdentifierExpression[#memory_int#2,GLOBAL],[IdentifierExpression[~tmp~0!base,]]] [2024-11-28 04:29:15,278 WARN L970 BoogieBacktranslator]: Unfinished Backtranslation: Unknown variable: #memory_int#1 [2024-11-28 04:29:15,278 WARN L970 BoogieBacktranslator]: Unfinished Backtranslation: Cannot backtranslate array access to array IdentifierExpression[#memory_int#1,GLOBAL] [2024-11-28 04:29:15,278 WARN L970 BoogieBacktranslator]: Unfinished Backtranslation: Cannot backtranslate array access to array ArrayAccessExpression[IdentifierExpression[#memory_int#1,GLOBAL],[IdentifierExpression[~maxId~0!base,]]] [2024-11-28 04:29:15,310 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (41)] Ended with exit code 0 [2024-11-28 04:29:15,330 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 04:29:15,366 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 04:29:15,367 INFO L256 TraceCheckSpWp]: Trace formula consists of 171 conjuncts, 18 conjuncts are in the unsatisfiable core [2024-11-28 04:29:15,369 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-28 04:29:15,451 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 17 [2024-11-28 04:29:15,456 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 1 [2024-11-28 04:29:15,522 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 13 [2024-11-28 04:29:15,581 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2024-11-28 04:29:15,622 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 04:29:15,622 INFO L256 TraceCheckSpWp]: Trace formula consists of 44 conjuncts, 13 conjuncts are in the unsatisfiable core [2024-11-28 04:29:15,623 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-28 04:29:15,725 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-28 04:29:15,725 INFO L141 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.6 stem predicates 2 loop predicates [2024-11-28 04:29:15,726 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand 24 states and 28 transitions. cyclomatic complexity: 6 Second operand has 9 states, 9 states have (on average 2.111111111111111) internal successors, (19), 9 states have internal predecessors, (19), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 04:29:15,851 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand 24 states and 28 transitions. cyclomatic complexity: 6. Second operand has 9 states, 9 states have (on average 2.111111111111111) internal successors, (19), 9 states have internal predecessors, (19), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 41 states and 46 transitions. Complement of second has 6 states. [2024-11-28 04:29:15,852 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 5 states 4 stem states 0 non-accepting loop states 1 accepting loop states [2024-11-28 04:29:15,852 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 9 states, 9 states have (on average 2.111111111111111) internal successors, (19), 9 states have internal predecessors, (19), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 04:29:15,853 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 16 transitions. [2024-11-28 04:29:15,853 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 5 states and 16 transitions. Stem has 14 letters. Loop has 5 letters. [2024-11-28 04:29:15,853 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2024-11-28 04:29:15,853 INFO L682 stractBuchiCegarLoop]: Bad chosen interpolant automaton: word not accepted [2024-11-28 04:29:15,886 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 04:29:15,928 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 04:29:15,929 INFO L256 TraceCheckSpWp]: Trace formula consists of 171 conjuncts, 18 conjuncts are in the unsatisfiable core [2024-11-28 04:29:15,931 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-28 04:29:16,005 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 17 [2024-11-28 04:29:16,009 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 1 [2024-11-28 04:29:16,086 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 13 [2024-11-28 04:29:16,150 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2024-11-28 04:29:16,201 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 04:29:16,203 INFO L256 TraceCheckSpWp]: Trace formula consists of 44 conjuncts, 13 conjuncts are in the unsatisfiable core [2024-11-28 04:29:16,204 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-28 04:29:16,291 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-28 04:29:16,291 INFO L141 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and with honda bouncer for loop.6 stem predicates 2 loop predicates [2024-11-28 04:29:16,292 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand 24 states and 28 transitions. cyclomatic complexity: 6 Second operand has 9 states, 9 states have (on average 2.111111111111111) internal successors, (19), 9 states have internal predecessors, (19), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 04:29:16,394 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand 24 states and 28 transitions. cyclomatic complexity: 6. Second operand has 9 states, 9 states have (on average 2.111111111111111) internal successors, (19), 9 states have internal predecessors, (19), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 41 states and 46 transitions. Complement of second has 6 states. [2024-11-28 04:29:16,394 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 5 states 4 stem states 0 non-accepting loop states 1 accepting loop states [2024-11-28 04:29:16,395 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 9 states, 9 states have (on average 2.111111111111111) internal successors, (19), 9 states have internal predecessors, (19), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 04:29:16,395 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 16 transitions. [2024-11-28 04:29:16,395 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 5 states and 16 transitions. Stem has 14 letters. Loop has 5 letters. [2024-11-28 04:29:16,396 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2024-11-28 04:29:16,396 INFO L682 stractBuchiCegarLoop]: Bad chosen interpolant automaton: word not accepted [2024-11-28 04:29:16,423 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 04:29:16,460 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 04:29:16,461 INFO L256 TraceCheckSpWp]: Trace formula consists of 171 conjuncts, 18 conjuncts are in the unsatisfiable core [2024-11-28 04:29:16,463 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-28 04:29:16,530 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 17 [2024-11-28 04:29:16,535 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 1 [2024-11-28 04:29:16,604 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 13 [2024-11-28 04:29:16,666 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2024-11-28 04:29:16,703 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 04:29:16,703 INFO L256 TraceCheckSpWp]: Trace formula consists of 44 conjuncts, 13 conjuncts are in the unsatisfiable core [2024-11-28 04:29:16,704 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-28 04:29:16,794 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-28 04:29:16,795 INFO L141 lantAutomatonBouncer]: Defining Buchi interpolant automaton with scrooge nondeterminism in stemwith honda bouncer for stem and without honda bouncer for loop.6 stem predicates 2 loop predicates [2024-11-28 04:29:16,795 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand 24 states and 28 transitions. cyclomatic complexity: 6 Second operand has 9 states, 9 states have (on average 2.111111111111111) internal successors, (19), 9 states have internal predecessors, (19), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 04:29:17,063 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand 24 states and 28 transitions. cyclomatic complexity: 6. Second operand has 9 states, 9 states have (on average 2.111111111111111) internal successors, (19), 9 states have internal predecessors, (19), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 56 states and 62 transitions. Complement of second has 18 states. [2024-11-28 04:29:17,066 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 10 states 6 stem states 2 non-accepting loop states 2 accepting loop states [2024-11-28 04:29:17,067 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 9 states, 9 states have (on average 2.111111111111111) internal successors, (19), 9 states have internal predecessors, (19), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 04:29:17,067 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10 states to 10 states and 30 transitions. [2024-11-28 04:29:17,067 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 10 states and 30 transitions. Stem has 14 letters. Loop has 5 letters. [2024-11-28 04:29:17,067 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2024-11-28 04:29:17,067 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 10 states and 30 transitions. Stem has 19 letters. Loop has 5 letters. [2024-11-28 04:29:17,067 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2024-11-28 04:29:17,067 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 10 states and 30 transitions. Stem has 14 letters. Loop has 10 letters. [2024-11-28 04:29:17,068 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2024-11-28 04:29:17,068 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 56 states and 62 transitions. [2024-11-28 04:29:17,069 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2024-11-28 04:29:17,073 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 56 states to 56 states and 62 transitions. [2024-11-28 04:29:17,074 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 30 [2024-11-28 04:29:17,074 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 34 [2024-11-28 04:29:17,074 INFO L73 IsDeterministic]: Start isDeterministic. Operand 56 states and 62 transitions. [2024-11-28 04:29:17,074 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-11-28 04:29:17,074 INFO L218 hiAutomatonCegarLoop]: Abstraction has 56 states and 62 transitions. [2024-11-28 04:29:17,074 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 56 states and 62 transitions. [2024-11-28 04:29:17,075 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 56 to 23. [2024-11-28 04:29:17,076 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 23 states, 23 states have (on average 1.1304347826086956) internal successors, (26), 22 states have internal predecessors, (26), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 04:29:17,076 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23 states to 23 states and 26 transitions. [2024-11-28 04:29:17,076 INFO L240 hiAutomatonCegarLoop]: Abstraction has 23 states and 26 transitions. [2024-11-28 04:29:17,076 INFO L425 stractBuchiCegarLoop]: Abstraction has 23 states and 26 transitions. [2024-11-28 04:29:17,076 INFO L332 stractBuchiCegarLoop]: ======== Iteration 6 ============ [2024-11-28 04:29:17,076 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 23 states and 26 transitions. [2024-11-28 04:29:17,077 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 10 [2024-11-28 04:29:17,077 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-28 04:29:17,077 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-28 04:29:17,077 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1] [2024-11-28 04:29:17,077 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1] [2024-11-28 04:29:17,077 INFO L747 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~nondet4#1, main_#t~nondet5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~mem8#1, main_#t~short9#1, main_#t~malloc10#1.base, main_#t~malloc10#1.offset, main_#t~mem11#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~nondet14#1, main_#t~short15#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~id~0#1.base, main_~id~0#1.offset, main_~maxId~0#1.base, main_~maxId~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~id~0#1.base, main_~id~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~maxId~0#1.base, main_~maxId~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset;havoc main_#t~nondet4#1;call write~int#0(main_#t~nondet4#1, main_~id~0#1.base, main_~id~0#1.offset, 4);havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;call write~int#1(main_#t~nondet5#1, main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);havoc main_#t~nondet5#1;call main_#t~mem6#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short9#1 := 0 <= main_#t~mem6#1;" "assume main_#t~short9#1;call main_#t~mem7#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);call main_#t~mem8#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);main_#t~short9#1 := main_#t~mem7#1 < main_#t~mem8#1;" "assume main_#t~short9#1;havoc main_#t~mem6#1;havoc main_#t~mem7#1;havoc main_#t~mem8#1;havoc main_#t~short9#1;call main_#t~malloc10#1.base, main_#t~malloc10#1.offset := #Ultimate.allocOnStack(4);main_~tmp~0#1.base, main_~tmp~0#1.offset := main_#t~malloc10#1.base, main_#t~malloc10#1.offset;call main_#t~mem11#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);call write~int#2(1 + main_#t~mem11#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem11#1;" [2024-11-28 04:29:17,078 INFO L749 eck$LassoCheckResult]: Loop: "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" [2024-11-28 04:29:17,078 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 04:29:17,078 INFO L85 PathProgramCache]: Analyzing trace with hash 925609, now seen corresponding path program 2 times [2024-11-28 04:29:17,078 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM [2024-11-28 04:29:17,078 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [466333594] [2024-11-28 04:29:17,078 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 04:29:17,079 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 04:29:17,093 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-28 04:29:17,093 INFO L357 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-28 04:29:17,100 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-28 04:29:17,103 INFO L130 FreeRefinementEngine]: Strategy CAMEL_NO_AM found a feasible trace [2024-11-28 04:29:17,103 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 04:29:17,104 INFO L85 PathProgramCache]: Analyzing trace with hash 43042167, now seen corresponding path program 1 times [2024-11-28 04:29:17,104 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM [2024-11-28 04:29:17,104 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2005848193] [2024-11-28 04:29:17,104 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 04:29:17,104 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 04:29:17,111 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-28 04:29:17,111 INFO L357 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-28 04:29:17,114 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-28 04:29:17,116 INFO L130 FreeRefinementEngine]: Strategy CAMEL_NO_AM found a feasible trace [2024-11-28 04:29:17,117 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 04:29:17,117 INFO L85 PathProgramCache]: Analyzing trace with hash -533975345, now seen corresponding path program 3 times [2024-11-28 04:29:17,117 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM [2024-11-28 04:29:17,117 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1451197919] [2024-11-28 04:29:17,117 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 04:29:17,118 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 04:29:17,132 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-28 04:29:17,132 INFO L357 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-28 04:29:17,142 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-28 04:29:17,145 INFO L130 FreeRefinementEngine]: Strategy CAMEL_NO_AM found a feasible trace [2024-11-28 04:29:18,165 INFO L204 LassoAnalysis]: Preferences: [2024-11-28 04:29:18,166 INFO L125 ssoRankerPreferences]: Compute integeral hull: false [2024-11-28 04:29:18,166 INFO L126 ssoRankerPreferences]: Enable LassoPartitioneer: true [2024-11-28 04:29:18,166 INFO L127 ssoRankerPreferences]: Term annotations enabled: false [2024-11-28 04:29:18,166 INFO L128 ssoRankerPreferences]: Use exernal solver: false [2024-11-28 04:29:18,166 INFO L129 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-28 04:29:18,166 INFO L130 ssoRankerPreferences]: Dump SMT script to file: false [2024-11-28 04:29:18,166 INFO L131 ssoRankerPreferences]: Path of dumped script: [2024-11-28 04:29:18,166 INFO L132 ssoRankerPreferences]: Filename of dumped script: GulwaniJainKoskinen-2009PLDI-Fig1-alloca-2.i_Iteration6_Lasso [2024-11-28 04:29:18,166 INFO L133 ssoRankerPreferences]: MapElimAlgo: Frank [2024-11-28 04:29:18,166 INFO L241 LassoAnalysis]: Starting lasso preprocessing... [2024-11-28 04:29:18,169 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-28 04:29:18,553 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-28 04:29:18,555 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-28 04:29:18,557 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-28 04:29:18,562 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-28 04:29:18,564 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-28 04:29:18,566 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-28 04:29:18,568 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-28 04:29:18,570 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-28 04:29:18,572 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-28 04:29:18,574 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-28 04:29:18,578 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-28 04:29:18,580 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-28 04:29:18,584 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-28 04:29:18,587 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-28 04:29:18,589 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-28 04:29:18,593 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-28 04:29:18,595 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-28 04:29:18,598 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-28 04:29:18,600 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-28 04:29:19,021 INFO L259 LassoAnalysis]: Preprocessing complete. [2024-11-28 04:29:19,021 INFO L451 LassoAnalysis]: Using template 'affine'. [2024-11-28 04:29:19,022 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-28 04:29:19,022 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 04:29:19,024 INFO L229 MonitoredProcess]: Starting monitored process 42 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-28 04:29:19,026 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (42)] Waiting until timeout for monitored process [2024-11-28 04:29:19,027 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-28 04:29:19,039 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-28 04:29:19,039 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-28 04:29:19,039 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-28 04:29:19,039 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-28 04:29:19,042 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-28 04:29:19,042 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-28 04:29:19,048 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-28 04:29:19,056 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (42)] Ended with exit code 0 [2024-11-28 04:29:19,056 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-28 04:29:19,056 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 04:29:19,058 INFO L229 MonitoredProcess]: Starting monitored process 43 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-28 04:29:19,059 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (43)] Waiting until timeout for monitored process [2024-11-28 04:29:19,060 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-28 04:29:19,076 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-28 04:29:19,076 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-28 04:29:19,077 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-28 04:29:19,077 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-28 04:29:19,080 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-28 04:29:19,080 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-28 04:29:19,086 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-28 04:29:19,093 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (43)] Ended with exit code 0 [2024-11-28 04:29:19,093 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-28 04:29:19,093 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 04:29:19,095 INFO L229 MonitoredProcess]: Starting monitored process 44 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-28 04:29:19,098 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (44)] Waiting until timeout for monitored process [2024-11-28 04:29:19,099 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-28 04:29:19,112 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-28 04:29:19,112 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-28 04:29:19,112 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-28 04:29:19,112 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-28 04:29:19,115 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-28 04:29:19,115 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-28 04:29:19,122 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-28 04:29:19,128 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (44)] Ended with exit code 0 [2024-11-28 04:29:19,128 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-28 04:29:19,129 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 04:29:19,130 INFO L229 MonitoredProcess]: Starting monitored process 45 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-28 04:29:19,131 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (45)] Waiting until timeout for monitored process [2024-11-28 04:29:19,133 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-28 04:29:19,145 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-28 04:29:19,145 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-28 04:29:19,145 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-28 04:29:19,145 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-28 04:29:19,146 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-28 04:29:19,147 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-28 04:29:19,150 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-28 04:29:19,156 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (45)] Forceful destruction successful, exit code 0 [2024-11-28 04:29:19,156 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-28 04:29:19,156 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 04:29:19,158 INFO L229 MonitoredProcess]: Starting monitored process 46 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-28 04:29:19,160 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (46)] Waiting until timeout for monitored process [2024-11-28 04:29:19,161 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-28 04:29:19,173 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-28 04:29:19,173 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-28 04:29:19,173 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-28 04:29:19,173 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-28 04:29:19,178 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-28 04:29:19,178 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-28 04:29:19,186 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-28 04:29:19,192 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (46)] Forceful destruction successful, exit code 0 [2024-11-28 04:29:19,193 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-28 04:29:19,193 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 04:29:19,197 INFO L229 MonitoredProcess]: Starting monitored process 47 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-28 04:29:19,200 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (47)] Waiting until timeout for monitored process [2024-11-28 04:29:19,200 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-28 04:29:19,212 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-28 04:29:19,212 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-28 04:29:19,212 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-28 04:29:19,213 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-28 04:29:19,215 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-28 04:29:19,215 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-28 04:29:19,220 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-28 04:29:19,227 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (47)] Ended with exit code 0 [2024-11-28 04:29:19,227 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-28 04:29:19,227 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 04:29:19,229 INFO L229 MonitoredProcess]: Starting monitored process 48 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-28 04:29:19,230 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (48)] Waiting until timeout for monitored process [2024-11-28 04:29:19,231 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-28 04:29:19,243 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-28 04:29:19,243 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-28 04:29:19,243 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-28 04:29:19,243 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-28 04:29:19,246 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-28 04:29:19,246 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-28 04:29:19,251 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-28 04:29:19,256 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (48)] Ended with exit code 0 [2024-11-28 04:29:19,257 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-28 04:29:19,257 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 04:29:19,258 INFO L229 MonitoredProcess]: Starting monitored process 49 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-28 04:29:19,260 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (49)] Waiting until timeout for monitored process [2024-11-28 04:29:19,261 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-28 04:29:19,273 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-28 04:29:19,273 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-28 04:29:19,273 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-28 04:29:19,273 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-28 04:29:19,276 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-28 04:29:19,276 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-28 04:29:19,282 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-28 04:29:19,288 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (49)] Ended with exit code 0 [2024-11-28 04:29:19,288 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-28 04:29:19,288 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 04:29:19,290 INFO L229 MonitoredProcess]: Starting monitored process 50 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-28 04:29:19,291 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (50)] Waiting until timeout for monitored process [2024-11-28 04:29:19,293 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-28 04:29:19,305 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-28 04:29:19,305 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-28 04:29:19,305 INFO L204 nArgumentSynthesizer]: 2 loop disjuncts [2024-11-28 04:29:19,305 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-28 04:29:19,315 INFO L401 nArgumentSynthesizer]: We have 16 Motzkin's Theorem applications. [2024-11-28 04:29:19,315 INFO L402 nArgumentSynthesizer]: A total of 4 supporting invariants were added. [2024-11-28 04:29:19,338 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2024-11-28 04:29:19,377 INFO L443 ModelExtractionUtils]: Simplification made 15 calls to the SMT solver. [2024-11-28 04:29:19,377 INFO L444 ModelExtractionUtils]: 5 out of 26 variables were initially zero. Simplification set additionally 18 variables to zero. [2024-11-28 04:29:19,377 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-28 04:29:19,377 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 04:29:19,379 INFO L229 MonitoredProcess]: Starting monitored process 51 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-28 04:29:19,380 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (51)] Waiting until timeout for monitored process [2024-11-28 04:29:19,381 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2024-11-28 04:29:19,395 INFO L438 nArgumentSynthesizer]: Removed 4 redundant supporting invariants from a total of 4. [2024-11-28 04:29:19,395 INFO L474 LassoAnalysis]: Proved termination. [2024-11-28 04:29:19,396 INFO L476 LassoAnalysis]: Termination argument consisting of: Ranking function f(v_rep(select (select #memory_int#1 ULTIMATE.start_main_~maxId~0#1.base) ULTIMATE.start_main_~maxId~0#1.offset)_4, v_rep(select (select #memory_int#2 ULTIMATE.start_main_~tmp~0#1.base) ULTIMATE.start_main_~tmp~0#1.offset)_4) = 1*v_rep(select (select #memory_int#1 ULTIMATE.start_main_~maxId~0#1.base) ULTIMATE.start_main_~maxId~0#1.offset)_4 - 1*v_rep(select (select #memory_int#2 ULTIMATE.start_main_~tmp~0#1.base) ULTIMATE.start_main_~tmp~0#1.offset)_4 Supporting invariants [] [2024-11-28 04:29:19,403 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (50)] Ended with exit code 0 [2024-11-28 04:29:19,486 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (51)] Ended with exit code 0 [2024-11-28 04:29:19,505 INFO L156 tatePredicateManager]: 22 out of 22 supporting invariants were superfluous and have been removed [2024-11-28 04:29:19,506 WARN L970 BoogieBacktranslator]: Unfinished Backtranslation: Unknown variable: #memory_int#1 [2024-11-28 04:29:19,506 WARN L970 BoogieBacktranslator]: Unfinished Backtranslation: Cannot backtranslate array access to array IdentifierExpression[#memory_int#1,GLOBAL] [2024-11-28 04:29:19,506 WARN L970 BoogieBacktranslator]: Unfinished Backtranslation: Cannot backtranslate array access to array ArrayAccessExpression[IdentifierExpression[#memory_int#1,GLOBAL],[IdentifierExpression[~maxId~0!base,]]] [2024-11-28 04:29:19,506 WARN L970 BoogieBacktranslator]: Unfinished Backtranslation: Unknown variable: #memory_int#2 [2024-11-28 04:29:19,507 WARN L970 BoogieBacktranslator]: Unfinished Backtranslation: Cannot backtranslate array access to array IdentifierExpression[#memory_int#2,GLOBAL] [2024-11-28 04:29:19,507 WARN L970 BoogieBacktranslator]: Unfinished Backtranslation: Cannot backtranslate array access to array ArrayAccessExpression[IdentifierExpression[#memory_int#2,GLOBAL],[IdentifierExpression[~tmp~0!base,]]] [2024-11-28 04:29:19,519 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 04:29:19,547 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 04:29:19,547 INFO L256 TraceCheckSpWp]: Trace formula consists of 97 conjuncts, 2 conjuncts are in the unsatisfiable core [2024-11-28 04:29:19,548 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-28 04:29:19,564 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 04:29:19,565 INFO L256 TraceCheckSpWp]: Trace formula consists of 39 conjuncts, 7 conjuncts are in the unsatisfiable core [2024-11-28 04:29:19,565 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-28 04:29:19,594 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-28 04:29:19,594 INFO L141 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.1 stem predicates 2 loop predicates [2024-11-28 04:29:19,594 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand 23 states and 26 transitions. cyclomatic complexity: 6 Second operand has 4 states, 4 states have (on average 2.25) internal successors, (9), 4 states have internal predecessors, (9), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 04:29:19,621 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand 23 states and 26 transitions. cyclomatic complexity: 6. Second operand has 4 states, 4 states have (on average 2.25) internal successors, (9), 4 states have internal predecessors, (9), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 36 states and 42 transitions. Complement of second has 7 states. [2024-11-28 04:29:19,623 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 4 states 1 stem states 2 non-accepting loop states 1 accepting loop states [2024-11-28 04:29:19,624 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 2.25) internal successors, (9), 4 states have internal predecessors, (9), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 04:29:19,624 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 9 transitions. [2024-11-28 04:29:19,624 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 4 states and 9 transitions. Stem has 4 letters. Loop has 5 letters. [2024-11-28 04:29:19,625 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2024-11-28 04:29:19,625 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 4 states and 9 transitions. Stem has 9 letters. Loop has 5 letters. [2024-11-28 04:29:19,625 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2024-11-28 04:29:19,625 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 4 states and 9 transitions. Stem has 4 letters. Loop has 10 letters. [2024-11-28 04:29:19,625 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2024-11-28 04:29:19,625 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 36 states and 42 transitions. [2024-11-28 04:29:19,627 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2024-11-28 04:29:19,627 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 36 states to 28 states and 32 transitions. [2024-11-28 04:29:19,628 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 14 [2024-11-28 04:29:19,628 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 14 [2024-11-28 04:29:19,628 INFO L73 IsDeterministic]: Start isDeterministic. Operand 28 states and 32 transitions. [2024-11-28 04:29:19,628 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-11-28 04:29:19,628 INFO L218 hiAutomatonCegarLoop]: Abstraction has 28 states and 32 transitions. [2024-11-28 04:29:19,628 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28 states and 32 transitions. [2024-11-28 04:29:19,630 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28 to 24. [2024-11-28 04:29:19,630 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 24 states, 24 states have (on average 1.1666666666666667) internal successors, (28), 23 states have internal predecessors, (28), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 04:29:19,630 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24 states to 24 states and 28 transitions. [2024-11-28 04:29:19,631 INFO L240 hiAutomatonCegarLoop]: Abstraction has 24 states and 28 transitions. [2024-11-28 04:29:19,631 INFO L425 stractBuchiCegarLoop]: Abstraction has 24 states and 28 transitions. [2024-11-28 04:29:19,631 INFO L332 stractBuchiCegarLoop]: ======== Iteration 7 ============ [2024-11-28 04:29:19,631 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 24 states and 28 transitions. [2024-11-28 04:29:19,632 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2024-11-28 04:29:19,632 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-28 04:29:19,632 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-28 04:29:19,632 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1] [2024-11-28 04:29:19,632 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1] [2024-11-28 04:29:19,633 INFO L747 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~nondet4#1, main_#t~nondet5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~mem8#1, main_#t~short9#1, main_#t~malloc10#1.base, main_#t~malloc10#1.offset, main_#t~mem11#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~nondet14#1, main_#t~short15#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~id~0#1.base, main_~id~0#1.offset, main_~maxId~0#1.base, main_~maxId~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~id~0#1.base, main_~id~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~maxId~0#1.base, main_~maxId~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset;havoc main_#t~nondet4#1;call write~int#0(main_#t~nondet4#1, main_~id~0#1.base, main_~id~0#1.offset, 4);havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;call write~int#1(main_#t~nondet5#1, main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);havoc main_#t~nondet5#1;call main_#t~mem6#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short9#1 := 0 <= main_#t~mem6#1;" "assume main_#t~short9#1;call main_#t~mem7#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);call main_#t~mem8#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);main_#t~short9#1 := main_#t~mem7#1 < main_#t~mem8#1;" "assume main_#t~short9#1;havoc main_#t~mem6#1;havoc main_#t~mem7#1;havoc main_#t~mem8#1;havoc main_#t~short9#1;call main_#t~malloc10#1.base, main_#t~malloc10#1.offset := #Ultimate.allocOnStack(4);main_~tmp~0#1.base, main_~tmp~0#1.offset := main_#t~malloc10#1.base, main_#t~malloc10#1.offset;call main_#t~mem11#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);call write~int#2(1 + main_#t~mem11#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem11#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#2(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" [2024-11-28 04:29:19,633 INFO L749 eck$LassoCheckResult]: Loop: "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#2(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);" [2024-11-28 04:29:19,633 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 04:29:19,633 INFO L85 PathProgramCache]: Analyzing trace with hash 1069635751, now seen corresponding path program 3 times [2024-11-28 04:29:19,633 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM [2024-11-28 04:29:19,633 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1581092469] [2024-11-28 04:29:19,634 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 04:29:19,634 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 04:29:19,662 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-28 04:29:19,663 INFO L357 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-28 04:29:19,677 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-28 04:29:19,682 INFO L130 FreeRefinementEngine]: Strategy CAMEL_NO_AM found a feasible trace [2024-11-28 04:29:19,682 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 04:29:19,682 INFO L85 PathProgramCache]: Analyzing trace with hash 43042169, now seen corresponding path program 6 times [2024-11-28 04:29:19,683 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM [2024-11-28 04:29:19,683 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [859073392] [2024-11-28 04:29:19,683 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 04:29:19,683 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 04:29:19,689 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-28 04:29:19,690 INFO L357 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-28 04:29:19,693 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-28 04:29:19,695 INFO L130 FreeRefinementEngine]: Strategy CAMEL_NO_AM found a feasible trace [2024-11-28 04:29:19,696 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 04:29:19,696 INFO L85 PathProgramCache]: Analyzing trace with hash -1188371309, now seen corresponding path program 4 times [2024-11-28 04:29:19,696 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM [2024-11-28 04:29:19,696 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1847104456] [2024-11-28 04:29:19,696 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 04:29:19,696 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 04:29:19,732 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 04:29:20,511 INFO L136 FreeRefinementEngine]: Strategy CAMEL_NO_AM found an infeasible trace [2024-11-28 04:29:20,511 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1847104456] [2024-11-28 04:29:20,511 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1847104456] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-28 04:29:20,511 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1133134534] [2024-11-28 04:29:20,512 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 04:29:20,512 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-28 04:29:20,512 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 04:29:20,514 INFO L229 MonitoredProcess]: Starting monitored process 52 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-28 04:29:20,518 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (52)] Waiting until timeout for monitored process [2024-11-28 04:29:20,628 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 04:29:20,630 INFO L256 TraceCheckSpWp]: Trace formula consists of 208 conjuncts, 27 conjuncts are in the unsatisfiable core [2024-11-28 04:29:20,636 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-28 04:29:20,800 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 1 [2024-11-28 04:29:21,030 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 21 [2024-11-28 04:29:21,118 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 72 treesize of output 48 [2024-11-28 04:29:21,318 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 41 [2024-11-28 04:29:21,324 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 42 treesize of output 26 [2024-11-28 04:29:21,394 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-28 04:29:21,828 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 13 [2024-11-28 04:29:21,841 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1133134534] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-28 04:29:21,841 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-28 04:29:21,842 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 11, 11] total 25 [2024-11-28 04:29:21,842 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1487893189] [2024-11-28 04:29:21,842 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-28 04:29:22,004 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL_NO_AM [2024-11-28 04:29:22,004 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2024-11-28 04:29:22,005 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=149, Invalid=501, Unknown=0, NotChecked=0, Total=650 [2024-11-28 04:29:22,005 INFO L87 Difference]: Start difference. First operand 24 states and 28 transitions. cyclomatic complexity: 7 Second operand has 26 states, 25 states have (on average 2.0) internal successors, (50), 26 states have internal predecessors, (50), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 04:29:22,517 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 04:29:22,518 INFO L93 Difference]: Finished difference Result 43 states and 46 transitions. [2024-11-28 04:29:22,518 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 43 states and 46 transitions. [2024-11-28 04:29:22,519 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 20 [2024-11-28 04:29:22,519 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 43 states to 39 states and 42 transitions. [2024-11-28 04:29:22,519 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 29 [2024-11-28 04:29:22,520 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 34 [2024-11-28 04:29:22,520 INFO L73 IsDeterministic]: Start isDeterministic. Operand 39 states and 42 transitions. [2024-11-28 04:29:22,520 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-11-28 04:29:22,520 INFO L218 hiAutomatonCegarLoop]: Abstraction has 39 states and 42 transitions. [2024-11-28 04:29:22,520 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 39 states and 42 transitions. [2024-11-28 04:29:22,523 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 39 to 34. [2024-11-28 04:29:22,523 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 34 states, 34 states have (on average 1.088235294117647) internal successors, (37), 33 states have internal predecessors, (37), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 04:29:22,524 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34 states to 34 states and 37 transitions. [2024-11-28 04:29:22,524 INFO L240 hiAutomatonCegarLoop]: Abstraction has 34 states and 37 transitions. [2024-11-28 04:29:22,525 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2024-11-28 04:29:22,526 INFO L425 stractBuchiCegarLoop]: Abstraction has 34 states and 37 transitions. [2024-11-28 04:29:22,526 INFO L332 stractBuchiCegarLoop]: ======== Iteration 8 ============ [2024-11-28 04:29:22,526 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 34 states and 37 transitions. [2024-11-28 04:29:22,527 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 20 [2024-11-28 04:29:22,527 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-28 04:29:22,527 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-28 04:29:22,527 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 04:29:22,527 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [4, 4, 4, 4, 3, 1] [2024-11-28 04:29:22,528 INFO L747 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~nondet4#1, main_#t~nondet5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~mem8#1, main_#t~short9#1, main_#t~malloc10#1.base, main_#t~malloc10#1.offset, main_#t~mem11#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~nondet14#1, main_#t~short15#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~id~0#1.base, main_~id~0#1.offset, main_~maxId~0#1.base, main_~maxId~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~id~0#1.base, main_~id~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~maxId~0#1.base, main_~maxId~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset;havoc main_#t~nondet4#1;call write~int#0(main_#t~nondet4#1, main_~id~0#1.base, main_~id~0#1.offset, 4);havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;call write~int#1(main_#t~nondet5#1, main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);havoc main_#t~nondet5#1;call main_#t~mem6#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short9#1 := 0 <= main_#t~mem6#1;" "assume main_#t~short9#1;call main_#t~mem7#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);call main_#t~mem8#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);main_#t~short9#1 := main_#t~mem7#1 < main_#t~mem8#1;" "assume main_#t~short9#1;havoc main_#t~mem6#1;havoc main_#t~mem7#1;havoc main_#t~mem8#1;havoc main_#t~short9#1;call main_#t~malloc10#1.base, main_#t~malloc10#1.offset := #Ultimate.allocOnStack(4);main_~tmp~0#1.base, main_~tmp~0#1.offset := main_#t~malloc10#1.base, main_#t~malloc10#1.offset;call main_#t~mem11#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);call write~int#2(1 + main_#t~mem11#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem11#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#2(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);" [2024-11-28 04:29:22,528 INFO L749 eck$LassoCheckResult]: Loop: "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#2(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);" [2024-11-28 04:29:22,528 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 04:29:22,528 INFO L85 PathProgramCache]: Analyzing trace with hash -533975343, now seen corresponding path program 2 times [2024-11-28 04:29:22,528 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM [2024-11-28 04:29:22,528 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1454056586] [2024-11-28 04:29:22,528 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 04:29:22,528 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 04:29:22,544 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-28 04:29:22,544 INFO L357 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-28 04:29:22,552 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-28 04:29:22,556 INFO L130 FreeRefinementEngine]: Strategy CAMEL_NO_AM found a feasible trace [2024-11-28 04:29:22,556 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 04:29:22,556 INFO L85 PathProgramCache]: Analyzing trace with hash -2147433597, now seen corresponding path program 1 times [2024-11-28 04:29:22,556 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM [2024-11-28 04:29:22,556 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1023286030] [2024-11-28 04:29:22,557 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 04:29:22,557 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 04:29:22,574 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-28 04:29:22,577 INFO L357 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-28 04:29:22,586 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-28 04:29:22,591 INFO L130 FreeRefinementEngine]: Strategy CAMEL_NO_AM found a feasible trace [2024-11-28 04:29:22,592 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 04:29:22,592 INFO L85 PathProgramCache]: Analyzing trace with hash 1251043923, now seen corresponding path program 5 times [2024-11-28 04:29:22,592 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM [2024-11-28 04:29:22,592 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [283416348] [2024-11-28 04:29:22,592 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 04:29:22,592 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 04:29:22,633 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 04:29:23,844 INFO L136 FreeRefinementEngine]: Strategy CAMEL_NO_AM found an infeasible trace [2024-11-28 04:29:23,845 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [283416348] [2024-11-28 04:29:23,846 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [283416348] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-28 04:29:23,846 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [503357607] [2024-11-28 04:29:23,846 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 04:29:23,846 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-28 04:29:23,846 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 04:29:23,850 INFO L229 MonitoredProcess]: Starting monitored process 53 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-28 04:29:23,855 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (53)] Waiting until timeout for monitored process [2024-11-28 04:29:23,980 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 04:29:23,982 INFO L256 TraceCheckSpWp]: Trace formula consists of 282 conjuncts, 23 conjuncts are in the unsatisfiable core [2024-11-28 04:29:23,985 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-28 04:29:24,049 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 13 [2024-11-28 04:29:24,101 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 13 [2024-11-28 04:29:24,183 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 31 [2024-11-28 04:29:24,276 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 29 [2024-11-28 04:29:24,310 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 13 [2024-11-28 04:29:24,313 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 9 [2024-11-28 04:29:24,316 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-28 04:29:24,407 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 18 [2024-11-28 04:29:24,548 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [503357607] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-28 04:29:24,548 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-28 04:29:24,548 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 10, 10] total 18 [2024-11-28 04:29:24,549 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2067725254] [2024-11-28 04:29:24,549 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-28 04:29:25,363 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL_NO_AM [2024-11-28 04:29:25,363 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2024-11-28 04:29:25,364 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=55, Invalid=287, Unknown=0, NotChecked=0, Total=342 [2024-11-28 04:29:25,364 INFO L87 Difference]: Start difference. First operand 34 states and 37 transitions. cyclomatic complexity: 5 Second operand has 19 states, 18 states have (on average 2.5) internal successors, (45), 19 states have internal predecessors, (45), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 04:29:25,718 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 04:29:25,718 INFO L93 Difference]: Finished difference Result 62 states and 65 transitions. [2024-11-28 04:29:25,718 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 62 states and 65 transitions. [2024-11-28 04:29:25,719 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 25 [2024-11-28 04:29:25,720 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 62 states to 62 states and 65 transitions. [2024-11-28 04:29:25,720 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 53 [2024-11-28 04:29:25,720 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 53 [2024-11-28 04:29:25,720 INFO L73 IsDeterministic]: Start isDeterministic. Operand 62 states and 65 transitions. [2024-11-28 04:29:25,721 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-11-28 04:29:25,721 INFO L218 hiAutomatonCegarLoop]: Abstraction has 62 states and 65 transitions. [2024-11-28 04:29:25,721 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 62 states and 65 transitions. [2024-11-28 04:29:25,723 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 62 to 43. [2024-11-28 04:29:25,723 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 43 states, 43 states have (on average 1.069767441860465) internal successors, (46), 42 states have internal predecessors, (46), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 04:29:25,724 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 43 states to 43 states and 46 transitions. [2024-11-28 04:29:25,724 INFO L240 hiAutomatonCegarLoop]: Abstraction has 43 states and 46 transitions. [2024-11-28 04:29:25,724 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2024-11-28 04:29:25,725 INFO L425 stractBuchiCegarLoop]: Abstraction has 43 states and 46 transitions. [2024-11-28 04:29:25,725 INFO L332 stractBuchiCegarLoop]: ======== Iteration 9 ============ [2024-11-28 04:29:25,725 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 43 states and 46 transitions. [2024-11-28 04:29:25,725 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 25 [2024-11-28 04:29:25,726 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-28 04:29:25,726 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-28 04:29:25,726 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 04:29:25,726 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1] [2024-11-28 04:29:25,726 INFO L747 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~nondet4#1, main_#t~nondet5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~mem8#1, main_#t~short9#1, main_#t~malloc10#1.base, main_#t~malloc10#1.offset, main_#t~mem11#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~nondet14#1, main_#t~short15#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~id~0#1.base, main_~id~0#1.offset, main_~maxId~0#1.base, main_~maxId~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~id~0#1.base, main_~id~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~maxId~0#1.base, main_~maxId~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset;havoc main_#t~nondet4#1;call write~int#0(main_#t~nondet4#1, main_~id~0#1.base, main_~id~0#1.offset, 4);havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;call write~int#1(main_#t~nondet5#1, main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);havoc main_#t~nondet5#1;call main_#t~mem6#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short9#1 := 0 <= main_#t~mem6#1;" "assume main_#t~short9#1;call main_#t~mem7#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);call main_#t~mem8#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);main_#t~short9#1 := main_#t~mem7#1 < main_#t~mem8#1;" "assume main_#t~short9#1;havoc main_#t~mem6#1;havoc main_#t~mem7#1;havoc main_#t~mem8#1;havoc main_#t~short9#1;call main_#t~malloc10#1.base, main_#t~malloc10#1.offset := #Ultimate.allocOnStack(4);main_~tmp~0#1.base, main_~tmp~0#1.offset := main_#t~malloc10#1.base, main_#t~malloc10#1.offset;call main_#t~mem11#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);call write~int#2(1 + main_#t~mem11#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem11#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#2(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);" [2024-11-28 04:29:25,726 INFO L749 eck$LassoCheckResult]: Loop: "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" [2024-11-28 04:29:25,726 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 04:29:25,726 INFO L85 PathProgramCache]: Analyzing trace with hash -533975343, now seen corresponding path program 3 times [2024-11-28 04:29:25,727 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM [2024-11-28 04:29:25,727 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [457823595] [2024-11-28 04:29:25,727 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 04:29:25,727 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 04:29:25,743 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-28 04:29:25,743 INFO L357 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-28 04:29:25,751 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-28 04:29:25,754 INFO L130 FreeRefinementEngine]: Strategy CAMEL_NO_AM found a feasible trace [2024-11-28 04:29:25,754 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 04:29:25,755 INFO L85 PathProgramCache]: Analyzing trace with hash 43042167, now seen corresponding path program 2 times [2024-11-28 04:29:25,755 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM [2024-11-28 04:29:25,755 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [571941570] [2024-11-28 04:29:25,755 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 04:29:25,755 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 04:29:25,761 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-28 04:29:25,761 INFO L357 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-28 04:29:25,764 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-28 04:29:25,766 INFO L130 FreeRefinementEngine]: Strategy CAMEL_NO_AM found a feasible trace [2024-11-28 04:29:25,767 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 04:29:25,767 INFO L85 PathProgramCache]: Analyzing trace with hash 1069635751, now seen corresponding path program 6 times [2024-11-28 04:29:25,767 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM [2024-11-28 04:29:25,767 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2076997540] [2024-11-28 04:29:25,767 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 04:29:25,767 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 04:29:25,788 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-28 04:29:25,788 INFO L357 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-28 04:29:25,804 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-28 04:29:25,811 INFO L130 FreeRefinementEngine]: Strategy CAMEL_NO_AM found a feasible trace [2024-11-28 04:29:27,234 INFO L204 LassoAnalysis]: Preferences: [2024-11-28 04:29:27,234 INFO L125 ssoRankerPreferences]: Compute integeral hull: false [2024-11-28 04:29:27,234 INFO L126 ssoRankerPreferences]: Enable LassoPartitioneer: true [2024-11-28 04:29:27,234 INFO L127 ssoRankerPreferences]: Term annotations enabled: false [2024-11-28 04:29:27,234 INFO L128 ssoRankerPreferences]: Use exernal solver: false [2024-11-28 04:29:27,235 INFO L129 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-28 04:29:27,235 INFO L130 ssoRankerPreferences]: Dump SMT script to file: false [2024-11-28 04:29:27,235 INFO L131 ssoRankerPreferences]: Path of dumped script: [2024-11-28 04:29:27,235 INFO L132 ssoRankerPreferences]: Filename of dumped script: GulwaniJainKoskinen-2009PLDI-Fig1-alloca-2.i_Iteration9_Lasso [2024-11-28 04:29:27,235 INFO L133 ssoRankerPreferences]: MapElimAlgo: Frank [2024-11-28 04:29:27,235 INFO L241 LassoAnalysis]: Starting lasso preprocessing... [2024-11-28 04:29:27,238 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-28 04:29:27,243 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-28 04:29:27,246 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-28 04:29:27,249 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-28 04:29:27,251 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-28 04:29:27,256 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-28 04:29:27,261 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-28 04:29:27,264 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-28 04:29:27,267 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-28 04:29:27,270 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-28 04:29:27,273 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-28 04:29:27,276 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-28 04:29:27,279 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-28 04:29:27,804 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-28 04:29:27,807 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-28 04:29:27,809 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-28 04:29:27,811 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-28 04:29:27,813 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-28 04:29:27,816 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-28 04:29:27,818 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-28 04:29:28,236 INFO L259 LassoAnalysis]: Preprocessing complete. [2024-11-28 04:29:28,236 INFO L451 LassoAnalysis]: Using template 'affine'. [2024-11-28 04:29:28,236 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-28 04:29:28,236 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 04:29:28,239 INFO L229 MonitoredProcess]: Starting monitored process 54 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-28 04:29:28,240 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (54)] Waiting until timeout for monitored process [2024-11-28 04:29:28,243 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-28 04:29:28,261 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-28 04:29:28,261 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-28 04:29:28,262 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-28 04:29:28,262 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-28 04:29:28,262 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-28 04:29:28,262 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-28 04:29:28,263 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-28 04:29:28,265 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-28 04:29:28,280 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (54)] Forceful destruction successful, exit code 0 [2024-11-28 04:29:28,280 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-28 04:29:28,280 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 04:29:28,283 INFO L229 MonitoredProcess]: Starting monitored process 55 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-28 04:29:28,287 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (55)] Waiting until timeout for monitored process [2024-11-28 04:29:28,288 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-28 04:29:28,305 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-28 04:29:28,305 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-28 04:29:28,306 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-28 04:29:28,306 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-28 04:29:28,311 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-28 04:29:28,311 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-28 04:29:28,315 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-28 04:29:28,322 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (55)] Forceful destruction successful, exit code 0 [2024-11-28 04:29:28,322 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-28 04:29:28,322 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 04:29:28,325 INFO L229 MonitoredProcess]: Starting monitored process 56 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-28 04:29:28,326 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (56)] Waiting until timeout for monitored process [2024-11-28 04:29:28,327 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-28 04:29:28,341 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-28 04:29:28,341 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-28 04:29:28,341 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-28 04:29:28,341 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-28 04:29:28,342 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-28 04:29:28,342 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-28 04:29:28,342 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-28 04:29:28,343 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-28 04:29:28,351 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (56)] Forceful destruction successful, exit code 0 [2024-11-28 04:29:28,351 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-28 04:29:28,351 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 04:29:28,353 INFO L229 MonitoredProcess]: Starting monitored process 57 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-28 04:29:28,354 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (57)] Waiting until timeout for monitored process [2024-11-28 04:29:28,356 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-28 04:29:28,370 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-28 04:29:28,370 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-28 04:29:28,370 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-28 04:29:28,370 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-28 04:29:28,370 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-28 04:29:28,371 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-28 04:29:28,371 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-28 04:29:28,372 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-28 04:29:28,381 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (57)] Forceful destruction successful, exit code 0 [2024-11-28 04:29:28,381 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-28 04:29:28,381 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 04:29:28,383 INFO L229 MonitoredProcess]: Starting monitored process 58 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-28 04:29:28,384 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (58)] Waiting until timeout for monitored process [2024-11-28 04:29:28,386 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-28 04:29:28,400 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-28 04:29:28,400 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-28 04:29:28,400 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-28 04:29:28,400 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-28 04:29:28,400 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-28 04:29:28,400 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-28 04:29:28,400 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-28 04:29:28,402 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-28 04:29:28,410 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (58)] Ended with exit code 0 [2024-11-28 04:29:28,410 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-28 04:29:28,411 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 04:29:28,413 INFO L229 MonitoredProcess]: Starting monitored process 59 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-28 04:29:28,414 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (59)] Waiting until timeout for monitored process [2024-11-28 04:29:28,416 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-28 04:29:28,430 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-28 04:29:28,430 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-28 04:29:28,430 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-28 04:29:28,430 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-28 04:29:28,430 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-28 04:29:28,431 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-28 04:29:28,431 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-28 04:29:28,432 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-28 04:29:28,440 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (59)] Forceful destruction successful, exit code 0 [2024-11-28 04:29:28,440 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-28 04:29:28,440 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 04:29:28,442 INFO L229 MonitoredProcess]: Starting monitored process 60 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-28 04:29:28,444 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (60)] Waiting until timeout for monitored process [2024-11-28 04:29:28,445 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-28 04:29:28,459 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-28 04:29:28,460 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-28 04:29:28,460 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-28 04:29:28,460 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-28 04:29:28,460 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-28 04:29:28,460 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-28 04:29:28,460 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-28 04:29:28,462 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-28 04:29:28,469 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (60)] Ended with exit code 0 [2024-11-28 04:29:28,469 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-28 04:29:28,469 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 04:29:28,471 INFO L229 MonitoredProcess]: Starting monitored process 61 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-28 04:29:28,473 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (61)] Waiting until timeout for monitored process [2024-11-28 04:29:28,474 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-28 04:29:28,488 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-28 04:29:28,488 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-28 04:29:28,488 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-28 04:29:28,488 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-28 04:29:28,488 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-28 04:29:28,489 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-28 04:29:28,489 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-28 04:29:28,492 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-28 04:29:28,505 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (61)] Ended with exit code 0 [2024-11-28 04:29:28,506 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-28 04:29:28,506 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 04:29:28,508 INFO L229 MonitoredProcess]: Starting monitored process 62 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-28 04:29:28,512 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (62)] Waiting until timeout for monitored process [2024-11-28 04:29:28,513 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-28 04:29:28,531 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-28 04:29:28,531 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-28 04:29:28,531 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-28 04:29:28,531 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-28 04:29:28,531 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-28 04:29:28,532 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-28 04:29:28,532 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-28 04:29:28,535 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-28 04:29:28,543 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (62)] Forceful destruction successful, exit code 0 [2024-11-28 04:29:28,543 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-28 04:29:28,543 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 04:29:28,546 INFO L229 MonitoredProcess]: Starting monitored process 63 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-28 04:29:28,547 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (63)] Waiting until timeout for monitored process [2024-11-28 04:29:28,549 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-28 04:29:28,563 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-28 04:29:28,563 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-28 04:29:28,563 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-28 04:29:28,563 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-28 04:29:28,563 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-28 04:29:28,563 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-28 04:29:28,563 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-28 04:29:28,565 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-28 04:29:28,572 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (63)] Forceful destruction successful, exit code 0 [2024-11-28 04:29:28,572 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-28 04:29:28,572 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 04:29:28,575 INFO L229 MonitoredProcess]: Starting monitored process 64 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-28 04:29:28,576 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (64)] Waiting until timeout for monitored process [2024-11-28 04:29:28,577 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-28 04:29:28,592 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-28 04:29:28,592 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-28 04:29:28,592 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-28 04:29:28,592 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-28 04:29:28,592 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-28 04:29:28,593 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-28 04:29:28,593 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-28 04:29:28,594 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-28 04:29:28,601 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (64)] Forceful destruction successful, exit code 0 [2024-11-28 04:29:28,602 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-28 04:29:28,602 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 04:29:28,604 INFO L229 MonitoredProcess]: Starting monitored process 65 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-28 04:29:28,607 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (65)] Waiting until timeout for monitored process [2024-11-28 04:29:28,607 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-28 04:29:28,622 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-28 04:29:28,623 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-28 04:29:28,623 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-28 04:29:28,623 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-28 04:29:28,623 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-28 04:29:28,623 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-28 04:29:28,623 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-28 04:29:28,625 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-28 04:29:28,633 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (65)] Ended with exit code 0 [2024-11-28 04:29:28,633 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-28 04:29:28,634 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 04:29:28,636 INFO L229 MonitoredProcess]: Starting monitored process 66 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-28 04:29:28,638 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (66)] Waiting until timeout for monitored process [2024-11-28 04:29:28,639 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-28 04:29:28,653 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-28 04:29:28,653 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-28 04:29:28,653 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-28 04:29:28,653 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-28 04:29:28,657 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-28 04:29:28,657 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-28 04:29:28,663 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-28 04:29:28,671 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (66)] Ended with exit code 0 [2024-11-28 04:29:28,671 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-28 04:29:28,672 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 04:29:28,674 INFO L229 MonitoredProcess]: Starting monitored process 67 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-28 04:29:28,677 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (67)] Waiting until timeout for monitored process [2024-11-28 04:29:28,678 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-28 04:29:28,692 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-28 04:29:28,692 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-28 04:29:28,692 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-28 04:29:28,693 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-28 04:29:28,695 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-28 04:29:28,695 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-28 04:29:28,702 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-28 04:29:28,709 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (67)] Ended with exit code 0 [2024-11-28 04:29:28,709 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-28 04:29:28,709 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 04:29:28,711 INFO L229 MonitoredProcess]: Starting monitored process 68 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-28 04:29:28,713 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (68)] Waiting until timeout for monitored process [2024-11-28 04:29:28,714 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-28 04:29:28,729 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-28 04:29:28,729 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-28 04:29:28,729 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-28 04:29:28,729 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-28 04:29:28,732 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-28 04:29:28,732 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-28 04:29:28,738 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-28 04:29:28,745 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (68)] Ended with exit code 0 [2024-11-28 04:29:28,745 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-28 04:29:28,746 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 04:29:28,748 INFO L229 MonitoredProcess]: Starting monitored process 69 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-28 04:29:28,749 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (69)] Waiting until timeout for monitored process [2024-11-28 04:29:28,751 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-28 04:29:28,765 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-28 04:29:28,765 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-28 04:29:28,765 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-28 04:29:28,765 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-28 04:29:28,771 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-28 04:29:28,771 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-28 04:29:28,780 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-28 04:29:28,788 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (69)] Forceful destruction successful, exit code 0 [2024-11-28 04:29:28,788 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-28 04:29:28,788 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 04:29:28,790 INFO L229 MonitoredProcess]: Starting monitored process 70 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-28 04:29:28,792 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (70)] Waiting until timeout for monitored process [2024-11-28 04:29:28,793 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-28 04:29:28,807 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-28 04:29:28,807 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-28 04:29:28,807 INFO L204 nArgumentSynthesizer]: 2 loop disjuncts [2024-11-28 04:29:28,807 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-28 04:29:28,818 INFO L401 nArgumentSynthesizer]: We have 16 Motzkin's Theorem applications. [2024-11-28 04:29:28,818 INFO L402 nArgumentSynthesizer]: A total of 4 supporting invariants were added. [2024-11-28 04:29:28,844 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2024-11-28 04:29:28,873 INFO L443 ModelExtractionUtils]: Simplification made 10 calls to the SMT solver. [2024-11-28 04:29:28,873 INFO L444 ModelExtractionUtils]: 13 out of 26 variables were initially zero. Simplification set additionally 10 variables to zero. [2024-11-28 04:29:28,873 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-28 04:29:28,873 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 04:29:28,876 INFO L229 MonitoredProcess]: Starting monitored process 71 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-28 04:29:28,878 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (71)] Waiting until timeout for monitored process [2024-11-28 04:29:28,878 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2024-11-28 04:29:28,900 INFO L438 nArgumentSynthesizer]: Removed 4 redundant supporting invariants from a total of 4. [2024-11-28 04:29:28,900 INFO L474 LassoAnalysis]: Proved termination. [2024-11-28 04:29:28,900 INFO L476 LassoAnalysis]: Termination argument consisting of: Ranking function f(v_rep(select (select #memory_int#2 ULTIMATE.start_main_~tmp~0#1.base) ULTIMATE.start_main_~tmp~0#1.offset)_5, v_rep(select (select #memory_int#1 ULTIMATE.start_main_~maxId~0#1.base) ULTIMATE.start_main_~maxId~0#1.offset)_5) = -1*v_rep(select (select #memory_int#2 ULTIMATE.start_main_~tmp~0#1.base) ULTIMATE.start_main_~tmp~0#1.offset)_5 + 1*v_rep(select (select #memory_int#1 ULTIMATE.start_main_~maxId~0#1.base) ULTIMATE.start_main_~maxId~0#1.offset)_5 Supporting invariants [] [2024-11-28 04:29:28,908 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (70)] Ended with exit code 0 [2024-11-28 04:29:28,991 INFO L156 tatePredicateManager]: 22 out of 22 supporting invariants were superfluous and have been removed [2024-11-28 04:29:28,993 WARN L970 BoogieBacktranslator]: Unfinished Backtranslation: Unknown variable: #memory_int#1 [2024-11-28 04:29:28,993 WARN L970 BoogieBacktranslator]: Unfinished Backtranslation: Cannot backtranslate array access to array IdentifierExpression[#memory_int#1,GLOBAL] [2024-11-28 04:29:28,993 WARN L970 BoogieBacktranslator]: Unfinished Backtranslation: Cannot backtranslate array access to array ArrayAccessExpression[IdentifierExpression[#memory_int#1,GLOBAL],[IdentifierExpression[~maxId~0!base,]]] [2024-11-28 04:29:28,993 WARN L970 BoogieBacktranslator]: Unfinished Backtranslation: Unknown variable: #memory_int#2 [2024-11-28 04:29:28,993 WARN L970 BoogieBacktranslator]: Unfinished Backtranslation: Cannot backtranslate array access to array IdentifierExpression[#memory_int#2,GLOBAL] [2024-11-28 04:29:28,993 WARN L970 BoogieBacktranslator]: Unfinished Backtranslation: Cannot backtranslate array access to array ArrayAccessExpression[IdentifierExpression[#memory_int#2,GLOBAL],[IdentifierExpression[~tmp~0!base,]]] [2024-11-28 04:29:29,012 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 04:29:29,049 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 04:29:29,050 INFO L256 TraceCheckSpWp]: Trace formula consists of 134 conjuncts, 2 conjuncts are in the unsatisfiable core [2024-11-28 04:29:29,051 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-28 04:29:29,080 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 04:29:29,081 INFO L256 TraceCheckSpWp]: Trace formula consists of 39 conjuncts, 7 conjuncts are in the unsatisfiable core [2024-11-28 04:29:29,082 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-28 04:29:29,113 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-28 04:29:29,114 INFO L141 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.1 stem predicates 2 loop predicates [2024-11-28 04:29:29,114 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand 43 states and 46 transitions. cyclomatic complexity: 6 Second operand has 4 states, 4 states have (on average 3.5) internal successors, (14), 4 states have internal predecessors, (14), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 04:29:29,145 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand 43 states and 46 transitions. cyclomatic complexity: 6. Second operand has 4 states, 4 states have (on average 3.5) internal successors, (14), 4 states have internal predecessors, (14), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 84 states and 89 transitions. Complement of second has 7 states. [2024-11-28 04:29:29,146 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 4 states 1 stem states 2 non-accepting loop states 1 accepting loop states [2024-11-28 04:29:29,147 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 3.5) internal successors, (14), 4 states have internal predecessors, (14), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 04:29:29,147 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 15 transitions. [2024-11-28 04:29:29,147 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 4 states and 15 transitions. Stem has 9 letters. Loop has 5 letters. [2024-11-28 04:29:29,147 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2024-11-28 04:29:29,147 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 4 states and 15 transitions. Stem has 14 letters. Loop has 5 letters. [2024-11-28 04:29:29,147 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2024-11-28 04:29:29,147 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 4 states and 15 transitions. Stem has 9 letters. Loop has 10 letters. [2024-11-28 04:29:29,148 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2024-11-28 04:29:29,148 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 84 states and 89 transitions. [2024-11-28 04:29:29,149 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 20 [2024-11-28 04:29:29,150 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 84 states to 58 states and 61 transitions. [2024-11-28 04:29:29,150 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 33 [2024-11-28 04:29:29,150 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 34 [2024-11-28 04:29:29,151 INFO L73 IsDeterministic]: Start isDeterministic. Operand 58 states and 61 transitions. [2024-11-28 04:29:29,151 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-11-28 04:29:29,151 INFO L218 hiAutomatonCegarLoop]: Abstraction has 58 states and 61 transitions. [2024-11-28 04:29:29,151 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 58 states and 61 transitions. [2024-11-28 04:29:29,154 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 58 to 54. [2024-11-28 04:29:29,154 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 54 states, 54 states have (on average 1.0555555555555556) internal successors, (57), 53 states have internal predecessors, (57), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 04:29:29,155 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 54 states to 54 states and 57 transitions. [2024-11-28 04:29:29,155 INFO L240 hiAutomatonCegarLoop]: Abstraction has 54 states and 57 transitions. [2024-11-28 04:29:29,155 INFO L425 stractBuchiCegarLoop]: Abstraction has 54 states and 57 transitions. [2024-11-28 04:29:29,156 INFO L332 stractBuchiCegarLoop]: ======== Iteration 10 ============ [2024-11-28 04:29:29,156 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 54 states and 57 transitions. [2024-11-28 04:29:29,157 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 20 [2024-11-28 04:29:29,157 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-28 04:29:29,157 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-28 04:29:29,158 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [6, 6, 6, 6, 4, 2, 1, 1, 1, 1] [2024-11-28 04:29:29,158 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [4, 4, 4, 4, 3, 1] [2024-11-28 04:29:29,158 INFO L747 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~nondet4#1, main_#t~nondet5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~mem8#1, main_#t~short9#1, main_#t~malloc10#1.base, main_#t~malloc10#1.offset, main_#t~mem11#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~nondet14#1, main_#t~short15#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~id~0#1.base, main_~id~0#1.offset, main_~maxId~0#1.base, main_~maxId~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~id~0#1.base, main_~id~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~maxId~0#1.base, main_~maxId~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset;havoc main_#t~nondet4#1;call write~int#0(main_#t~nondet4#1, main_~id~0#1.base, main_~id~0#1.offset, 4);havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;call write~int#1(main_#t~nondet5#1, main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);havoc main_#t~nondet5#1;call main_#t~mem6#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short9#1 := 0 <= main_#t~mem6#1;" "assume main_#t~short9#1;call main_#t~mem7#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);call main_#t~mem8#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);main_#t~short9#1 := main_#t~mem7#1 < main_#t~mem8#1;" "assume main_#t~short9#1;havoc main_#t~mem6#1;havoc main_#t~mem7#1;havoc main_#t~mem8#1;havoc main_#t~short9#1;call main_#t~malloc10#1.base, main_#t~malloc10#1.offset := #Ultimate.allocOnStack(4);main_~tmp~0#1.base, main_~tmp~0#1.offset := main_#t~malloc10#1.base, main_#t~malloc10#1.offset;call main_#t~mem11#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);call write~int#2(1 + main_#t~mem11#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem11#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#2(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#2(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);" [2024-11-28 04:29:29,159 INFO L749 eck$LassoCheckResult]: Loop: "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#2(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);" [2024-11-28 04:29:29,159 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 04:29:29,159 INFO L85 PathProgramCache]: Analyzing trace with hash 710185453, now seen corresponding path program 7 times [2024-11-28 04:29:29,159 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM [2024-11-28 04:29:29,159 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1322410897] [2024-11-28 04:29:29,160 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 04:29:29,160 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 04:29:29,239 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 04:29:29,282 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (71)] Ended with exit code 0 [2024-11-28 04:29:30,553 INFO L136 FreeRefinementEngine]: Strategy CAMEL_NO_AM found an infeasible trace [2024-11-28 04:29:30,553 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1322410897] [2024-11-28 04:29:30,553 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1322410897] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-28 04:29:30,554 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [93167415] [2024-11-28 04:29:30,554 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 04:29:30,554 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-28 04:29:30,554 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 04:29:30,556 INFO L229 MonitoredProcess]: Starting monitored process 72 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-28 04:29:30,559 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (72)] Waiting until timeout for monitored process [2024-11-28 04:29:30,747 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 04:29:30,750 INFO L256 TraceCheckSpWp]: Trace formula consists of 319 conjuncts, 26 conjuncts are in the unsatisfiable core [2024-11-28 04:29:30,756 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-28 04:29:30,764 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 13 [2024-11-28 04:29:30,860 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 28 [2024-11-28 04:29:30,937 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 13 [2024-11-28 04:29:31,030 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 31 [2024-11-28 04:29:31,093 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-28 04:29:31,159 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 29 [2024-11-28 04:29:31,205 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 13 [2024-11-28 04:29:31,209 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 9 [2024-11-28 04:29:31,212 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-28 04:29:31,345 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 18 [2024-11-28 04:29:31,522 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 20 [2024-11-28 04:29:31,536 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [93167415] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-28 04:29:31,536 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-28 04:29:31,536 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 12, 12] total 24 [2024-11-28 04:29:31,536 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1646372646] [2024-11-28 04:29:31,536 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-28 04:29:31,537 INFO L752 eck$LassoCheckResult]: stem already infeasible [2024-11-28 04:29:31,537 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 04:29:31,537 INFO L85 PathProgramCache]: Analyzing trace with hash -2147433597, now seen corresponding path program 2 times [2024-11-28 04:29:31,537 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM [2024-11-28 04:29:31,537 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [480168755] [2024-11-28 04:29:31,537 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 04:29:31,537 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 04:29:31,553 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-28 04:29:31,553 INFO L357 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-28 04:29:31,561 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-28 04:29:31,565 INFO L130 FreeRefinementEngine]: Strategy CAMEL_NO_AM found a feasible trace [2024-11-28 04:29:32,487 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL_NO_AM [2024-11-28 04:29:32,488 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2024-11-28 04:29:32,488 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=74, Invalid=526, Unknown=0, NotChecked=0, Total=600 [2024-11-28 04:29:32,488 INFO L87 Difference]: Start difference. First operand 54 states and 57 transitions. cyclomatic complexity: 6 Second operand has 25 states, 24 states have (on average 2.6666666666666665) internal successors, (64), 25 states have internal predecessors, (64), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 04:29:33,247 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 04:29:33,247 INFO L93 Difference]: Finished difference Result 87 states and 91 transitions. [2024-11-28 04:29:33,247 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 87 states and 91 transitions. [2024-11-28 04:29:33,248 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 20 [2024-11-28 04:29:33,249 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 87 states to 63 states and 66 transitions. [2024-11-28 04:29:33,249 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 34 [2024-11-28 04:29:33,249 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 34 [2024-11-28 04:29:33,249 INFO L73 IsDeterministic]: Start isDeterministic. Operand 63 states and 66 transitions. [2024-11-28 04:29:33,249 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-11-28 04:29:33,249 INFO L218 hiAutomatonCegarLoop]: Abstraction has 63 states and 66 transitions. [2024-11-28 04:29:33,249 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 63 states and 66 transitions. [2024-11-28 04:29:33,252 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 63 to 59. [2024-11-28 04:29:33,253 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 59 states, 59 states have (on average 1.0508474576271187) internal successors, (62), 58 states have internal predecessors, (62), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 04:29:33,254 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 59 states to 59 states and 62 transitions. [2024-11-28 04:29:33,254 INFO L240 hiAutomatonCegarLoop]: Abstraction has 59 states and 62 transitions. [2024-11-28 04:29:33,254 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2024-11-28 04:29:33,255 INFO L425 stractBuchiCegarLoop]: Abstraction has 59 states and 62 transitions. [2024-11-28 04:29:33,255 INFO L332 stractBuchiCegarLoop]: ======== Iteration 11 ============ [2024-11-28 04:29:33,256 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 59 states and 62 transitions. [2024-11-28 04:29:33,256 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 20 [2024-11-28 04:29:33,256 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-28 04:29:33,257 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-28 04:29:33,257 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [7, 7, 7, 7, 5, 2, 1, 1, 1, 1] [2024-11-28 04:29:33,258 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [4, 4, 4, 4, 3, 1] [2024-11-28 04:29:33,258 INFO L747 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~nondet4#1, main_#t~nondet5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~mem8#1, main_#t~short9#1, main_#t~malloc10#1.base, main_#t~malloc10#1.offset, main_#t~mem11#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~nondet14#1, main_#t~short15#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~id~0#1.base, main_~id~0#1.offset, main_~maxId~0#1.base, main_~maxId~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~id~0#1.base, main_~id~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~maxId~0#1.base, main_~maxId~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset;havoc main_#t~nondet4#1;call write~int#0(main_#t~nondet4#1, main_~id~0#1.base, main_~id~0#1.offset, 4);havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;call write~int#1(main_#t~nondet5#1, main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);havoc main_#t~nondet5#1;call main_#t~mem6#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short9#1 := 0 <= main_#t~mem6#1;" "assume main_#t~short9#1;call main_#t~mem7#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);call main_#t~mem8#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);main_#t~short9#1 := main_#t~mem7#1 < main_#t~mem8#1;" "assume main_#t~short9#1;havoc main_#t~mem6#1;havoc main_#t~mem7#1;havoc main_#t~mem8#1;havoc main_#t~short9#1;call main_#t~malloc10#1.base, main_#t~malloc10#1.offset := #Ultimate.allocOnStack(4);main_~tmp~0#1.base, main_~tmp~0#1.offset := main_#t~malloc10#1.base, main_#t~malloc10#1.offset;call main_#t~mem11#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);call write~int#2(1 + main_#t~mem11#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem11#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#2(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#2(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);" [2024-11-28 04:29:33,258 INFO L749 eck$LassoCheckResult]: Loop: "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#2(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);" [2024-11-28 04:29:33,259 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 04:29:33,259 INFO L85 PathProgramCache]: Analyzing trace with hash 1077680787, now seen corresponding path program 8 times [2024-11-28 04:29:33,259 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM [2024-11-28 04:29:33,259 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1932992300] [2024-11-28 04:29:33,259 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 04:29:33,259 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 04:29:33,291 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 04:29:34,372 INFO L136 FreeRefinementEngine]: Strategy CAMEL_NO_AM found an infeasible trace [2024-11-28 04:29:34,373 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1932992300] [2024-11-28 04:29:34,373 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1932992300] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-28 04:29:34,373 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1153933855] [2024-11-28 04:29:34,373 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 04:29:34,373 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-28 04:29:34,373 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 04:29:34,376 INFO L229 MonitoredProcess]: Starting monitored process 73 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-28 04:29:34,383 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (73)] Waiting until timeout for monitored process [2024-11-28 04:29:34,559 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 04:29:34,561 INFO L256 TraceCheckSpWp]: Trace formula consists of 356 conjuncts, 28 conjuncts are in the unsatisfiable core [2024-11-28 04:29:34,570 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-28 04:29:34,612 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 13 [2024-11-28 04:29:34,700 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-28 04:29:34,778 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 13 [2024-11-28 04:29:34,924 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 1 [2024-11-28 04:29:34,986 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 58 treesize of output 38 [2024-11-28 04:29:35,138 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 33 [2024-11-28 04:29:35,272 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 33 [2024-11-28 04:29:35,375 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 33 [2024-11-28 04:29:35,469 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-28 04:29:35,474 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-28 04:29:35,515 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-28 04:29:35,855 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 53 treesize of output 37 [2024-11-28 04:29:36,025 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1153933855] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-28 04:29:36,025 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-28 04:29:36,025 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 14, 14] total 34 [2024-11-28 04:29:36,025 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1967768693] [2024-11-28 04:29:36,025 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-28 04:29:36,026 INFO L752 eck$LassoCheckResult]: stem already infeasible [2024-11-28 04:29:36,026 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 04:29:36,026 INFO L85 PathProgramCache]: Analyzing trace with hash -2147433597, now seen corresponding path program 3 times [2024-11-28 04:29:36,026 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM [2024-11-28 04:29:36,026 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [631247303] [2024-11-28 04:29:36,026 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 04:29:36,027 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 04:29:36,039 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-28 04:29:36,039 INFO L357 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-28 04:29:36,045 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-28 04:29:36,049 INFO L130 FreeRefinementEngine]: Strategy CAMEL_NO_AM found a feasible trace [2024-11-28 04:29:36,842 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL_NO_AM [2024-11-28 04:29:36,842 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 35 interpolants. [2024-11-28 04:29:36,843 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=175, Invalid=1015, Unknown=0, NotChecked=0, Total=1190 [2024-11-28 04:29:36,843 INFO L87 Difference]: Start difference. First operand 59 states and 62 transitions. cyclomatic complexity: 6 Second operand has 35 states, 34 states have (on average 2.9705882352941178) internal successors, (101), 35 states have internal predecessors, (101), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 04:29:37,808 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 04:29:37,808 INFO L93 Difference]: Finished difference Result 81 states and 84 transitions. [2024-11-28 04:29:37,808 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 81 states and 84 transitions. [2024-11-28 04:29:37,809 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 25 [2024-11-28 04:29:37,810 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 81 states to 77 states and 80 transitions. [2024-11-28 04:29:37,810 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 39 [2024-11-28 04:29:37,810 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 39 [2024-11-28 04:29:37,810 INFO L73 IsDeterministic]: Start isDeterministic. Operand 77 states and 80 transitions. [2024-11-28 04:29:37,811 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-11-28 04:29:37,811 INFO L218 hiAutomatonCegarLoop]: Abstraction has 77 states and 80 transitions. [2024-11-28 04:29:37,811 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 77 states and 80 transitions. [2024-11-28 04:29:37,813 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 77 to 69. [2024-11-28 04:29:37,814 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 69 states, 69 states have (on average 1.0434782608695652) internal successors, (72), 68 states have internal predecessors, (72), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 04:29:37,814 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 69 states to 69 states and 72 transitions. [2024-11-28 04:29:37,815 INFO L240 hiAutomatonCegarLoop]: Abstraction has 69 states and 72 transitions. [2024-11-28 04:29:37,815 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2024-11-28 04:29:37,816 INFO L425 stractBuchiCegarLoop]: Abstraction has 69 states and 72 transitions. [2024-11-28 04:29:37,816 INFO L332 stractBuchiCegarLoop]: ======== Iteration 12 ============ [2024-11-28 04:29:37,816 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 69 states and 72 transitions. [2024-11-28 04:29:37,817 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 25 [2024-11-28 04:29:37,817 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-28 04:29:37,817 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-28 04:29:37,818 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [8, 8, 8, 8, 6, 2, 1, 1, 1, 1] [2024-11-28 04:29:37,818 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [5, 5, 5, 5, 4, 1] [2024-11-28 04:29:37,818 INFO L747 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~nondet4#1, main_#t~nondet5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~mem8#1, main_#t~short9#1, main_#t~malloc10#1.base, main_#t~malloc10#1.offset, main_#t~mem11#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~nondet14#1, main_#t~short15#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~id~0#1.base, main_~id~0#1.offset, main_~maxId~0#1.base, main_~maxId~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~id~0#1.base, main_~id~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~maxId~0#1.base, main_~maxId~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset;havoc main_#t~nondet4#1;call write~int#0(main_#t~nondet4#1, main_~id~0#1.base, main_~id~0#1.offset, 4);havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;call write~int#1(main_#t~nondet5#1, main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);havoc main_#t~nondet5#1;call main_#t~mem6#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short9#1 := 0 <= main_#t~mem6#1;" "assume main_#t~short9#1;call main_#t~mem7#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);call main_#t~mem8#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);main_#t~short9#1 := main_#t~mem7#1 < main_#t~mem8#1;" "assume main_#t~short9#1;havoc main_#t~mem6#1;havoc main_#t~mem7#1;havoc main_#t~mem8#1;havoc main_#t~short9#1;call main_#t~malloc10#1.base, main_#t~malloc10#1.offset := #Ultimate.allocOnStack(4);main_~tmp~0#1.base, main_~tmp~0#1.offset := main_#t~malloc10#1.base, main_#t~malloc10#1.offset;call main_#t~mem11#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);call write~int#2(1 + main_#t~mem11#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem11#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#2(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#2(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);" [2024-11-28 04:29:37,818 INFO L749 eck$LassoCheckResult]: Loop: "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#2(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);" [2024-11-28 04:29:37,819 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 04:29:37,819 INFO L85 PathProgramCache]: Analyzing trace with hash -611400471, now seen corresponding path program 9 times [2024-11-28 04:29:37,819 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM [2024-11-28 04:29:37,819 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2014749212] [2024-11-28 04:29:37,819 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 04:29:37,819 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 04:29:37,851 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 04:29:39,180 INFO L136 FreeRefinementEngine]: Strategy CAMEL_NO_AM found an infeasible trace [2024-11-28 04:29:39,180 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2014749212] [2024-11-28 04:29:39,180 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2014749212] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-28 04:29:39,181 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1282919721] [2024-11-28 04:29:39,181 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 04:29:39,181 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-28 04:29:39,181 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 04:29:39,187 INFO L229 MonitoredProcess]: Starting monitored process 74 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-28 04:29:39,191 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (74)] Waiting until timeout for monitored process [2024-11-28 04:29:39,382 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 04:29:39,391 INFO L256 TraceCheckSpWp]: Trace formula consists of 393 conjuncts, 30 conjuncts are in the unsatisfiable core [2024-11-28 04:29:39,394 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-28 04:29:39,399 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 13 [2024-11-28 04:29:39,444 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-28 04:29:39,548 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 28 [2024-11-28 04:29:39,621 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-28 04:29:39,748 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 31 [2024-11-28 04:29:39,824 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-28 04:29:39,848 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-28 04:29:39,963 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 29 [2024-11-28 04:29:40,013 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 13 [2024-11-28 04:29:40,019 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 9 [2024-11-28 04:29:40,022 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-28 04:29:40,187 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 18 [2024-11-28 04:29:40,409 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 20 [2024-11-28 04:29:40,439 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1282919721] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-28 04:29:40,440 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-28 04:29:40,440 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 14, 14] total 27 [2024-11-28 04:29:40,440 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [986857608] [2024-11-28 04:29:40,440 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-28 04:29:40,441 INFO L752 eck$LassoCheckResult]: stem already infeasible [2024-11-28 04:29:40,441 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 04:29:40,441 INFO L85 PathProgramCache]: Analyzing trace with hash 503198201, now seen corresponding path program 4 times [2024-11-28 04:29:40,441 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM [2024-11-28 04:29:40,441 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1212079230] [2024-11-28 04:29:40,441 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 04:29:40,442 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 04:29:40,458 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-28 04:29:40,459 INFO L357 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-28 04:29:40,466 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-28 04:29:40,472 INFO L130 FreeRefinementEngine]: Strategy CAMEL_NO_AM found a feasible trace [2024-11-28 04:29:41,862 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL_NO_AM [2024-11-28 04:29:41,862 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 28 interpolants. [2024-11-28 04:29:41,863 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=81, Invalid=675, Unknown=0, NotChecked=0, Total=756 [2024-11-28 04:29:41,863 INFO L87 Difference]: Start difference. First operand 69 states and 72 transitions. cyclomatic complexity: 6 Second operand has 28 states, 27 states have (on average 2.925925925925926) internal successors, (79), 28 states have internal predecessors, (79), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 04:29:43,196 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 04:29:43,196 INFO L93 Difference]: Finished difference Result 107 states and 111 transitions. [2024-11-28 04:29:43,196 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 107 states and 111 transitions. [2024-11-28 04:29:43,197 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 25 [2024-11-28 04:29:43,198 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 107 states to 78 states and 81 transitions. [2024-11-28 04:29:43,198 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 39 [2024-11-28 04:29:43,198 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 39 [2024-11-28 04:29:43,198 INFO L73 IsDeterministic]: Start isDeterministic. Operand 78 states and 81 transitions. [2024-11-28 04:29:43,198 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-11-28 04:29:43,198 INFO L218 hiAutomatonCegarLoop]: Abstraction has 78 states and 81 transitions. [2024-11-28 04:29:43,198 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 78 states and 81 transitions. [2024-11-28 04:29:43,205 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 78 to 74. [2024-11-28 04:29:43,209 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 74 states, 74 states have (on average 1.0405405405405406) internal successors, (77), 73 states have internal predecessors, (77), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 04:29:43,210 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 74 states to 74 states and 77 transitions. [2024-11-28 04:29:43,211 INFO L240 hiAutomatonCegarLoop]: Abstraction has 74 states and 77 transitions. [2024-11-28 04:29:43,211 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2024-11-28 04:29:43,212 INFO L425 stractBuchiCegarLoop]: Abstraction has 74 states and 77 transitions. [2024-11-28 04:29:43,212 INFO L332 stractBuchiCegarLoop]: ======== Iteration 13 ============ [2024-11-28 04:29:43,212 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 74 states and 77 transitions. [2024-11-28 04:29:43,212 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 25 [2024-11-28 04:29:43,212 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-28 04:29:43,212 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-28 04:29:43,214 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [9, 9, 9, 9, 7, 2, 1, 1, 1, 1] [2024-11-28 04:29:43,214 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [5, 5, 5, 5, 4, 1] [2024-11-28 04:29:43,214 INFO L747 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~nondet4#1, main_#t~nondet5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~mem8#1, main_#t~short9#1, main_#t~malloc10#1.base, main_#t~malloc10#1.offset, main_#t~mem11#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~nondet14#1, main_#t~short15#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~id~0#1.base, main_~id~0#1.offset, main_~maxId~0#1.base, main_~maxId~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~id~0#1.base, main_~id~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~maxId~0#1.base, main_~maxId~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset;havoc main_#t~nondet4#1;call write~int#0(main_#t~nondet4#1, main_~id~0#1.base, main_~id~0#1.offset, 4);havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;call write~int#1(main_#t~nondet5#1, main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);havoc main_#t~nondet5#1;call main_#t~mem6#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short9#1 := 0 <= main_#t~mem6#1;" "assume main_#t~short9#1;call main_#t~mem7#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);call main_#t~mem8#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);main_#t~short9#1 := main_#t~mem7#1 < main_#t~mem8#1;" "assume main_#t~short9#1;havoc main_#t~mem6#1;havoc main_#t~mem7#1;havoc main_#t~mem8#1;havoc main_#t~short9#1;call main_#t~malloc10#1.base, main_#t~malloc10#1.offset := #Ultimate.allocOnStack(4);main_~tmp~0#1.base, main_~tmp~0#1.offset := main_#t~malloc10#1.base, main_#t~malloc10#1.offset;call main_#t~mem11#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);call write~int#2(1 + main_#t~mem11#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem11#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#2(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#2(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);" [2024-11-28 04:29:43,214 INFO L749 eck$LassoCheckResult]: Loop: "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#2(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);" [2024-11-28 04:29:43,214 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 04:29:43,214 INFO L85 PathProgramCache]: Analyzing trace with hash 133707279, now seen corresponding path program 10 times [2024-11-28 04:29:43,214 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM [2024-11-28 04:29:43,215 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [957709105] [2024-11-28 04:29:43,215 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 04:29:43,215 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 04:29:43,257 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 04:29:44,400 INFO L136 FreeRefinementEngine]: Strategy CAMEL_NO_AM found an infeasible trace [2024-11-28 04:29:44,401 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [957709105] [2024-11-28 04:29:44,401 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [957709105] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-28 04:29:44,401 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2061149748] [2024-11-28 04:29:44,401 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 04:29:44,401 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-28 04:29:44,401 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 04:29:44,406 INFO L229 MonitoredProcess]: Starting monitored process 75 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-28 04:29:44,407 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (75)] Waiting until timeout for monitored process [2024-11-28 04:29:44,599 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 04:29:44,601 INFO L256 TraceCheckSpWp]: Trace formula consists of 430 conjuncts, 32 conjuncts are in the unsatisfiable core [2024-11-28 04:29:44,605 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-28 04:29:44,635 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 13 [2024-11-28 04:29:44,702 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-28 04:29:44,765 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-28 04:29:44,834 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 13 [2024-11-28 04:29:44,947 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 1 [2024-11-28 04:29:44,992 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 58 treesize of output 38 [2024-11-28 04:29:45,119 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 33 [2024-11-28 04:29:45,220 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 33 [2024-11-28 04:29:45,325 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 33 [2024-11-28 04:29:45,416 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 33 [2024-11-28 04:29:45,493 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 27 [2024-11-28 04:29:45,496 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2024-11-28 04:29:45,535 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-28 04:29:45,892 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 53 treesize of output 37 [2024-11-28 04:29:46,190 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2061149748] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-28 04:29:46,190 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-28 04:29:46,190 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 16, 16] total 37 [2024-11-28 04:29:46,190 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [846897585] [2024-11-28 04:29:46,191 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-28 04:29:46,191 INFO L752 eck$LassoCheckResult]: stem already infeasible [2024-11-28 04:29:46,191 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 04:29:46,191 INFO L85 PathProgramCache]: Analyzing trace with hash 503198201, now seen corresponding path program 5 times [2024-11-28 04:29:46,191 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM [2024-11-28 04:29:46,192 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [499014348] [2024-11-28 04:29:46,192 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 04:29:46,192 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 04:29:46,208 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-28 04:29:46,209 INFO L357 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-28 04:29:46,217 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-28 04:29:46,222 INFO L130 FreeRefinementEngine]: Strategy CAMEL_NO_AM found a feasible trace [2024-11-28 04:29:47,490 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL_NO_AM [2024-11-28 04:29:47,491 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 38 interpolants. [2024-11-28 04:29:47,492 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=193, Invalid=1213, Unknown=0, NotChecked=0, Total=1406 [2024-11-28 04:29:47,492 INFO L87 Difference]: Start difference. First operand 74 states and 77 transitions. cyclomatic complexity: 6 Second operand has 38 states, 37 states have (on average 3.27027027027027) internal successors, (121), 38 states have internal predecessors, (121), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 04:29:48,328 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 04:29:48,328 INFO L93 Difference]: Finished difference Result 96 states and 99 transitions. [2024-11-28 04:29:48,328 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 96 states and 99 transitions. [2024-11-28 04:29:48,329 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 30 [2024-11-28 04:29:48,330 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 96 states to 92 states and 95 transitions. [2024-11-28 04:29:48,330 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 44 [2024-11-28 04:29:48,330 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 44 [2024-11-28 04:29:48,330 INFO L73 IsDeterministic]: Start isDeterministic. Operand 92 states and 95 transitions. [2024-11-28 04:29:48,330 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-11-28 04:29:48,330 INFO L218 hiAutomatonCegarLoop]: Abstraction has 92 states and 95 transitions. [2024-11-28 04:29:48,330 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 92 states and 95 transitions. [2024-11-28 04:29:48,333 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 92 to 84. [2024-11-28 04:29:48,334 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 84 states, 84 states have (on average 1.0357142857142858) internal successors, (87), 83 states have internal predecessors, (87), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 04:29:48,334 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 84 states to 84 states and 87 transitions. [2024-11-28 04:29:48,335 INFO L240 hiAutomatonCegarLoop]: Abstraction has 84 states and 87 transitions. [2024-11-28 04:29:48,335 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2024-11-28 04:29:48,336 INFO L425 stractBuchiCegarLoop]: Abstraction has 84 states and 87 transitions. [2024-11-28 04:29:48,336 INFO L332 stractBuchiCegarLoop]: ======== Iteration 14 ============ [2024-11-28 04:29:48,336 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 84 states and 87 transitions. [2024-11-28 04:29:48,336 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 30 [2024-11-28 04:29:48,337 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-28 04:29:48,337 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-28 04:29:48,338 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [10, 10, 10, 10, 8, 2, 1, 1, 1, 1] [2024-11-28 04:29:48,338 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [6, 6, 6, 6, 5, 1] [2024-11-28 04:29:48,338 INFO L747 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~nondet4#1, main_#t~nondet5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~mem8#1, main_#t~short9#1, main_#t~malloc10#1.base, main_#t~malloc10#1.offset, main_#t~mem11#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~nondet14#1, main_#t~short15#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~id~0#1.base, main_~id~0#1.offset, main_~maxId~0#1.base, main_~maxId~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~id~0#1.base, main_~id~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~maxId~0#1.base, main_~maxId~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset;havoc main_#t~nondet4#1;call write~int#0(main_#t~nondet4#1, main_~id~0#1.base, main_~id~0#1.offset, 4);havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;call write~int#1(main_#t~nondet5#1, main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);havoc main_#t~nondet5#1;call main_#t~mem6#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short9#1 := 0 <= main_#t~mem6#1;" "assume main_#t~short9#1;call main_#t~mem7#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);call main_#t~mem8#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);main_#t~short9#1 := main_#t~mem7#1 < main_#t~mem8#1;" "assume main_#t~short9#1;havoc main_#t~mem6#1;havoc main_#t~mem7#1;havoc main_#t~mem8#1;havoc main_#t~short9#1;call main_#t~malloc10#1.base, main_#t~malloc10#1.offset := #Ultimate.allocOnStack(4);main_~tmp~0#1.base, main_~tmp~0#1.offset := main_#t~malloc10#1.base, main_#t~malloc10#1.offset;call main_#t~mem11#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);call write~int#2(1 + main_#t~mem11#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem11#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#2(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#2(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);" [2024-11-28 04:29:48,338 INFO L749 eck$LassoCheckResult]: Loop: "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#2(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);" [2024-11-28 04:29:48,338 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 04:29:48,338 INFO L85 PathProgramCache]: Analyzing trace with hash 1875146477, now seen corresponding path program 11 times [2024-11-28 04:29:48,338 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM [2024-11-28 04:29:48,338 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [868040168] [2024-11-28 04:29:48,339 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 04:29:48,339 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 04:29:48,377 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 04:29:50,009 INFO L136 FreeRefinementEngine]: Strategy CAMEL_NO_AM found an infeasible trace [2024-11-28 04:29:50,010 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [868040168] [2024-11-28 04:29:50,010 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [868040168] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-28 04:29:50,010 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1291508099] [2024-11-28 04:29:50,010 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 04:29:50,010 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-28 04:29:50,011 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 04:29:50,014 INFO L229 MonitoredProcess]: Starting monitored process 76 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-28 04:29:50,017 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (76)] Waiting until timeout for monitored process [2024-11-28 04:29:50,264 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 04:29:50,270 INFO L256 TraceCheckSpWp]: Trace formula consists of 467 conjuncts, 34 conjuncts are in the unsatisfiable core [2024-11-28 04:29:50,275 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-28 04:29:50,280 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 13 [2024-11-28 04:29:50,299 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-28 04:29:50,352 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-28 04:29:50,461 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 28 [2024-11-28 04:29:50,540 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 13 [2024-11-28 04:29:50,660 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 31 [2024-11-28 04:29:50,718 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-28 04:29:50,738 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-28 04:29:50,754 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-28 04:29:50,812 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 29 [2024-11-28 04:29:50,856 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 13 [2024-11-28 04:29:50,862 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 9 [2024-11-28 04:29:50,864 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-28 04:29:51,007 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 18 [2024-11-28 04:29:51,195 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 20 [2024-11-28 04:29:51,229 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1291508099] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-28 04:29:51,229 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-28 04:29:51,229 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 16, 16] total 29 [2024-11-28 04:29:51,229 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [432055555] [2024-11-28 04:29:51,229 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-28 04:29:51,230 INFO L752 eck$LassoCheckResult]: stem already infeasible [2024-11-28 04:29:51,230 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 04:29:51,230 INFO L85 PathProgramCache]: Analyzing trace with hash 881941827, now seen corresponding path program 6 times [2024-11-28 04:29:51,230 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM [2024-11-28 04:29:51,230 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [57426297] [2024-11-28 04:29:51,230 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 04:29:51,230 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 04:29:51,247 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-28 04:29:51,247 INFO L357 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-28 04:29:51,255 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-28 04:29:51,260 INFO L130 FreeRefinementEngine]: Strategy CAMEL_NO_AM found a feasible trace [2024-11-28 04:29:53,412 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL_NO_AM [2024-11-28 04:29:53,413 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 30 interpolants. [2024-11-28 04:29:53,413 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=87, Invalid=783, Unknown=0, NotChecked=0, Total=870 [2024-11-28 04:29:53,413 INFO L87 Difference]: Start difference. First operand 84 states and 87 transitions. cyclomatic complexity: 6 Second operand has 30 states, 29 states have (on average 3.0689655172413794) internal successors, (89), 30 states have internal predecessors, (89), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 04:29:55,105 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 04:29:55,105 INFO L93 Difference]: Finished difference Result 127 states and 131 transitions. [2024-11-28 04:29:55,105 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 127 states and 131 transitions. [2024-11-28 04:29:55,106 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 30 [2024-11-28 04:29:55,107 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 127 states to 93 states and 96 transitions. [2024-11-28 04:29:55,107 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 44 [2024-11-28 04:29:55,108 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 44 [2024-11-28 04:29:55,108 INFO L73 IsDeterministic]: Start isDeterministic. Operand 93 states and 96 transitions. [2024-11-28 04:29:55,108 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-11-28 04:29:55,108 INFO L218 hiAutomatonCegarLoop]: Abstraction has 93 states and 96 transitions. [2024-11-28 04:29:55,108 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 93 states and 96 transitions. [2024-11-28 04:29:55,111 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 93 to 89. [2024-11-28 04:29:55,111 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 89 states, 89 states have (on average 1.0337078651685394) internal successors, (92), 88 states have internal predecessors, (92), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 04:29:55,112 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 89 states to 89 states and 92 transitions. [2024-11-28 04:29:55,112 INFO L240 hiAutomatonCegarLoop]: Abstraction has 89 states and 92 transitions. [2024-11-28 04:29:55,112 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2024-11-28 04:29:55,113 INFO L425 stractBuchiCegarLoop]: Abstraction has 89 states and 92 transitions. [2024-11-28 04:29:55,113 INFO L332 stractBuchiCegarLoop]: ======== Iteration 15 ============ [2024-11-28 04:29:55,113 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 89 states and 92 transitions. [2024-11-28 04:29:55,114 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 30 [2024-11-28 04:29:55,114 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-28 04:29:55,114 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-28 04:29:55,120 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [11, 11, 11, 11, 9, 2, 1, 1, 1, 1] [2024-11-28 04:29:55,120 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [6, 6, 6, 6, 5, 1] [2024-11-28 04:29:55,120 INFO L747 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~nondet4#1, main_#t~nondet5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~mem8#1, main_#t~short9#1, main_#t~malloc10#1.base, main_#t~malloc10#1.offset, main_#t~mem11#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~nondet14#1, main_#t~short15#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~id~0#1.base, main_~id~0#1.offset, main_~maxId~0#1.base, main_~maxId~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~id~0#1.base, main_~id~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~maxId~0#1.base, main_~maxId~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset;havoc main_#t~nondet4#1;call write~int#0(main_#t~nondet4#1, main_~id~0#1.base, main_~id~0#1.offset, 4);havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;call write~int#1(main_#t~nondet5#1, main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);havoc main_#t~nondet5#1;call main_#t~mem6#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short9#1 := 0 <= main_#t~mem6#1;" "assume main_#t~short9#1;call main_#t~mem7#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);call main_#t~mem8#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);main_#t~short9#1 := main_#t~mem7#1 < main_#t~mem8#1;" "assume main_#t~short9#1;havoc main_#t~mem6#1;havoc main_#t~mem7#1;havoc main_#t~mem8#1;havoc main_#t~short9#1;call main_#t~malloc10#1.base, main_#t~malloc10#1.offset := #Ultimate.allocOnStack(4);main_~tmp~0#1.base, main_~tmp~0#1.offset := main_#t~malloc10#1.base, main_#t~malloc10#1.offset;call main_#t~mem11#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);call write~int#2(1 + main_#t~mem11#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem11#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#2(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#2(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);" [2024-11-28 04:29:55,120 INFO L749 eck$LassoCheckResult]: Loop: "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#2(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);" [2024-11-28 04:29:55,120 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 04:29:55,121 INFO L85 PathProgramCache]: Analyzing trace with hash -104386413, now seen corresponding path program 12 times [2024-11-28 04:29:55,121 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM [2024-11-28 04:29:55,121 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1251176502] [2024-11-28 04:29:55,121 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 04:29:55,121 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 04:29:55,163 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 04:29:56,469 INFO L136 FreeRefinementEngine]: Strategy CAMEL_NO_AM found an infeasible trace [2024-11-28 04:29:56,469 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1251176502] [2024-11-28 04:29:56,469 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1251176502] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-28 04:29:56,469 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1812899480] [2024-11-28 04:29:56,469 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 04:29:56,470 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-28 04:29:56,470 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 04:29:56,472 INFO L229 MonitoredProcess]: Starting monitored process 77 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-28 04:29:56,474 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (77)] Waiting until timeout for monitored process [2024-11-28 04:29:56,698 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 04:29:56,700 INFO L256 TraceCheckSpWp]: Trace formula consists of 504 conjuncts, 40 conjuncts are in the unsatisfiable core [2024-11-28 04:29:56,703 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-28 04:29:56,736 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 13 [2024-11-28 04:29:56,801 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-28 04:29:56,865 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-28 04:29:56,925 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 13 [2024-11-28 04:29:57,073 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 1 [2024-11-28 04:29:57,256 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 21 [2024-11-28 04:29:57,310 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 72 treesize of output 48 [2024-11-28 04:29:57,518 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 71 treesize of output 47 [2024-11-28 04:29:57,665 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 71 treesize of output 47 [2024-11-28 04:29:57,815 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 71 treesize of output 47 [2024-11-28 04:29:57,944 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 71 treesize of output 47 [2024-11-28 04:29:58,068 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 41 [2024-11-28 04:29:58,071 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 42 treesize of output 26 [2024-11-28 04:29:58,122 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-28 04:29:58,674 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 53 treesize of output 37 [2024-11-28 04:29:59,018 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1812899480] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-28 04:29:59,018 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-28 04:29:59,019 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 19, 19] total 45 [2024-11-28 04:29:59,019 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [696299874] [2024-11-28 04:29:59,019 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-28 04:29:59,019 INFO L752 eck$LassoCheckResult]: stem already infeasible [2024-11-28 04:29:59,019 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 04:29:59,019 INFO L85 PathProgramCache]: Analyzing trace with hash 881941827, now seen corresponding path program 7 times [2024-11-28 04:29:59,020 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM [2024-11-28 04:29:59,020 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [816052396] [2024-11-28 04:29:59,020 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 04:29:59,020 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 04:29:59,036 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-28 04:29:59,036 INFO L357 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-28 04:29:59,072 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-28 04:29:59,077 INFO L130 FreeRefinementEngine]: Strategy CAMEL_NO_AM found a feasible trace [2024-11-28 04:30:01,051 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL_NO_AM [2024-11-28 04:30:01,051 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 46 interpolants. [2024-11-28 04:30:01,052 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=290, Invalid=1780, Unknown=0, NotChecked=0, Total=2070 [2024-11-28 04:30:01,053 INFO L87 Difference]: Start difference. First operand 89 states and 92 transitions. cyclomatic complexity: 6 Second operand has 46 states, 45 states have (on average 3.1777777777777776) internal successors, (143), 46 states have internal predecessors, (143), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 04:30:02,848 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 04:30:02,848 INFO L93 Difference]: Finished difference Result 125 states and 128 transitions. [2024-11-28 04:30:02,848 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 125 states and 128 transitions. [2024-11-28 04:30:02,849 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 40 [2024-11-28 04:30:02,850 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 125 states to 117 states and 120 transitions. [2024-11-28 04:30:02,850 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 54 [2024-11-28 04:30:02,850 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 54 [2024-11-28 04:30:02,850 INFO L73 IsDeterministic]: Start isDeterministic. Operand 117 states and 120 transitions. [2024-11-28 04:30:02,851 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-11-28 04:30:02,851 INFO L218 hiAutomatonCegarLoop]: Abstraction has 117 states and 120 transitions. [2024-11-28 04:30:02,851 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 117 states and 120 transitions. [2024-11-28 04:30:02,854 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 117 to 109. [2024-11-28 04:30:02,855 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 109 states, 109 states have (on average 1.0275229357798166) internal successors, (112), 108 states have internal predecessors, (112), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 04:30:02,855 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 109 states to 109 states and 112 transitions. [2024-11-28 04:30:02,855 INFO L240 hiAutomatonCegarLoop]: Abstraction has 109 states and 112 transitions. [2024-11-28 04:30:02,860 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 33 states. [2024-11-28 04:30:02,861 INFO L425 stractBuchiCegarLoop]: Abstraction has 109 states and 112 transitions. [2024-11-28 04:30:02,861 INFO L332 stractBuchiCegarLoop]: ======== Iteration 16 ============ [2024-11-28 04:30:02,861 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 109 states and 112 transitions. [2024-11-28 04:30:02,862 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 40 [2024-11-28 04:30:02,862 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-28 04:30:02,862 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-28 04:30:02,863 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [13, 13, 13, 13, 11, 2, 1, 1, 1, 1] [2024-11-28 04:30:02,863 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [8, 8, 8, 8, 7, 1] [2024-11-28 04:30:02,863 INFO L747 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~nondet4#1, main_#t~nondet5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~mem8#1, main_#t~short9#1, main_#t~malloc10#1.base, main_#t~malloc10#1.offset, main_#t~mem11#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~nondet14#1, main_#t~short15#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~id~0#1.base, main_~id~0#1.offset, main_~maxId~0#1.base, main_~maxId~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~id~0#1.base, main_~id~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~maxId~0#1.base, main_~maxId~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset;havoc main_#t~nondet4#1;call write~int#0(main_#t~nondet4#1, main_~id~0#1.base, main_~id~0#1.offset, 4);havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;call write~int#1(main_#t~nondet5#1, main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);havoc main_#t~nondet5#1;call main_#t~mem6#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short9#1 := 0 <= main_#t~mem6#1;" "assume main_#t~short9#1;call main_#t~mem7#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);call main_#t~mem8#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);main_#t~short9#1 := main_#t~mem7#1 < main_#t~mem8#1;" "assume main_#t~short9#1;havoc main_#t~mem6#1;havoc main_#t~mem7#1;havoc main_#t~mem8#1;havoc main_#t~short9#1;call main_#t~malloc10#1.base, main_#t~malloc10#1.offset := #Ultimate.allocOnStack(4);main_~tmp~0#1.base, main_~tmp~0#1.offset := main_#t~malloc10#1.base, main_#t~malloc10#1.offset;call main_#t~mem11#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);call write~int#2(1 + main_#t~mem11#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem11#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#2(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#2(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);" [2024-11-28 04:30:02,864 INFO L749 eck$LassoCheckResult]: Loop: "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#2(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);" [2024-11-28 04:30:02,864 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 04:30:02,864 INFO L85 PathProgramCache]: Analyzing trace with hash 1564390995, now seen corresponding path program 13 times [2024-11-28 04:30:02,868 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM [2024-11-28 04:30:02,868 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [834185700] [2024-11-28 04:30:02,868 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 04:30:02,868 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 04:30:02,916 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 04:30:05,453 INFO L136 FreeRefinementEngine]: Strategy CAMEL_NO_AM found an infeasible trace [2024-11-28 04:30:05,454 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [834185700] [2024-11-28 04:30:05,454 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [834185700] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-28 04:30:05,454 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [383270774] [2024-11-28 04:30:05,454 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 04:30:05,454 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-28 04:30:05,454 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 04:30:05,458 INFO L229 MonitoredProcess]: Starting monitored process 78 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-28 04:30:05,461 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (78)] Waiting until timeout for monitored process [2024-11-28 04:30:05,775 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 04:30:05,778 INFO L256 TraceCheckSpWp]: Trace formula consists of 578 conjuncts, 38 conjuncts are in the unsatisfiable core [2024-11-28 04:30:05,783 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-28 04:30:05,787 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 13 [2024-11-28 04:30:05,843 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-28 04:30:05,896 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-28 04:30:05,946 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-28 04:30:06,046 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 28 [2024-11-28 04:30:06,113 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-28 04:30:06,230 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 31 [2024-11-28 04:30:06,295 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-28 04:30:06,311 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-28 04:30:06,328 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-28 04:30:06,344 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-28 04:30:06,420 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 29 [2024-11-28 04:30:06,482 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 13 [2024-11-28 04:30:06,486 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 9 [2024-11-28 04:30:06,489 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-28 04:30:06,668 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 18 [2024-11-28 04:30:06,886 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 20 [2024-11-28 04:30:06,945 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [383270774] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-28 04:30:06,945 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-28 04:30:06,945 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [20, 18, 18] total 33 [2024-11-28 04:30:06,946 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [187759086] [2024-11-28 04:30:06,946 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-28 04:30:06,946 INFO L752 eck$LassoCheckResult]: stem already infeasible [2024-11-28 04:30:06,946 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 04:30:06,946 INFO L85 PathProgramCache]: Analyzing trace with hash -813906173, now seen corresponding path program 8 times [2024-11-28 04:30:06,947 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM [2024-11-28 04:30:06,947 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1556366449] [2024-11-28 04:30:06,947 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 04:30:06,947 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 04:30:06,966 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-28 04:30:06,966 INFO L357 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-28 04:30:06,978 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-28 04:30:06,991 INFO L130 FreeRefinementEngine]: Strategy CAMEL_NO_AM found a feasible trace [2024-11-28 04:30:12,769 WARN L286 SmtUtils]: Spent 5.77s on a formula simplification. DAG size of input: 284 DAG size of output: 214 (called from [L 276] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.cfg.transitions.TransFormulaUtils.sequentialComposition) [2024-11-28 04:30:12,966 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL_NO_AM [2024-11-28 04:30:12,967 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 34 interpolants. [2024-11-28 04:30:12,967 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=97, Invalid=1025, Unknown=0, NotChecked=0, Total=1122 [2024-11-28 04:30:12,967 INFO L87 Difference]: Start difference. First operand 109 states and 112 transitions. cyclomatic complexity: 6 Second operand has 34 states, 33 states have (on average 3.393939393939394) internal successors, (112), 34 states have internal predecessors, (112), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 04:30:16,006 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 04:30:16,006 INFO L93 Difference]: Finished difference Result 162 states and 166 transitions. [2024-11-28 04:30:16,007 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 162 states and 166 transitions. [2024-11-28 04:30:16,008 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 40 [2024-11-28 04:30:16,009 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 162 states to 118 states and 121 transitions. [2024-11-28 04:30:16,009 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 54 [2024-11-28 04:30:16,009 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 54 [2024-11-28 04:30:16,009 INFO L73 IsDeterministic]: Start isDeterministic. Operand 118 states and 121 transitions. [2024-11-28 04:30:16,011 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-11-28 04:30:16,011 INFO L218 hiAutomatonCegarLoop]: Abstraction has 118 states and 121 transitions. [2024-11-28 04:30:16,012 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 118 states and 121 transitions. [2024-11-28 04:30:16,015 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 118 to 114. [2024-11-28 04:30:16,015 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 114 states, 114 states have (on average 1.0263157894736843) internal successors, (117), 113 states have internal predecessors, (117), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 04:30:16,016 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 114 states to 114 states and 117 transitions. [2024-11-28 04:30:16,016 INFO L240 hiAutomatonCegarLoop]: Abstraction has 114 states and 117 transitions. [2024-11-28 04:30:16,023 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 43 states. [2024-11-28 04:30:16,024 INFO L425 stractBuchiCegarLoop]: Abstraction has 114 states and 117 transitions. [2024-11-28 04:30:16,025 INFO L332 stractBuchiCegarLoop]: ======== Iteration 17 ============ [2024-11-28 04:30:16,025 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 114 states and 117 transitions. [2024-11-28 04:30:16,026 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 40 [2024-11-28 04:30:16,026 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-28 04:30:16,026 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-28 04:30:16,030 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [14, 14, 14, 14, 12, 2, 1, 1, 1, 1] [2024-11-28 04:30:16,030 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [8, 8, 8, 8, 7, 1] [2024-11-28 04:30:16,030 INFO L747 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~nondet4#1, main_#t~nondet5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~mem8#1, main_#t~short9#1, main_#t~malloc10#1.base, main_#t~malloc10#1.offset, main_#t~mem11#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~nondet14#1, main_#t~short15#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~id~0#1.base, main_~id~0#1.offset, main_~maxId~0#1.base, main_~maxId~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~id~0#1.base, main_~id~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~maxId~0#1.base, main_~maxId~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset;havoc main_#t~nondet4#1;call write~int#0(main_#t~nondet4#1, main_~id~0#1.base, main_~id~0#1.offset, 4);havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;call write~int#1(main_#t~nondet5#1, main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);havoc main_#t~nondet5#1;call main_#t~mem6#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short9#1 := 0 <= main_#t~mem6#1;" "assume main_#t~short9#1;call main_#t~mem7#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);call main_#t~mem8#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);main_#t~short9#1 := main_#t~mem7#1 < main_#t~mem8#1;" "assume main_#t~short9#1;havoc main_#t~mem6#1;havoc main_#t~mem7#1;havoc main_#t~mem8#1;havoc main_#t~short9#1;call main_#t~malloc10#1.base, main_#t~malloc10#1.offset := #Ultimate.allocOnStack(4);main_~tmp~0#1.base, main_~tmp~0#1.offset := main_#t~malloc10#1.base, main_#t~malloc10#1.offset;call main_#t~mem11#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);call write~int#2(1 + main_#t~mem11#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem11#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#2(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#2(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);" [2024-11-28 04:30:16,032 INFO L749 eck$LassoCheckResult]: Loop: "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#2(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);" [2024-11-28 04:30:16,032 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 04:30:16,032 INFO L85 PathProgramCache]: Analyzing trace with hash -51856403, now seen corresponding path program 14 times [2024-11-28 04:30:16,032 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM [2024-11-28 04:30:16,033 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1422100149] [2024-11-28 04:30:16,033 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 04:30:16,033 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 04:30:16,084 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 04:30:18,047 INFO L136 FreeRefinementEngine]: Strategy CAMEL_NO_AM found an infeasible trace [2024-11-28 04:30:18,048 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1422100149] [2024-11-28 04:30:18,048 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1422100149] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-28 04:30:18,048 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1982528134] [2024-11-28 04:30:18,048 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 04:30:18,048 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-28 04:30:18,048 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 04:30:18,050 INFO L229 MonitoredProcess]: Starting monitored process 79 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-28 04:30:18,052 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (79)] Waiting until timeout for monitored process [2024-11-28 04:30:18,349 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 04:30:18,352 INFO L256 TraceCheckSpWp]: Trace formula consists of 615 conjuncts, 42 conjuncts are in the unsatisfiable core [2024-11-28 04:30:18,357 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-28 04:30:18,362 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 13 [2024-11-28 04:30:18,380 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-28 04:30:18,396 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-28 04:30:18,412 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-28 04:30:18,428 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-28 04:30:18,497 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 28 [2024-11-28 04:30:18,573 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 13 [2024-11-28 04:30:18,681 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 31 [2024-11-28 04:30:18,756 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-28 04:30:18,774 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-28 04:30:18,792 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-28 04:30:18,809 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-28 04:30:18,826 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-28 04:30:18,898 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 29 [2024-11-28 04:30:18,949 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 13 [2024-11-28 04:30:18,952 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 9 [2024-11-28 04:30:18,954 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-28 04:30:19,165 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 18 [2024-11-28 04:30:19,369 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 20 [2024-11-28 04:30:19,434 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1982528134] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-28 04:30:19,434 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-28 04:30:19,434 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [21, 20, 20] total 31 [2024-11-28 04:30:19,434 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1297375454] [2024-11-28 04:30:19,434 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-28 04:30:19,435 INFO L752 eck$LassoCheckResult]: stem already infeasible [2024-11-28 04:30:19,435 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 04:30:19,435 INFO L85 PathProgramCache]: Analyzing trace with hash -813906173, now seen corresponding path program 9 times [2024-11-28 04:30:19,436 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM [2024-11-28 04:30:19,436 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1812679992] [2024-11-28 04:30:19,436 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 04:30:19,436 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 04:30:19,461 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-28 04:30:19,461 INFO L357 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-28 04:30:19,472 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-28 04:30:19,478 INFO L130 FreeRefinementEngine]: Strategy CAMEL_NO_AM found a feasible trace [2024-11-28 04:30:25,342 WARN L286 SmtUtils]: Spent 5.86s on a formula simplification. DAG size of input: 284 DAG size of output: 214 (called from [L 276] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.cfg.transitions.TransFormulaUtils.sequentialComposition) [2024-11-28 04:30:25,547 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL_NO_AM [2024-11-28 04:30:25,547 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 32 interpolants. [2024-11-28 04:30:25,547 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=88, Invalid=904, Unknown=0, NotChecked=0, Total=992 [2024-11-28 04:30:25,548 INFO L87 Difference]: Start difference. First operand 114 states and 117 transitions. cyclomatic complexity: 6 Second operand has 32 states, 31 states have (on average 3.225806451612903) internal successors, (100), 32 states have internal predecessors, (100), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 04:30:27,337 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 04:30:27,337 INFO L93 Difference]: Finished difference Result 167 states and 171 transitions. [2024-11-28 04:30:27,337 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 167 states and 171 transitions. [2024-11-28 04:30:27,338 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 40 [2024-11-28 04:30:27,340 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 167 states to 123 states and 126 transitions. [2024-11-28 04:30:27,340 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 54 [2024-11-28 04:30:27,340 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 54 [2024-11-28 04:30:27,340 INFO L73 IsDeterministic]: Start isDeterministic. Operand 123 states and 126 transitions. [2024-11-28 04:30:27,340 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-11-28 04:30:27,341 INFO L218 hiAutomatonCegarLoop]: Abstraction has 123 states and 126 transitions. [2024-11-28 04:30:27,341 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 123 states and 126 transitions. [2024-11-28 04:30:27,344 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 123 to 119. [2024-11-28 04:30:27,344 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 119 states, 119 states have (on average 1.0252100840336134) internal successors, (122), 118 states have internal predecessors, (122), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 04:30:27,345 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 119 states to 119 states and 122 transitions. [2024-11-28 04:30:27,345 INFO L240 hiAutomatonCegarLoop]: Abstraction has 119 states and 122 transitions. [2024-11-28 04:30:27,350 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 33 states. [2024-11-28 04:30:27,351 INFO L425 stractBuchiCegarLoop]: Abstraction has 119 states and 122 transitions. [2024-11-28 04:30:27,351 INFO L332 stractBuchiCegarLoop]: ======== Iteration 18 ============ [2024-11-28 04:30:27,351 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 119 states and 122 transitions. [2024-11-28 04:30:27,352 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 40 [2024-11-28 04:30:27,352 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-28 04:30:27,352 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-28 04:30:27,353 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [15, 15, 15, 15, 13, 2, 1, 1, 1, 1] [2024-11-28 04:30:27,353 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [8, 8, 8, 8, 7, 1] [2024-11-28 04:30:27,353 INFO L747 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~nondet4#1, main_#t~nondet5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~mem8#1, main_#t~short9#1, main_#t~malloc10#1.base, main_#t~malloc10#1.offset, main_#t~mem11#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~nondet14#1, main_#t~short15#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~id~0#1.base, main_~id~0#1.offset, main_~maxId~0#1.base, main_~maxId~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~id~0#1.base, main_~id~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~maxId~0#1.base, main_~maxId~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset;havoc main_#t~nondet4#1;call write~int#0(main_#t~nondet4#1, main_~id~0#1.base, main_~id~0#1.offset, 4);havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;call write~int#1(main_#t~nondet5#1, main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);havoc main_#t~nondet5#1;call main_#t~mem6#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short9#1 := 0 <= main_#t~mem6#1;" "assume main_#t~short9#1;call main_#t~mem7#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);call main_#t~mem8#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);main_#t~short9#1 := main_#t~mem7#1 < main_#t~mem8#1;" "assume main_#t~short9#1;havoc main_#t~mem6#1;havoc main_#t~mem7#1;havoc main_#t~mem8#1;havoc main_#t~short9#1;call main_#t~malloc10#1.base, main_#t~malloc10#1.offset := #Ultimate.allocOnStack(4);main_~tmp~0#1.base, main_~tmp~0#1.offset := main_#t~malloc10#1.base, main_#t~malloc10#1.offset;call main_#t~mem11#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);call write~int#2(1 + main_#t~mem11#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem11#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#2(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#2(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);" [2024-11-28 04:30:27,354 INFO L749 eck$LassoCheckResult]: Loop: "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#2(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);" [2024-11-28 04:30:27,354 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 04:30:27,358 INFO L85 PathProgramCache]: Analyzing trace with hash 646194835, now seen corresponding path program 15 times [2024-11-28 04:30:27,358 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM [2024-11-28 04:30:27,359 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1711163198] [2024-11-28 04:30:27,359 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 04:30:27,359 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 04:30:27,409 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 04:30:29,482 INFO L136 FreeRefinementEngine]: Strategy CAMEL_NO_AM found an infeasible trace [2024-11-28 04:30:29,482 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1711163198] [2024-11-28 04:30:29,482 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1711163198] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-28 04:30:29,482 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1806875684] [2024-11-28 04:30:29,483 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 04:30:29,483 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-28 04:30:29,483 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 04:30:29,485 INFO L229 MonitoredProcess]: Starting monitored process 80 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-28 04:30:29,486 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (80)] Waiting until timeout for monitored process [2024-11-28 04:30:29,801 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 04:30:29,804 INFO L256 TraceCheckSpWp]: Trace formula consists of 652 conjuncts, 44 conjuncts are in the unsatisfiable core [2024-11-28 04:30:29,809 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-28 04:30:29,835 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 13 [2024-11-28 04:30:29,884 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-28 04:30:29,960 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-28 04:30:30,071 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-28 04:30:30,187 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-28 04:30:30,299 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-28 04:30:30,386 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 13 [2024-11-28 04:30:30,525 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 1 [2024-11-28 04:30:30,577 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 58 treesize of output 38 [2024-11-28 04:30:30,743 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 33 [2024-11-28 04:30:30,848 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 33 [2024-11-28 04:30:30,958 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 33 [2024-11-28 04:30:31,073 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 33 [2024-11-28 04:30:31,212 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 33 [2024-11-28 04:30:31,340 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 33 [2024-11-28 04:30:31,456 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 33 [2024-11-28 04:30:31,563 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-28 04:30:31,566 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-28 04:30:31,622 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-28 04:30:32,243 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 53 treesize of output 37 [2024-11-28 04:30:33,016 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1806875684] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-28 04:30:33,016 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-28 04:30:33,016 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [22, 22, 22] total 51 [2024-11-28 04:30:33,016 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1222705299] [2024-11-28 04:30:33,016 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-28 04:30:33,017 INFO L752 eck$LassoCheckResult]: stem already infeasible [2024-11-28 04:30:33,017 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 04:30:33,017 INFO L85 PathProgramCache]: Analyzing trace with hash -813906173, now seen corresponding path program 10 times [2024-11-28 04:30:33,017 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM [2024-11-28 04:30:33,018 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [911005239] [2024-11-28 04:30:33,018 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 04:30:33,018 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 04:30:33,040 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-28 04:30:33,040 INFO L357 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-28 04:30:33,052 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-28 04:30:33,058 INFO L130 FreeRefinementEngine]: Strategy CAMEL_NO_AM found a feasible trace [2024-11-28 04:30:38,800 WARN L286 SmtUtils]: Spent 5.74s on a formula simplification. DAG size of input: 284 DAG size of output: 214 (called from [L 276] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.cfg.transitions.TransFormulaUtils.sequentialComposition) [2024-11-28 04:30:39,039 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL_NO_AM [2024-11-28 04:30:39,040 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 52 interpolants. [2024-11-28 04:30:39,040 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=360, Invalid=2292, Unknown=0, NotChecked=0, Total=2652 [2024-11-28 04:30:39,041 INFO L87 Difference]: Start difference. First operand 119 states and 122 transitions. cyclomatic complexity: 6 Second operand has 52 states, 51 states have (on average 3.7450980392156863) internal successors, (191), 52 states have internal predecessors, (191), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 04:30:40,695 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 04:30:40,695 INFO L93 Difference]: Finished difference Result 141 states and 144 transitions. [2024-11-28 04:30:40,695 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 141 states and 144 transitions. [2024-11-28 04:30:40,697 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 45 [2024-11-28 04:30:40,698 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 141 states to 137 states and 140 transitions. [2024-11-28 04:30:40,698 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 59 [2024-11-28 04:30:40,698 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 59 [2024-11-28 04:30:40,699 INFO L73 IsDeterministic]: Start isDeterministic. Operand 137 states and 140 transitions. [2024-11-28 04:30:40,699 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-11-28 04:30:40,699 INFO L218 hiAutomatonCegarLoop]: Abstraction has 137 states and 140 transitions. [2024-11-28 04:30:40,699 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 137 states and 140 transitions. [2024-11-28 04:30:40,702 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 137 to 129. [2024-11-28 04:30:40,702 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 129 states, 129 states have (on average 1.0232558139534884) internal successors, (132), 128 states have internal predecessors, (132), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 04:30:40,703 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 129 states to 129 states and 132 transitions. [2024-11-28 04:30:40,703 INFO L240 hiAutomatonCegarLoop]: Abstraction has 129 states and 132 transitions. [2024-11-28 04:30:40,704 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 32 states. [2024-11-28 04:30:40,706 INFO L425 stractBuchiCegarLoop]: Abstraction has 129 states and 132 transitions. [2024-11-28 04:30:40,706 INFO L332 stractBuchiCegarLoop]: ======== Iteration 19 ============ [2024-11-28 04:30:40,706 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 129 states and 132 transitions. [2024-11-28 04:30:40,707 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 45 [2024-11-28 04:30:40,708 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-28 04:30:40,708 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-28 04:30:40,709 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [16, 16, 16, 16, 14, 2, 1, 1, 1, 1] [2024-11-28 04:30:40,709 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [9, 9, 9, 9, 8, 1] [2024-11-28 04:30:40,709 INFO L747 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~nondet4#1, main_#t~nondet5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~mem8#1, main_#t~short9#1, main_#t~malloc10#1.base, main_#t~malloc10#1.offset, main_#t~mem11#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~nondet14#1, main_#t~short15#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~id~0#1.base, main_~id~0#1.offset, main_~maxId~0#1.base, main_~maxId~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~id~0#1.base, main_~id~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~maxId~0#1.base, main_~maxId~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset;havoc main_#t~nondet4#1;call write~int#0(main_#t~nondet4#1, main_~id~0#1.base, main_~id~0#1.offset, 4);havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;call write~int#1(main_#t~nondet5#1, main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);havoc main_#t~nondet5#1;call main_#t~mem6#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short9#1 := 0 <= main_#t~mem6#1;" "assume main_#t~short9#1;call main_#t~mem7#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);call main_#t~mem8#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);main_#t~short9#1 := main_#t~mem7#1 < main_#t~mem8#1;" "assume main_#t~short9#1;havoc main_#t~mem6#1;havoc main_#t~mem7#1;havoc main_#t~mem8#1;havoc main_#t~short9#1;call main_#t~malloc10#1.base, main_#t~malloc10#1.offset := #Ultimate.allocOnStack(4);main_~tmp~0#1.base, main_~tmp~0#1.offset := main_#t~malloc10#1.base, main_#t~malloc10#1.offset;call main_#t~mem11#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);call write~int#2(1 + main_#t~mem11#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem11#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#2(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#2(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);" [2024-11-28 04:30:40,709 INFO L749 eck$LassoCheckResult]: Loop: "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#2(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);" [2024-11-28 04:30:40,710 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 04:30:40,712 INFO L85 PathProgramCache]: Analyzing trace with hash 476985577, now seen corresponding path program 16 times [2024-11-28 04:30:40,712 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM [2024-11-28 04:30:40,712 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1204774568] [2024-11-28 04:30:40,713 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 04:30:40,713 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 04:30:40,794 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 04:30:43,744 INFO L136 FreeRefinementEngine]: Strategy CAMEL_NO_AM found an infeasible trace [2024-11-28 04:30:43,744 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1204774568] [2024-11-28 04:30:43,745 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1204774568] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-28 04:30:43,745 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [90795271] [2024-11-28 04:30:43,745 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 04:30:43,746 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-28 04:30:43,746 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 04:30:43,751 INFO L229 MonitoredProcess]: Starting monitored process 81 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-28 04:30:43,753 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (81)] Waiting until timeout for monitored process [2024-11-28 04:30:44,101 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 04:30:44,104 INFO L256 TraceCheckSpWp]: Trace formula consists of 689 conjuncts, 46 conjuncts are in the unsatisfiable core [2024-11-28 04:30:44,110 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-28 04:30:44,114 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 13 [2024-11-28 04:30:44,166 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-28 04:30:44,215 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-28 04:30:44,270 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-28 04:30:44,326 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-28 04:30:44,384 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-28 04:30:44,530 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 28 [2024-11-28 04:30:44,619 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-28 04:30:44,755 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 31 [2024-11-28 04:30:44,837 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-28 04:30:44,862 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-28 04:30:44,884 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-28 04:30:44,907 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-28 04:30:44,931 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-28 04:30:44,954 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-28 04:30:45,040 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 29 [2024-11-28 04:30:45,098 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 13 [2024-11-28 04:30:45,103 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 9 [2024-11-28 04:30:45,110 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-28 04:30:45,362 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 18 [2024-11-28 04:30:45,622 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 20 [2024-11-28 04:30:45,709 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [90795271] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-28 04:30:45,710 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-28 04:30:45,710 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [23, 22, 22] total 39 [2024-11-28 04:30:45,710 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1390307085] [2024-11-28 04:30:45,710 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-28 04:30:45,711 INFO L752 eck$LassoCheckResult]: stem already infeasible [2024-11-28 04:30:45,711 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 04:30:45,711 INFO L85 PathProgramCache]: Analyzing trace with hash 351821433, now seen corresponding path program 11 times [2024-11-28 04:30:45,711 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM [2024-11-28 04:30:45,711 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [470890756] [2024-11-28 04:30:45,712 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 04:30:45,712 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 04:30:45,742 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-28 04:30:45,742 INFO L357 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-28 04:30:45,759 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-28 04:30:45,767 INFO L130 FreeRefinementEngine]: Strategy CAMEL_NO_AM found a feasible trace [2024-11-28 04:30:54,844 WARN L286 SmtUtils]: Spent 9.07s on a formula simplification. DAG size of input: 315 DAG size of output: 236 (called from [L 276] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.cfg.transitions.TransFormulaUtils.sequentialComposition) [2024-11-28 04:30:55,023 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL_NO_AM [2024-11-28 04:30:55,023 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 40 interpolants. [2024-11-28 04:30:55,024 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=115, Invalid=1445, Unknown=0, NotChecked=0, Total=1560 [2024-11-28 04:30:55,024 INFO L87 Difference]: Start difference. First operand 129 states and 132 transitions. cyclomatic complexity: 6 Second operand has 40 states, 39 states have (on average 3.5641025641025643) internal successors, (139), 40 states have internal predecessors, (139), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 04:30:59,345 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 04:30:59,345 INFO L93 Difference]: Finished difference Result 187 states and 191 transitions. [2024-11-28 04:30:59,345 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 187 states and 191 transitions. [2024-11-28 04:30:59,347 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 45 [2024-11-28 04:30:59,348 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 187 states to 138 states and 141 transitions. [2024-11-28 04:30:59,348 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 59 [2024-11-28 04:30:59,348 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 59 [2024-11-28 04:30:59,349 INFO L73 IsDeterministic]: Start isDeterministic. Operand 138 states and 141 transitions. [2024-11-28 04:30:59,349 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-11-28 04:30:59,349 INFO L218 hiAutomatonCegarLoop]: Abstraction has 138 states and 141 transitions. [2024-11-28 04:30:59,349 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 138 states and 141 transitions. [2024-11-28 04:30:59,351 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 138 to 134. [2024-11-28 04:30:59,352 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 134 states, 134 states have (on average 1.0223880597014925) internal successors, (137), 133 states have internal predecessors, (137), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 04:30:59,353 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 134 states to 134 states and 137 transitions. [2024-11-28 04:30:59,353 INFO L240 hiAutomatonCegarLoop]: Abstraction has 134 states and 137 transitions. [2024-11-28 04:30:59,354 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 55 states. [2024-11-28 04:30:59,355 INFO L425 stractBuchiCegarLoop]: Abstraction has 134 states and 137 transitions. [2024-11-28 04:30:59,355 INFO L332 stractBuchiCegarLoop]: ======== Iteration 20 ============ [2024-11-28 04:30:59,356 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 134 states and 137 transitions. [2024-11-28 04:30:59,356 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 45 [2024-11-28 04:30:59,357 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-28 04:30:59,357 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-28 04:30:59,358 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [17, 17, 17, 17, 15, 2, 1, 1, 1, 1] [2024-11-28 04:30:59,358 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [9, 9, 9, 9, 8, 1] [2024-11-28 04:30:59,358 INFO L747 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~nondet4#1, main_#t~nondet5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~mem8#1, main_#t~short9#1, main_#t~malloc10#1.base, main_#t~malloc10#1.offset, main_#t~mem11#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~nondet14#1, main_#t~short15#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~id~0#1.base, main_~id~0#1.offset, main_~maxId~0#1.base, main_~maxId~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~id~0#1.base, main_~id~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~maxId~0#1.base, main_~maxId~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset;havoc main_#t~nondet4#1;call write~int#0(main_#t~nondet4#1, main_~id~0#1.base, main_~id~0#1.offset, 4);havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;call write~int#1(main_#t~nondet5#1, main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);havoc main_#t~nondet5#1;call main_#t~mem6#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short9#1 := 0 <= main_#t~mem6#1;" "assume main_#t~short9#1;call main_#t~mem7#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);call main_#t~mem8#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);main_#t~short9#1 := main_#t~mem7#1 < main_#t~mem8#1;" "assume main_#t~short9#1;havoc main_#t~mem6#1;havoc main_#t~mem7#1;havoc main_#t~mem8#1;havoc main_#t~short9#1;call main_#t~malloc10#1.base, main_#t~malloc10#1.offset := #Ultimate.allocOnStack(4);main_~tmp~0#1.base, main_~tmp~0#1.offset := main_#t~malloc10#1.base, main_#t~malloc10#1.offset;call main_#t~mem11#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);call write~int#2(1 + main_#t~mem11#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem11#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#2(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#2(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);" [2024-11-28 04:30:59,359 INFO L749 eck$LassoCheckResult]: Loop: "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#2(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);" [2024-11-28 04:30:59,359 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 04:30:59,359 INFO L85 PathProgramCache]: Analyzing trace with hash 2123959311, now seen corresponding path program 17 times [2024-11-28 04:30:59,359 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM [2024-11-28 04:30:59,360 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1278087390] [2024-11-28 04:30:59,360 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 04:30:59,360 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 04:30:59,414 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 04:31:01,558 INFO L136 FreeRefinementEngine]: Strategy CAMEL_NO_AM found an infeasible trace [2024-11-28 04:31:01,558 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1278087390] [2024-11-28 04:31:01,558 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1278087390] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-28 04:31:01,558 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2090978603] [2024-11-28 04:31:01,558 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 04:31:01,559 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-28 04:31:01,559 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 04:31:01,563 INFO L229 MonitoredProcess]: Starting monitored process 82 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-28 04:31:01,565 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (82)] Waiting until timeout for monitored process [2024-11-28 04:31:01,922 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 04:31:01,926 INFO L256 TraceCheckSpWp]: Trace formula consists of 726 conjuncts, 54 conjuncts are in the unsatisfiable core [2024-11-28 04:31:01,932 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-28 04:31:01,956 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 13 [2024-11-28 04:31:02,003 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-28 04:31:02,091 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-28 04:31:02,172 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-28 04:31:02,290 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-28 04:31:02,385 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-28 04:31:02,477 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-28 04:31:02,562 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 13 [2024-11-28 04:31:02,750 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 1 [2024-11-28 04:31:02,995 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 21 [2024-11-28 04:31:03,064 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 72 treesize of output 48 [2024-11-28 04:31:03,326 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 71 treesize of output 47 [2024-11-28 04:31:03,480 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 71 treesize of output 47 [2024-11-28 04:31:03,635 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 71 treesize of output 47 [2024-11-28 04:31:03,796 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 71 treesize of output 47 [2024-11-28 04:31:03,984 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 71 treesize of output 47 [2024-11-28 04:31:04,139 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 71 treesize of output 47 [2024-11-28 04:31:04,278 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 71 treesize of output 47 [2024-11-28 04:31:04,439 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 41 [2024-11-28 04:31:04,443 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 42 treesize of output 26 [2024-11-28 04:31:04,519 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-28 04:31:05,378 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 53 treesize of output 37 [2024-11-28 04:31:06,315 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2090978603] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-28 04:31:06,315 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-28 04:31:06,315 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [24, 26, 26] total 60 [2024-11-28 04:31:06,315 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1645160491] [2024-11-28 04:31:06,316 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-28 04:31:06,316 INFO L752 eck$LassoCheckResult]: stem already infeasible [2024-11-28 04:31:06,316 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 04:31:06,317 INFO L85 PathProgramCache]: Analyzing trace with hash 351821433, now seen corresponding path program 12 times [2024-11-28 04:31:06,317 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM [2024-11-28 04:31:06,317 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [271940052] [2024-11-28 04:31:06,317 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 04:31:06,317 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 04:31:06,344 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-28 04:31:06,344 INFO L357 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-28 04:31:06,355 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-28 04:31:06,363 INFO L130 FreeRefinementEngine]: Strategy CAMEL_NO_AM found a feasible trace [2024-11-28 04:31:14,944 WARN L286 SmtUtils]: Spent 8.57s on a formula simplification. DAG size of input: 315 DAG size of output: 236 (called from [L 276] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.cfg.transitions.TransFormulaUtils.sequentialComposition) [2024-11-28 04:31:15,145 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL_NO_AM [2024-11-28 04:31:15,145 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 61 interpolants. [2024-11-28 04:31:15,146 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=516, Invalid=3144, Unknown=0, NotChecked=0, Total=3660 [2024-11-28 04:31:15,146 INFO L87 Difference]: Start difference. First operand 134 states and 137 transitions. cyclomatic complexity: 6 Second operand has 61 states, 60 states have (on average 3.6333333333333333) internal successors, (218), 61 states have internal predecessors, (218), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 04:31:17,425 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 04:31:17,426 INFO L93 Difference]: Finished difference Result 170 states and 173 transitions. [2024-11-28 04:31:17,426 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 170 states and 173 transitions. [2024-11-28 04:31:17,427 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 55 [2024-11-28 04:31:17,428 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 170 states to 162 states and 165 transitions. [2024-11-28 04:31:17,428 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 69 [2024-11-28 04:31:17,428 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 69 [2024-11-28 04:31:17,429 INFO L73 IsDeterministic]: Start isDeterministic. Operand 162 states and 165 transitions. [2024-11-28 04:31:17,429 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-11-28 04:31:17,429 INFO L218 hiAutomatonCegarLoop]: Abstraction has 162 states and 165 transitions. [2024-11-28 04:31:17,430 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 162 states and 165 transitions. [2024-11-28 04:31:17,435 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 162 to 154. [2024-11-28 04:31:17,436 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 154 states, 154 states have (on average 1.0194805194805194) internal successors, (157), 153 states have internal predecessors, (157), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 04:31:17,437 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 154 states to 154 states and 157 transitions. [2024-11-28 04:31:17,437 INFO L240 hiAutomatonCegarLoop]: Abstraction has 154 states and 157 transitions. [2024-11-28 04:31:17,437 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 40 states. [2024-11-28 04:31:17,438 INFO L425 stractBuchiCegarLoop]: Abstraction has 154 states and 157 transitions. [2024-11-28 04:31:17,438 INFO L332 stractBuchiCegarLoop]: ======== Iteration 21 ============ [2024-11-28 04:31:17,438 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 154 states and 157 transitions. [2024-11-28 04:31:17,439 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 55 [2024-11-28 04:31:17,439 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-28 04:31:17,439 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-28 04:31:17,441 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [19, 19, 19, 19, 17, 2, 1, 1, 1, 1] [2024-11-28 04:31:17,441 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [11, 11, 11, 11, 10, 1] [2024-11-28 04:31:17,441 INFO L747 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~nondet4#1, main_#t~nondet5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~mem8#1, main_#t~short9#1, main_#t~malloc10#1.base, main_#t~malloc10#1.offset, main_#t~mem11#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~nondet14#1, main_#t~short15#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~id~0#1.base, main_~id~0#1.offset, main_~maxId~0#1.base, main_~maxId~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~id~0#1.base, main_~id~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~maxId~0#1.base, main_~maxId~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset;havoc main_#t~nondet4#1;call write~int#0(main_#t~nondet4#1, main_~id~0#1.base, main_~id~0#1.offset, 4);havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;call write~int#1(main_#t~nondet5#1, main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);havoc main_#t~nondet5#1;call main_#t~mem6#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short9#1 := 0 <= main_#t~mem6#1;" "assume main_#t~short9#1;call main_#t~mem7#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);call main_#t~mem8#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);main_#t~short9#1 := main_#t~mem7#1 < main_#t~mem8#1;" "assume main_#t~short9#1;havoc main_#t~mem6#1;havoc main_#t~mem7#1;havoc main_#t~mem8#1;havoc main_#t~short9#1;call main_#t~malloc10#1.base, main_#t~malloc10#1.offset := #Ultimate.allocOnStack(4);main_~tmp~0#1.base, main_~tmp~0#1.offset := main_#t~malloc10#1.base, main_#t~malloc10#1.offset;call main_#t~mem11#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);call write~int#2(1 + main_#t~mem11#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem11#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#2(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#2(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);" [2024-11-28 04:31:17,441 INFO L749 eck$LassoCheckResult]: Loop: "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#2(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);" [2024-11-28 04:31:17,442 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 04:31:17,442 INFO L85 PathProgramCache]: Analyzing trace with hash -1803458865, now seen corresponding path program 18 times [2024-11-28 04:31:17,442 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM [2024-11-28 04:31:17,442 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [782139489] [2024-11-28 04:31:17,442 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 04:31:17,443 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 04:31:17,505 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 04:31:20,277 INFO L136 FreeRefinementEngine]: Strategy CAMEL_NO_AM found an infeasible trace [2024-11-28 04:31:20,277 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [782139489] [2024-11-28 04:31:20,277 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [782139489] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-28 04:31:20,277 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2087357828] [2024-11-28 04:31:20,277 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 04:31:20,278 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-28 04:31:20,278 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 04:31:20,283 INFO L229 MonitoredProcess]: Starting monitored process 83 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-28 04:31:20,284 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (83)] Waiting until timeout for monitored process [2024-11-28 04:31:20,679 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 04:31:20,683 INFO L256 TraceCheckSpWp]: Trace formula consists of 800 conjuncts, 50 conjuncts are in the unsatisfiable core [2024-11-28 04:31:20,689 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-28 04:31:20,691 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 13 [2024-11-28 04:31:20,707 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-28 04:31:20,723 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-28 04:31:20,738 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-28 04:31:20,754 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-28 04:31:20,770 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-28 04:31:20,785 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-28 04:31:20,860 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 28 [2024-11-28 04:31:20,932 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 13 [2024-11-28 04:31:21,025 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 31 [2024-11-28 04:31:21,100 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-28 04:31:21,117 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-28 04:31:21,132 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-28 04:31:21,148 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-28 04:31:21,164 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-28 04:31:21,180 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-28 04:31:21,196 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-28 04:31:21,268 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 29 [2024-11-28 04:31:21,317 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 13 [2024-11-28 04:31:21,327 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 9 [2024-11-28 04:31:21,330 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-28 04:31:21,619 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 18 [2024-11-28 04:31:21,877 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 20 [2024-11-28 04:31:21,969 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2087357828] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-28 04:31:21,969 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-28 04:31:21,969 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [26, 24, 24] total 35 [2024-11-28 04:31:21,970 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1108152782] [2024-11-28 04:31:21,970 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-28 04:31:21,970 INFO L752 eck$LassoCheckResult]: stem already infeasible [2024-11-28 04:31:21,970 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 04:31:21,970 INFO L85 PathProgramCache]: Analyzing trace with hash -401326919, now seen corresponding path program 13 times [2024-11-28 04:31:21,970 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM [2024-11-28 04:31:21,970 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1789108902] [2024-11-28 04:31:21,971 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 04:31:21,971 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 04:31:21,995 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-28 04:31:21,995 INFO L357 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-28 04:31:22,004 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-28 04:31:22,011 INFO L130 FreeRefinementEngine]: Strategy CAMEL_NO_AM found a feasible trace [2024-11-28 04:31:40,269 WARN L286 SmtUtils]: Spent 18.25s on a formula simplification. DAG size of input: 377 DAG size of output: 280 (called from [L 276] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.cfg.transitions.TransFormulaUtils.sequentialComposition) [2024-11-28 04:31:40,516 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL_NO_AM [2024-11-28 04:31:40,517 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 36 interpolants. [2024-11-28 04:31:40,517 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=96, Invalid=1164, Unknown=0, NotChecked=0, Total=1260 [2024-11-28 04:31:40,517 INFO L87 Difference]: Start difference. First operand 154 states and 157 transitions. cyclomatic complexity: 6 Second operand has 36 states, 35 states have (on average 3.4571428571428573) internal successors, (121), 36 states have internal predecessors, (121), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 04:31:43,046 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 04:31:43,047 INFO L93 Difference]: Finished difference Result 222 states and 226 transitions. [2024-11-28 04:31:43,047 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 222 states and 226 transitions. [2024-11-28 04:31:43,048 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 55 [2024-11-28 04:31:43,049 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 222 states to 163 states and 166 transitions. [2024-11-28 04:31:43,049 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 69 [2024-11-28 04:31:43,050 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 69 [2024-11-28 04:31:43,050 INFO L73 IsDeterministic]: Start isDeterministic. Operand 163 states and 166 transitions. [2024-11-28 04:31:43,051 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-11-28 04:31:43,052 INFO L218 hiAutomatonCegarLoop]: Abstraction has 163 states and 166 transitions. [2024-11-28 04:31:43,052 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 163 states and 166 transitions. [2024-11-28 04:31:43,055 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 163 to 159. [2024-11-28 04:31:43,056 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 159 states, 159 states have (on average 1.0188679245283019) internal successors, (162), 158 states have internal predecessors, (162), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 04:31:43,056 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 159 states to 159 states and 162 transitions. [2024-11-28 04:31:43,057 INFO L240 hiAutomatonCegarLoop]: Abstraction has 159 states and 162 transitions. [2024-11-28 04:31:43,057 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 41 states. [2024-11-28 04:31:43,058 INFO L425 stractBuchiCegarLoop]: Abstraction has 159 states and 162 transitions. [2024-11-28 04:31:43,058 INFO L332 stractBuchiCegarLoop]: ======== Iteration 22 ============ [2024-11-28 04:31:43,058 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 159 states and 162 transitions. [2024-11-28 04:31:43,059 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 55 [2024-11-28 04:31:43,059 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-28 04:31:43,059 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-28 04:31:43,060 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [20, 20, 20, 20, 18, 2, 1, 1, 1, 1] [2024-11-28 04:31:43,060 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [11, 11, 11, 11, 10, 1] [2024-11-28 04:31:43,060 INFO L747 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~nondet4#1, main_#t~nondet5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~mem8#1, main_#t~short9#1, main_#t~malloc10#1.base, main_#t~malloc10#1.offset, main_#t~mem11#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~nondet14#1, main_#t~short15#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~id~0#1.base, main_~id~0#1.offset, main_~maxId~0#1.base, main_~maxId~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~id~0#1.base, main_~id~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~maxId~0#1.base, main_~maxId~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset;havoc main_#t~nondet4#1;call write~int#0(main_#t~nondet4#1, main_~id~0#1.base, main_~id~0#1.offset, 4);havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;call write~int#1(main_#t~nondet5#1, main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);havoc main_#t~nondet5#1;call main_#t~mem6#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short9#1 := 0 <= main_#t~mem6#1;" "assume main_#t~short9#1;call main_#t~mem7#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);call main_#t~mem8#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);main_#t~short9#1 := main_#t~mem7#1 < main_#t~mem8#1;" "assume main_#t~short9#1;havoc main_#t~mem6#1;havoc main_#t~mem7#1;havoc main_#t~mem8#1;havoc main_#t~short9#1;call main_#t~malloc10#1.base, main_#t~malloc10#1.offset := #Ultimate.allocOnStack(4);main_~tmp~0#1.base, main_~tmp~0#1.offset := main_#t~malloc10#1.base, main_#t~malloc10#1.offset;call main_#t~mem11#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);call write~int#2(1 + main_#t~mem11#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem11#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#2(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#2(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);" [2024-11-28 04:31:43,061 INFO L749 eck$LassoCheckResult]: Loop: "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#2(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);" [2024-11-28 04:31:43,061 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 04:31:43,061 INFO L85 PathProgramCache]: Analyzing trace with hash 245179113, now seen corresponding path program 19 times [2024-11-28 04:31:43,061 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM [2024-11-28 04:31:43,061 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1395885748] [2024-11-28 04:31:43,062 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 04:31:43,062 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 04:31:43,121 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 04:31:46,046 INFO L136 FreeRefinementEngine]: Strategy CAMEL_NO_AM found an infeasible trace [2024-11-28 04:31:46,047 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1395885748] [2024-11-28 04:31:46,047 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1395885748] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-28 04:31:46,047 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [945361566] [2024-11-28 04:31:46,047 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 04:31:46,047 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-28 04:31:46,048 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 04:31:46,050 INFO L229 MonitoredProcess]: Starting monitored process 84 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-28 04:31:46,056 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (84)] Waiting until timeout for monitored process [2024-11-28 04:31:46,465 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 04:31:46,469 INFO L256 TraceCheckSpWp]: Trace formula consists of 837 conjuncts, 54 conjuncts are in the unsatisfiable core [2024-11-28 04:31:46,474 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-28 04:31:46,477 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 13 [2024-11-28 04:31:46,499 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-28 04:31:46,570 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-28 04:31:46,633 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-28 04:31:46,691 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-28 04:31:46,751 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-28 04:31:46,812 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-28 04:31:46,873 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-28 04:31:47,002 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 28 [2024-11-28 04:31:47,091 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 13 [2024-11-28 04:31:47,252 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 31 [2024-11-28 04:31:47,354 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-28 04:31:47,374 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-28 04:31:47,394 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-28 04:31:47,414 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-28 04:31:47,433 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-28 04:31:47,452 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-28 04:31:47,469 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-28 04:31:47,485 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-28 04:31:47,572 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 29 [2024-11-28 04:31:47,631 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 13 [2024-11-28 04:31:47,633 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 9 [2024-11-28 04:31:47,637 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-28 04:31:47,907 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 18 [2024-11-28 04:31:48,189 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 20 [2024-11-28 04:31:48,295 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [945361566] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-28 04:31:48,296 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-28 04:31:48,296 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [27, 26, 26] total 44 [2024-11-28 04:31:48,296 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2140023452] [2024-11-28 04:31:48,296 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-28 04:31:48,297 INFO L752 eck$LassoCheckResult]: stem already infeasible [2024-11-28 04:31:48,297 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 04:31:48,297 INFO L85 PathProgramCache]: Analyzing trace with hash -401326919, now seen corresponding path program 14 times [2024-11-28 04:31:48,297 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM [2024-11-28 04:31:48,297 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [263391761] [2024-11-28 04:31:48,297 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 04:31:48,297 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 04:31:48,329 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-28 04:31:48,329 INFO L357 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-28 04:31:48,373 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-28 04:31:48,381 INFO L130 FreeRefinementEngine]: Strategy CAMEL_NO_AM found a feasible trace [2024-11-28 04:32:06,638 WARN L286 SmtUtils]: Spent 18.25s on a formula simplification. DAG size of input: 377 DAG size of output: 280 (called from [L 276] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.cfg.transitions.TransFormulaUtils.sequentialComposition) [2024-11-28 04:32:06,882 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL_NO_AM [2024-11-28 04:32:06,882 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 45 interpolants. [2024-11-28 04:32:06,883 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=127, Invalid=1853, Unknown=0, NotChecked=0, Total=1980 [2024-11-28 04:32:06,883 INFO L87 Difference]: Start difference. First operand 159 states and 162 transitions. cyclomatic complexity: 6 Second operand has 45 states, 44 states have (on average 3.727272727272727) internal successors, (164), 45 states have internal predecessors, (164), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 04:32:13,402 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 04:32:13,402 INFO L93 Difference]: Finished difference Result 227 states and 231 transitions. [2024-11-28 04:32:13,402 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 227 states and 231 transitions. [2024-11-28 04:32:13,404 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 55 [2024-11-28 04:32:13,404 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 227 states to 168 states and 171 transitions. [2024-11-28 04:32:13,405 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 69 [2024-11-28 04:32:13,405 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 69 [2024-11-28 04:32:13,405 INFO L73 IsDeterministic]: Start isDeterministic. Operand 168 states and 171 transitions. [2024-11-28 04:32:13,406 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-11-28 04:32:13,406 INFO L218 hiAutomatonCegarLoop]: Abstraction has 168 states and 171 transitions. [2024-11-28 04:32:13,407 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 168 states and 171 transitions. [2024-11-28 04:32:13,409 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 168 to 164. [2024-11-28 04:32:13,410 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 164 states, 164 states have (on average 1.0182926829268293) internal successors, (167), 163 states have internal predecessors, (167), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 04:32:13,410 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 164 states to 164 states and 167 transitions. [2024-11-28 04:32:13,411 INFO L240 hiAutomatonCegarLoop]: Abstraction has 164 states and 167 transitions. [2024-11-28 04:32:13,411 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 69 states. [2024-11-28 04:32:13,412 INFO L425 stractBuchiCegarLoop]: Abstraction has 164 states and 167 transitions. [2024-11-28 04:32:13,412 INFO L332 stractBuchiCegarLoop]: ======== Iteration 23 ============ [2024-11-28 04:32:13,413 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 164 states and 167 transitions. [2024-11-28 04:32:13,413 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 55 [2024-11-28 04:32:13,414 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-28 04:32:13,414 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-28 04:32:13,415 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [21, 21, 21, 21, 19, 2, 1, 1, 1, 1] [2024-11-28 04:32:13,415 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [11, 11, 11, 11, 10, 1] [2024-11-28 04:32:13,415 INFO L747 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~nondet4#1, main_#t~nondet5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~mem8#1, main_#t~short9#1, main_#t~malloc10#1.base, main_#t~malloc10#1.offset, main_#t~mem11#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~nondet14#1, main_#t~short15#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~id~0#1.base, main_~id~0#1.offset, main_~maxId~0#1.base, main_~maxId~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~id~0#1.base, main_~id~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~maxId~0#1.base, main_~maxId~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset;havoc main_#t~nondet4#1;call write~int#0(main_#t~nondet4#1, main_~id~0#1.base, main_~id~0#1.offset, 4);havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;call write~int#1(main_#t~nondet5#1, main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);havoc main_#t~nondet5#1;call main_#t~mem6#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short9#1 := 0 <= main_#t~mem6#1;" "assume main_#t~short9#1;call main_#t~mem7#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);call main_#t~mem8#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);main_#t~short9#1 := main_#t~mem7#1 < main_#t~mem8#1;" "assume main_#t~short9#1;havoc main_#t~mem6#1;havoc main_#t~mem7#1;havoc main_#t~mem8#1;havoc main_#t~short9#1;call main_#t~malloc10#1.base, main_#t~malloc10#1.offset := #Ultimate.allocOnStack(4);main_~tmp~0#1.base, main_~tmp~0#1.offset := main_#t~malloc10#1.base, main_#t~malloc10#1.offset;call main_#t~mem11#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);call write~int#2(1 + main_#t~mem11#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem11#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#2(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#2(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);" [2024-11-28 04:32:13,416 INFO L749 eck$LassoCheckResult]: Loop: "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#2(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);" [2024-11-28 04:32:13,416 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 04:32:13,417 INFO L85 PathProgramCache]: Analyzing trace with hash -1462442225, now seen corresponding path program 20 times [2024-11-28 04:32:13,417 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM [2024-11-28 04:32:13,417 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1476606653] [2024-11-28 04:32:13,417 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 04:32:13,417 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 04:32:13,477 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 04:32:16,124 INFO L136 FreeRefinementEngine]: Strategy CAMEL_NO_AM found an infeasible trace [2024-11-28 04:32:16,124 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1476606653] [2024-11-28 04:32:16,124 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1476606653] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-28 04:32:16,125 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [32449837] [2024-11-28 04:32:16,125 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 04:32:16,125 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-28 04:32:16,125 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 04:32:16,127 INFO L229 MonitoredProcess]: Starting monitored process 85 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-28 04:32:16,129 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (85)] Waiting until timeout for monitored process [2024-11-28 04:32:16,534 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 04:32:16,538 INFO L256 TraceCheckSpWp]: Trace formula consists of 874 conjuncts, 56 conjuncts are in the unsatisfiable core [2024-11-28 04:32:16,544 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-28 04:32:16,566 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 13 [2024-11-28 04:32:16,610 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-28 04:32:16,717 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-28 04:32:16,830 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-28 04:32:16,943 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-28 04:32:17,056 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-28 04:32:17,154 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-28 04:32:17,246 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-28 04:32:17,342 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-28 04:32:17,435 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 13 [2024-11-28 04:32:17,601 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 1 [2024-11-28 04:32:17,658 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 58 treesize of output 38 [2024-11-28 04:32:17,816 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 33 [2024-11-28 04:32:17,916 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 33 [2024-11-28 04:32:18,027 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 33 [2024-11-28 04:32:18,163 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 33 [2024-11-28 04:32:18,310 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 33 [2024-11-28 04:32:18,454 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 33 [2024-11-28 04:32:18,595 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 33 [2024-11-28 04:32:18,739 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 33 [2024-11-28 04:32:18,856 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 33 [2024-11-28 04:32:18,973 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 33 [2024-11-28 04:32:19,077 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-28 04:32:19,083 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-28 04:32:19,135 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-28 04:32:19,855 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 53 treesize of output 37 [2024-11-28 04:32:20,946 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [32449837] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-28 04:32:20,946 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-28 04:32:20,947 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [28, 28, 28] total 66 [2024-11-28 04:32:20,947 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [835933371] [2024-11-28 04:32:20,947 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-28 04:32:20,947 INFO L752 eck$LassoCheckResult]: stem already infeasible [2024-11-28 04:32:20,948 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 04:32:20,948 INFO L85 PathProgramCache]: Analyzing trace with hash -401326919, now seen corresponding path program 15 times [2024-11-28 04:32:20,948 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM [2024-11-28 04:32:20,948 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1231931873] [2024-11-28 04:32:20,948 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 04:32:20,948 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 04:32:20,972 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-28 04:32:20,972 INFO L357 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-28 04:32:20,982 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-28 04:32:20,990 INFO L130 FreeRefinementEngine]: Strategy CAMEL_NO_AM found a feasible trace [2024-11-28 04:32:40,253 WARN L286 SmtUtils]: Spent 19.26s on a formula simplification. DAG size of input: 377 DAG size of output: 280 (called from [L 276] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.cfg.transitions.TransFormulaUtils.sequentialComposition) [2024-11-28 04:32:40,454 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL_NO_AM [2024-11-28 04:32:40,454 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 67 interpolants. [2024-11-28 04:32:40,455 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=602, Invalid=3820, Unknown=0, NotChecked=0, Total=4422 [2024-11-28 04:32:40,455 INFO L87 Difference]: Start difference. First operand 164 states and 167 transitions. cyclomatic complexity: 6 Second operand has 67 states, 66 states have (on average 4.03030303030303) internal successors, (266), 67 states have internal predecessors, (266), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 04:32:42,534 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 04:32:42,534 INFO L93 Difference]: Finished difference Result 186 states and 189 transitions. [2024-11-28 04:32:42,535 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 186 states and 189 transitions. [2024-11-28 04:32:42,536 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 60 [2024-11-28 04:32:42,537 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 186 states to 182 states and 185 transitions. [2024-11-28 04:32:42,537 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 74 [2024-11-28 04:32:42,537 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 74 [2024-11-28 04:32:42,537 INFO L73 IsDeterministic]: Start isDeterministic. Operand 182 states and 185 transitions. [2024-11-28 04:32:42,537 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-11-28 04:32:42,537 INFO L218 hiAutomatonCegarLoop]: Abstraction has 182 states and 185 transitions. [2024-11-28 04:32:42,538 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 182 states and 185 transitions. [2024-11-28 04:32:42,540 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 182 to 174. [2024-11-28 04:32:42,541 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 174 states, 174 states have (on average 1.0172413793103448) internal successors, (177), 173 states have internal predecessors, (177), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 04:32:42,542 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 174 states to 174 states and 177 transitions. [2024-11-28 04:32:42,542 INFO L240 hiAutomatonCegarLoop]: Abstraction has 174 states and 177 transitions. [2024-11-28 04:32:42,542 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 41 states. [2024-11-28 04:32:42,543 INFO L425 stractBuchiCegarLoop]: Abstraction has 174 states and 177 transitions. [2024-11-28 04:32:42,543 INFO L332 stractBuchiCegarLoop]: ======== Iteration 24 ============ [2024-11-28 04:32:42,543 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 174 states and 177 transitions. [2024-11-28 04:32:42,544 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 60 [2024-11-28 04:32:42,545 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-28 04:32:42,545 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-28 04:32:42,546 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [22, 22, 22, 22, 20, 2, 1, 1, 1, 1] [2024-11-28 04:32:42,546 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [12, 12, 12, 12, 11, 1] [2024-11-28 04:32:42,546 INFO L747 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~nondet4#1, main_#t~nondet5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~mem8#1, main_#t~short9#1, main_#t~malloc10#1.base, main_#t~malloc10#1.offset, main_#t~mem11#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~nondet14#1, main_#t~short15#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~id~0#1.base, main_~id~0#1.offset, main_~maxId~0#1.base, main_~maxId~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~id~0#1.base, main_~id~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~maxId~0#1.base, main_~maxId~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset;havoc main_#t~nondet4#1;call write~int#0(main_#t~nondet4#1, main_~id~0#1.base, main_~id~0#1.offset, 4);havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;call write~int#1(main_#t~nondet5#1, main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);havoc main_#t~nondet5#1;call main_#t~mem6#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short9#1 := 0 <= main_#t~mem6#1;" "assume main_#t~short9#1;call main_#t~mem7#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);call main_#t~mem8#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);main_#t~short9#1 := main_#t~mem7#1 < main_#t~mem8#1;" "assume main_#t~short9#1;havoc main_#t~mem6#1;havoc main_#t~mem7#1;havoc main_#t~mem8#1;havoc main_#t~short9#1;call main_#t~malloc10#1.base, main_#t~malloc10#1.offset := #Ultimate.allocOnStack(4);main_~tmp~0#1.base, main_~tmp~0#1.offset := main_#t~malloc10#1.base, main_#t~malloc10#1.offset;call main_#t~mem11#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);call write~int#2(1 + main_#t~mem11#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem11#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#2(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#2(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);" [2024-11-28 04:32:42,546 INFO L749 eck$LassoCheckResult]: Loop: "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#2(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);" [2024-11-28 04:32:42,547 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 04:32:42,547 INFO L85 PathProgramCache]: Analyzing trace with hash 36595181, now seen corresponding path program 21 times [2024-11-28 04:32:42,547 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM [2024-11-28 04:32:42,547 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1319064620] [2024-11-28 04:32:42,547 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 04:32:42,548 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 04:32:42,621 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 04:32:46,013 INFO L136 FreeRefinementEngine]: Strategy CAMEL_NO_AM found an infeasible trace [2024-11-28 04:32:46,013 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1319064620] [2024-11-28 04:32:46,013 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1319064620] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-28 04:32:46,013 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [309179268] [2024-11-28 04:32:46,013 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 04:32:46,013 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-28 04:32:46,013 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 04:32:46,017 INFO L229 MonitoredProcess]: Starting monitored process 86 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-28 04:32:46,019 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (86)] Waiting until timeout for monitored process [2024-11-28 04:32:46,470 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 04:32:46,473 INFO L256 TraceCheckSpWp]: Trace formula consists of 911 conjuncts, 58 conjuncts are in the unsatisfiable core [2024-11-28 04:32:46,480 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-28 04:32:46,482 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 13 [2024-11-28 04:32:46,543 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-28 04:32:46,603 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-28 04:32:46,690 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-28 04:32:46,752 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-28 04:32:46,820 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-28 04:32:46,888 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-28 04:32:46,957 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-28 04:32:47,026 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-28 04:32:47,173 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 28 [2024-11-28 04:32:47,276 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 13 [2024-11-28 04:32:47,421 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 31 [2024-11-28 04:32:47,508 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-28 04:32:47,524 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-28 04:32:47,540 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-28 04:32:47,559 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-28 04:32:47,577 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-28 04:32:47,594 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-28 04:32:47,612 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-28 04:32:47,630 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-28 04:32:47,651 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-28 04:32:47,748 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 29 [2024-11-28 04:32:47,818 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 13 [2024-11-28 04:32:47,822 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 9 [2024-11-28 04:32:47,825 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-28 04:32:48,141 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 18 [2024-11-28 04:32:48,434 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 20 [2024-11-28 04:32:48,573 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [309179268] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-28 04:32:48,573 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-28 04:32:48,573 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [29, 28, 28] total 48 [2024-11-28 04:32:48,573 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1588790648] [2024-11-28 04:32:48,573 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-28 04:32:48,574 INFO L752 eck$LassoCheckResult]: stem already infeasible [2024-11-28 04:32:48,574 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 04:32:48,574 INFO L85 PathProgramCache]: Analyzing trace with hash -1605105021, now seen corresponding path program 16 times [2024-11-28 04:32:48,575 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM [2024-11-28 04:32:48,575 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [566062265] [2024-11-28 04:32:48,575 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 04:32:48,575 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 04:32:48,612 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-28 04:32:48,612 INFO L357 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-28 04:32:48,627 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-28 04:32:48,637 INFO L130 FreeRefinementEngine]: Strategy CAMEL_NO_AM found a feasible trace [2024-11-28 04:33:16,025 WARN L286 SmtUtils]: Spent 27.38s on a formula simplification. DAG size of input: 408 DAG size of output: 302 (called from [L 276] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.cfg.transitions.TransFormulaUtils.sequentialComposition) [2024-11-28 04:33:16,289 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL_NO_AM [2024-11-28 04:33:16,290 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 49 interpolants. [2024-11-28 04:33:16,290 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=137, Invalid=2215, Unknown=0, NotChecked=0, Total=2352 [2024-11-28 04:33:16,291 INFO L87 Difference]: Start difference. First operand 174 states and 177 transitions. cyclomatic complexity: 6 Second operand has 49 states, 48 states have (on average 3.8333333333333335) internal successors, (184), 49 states have internal predecessors, (184), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 04:33:24,448 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 04:33:24,448 INFO L93 Difference]: Finished difference Result 247 states and 251 transitions. [2024-11-28 04:33:24,448 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 247 states and 251 transitions. [2024-11-28 04:33:24,450 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 60 [2024-11-28 04:33:24,451 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 247 states to 183 states and 186 transitions. [2024-11-28 04:33:24,451 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 74 [2024-11-28 04:33:24,451 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 74 [2024-11-28 04:33:24,451 INFO L73 IsDeterministic]: Start isDeterministic. Operand 183 states and 186 transitions. [2024-11-28 04:33:24,451 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-11-28 04:33:24,451 INFO L218 hiAutomatonCegarLoop]: Abstraction has 183 states and 186 transitions. [2024-11-28 04:33:24,452 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 183 states and 186 transitions. [2024-11-28 04:33:24,454 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 183 to 179. [2024-11-28 04:33:24,455 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 179 states, 179 states have (on average 1.0167597765363128) internal successors, (182), 178 states have internal predecessors, (182), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 04:33:24,455 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 179 states to 179 states and 182 transitions. [2024-11-28 04:33:24,456 INFO L240 hiAutomatonCegarLoop]: Abstraction has 179 states and 182 transitions. [2024-11-28 04:33:24,456 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 76 states. [2024-11-28 04:33:24,457 INFO L425 stractBuchiCegarLoop]: Abstraction has 179 states and 182 transitions. [2024-11-28 04:33:24,457 INFO L332 stractBuchiCegarLoop]: ======== Iteration 25 ============ [2024-11-28 04:33:24,457 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 179 states and 182 transitions. [2024-11-28 04:33:24,458 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 60 [2024-11-28 04:33:24,458 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-28 04:33:24,458 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-28 04:33:24,459 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [23, 23, 23, 23, 21, 2, 1, 1, 1, 1] [2024-11-28 04:33:24,459 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [12, 12, 12, 12, 11, 1] [2024-11-28 04:33:24,459 INFO L747 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~nondet4#1, main_#t~nondet5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~mem8#1, main_#t~short9#1, main_#t~malloc10#1.base, main_#t~malloc10#1.offset, main_#t~mem11#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~nondet14#1, main_#t~short15#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~id~0#1.base, main_~id~0#1.offset, main_~maxId~0#1.base, main_~maxId~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~id~0#1.base, main_~id~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~maxId~0#1.base, main_~maxId~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset;havoc main_#t~nondet4#1;call write~int#0(main_#t~nondet4#1, main_~id~0#1.base, main_~id~0#1.offset, 4);havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;call write~int#1(main_#t~nondet5#1, main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);havoc main_#t~nondet5#1;call main_#t~mem6#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short9#1 := 0 <= main_#t~mem6#1;" "assume main_#t~short9#1;call main_#t~mem7#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);call main_#t~mem8#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);main_#t~short9#1 := main_#t~mem7#1 < main_#t~mem8#1;" "assume main_#t~short9#1;havoc main_#t~mem6#1;havoc main_#t~mem7#1;havoc main_#t~mem8#1;havoc main_#t~short9#1;call main_#t~malloc10#1.base, main_#t~malloc10#1.offset := #Ultimate.allocOnStack(4);main_~tmp~0#1.base, main_~tmp~0#1.offset := main_#t~malloc10#1.base, main_#t~malloc10#1.offset;call main_#t~mem11#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);call write~int#2(1 + main_#t~mem11#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem11#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#2(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#2(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);" [2024-11-28 04:33:24,460 INFO L749 eck$LassoCheckResult]: Loop: "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#2(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);" [2024-11-28 04:33:24,460 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 04:33:24,460 INFO L85 PathProgramCache]: Analyzing trace with hash -1233931629, now seen corresponding path program 22 times [2024-11-28 04:33:24,461 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM [2024-11-28 04:33:24,461 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1349641359] [2024-11-28 04:33:24,461 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 04:33:24,461 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 04:33:24,529 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 04:33:28,150 INFO L136 FreeRefinementEngine]: Strategy CAMEL_NO_AM found an infeasible trace [2024-11-28 04:33:28,150 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1349641359] [2024-11-28 04:33:28,150 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1349641359] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-28 04:33:28,150 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [766211380] [2024-11-28 04:33:28,150 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 04:33:28,150 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-28 04:33:28,150 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 04:33:28,153 INFO L229 MonitoredProcess]: Starting monitored process 87 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-28 04:33:28,155 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (87)] Waiting until timeout for monitored process [2024-11-28 04:33:28,646 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 04:33:28,650 INFO L256 TraceCheckSpWp]: Trace formula consists of 948 conjuncts, 60 conjuncts are in the unsatisfiable core [2024-11-28 04:33:28,657 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-28 04:33:28,687 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 13 [2024-11-28 04:33:28,734 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-28 04:33:28,823 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-28 04:33:28,916 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-28 04:33:29,011 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-28 04:33:29,110 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-28 04:33:29,211 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-28 04:33:29,315 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-28 04:33:29,422 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-28 04:33:29,534 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-28 04:33:29,648 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 13 [2024-11-28 04:33:29,818 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 1 [2024-11-28 04:33:29,880 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 58 treesize of output 38 [2024-11-28 04:33:30,051 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 33 [2024-11-28 04:33:30,165 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 33 [2024-11-28 04:33:30,286 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 33 [2024-11-28 04:33:30,408 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 33 [2024-11-28 04:33:30,549 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 33 [2024-11-28 04:33:30,672 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 33 [2024-11-28 04:33:30,798 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 33 [2024-11-28 04:33:30,926 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 33 [2024-11-28 04:33:31,057 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 33 [2024-11-28 04:33:31,197 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 33 [2024-11-28 04:33:31,333 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 33 [2024-11-28 04:33:31,459 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 27 [2024-11-28 04:33:31,465 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2024-11-28 04:33:31,531 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-28 04:33:32,411 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 53 treesize of output 37 [2024-11-28 04:33:33,733 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [766211380] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-28 04:33:33,734 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-28 04:33:33,734 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [30, 30, 30] total 71 [2024-11-28 04:33:33,734 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1808531916] [2024-11-28 04:33:33,734 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-28 04:33:33,734 INFO L752 eck$LassoCheckResult]: stem already infeasible [2024-11-28 04:33:33,735 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 04:33:33,735 INFO L85 PathProgramCache]: Analyzing trace with hash -1605105021, now seen corresponding path program 17 times [2024-11-28 04:33:33,735 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM [2024-11-28 04:33:33,735 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [498654036] [2024-11-28 04:33:33,735 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 04:33:33,735 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 04:33:33,761 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-28 04:33:33,761 INFO L357 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-28 04:33:33,770 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-28 04:33:33,782 INFO L130 FreeRefinementEngine]: Strategy CAMEL_NO_AM found a feasible trace [2024-11-28 04:33:59,303 WARN L286 SmtUtils]: Spent 25.51s on a formula simplification. DAG size of input: 408 DAG size of output: 302 (called from [L 276] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.cfg.transitions.TransFormulaUtils.sequentialComposition) [2024-11-28 04:33:59,574 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL_NO_AM [2024-11-28 04:33:59,575 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 72 interpolants. [2024-11-28 04:33:59,576 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=700, Invalid=4412, Unknown=0, NotChecked=0, Total=5112 [2024-11-28 04:33:59,577 INFO L87 Difference]: Start difference. First operand 179 states and 182 transitions. cyclomatic complexity: 6 Second operand has 72 states, 71 states have (on average 4.098591549295775) internal successors, (291), 72 states have internal predecessors, (291), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 04:34:01,885 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 04:34:01,885 INFO L93 Difference]: Finished difference Result 201 states and 204 transitions. [2024-11-28 04:34:01,885 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 201 states and 204 transitions. [2024-11-28 04:34:01,886 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 65 [2024-11-28 04:34:01,887 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 201 states to 197 states and 200 transitions. [2024-11-28 04:34:01,887 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 79 [2024-11-28 04:34:01,887 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 79 [2024-11-28 04:34:01,887 INFO L73 IsDeterministic]: Start isDeterministic. Operand 197 states and 200 transitions. [2024-11-28 04:34:01,887 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-11-28 04:34:01,887 INFO L218 hiAutomatonCegarLoop]: Abstraction has 197 states and 200 transitions. [2024-11-28 04:34:01,888 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 197 states and 200 transitions. [2024-11-28 04:34:01,890 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 197 to 189. [2024-11-28 04:34:01,891 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 189 states, 189 states have (on average 1.0158730158730158) internal successors, (192), 188 states have internal predecessors, (192), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 04:34:01,892 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 189 states to 189 states and 192 transitions. [2024-11-28 04:34:01,892 INFO L240 hiAutomatonCegarLoop]: Abstraction has 189 states and 192 transitions. [2024-11-28 04:34:01,892 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 44 states. [2024-11-28 04:34:01,893 INFO L425 stractBuchiCegarLoop]: Abstraction has 189 states and 192 transitions. [2024-11-28 04:34:01,893 INFO L332 stractBuchiCegarLoop]: ======== Iteration 26 ============ [2024-11-28 04:34:01,893 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 189 states and 192 transitions. [2024-11-28 04:34:01,894 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 65 [2024-11-28 04:34:01,894 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-28 04:34:01,894 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-28 04:34:01,895 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [24, 24, 24, 24, 22, 2, 1, 1, 1, 1] [2024-11-28 04:34:01,895 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [13, 13, 13, 13, 12, 1] [2024-11-28 04:34:01,895 INFO L747 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~nondet4#1, main_#t~nondet5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~mem8#1, main_#t~short9#1, main_#t~malloc10#1.base, main_#t~malloc10#1.offset, main_#t~mem11#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~nondet14#1, main_#t~short15#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~id~0#1.base, main_~id~0#1.offset, main_~maxId~0#1.base, main_~maxId~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~id~0#1.base, main_~id~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~maxId~0#1.base, main_~maxId~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset;havoc main_#t~nondet4#1;call write~int#0(main_#t~nondet4#1, main_~id~0#1.base, main_~id~0#1.offset, 4);havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;call write~int#1(main_#t~nondet5#1, main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);havoc main_#t~nondet5#1;call main_#t~mem6#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short9#1 := 0 <= main_#t~mem6#1;" "assume main_#t~short9#1;call main_#t~mem7#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);call main_#t~mem8#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);main_#t~short9#1 := main_#t~mem7#1 < main_#t~mem8#1;" "assume main_#t~short9#1;havoc main_#t~mem6#1;havoc main_#t~mem7#1;havoc main_#t~mem8#1;havoc main_#t~short9#1;call main_#t~malloc10#1.base, main_#t~malloc10#1.offset := #Ultimate.allocOnStack(4);main_~tmp~0#1.base, main_~tmp~0#1.offset := main_#t~malloc10#1.base, main_#t~malloc10#1.offset;call main_#t~mem11#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);call write~int#2(1 + main_#t~mem11#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem11#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#2(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#2(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);" [2024-11-28 04:34:01,896 INFO L749 eck$LassoCheckResult]: Loop: "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#2(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);" [2024-11-28 04:34:01,896 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 04:34:01,896 INFO L85 PathProgramCache]: Analyzing trace with hash 274083049, now seen corresponding path program 23 times [2024-11-28 04:34:01,896 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM [2024-11-28 04:34:01,896 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1715291700] [2024-11-28 04:34:01,896 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 04:34:01,896 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 04:34:01,962 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 04:34:05,469 INFO L136 FreeRefinementEngine]: Strategy CAMEL_NO_AM found an infeasible trace [2024-11-28 04:34:05,469 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1715291700] [2024-11-28 04:34:05,469 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1715291700] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-28 04:34:05,469 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1074599916] [2024-11-28 04:34:05,469 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 04:34:05,469 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-28 04:34:05,469 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 04:34:05,472 INFO L229 MonitoredProcess]: Starting monitored process 88 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-28 04:34:05,474 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (88)] Waiting until timeout for monitored process [2024-11-28 04:34:05,950 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 04:34:05,955 INFO L256 TraceCheckSpWp]: Trace formula consists of 985 conjuncts, 62 conjuncts are in the unsatisfiable core [2024-11-28 04:34:05,961 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-28 04:34:05,963 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 13 [2024-11-28 04:34:05,979 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-28 04:34:06,042 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-28 04:34:06,106 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-28 04:34:06,167 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-28 04:34:06,231 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-28 04:34:06,294 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-28 04:34:06,356 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-28 04:34:06,420 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-28 04:34:06,487 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-28 04:34:06,627 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 28 [2024-11-28 04:34:06,719 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 13 [2024-11-28 04:34:06,893 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 31 [2024-11-28 04:34:06,987 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-28 04:34:07,005 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-28 04:34:07,022 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-28 04:34:07,040 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-28 04:34:07,057 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-28 04:34:07,075 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-28 04:34:07,094 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-28 04:34:07,118 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-28 04:34:07,136 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-28 04:34:07,154 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-28 04:34:07,257 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 29 [2024-11-28 04:34:07,322 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 13 [2024-11-28 04:34:07,328 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 9 [2024-11-28 04:34:07,332 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-28 04:34:07,679 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 18 [2024-11-28 04:34:07,969 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 20 [2024-11-28 04:34:08,110 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1074599916] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-28 04:34:08,110 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-28 04:34:08,110 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [31, 30, 30] total 50 [2024-11-28 04:34:08,111 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1581506773] [2024-11-28 04:34:08,111 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-28 04:34:08,111 INFO L752 eck$LassoCheckResult]: stem already infeasible [2024-11-28 04:34:08,111 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 04:34:08,111 INFO L85 PathProgramCache]: Analyzing trace with hash 1637829369, now seen corresponding path program 18 times [2024-11-28 04:34:08,111 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM [2024-11-28 04:34:08,111 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1985560198] [2024-11-28 04:34:08,112 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 04:34:08,112 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 04:34:08,149 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-28 04:34:08,150 INFO L357 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-28 04:34:08,172 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-28 04:34:08,182 INFO L130 FreeRefinementEngine]: Strategy CAMEL_NO_AM found a feasible trace [2024-11-28 04:34:45,344 WARN L286 SmtUtils]: Spent 37.15s on a formula simplification. DAG size of input: 439 DAG size of output: 324 (called from [L 276] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.cfg.transitions.TransFormulaUtils.sequentialComposition) [2024-11-28 04:34:45,614 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL_NO_AM [2024-11-28 04:34:45,614 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 51 interpolants. [2024-11-28 04:34:45,615 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=142, Invalid=2408, Unknown=0, NotChecked=0, Total=2550 [2024-11-28 04:34:45,615 INFO L87 Difference]: Start difference. First operand 189 states and 192 transitions. cyclomatic complexity: 6 Second operand has 51 states, 50 states have (on average 3.88) internal successors, (194), 51 states have internal predecessors, (194), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 04:34:54,753 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 04:34:54,753 INFO L93 Difference]: Finished difference Result 267 states and 271 transitions. [2024-11-28 04:34:54,753 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 267 states and 271 transitions. [2024-11-28 04:34:54,755 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 65 [2024-11-28 04:34:54,756 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 267 states to 198 states and 201 transitions. [2024-11-28 04:34:54,756 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 79 [2024-11-28 04:34:54,756 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 79 [2024-11-28 04:34:54,757 INFO L73 IsDeterministic]: Start isDeterministic. Operand 198 states and 201 transitions. [2024-11-28 04:34:54,757 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-11-28 04:34:54,757 INFO L218 hiAutomatonCegarLoop]: Abstraction has 198 states and 201 transitions. [2024-11-28 04:34:54,757 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 198 states and 201 transitions. [2024-11-28 04:34:54,760 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 198 to 194. [2024-11-28 04:34:54,760 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 194 states, 194 states have (on average 1.0154639175257731) internal successors, (197), 193 states have internal predecessors, (197), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 04:34:54,761 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 194 states and 197 transitions. [2024-11-28 04:34:54,761 INFO L240 hiAutomatonCegarLoop]: Abstraction has 194 states and 197 transitions. [2024-11-28 04:34:54,762 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 83 states. [2024-11-28 04:34:54,763 INFO L425 stractBuchiCegarLoop]: Abstraction has 194 states and 197 transitions. [2024-11-28 04:34:54,763 INFO L332 stractBuchiCegarLoop]: ======== Iteration 27 ============ [2024-11-28 04:34:54,763 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 194 states and 197 transitions. [2024-11-28 04:34:54,764 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 65 [2024-11-28 04:34:54,764 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-28 04:34:54,764 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-28 04:34:54,765 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [25, 25, 25, 25, 23, 2, 1, 1, 1, 1] [2024-11-28 04:34:54,765 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [13, 13, 13, 13, 12, 1] [2024-11-28 04:34:54,765 INFO L747 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~nondet4#1, main_#t~nondet5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~mem8#1, main_#t~short9#1, main_#t~malloc10#1.base, main_#t~malloc10#1.offset, main_#t~mem11#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~nondet14#1, main_#t~short15#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~id~0#1.base, main_~id~0#1.offset, main_~maxId~0#1.base, main_~maxId~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~id~0#1.base, main_~id~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~maxId~0#1.base, main_~maxId~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset;havoc main_#t~nondet4#1;call write~int#0(main_#t~nondet4#1, main_~id~0#1.base, main_~id~0#1.offset, 4);havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;call write~int#1(main_#t~nondet5#1, main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);havoc main_#t~nondet5#1;call main_#t~mem6#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short9#1 := 0 <= main_#t~mem6#1;" "assume main_#t~short9#1;call main_#t~mem7#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);call main_#t~mem8#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);main_#t~short9#1 := main_#t~mem7#1 < main_#t~mem8#1;" "assume main_#t~short9#1;havoc main_#t~mem6#1;havoc main_#t~mem7#1;havoc main_#t~mem8#1;havoc main_#t~short9#1;call main_#t~malloc10#1.base, main_#t~malloc10#1.offset := #Ultimate.allocOnStack(4);main_~tmp~0#1.base, main_~tmp~0#1.offset := main_#t~malloc10#1.base, main_#t~malloc10#1.offset;call main_#t~mem11#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);call write~int#2(1 + main_#t~mem11#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem11#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#2(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#2(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);" [2024-11-28 04:34:54,765 INFO L749 eck$LassoCheckResult]: Loop: "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#2(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);" [2024-11-28 04:34:54,765 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 04:34:54,766 INFO L85 PathProgramCache]: Analyzing trace with hash 1673028111, now seen corresponding path program 24 times [2024-11-28 04:34:54,766 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM [2024-11-28 04:34:54,766 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2010760699] [2024-11-28 04:34:54,766 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 04:34:54,766 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 04:34:54,845 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 04:34:58,503 INFO L136 FreeRefinementEngine]: Strategy CAMEL_NO_AM found an infeasible trace [2024-11-28 04:34:58,504 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2010760699] [2024-11-28 04:34:58,504 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2010760699] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-28 04:34:58,504 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [907480619] [2024-11-28 04:34:58,504 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 04:34:58,504 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-28 04:34:58,504 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 04:34:58,508 INFO L229 MonitoredProcess]: Starting monitored process 89 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-28 04:34:58,509 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (89)] Waiting until timeout for monitored process [2024-11-28 04:34:59,047 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 04:34:59,052 INFO L256 TraceCheckSpWp]: Trace formula consists of 1022 conjuncts, 64 conjuncts are in the unsatisfiable core [2024-11-28 04:34:59,059 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-28 04:34:59,081 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 13 [2024-11-28 04:34:59,128 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-28 04:34:59,217 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-28 04:34:59,311 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-28 04:34:59,408 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-28 04:34:59,506 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-28 04:34:59,606 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-28 04:34:59,712 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-28 04:34:59,825 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-28 04:34:59,934 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-28 04:35:00,048 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-28 04:35:00,157 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 13 [2024-11-28 04:35:00,338 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 1 [2024-11-28 04:35:00,399 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 58 treesize of output 38 [2024-11-28 04:35:00,576 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 33 [2024-11-28 04:35:00,692 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 33 [2024-11-28 04:35:00,810 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 33 [2024-11-28 04:35:00,930 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 33 [2024-11-28 04:35:01,053 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 33 [2024-11-28 04:35:01,177 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 33 [2024-11-28 04:35:01,304 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 33 [2024-11-28 04:35:01,433 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 33 [2024-11-28 04:35:01,566 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 33 [2024-11-28 04:35:01,701 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 33 [2024-11-28 04:35:01,837 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 33 [2024-11-28 04:35:01,975 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 33 [2024-11-28 04:35:02,106 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-28 04:35:02,109 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-28 04:35:02,178 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-28 04:35:03,136 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 53 treesize of output 37 [2024-11-28 04:35:04,518 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [907480619] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-28 04:35:04,518 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-28 04:35:04,519 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [32, 32, 32] total 76 [2024-11-28 04:35:04,519 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [26867199] [2024-11-28 04:35:04,519 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-28 04:35:04,520 INFO L752 eck$LassoCheckResult]: stem already infeasible [2024-11-28 04:35:04,520 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 04:35:04,520 INFO L85 PathProgramCache]: Analyzing trace with hash 1637829369, now seen corresponding path program 19 times [2024-11-28 04:35:04,520 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM [2024-11-28 04:35:04,520 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [267507121] [2024-11-28 04:35:04,520 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 04:35:04,520 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 04:35:04,550 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-28 04:35:04,551 INFO L357 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-28 04:35:04,564 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-28 04:35:04,571 INFO L130 FreeRefinementEngine]: Strategy CAMEL_NO_AM found a feasible trace [2024-11-28 04:35:39,583 WARN L286 SmtUtils]: Spent 35.00s on a formula simplification. DAG size of input: 439 DAG size of output: 324 (called from [L 276] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.cfg.transitions.TransFormulaUtils.sequentialComposition) [2024-11-28 04:35:39,801 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL_NO_AM [2024-11-28 04:35:39,801 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 77 interpolants. [2024-11-28 04:35:39,803 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=805, Invalid=5047, Unknown=0, NotChecked=0, Total=5852 [2024-11-28 04:35:39,804 INFO L87 Difference]: Start difference. First operand 194 states and 197 transitions. cyclomatic complexity: 6 Second operand has 77 states, 76 states have (on average 4.157894736842105) internal successors, (316), 77 states have internal predecessors, (316), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 04:35:42,129 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 04:35:42,129 INFO L93 Difference]: Finished difference Result 216 states and 219 transitions. [2024-11-28 04:35:42,129 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 216 states and 219 transitions. [2024-11-28 04:35:42,130 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 70 [2024-11-28 04:35:42,130 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 216 states to 212 states and 215 transitions. [2024-11-28 04:35:42,131 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 84 [2024-11-28 04:35:42,131 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 84 [2024-11-28 04:35:42,131 INFO L73 IsDeterministic]: Start isDeterministic. Operand 212 states and 215 transitions. [2024-11-28 04:35:42,131 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-11-28 04:35:42,131 INFO L218 hiAutomatonCegarLoop]: Abstraction has 212 states and 215 transitions. [2024-11-28 04:35:42,131 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 212 states and 215 transitions. [2024-11-28 04:35:42,133 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 212 to 204. [2024-11-28 04:35:42,134 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 204 states, 204 states have (on average 1.0147058823529411) internal successors, (207), 203 states have internal predecessors, (207), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 04:35:42,134 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 204 states to 204 states and 207 transitions. [2024-11-28 04:35:42,134 INFO L240 hiAutomatonCegarLoop]: Abstraction has 204 states and 207 transitions. [2024-11-28 04:35:42,135 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 47 states. [2024-11-28 04:35:42,136 INFO L425 stractBuchiCegarLoop]: Abstraction has 204 states and 207 transitions. [2024-11-28 04:35:42,136 INFO L332 stractBuchiCegarLoop]: ======== Iteration 28 ============ [2024-11-28 04:35:42,136 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 204 states and 207 transitions. [2024-11-28 04:35:42,137 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 70 [2024-11-28 04:35:42,137 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-28 04:35:42,137 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-28 04:35:42,138 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [26, 26, 26, 26, 24, 2, 1, 1, 1, 1] [2024-11-28 04:35:42,138 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [14, 14, 14, 14, 13, 1] [2024-11-28 04:35:42,138 INFO L747 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~nondet4#1, main_#t~nondet5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~mem8#1, main_#t~short9#1, main_#t~malloc10#1.base, main_#t~malloc10#1.offset, main_#t~mem11#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~nondet14#1, main_#t~short15#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~id~0#1.base, main_~id~0#1.offset, main_~maxId~0#1.base, main_~maxId~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~id~0#1.base, main_~id~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~maxId~0#1.base, main_~maxId~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset;havoc main_#t~nondet4#1;call write~int#0(main_#t~nondet4#1, main_~id~0#1.base, main_~id~0#1.offset, 4);havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;call write~int#1(main_#t~nondet5#1, main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);havoc main_#t~nondet5#1;call main_#t~mem6#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short9#1 := 0 <= main_#t~mem6#1;" "assume main_#t~short9#1;call main_#t~mem7#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);call main_#t~mem8#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);main_#t~short9#1 := main_#t~mem7#1 < main_#t~mem8#1;" "assume main_#t~short9#1;havoc main_#t~mem6#1;havoc main_#t~mem7#1;havoc main_#t~mem8#1;havoc main_#t~short9#1;call main_#t~malloc10#1.base, main_#t~malloc10#1.offset := #Ultimate.allocOnStack(4);main_~tmp~0#1.base, main_~tmp~0#1.offset := main_#t~malloc10#1.base, main_#t~malloc10#1.offset;call main_#t~mem11#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);call write~int#2(1 + main_#t~mem11#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem11#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#2(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#2(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);" [2024-11-28 04:35:42,138 INFO L749 eck$LassoCheckResult]: Loop: "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#2(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);" [2024-11-28 04:35:42,139 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 04:35:42,140 INFO L85 PathProgramCache]: Analyzing trace with hash -2126525715, now seen corresponding path program 25 times [2024-11-28 04:35:42,140 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM [2024-11-28 04:35:42,140 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1466962910] [2024-11-28 04:35:42,140 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 04:35:42,140 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 04:35:42,202 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 04:35:46,634 INFO L136 FreeRefinementEngine]: Strategy CAMEL_NO_AM found an infeasible trace [2024-11-28 04:35:46,634 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1466962910] [2024-11-28 04:35:46,634 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1466962910] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-28 04:35:46,634 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [130366823] [2024-11-28 04:35:46,634 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 04:35:46,634 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-28 04:35:46,634 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 04:35:46,637 INFO L229 MonitoredProcess]: Starting monitored process 90 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-28 04:35:46,639 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (90)] Waiting until timeout for monitored process [2024-11-28 04:35:47,175 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 04:35:47,180 INFO L256 TraceCheckSpWp]: Trace formula consists of 1059 conjuncts, 66 conjuncts are in the unsatisfiable core [2024-11-28 04:35:47,187 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-28 04:35:47,190 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 13 [2024-11-28 04:35:47,205 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-28 04:35:47,268 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-28 04:35:47,333 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-28 04:35:47,398 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-28 04:35:47,464 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-28 04:35:47,531 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-28 04:35:47,606 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-28 04:35:47,675 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-28 04:35:47,742 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-28 04:35:47,811 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-28 04:35:47,956 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 28 [2024-11-28 04:35:48,051 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 13 [2024-11-28 04:35:48,210 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 31 [2024-11-28 04:35:48,305 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-28 04:35:48,323 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-28 04:35:48,343 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-28 04:35:48,364 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-28 04:35:48,384 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-28 04:35:48,404 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-28 04:35:48,422 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-28 04:35:48,439 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-28 04:35:48,460 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-28 04:35:48,476 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-28 04:35:48,492 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-28 04:35:48,596 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 29 [2024-11-28 04:35:48,665 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 13 [2024-11-28 04:35:48,668 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 9 [2024-11-28 04:35:48,671 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-28 04:35:48,945 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 18 [2024-11-28 04:35:49,241 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 20 [2024-11-28 04:35:49,393 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [130366823] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-28 04:35:49,393 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-28 04:35:49,393 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [33, 32, 32] total 52 [2024-11-28 04:35:49,394 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [356800535] [2024-11-28 04:35:49,394 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-28 04:35:49,394 INFO L752 eck$LassoCheckResult]: stem already infeasible [2024-11-28 04:35:49,394 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 04:35:49,395 INFO L85 PathProgramCache]: Analyzing trace with hash -1229462461, now seen corresponding path program 20 times [2024-11-28 04:35:49,395 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM [2024-11-28 04:35:49,395 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1002725853] [2024-11-28 04:35:49,395 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 04:35:49,395 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 04:35:49,433 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-28 04:35:49,434 INFO L357 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-28 04:35:49,447 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-28 04:35:49,453 INFO L130 FreeRefinementEngine]: Strategy CAMEL_NO_AM found a feasible trace [2024-11-28 04:36:38,180 WARN L286 SmtUtils]: Spent 48.72s on a formula simplification. DAG size of input: 470 DAG size of output: 346 (called from [L 276] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.cfg.transitions.TransFormulaUtils.sequentialComposition) [2024-11-28 04:36:38,477 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL_NO_AM [2024-11-28 04:36:38,477 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 53 interpolants. [2024-11-28 04:36:38,478 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=146, Invalid=2610, Unknown=0, NotChecked=0, Total=2756 [2024-11-28 04:36:38,478 INFO L87 Difference]: Start difference. First operand 204 states and 207 transitions. cyclomatic complexity: 6 Second operand has 53 states, 52 states have (on average 3.980769230769231) internal successors, (207), 53 states have internal predecessors, (207), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 04:36:49,666 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 04:36:49,666 INFO L93 Difference]: Finished difference Result 287 states and 291 transitions. [2024-11-28 04:36:49,667 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 287 states and 291 transitions. [2024-11-28 04:36:49,667 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 70 [2024-11-28 04:36:49,668 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 287 states to 213 states and 216 transitions. [2024-11-28 04:36:49,668 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 84 [2024-11-28 04:36:49,668 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 84 [2024-11-28 04:36:49,668 INFO L73 IsDeterministic]: Start isDeterministic. Operand 213 states and 216 transitions. [2024-11-28 04:36:49,668 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-11-28 04:36:49,669 INFO L218 hiAutomatonCegarLoop]: Abstraction has 213 states and 216 transitions. [2024-11-28 04:36:49,669 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 213 states and 216 transitions. [2024-11-28 04:36:49,672 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 213 to 209. [2024-11-28 04:36:49,672 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 209 states, 209 states have (on average 1.014354066985646) internal successors, (212), 208 states have internal predecessors, (212), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 04:36:49,673 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 209 states to 209 states and 212 transitions. [2024-11-28 04:36:49,673 INFO L240 hiAutomatonCegarLoop]: Abstraction has 209 states and 212 transitions. [2024-11-28 04:36:49,674 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 90 states. [2024-11-28 04:36:49,674 INFO L425 stractBuchiCegarLoop]: Abstraction has 209 states and 212 transitions. [2024-11-28 04:36:49,674 INFO L332 stractBuchiCegarLoop]: ======== Iteration 29 ============ [2024-11-28 04:36:49,674 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 209 states and 212 transitions. [2024-11-28 04:36:49,675 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 70 [2024-11-28 04:36:49,675 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-28 04:36:49,675 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-28 04:36:49,676 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [27, 27, 27, 27, 25, 2, 1, 1, 1, 1] [2024-11-28 04:36:49,677 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [14, 14, 14, 14, 13, 1] [2024-11-28 04:36:49,677 INFO L747 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~nondet4#1, main_#t~nondet5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~mem8#1, main_#t~short9#1, main_#t~malloc10#1.base, main_#t~malloc10#1.offset, main_#t~mem11#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~nondet14#1, main_#t~short15#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~id~0#1.base, main_~id~0#1.offset, main_~maxId~0#1.base, main_~maxId~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~id~0#1.base, main_~id~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~maxId~0#1.base, main_~maxId~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset;havoc main_#t~nondet4#1;call write~int#0(main_#t~nondet4#1, main_~id~0#1.base, main_~id~0#1.offset, 4);havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;call write~int#1(main_#t~nondet5#1, main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);havoc main_#t~nondet5#1;call main_#t~mem6#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short9#1 := 0 <= main_#t~mem6#1;" "assume main_#t~short9#1;call main_#t~mem7#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);call main_#t~mem8#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);main_#t~short9#1 := main_#t~mem7#1 < main_#t~mem8#1;" "assume main_#t~short9#1;havoc main_#t~mem6#1;havoc main_#t~mem7#1;havoc main_#t~mem8#1;havoc main_#t~short9#1;call main_#t~malloc10#1.base, main_#t~malloc10#1.offset := #Ultimate.allocOnStack(4);main_~tmp~0#1.base, main_~tmp~0#1.offset := main_#t~malloc10#1.base, main_#t~malloc10#1.offset;call main_#t~mem11#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);call write~int#2(1 + main_#t~mem11#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem11#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#2(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#2(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);" [2024-11-28 04:36:49,678 INFO L749 eck$LassoCheckResult]: Loop: "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#2(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);" [2024-11-28 04:36:49,678 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 04:36:49,678 INFO L85 PathProgramCache]: Analyzing trace with hash -183089005, now seen corresponding path program 26 times [2024-11-28 04:36:49,679 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM [2024-11-28 04:36:49,679 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1197383744] [2024-11-28 04:36:49,679 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 04:36:49,679 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 04:36:49,763 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 04:36:53,993 INFO L136 FreeRefinementEngine]: Strategy CAMEL_NO_AM found an infeasible trace [2024-11-28 04:36:53,994 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1197383744] [2024-11-28 04:36:53,994 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1197383744] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-28 04:36:53,994 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1105073720] [2024-11-28 04:36:53,994 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 04:36:53,994 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-28 04:36:53,994 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 04:36:53,996 INFO L229 MonitoredProcess]: Starting monitored process 91 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-28 04:36:53,998 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (91)] Waiting until timeout for monitored process [2024-11-28 04:36:54,635 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 04:36:54,641 INFO L256 TraceCheckSpWp]: Trace formula consists of 1096 conjuncts, 68 conjuncts are in the unsatisfiable core [2024-11-28 04:36:54,649 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-28 04:36:54,677 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 13 [2024-11-28 04:36:54,731 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-28 04:36:54,834 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-28 04:36:54,937 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-28 04:36:55,032 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-28 04:36:55,133 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-28 04:36:55,229 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-28 04:36:55,322 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-28 04:36:55,419 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-28 04:36:55,516 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-28 04:36:55,625 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-28 04:36:55,733 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-28 04:36:55,835 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 13 [2024-11-28 04:36:56,001 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 1 [2024-11-28 04:36:56,064 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 58 treesize of output 38 [2024-11-28 04:36:56,227 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 33 [2024-11-28 04:36:56,331 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 33 [2024-11-28 04:36:56,437 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 33 [2024-11-28 04:36:56,543 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 33 [2024-11-28 04:36:56,651 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 33 [2024-11-28 04:36:56,771 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 33 [2024-11-28 04:36:56,899 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 33 [2024-11-28 04:36:57,035 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 33 [2024-11-28 04:36:57,179 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 33 [2024-11-28 04:36:57,327 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 33 [2024-11-28 04:36:57,468 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 33 [2024-11-28 04:36:57,607 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 33 [2024-11-28 04:36:57,751 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 33 [2024-11-28 04:36:57,885 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-28 04:36:57,888 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-28 04:36:57,961 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-28 04:36:59,002 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 53 treesize of output 37 [2024-11-28 04:37:00,741 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1105073720] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-28 04:37:00,741 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-28 04:37:00,741 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [34, 34, 34] total 81 [2024-11-28 04:37:00,741 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [655938743] [2024-11-28 04:37:00,741 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-28 04:37:00,742 INFO L752 eck$LassoCheckResult]: stem already infeasible [2024-11-28 04:37:00,742 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 04:37:00,742 INFO L85 PathProgramCache]: Analyzing trace with hash -1229462461, now seen corresponding path program 21 times [2024-11-28 04:37:00,742 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM [2024-11-28 04:37:00,742 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [382106042] [2024-11-28 04:37:00,743 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 04:37:00,743 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 04:37:00,776 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-28 04:37:00,776 INFO L357 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-28 04:37:00,787 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-28 04:37:00,793 INFO L130 FreeRefinementEngine]: Strategy CAMEL_NO_AM found a feasible trace [2024-11-28 04:37:50,027 WARN L286 SmtUtils]: Spent 49.23s on a formula simplification. DAG size of input: 470 DAG size of output: 346 (called from [L 276] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.cfg.transitions.TransFormulaUtils.sequentialComposition) [2024-11-28 04:37:50,280 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL_NO_AM [2024-11-28 04:37:50,280 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 82 interpolants. [2024-11-28 04:37:50,282 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=919, Invalid=5723, Unknown=0, NotChecked=0, Total=6642 [2024-11-28 04:37:50,282 INFO L87 Difference]: Start difference. First operand 209 states and 212 transitions. cyclomatic complexity: 6 Second operand has 82 states, 81 states have (on average 4.209876543209877) internal successors, (341), 82 states have internal predecessors, (341), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 04:37:52,921 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 04:37:52,921 INFO L93 Difference]: Finished difference Result 231 states and 234 transitions. [2024-11-28 04:37:52,921 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 231 states and 234 transitions. [2024-11-28 04:37:52,922 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 75 [2024-11-28 04:37:52,923 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 231 states to 227 states and 230 transitions. [2024-11-28 04:37:52,924 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 89 [2024-11-28 04:37:52,924 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 89 [2024-11-28 04:37:52,924 INFO L73 IsDeterministic]: Start isDeterministic. Operand 227 states and 230 transitions. [2024-11-28 04:37:52,924 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-11-28 04:37:52,924 INFO L218 hiAutomatonCegarLoop]: Abstraction has 227 states and 230 transitions. [2024-11-28 04:37:52,924 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 227 states and 230 transitions. [2024-11-28 04:37:52,926 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 227 to 219. [2024-11-28 04:37:52,927 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 219 states, 219 states have (on average 1.0136986301369864) internal successors, (222), 218 states have internal predecessors, (222), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 04:37:52,928 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 219 states to 219 states and 222 transitions. [2024-11-28 04:37:52,928 INFO L240 hiAutomatonCegarLoop]: Abstraction has 219 states and 222 transitions. [2024-11-28 04:37:52,929 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 50 states. [2024-11-28 04:37:52,929 INFO L425 stractBuchiCegarLoop]: Abstraction has 219 states and 222 transitions. [2024-11-28 04:37:52,929 INFO L332 stractBuchiCegarLoop]: ======== Iteration 30 ============ [2024-11-28 04:37:52,929 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 219 states and 222 transitions. [2024-11-28 04:37:52,930 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 75 [2024-11-28 04:37:52,930 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-28 04:37:52,930 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-28 04:37:52,931 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [28, 28, 28, 28, 26, 2, 1, 1, 1, 1] [2024-11-28 04:37:52,931 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [15, 15, 15, 15, 14, 1] [2024-11-28 04:37:52,932 INFO L747 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~nondet4#1, main_#t~nondet5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~mem8#1, main_#t~short9#1, main_#t~malloc10#1.base, main_#t~malloc10#1.offset, main_#t~mem11#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~nondet14#1, main_#t~short15#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~id~0#1.base, main_~id~0#1.offset, main_~maxId~0#1.base, main_~maxId~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~id~0#1.base, main_~id~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~maxId~0#1.base, main_~maxId~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset;havoc main_#t~nondet4#1;call write~int#0(main_#t~nondet4#1, main_~id~0#1.base, main_~id~0#1.offset, 4);havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;call write~int#1(main_#t~nondet5#1, main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);havoc main_#t~nondet5#1;call main_#t~mem6#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short9#1 := 0 <= main_#t~mem6#1;" "assume main_#t~short9#1;call main_#t~mem7#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);call main_#t~mem8#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);main_#t~short9#1 := main_#t~mem7#1 < main_#t~mem8#1;" "assume main_#t~short9#1;havoc main_#t~mem6#1;havoc main_#t~mem7#1;havoc main_#t~mem8#1;havoc main_#t~short9#1;call main_#t~malloc10#1.base, main_#t~malloc10#1.offset := #Ultimate.allocOnStack(4);main_~tmp~0#1.base, main_~tmp~0#1.offset := main_#t~malloc10#1.base, main_#t~malloc10#1.offset;call main_#t~mem11#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);call write~int#2(1 + main_#t~mem11#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem11#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#2(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#2(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);" [2024-11-28 04:37:52,932 INFO L749 eck$LassoCheckResult]: Loop: "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#2(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);" [2024-11-28 04:37:52,932 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 04:37:52,933 INFO L85 PathProgramCache]: Analyzing trace with hash -1646176535, now seen corresponding path program 27 times [2024-11-28 04:37:52,933 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM [2024-11-28 04:37:52,933 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1434093238] [2024-11-28 04:37:52,933 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 04:37:52,933 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 04:37:53,010 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 04:37:58,255 INFO L136 FreeRefinementEngine]: Strategy CAMEL_NO_AM found an infeasible trace [2024-11-28 04:37:58,256 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1434093238] [2024-11-28 04:37:58,256 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1434093238] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-28 04:37:58,256 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [666429658] [2024-11-28 04:37:58,256 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 04:37:58,256 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-28 04:37:58,256 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 04:37:58,261 INFO L229 MonitoredProcess]: Starting monitored process 92 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-28 04:37:58,263 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (92)] Waiting until timeout for monitored process [2024-11-28 04:37:58,881 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 04:37:58,885 INFO L256 TraceCheckSpWp]: Trace formula consists of 1133 conjuncts, 70 conjuncts are in the unsatisfiable core [2024-11-28 04:37:58,896 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-28 04:37:58,902 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 13 [2024-11-28 04:37:58,916 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-28 04:37:58,980 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-28 04:37:59,046 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-28 04:37:59,107 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-28 04:37:59,174 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-28 04:37:59,241 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-28 04:37:59,313 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-28 04:37:59,386 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-28 04:37:59,458 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-28 04:37:59,540 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-28 04:37:59,614 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-28 04:37:59,778 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 28 [2024-11-28 04:37:59,886 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 13 [2024-11-28 04:38:00,054 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 31 [2024-11-28 04:38:00,153 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-28 04:38:00,168 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-28 04:38:00,184 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-28 04:38:00,206 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-28 04:38:00,222 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-28 04:38:00,239 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-28 04:38:00,255 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-28 04:38:00,271 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-28 04:38:00,288 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-28 04:38:00,304 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-28 04:38:00,321 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-28 04:38:00,343 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-28 04:38:00,448 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 29 [2024-11-28 04:38:00,524 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 13 [2024-11-28 04:38:00,526 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 9 [2024-11-28 04:38:00,529 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-28 04:38:00,905 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 18 [2024-11-28 04:38:01,224 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 20 [2024-11-28 04:38:01,434 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [666429658] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-28 04:38:01,434 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-28 04:38:01,434 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [35, 34, 34] total 56 [2024-11-28 04:38:01,435 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [635958559] [2024-11-28 04:38:01,435 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-28 04:38:01,435 INFO L752 eck$LassoCheckResult]: stem already infeasible [2024-11-28 04:38:01,435 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 04:38:01,435 INFO L85 PathProgramCache]: Analyzing trace with hash 1683851577, now seen corresponding path program 22 times [2024-11-28 04:38:01,436 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM [2024-11-28 04:38:01,436 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1165567809] [2024-11-28 04:38:01,436 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 04:38:01,436 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 04:38:01,477 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-28 04:38:01,478 INFO L357 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-28 04:38:01,496 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-28 04:38:01,506 INFO L130 FreeRefinementEngine]: Strategy CAMEL_NO_AM found a feasible trace [2024-11-28 04:39:05,163 WARN L286 SmtUtils]: Spent 1.06m on a formula simplification. DAG size of input: 501 DAG size of output: 368 (called from [L 276] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.cfg.transitions.TransFormulaUtils.sequentialComposition) [2024-11-28 04:39:05,447 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL_NO_AM [2024-11-28 04:39:05,448 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 57 interpolants. [2024-11-28 04:39:05,448 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=160, Invalid=3032, Unknown=0, NotChecked=0, Total=3192 [2024-11-28 04:39:05,449 INFO L87 Difference]: Start difference. First operand 219 states and 222 transitions. cyclomatic complexity: 6 Second operand has 57 states, 56 states have (on average 4.0) internal successors, (224), 57 states have internal predecessors, (224), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 04:39:18,093 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 04:39:18,093 INFO L93 Difference]: Finished difference Result 307 states and 311 transitions. [2024-11-28 04:39:18,093 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 307 states and 311 transitions. [2024-11-28 04:39:18,094 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 75 [2024-11-28 04:39:18,094 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 307 states to 228 states and 231 transitions. [2024-11-28 04:39:18,094 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 89 [2024-11-28 04:39:18,094 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 89 [2024-11-28 04:39:18,094 INFO L73 IsDeterministic]: Start isDeterministic. Operand 228 states and 231 transitions. [2024-11-28 04:39:18,094 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-11-28 04:39:18,094 INFO L218 hiAutomatonCegarLoop]: Abstraction has 228 states and 231 transitions. [2024-11-28 04:39:18,095 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 228 states and 231 transitions. [2024-11-28 04:39:18,097 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 228 to 224. [2024-11-28 04:39:18,097 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 224 states, 224 states have (on average 1.0133928571428572) internal successors, (227), 223 states have internal predecessors, (227), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 04:39:18,098 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 224 states to 224 states and 227 transitions. [2024-11-28 04:39:18,098 INFO L240 hiAutomatonCegarLoop]: Abstraction has 224 states and 227 transitions. [2024-11-28 04:39:18,099 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 97 states. [2024-11-28 04:39:18,099 INFO L425 stractBuchiCegarLoop]: Abstraction has 224 states and 227 transitions. [2024-11-28 04:39:18,099 INFO L332 stractBuchiCegarLoop]: ======== Iteration 31 ============ [2024-11-28 04:39:18,099 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 224 states and 227 transitions. [2024-11-28 04:39:18,100 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 75 [2024-11-28 04:39:18,100 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-28 04:39:18,100 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-28 04:39:18,101 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [29, 29, 29, 29, 27, 2, 1, 1, 1, 1] [2024-11-28 04:39:18,101 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [15, 15, 15, 15, 14, 1] [2024-11-28 04:39:18,101 INFO L747 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~nondet4#1, main_#t~nondet5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~mem8#1, main_#t~short9#1, main_#t~malloc10#1.base, main_#t~malloc10#1.offset, main_#t~mem11#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~nondet14#1, main_#t~short15#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~id~0#1.base, main_~id~0#1.offset, main_~maxId~0#1.base, main_~maxId~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~id~0#1.base, main_~id~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~maxId~0#1.base, main_~maxId~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset;havoc main_#t~nondet4#1;call write~int#0(main_#t~nondet4#1, main_~id~0#1.base, main_~id~0#1.offset, 4);havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;call write~int#1(main_#t~nondet5#1, main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);havoc main_#t~nondet5#1;call main_#t~mem6#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short9#1 := 0 <= main_#t~mem6#1;" "assume main_#t~short9#1;call main_#t~mem7#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);call main_#t~mem8#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);main_#t~short9#1 := main_#t~mem7#1 < main_#t~mem8#1;" "assume main_#t~short9#1;havoc main_#t~mem6#1;havoc main_#t~mem7#1;havoc main_#t~mem8#1;havoc main_#t~short9#1;call main_#t~malloc10#1.base, main_#t~malloc10#1.offset := #Ultimate.allocOnStack(4);main_~tmp~0#1.base, main_~tmp~0#1.offset := main_#t~malloc10#1.base, main_#t~malloc10#1.offset;call main_#t~mem11#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);call write~int#2(1 + main_#t~mem11#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem11#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#2(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#2(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);" [2024-11-28 04:39:18,101 INFO L749 eck$LassoCheckResult]: Loop: "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#2(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);" [2024-11-28 04:39:18,101 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 04:39:18,101 INFO L85 PathProgramCache]: Analyzing trace with hash -171213553, now seen corresponding path program 28 times [2024-11-28 04:39:18,102 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM [2024-11-28 04:39:18,102 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [325933388] [2024-11-28 04:39:18,102 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 04:39:18,102 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 04:39:18,175 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 04:39:21,750 INFO L136 FreeRefinementEngine]: Strategy CAMEL_NO_AM found an infeasible trace [2024-11-28 04:39:21,750 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [325933388] [2024-11-28 04:39:21,750 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [325933388] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-28 04:39:21,750 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1289934976] [2024-11-28 04:39:21,750 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 04:39:21,750 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-28 04:39:21,750 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 04:39:21,752 INFO L229 MonitoredProcess]: Starting monitored process 93 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-28 04:39:21,754 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (93)] Waiting until timeout for monitored process [2024-11-28 04:39:22,308 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 04:39:22,313 INFO L256 TraceCheckSpWp]: Trace formula consists of 1170 conjuncts, 72 conjuncts are in the unsatisfiable core [2024-11-28 04:39:22,320 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-28 04:39:22,340 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 13 [2024-11-28 04:39:22,381 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-28 04:39:22,482 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-28 04:39:22,574 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-28 04:39:22,656 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-28 04:39:22,741 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-28 04:39:22,829 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-28 04:39:22,917 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-28 04:39:23,007 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-28 04:39:23,105 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-28 04:39:23,202 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-28 04:39:23,302 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-28 04:39:23,429 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-28 04:39:23,531 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 13 [2024-11-28 04:39:23,698 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 1 [2024-11-28 04:39:23,758 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 58 treesize of output 38 [2024-11-28 04:39:23,920 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 33 [2024-11-28 04:39:24,030 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 33 [2024-11-28 04:39:24,141 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 33 [2024-11-28 04:39:24,255 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 33 [2024-11-28 04:39:24,371 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 33 [2024-11-28 04:39:24,488 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 33 [2024-11-28 04:39:24,608 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 33 [2024-11-28 04:39:24,730 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 33 [2024-11-28 04:39:24,854 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 33 [2024-11-28 04:39:24,980 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 33 [2024-11-28 04:39:25,109 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 33 [2024-11-28 04:39:25,241 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 33 [2024-11-28 04:39:25,376 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 33 [2024-11-28 04:39:25,511 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 33 [2024-11-28 04:39:25,639 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-28 04:39:25,643 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-28 04:39:25,713 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-28 04:39:26,691 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 53 treesize of output 37 [2024-11-28 04:39:28,249 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1289934976] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-28 04:39:28,249 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-28 04:39:28,249 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [36, 36, 36] total 86 [2024-11-28 04:39:28,249 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2088645840] [2024-11-28 04:39:28,249 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-28 04:39:28,250 INFO L752 eck$LassoCheckResult]: stem already infeasible [2024-11-28 04:39:28,250 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 04:39:28,250 INFO L85 PathProgramCache]: Analyzing trace with hash 1683851577, now seen corresponding path program 23 times [2024-11-28 04:39:28,250 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM [2024-11-28 04:39:28,250 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [637715719] [2024-11-28 04:39:28,250 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 04:39:28,251 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 04:39:28,278 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-28 04:39:28,278 INFO L357 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-28 04:39:28,294 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-28 04:39:28,302 INFO L130 FreeRefinementEngine]: Strategy CAMEL_NO_AM found a feasible trace [2024-11-28 04:40:32,099 WARN L286 SmtUtils]: Spent 1.06m on a formula simplification. DAG size of input: 501 DAG size of output: 368 (called from [L 276] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.cfg.transitions.TransFormulaUtils.sequentialComposition) [2024-11-28 04:40:32,390 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL_NO_AM [2024-11-28 04:40:32,391 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 87 interpolants. [2024-11-28 04:40:32,392 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=1038, Invalid=6444, Unknown=0, NotChecked=0, Total=7482 [2024-11-28 04:40:32,393 INFO L87 Difference]: Start difference. First operand 224 states and 227 transitions. cyclomatic complexity: 6 Second operand has 87 states, 86 states have (on average 4.255813953488372) internal successors, (366), 87 states have internal predecessors, (366), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 04:40:35,555 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 04:40:35,556 INFO L93 Difference]: Finished difference Result 246 states and 249 transitions. [2024-11-28 04:40:35,556 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 246 states and 249 transitions. [2024-11-28 04:40:35,557 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 80 [2024-11-28 04:40:35,558 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 246 states to 242 states and 245 transitions. [2024-11-28 04:40:35,558 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 94 [2024-11-28 04:40:35,558 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 94 [2024-11-28 04:40:35,558 INFO L73 IsDeterministic]: Start isDeterministic. Operand 242 states and 245 transitions. [2024-11-28 04:40:35,558 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-11-28 04:40:35,558 INFO L218 hiAutomatonCegarLoop]: Abstraction has 242 states and 245 transitions. [2024-11-28 04:40:35,559 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 242 states and 245 transitions. [2024-11-28 04:40:35,562 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 242 to 234. [2024-11-28 04:40:35,563 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 234 states, 234 states have (on average 1.0128205128205128) internal successors, (237), 233 states have internal predecessors, (237), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 04:40:35,564 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 234 states to 234 states and 237 transitions. [2024-11-28 04:40:35,564 INFO L240 hiAutomatonCegarLoop]: Abstraction has 234 states and 237 transitions. [2024-11-28 04:40:35,564 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 53 states. [2024-11-28 04:40:35,565 INFO L425 stractBuchiCegarLoop]: Abstraction has 234 states and 237 transitions. [2024-11-28 04:40:35,565 INFO L332 stractBuchiCegarLoop]: ======== Iteration 32 ============ [2024-11-28 04:40:35,566 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 234 states and 237 transitions. [2024-11-28 04:40:35,566 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 80 [2024-11-28 04:40:35,567 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-28 04:40:35,567 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-28 04:40:35,568 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [30, 30, 30, 30, 28, 2, 1, 1, 1, 1] [2024-11-28 04:40:35,568 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [16, 16, 16, 16, 15, 1] [2024-11-28 04:40:35,569 INFO L747 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~nondet4#1, main_#t~nondet5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~mem8#1, main_#t~short9#1, main_#t~malloc10#1.base, main_#t~malloc10#1.offset, main_#t~mem11#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~nondet14#1, main_#t~short15#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~id~0#1.base, main_~id~0#1.offset, main_~maxId~0#1.base, main_~maxId~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~id~0#1.base, main_~id~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~maxId~0#1.base, main_~maxId~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset;havoc main_#t~nondet4#1;call write~int#0(main_#t~nondet4#1, main_~id~0#1.base, main_~id~0#1.offset, 4);havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;call write~int#1(main_#t~nondet5#1, main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);havoc main_#t~nondet5#1;call main_#t~mem6#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short9#1 := 0 <= main_#t~mem6#1;" "assume main_#t~short9#1;call main_#t~mem7#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);call main_#t~mem8#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);main_#t~short9#1 := main_#t~mem7#1 < main_#t~mem8#1;" "assume main_#t~short9#1;havoc main_#t~mem6#1;havoc main_#t~mem7#1;havoc main_#t~mem8#1;havoc main_#t~short9#1;call main_#t~malloc10#1.base, main_#t~malloc10#1.offset := #Ultimate.allocOnStack(4);main_~tmp~0#1.base, main_~tmp~0#1.offset := main_#t~malloc10#1.base, main_#t~malloc10#1.offset;call main_#t~mem11#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);call write~int#2(1 + main_#t~mem11#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem11#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#2(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#2(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);" [2024-11-28 04:40:35,569 INFO L749 eck$LassoCheckResult]: Loop: "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#2(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);" [2024-11-28 04:40:35,570 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 04:40:35,570 INFO L85 PathProgramCache]: Analyzing trace with hash 1441107949, now seen corresponding path program 29 times [2024-11-28 04:40:35,570 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM [2024-11-28 04:40:35,570 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1506264196] [2024-11-28 04:40:35,570 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 04:40:35,570 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 04:40:35,679 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 04:40:40,254 INFO L136 FreeRefinementEngine]: Strategy CAMEL_NO_AM found an infeasible trace [2024-11-28 04:40:40,254 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1506264196] [2024-11-28 04:40:40,254 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1506264196] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-28 04:40:40,254 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [158199392] [2024-11-28 04:40:40,254 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 04:40:40,255 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-28 04:40:40,255 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 04:40:40,257 INFO L229 MonitoredProcess]: Starting monitored process 94 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-28 04:40:40,258 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (94)] Waiting until timeout for monitored process [2024-11-28 04:40:40,870 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 04:40:40,874 INFO L256 TraceCheckSpWp]: Trace formula consists of 1207 conjuncts, 74 conjuncts are in the unsatisfiable core [2024-11-28 04:40:40,883 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-28 04:40:40,887 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 13 [2024-11-28 04:40:40,900 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-28 04:40:40,962 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-28 04:40:41,021 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-28 04:40:41,086 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-28 04:40:41,150 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-28 04:40:41,213 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-28 04:40:41,279 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-28 04:40:41,344 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-28 04:40:41,410 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-28 04:40:41,480 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-28 04:40:41,546 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-28 04:40:41,613 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-28 04:40:41,779 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 28 [2024-11-28 04:40:41,876 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 13 [2024-11-28 04:40:42,023 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 31 [2024-11-28 04:40:42,107 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-28 04:40:42,120 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-28 04:40:42,133 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-28 04:40:42,147 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-28 04:40:42,160 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-28 04:40:42,173 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-28 04:40:42,187 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-28 04:40:42,200 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-28 04:40:42,212 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-28 04:40:42,226 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-28 04:40:42,238 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-28 04:40:42,250 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-28 04:40:42,263 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-28 04:40:42,349 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 29 [2024-11-28 04:40:42,415 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 13 [2024-11-28 04:40:42,417 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 9 [2024-11-28 04:40:42,420 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-28 04:40:42,734 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 18 [2024-11-28 04:40:42,997 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 20 [2024-11-28 04:40:43,142 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [158199392] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-28 04:40:43,142 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-28 04:40:43,143 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [37, 36, 36] total 59 [2024-11-28 04:40:43,143 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [149069857] [2024-11-28 04:40:43,143 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-28 04:40:43,143 INFO L752 eck$LassoCheckResult]: stem already infeasible [2024-11-28 04:40:43,143 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 04:40:43,143 INFO L85 PathProgramCache]: Analyzing trace with hash -194605565, now seen corresponding path program 24 times [2024-11-28 04:40:43,143 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM [2024-11-28 04:40:43,143 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1847214515] [2024-11-28 04:40:43,143 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 04:40:43,144 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 04:40:43,178 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-28 04:40:43,178 INFO L357 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-28 04:40:43,195 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-28 04:40:43,203 INFO L130 FreeRefinementEngine]: Strategy CAMEL_NO_AM found a feasible trace [2024-11-28 04:41:52,900 WARN L286 SmtUtils]: Spent 1.16m on a formula simplification. DAG size of input: 532 DAG size of output: 390 (called from [L 276] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.cfg.transitions.TransFormulaUtils.sequentialComposition) [2024-11-28 04:41:53,185 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL_NO_AM [2024-11-28 04:41:53,185 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 60 interpolants. [2024-11-28 04:41:53,186 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=167, Invalid=3373, Unknown=0, NotChecked=0, Total=3540 [2024-11-28 04:41:53,186 INFO L87 Difference]: Start difference. First operand 234 states and 237 transitions. cyclomatic complexity: 6 Second operand has 60 states, 59 states have (on average 4.0508474576271185) internal successors, (239), 60 states have internal predecessors, (239), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 04:42:06,735 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 04:42:06,735 INFO L93 Difference]: Finished difference Result 327 states and 331 transitions. [2024-11-28 04:42:06,735 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 327 states and 331 transitions. [2024-11-28 04:42:06,736 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 80 [2024-11-28 04:42:06,737 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 327 states to 243 states and 246 transitions. [2024-11-28 04:42:06,737 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 94 [2024-11-28 04:42:06,737 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 94 [2024-11-28 04:42:06,737 INFO L73 IsDeterministic]: Start isDeterministic. Operand 243 states and 246 transitions. [2024-11-28 04:42:06,737 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-11-28 04:42:06,737 INFO L218 hiAutomatonCegarLoop]: Abstraction has 243 states and 246 transitions. [2024-11-28 04:42:06,737 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 243 states and 246 transitions. [2024-11-28 04:42:06,739 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 243 to 239. [2024-11-28 04:42:06,739 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 239 states, 239 states have (on average 1.0125523012552302) internal successors, (242), 238 states have internal predecessors, (242), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 04:42:06,740 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 239 states to 239 states and 242 transitions. [2024-11-28 04:42:06,740 INFO L240 hiAutomatonCegarLoop]: Abstraction has 239 states and 242 transitions. [2024-11-28 04:42:06,741 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 104 states. [2024-11-28 04:42:06,742 INFO L425 stractBuchiCegarLoop]: Abstraction has 239 states and 242 transitions. [2024-11-28 04:42:06,742 INFO L332 stractBuchiCegarLoop]: ======== Iteration 33 ============ [2024-11-28 04:42:06,742 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 239 states and 242 transitions. [2024-11-28 04:42:06,742 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 80 [2024-11-28 04:42:06,742 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-28 04:42:06,743 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-28 04:42:06,743 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [31, 31, 31, 31, 29, 2, 1, 1, 1, 1] [2024-11-28 04:42:06,743 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [16, 16, 16, 16, 15, 1] [2024-11-28 04:42:06,744 INFO L747 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~nondet4#1, main_#t~nondet5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~mem8#1, main_#t~short9#1, main_#t~malloc10#1.base, main_#t~malloc10#1.offset, main_#t~mem11#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~nondet14#1, main_#t~short15#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~id~0#1.base, main_~id~0#1.offset, main_~maxId~0#1.base, main_~maxId~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~id~0#1.base, main_~id~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~maxId~0#1.base, main_~maxId~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset;havoc main_#t~nondet4#1;call write~int#0(main_#t~nondet4#1, main_~id~0#1.base, main_~id~0#1.offset, 4);havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;call write~int#1(main_#t~nondet5#1, main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);havoc main_#t~nondet5#1;call main_#t~mem6#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short9#1 := 0 <= main_#t~mem6#1;" "assume main_#t~short9#1;call main_#t~mem7#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);call main_#t~mem8#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);main_#t~short9#1 := main_#t~mem7#1 < main_#t~mem8#1;" "assume main_#t~short9#1;havoc main_#t~mem6#1;havoc main_#t~mem7#1;havoc main_#t~mem8#1;havoc main_#t~short9#1;call main_#t~malloc10#1.base, main_#t~malloc10#1.offset := #Ultimate.allocOnStack(4);main_~tmp~0#1.base, main_~tmp~0#1.offset := main_#t~malloc10#1.base, main_#t~malloc10#1.offset;call main_#t~mem11#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);call write~int#2(1 + main_#t~mem11#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem11#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#2(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#2(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);" [2024-11-28 04:42:06,744 INFO L749 eck$LassoCheckResult]: Loop: "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1;" "call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1;" "assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1;" "assume main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;" "call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);" "assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#2(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);" [2024-11-28 04:42:06,744 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 04:42:06,744 INFO L85 PathProgramCache]: Analyzing trace with hash 1573568147, now seen corresponding path program 30 times [2024-11-28 04:42:06,744 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM [2024-11-28 04:42:06,744 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2141178933] [2024-11-28 04:42:06,744 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 04:42:06,744 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 04:42:06,821 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 04:42:10,941 INFO L136 FreeRefinementEngine]: Strategy CAMEL_NO_AM found an infeasible trace [2024-11-28 04:42:10,942 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2141178933] [2024-11-28 04:42:10,942 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2141178933] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-28 04:42:10,942 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [667007265] [2024-11-28 04:42:10,942 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 04:42:10,942 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-28 04:42:10,942 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 04:42:10,945 INFO L229 MonitoredProcess]: Starting monitored process 95 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-28 04:42:10,946 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f5ae6eb6-c2f0-4b94-a6a1-3e558c4dc570/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (95)] Waiting until timeout for monitored process [2024-11-28 04:42:11,581 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 04:42:11,586 INFO L256 TraceCheckSpWp]: Trace formula consists of 1244 conjuncts, 80 conjuncts are in the unsatisfiable core [2024-11-28 04:42:11,593 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-28 04:42:11,611 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 13 [2024-11-28 04:42:11,650 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-28 04:42:11,728 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-28 04:42:11,809 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-28 04:42:11,892 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-28 04:42:11,978 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-28 04:42:12,064 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-28 04:42:12,150 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-28 04:42:12,238 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-28 04:42:12,328 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-28 04:42:12,422 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-28 04:42:12,518 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-28 04:42:12,615 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-28 04:42:12,709 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 13 [2024-11-28 04:42:12,900 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 1 [2024-11-28 04:42:13,138 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 21 [2024-11-28 04:42:13,205 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 72 treesize of output 48 [2024-11-28 04:42:13,411 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 71 treesize of output 47 [2024-11-28 04:42:13,554 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 71 treesize of output 47 [2024-11-28 04:42:13,696 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 71 treesize of output 47 [2024-11-28 04:42:13,844 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 71 treesize of output 47 [2024-11-28 04:42:13,997 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 71 treesize of output 47 [2024-11-28 04:42:14,152 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 71 treesize of output 47 [2024-11-28 04:42:14,307 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 71 treesize of output 47 [2024-11-28 04:42:14,470 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 71 treesize of output 47 [2024-11-28 04:42:14,634 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 71 treesize of output 47 [2024-11-28 04:42:14,796 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 71 treesize of output 47 [2024-11-28 04:42:14,967 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 71 treesize of output 47 [2024-11-28 04:42:15,137 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 71 treesize of output 47 [2024-11-28 04:42:15,309 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 71 treesize of output 47 [2024-11-28 04:42:15,498 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 71 treesize of output 47 [2024-11-28 04:42:15,662 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 41 [2024-11-28 04:42:15,664 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 42 treesize of output 26 [2024-11-28 04:42:15,735 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-28 04:42:17,010 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 53 treesize of output 37 [2024-11-28 04:42:18,743 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [667007265] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-28 04:42:18,743 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-28 04:42:18,743 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [38, 39, 39] total 93 [2024-11-28 04:42:18,744 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [633350226] [2024-11-28 04:42:18,744 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-28 04:42:18,744 INFO L752 eck$LassoCheckResult]: stem already infeasible [2024-11-28 04:42:18,744 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 04:42:18,744 INFO L85 PathProgramCache]: Analyzing trace with hash -194605565, now seen corresponding path program 25 times [2024-11-28 04:42:18,744 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM [2024-11-28 04:42:18,744 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [258119034] [2024-11-28 04:42:18,745 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 04:42:18,745 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 04:42:18,772 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-28 04:42:18,772 INFO L357 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-28 04:42:18,782 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-28 04:42:18,788 INFO L130 FreeRefinementEngine]: Strategy CAMEL_NO_AM found a feasible trace