./Ultimate.py --spec ../../sv-benchmarks/c/properties/termination.prp --file ../../sv-benchmarks/c/loop-acceleration/array_3-2.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version d790fecc Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c7d850c0-8d79-4b06-8e4f-5286d9f9759b/bin/uautomizer-verify-aQ6SnzHsRB/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c7d850c0-8d79-4b06-8e4f-5286d9f9759b/bin/uautomizer-verify-aQ6SnzHsRB/plugins/org.eclipse.equinox.launcher_1.6.800.v20240513-1750.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c7d850c0-8d79-4b06-8e4f-5286d9f9759b/bin/uautomizer-verify-aQ6SnzHsRB/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c7d850c0-8d79-4b06-8e4f-5286d9f9759b/bin/uautomizer-verify-aQ6SnzHsRB/config/AutomizerTermination.xml -i ../../sv-benchmarks/c/loop-acceleration/array_3-2.i -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c7d850c0-8d79-4b06-8e4f-5286d9f9759b/bin/uautomizer-verify-aQ6SnzHsRB/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c7d850c0-8d79-4b06-8e4f-5286d9f9759b/bin/uautomizer-verify-aQ6SnzHsRB --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 42bdab47928922c9249a376933fe7b7a33d855d426cfe04eb271066ef5c44d0a --- Real Ultimate output --- This is Ultimate 0.3.0-dev-d790fec [2024-11-27 20:23:57,373 INFO L188 SettingsManager]: Resetting all preferences to default values... [2024-11-27 20:23:57,492 INFO L114 SettingsManager]: Loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c7d850c0-8d79-4b06-8e4f-5286d9f9759b/bin/uautomizer-verify-aQ6SnzHsRB/config/svcomp-Termination-32bit-Automizer_Default.epf [2024-11-27 20:23:57,499 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2024-11-27 20:23:57,499 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2024-11-27 20:23:57,541 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2024-11-27 20:23:57,542 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2024-11-27 20:23:57,542 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2024-11-27 20:23:57,543 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2024-11-27 20:23:57,543 INFO L153 SettingsManager]: * Use memory slicer=true [2024-11-27 20:23:57,546 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2024-11-27 20:23:57,546 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2024-11-27 20:23:57,546 INFO L153 SettingsManager]: * Use SBE=true [2024-11-27 20:23:57,547 INFO L151 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2024-11-27 20:23:57,547 INFO L153 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2024-11-27 20:23:57,547 INFO L153 SettingsManager]: * Use old map elimination=false [2024-11-27 20:23:57,548 INFO L153 SettingsManager]: * Use external solver (rank synthesis)=false [2024-11-27 20:23:57,548 INFO L153 SettingsManager]: * Use only trivial implications for array writes=true [2024-11-27 20:23:57,548 INFO L153 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2024-11-27 20:23:57,548 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2024-11-27 20:23:57,548 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2024-11-27 20:23:57,548 INFO L153 SettingsManager]: * sizeof long=4 [2024-11-27 20:23:57,549 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2024-11-27 20:23:57,549 INFO L153 SettingsManager]: * sizeof POINTER=4 [2024-11-27 20:23:57,549 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2024-11-27 20:23:57,549 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2024-11-27 20:23:57,549 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2024-11-27 20:23:57,549 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2024-11-27 20:23:57,549 INFO L153 SettingsManager]: * Check unreachability of reach_error function=false [2024-11-27 20:23:57,549 INFO L153 SettingsManager]: * sizeof long double=12 [2024-11-27 20:23:57,549 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2024-11-27 20:23:57,550 INFO L153 SettingsManager]: * Assume nondeterminstic values are in range=false [2024-11-27 20:23:57,550 INFO L153 SettingsManager]: * Behaviour of calls to undefined functions=OVERAPPROXIMATE_BEHAVIOUR [2024-11-27 20:23:57,550 INFO L153 SettingsManager]: * Use constant arrays=true [2024-11-27 20:23:57,550 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2024-11-27 20:23:57,550 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-11-27 20:23:57,550 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2024-11-27 20:23:57,550 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL_NO_AM [2024-11-27 20:23:57,552 INFO L151 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2024-11-27 20:23:57,552 INFO L153 SettingsManager]: * TransformationType=MODULO_NEIGHBOR Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c7d850c0-8d79-4b06-8e4f-5286d9f9759b/bin/uautomizer-verify-aQ6SnzHsRB Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 42bdab47928922c9249a376933fe7b7a33d855d426cfe04eb271066ef5c44d0a [2024-11-27 20:23:57,968 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2024-11-27 20:23:57,987 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2024-11-27 20:23:57,992 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2024-11-27 20:23:57,993 INFO L270 PluginConnector]: Initializing CDTParser... [2024-11-27 20:23:57,994 INFO L274 PluginConnector]: CDTParser initialized [2024-11-27 20:23:57,996 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c7d850c0-8d79-4b06-8e4f-5286d9f9759b/bin/uautomizer-verify-aQ6SnzHsRB/../../sv-benchmarks/c/loop-acceleration/array_3-2.i [2024-11-27 20:24:01,339 INFO L533 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c7d850c0-8d79-4b06-8e4f-5286d9f9759b/bin/uautomizer-verify-aQ6SnzHsRB/data/2a50afb0e/62a096eedff945a3887d53b3936ce717/FLAGbb20b4260 [2024-11-27 20:24:01,649 INFO L384 CDTParser]: Found 1 translation units. [2024-11-27 20:24:01,649 INFO L180 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c7d850c0-8d79-4b06-8e4f-5286d9f9759b/sv-benchmarks/c/loop-acceleration/array_3-2.i [2024-11-27 20:24:01,656 INFO L427 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c7d850c0-8d79-4b06-8e4f-5286d9f9759b/bin/uautomizer-verify-aQ6SnzHsRB/data/2a50afb0e/62a096eedff945a3887d53b3936ce717/FLAGbb20b4260 [2024-11-27 20:24:01,671 INFO L435 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c7d850c0-8d79-4b06-8e4f-5286d9f9759b/bin/uautomizer-verify-aQ6SnzHsRB/data/2a50afb0e/62a096eedff945a3887d53b3936ce717 [2024-11-27 20:24:01,674 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2024-11-27 20:24:01,676 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2024-11-27 20:24:01,677 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2024-11-27 20:24:01,677 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2024-11-27 20:24:01,682 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2024-11-27 20:24:01,683 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 27.11 08:24:01" (1/1) ... [2024-11-27 20:24:01,684 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@66a8f94b and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.11 08:24:01, skipping insertion in model container [2024-11-27 20:24:01,684 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 27.11 08:24:01" (1/1) ... [2024-11-27 20:24:01,703 INFO L175 MainTranslator]: Built tables and reachable declarations [2024-11-27 20:24:01,894 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-11-27 20:24:01,908 INFO L200 MainTranslator]: Completed pre-run [2024-11-27 20:24:01,925 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-11-27 20:24:01,944 INFO L204 MainTranslator]: Completed translation [2024-11-27 20:24:01,945 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.11 08:24:01 WrapperNode [2024-11-27 20:24:01,945 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2024-11-27 20:24:01,946 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2024-11-27 20:24:01,947 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2024-11-27 20:24:01,947 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2024-11-27 20:24:01,955 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.11 08:24:01" (1/1) ... [2024-11-27 20:24:01,963 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.11 08:24:01" (1/1) ... [2024-11-27 20:24:01,981 INFO L138 Inliner]: procedures = 16, calls = 12, calls flagged for inlining = 4, calls inlined = 4, statements flattened = 46 [2024-11-27 20:24:01,981 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2024-11-27 20:24:01,982 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2024-11-27 20:24:01,982 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2024-11-27 20:24:01,982 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2024-11-27 20:24:01,993 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.11 08:24:01" (1/1) ... [2024-11-27 20:24:01,993 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.11 08:24:01" (1/1) ... [2024-11-27 20:24:01,998 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.11 08:24:01" (1/1) ... [2024-11-27 20:24:02,016 INFO L175 MemorySlicer]: Split 4 memory accesses to 2 slices as follows [2, 2]. 50 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2, 0]. The 1 writes are split as follows [0, 1]. [2024-11-27 20:24:02,018 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.11 08:24:01" (1/1) ... [2024-11-27 20:24:02,018 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.11 08:24:01" (1/1) ... [2024-11-27 20:24:02,028 INFO L184 PluginConnector]: Executing the observer ReplaceArrayAssignments from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.11 08:24:01" (1/1) ... [2024-11-27 20:24:02,029 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.11 08:24:01" (1/1) ... [2024-11-27 20:24:02,038 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.11 08:24:01" (1/1) ... [2024-11-27 20:24:02,039 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.11 08:24:01" (1/1) ... [2024-11-27 20:24:02,043 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.11 08:24:01" (1/1) ... [2024-11-27 20:24:02,045 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2024-11-27 20:24:02,046 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2024-11-27 20:24:02,046 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2024-11-27 20:24:02,046 INFO L274 PluginConnector]: RCFGBuilder initialized [2024-11-27 20:24:02,052 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.11 08:24:01" (1/1) ... [2024-11-27 20:24:02,059 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-27 20:24:02,079 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c7d850c0-8d79-4b06-8e4f-5286d9f9759b/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-27 20:24:02,098 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c7d850c0-8d79-4b06-8e4f-5286d9f9759b/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-27 20:24:02,103 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c7d850c0-8d79-4b06-8e4f-5286d9f9759b/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2024-11-27 20:24:02,138 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2024-11-27 20:24:02,138 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#0 [2024-11-27 20:24:02,139 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#1 [2024-11-27 20:24:02,139 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2024-11-27 20:24:02,139 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#0 [2024-11-27 20:24:02,139 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#1 [2024-11-27 20:24:02,140 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2024-11-27 20:24:02,140 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2024-11-27 20:24:02,140 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#0 [2024-11-27 20:24:02,140 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#1 [2024-11-27 20:24:02,140 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2024-11-27 20:24:02,250 INFO L234 CfgBuilder]: Building ICFG [2024-11-27 20:24:02,252 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2024-11-27 20:24:02,460 INFO L? ?]: Removed 8 outVars from TransFormulas that were not future-live. [2024-11-27 20:24:02,460 INFO L283 CfgBuilder]: Performing block encoding [2024-11-27 20:24:02,471 INFO L307 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2024-11-27 20:24:02,471 INFO L312 CfgBuilder]: Removed 2 assume(true) statements. [2024-11-27 20:24:02,471 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 27.11 08:24:02 BoogieIcfgContainer [2024-11-27 20:24:02,472 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2024-11-27 20:24:02,473 INFO L112 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2024-11-27 20:24:02,473 INFO L270 PluginConnector]: Initializing BuchiAutomizer... [2024-11-27 20:24:02,481 INFO L274 PluginConnector]: BuchiAutomizer initialized [2024-11-27 20:24:02,482 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2024-11-27 20:24:02,482 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 27.11 08:24:01" (1/3) ... [2024-11-27 20:24:02,485 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@4f1c6018 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 27.11 08:24:02, skipping insertion in model container [2024-11-27 20:24:02,485 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2024-11-27 20:24:02,485 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.11 08:24:01" (2/3) ... [2024-11-27 20:24:02,486 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@4f1c6018 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 27.11 08:24:02, skipping insertion in model container [2024-11-27 20:24:02,486 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2024-11-27 20:24:02,487 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 27.11 08:24:02" (3/3) ... [2024-11-27 20:24:02,488 INFO L363 chiAutomizerObserver]: Analyzing ICFG array_3-2.i [2024-11-27 20:24:02,568 INFO L300 stractBuchiCegarLoop]: Interprodecural is true [2024-11-27 20:24:02,569 INFO L301 stractBuchiCegarLoop]: Hoare is None [2024-11-27 20:24:02,569 INFO L302 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2024-11-27 20:24:02,570 INFO L303 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2024-11-27 20:24:02,570 INFO L304 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2024-11-27 20:24:02,570 INFO L305 stractBuchiCegarLoop]: Difference is false [2024-11-27 20:24:02,570 INFO L306 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2024-11-27 20:24:02,570 INFO L310 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2024-11-27 20:24:02,577 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 18 states, 17 states have (on average 1.411764705882353) internal successors, (24), 17 states have internal predecessors, (24), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-27 20:24:02,599 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 6 [2024-11-27 20:24:02,600 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-27 20:24:02,600 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-27 20:24:02,605 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2024-11-27 20:24:02,605 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2024-11-27 20:24:02,605 INFO L332 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2024-11-27 20:24:02,606 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 18 states, 17 states have (on average 1.411764705882353) internal successors, (24), 17 states have internal predecessors, (24), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-27 20:24:02,607 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 6 [2024-11-27 20:24:02,607 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-27 20:24:02,607 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-27 20:24:02,608 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2024-11-27 20:24:02,608 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2024-11-27 20:24:02,616 INFO L747 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~post2#1, main_#t~mem3#1, main_#t~short4#1, main_#t~post5#1, main_~#A~0#1.base, main_~#A~0#1.offset, main_~i~0#1;call main_~#A~0#1.base, main_~#A~0#1.offset := #Ultimate.allocOnStack(4096);havoc main_~i~0#1;main_~i~0#1 := 0;" [2024-11-27 20:24:02,616 INFO L749 eck$LassoCheckResult]: Loop: "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" [2024-11-27 20:24:02,622 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-27 20:24:02,623 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 1 times [2024-11-27 20:24:02,632 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM [2024-11-27 20:24:02,633 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1943540825] [2024-11-27 20:24:02,633 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-27 20:24:02,634 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-27 20:24:02,749 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-27 20:24:02,751 INFO L357 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-27 20:24:02,769 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-27 20:24:02,795 INFO L130 FreeRefinementEngine]: Strategy CAMEL_NO_AM found a feasible trace [2024-11-27 20:24:02,799 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-27 20:24:02,799 INFO L85 PathProgramCache]: Analyzing trace with hash 1221, now seen corresponding path program 1 times [2024-11-27 20:24:02,799 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM [2024-11-27 20:24:02,800 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1843657912] [2024-11-27 20:24:02,802 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-27 20:24:02,802 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-27 20:24:02,820 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-27 20:24:02,821 INFO L357 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-27 20:24:02,832 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-27 20:24:02,837 INFO L130 FreeRefinementEngine]: Strategy CAMEL_NO_AM found a feasible trace [2024-11-27 20:24:02,839 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-27 20:24:02,839 INFO L85 PathProgramCache]: Analyzing trace with hash 925703, now seen corresponding path program 1 times [2024-11-27 20:24:02,839 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM [2024-11-27 20:24:02,840 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [12771208] [2024-11-27 20:24:02,840 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-27 20:24:02,840 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-27 20:24:02,882 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-27 20:24:02,882 INFO L357 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-27 20:24:02,895 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-27 20:24:02,898 INFO L130 FreeRefinementEngine]: Strategy CAMEL_NO_AM found a feasible trace [2024-11-27 20:24:03,360 INFO L204 LassoAnalysis]: Preferences: [2024-11-27 20:24:03,361 INFO L125 ssoRankerPreferences]: Compute integeral hull: false [2024-11-27 20:24:03,361 INFO L126 ssoRankerPreferences]: Enable LassoPartitioneer: true [2024-11-27 20:24:03,361 INFO L127 ssoRankerPreferences]: Term annotations enabled: false [2024-11-27 20:24:03,361 INFO L128 ssoRankerPreferences]: Use exernal solver: false [2024-11-27 20:24:03,361 INFO L129 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-27 20:24:03,362 INFO L130 ssoRankerPreferences]: Dump SMT script to file: false [2024-11-27 20:24:03,362 INFO L131 ssoRankerPreferences]: Path of dumped script: [2024-11-27 20:24:03,362 INFO L132 ssoRankerPreferences]: Filename of dumped script: array_3-2.i_Iteration1_Lasso [2024-11-27 20:24:03,362 INFO L133 ssoRankerPreferences]: MapElimAlgo: Frank [2024-11-27 20:24:03,362 INFO L241 LassoAnalysis]: Starting lasso preprocessing... [2024-11-27 20:24:03,380 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-27 20:24:03,390 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-27 20:24:03,395 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-27 20:24:03,424 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-27 20:24:03,629 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-27 20:24:03,632 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-27 20:24:03,636 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-27 20:24:03,639 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-27 20:24:03,943 INFO L259 LassoAnalysis]: Preprocessing complete. [2024-11-27 20:24:03,947 INFO L451 LassoAnalysis]: Using template 'affine'. [2024-11-27 20:24:03,950 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-27 20:24:03,950 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c7d850c0-8d79-4b06-8e4f-5286d9f9759b/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-27 20:24:03,955 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c7d850c0-8d79-4b06-8e4f-5286d9f9759b/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-27 20:24:03,958 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c7d850c0-8d79-4b06-8e4f-5286d9f9759b/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Waiting until timeout for monitored process [2024-11-27 20:24:03,959 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-27 20:24:03,978 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-27 20:24:03,978 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-27 20:24:03,979 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-27 20:24:03,979 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-27 20:24:03,980 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-27 20:24:03,986 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-27 20:24:03,986 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-27 20:24:03,992 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-27 20:24:04,003 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c7d850c0-8d79-4b06-8e4f-5286d9f9759b/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Ended with exit code 0 [2024-11-27 20:24:04,004 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-27 20:24:04,004 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c7d850c0-8d79-4b06-8e4f-5286d9f9759b/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-27 20:24:04,006 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c7d850c0-8d79-4b06-8e4f-5286d9f9759b/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-27 20:24:04,009 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c7d850c0-8d79-4b06-8e4f-5286d9f9759b/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Waiting until timeout for monitored process [2024-11-27 20:24:04,012 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-27 20:24:04,029 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-27 20:24:04,030 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-27 20:24:04,030 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-27 20:24:04,030 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-27 20:24:04,030 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-27 20:24:04,031 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-27 20:24:04,031 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-27 20:24:04,033 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-27 20:24:04,043 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c7d850c0-8d79-4b06-8e4f-5286d9f9759b/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Forceful destruction successful, exit code 0 [2024-11-27 20:24:04,044 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-27 20:24:04,044 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c7d850c0-8d79-4b06-8e4f-5286d9f9759b/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-27 20:24:04,047 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c7d850c0-8d79-4b06-8e4f-5286d9f9759b/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-27 20:24:04,050 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c7d850c0-8d79-4b06-8e4f-5286d9f9759b/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Waiting until timeout for monitored process [2024-11-27 20:24:04,052 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-27 20:24:04,069 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-27 20:24:04,069 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-27 20:24:04,069 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-27 20:24:04,069 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-27 20:24:04,075 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-27 20:24:04,076 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-27 20:24:04,082 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-27 20:24:04,092 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c7d850c0-8d79-4b06-8e4f-5286d9f9759b/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Forceful destruction successful, exit code 0 [2024-11-27 20:24:04,093 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-27 20:24:04,093 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c7d850c0-8d79-4b06-8e4f-5286d9f9759b/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-27 20:24:04,095 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c7d850c0-8d79-4b06-8e4f-5286d9f9759b/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-27 20:24:04,098 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c7d850c0-8d79-4b06-8e4f-5286d9f9759b/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Waiting until timeout for monitored process [2024-11-27 20:24:04,100 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-27 20:24:04,117 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-27 20:24:04,117 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-27 20:24:04,117 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-27 20:24:04,117 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-27 20:24:04,123 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-27 20:24:04,124 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-27 20:24:04,132 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-27 20:24:04,142 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c7d850c0-8d79-4b06-8e4f-5286d9f9759b/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Forceful destruction successful, exit code 0 [2024-11-27 20:24:04,142 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-27 20:24:04,142 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c7d850c0-8d79-4b06-8e4f-5286d9f9759b/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-27 20:24:04,146 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c7d850c0-8d79-4b06-8e4f-5286d9f9759b/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-27 20:24:04,150 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c7d850c0-8d79-4b06-8e4f-5286d9f9759b/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (6)] Waiting until timeout for monitored process [2024-11-27 20:24:04,151 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-27 20:24:04,167 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-27 20:24:04,167 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-27 20:24:04,167 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-27 20:24:04,167 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-27 20:24:04,171 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-27 20:24:04,171 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-27 20:24:04,177 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-27 20:24:04,187 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c7d850c0-8d79-4b06-8e4f-5286d9f9759b/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (6)] Forceful destruction successful, exit code 0 [2024-11-27 20:24:04,187 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-27 20:24:04,188 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c7d850c0-8d79-4b06-8e4f-5286d9f9759b/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-27 20:24:04,190 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c7d850c0-8d79-4b06-8e4f-5286d9f9759b/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-27 20:24:04,194 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-27 20:24:04,196 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c7d850c0-8d79-4b06-8e4f-5286d9f9759b/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (7)] Waiting until timeout for monitored process [2024-11-27 20:24:04,211 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-27 20:24:04,211 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-27 20:24:04,211 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-27 20:24:04,212 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-27 20:24:04,217 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-27 20:24:04,217 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-27 20:24:04,225 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-27 20:24:04,236 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c7d850c0-8d79-4b06-8e4f-5286d9f9759b/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (7)] Forceful destruction successful, exit code 0 [2024-11-27 20:24:04,236 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-27 20:24:04,237 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c7d850c0-8d79-4b06-8e4f-5286d9f9759b/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-27 20:24:04,239 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c7d850c0-8d79-4b06-8e4f-5286d9f9759b/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-27 20:24:04,244 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c7d850c0-8d79-4b06-8e4f-5286d9f9759b/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (8)] Waiting until timeout for monitored process [2024-11-27 20:24:04,244 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-27 20:24:04,263 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-27 20:24:04,263 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-27 20:24:04,263 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-27 20:24:04,263 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-27 20:24:04,270 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-27 20:24:04,270 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-27 20:24:04,284 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-27 20:24:04,295 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c7d850c0-8d79-4b06-8e4f-5286d9f9759b/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (8)] Forceful destruction successful, exit code 0 [2024-11-27 20:24:04,296 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-27 20:24:04,296 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c7d850c0-8d79-4b06-8e4f-5286d9f9759b/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-27 20:24:04,298 INFO L229 MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c7d850c0-8d79-4b06-8e4f-5286d9f9759b/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-27 20:24:04,302 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c7d850c0-8d79-4b06-8e4f-5286d9f9759b/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (9)] Waiting until timeout for monitored process [2024-11-27 20:24:04,304 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-27 20:24:04,322 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-27 20:24:04,322 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-27 20:24:04,323 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-27 20:24:04,324 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-27 20:24:04,328 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-27 20:24:04,329 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-27 20:24:04,338 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-27 20:24:04,349 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c7d850c0-8d79-4b06-8e4f-5286d9f9759b/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (9)] Forceful destruction successful, exit code 0 [2024-11-27 20:24:04,350 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-27 20:24:04,350 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c7d850c0-8d79-4b06-8e4f-5286d9f9759b/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-27 20:24:04,352 INFO L229 MonitoredProcess]: Starting monitored process 10 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c7d850c0-8d79-4b06-8e4f-5286d9f9759b/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-27 20:24:04,356 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c7d850c0-8d79-4b06-8e4f-5286d9f9759b/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (10)] Waiting until timeout for monitored process [2024-11-27 20:24:04,357 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-27 20:24:04,375 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-27 20:24:04,375 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-27 20:24:04,375 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-27 20:24:04,375 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-27 20:24:04,380 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-27 20:24:04,381 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-27 20:24:04,388 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-27 20:24:04,399 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c7d850c0-8d79-4b06-8e4f-5286d9f9759b/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (10)] Forceful destruction successful, exit code 0 [2024-11-27 20:24:04,399 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-27 20:24:04,400 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c7d850c0-8d79-4b06-8e4f-5286d9f9759b/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-27 20:24:04,402 INFO L229 MonitoredProcess]: Starting monitored process 11 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c7d850c0-8d79-4b06-8e4f-5286d9f9759b/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-27 20:24:04,406 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c7d850c0-8d79-4b06-8e4f-5286d9f9759b/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (11)] Waiting until timeout for monitored process [2024-11-27 20:24:04,407 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-27 20:24:04,421 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-27 20:24:04,421 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-27 20:24:04,421 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-27 20:24:04,421 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-27 20:24:04,427 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-27 20:24:04,427 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-27 20:24:04,436 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-27 20:24:04,447 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c7d850c0-8d79-4b06-8e4f-5286d9f9759b/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (11)] Ended with exit code 0 [2024-11-27 20:24:04,447 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-27 20:24:04,448 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c7d850c0-8d79-4b06-8e4f-5286d9f9759b/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-27 20:24:04,450 INFO L229 MonitoredProcess]: Starting monitored process 12 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c7d850c0-8d79-4b06-8e4f-5286d9f9759b/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-27 20:24:04,455 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c7d850c0-8d79-4b06-8e4f-5286d9f9759b/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (12)] Waiting until timeout for monitored process [2024-11-27 20:24:04,456 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-27 20:24:04,474 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-27 20:24:04,474 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-27 20:24:04,474 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-27 20:24:04,474 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-27 20:24:04,481 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-27 20:24:04,481 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-27 20:24:04,494 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2024-11-27 20:24:04,554 INFO L443 ModelExtractionUtils]: Simplification made 18 calls to the SMT solver. [2024-11-27 20:24:04,557 INFO L444 ModelExtractionUtils]: 1 out of 13 variables were initially zero. Simplification set additionally 9 variables to zero. [2024-11-27 20:24:04,560 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-27 20:24:04,561 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c7d850c0-8d79-4b06-8e4f-5286d9f9759b/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-27 20:24:04,564 INFO L229 MonitoredProcess]: Starting monitored process 13 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c7d850c0-8d79-4b06-8e4f-5286d9f9759b/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-27 20:24:04,568 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c7d850c0-8d79-4b06-8e4f-5286d9f9759b/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (13)] Waiting until timeout for monitored process [2024-11-27 20:24:04,569 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2024-11-27 20:24:04,589 INFO L438 nArgumentSynthesizer]: Removed 2 redundant supporting invariants from a total of 2. [2024-11-27 20:24:04,589 INFO L474 LassoAnalysis]: Proved termination. [2024-11-27 20:24:04,589 INFO L476 LassoAnalysis]: Termination argument consisting of: Ranking function f(ULTIMATE.start_main_~i~0#1, v_rep(select #length ULTIMATE.start_main_~#A~0#1.base)_1) = -8*ULTIMATE.start_main_~i~0#1 + 2047*v_rep(select #length ULTIMATE.start_main_~#A~0#1.base)_1 Supporting invariants [] [2024-11-27 20:24:04,600 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c7d850c0-8d79-4b06-8e4f-5286d9f9759b/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (12)] Forceful destruction successful, exit code 0 [2024-11-27 20:24:04,635 INFO L156 tatePredicateManager]: 4 out of 4 supporting invariants were superfluous and have been removed [2024-11-27 20:24:04,652 WARN L970 BoogieBacktranslator]: Unfinished Backtranslation: Unknown variable: #length [2024-11-27 20:24:04,653 WARN L970 BoogieBacktranslator]: Unfinished Backtranslation: Cannot backtranslate array access to array IdentifierExpression[#length,GLOBAL] [2024-11-27 20:24:04,678 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-27 20:24:04,695 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-27 20:24:04,697 INFO L256 TraceCheckSpWp]: Trace formula consists of 31 conjuncts, 2 conjuncts are in the unsatisfiable core [2024-11-27 20:24:04,698 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-27 20:24:04,720 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-27 20:24:04,721 INFO L256 TraceCheckSpWp]: Trace formula consists of 13 conjuncts, 6 conjuncts are in the unsatisfiable core [2024-11-27 20:24:04,722 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-27 20:24:04,752 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-27 20:24:04,788 INFO L141 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.1 stem predicates 2 loop predicates [2024-11-27 20:24:04,790 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand has 18 states, 17 states have (on average 1.411764705882353) internal successors, (24), 17 states have internal predecessors, (24), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-27 20:24:04,845 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand has 18 states, 17 states have (on average 1.411764705882353) internal successors, (24), 17 states have internal predecessors, (24), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0). Second operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 34 states and 47 transitions. Complement of second has 6 states. [2024-11-27 20:24:04,847 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 4 states 1 stem states 1 non-accepting loop states 1 accepting loop states [2024-11-27 20:24:04,852 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-27 20:24:04,855 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 23 transitions. [2024-11-27 20:24:04,860 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 4 states and 23 transitions. Stem has 2 letters. Loop has 2 letters. [2024-11-27 20:24:04,860 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2024-11-27 20:24:04,861 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 4 states and 23 transitions. Stem has 4 letters. Loop has 2 letters. [2024-11-27 20:24:04,861 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2024-11-27 20:24:04,861 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 4 states and 23 transitions. Stem has 2 letters. Loop has 4 letters. [2024-11-27 20:24:04,861 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2024-11-27 20:24:04,866 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 34 states and 47 transitions. [2024-11-27 20:24:04,871 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2024-11-27 20:24:04,875 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 34 states to 10 states and 13 transitions. [2024-11-27 20:24:04,876 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 7 [2024-11-27 20:24:04,876 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 8 [2024-11-27 20:24:04,877 INFO L73 IsDeterministic]: Start isDeterministic. Operand 10 states and 13 transitions. [2024-11-27 20:24:04,877 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-27 20:24:04,877 INFO L218 hiAutomatonCegarLoop]: Abstraction has 10 states and 13 transitions. [2024-11-27 20:24:04,895 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10 states and 13 transitions. [2024-11-27 20:24:04,911 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10 to 10. [2024-11-27 20:24:04,911 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 10 states, 10 states have (on average 1.3) internal successors, (13), 9 states have internal predecessors, (13), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-27 20:24:04,912 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10 states to 10 states and 13 transitions. [2024-11-27 20:24:04,914 INFO L240 hiAutomatonCegarLoop]: Abstraction has 10 states and 13 transitions. [2024-11-27 20:24:04,914 INFO L425 stractBuchiCegarLoop]: Abstraction has 10 states and 13 transitions. [2024-11-27 20:24:04,914 INFO L332 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2024-11-27 20:24:04,914 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 10 states and 13 transitions. [2024-11-27 20:24:04,915 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2024-11-27 20:24:04,915 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-27 20:24:04,915 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-27 20:24:04,915 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1] [2024-11-27 20:24:04,915 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2024-11-27 20:24:04,915 INFO L747 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~post2#1, main_#t~mem3#1, main_#t~short4#1, main_#t~post5#1, main_~#A~0#1.base, main_~#A~0#1.offset, main_~i~0#1;call main_~#A~0#1.base, main_~#A~0#1.offset := #Ultimate.allocOnStack(4096);havoc main_~i~0#1;main_~i~0#1 := 0;" "assume !(main_~i~0#1 < 1024);" "main_~i~0#1 := 0;" [2024-11-27 20:24:04,915 INFO L749 eck$LassoCheckResult]: Loop: "main_#t~short4#1 := main_~i~0#1 < 1024;" "assume main_#t~short4#1;call main_#t~mem3#1 := read~int#1(main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);main_#t~short4#1 := 0 != main_#t~mem3#1;" "assume main_#t~short4#1;havoc main_#t~mem3#1;havoc main_#t~short4#1;" "main_#t~post5#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" [2024-11-27 20:24:04,916 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-27 20:24:04,916 INFO L85 PathProgramCache]: Analyzing trace with hash 925769, now seen corresponding path program 1 times [2024-11-27 20:24:04,916 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM [2024-11-27 20:24:04,916 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1980048148] [2024-11-27 20:24:04,916 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-27 20:24:04,917 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-27 20:24:04,925 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-27 20:24:05,023 INFO L136 FreeRefinementEngine]: Strategy CAMEL_NO_AM found an infeasible trace [2024-11-27 20:24:05,027 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1980048148] [2024-11-27 20:24:05,027 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1980048148] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-27 20:24:05,027 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1879310546] [2024-11-27 20:24:05,027 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-27 20:24:05,028 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-27 20:24:05,028 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c7d850c0-8d79-4b06-8e4f-5286d9f9759b/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-27 20:24:05,033 INFO L229 MonitoredProcess]: Starting monitored process 14 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c7d850c0-8d79-4b06-8e4f-5286d9f9759b/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-27 20:24:05,044 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c7d850c0-8d79-4b06-8e4f-5286d9f9759b/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Waiting until timeout for monitored process [2024-11-27 20:24:05,077 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-27 20:24:05,078 INFO L256 TraceCheckSpWp]: Trace formula consists of 34 conjuncts, 2 conjuncts are in the unsatisfiable core [2024-11-27 20:24:05,079 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-27 20:24:05,087 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-27 20:24:05,099 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1879310546] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-27 20:24:05,099 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-27 20:24:05,100 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [3, 3, 3] total 5 [2024-11-27 20:24:05,100 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1146850158] [2024-11-27 20:24:05,101 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-27 20:24:05,103 INFO L752 eck$LassoCheckResult]: stem already infeasible [2024-11-27 20:24:05,103 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-27 20:24:05,103 INFO L85 PathProgramCache]: Analyzing trace with hash 1542376, now seen corresponding path program 1 times [2024-11-27 20:24:05,103 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM [2024-11-27 20:24:05,103 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1462377973] [2024-11-27 20:24:05,104 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-27 20:24:05,104 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-27 20:24:05,112 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-27 20:24:05,112 INFO L357 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-27 20:24:05,117 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-27 20:24:05,119 INFO L130 FreeRefinementEngine]: Strategy CAMEL_NO_AM found a feasible trace [2024-11-27 20:24:05,228 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL_NO_AM [2024-11-27 20:24:05,230 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-27 20:24:05,230 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2024-11-27 20:24:05,232 INFO L87 Difference]: Start difference. First operand 10 states and 13 transitions. cyclomatic complexity: 5 Second operand has 5 states, 5 states have (on average 1.6) internal successors, (8), 5 states have internal predecessors, (8), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-27 20:24:05,277 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-27 20:24:05,278 INFO L93 Difference]: Finished difference Result 20 states and 24 transitions. [2024-11-27 20:24:05,278 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 20 states and 24 transitions. [2024-11-27 20:24:05,279 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2024-11-27 20:24:05,280 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 20 states to 20 states and 24 transitions. [2024-11-27 20:24:05,280 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 16 [2024-11-27 20:24:05,280 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 16 [2024-11-27 20:24:05,280 INFO L73 IsDeterministic]: Start isDeterministic. Operand 20 states and 24 transitions. [2024-11-27 20:24:05,281 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-27 20:24:05,281 INFO L218 hiAutomatonCegarLoop]: Abstraction has 20 states and 24 transitions. [2024-11-27 20:24:05,281 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20 states and 24 transitions. [2024-11-27 20:24:05,282 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20 to 12. [2024-11-27 20:24:05,282 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 12 states, 12 states have (on average 1.1666666666666667) internal successors, (14), 11 states have internal predecessors, (14), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-27 20:24:05,283 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12 states to 12 states and 14 transitions. [2024-11-27 20:24:05,283 INFO L240 hiAutomatonCegarLoop]: Abstraction has 12 states and 14 transitions. [2024-11-27 20:24:05,284 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-27 20:24:05,284 INFO L425 stractBuchiCegarLoop]: Abstraction has 12 states and 14 transitions. [2024-11-27 20:24:05,285 INFO L332 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2024-11-27 20:24:05,285 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 12 states and 14 transitions. [2024-11-27 20:24:05,285 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2024-11-27 20:24:05,285 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-27 20:24:05,285 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-27 20:24:05,286 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [2, 2, 1, 1, 1, 1] [2024-11-27 20:24:05,286 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2024-11-27 20:24:05,286 INFO L747 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~post2#1, main_#t~mem3#1, main_#t~short4#1, main_#t~post5#1, main_~#A~0#1.base, main_~#A~0#1.offset, main_~i~0#1;call main_~#A~0#1.base, main_~#A~0#1.offset := #Ultimate.allocOnStack(4096);havoc main_~i~0#1;main_~i~0#1 := 0;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume !(main_~i~0#1 < 1024);" "main_~i~0#1 := 0;" [2024-11-27 20:24:05,287 INFO L749 eck$LassoCheckResult]: Loop: "main_#t~short4#1 := main_~i~0#1 < 1024;" "assume main_#t~short4#1;call main_#t~mem3#1 := read~int#1(main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);main_#t~short4#1 := 0 != main_#t~mem3#1;" "assume main_#t~short4#1;havoc main_#t~mem3#1;havoc main_#t~short4#1;" "main_#t~post5#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" [2024-11-27 20:24:05,287 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-27 20:24:05,287 INFO L85 PathProgramCache]: Analyzing trace with hash 207918545, now seen corresponding path program 1 times [2024-11-27 20:24:05,288 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM [2024-11-27 20:24:05,288 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1652829862] [2024-11-27 20:24:05,288 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-27 20:24:05,288 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-27 20:24:05,306 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-27 20:24:05,461 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c7d850c0-8d79-4b06-8e4f-5286d9f9759b/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (13)] Ended with exit code 0 [2024-11-27 20:24:05,507 INFO L136 FreeRefinementEngine]: Strategy CAMEL_NO_AM found an infeasible trace [2024-11-27 20:24:05,507 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1652829862] [2024-11-27 20:24:05,507 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1652829862] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-27 20:24:05,507 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [604138059] [2024-11-27 20:24:05,507 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-27 20:24:05,508 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-27 20:24:05,508 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c7d850c0-8d79-4b06-8e4f-5286d9f9759b/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-27 20:24:05,512 INFO L229 MonitoredProcess]: Starting monitored process 15 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c7d850c0-8d79-4b06-8e4f-5286d9f9759b/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-27 20:24:05,513 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c7d850c0-8d79-4b06-8e4f-5286d9f9759b/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Waiting until timeout for monitored process [2024-11-27 20:24:05,570 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-27 20:24:05,571 INFO L256 TraceCheckSpWp]: Trace formula consists of 56 conjuncts, 4 conjuncts are in the unsatisfiable core [2024-11-27 20:24:05,572 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-27 20:24:05,609 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-27 20:24:05,662 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [604138059] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-27 20:24:05,662 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-27 20:24:05,663 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5, 5] total 9 [2024-11-27 20:24:05,663 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [95345471] [2024-11-27 20:24:05,663 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-27 20:24:05,663 INFO L752 eck$LassoCheckResult]: stem already infeasible [2024-11-27 20:24:05,663 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-27 20:24:05,664 INFO L85 PathProgramCache]: Analyzing trace with hash 1542376, now seen corresponding path program 2 times [2024-11-27 20:24:05,664 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM [2024-11-27 20:24:05,664 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1484292641] [2024-11-27 20:24:05,664 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-27 20:24:05,664 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-27 20:24:05,678 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-27 20:24:05,678 INFO L357 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-27 20:24:05,686 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-27 20:24:05,692 INFO L130 FreeRefinementEngine]: Strategy CAMEL_NO_AM found a feasible trace [2024-11-27 20:24:05,801 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL_NO_AM [2024-11-27 20:24:05,802 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2024-11-27 20:24:05,804 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=36, Invalid=36, Unknown=0, NotChecked=0, Total=72 [2024-11-27 20:24:05,804 INFO L87 Difference]: Start difference. First operand 12 states and 14 transitions. cyclomatic complexity: 4 Second operand has 9 states, 9 states have (on average 1.8888888888888888) internal successors, (17), 9 states have internal predecessors, (17), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-27 20:24:05,921 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-27 20:24:05,921 INFO L93 Difference]: Finished difference Result 44 states and 52 transitions. [2024-11-27 20:24:05,921 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 44 states and 52 transitions. [2024-11-27 20:24:05,923 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2024-11-27 20:24:05,924 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 44 states to 44 states and 52 transitions. [2024-11-27 20:24:05,924 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 32 [2024-11-27 20:24:05,924 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 32 [2024-11-27 20:24:05,924 INFO L73 IsDeterministic]: Start isDeterministic. Operand 44 states and 52 transitions. [2024-11-27 20:24:05,925 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-27 20:24:05,925 INFO L218 hiAutomatonCegarLoop]: Abstraction has 44 states and 52 transitions. [2024-11-27 20:24:05,925 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 44 states and 52 transitions. [2024-11-27 20:24:05,926 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 44 to 20. [2024-11-27 20:24:05,927 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 20 states, 20 states have (on average 1.1) internal successors, (22), 19 states have internal predecessors, (22), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-27 20:24:05,927 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20 states to 20 states and 22 transitions. [2024-11-27 20:24:05,927 INFO L240 hiAutomatonCegarLoop]: Abstraction has 20 states and 22 transitions. [2024-11-27 20:24:05,928 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2024-11-27 20:24:05,929 INFO L425 stractBuchiCegarLoop]: Abstraction has 20 states and 22 transitions. [2024-11-27 20:24:05,929 INFO L332 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2024-11-27 20:24:05,929 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 20 states and 22 transitions. [2024-11-27 20:24:05,930 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2024-11-27 20:24:05,930 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-27 20:24:05,930 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-27 20:24:05,931 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [6, 6, 1, 1, 1, 1] [2024-11-27 20:24:05,931 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2024-11-27 20:24:05,931 INFO L747 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~post2#1, main_#t~mem3#1, main_#t~short4#1, main_#t~post5#1, main_~#A~0#1.base, main_~#A~0#1.offset, main_~i~0#1;call main_~#A~0#1.base, main_~#A~0#1.offset := #Ultimate.allocOnStack(4096);havoc main_~i~0#1;main_~i~0#1 := 0;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume !(main_~i~0#1 < 1024);" "main_~i~0#1 := 0;" [2024-11-27 20:24:05,931 INFO L749 eck$LassoCheckResult]: Loop: "main_#t~short4#1 := main_~i~0#1 < 1024;" "assume main_#t~short4#1;call main_#t~mem3#1 := read~int#1(main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);main_#t~short4#1 := 0 != main_#t~mem3#1;" "assume main_#t~short4#1;havoc main_#t~mem3#1;havoc main_#t~short4#1;" "main_#t~post5#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" [2024-11-27 20:24:05,932 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-27 20:24:05,932 INFO L85 PathProgramCache]: Analyzing trace with hash -681478943, now seen corresponding path program 2 times [2024-11-27 20:24:05,932 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM [2024-11-27 20:24:05,932 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [874165762] [2024-11-27 20:24:05,932 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-27 20:24:05,932 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-27 20:24:05,955 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-27 20:24:06,184 INFO L136 FreeRefinementEngine]: Strategy CAMEL_NO_AM found an infeasible trace [2024-11-27 20:24:06,185 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [874165762] [2024-11-27 20:24:06,185 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [874165762] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-27 20:24:06,185 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [735929987] [2024-11-27 20:24:06,185 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-27 20:24:06,185 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-27 20:24:06,185 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c7d850c0-8d79-4b06-8e4f-5286d9f9759b/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-27 20:24:06,189 INFO L229 MonitoredProcess]: Starting monitored process 16 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c7d850c0-8d79-4b06-8e4f-5286d9f9759b/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-27 20:24:06,191 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c7d850c0-8d79-4b06-8e4f-5286d9f9759b/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (16)] Waiting until timeout for monitored process [2024-11-27 20:24:06,258 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-27 20:24:06,259 INFO L256 TraceCheckSpWp]: Trace formula consists of 100 conjuncts, 8 conjuncts are in the unsatisfiable core [2024-11-27 20:24:06,261 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-27 20:24:06,304 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-27 20:24:06,469 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [735929987] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-27 20:24:06,469 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-27 20:24:06,470 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 9] total 17 [2024-11-27 20:24:06,470 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [590712096] [2024-11-27 20:24:06,470 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-27 20:24:06,470 INFO L752 eck$LassoCheckResult]: stem already infeasible [2024-11-27 20:24:06,471 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-27 20:24:06,471 INFO L85 PathProgramCache]: Analyzing trace with hash 1542376, now seen corresponding path program 3 times [2024-11-27 20:24:06,471 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM [2024-11-27 20:24:06,471 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1671171771] [2024-11-27 20:24:06,471 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-27 20:24:06,471 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-27 20:24:06,477 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-27 20:24:06,477 INFO L357 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-27 20:24:06,480 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-27 20:24:06,482 INFO L130 FreeRefinementEngine]: Strategy CAMEL_NO_AM found a feasible trace [2024-11-27 20:24:06,583 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL_NO_AM [2024-11-27 20:24:06,584 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2024-11-27 20:24:06,587 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=136, Invalid=136, Unknown=0, NotChecked=0, Total=272 [2024-11-27 20:24:06,587 INFO L87 Difference]: Start difference. First operand 20 states and 22 transitions. cyclomatic complexity: 4 Second operand has 17 states, 17 states have (on average 1.9411764705882353) internal successors, (33), 17 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-27 20:24:06,822 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-27 20:24:06,822 INFO L93 Difference]: Finished difference Result 92 states and 108 transitions. [2024-11-27 20:24:06,822 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 92 states and 108 transitions. [2024-11-27 20:24:06,824 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2024-11-27 20:24:06,826 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 92 states to 92 states and 108 transitions. [2024-11-27 20:24:06,826 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 64 [2024-11-27 20:24:06,826 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 64 [2024-11-27 20:24:06,826 INFO L73 IsDeterministic]: Start isDeterministic. Operand 92 states and 108 transitions. [2024-11-27 20:24:06,826 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-27 20:24:06,827 INFO L218 hiAutomatonCegarLoop]: Abstraction has 92 states and 108 transitions. [2024-11-27 20:24:06,827 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 92 states and 108 transitions. [2024-11-27 20:24:06,829 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 92 to 36. [2024-11-27 20:24:06,829 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 36 states, 36 states have (on average 1.0555555555555556) internal successors, (38), 35 states have internal predecessors, (38), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-27 20:24:06,830 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 36 states to 36 states and 38 transitions. [2024-11-27 20:24:06,830 INFO L240 hiAutomatonCegarLoop]: Abstraction has 36 states and 38 transitions. [2024-11-27 20:24:06,830 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2024-11-27 20:24:06,831 INFO L425 stractBuchiCegarLoop]: Abstraction has 36 states and 38 transitions. [2024-11-27 20:24:06,831 INFO L332 stractBuchiCegarLoop]: ======== Iteration 5 ============ [2024-11-27 20:24:06,831 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 36 states and 38 transitions. [2024-11-27 20:24:06,832 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2024-11-27 20:24:06,832 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-27 20:24:06,832 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-27 20:24:06,833 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [14, 14, 1, 1, 1, 1] [2024-11-27 20:24:06,833 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2024-11-27 20:24:06,834 INFO L747 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~post2#1, main_#t~mem3#1, main_#t~short4#1, main_#t~post5#1, main_~#A~0#1.base, main_~#A~0#1.offset, main_~i~0#1;call main_~#A~0#1.base, main_~#A~0#1.offset := #Ultimate.allocOnStack(4096);havoc main_~i~0#1;main_~i~0#1 := 0;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume !(main_~i~0#1 < 1024);" "main_~i~0#1 := 0;" [2024-11-27 20:24:06,834 INFO L749 eck$LassoCheckResult]: Loop: "main_#t~short4#1 := main_~i~0#1 < 1024;" "assume main_#t~short4#1;call main_#t~mem3#1 := read~int#1(main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);main_#t~short4#1 := 0 != main_#t~mem3#1;" "assume main_#t~short4#1;havoc main_#t~mem3#1;havoc main_#t~short4#1;" "main_#t~post5#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" [2024-11-27 20:24:06,834 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-27 20:24:06,834 INFO L85 PathProgramCache]: Analyzing trace with hash 491979521, now seen corresponding path program 3 times [2024-11-27 20:24:06,834 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM [2024-11-27 20:24:06,834 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [898835087] [2024-11-27 20:24:06,834 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-27 20:24:06,834 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-27 20:24:06,901 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-27 20:24:07,449 INFO L136 FreeRefinementEngine]: Strategy CAMEL_NO_AM found an infeasible trace [2024-11-27 20:24:07,449 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [898835087] [2024-11-27 20:24:07,450 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [898835087] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-27 20:24:07,450 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1523194250] [2024-11-27 20:24:07,450 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-27 20:24:07,450 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-27 20:24:07,450 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c7d850c0-8d79-4b06-8e4f-5286d9f9759b/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-27 20:24:07,454 INFO L229 MonitoredProcess]: Starting monitored process 17 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c7d850c0-8d79-4b06-8e4f-5286d9f9759b/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-27 20:24:07,456 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c7d850c0-8d79-4b06-8e4f-5286d9f9759b/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (17)] Waiting until timeout for monitored process [2024-11-27 20:24:07,544 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-27 20:24:07,545 INFO L256 TraceCheckSpWp]: Trace formula consists of 188 conjuncts, 16 conjuncts are in the unsatisfiable core [2024-11-27 20:24:07,548 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-27 20:24:07,653 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-27 20:24:08,326 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1523194250] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-27 20:24:08,327 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-27 20:24:08,327 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 17, 17] total 33 [2024-11-27 20:24:08,327 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1803893747] [2024-11-27 20:24:08,327 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-27 20:24:08,327 INFO L752 eck$LassoCheckResult]: stem already infeasible [2024-11-27 20:24:08,328 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-27 20:24:08,328 INFO L85 PathProgramCache]: Analyzing trace with hash 1542376, now seen corresponding path program 4 times [2024-11-27 20:24:08,328 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM [2024-11-27 20:24:08,328 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1628006720] [2024-11-27 20:24:08,328 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-27 20:24:08,330 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-27 20:24:08,340 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-27 20:24:08,341 INFO L357 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-27 20:24:08,344 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-27 20:24:08,346 INFO L130 FreeRefinementEngine]: Strategy CAMEL_NO_AM found a feasible trace [2024-11-27 20:24:08,460 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL_NO_AM [2024-11-27 20:24:08,461 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 33 interpolants. [2024-11-27 20:24:08,462 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=528, Invalid=528, Unknown=0, NotChecked=0, Total=1056 [2024-11-27 20:24:08,462 INFO L87 Difference]: Start difference. First operand 36 states and 38 transitions. cyclomatic complexity: 4 Second operand has 33 states, 33 states have (on average 1.9696969696969697) internal successors, (65), 33 states have internal predecessors, (65), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-27 20:24:08,983 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-27 20:24:08,983 INFO L93 Difference]: Finished difference Result 188 states and 220 transitions. [2024-11-27 20:24:08,983 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 188 states and 220 transitions. [2024-11-27 20:24:08,987 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2024-11-27 20:24:08,989 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 188 states to 188 states and 220 transitions. [2024-11-27 20:24:08,989 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 128 [2024-11-27 20:24:08,990 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 128 [2024-11-27 20:24:08,990 INFO L73 IsDeterministic]: Start isDeterministic. Operand 188 states and 220 transitions. [2024-11-27 20:24:08,991 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-27 20:24:08,991 INFO L218 hiAutomatonCegarLoop]: Abstraction has 188 states and 220 transitions. [2024-11-27 20:24:08,991 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 188 states and 220 transitions. [2024-11-27 20:24:08,999 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 188 to 68. [2024-11-27 20:24:09,000 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 68 states, 68 states have (on average 1.0294117647058822) internal successors, (70), 67 states have internal predecessors, (70), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-27 20:24:09,000 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 68 states to 68 states and 70 transitions. [2024-11-27 20:24:09,003 INFO L240 hiAutomatonCegarLoop]: Abstraction has 68 states and 70 transitions. [2024-11-27 20:24:09,003 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 32 states. [2024-11-27 20:24:09,004 INFO L425 stractBuchiCegarLoop]: Abstraction has 68 states and 70 transitions. [2024-11-27 20:24:09,004 INFO L332 stractBuchiCegarLoop]: ======== Iteration 6 ============ [2024-11-27 20:24:09,004 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 68 states and 70 transitions. [2024-11-27 20:24:09,005 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2024-11-27 20:24:09,008 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-27 20:24:09,008 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-27 20:24:09,010 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [30, 30, 1, 1, 1, 1] [2024-11-27 20:24:09,010 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2024-11-27 20:24:09,010 INFO L747 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~post2#1, main_#t~mem3#1, main_#t~short4#1, main_#t~post5#1, main_~#A~0#1.base, main_~#A~0#1.offset, main_~i~0#1;call main_~#A~0#1.base, main_~#A~0#1.offset := #Ultimate.allocOnStack(4096);havoc main_~i~0#1;main_~i~0#1 := 0;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume !(main_~i~0#1 < 1024);" "main_~i~0#1 := 0;" [2024-11-27 20:24:09,010 INFO L749 eck$LassoCheckResult]: Loop: "main_#t~short4#1 := main_~i~0#1 < 1024;" "assume main_#t~short4#1;call main_#t~mem3#1 := read~int#1(main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);main_#t~short4#1 := 0 != main_#t~mem3#1;" "assume main_#t~short4#1;havoc main_#t~mem3#1;havoc main_#t~short4#1;" "main_#t~post5#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" [2024-11-27 20:24:09,011 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-27 20:24:09,011 INFO L85 PathProgramCache]: Analyzing trace with hash 1456824129, now seen corresponding path program 4 times [2024-11-27 20:24:09,011 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM [2024-11-27 20:24:09,011 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [354342448] [2024-11-27 20:24:09,011 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-27 20:24:09,011 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-27 20:24:09,099 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-27 20:24:10,499 INFO L136 FreeRefinementEngine]: Strategy CAMEL_NO_AM found an infeasible trace [2024-11-27 20:24:10,500 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [354342448] [2024-11-27 20:24:10,500 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [354342448] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-27 20:24:10,500 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [177654682] [2024-11-27 20:24:10,500 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-27 20:24:10,501 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-27 20:24:10,501 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c7d850c0-8d79-4b06-8e4f-5286d9f9759b/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-27 20:24:10,504 INFO L229 MonitoredProcess]: Starting monitored process 18 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c7d850c0-8d79-4b06-8e4f-5286d9f9759b/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-27 20:24:10,506 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c7d850c0-8d79-4b06-8e4f-5286d9f9759b/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (18)] Waiting until timeout for monitored process [2024-11-27 20:24:10,644 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-27 20:24:10,646 INFO L256 TraceCheckSpWp]: Trace formula consists of 364 conjuncts, 32 conjuncts are in the unsatisfiable core [2024-11-27 20:24:10,650 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-27 20:24:10,784 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-27 20:24:12,496 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [177654682] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-27 20:24:12,496 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-27 20:24:12,497 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [33, 33, 33] total 65 [2024-11-27 20:24:12,497 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1037569703] [2024-11-27 20:24:12,497 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-27 20:24:12,497 INFO L752 eck$LassoCheckResult]: stem already infeasible [2024-11-27 20:24:12,498 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-27 20:24:12,498 INFO L85 PathProgramCache]: Analyzing trace with hash 1542376, now seen corresponding path program 5 times [2024-11-27 20:24:12,498 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM [2024-11-27 20:24:12,498 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [19847325] [2024-11-27 20:24:12,498 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-27 20:24:12,498 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-27 20:24:12,503 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-27 20:24:12,503 INFO L357 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-27 20:24:12,505 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-27 20:24:12,507 INFO L130 FreeRefinementEngine]: Strategy CAMEL_NO_AM found a feasible trace [2024-11-27 20:24:12,593 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL_NO_AM [2024-11-27 20:24:12,598 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 65 interpolants. [2024-11-27 20:24:12,602 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=2080, Invalid=2080, Unknown=0, NotChecked=0, Total=4160 [2024-11-27 20:24:12,603 INFO L87 Difference]: Start difference. First operand 68 states and 70 transitions. cyclomatic complexity: 4 Second operand has 65 states, 65 states have (on average 1.9846153846153847) internal successors, (129), 65 states have internal predecessors, (129), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-27 20:24:14,054 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-27 20:24:14,054 INFO L93 Difference]: Finished difference Result 380 states and 444 transitions. [2024-11-27 20:24:14,054 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 380 states and 444 transitions. [2024-11-27 20:24:14,063 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2024-11-27 20:24:14,070 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 380 states to 380 states and 444 transitions. [2024-11-27 20:24:14,073 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 256 [2024-11-27 20:24:14,074 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 256 [2024-11-27 20:24:14,074 INFO L73 IsDeterministic]: Start isDeterministic. Operand 380 states and 444 transitions. [2024-11-27 20:24:14,076 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-27 20:24:14,079 INFO L218 hiAutomatonCegarLoop]: Abstraction has 380 states and 444 transitions. [2024-11-27 20:24:14,080 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 380 states and 444 transitions. [2024-11-27 20:24:14,093 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 380 to 132. [2024-11-27 20:24:14,094 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 132 states, 132 states have (on average 1.0151515151515151) internal successors, (134), 131 states have internal predecessors, (134), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-27 20:24:14,095 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 132 states to 132 states and 134 transitions. [2024-11-27 20:24:14,095 INFO L240 hiAutomatonCegarLoop]: Abstraction has 132 states and 134 transitions. [2024-11-27 20:24:14,097 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 64 states. [2024-11-27 20:24:14,098 INFO L425 stractBuchiCegarLoop]: Abstraction has 132 states and 134 transitions. [2024-11-27 20:24:14,098 INFO L332 stractBuchiCegarLoop]: ======== Iteration 7 ============ [2024-11-27 20:24:14,098 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 132 states and 134 transitions. [2024-11-27 20:24:14,099 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2024-11-27 20:24:14,099 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-27 20:24:14,100 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-27 20:24:14,103 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [62, 62, 1, 1, 1, 1] [2024-11-27 20:24:14,103 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2024-11-27 20:24:14,103 INFO L747 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~post2#1, main_#t~mem3#1, main_#t~short4#1, main_#t~post5#1, main_~#A~0#1.base, main_~#A~0#1.offset, main_~i~0#1;call main_~#A~0#1.base, main_~#A~0#1.offset := #Ultimate.allocOnStack(4096);havoc main_~i~0#1;main_~i~0#1 := 0;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume !(main_~i~0#1 < 1024);" "main_~i~0#1 := 0;" [2024-11-27 20:24:14,104 INFO L749 eck$LassoCheckResult]: Loop: "main_#t~short4#1 := main_~i~0#1 < 1024;" "assume main_#t~short4#1;call main_#t~mem3#1 := read~int#1(main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);main_#t~short4#1 := 0 != main_#t~mem3#1;" "assume main_#t~short4#1;havoc main_#t~mem3#1;havoc main_#t~short4#1;" "main_#t~post5#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" [2024-11-27 20:24:14,104 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-27 20:24:14,105 INFO L85 PathProgramCache]: Analyzing trace with hash 1851201473, now seen corresponding path program 5 times [2024-11-27 20:24:14,105 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM [2024-11-27 20:24:14,105 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [914521374] [2024-11-27 20:24:14,105 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-27 20:24:14,105 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-27 20:24:14,236 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-27 20:24:18,890 INFO L136 FreeRefinementEngine]: Strategy CAMEL_NO_AM found an infeasible trace [2024-11-27 20:24:18,890 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [914521374] [2024-11-27 20:24:18,890 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [914521374] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-27 20:24:18,890 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1950607151] [2024-11-27 20:24:18,891 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-27 20:24:18,891 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-27 20:24:18,891 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c7d850c0-8d79-4b06-8e4f-5286d9f9759b/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-27 20:24:18,893 INFO L229 MonitoredProcess]: Starting monitored process 19 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c7d850c0-8d79-4b06-8e4f-5286d9f9759b/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-27 20:24:18,894 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c7d850c0-8d79-4b06-8e4f-5286d9f9759b/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (19)] Waiting until timeout for monitored process [2024-11-27 20:24:19,182 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-27 20:24:19,188 INFO L256 TraceCheckSpWp]: Trace formula consists of 716 conjuncts, 64 conjuncts are in the unsatisfiable core [2024-11-27 20:24:19,200 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-27 20:24:19,550 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-27 20:24:26,157 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1950607151] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-27 20:24:26,157 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-27 20:24:26,157 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [65, 65, 65] total 129 [2024-11-27 20:24:26,158 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [946956160] [2024-11-27 20:24:26,158 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-27 20:24:26,159 INFO L752 eck$LassoCheckResult]: stem already infeasible [2024-11-27 20:24:26,159 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-27 20:24:26,159 INFO L85 PathProgramCache]: Analyzing trace with hash 1542376, now seen corresponding path program 6 times [2024-11-27 20:24:26,159 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM [2024-11-27 20:24:26,159 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1398838590] [2024-11-27 20:24:26,159 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-27 20:24:26,160 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-27 20:24:26,168 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-27 20:24:26,168 INFO L357 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-27 20:24:26,171 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-27 20:24:26,174 INFO L130 FreeRefinementEngine]: Strategy CAMEL_NO_AM found a feasible trace [2024-11-27 20:24:26,277 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL_NO_AM [2024-11-27 20:24:26,280 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 129 interpolants. [2024-11-27 20:24:26,289 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8256, Invalid=8256, Unknown=0, NotChecked=0, Total=16512 [2024-11-27 20:24:26,290 INFO L87 Difference]: Start difference. First operand 132 states and 134 transitions. cyclomatic complexity: 4 Second operand has 129 states, 129 states have (on average 1.9922480620155039) internal successors, (257), 129 states have internal predecessors, (257), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-27 20:24:34,319 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-27 20:24:34,319 INFO L93 Difference]: Finished difference Result 764 states and 892 transitions. [2024-11-27 20:24:34,320 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 764 states and 892 transitions. [2024-11-27 20:24:34,328 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2024-11-27 20:24:34,333 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 764 states to 764 states and 892 transitions. [2024-11-27 20:24:34,334 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 512 [2024-11-27 20:24:34,336 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 512 [2024-11-27 20:24:34,336 INFO L73 IsDeterministic]: Start isDeterministic. Operand 764 states and 892 transitions. [2024-11-27 20:24:34,343 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-27 20:24:34,343 INFO L218 hiAutomatonCegarLoop]: Abstraction has 764 states and 892 transitions. [2024-11-27 20:24:34,345 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 764 states and 892 transitions. [2024-11-27 20:24:34,367 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 764 to 260. [2024-11-27 20:24:34,371 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 260 states, 260 states have (on average 1.0076923076923077) internal successors, (262), 259 states have internal predecessors, (262), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-27 20:24:34,373 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 260 states to 260 states and 262 transitions. [2024-11-27 20:24:34,373 INFO L240 hiAutomatonCegarLoop]: Abstraction has 260 states and 262 transitions. [2024-11-27 20:24:34,378 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 128 states. [2024-11-27 20:24:34,379 INFO L425 stractBuchiCegarLoop]: Abstraction has 260 states and 262 transitions. [2024-11-27 20:24:34,379 INFO L332 stractBuchiCegarLoop]: ======== Iteration 8 ============ [2024-11-27 20:24:34,379 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 260 states and 262 transitions. [2024-11-27 20:24:34,382 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2024-11-27 20:24:34,382 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-27 20:24:34,382 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-27 20:24:34,386 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [126, 126, 1, 1, 1, 1] [2024-11-27 20:24:34,386 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2024-11-27 20:24:34,387 INFO L747 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~post2#1, main_#t~mem3#1, main_#t~short4#1, main_#t~post5#1, main_~#A~0#1.base, main_~#A~0#1.offset, main_~i~0#1;call main_~#A~0#1.base, main_~#A~0#1.offset := #Ultimate.allocOnStack(4096);havoc main_~i~0#1;main_~i~0#1 := 0;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume !(main_~i~0#1 < 1024);" "main_~i~0#1 := 0;" [2024-11-27 20:24:34,387 INFO L749 eck$LassoCheckResult]: Loop: "main_#t~short4#1 := main_~i~0#1 < 1024;" "assume main_#t~short4#1;call main_#t~mem3#1 := read~int#1(main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);main_#t~short4#1 := 0 != main_#t~mem3#1;" "assume main_#t~short4#1;havoc main_#t~mem3#1;havoc main_#t~short4#1;" "main_#t~post5#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" [2024-11-27 20:24:34,387 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-27 20:24:34,387 INFO L85 PathProgramCache]: Analyzing trace with hash -1622243135, now seen corresponding path program 6 times [2024-11-27 20:24:34,387 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM [2024-11-27 20:24:34,387 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [141573918] [2024-11-27 20:24:34,388 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-27 20:24:34,388 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-27 20:24:34,706 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-27 20:24:48,193 INFO L136 FreeRefinementEngine]: Strategy CAMEL_NO_AM found an infeasible trace [2024-11-27 20:24:48,194 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [141573918] [2024-11-27 20:24:48,194 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [141573918] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-27 20:24:48,194 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1152200899] [2024-11-27 20:24:48,194 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-27 20:24:48,194 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-27 20:24:48,194 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c7d850c0-8d79-4b06-8e4f-5286d9f9759b/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-27 20:24:48,196 INFO L229 MonitoredProcess]: Starting monitored process 20 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c7d850c0-8d79-4b06-8e4f-5286d9f9759b/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-27 20:24:48,198 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c7d850c0-8d79-4b06-8e4f-5286d9f9759b/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (20)] Waiting until timeout for monitored process [2024-11-27 20:24:48,693 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-27 20:24:48,707 INFO L256 TraceCheckSpWp]: Trace formula consists of 1420 conjuncts, 128 conjuncts are in the unsatisfiable core [2024-11-27 20:24:48,718 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-27 20:24:49,317 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-27 20:25:10,020 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1152200899] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-27 20:25:10,020 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-27 20:25:10,020 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [129, 129, 129] total 257 [2024-11-27 20:25:10,020 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1396633597] [2024-11-27 20:25:10,020 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-27 20:25:10,021 INFO L752 eck$LassoCheckResult]: stem already infeasible [2024-11-27 20:25:10,022 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-27 20:25:10,022 INFO L85 PathProgramCache]: Analyzing trace with hash 1542376, now seen corresponding path program 7 times [2024-11-27 20:25:10,022 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM [2024-11-27 20:25:10,022 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2126050929] [2024-11-27 20:25:10,022 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-27 20:25:10,022 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-27 20:25:10,027 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-27 20:25:10,027 INFO L357 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-27 20:25:10,029 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-27 20:25:10,032 INFO L130 FreeRefinementEngine]: Strategy CAMEL_NO_AM found a feasible trace [2024-11-27 20:25:10,107 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL_NO_AM [2024-11-27 20:25:10,113 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 257 interpolants. [2024-11-27 20:25:10,120 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=32896, Invalid=32896, Unknown=0, NotChecked=0, Total=65792 [2024-11-27 20:25:10,121 INFO L87 Difference]: Start difference. First operand 260 states and 262 transitions. cyclomatic complexity: 4 Second operand has 257 states, 257 states have (on average 1.9961089494163424) internal successors, (513), 257 states have internal predecessors, (513), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-27 20:26:38,623 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-27 20:26:38,623 INFO L93 Difference]: Finished difference Result 1532 states and 1788 transitions. [2024-11-27 20:26:38,623 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1532 states and 1788 transitions. [2024-11-27 20:26:38,638 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2024-11-27 20:26:38,650 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1532 states to 1532 states and 1788 transitions. [2024-11-27 20:26:38,650 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1024 [2024-11-27 20:26:38,653 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1024 [2024-11-27 20:26:38,654 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1532 states and 1788 transitions. [2024-11-27 20:26:38,657 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-27 20:26:38,657 INFO L218 hiAutomatonCegarLoop]: Abstraction has 1532 states and 1788 transitions. [2024-11-27 20:26:38,660 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1532 states and 1788 transitions. [2024-11-27 20:26:38,687 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1532 to 516. [2024-11-27 20:26:38,688 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 516 states, 516 states have (on average 1.003875968992248) internal successors, (518), 515 states have internal predecessors, (518), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-27 20:26:38,692 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 516 states to 516 states and 518 transitions. [2024-11-27 20:26:38,692 INFO L240 hiAutomatonCegarLoop]: Abstraction has 516 states and 518 transitions. [2024-11-27 20:26:38,693 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 256 states. [2024-11-27 20:26:38,693 INFO L425 stractBuchiCegarLoop]: Abstraction has 516 states and 518 transitions. [2024-11-27 20:26:38,694 INFO L332 stractBuchiCegarLoop]: ======== Iteration 9 ============ [2024-11-27 20:26:38,694 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 516 states and 518 transitions. [2024-11-27 20:26:38,698 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2024-11-27 20:26:38,698 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-27 20:26:38,698 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-27 20:26:38,710 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [254, 254, 1, 1, 1, 1] [2024-11-27 20:26:38,711 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2024-11-27 20:26:38,715 INFO L747 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~post2#1, main_#t~mem3#1, main_#t~short4#1, main_#t~post5#1, main_~#A~0#1.base, main_~#A~0#1.offset, main_~i~0#1;call main_~#A~0#1.base, main_~#A~0#1.offset := #Ultimate.allocOnStack(4096);havoc main_~i~0#1;main_~i~0#1 := 0;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume !(main_~i~0#1 < 1024);" "main_~i~0#1 := 0;" [2024-11-27 20:26:38,715 INFO L749 eck$LassoCheckResult]: Loop: "main_#t~short4#1 := main_~i~0#1 < 1024;" "assume main_#t~short4#1;call main_#t~mem3#1 := read~int#1(main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);main_#t~short4#1 := 0 != main_#t~mem3#1;" "assume main_#t~short4#1;havoc main_#t~mem3#1;havoc main_#t~short4#1;" "main_#t~post5#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" [2024-11-27 20:26:38,715 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-27 20:26:38,716 INFO L85 PathProgramCache]: Analyzing trace with hash -1995609407, now seen corresponding path program 7 times [2024-11-27 20:26:38,716 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM [2024-11-27 20:26:38,716 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [973407421] [2024-11-27 20:26:38,716 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-27 20:26:38,716 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-27 20:26:39,688 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-27 20:27:34,274 INFO L136 FreeRefinementEngine]: Strategy CAMEL_NO_AM found an infeasible trace [2024-11-27 20:27:34,275 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [973407421] [2024-11-27 20:27:34,275 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [973407421] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-27 20:27:34,275 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1640380153] [2024-11-27 20:27:34,275 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-27 20:27:34,275 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-27 20:27:34,275 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c7d850c0-8d79-4b06-8e4f-5286d9f9759b/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-27 20:27:34,278 INFO L229 MonitoredProcess]: Starting monitored process 21 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c7d850c0-8d79-4b06-8e4f-5286d9f9759b/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-27 20:27:34,282 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c7d850c0-8d79-4b06-8e4f-5286d9f9759b/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (21)] Waiting until timeout for monitored process [2024-11-27 20:27:35,250 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-27 20:27:35,278 INFO L256 TraceCheckSpWp]: Trace formula consists of 2828 conjuncts, 256 conjuncts are in the unsatisfiable core [2024-11-27 20:27:35,297 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-27 20:27:36,359 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-27 20:29:19,219 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1640380153] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-27 20:29:19,219 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-27 20:29:19,219 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [257, 257, 257] total 513 [2024-11-27 20:29:19,219 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [921962305] [2024-11-27 20:29:19,220 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-27 20:29:19,222 INFO L752 eck$LassoCheckResult]: stem already infeasible [2024-11-27 20:29:19,222 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-27 20:29:19,222 INFO L85 PathProgramCache]: Analyzing trace with hash 1542376, now seen corresponding path program 8 times [2024-11-27 20:29:19,222 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM [2024-11-27 20:29:19,222 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1716883096] [2024-11-27 20:29:19,222 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-27 20:29:19,222 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-27 20:29:19,230 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-27 20:29:19,230 INFO L357 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-27 20:29:19,232 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-27 20:29:19,236 INFO L130 FreeRefinementEngine]: Strategy CAMEL_NO_AM found a feasible trace [2024-11-27 20:29:19,322 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL_NO_AM [2024-11-27 20:29:19,354 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 513 interpolants. [2024-11-27 20:29:19,380 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=131328, Invalid=131328, Unknown=0, NotChecked=0, Total=262656 [2024-11-27 20:29:19,382 INFO L87 Difference]: Start difference. First operand 516 states and 518 transitions. cyclomatic complexity: 4 Second operand has 513 states, 513 states have (on average 1.9980506822612085) internal successors, (1025), 513 states have internal predecessors, (1025), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)