./Ultimate.py --spec ../../sv-benchmarks/c/properties/termination.prp --file ../../sv-benchmarks/c/seq-mthreaded/pals_lcr-var-start-time.6.1.ufo.UNBOUNDED.pals.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version d790fecc Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_468e79eb-6d55-4a0d-b086-3c03e269e5f0/bin/uautomizer-verify-aQ6SnzHsRB/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_468e79eb-6d55-4a0d-b086-3c03e269e5f0/bin/uautomizer-verify-aQ6SnzHsRB/plugins/org.eclipse.equinox.launcher_1.6.800.v20240513-1750.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_468e79eb-6d55-4a0d-b086-3c03e269e5f0/bin/uautomizer-verify-aQ6SnzHsRB/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_468e79eb-6d55-4a0d-b086-3c03e269e5f0/bin/uautomizer-verify-aQ6SnzHsRB/config/AutomizerTermination.xml -i ../../sv-benchmarks/c/seq-mthreaded/pals_lcr-var-start-time.6.1.ufo.UNBOUNDED.pals.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_468e79eb-6d55-4a0d-b086-3c03e269e5f0/bin/uautomizer-verify-aQ6SnzHsRB/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_468e79eb-6d55-4a0d-b086-3c03e269e5f0/bin/uautomizer-verify-aQ6SnzHsRB --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash dd1724e619d2e8fc18a4dc8aa6c726656a51fc7e14f993d511c4c773ed4748f3 --- Real Ultimate output --- This is Ultimate 0.3.0-dev-d790fec [2024-11-28 03:26:23,210 INFO L188 SettingsManager]: Resetting all preferences to default values... [2024-11-28 03:26:23,277 INFO L114 SettingsManager]: Loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_468e79eb-6d55-4a0d-b086-3c03e269e5f0/bin/uautomizer-verify-aQ6SnzHsRB/config/svcomp-Termination-32bit-Automizer_Default.epf [2024-11-28 03:26:23,282 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2024-11-28 03:26:23,283 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2024-11-28 03:26:23,307 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2024-11-28 03:26:23,308 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2024-11-28 03:26:23,308 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2024-11-28 03:26:23,309 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2024-11-28 03:26:23,309 INFO L153 SettingsManager]: * Use memory slicer=true [2024-11-28 03:26:23,309 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2024-11-28 03:26:23,310 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2024-11-28 03:26:23,310 INFO L153 SettingsManager]: * Use SBE=true [2024-11-28 03:26:23,310 INFO L151 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2024-11-28 03:26:23,310 INFO L153 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2024-11-28 03:26:23,310 INFO L153 SettingsManager]: * Use old map elimination=false [2024-11-28 03:26:23,310 INFO L153 SettingsManager]: * Use external solver (rank synthesis)=false [2024-11-28 03:26:23,311 INFO L153 SettingsManager]: * Use only trivial implications for array writes=true [2024-11-28 03:26:23,312 INFO L153 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2024-11-28 03:26:23,312 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2024-11-28 03:26:23,312 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2024-11-28 03:26:23,312 INFO L153 SettingsManager]: * sizeof long=4 [2024-11-28 03:26:23,312 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2024-11-28 03:26:23,312 INFO L153 SettingsManager]: * sizeof POINTER=4 [2024-11-28 03:26:23,312 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2024-11-28 03:26:23,312 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2024-11-28 03:26:23,312 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2024-11-28 03:26:23,313 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2024-11-28 03:26:23,313 INFO L153 SettingsManager]: * Check unreachability of reach_error function=false [2024-11-28 03:26:23,313 INFO L153 SettingsManager]: * sizeof long double=12 [2024-11-28 03:26:23,313 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2024-11-28 03:26:23,313 INFO L153 SettingsManager]: * Assume nondeterminstic values are in range=false [2024-11-28 03:26:23,313 INFO L153 SettingsManager]: * Behaviour of calls to undefined functions=OVERAPPROXIMATE_BEHAVIOUR [2024-11-28 03:26:23,313 INFO L153 SettingsManager]: * Use constant arrays=true [2024-11-28 03:26:23,313 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2024-11-28 03:26:23,313 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-11-28 03:26:23,314 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2024-11-28 03:26:23,314 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL_NO_AM [2024-11-28 03:26:23,314 INFO L151 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2024-11-28 03:26:23,314 INFO L153 SettingsManager]: * TransformationType=MODULO_NEIGHBOR Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_468e79eb-6d55-4a0d-b086-3c03e269e5f0/bin/uautomizer-verify-aQ6SnzHsRB Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> dd1724e619d2e8fc18a4dc8aa6c726656a51fc7e14f993d511c4c773ed4748f3 [2024-11-28 03:26:23,719 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2024-11-28 03:26:23,736 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2024-11-28 03:26:23,738 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2024-11-28 03:26:23,740 INFO L270 PluginConnector]: Initializing CDTParser... [2024-11-28 03:26:23,740 INFO L274 PluginConnector]: CDTParser initialized [2024-11-28 03:26:23,743 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_468e79eb-6d55-4a0d-b086-3c03e269e5f0/bin/uautomizer-verify-aQ6SnzHsRB/../../sv-benchmarks/c/seq-mthreaded/pals_lcr-var-start-time.6.1.ufo.UNBOUNDED.pals.c [2024-11-28 03:26:27,206 INFO L533 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_468e79eb-6d55-4a0d-b086-3c03e269e5f0/bin/uautomizer-verify-aQ6SnzHsRB/data/da73416aa/7c97c1f3ec184f869b38b1fc138d351a/FLAGefd11be8a [2024-11-28 03:26:27,556 INFO L384 CDTParser]: Found 1 translation units. [2024-11-28 03:26:27,557 INFO L180 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_468e79eb-6d55-4a0d-b086-3c03e269e5f0/sv-benchmarks/c/seq-mthreaded/pals_lcr-var-start-time.6.1.ufo.UNBOUNDED.pals.c [2024-11-28 03:26:27,577 INFO L427 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_468e79eb-6d55-4a0d-b086-3c03e269e5f0/bin/uautomizer-verify-aQ6SnzHsRB/data/da73416aa/7c97c1f3ec184f869b38b1fc138d351a/FLAGefd11be8a [2024-11-28 03:26:27,609 INFO L435 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_468e79eb-6d55-4a0d-b086-3c03e269e5f0/bin/uautomizer-verify-aQ6SnzHsRB/data/da73416aa/7c97c1f3ec184f869b38b1fc138d351a [2024-11-28 03:26:27,613 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2024-11-28 03:26:27,617 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2024-11-28 03:26:27,618 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2024-11-28 03:26:27,619 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2024-11-28 03:26:27,629 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2024-11-28 03:26:27,630 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.11 03:26:27" (1/1) ... [2024-11-28 03:26:27,633 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@45fb6f3 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 03:26:27, skipping insertion in model container [2024-11-28 03:26:27,634 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.11 03:26:27" (1/1) ... [2024-11-28 03:26:27,686 INFO L175 MainTranslator]: Built tables and reachable declarations [2024-11-28 03:26:28,089 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-11-28 03:26:28,116 INFO L200 MainTranslator]: Completed pre-run [2024-11-28 03:26:28,217 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-11-28 03:26:28,245 INFO L204 MainTranslator]: Completed translation [2024-11-28 03:26:28,246 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 03:26:28 WrapperNode [2024-11-28 03:26:28,246 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2024-11-28 03:26:28,247 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2024-11-28 03:26:28,247 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2024-11-28 03:26:28,247 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2024-11-28 03:26:28,255 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 03:26:28" (1/1) ... [2024-11-28 03:26:28,267 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 03:26:28" (1/1) ... [2024-11-28 03:26:28,310 INFO L138 Inliner]: procedures = 26, calls = 18, calls flagged for inlining = 13, calls inlined = 13, statements flattened = 434 [2024-11-28 03:26:28,310 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2024-11-28 03:26:28,311 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2024-11-28 03:26:28,311 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2024-11-28 03:26:28,311 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2024-11-28 03:26:28,322 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 03:26:28" (1/1) ... [2024-11-28 03:26:28,322 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 03:26:28" (1/1) ... [2024-11-28 03:26:28,326 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 03:26:28" (1/1) ... [2024-11-28 03:26:28,351 INFO L175 MemorySlicer]: Split 2 memory accesses to 1 slices as follows [2]. 100 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2]. The 0 writes are split as follows [0]. [2024-11-28 03:26:28,351 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 03:26:28" (1/1) ... [2024-11-28 03:26:28,352 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 03:26:28" (1/1) ... [2024-11-28 03:26:28,368 INFO L184 PluginConnector]: Executing the observer ReplaceArrayAssignments from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 03:26:28" (1/1) ... [2024-11-28 03:26:28,374 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 03:26:28" (1/1) ... [2024-11-28 03:26:28,385 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 03:26:28" (1/1) ... [2024-11-28 03:26:28,391 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 03:26:28" (1/1) ... [2024-11-28 03:26:28,393 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 03:26:28" (1/1) ... [2024-11-28 03:26:28,401 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2024-11-28 03:26:28,405 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2024-11-28 03:26:28,405 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2024-11-28 03:26:28,409 INFO L274 PluginConnector]: RCFGBuilder initialized [2024-11-28 03:26:28,410 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 03:26:28" (1/1) ... [2024-11-28 03:26:28,421 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-28 03:26:28,444 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_468e79eb-6d55-4a0d-b086-3c03e269e5f0/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 03:26:28,461 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_468e79eb-6d55-4a0d-b086-3c03e269e5f0/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-28 03:26:28,468 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_468e79eb-6d55-4a0d-b086-3c03e269e5f0/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2024-11-28 03:26:28,501 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2024-11-28 03:26:28,502 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#0 [2024-11-28 03:26:28,502 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2024-11-28 03:26:28,502 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2024-11-28 03:26:28,659 INFO L234 CfgBuilder]: Building ICFG [2024-11-28 03:26:28,661 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2024-11-28 03:26:29,528 INFO L? ?]: Removed 51 outVars from TransFormulas that were not future-live. [2024-11-28 03:26:29,529 INFO L283 CfgBuilder]: Performing block encoding [2024-11-28 03:26:29,546 INFO L307 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2024-11-28 03:26:29,546 INFO L312 CfgBuilder]: Removed 2 assume(true) statements. [2024-11-28 03:26:29,547 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.11 03:26:29 BoogieIcfgContainer [2024-11-28 03:26:29,547 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2024-11-28 03:26:29,548 INFO L112 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2024-11-28 03:26:29,548 INFO L270 PluginConnector]: Initializing BuchiAutomizer... [2024-11-28 03:26:29,556 INFO L274 PluginConnector]: BuchiAutomizer initialized [2024-11-28 03:26:29,557 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2024-11-28 03:26:29,557 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 28.11 03:26:27" (1/3) ... [2024-11-28 03:26:29,559 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@416ab2d5 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 28.11 03:26:29, skipping insertion in model container [2024-11-28 03:26:29,559 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2024-11-28 03:26:29,559 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 03:26:28" (2/3) ... [2024-11-28 03:26:29,561 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@416ab2d5 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 28.11 03:26:29, skipping insertion in model container [2024-11-28 03:26:29,561 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2024-11-28 03:26:29,561 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.11 03:26:29" (3/3) ... [2024-11-28 03:26:29,563 INFO L363 chiAutomizerObserver]: Analyzing ICFG pals_lcr-var-start-time.6.1.ufo.UNBOUNDED.pals.c [2024-11-28 03:26:29,645 INFO L300 stractBuchiCegarLoop]: Interprodecural is true [2024-11-28 03:26:29,646 INFO L301 stractBuchiCegarLoop]: Hoare is None [2024-11-28 03:26:29,646 INFO L302 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2024-11-28 03:26:29,646 INFO L303 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2024-11-28 03:26:29,646 INFO L304 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2024-11-28 03:26:29,646 INFO L305 stractBuchiCegarLoop]: Difference is false [2024-11-28 03:26:29,646 INFO L306 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2024-11-28 03:26:29,646 INFO L310 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2024-11-28 03:26:29,654 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 123 states, 122 states have (on average 1.7459016393442623) internal successors, (213), 122 states have internal predecessors, (213), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 03:26:29,685 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 72 [2024-11-28 03:26:29,686 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-28 03:26:29,686 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-28 03:26:29,701 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1] [2024-11-28 03:26:29,702 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 03:26:29,702 INFO L332 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2024-11-28 03:26:29,703 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 123 states, 122 states have (on average 1.7459016393442623) internal successors, (213), 122 states have internal predecessors, (213), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 03:26:29,710 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 72 [2024-11-28 03:26:29,710 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-28 03:26:29,710 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-28 03:26:29,712 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1] [2024-11-28 03:26:29,712 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 03:26:29,721 INFO L747 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(49, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~r1~0 := 0;~p1~0 := 0;~p1_old~0 := 0;~p1_new~0 := 0;~id1~0 := 0;~st1~0 := 0;~send1~0 := 0;~mode1~0 := 0;~alive1~0 := 0;~p2~0 := 0;~p2_old~0 := 0;~p2_new~0 := 0;~id2~0 := 0;~st2~0 := 0;~send2~0 := 0;~mode2~0 := 0;~alive2~0 := 0;~p3~0 := 0;~p3_old~0 := 0;~p3_new~0 := 0;~id3~0 := 0;~st3~0 := 0;~send3~0 := 0;~mode3~0 := 0;~alive3~0 := 0;~p4~0 := 0;~p4_old~0 := 0;~p4_new~0 := 0;~id4~0 := 0;~st4~0 := 0;~send4~0 := 0;~mode4~0 := 0;~alive4~0 := 0;~p5~0 := 0;~p5_old~0 := 0;~p5_new~0 := 0;~id5~0 := 0;~st5~0 := 0;~send5~0 := 0;~mode5~0 := 0;~alive5~0 := 0;~p6~0 := 0;~p6_old~0 := 0;~p6_new~0 := 0;~id6~0 := 0;~st6~0 := 0;~send6~0 := 0;~mode6~0 := 0;~alive6~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~nondet31#1, main_#t~nondet32#1, main_#t~nondet33#1, main_#t~nondet34#1, main_#t~ret35#1, main_#t~ret36#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;havoc main_#t~nondet4#1;~r1~0 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;~id1~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_#t~nondet6#1;~st1~0 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_#t~nondet7#1;~send1~0 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_#t~nondet8#1;assume 0 == main_#t~nondet8#1 || 1 == main_#t~nondet8#1;~mode1~0 := (if 0 == main_#t~nondet8#1 % 256 then 0 else 1);havoc main_#t~nondet8#1;havoc main_#t~nondet9#1;assume 0 == main_#t~nondet9#1 || 1 == main_#t~nondet9#1;~alive1~0 := (if 0 == main_#t~nondet9#1 % 256 then 0 else 1);havoc main_#t~nondet9#1;havoc main_#t~nondet10#1;~id2~0 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_#t~nondet11#1;~st2~0 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_#t~nondet12#1;~send2~0 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_#t~nondet13#1;assume 0 == main_#t~nondet13#1 || 1 == main_#t~nondet13#1;~mode2~0 := (if 0 == main_#t~nondet13#1 % 256 then 0 else 1);havoc main_#t~nondet13#1;havoc main_#t~nondet14#1;assume 0 == main_#t~nondet14#1 || 1 == main_#t~nondet14#1;~alive2~0 := (if 0 == main_#t~nondet14#1 % 256 then 0 else 1);havoc main_#t~nondet14#1;havoc main_#t~nondet15#1;~id3~0 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_#t~nondet16#1;~st3~0 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_#t~nondet17#1;~send3~0 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_#t~nondet18#1;assume 0 == main_#t~nondet18#1 || 1 == main_#t~nondet18#1;~mode3~0 := (if 0 == main_#t~nondet18#1 % 256 then 0 else 1);havoc main_#t~nondet18#1;havoc main_#t~nondet19#1;assume 0 == main_#t~nondet19#1 || 1 == main_#t~nondet19#1;~alive3~0 := (if 0 == main_#t~nondet19#1 % 256 then 0 else 1);havoc main_#t~nondet19#1;havoc main_#t~nondet20#1;~id4~0 := main_#t~nondet20#1;havoc main_#t~nondet20#1;havoc main_#t~nondet21#1;~st4~0 := main_#t~nondet21#1;havoc main_#t~nondet21#1;havoc main_#t~nondet22#1;~send4~0 := main_#t~nondet22#1;havoc main_#t~nondet22#1;havoc main_#t~nondet23#1;assume 0 == main_#t~nondet23#1 || 1 == main_#t~nondet23#1;~mode4~0 := (if 0 == main_#t~nondet23#1 % 256 then 0 else 1);havoc main_#t~nondet23#1;havoc main_#t~nondet24#1;assume 0 == main_#t~nondet24#1 || 1 == main_#t~nondet24#1;~alive4~0 := (if 0 == main_#t~nondet24#1 % 256 then 0 else 1);havoc main_#t~nondet24#1;havoc main_#t~nondet25#1;~id5~0 := main_#t~nondet25#1;havoc main_#t~nondet25#1;havoc main_#t~nondet26#1;~st5~0 := main_#t~nondet26#1;havoc main_#t~nondet26#1;havoc main_#t~nondet27#1;~send5~0 := main_#t~nondet27#1;havoc main_#t~nondet27#1;havoc main_#t~nondet28#1;assume 0 == main_#t~nondet28#1 || 1 == main_#t~nondet28#1;~mode5~0 := (if 0 == main_#t~nondet28#1 % 256 then 0 else 1);havoc main_#t~nondet28#1;havoc main_#t~nondet29#1;assume 0 == main_#t~nondet29#1 || 1 == main_#t~nondet29#1;~alive5~0 := (if 0 == main_#t~nondet29#1 % 256 then 0 else 1);havoc main_#t~nondet29#1;havoc main_#t~nondet30#1;~id6~0 := main_#t~nondet30#1;havoc main_#t~nondet30#1;havoc main_#t~nondet31#1;~st6~0 := main_#t~nondet31#1;havoc main_#t~nondet31#1;havoc main_#t~nondet32#1;~send6~0 := main_#t~nondet32#1;havoc main_#t~nondet32#1;havoc main_#t~nondet33#1;assume 0 == main_#t~nondet33#1 || 1 == main_#t~nondet33#1;~mode6~0 := (if 0 == main_#t~nondet33#1 % 256 then 0 else 1);havoc main_#t~nondet33#1;havoc main_#t~nondet34#1;assume 0 == main_#t~nondet34#1 || 1 == main_#t~nondet34#1;~alive6~0 := (if 0 == main_#t~nondet34#1 % 256 then 0 else 1);havoc main_#t~nondet34#1;assume { :begin_inline_init } true;havoc init_#res#1;havoc init_~tmp~0#1;havoc init_~tmp~0#1;" "assume !(0 == (if ~r1~0 % 256 % 4294967296 <= 2147483647 then ~r1~0 % 256 % 4294967296 else ~r1~0 % 256 % 4294967296 - 4294967296));init_~tmp~0#1 := 0;" "init_#res#1 := init_~tmp~0#1;" "main_#t~ret35#1 := init_#res#1;havoc init_~tmp~0#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret35#1;havoc main_#t~ret35#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1;" "assume 0 == assume_abort_if_not_~cond#1;assume false;" "havoc assume_abort_if_not_~cond#1;havoc assume_abort_if_not_#in~cond#1;assume { :end_inline_assume_abort_if_not } true;~p1_old~0 := ~nomsg~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~nomsg~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~nomsg~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~nomsg~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~nomsg~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~nomsg~0;~p6_new~0 := ~nomsg~0;main_~i2~0#1 := 0;" [2024-11-28 03:26:29,722 INFO L749 eck$LassoCheckResult]: Loop: "assume { :begin_inline_node1 } true;havoc node1_~m1~0#1;havoc node1_~m1~0#1;node1_~m1~0#1 := ~nomsg~0;" "assume !(0 != ~mode1~0 % 256);" "assume 0 != ~alive1~0 % 256;~p1_new~0 := (if (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 <= 127 then (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 else (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 - 256);" "~mode1~0 := 1;" "havoc node1_~m1~0#1;assume { :end_inline_node1 } true;assume { :begin_inline_node2 } true;havoc node2_~m2~0#1;havoc node2_~m2~0#1;node2_~m2~0#1 := ~nomsg~0;" "assume !(0 != ~mode2~0 % 256);" "assume 0 != ~alive2~0 % 256;~p2_new~0 := (if (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 <= 127 then (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 else (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 - 256);" "~mode2~0 := 1;" "havoc node2_~m2~0#1;assume { :end_inline_node2 } true;assume { :begin_inline_node3 } true;havoc node3_~m3~0#1;havoc node3_~m3~0#1;node3_~m3~0#1 := ~nomsg~0;" "assume !(0 != ~mode3~0 % 256);" "assume 0 != ~alive3~0 % 256;~p3_new~0 := (if (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 <= 127 then (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 else (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 - 256);" "~mode3~0 := 1;" "havoc node3_~m3~0#1;assume { :end_inline_node3 } true;assume { :begin_inline_node4 } true;havoc node4_~m4~0#1;havoc node4_~m4~0#1;node4_~m4~0#1 := ~nomsg~0;" "assume !(0 != ~mode4~0 % 256);" "assume 0 != ~alive4~0 % 256;~p4_new~0 := (if (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 <= 127 then (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 else (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 - 256);" "~mode4~0 := 1;" "havoc node4_~m4~0#1;assume { :end_inline_node4 } true;assume { :begin_inline_node5 } true;havoc node5_~m5~0#1;havoc node5_~m5~0#1;node5_~m5~0#1 := ~nomsg~0;" "assume !(0 != ~mode5~0 % 256);" "assume 0 != ~alive5~0 % 256;~p5_new~0 := (if (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 <= 127 then (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 else (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 - 256);" "~mode5~0 := 1;" "havoc node5_~m5~0#1;assume { :end_inline_node5 } true;assume { :begin_inline_node6 } true;havoc node6_~m6~0#1;havoc node6_~m6~0#1;node6_~m6~0#1 := ~nomsg~0;" "assume !(0 != ~mode6~0 % 256);" "assume 0 != ~alive6~0 % 256;~p6_new~0 := (if (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 <= 127 then (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 else (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 - 256);" "~mode6~0 := 1;" "havoc node6_~m6~0#1;assume { :end_inline_node6 } true;~p1_old~0 := ~p1_new~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~p2_new~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~p3_new~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~p4_new~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~p5_new~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~p6_new~0;~p6_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_~tmp~1#1;havoc check_~tmp~1#1;" "assume !(~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0 + ~st6~0 <= 1);check_~tmp~1#1 := 0;" "check_#res#1 := check_~tmp~1#1;" "main_#t~ret36#1 := check_#res#1;havoc check_~tmp~1#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret36#1;havoc main_#t~ret36#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1;" "assume !(0 == assert_~arg#1 % 256);" "havoc assert_~arg#1;havoc assert_#in~arg#1;assume { :end_inline_assert } true;" [2024-11-28 03:26:29,729 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 03:26:29,730 INFO L85 PathProgramCache]: Analyzing trace with hash 2035845626, now seen corresponding path program 1 times [2024-11-28 03:26:29,740 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM [2024-11-28 03:26:29,740 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [522821732] [2024-11-28 03:26:29,740 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 03:26:29,741 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 03:26:29,932 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 03:26:30,080 INFO L136 FreeRefinementEngine]: Strategy CAMEL_NO_AM found an infeasible trace [2024-11-28 03:26:30,081 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [522821732] [2024-11-28 03:26:30,082 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [522821732] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-28 03:26:30,082 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1718877987] [2024-11-28 03:26:30,082 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 03:26:30,083 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-28 03:26:30,083 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_468e79eb-6d55-4a0d-b086-3c03e269e5f0/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 03:26:30,090 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_468e79eb-6d55-4a0d-b086-3c03e269e5f0/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-28 03:26:30,093 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_468e79eb-6d55-4a0d-b086-3c03e269e5f0/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2024-11-28 03:26:30,302 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 03:26:30,305 INFO L256 TraceCheckSpWp]: Trace formula consists of 197 conjuncts, 1 conjuncts are in the unsatisfiable core [2024-11-28 03:26:30,309 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-28 03:26:30,315 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-28 03:26:30,318 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1718877987] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-28 03:26:30,319 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-28 03:26:30,319 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [2, 2, 2] total 2 [2024-11-28 03:26:30,321 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [335452385] [2024-11-28 03:26:30,326 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-28 03:26:30,330 INFO L752 eck$LassoCheckResult]: stem already infeasible [2024-11-28 03:26:30,331 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 03:26:30,331 INFO L85 PathProgramCache]: Analyzing trace with hash -603430016, now seen corresponding path program 1 times [2024-11-28 03:26:30,331 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM [2024-11-28 03:26:30,331 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1840178104] [2024-11-28 03:26:30,332 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 03:26:30,332 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 03:26:30,495 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 03:26:31,124 INFO L136 FreeRefinementEngine]: Strategy CAMEL_NO_AM found an infeasible trace [2024-11-28 03:26:31,124 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1840178104] [2024-11-28 03:26:31,124 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1840178104] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-28 03:26:31,124 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1714615352] [2024-11-28 03:26:31,124 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 03:26:31,125 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-28 03:26:31,125 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_468e79eb-6d55-4a0d-b086-3c03e269e5f0/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 03:26:31,131 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_468e79eb-6d55-4a0d-b086-3c03e269e5f0/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-28 03:26:31,134 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_468e79eb-6d55-4a0d-b086-3c03e269e5f0/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2024-11-28 03:26:31,255 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 03:26:31,260 INFO L256 TraceCheckSpWp]: Trace formula consists of 93 conjuncts, 11 conjuncts are in the unsatisfiable core [2024-11-28 03:26:31,264 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-28 03:26:31,319 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-28 03:26:31,458 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1714615352] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-28 03:26:31,462 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-28 03:26:31,462 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5, 5] total 7 [2024-11-28 03:26:31,462 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1635491850] [2024-11-28 03:26:31,462 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-28 03:26:31,464 INFO L764 eck$LassoCheckResult]: loop already infeasible [2024-11-28 03:26:31,465 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL_NO_AM [2024-11-28 03:26:31,504 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2024-11-28 03:26:31,505 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2024-11-28 03:26:31,508 INFO L87 Difference]: Start difference. First operand has 123 states, 122 states have (on average 1.7459016393442623) internal successors, (213), 122 states have internal predecessors, (213), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 2 states, 2 states have (on average 3.5) internal successors, (7), 2 states have internal predecessors, (7), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 03:26:31,528 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 03:26:31,529 INFO L93 Difference]: Finished difference Result 118 states and 205 transitions. [2024-11-28 03:26:31,530 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 118 states and 205 transitions. [2024-11-28 03:26:31,535 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 70 [2024-11-28 03:26:31,546 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 118 states to 117 states and 204 transitions. [2024-11-28 03:26:31,549 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 117 [2024-11-28 03:26:31,551 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 117 [2024-11-28 03:26:31,554 INFO L73 IsDeterministic]: Start isDeterministic. Operand 117 states and 204 transitions. [2024-11-28 03:26:31,556 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-28 03:26:31,556 INFO L218 hiAutomatonCegarLoop]: Abstraction has 117 states and 204 transitions. [2024-11-28 03:26:31,574 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 117 states and 204 transitions. [2024-11-28 03:26:31,592 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 117 to 117. [2024-11-28 03:26:31,593 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 117 states, 117 states have (on average 1.7435897435897436) internal successors, (204), 116 states have internal predecessors, (204), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 03:26:31,595 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 117 states to 117 states and 204 transitions. [2024-11-28 03:26:31,601 INFO L240 hiAutomatonCegarLoop]: Abstraction has 117 states and 204 transitions. [2024-11-28 03:26:31,601 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-11-28 03:26:31,607 INFO L425 stractBuchiCegarLoop]: Abstraction has 117 states and 204 transitions. [2024-11-28 03:26:31,608 INFO L332 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2024-11-28 03:26:31,608 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 117 states and 204 transitions. [2024-11-28 03:26:31,610 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 70 [2024-11-28 03:26:31,611 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-28 03:26:31,611 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-28 03:26:31,612 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1] [2024-11-28 03:26:31,612 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 03:26:31,612 INFO L747 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(49, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~r1~0 := 0;~p1~0 := 0;~p1_old~0 := 0;~p1_new~0 := 0;~id1~0 := 0;~st1~0 := 0;~send1~0 := 0;~mode1~0 := 0;~alive1~0 := 0;~p2~0 := 0;~p2_old~0 := 0;~p2_new~0 := 0;~id2~0 := 0;~st2~0 := 0;~send2~0 := 0;~mode2~0 := 0;~alive2~0 := 0;~p3~0 := 0;~p3_old~0 := 0;~p3_new~0 := 0;~id3~0 := 0;~st3~0 := 0;~send3~0 := 0;~mode3~0 := 0;~alive3~0 := 0;~p4~0 := 0;~p4_old~0 := 0;~p4_new~0 := 0;~id4~0 := 0;~st4~0 := 0;~send4~0 := 0;~mode4~0 := 0;~alive4~0 := 0;~p5~0 := 0;~p5_old~0 := 0;~p5_new~0 := 0;~id5~0 := 0;~st5~0 := 0;~send5~0 := 0;~mode5~0 := 0;~alive5~0 := 0;~p6~0 := 0;~p6_old~0 := 0;~p6_new~0 := 0;~id6~0 := 0;~st6~0 := 0;~send6~0 := 0;~mode6~0 := 0;~alive6~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~nondet31#1, main_#t~nondet32#1, main_#t~nondet33#1, main_#t~nondet34#1, main_#t~ret35#1, main_#t~ret36#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;havoc main_#t~nondet4#1;~r1~0 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;~id1~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_#t~nondet6#1;~st1~0 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_#t~nondet7#1;~send1~0 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_#t~nondet8#1;assume 0 == main_#t~nondet8#1 || 1 == main_#t~nondet8#1;~mode1~0 := (if 0 == main_#t~nondet8#1 % 256 then 0 else 1);havoc main_#t~nondet8#1;havoc main_#t~nondet9#1;assume 0 == main_#t~nondet9#1 || 1 == main_#t~nondet9#1;~alive1~0 := (if 0 == main_#t~nondet9#1 % 256 then 0 else 1);havoc main_#t~nondet9#1;havoc main_#t~nondet10#1;~id2~0 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_#t~nondet11#1;~st2~0 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_#t~nondet12#1;~send2~0 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_#t~nondet13#1;assume 0 == main_#t~nondet13#1 || 1 == main_#t~nondet13#1;~mode2~0 := (if 0 == main_#t~nondet13#1 % 256 then 0 else 1);havoc main_#t~nondet13#1;havoc main_#t~nondet14#1;assume 0 == main_#t~nondet14#1 || 1 == main_#t~nondet14#1;~alive2~0 := (if 0 == main_#t~nondet14#1 % 256 then 0 else 1);havoc main_#t~nondet14#1;havoc main_#t~nondet15#1;~id3~0 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_#t~nondet16#1;~st3~0 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_#t~nondet17#1;~send3~0 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_#t~nondet18#1;assume 0 == main_#t~nondet18#1 || 1 == main_#t~nondet18#1;~mode3~0 := (if 0 == main_#t~nondet18#1 % 256 then 0 else 1);havoc main_#t~nondet18#1;havoc main_#t~nondet19#1;assume 0 == main_#t~nondet19#1 || 1 == main_#t~nondet19#1;~alive3~0 := (if 0 == main_#t~nondet19#1 % 256 then 0 else 1);havoc main_#t~nondet19#1;havoc main_#t~nondet20#1;~id4~0 := main_#t~nondet20#1;havoc main_#t~nondet20#1;havoc main_#t~nondet21#1;~st4~0 := main_#t~nondet21#1;havoc main_#t~nondet21#1;havoc main_#t~nondet22#1;~send4~0 := main_#t~nondet22#1;havoc main_#t~nondet22#1;havoc main_#t~nondet23#1;assume 0 == main_#t~nondet23#1 || 1 == main_#t~nondet23#1;~mode4~0 := (if 0 == main_#t~nondet23#1 % 256 then 0 else 1);havoc main_#t~nondet23#1;havoc main_#t~nondet24#1;assume 0 == main_#t~nondet24#1 || 1 == main_#t~nondet24#1;~alive4~0 := (if 0 == main_#t~nondet24#1 % 256 then 0 else 1);havoc main_#t~nondet24#1;havoc main_#t~nondet25#1;~id5~0 := main_#t~nondet25#1;havoc main_#t~nondet25#1;havoc main_#t~nondet26#1;~st5~0 := main_#t~nondet26#1;havoc main_#t~nondet26#1;havoc main_#t~nondet27#1;~send5~0 := main_#t~nondet27#1;havoc main_#t~nondet27#1;havoc main_#t~nondet28#1;assume 0 == main_#t~nondet28#1 || 1 == main_#t~nondet28#1;~mode5~0 := (if 0 == main_#t~nondet28#1 % 256 then 0 else 1);havoc main_#t~nondet28#1;havoc main_#t~nondet29#1;assume 0 == main_#t~nondet29#1 || 1 == main_#t~nondet29#1;~alive5~0 := (if 0 == main_#t~nondet29#1 % 256 then 0 else 1);havoc main_#t~nondet29#1;havoc main_#t~nondet30#1;~id6~0 := main_#t~nondet30#1;havoc main_#t~nondet30#1;havoc main_#t~nondet31#1;~st6~0 := main_#t~nondet31#1;havoc main_#t~nondet31#1;havoc main_#t~nondet32#1;~send6~0 := main_#t~nondet32#1;havoc main_#t~nondet32#1;havoc main_#t~nondet33#1;assume 0 == main_#t~nondet33#1 || 1 == main_#t~nondet33#1;~mode6~0 := (if 0 == main_#t~nondet33#1 % 256 then 0 else 1);havoc main_#t~nondet33#1;havoc main_#t~nondet34#1;assume 0 == main_#t~nondet34#1 || 1 == main_#t~nondet34#1;~alive6~0 := (if 0 == main_#t~nondet34#1 % 256 then 0 else 1);havoc main_#t~nondet34#1;assume { :begin_inline_init } true;havoc init_#res#1;havoc init_~tmp~0#1;havoc init_~tmp~0#1;" "assume !(0 == (if ~r1~0 % 256 % 4294967296 <= 2147483647 then ~r1~0 % 256 % 4294967296 else ~r1~0 % 256 % 4294967296 - 4294967296));init_~tmp~0#1 := 0;" "init_#res#1 := init_~tmp~0#1;" "main_#t~ret35#1 := init_#res#1;havoc init_~tmp~0#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret35#1;havoc main_#t~ret35#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1;" "assume !(0 == assume_abort_if_not_~cond#1);" "havoc assume_abort_if_not_~cond#1;havoc assume_abort_if_not_#in~cond#1;assume { :end_inline_assume_abort_if_not } true;~p1_old~0 := ~nomsg~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~nomsg~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~nomsg~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~nomsg~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~nomsg~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~nomsg~0;~p6_new~0 := ~nomsg~0;main_~i2~0#1 := 0;" [2024-11-28 03:26:31,613 INFO L749 eck$LassoCheckResult]: Loop: "assume { :begin_inline_node1 } true;havoc node1_~m1~0#1;havoc node1_~m1~0#1;node1_~m1~0#1 := ~nomsg~0;" "assume !(0 != ~mode1~0 % 256);" "assume 0 != ~alive1~0 % 256;~p1_new~0 := (if (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 <= 127 then (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 else (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 - 256);" "~mode1~0 := 1;" "havoc node1_~m1~0#1;assume { :end_inline_node1 } true;assume { :begin_inline_node2 } true;havoc node2_~m2~0#1;havoc node2_~m2~0#1;node2_~m2~0#1 := ~nomsg~0;" "assume 0 != ~mode2~0 % 256;node2_~m2~0#1 := ~p1_old~0;~p1_old~0 := ~nomsg~0;" "assume !(node2_~m2~0#1 != ~nomsg~0);" "~mode2~0 := 0;" "havoc node2_~m2~0#1;assume { :end_inline_node2 } true;assume { :begin_inline_node3 } true;havoc node3_~m3~0#1;havoc node3_~m3~0#1;node3_~m3~0#1 := ~nomsg~0;" "assume !(0 != ~mode3~0 % 256);" "assume 0 != ~alive3~0 % 256;~p3_new~0 := (if (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 <= 127 then (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 else (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 - 256);" "~mode3~0 := 1;" "havoc node3_~m3~0#1;assume { :end_inline_node3 } true;assume { :begin_inline_node4 } true;havoc node4_~m4~0#1;havoc node4_~m4~0#1;node4_~m4~0#1 := ~nomsg~0;" "assume !(0 != ~mode4~0 % 256);" "assume 0 != ~alive4~0 % 256;~p4_new~0 := (if (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 <= 127 then (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 else (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 - 256);" "~mode4~0 := 1;" "havoc node4_~m4~0#1;assume { :end_inline_node4 } true;assume { :begin_inline_node5 } true;havoc node5_~m5~0#1;havoc node5_~m5~0#1;node5_~m5~0#1 := ~nomsg~0;" "assume 0 != ~mode5~0 % 256;node5_~m5~0#1 := ~p4_old~0;~p4_old~0 := ~nomsg~0;" "assume !(node5_~m5~0#1 != ~nomsg~0);" "~mode5~0 := 0;" "havoc node5_~m5~0#1;assume { :end_inline_node5 } true;assume { :begin_inline_node6 } true;havoc node6_~m6~0#1;havoc node6_~m6~0#1;node6_~m6~0#1 := ~nomsg~0;" "assume 0 != ~mode6~0 % 256;node6_~m6~0#1 := ~p5_old~0;~p5_old~0 := ~nomsg~0;" "assume !(node6_~m6~0#1 != ~nomsg~0);" "~mode6~0 := 0;" "havoc node6_~m6~0#1;assume { :end_inline_node6 } true;~p1_old~0 := ~p1_new~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~p2_new~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~p3_new~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~p4_new~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~p5_new~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~p6_new~0;~p6_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_~tmp~1#1;havoc check_~tmp~1#1;" "assume !(~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0 + ~st6~0 <= 1);check_~tmp~1#1 := 0;" "check_#res#1 := check_~tmp~1#1;" "main_#t~ret36#1 := check_#res#1;havoc check_~tmp~1#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret36#1;havoc main_#t~ret36#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1;" "assume !(0 == assert_~arg#1 % 256);" "havoc assert_~arg#1;havoc assert_#in~arg#1;assume { :end_inline_assert } true;" [2024-11-28 03:26:31,613 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 03:26:31,614 INFO L85 PathProgramCache]: Analyzing trace with hash 2035845688, now seen corresponding path program 1 times [2024-11-28 03:26:31,614 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM [2024-11-28 03:26:31,614 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2131618055] [2024-11-28 03:26:31,614 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 03:26:31,614 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 03:26:31,648 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 03:26:31,837 INFO L136 FreeRefinementEngine]: Strategy CAMEL_NO_AM found an infeasible trace [2024-11-28 03:26:31,837 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2131618055] [2024-11-28 03:26:31,837 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2131618055] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-28 03:26:31,837 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [840044848] [2024-11-28 03:26:31,837 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 03:26:31,837 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-28 03:26:31,837 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_468e79eb-6d55-4a0d-b086-3c03e269e5f0/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 03:26:31,840 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_468e79eb-6d55-4a0d-b086-3c03e269e5f0/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-28 03:26:31,845 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_468e79eb-6d55-4a0d-b086-3c03e269e5f0/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2024-11-28 03:26:31,998 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 03:26:32,000 INFO L256 TraceCheckSpWp]: Trace formula consists of 197 conjuncts, 11 conjuncts are in the unsatisfiable core [2024-11-28 03:26:32,003 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-28 03:26:32,021 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-28 03:26:32,038 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [840044848] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-28 03:26:32,038 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-28 03:26:32,038 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5, 5] total 5 [2024-11-28 03:26:32,038 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [932031033] [2024-11-28 03:26:32,038 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-28 03:26:32,039 INFO L752 eck$LassoCheckResult]: stem already infeasible [2024-11-28 03:26:32,039 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 03:26:32,043 INFO L85 PathProgramCache]: Analyzing trace with hash 503354557, now seen corresponding path program 1 times [2024-11-28 03:26:32,043 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM [2024-11-28 03:26:32,044 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [355772009] [2024-11-28 03:26:32,044 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 03:26:32,044 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 03:26:32,088 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 03:26:32,337 INFO L136 FreeRefinementEngine]: Strategy CAMEL_NO_AM found an infeasible trace [2024-11-28 03:26:32,337 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [355772009] [2024-11-28 03:26:32,338 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [355772009] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-28 03:26:32,338 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1258415930] [2024-11-28 03:26:32,338 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 03:26:32,338 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-28 03:26:32,338 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_468e79eb-6d55-4a0d-b086-3c03e269e5f0/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 03:26:32,343 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_468e79eb-6d55-4a0d-b086-3c03e269e5f0/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-28 03:26:32,345 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_468e79eb-6d55-4a0d-b086-3c03e269e5f0/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2024-11-28 03:26:32,453 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 03:26:32,458 INFO L256 TraceCheckSpWp]: Trace formula consists of 99 conjuncts, 11 conjuncts are in the unsatisfiable core [2024-11-28 03:26:32,460 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-28 03:26:32,488 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-28 03:26:32,571 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1258415930] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-28 03:26:32,571 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-28 03:26:32,572 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5, 5] total 7 [2024-11-28 03:26:32,572 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1527169923] [2024-11-28 03:26:32,572 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-28 03:26:32,572 INFO L764 eck$LassoCheckResult]: loop already infeasible [2024-11-28 03:26:32,572 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL_NO_AM [2024-11-28 03:26:32,573 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-28 03:26:32,573 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-11-28 03:26:32,574 INFO L87 Difference]: Start difference. First operand 117 states and 204 transitions. cyclomatic complexity: 88 Second operand has 5 states, 5 states have (on average 1.4) internal successors, (7), 5 states have internal predecessors, (7), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 03:26:32,730 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 03:26:32,730 INFO L93 Difference]: Finished difference Result 120 states and 206 transitions. [2024-11-28 03:26:32,730 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 120 states and 206 transitions. [2024-11-28 03:26:32,736 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 70 [2024-11-28 03:26:32,742 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 120 states to 117 states and 163 transitions. [2024-11-28 03:26:32,742 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 117 [2024-11-28 03:26:32,743 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 117 [2024-11-28 03:26:32,743 INFO L73 IsDeterministic]: Start isDeterministic. Operand 117 states and 163 transitions. [2024-11-28 03:26:32,744 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-28 03:26:32,744 INFO L218 hiAutomatonCegarLoop]: Abstraction has 117 states and 163 transitions. [2024-11-28 03:26:32,744 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 117 states and 163 transitions. [2024-11-28 03:26:32,751 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 117 to 117. [2024-11-28 03:26:32,754 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 117 states, 117 states have (on average 1.393162393162393) internal successors, (163), 116 states have internal predecessors, (163), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 03:26:32,755 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 117 states to 117 states and 163 transitions. [2024-11-28 03:26:32,759 INFO L240 hiAutomatonCegarLoop]: Abstraction has 117 states and 163 transitions. [2024-11-28 03:26:32,762 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-11-28 03:26:32,764 INFO L425 stractBuchiCegarLoop]: Abstraction has 117 states and 163 transitions. [2024-11-28 03:26:32,765 INFO L332 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2024-11-28 03:26:32,766 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 117 states and 163 transitions. [2024-11-28 03:26:32,767 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 70 [2024-11-28 03:26:32,768 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-28 03:26:32,768 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-28 03:26:32,769 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 03:26:32,770 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 03:26:32,770 INFO L747 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(49, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~r1~0 := 0;~p1~0 := 0;~p1_old~0 := 0;~p1_new~0 := 0;~id1~0 := 0;~st1~0 := 0;~send1~0 := 0;~mode1~0 := 0;~alive1~0 := 0;~p2~0 := 0;~p2_old~0 := 0;~p2_new~0 := 0;~id2~0 := 0;~st2~0 := 0;~send2~0 := 0;~mode2~0 := 0;~alive2~0 := 0;~p3~0 := 0;~p3_old~0 := 0;~p3_new~0 := 0;~id3~0 := 0;~st3~0 := 0;~send3~0 := 0;~mode3~0 := 0;~alive3~0 := 0;~p4~0 := 0;~p4_old~0 := 0;~p4_new~0 := 0;~id4~0 := 0;~st4~0 := 0;~send4~0 := 0;~mode4~0 := 0;~alive4~0 := 0;~p5~0 := 0;~p5_old~0 := 0;~p5_new~0 := 0;~id5~0 := 0;~st5~0 := 0;~send5~0 := 0;~mode5~0 := 0;~alive5~0 := 0;~p6~0 := 0;~p6_old~0 := 0;~p6_new~0 := 0;~id6~0 := 0;~st6~0 := 0;~send6~0 := 0;~mode6~0 := 0;~alive6~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~nondet31#1, main_#t~nondet32#1, main_#t~nondet33#1, main_#t~nondet34#1, main_#t~ret35#1, main_#t~ret36#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;havoc main_#t~nondet4#1;~r1~0 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;~id1~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_#t~nondet6#1;~st1~0 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_#t~nondet7#1;~send1~0 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_#t~nondet8#1;assume 0 == main_#t~nondet8#1 || 1 == main_#t~nondet8#1;~mode1~0 := (if 0 == main_#t~nondet8#1 % 256 then 0 else 1);havoc main_#t~nondet8#1;havoc main_#t~nondet9#1;assume 0 == main_#t~nondet9#1 || 1 == main_#t~nondet9#1;~alive1~0 := (if 0 == main_#t~nondet9#1 % 256 then 0 else 1);havoc main_#t~nondet9#1;havoc main_#t~nondet10#1;~id2~0 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_#t~nondet11#1;~st2~0 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_#t~nondet12#1;~send2~0 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_#t~nondet13#1;assume 0 == main_#t~nondet13#1 || 1 == main_#t~nondet13#1;~mode2~0 := (if 0 == main_#t~nondet13#1 % 256 then 0 else 1);havoc main_#t~nondet13#1;havoc main_#t~nondet14#1;assume 0 == main_#t~nondet14#1 || 1 == main_#t~nondet14#1;~alive2~0 := (if 0 == main_#t~nondet14#1 % 256 then 0 else 1);havoc main_#t~nondet14#1;havoc main_#t~nondet15#1;~id3~0 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_#t~nondet16#1;~st3~0 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_#t~nondet17#1;~send3~0 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_#t~nondet18#1;assume 0 == main_#t~nondet18#1 || 1 == main_#t~nondet18#1;~mode3~0 := (if 0 == main_#t~nondet18#1 % 256 then 0 else 1);havoc main_#t~nondet18#1;havoc main_#t~nondet19#1;assume 0 == main_#t~nondet19#1 || 1 == main_#t~nondet19#1;~alive3~0 := (if 0 == main_#t~nondet19#1 % 256 then 0 else 1);havoc main_#t~nondet19#1;havoc main_#t~nondet20#1;~id4~0 := main_#t~nondet20#1;havoc main_#t~nondet20#1;havoc main_#t~nondet21#1;~st4~0 := main_#t~nondet21#1;havoc main_#t~nondet21#1;havoc main_#t~nondet22#1;~send4~0 := main_#t~nondet22#1;havoc main_#t~nondet22#1;havoc main_#t~nondet23#1;assume 0 == main_#t~nondet23#1 || 1 == main_#t~nondet23#1;~mode4~0 := (if 0 == main_#t~nondet23#1 % 256 then 0 else 1);havoc main_#t~nondet23#1;havoc main_#t~nondet24#1;assume 0 == main_#t~nondet24#1 || 1 == main_#t~nondet24#1;~alive4~0 := (if 0 == main_#t~nondet24#1 % 256 then 0 else 1);havoc main_#t~nondet24#1;havoc main_#t~nondet25#1;~id5~0 := main_#t~nondet25#1;havoc main_#t~nondet25#1;havoc main_#t~nondet26#1;~st5~0 := main_#t~nondet26#1;havoc main_#t~nondet26#1;havoc main_#t~nondet27#1;~send5~0 := main_#t~nondet27#1;havoc main_#t~nondet27#1;havoc main_#t~nondet28#1;assume 0 == main_#t~nondet28#1 || 1 == main_#t~nondet28#1;~mode5~0 := (if 0 == main_#t~nondet28#1 % 256 then 0 else 1);havoc main_#t~nondet28#1;havoc main_#t~nondet29#1;assume 0 == main_#t~nondet29#1 || 1 == main_#t~nondet29#1;~alive5~0 := (if 0 == main_#t~nondet29#1 % 256 then 0 else 1);havoc main_#t~nondet29#1;havoc main_#t~nondet30#1;~id6~0 := main_#t~nondet30#1;havoc main_#t~nondet30#1;havoc main_#t~nondet31#1;~st6~0 := main_#t~nondet31#1;havoc main_#t~nondet31#1;havoc main_#t~nondet32#1;~send6~0 := main_#t~nondet32#1;havoc main_#t~nondet32#1;havoc main_#t~nondet33#1;assume 0 == main_#t~nondet33#1 || 1 == main_#t~nondet33#1;~mode6~0 := (if 0 == main_#t~nondet33#1 % 256 then 0 else 1);havoc main_#t~nondet33#1;havoc main_#t~nondet34#1;assume 0 == main_#t~nondet34#1 || 1 == main_#t~nondet34#1;~alive6~0 := (if 0 == main_#t~nondet34#1 % 256 then 0 else 1);havoc main_#t~nondet34#1;assume { :begin_inline_init } true;havoc init_#res#1;havoc init_~tmp~0#1;havoc init_~tmp~0#1;" "assume 0 == (if ~r1~0 % 256 % 4294967296 <= 2147483647 then ~r1~0 % 256 % 4294967296 else ~r1~0 % 256 % 4294967296 - 4294967296);" "assume (if ~alive1~0 % 256 % 4294967296 <= 2147483647 then ~alive1~0 % 256 % 4294967296 else ~alive1~0 % 256 % 4294967296 - 4294967296) + (if ~alive2~0 % 256 % 4294967296 <= 2147483647 then ~alive2~0 % 256 % 4294967296 else ~alive2~0 % 256 % 4294967296 - 4294967296) + (if ~alive3~0 % 256 % 4294967296 <= 2147483647 then ~alive3~0 % 256 % 4294967296 else ~alive3~0 % 256 % 4294967296 - 4294967296) + (if ~alive4~0 % 256 % 4294967296 <= 2147483647 then ~alive4~0 % 256 % 4294967296 else ~alive4~0 % 256 % 4294967296 - 4294967296) + (if ~alive5~0 % 256 % 4294967296 <= 2147483647 then ~alive5~0 % 256 % 4294967296 else ~alive5~0 % 256 % 4294967296 - 4294967296) + (if ~alive6~0 % 256 % 4294967296 <= 2147483647 then ~alive6~0 % 256 % 4294967296 else ~alive6~0 % 256 % 4294967296 - 4294967296) >= 1;" "assume ~id1~0 >= 0;" "assume 0 == ~st1~0;" "assume ~send1~0 == ~id1~0;" "assume 0 == (if ~mode1~0 % 256 % 4294967296 <= 2147483647 then ~mode1~0 % 256 % 4294967296 else ~mode1~0 % 256 % 4294967296 - 4294967296);" "assume ~id2~0 >= 0;" "assume 0 == ~st2~0;" "assume ~send2~0 == ~id2~0;" "assume 0 == (if ~mode2~0 % 256 % 4294967296 <= 2147483647 then ~mode2~0 % 256 % 4294967296 else ~mode2~0 % 256 % 4294967296 - 4294967296);" "assume ~id3~0 >= 0;" "assume 0 == ~st3~0;" "assume ~send3~0 == ~id3~0;" "assume 0 == (if ~mode3~0 % 256 % 4294967296 <= 2147483647 then ~mode3~0 % 256 % 4294967296 else ~mode3~0 % 256 % 4294967296 - 4294967296);" "assume ~id4~0 >= 0;" "assume 0 == ~st4~0;" "assume ~send4~0 == ~id4~0;" "assume 0 == (if ~mode4~0 % 256 % 4294967296 <= 2147483647 then ~mode4~0 % 256 % 4294967296 else ~mode4~0 % 256 % 4294967296 - 4294967296);" "assume ~id5~0 >= 0;" "assume 0 == ~st5~0;" "assume ~send5~0 == ~id5~0;" "assume 0 == (if ~mode5~0 % 256 % 4294967296 <= 2147483647 then ~mode5~0 % 256 % 4294967296 else ~mode5~0 % 256 % 4294967296 - 4294967296);" "assume ~id6~0 >= 0;" "assume 0 == ~st6~0;" "assume ~send6~0 == ~id6~0;" "assume 0 == (if ~mode6~0 % 256 % 4294967296 <= 2147483647 then ~mode6~0 % 256 % 4294967296 else ~mode6~0 % 256 % 4294967296 - 4294967296);" "assume ~id1~0 != ~id2~0;" "assume ~id1~0 != ~id3~0;" "assume ~id1~0 != ~id4~0;" "assume ~id1~0 != ~id5~0;" "assume ~id1~0 != ~id6~0;" "assume ~id2~0 != ~id3~0;" "assume ~id2~0 != ~id4~0;" "assume ~id2~0 != ~id5~0;" "assume ~id2~0 != ~id6~0;" "assume ~id3~0 != ~id4~0;" "assume ~id3~0 != ~id5~0;" "assume ~id3~0 != ~id6~0;" "assume ~id4~0 != ~id5~0;" "assume ~id4~0 != ~id6~0;" "assume ~id5~0 != ~id6~0;init_~tmp~0#1 := 1;" "init_#res#1 := init_~tmp~0#1;" "main_#t~ret35#1 := init_#res#1;havoc init_~tmp~0#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret35#1;havoc main_#t~ret35#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1;" "assume !(0 == assume_abort_if_not_~cond#1);" "havoc assume_abort_if_not_~cond#1;havoc assume_abort_if_not_#in~cond#1;assume { :end_inline_assume_abort_if_not } true;~p1_old~0 := ~nomsg~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~nomsg~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~nomsg~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~nomsg~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~nomsg~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~nomsg~0;~p6_new~0 := ~nomsg~0;main_~i2~0#1 := 0;" [2024-11-28 03:26:32,770 INFO L749 eck$LassoCheckResult]: Loop: "assume { :begin_inline_node1 } true;havoc node1_~m1~0#1;havoc node1_~m1~0#1;node1_~m1~0#1 := ~nomsg~0;" "assume !(0 != ~mode1~0 % 256);" "assume 0 != ~alive1~0 % 256;~p1_new~0 := (if (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 <= 127 then (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 else (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 - 256);" "~mode1~0 := 1;" "havoc node1_~m1~0#1;assume { :end_inline_node1 } true;assume { :begin_inline_node2 } true;havoc node2_~m2~0#1;havoc node2_~m2~0#1;node2_~m2~0#1 := ~nomsg~0;" "assume !(0 != ~mode2~0 % 256);" "assume 0 != ~alive2~0 % 256;~p2_new~0 := (if (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 <= 127 then (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 else (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 - 256);" "~mode2~0 := 1;" "havoc node2_~m2~0#1;assume { :end_inline_node2 } true;assume { :begin_inline_node3 } true;havoc node3_~m3~0#1;havoc node3_~m3~0#1;node3_~m3~0#1 := ~nomsg~0;" "assume !(0 != ~mode3~0 % 256);" "assume 0 != ~alive3~0 % 256;~p3_new~0 := (if (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 <= 127 then (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 else (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 - 256);" "~mode3~0 := 1;" "havoc node3_~m3~0#1;assume { :end_inline_node3 } true;assume { :begin_inline_node4 } true;havoc node4_~m4~0#1;havoc node4_~m4~0#1;node4_~m4~0#1 := ~nomsg~0;" "assume !(0 != ~mode4~0 % 256);" "assume 0 != ~alive4~0 % 256;~p4_new~0 := (if (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 <= 127 then (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 else (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 - 256);" "~mode4~0 := 1;" "havoc node4_~m4~0#1;assume { :end_inline_node4 } true;assume { :begin_inline_node5 } true;havoc node5_~m5~0#1;havoc node5_~m5~0#1;node5_~m5~0#1 := ~nomsg~0;" "assume !(0 != ~mode5~0 % 256);" "assume 0 != ~alive5~0 % 256;~p5_new~0 := (if (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 <= 127 then (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 else (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 - 256);" "~mode5~0 := 1;" "havoc node5_~m5~0#1;assume { :end_inline_node5 } true;assume { :begin_inline_node6 } true;havoc node6_~m6~0#1;havoc node6_~m6~0#1;node6_~m6~0#1 := ~nomsg~0;" "assume 0 != ~mode6~0 % 256;node6_~m6~0#1 := ~p5_old~0;~p5_old~0 := ~nomsg~0;" "assume !(node6_~m6~0#1 != ~nomsg~0);" "~mode6~0 := 0;" "havoc node6_~m6~0#1;assume { :end_inline_node6 } true;~p1_old~0 := ~p1_new~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~p2_new~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~p3_new~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~p4_new~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~p5_new~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~p6_new~0;~p6_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_~tmp~1#1;havoc check_~tmp~1#1;" "assume !(~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0 + ~st6~0 <= 1);check_~tmp~1#1 := 0;" "check_#res#1 := check_~tmp~1#1;" "main_#t~ret36#1 := check_#res#1;havoc check_~tmp~1#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret36#1;havoc main_#t~ret36#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1;" "assume !(0 == assert_~arg#1 % 256);" "havoc assert_~arg#1;havoc assert_#in~arg#1;assume { :end_inline_assert } true;" [2024-11-28 03:26:32,771 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 03:26:32,775 INFO L85 PathProgramCache]: Analyzing trace with hash -1766357374, now seen corresponding path program 1 times [2024-11-28 03:26:32,776 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM [2024-11-28 03:26:32,776 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1471522435] [2024-11-28 03:26:32,777 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 03:26:32,777 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 03:26:32,839 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-28 03:26:32,840 INFO L357 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-28 03:26:32,944 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-28 03:26:32,998 INFO L130 FreeRefinementEngine]: Strategy CAMEL_NO_AM found a feasible trace [2024-11-28 03:26:32,999 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 03:26:32,999 INFO L85 PathProgramCache]: Analyzing trace with hash 290825663, now seen corresponding path program 1 times [2024-11-28 03:26:32,999 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM [2024-11-28 03:26:32,999 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [263573798] [2024-11-28 03:26:32,999 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 03:26:33,000 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 03:26:33,049 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 03:26:33,344 INFO L136 FreeRefinementEngine]: Strategy CAMEL_NO_AM found an infeasible trace [2024-11-28 03:26:33,344 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [263573798] [2024-11-28 03:26:33,344 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [263573798] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-28 03:26:33,344 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2062476313] [2024-11-28 03:26:33,344 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 03:26:33,346 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-28 03:26:33,346 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_468e79eb-6d55-4a0d-b086-3c03e269e5f0/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 03:26:33,351 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_468e79eb-6d55-4a0d-b086-3c03e269e5f0/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-28 03:26:33,354 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_468e79eb-6d55-4a0d-b086-3c03e269e5f0/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2024-11-28 03:26:33,475 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 03:26:33,476 INFO L256 TraceCheckSpWp]: Trace formula consists of 95 conjuncts, 11 conjuncts are in the unsatisfiable core [2024-11-28 03:26:33,478 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-28 03:26:33,500 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-28 03:26:33,566 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2062476313] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-28 03:26:33,566 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-28 03:26:33,566 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5, 5] total 7 [2024-11-28 03:26:33,566 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1935086238] [2024-11-28 03:26:33,566 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-28 03:26:33,567 INFO L764 eck$LassoCheckResult]: loop already infeasible [2024-11-28 03:26:33,567 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL_NO_AM [2024-11-28 03:26:33,571 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-11-28 03:26:33,571 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=28, Unknown=0, NotChecked=0, Total=42 [2024-11-28 03:26:33,571 INFO L87 Difference]: Start difference. First operand 117 states and 163 transitions. cyclomatic complexity: 47 Second operand has 7 states, 7 states have (on average 4.857142857142857) internal successors, (34), 7 states have internal predecessors, (34), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 03:26:33,621 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 03:26:33,622 INFO L93 Difference]: Finished difference Result 120 states and 165 transitions. [2024-11-28 03:26:33,622 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 120 states and 165 transitions. [2024-11-28 03:26:33,624 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 70 [2024-11-28 03:26:33,625 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 120 states to 117 states and 161 transitions. [2024-11-28 03:26:33,625 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 117 [2024-11-28 03:26:33,626 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 117 [2024-11-28 03:26:33,627 INFO L73 IsDeterministic]: Start isDeterministic. Operand 117 states and 161 transitions. [2024-11-28 03:26:33,628 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-28 03:26:33,630 INFO L218 hiAutomatonCegarLoop]: Abstraction has 117 states and 161 transitions. [2024-11-28 03:26:33,630 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 117 states and 161 transitions. [2024-11-28 03:26:33,638 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 117 to 117. [2024-11-28 03:26:33,641 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 117 states, 117 states have (on average 1.376068376068376) internal successors, (161), 116 states have internal predecessors, (161), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 03:26:33,642 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 117 states to 117 states and 161 transitions. [2024-11-28 03:26:33,642 INFO L240 hiAutomatonCegarLoop]: Abstraction has 117 states and 161 transitions. [2024-11-28 03:26:33,644 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-11-28 03:26:33,645 INFO L425 stractBuchiCegarLoop]: Abstraction has 117 states and 161 transitions. [2024-11-28 03:26:33,645 INFO L332 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2024-11-28 03:26:33,645 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 117 states and 161 transitions. [2024-11-28 03:26:33,647 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 70 [2024-11-28 03:26:33,648 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-28 03:26:33,648 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-28 03:26:33,651 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 03:26:33,651 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 03:26:33,652 INFO L747 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(49, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~r1~0 := 0;~p1~0 := 0;~p1_old~0 := 0;~p1_new~0 := 0;~id1~0 := 0;~st1~0 := 0;~send1~0 := 0;~mode1~0 := 0;~alive1~0 := 0;~p2~0 := 0;~p2_old~0 := 0;~p2_new~0 := 0;~id2~0 := 0;~st2~0 := 0;~send2~0 := 0;~mode2~0 := 0;~alive2~0 := 0;~p3~0 := 0;~p3_old~0 := 0;~p3_new~0 := 0;~id3~0 := 0;~st3~0 := 0;~send3~0 := 0;~mode3~0 := 0;~alive3~0 := 0;~p4~0 := 0;~p4_old~0 := 0;~p4_new~0 := 0;~id4~0 := 0;~st4~0 := 0;~send4~0 := 0;~mode4~0 := 0;~alive4~0 := 0;~p5~0 := 0;~p5_old~0 := 0;~p5_new~0 := 0;~id5~0 := 0;~st5~0 := 0;~send5~0 := 0;~mode5~0 := 0;~alive5~0 := 0;~p6~0 := 0;~p6_old~0 := 0;~p6_new~0 := 0;~id6~0 := 0;~st6~0 := 0;~send6~0 := 0;~mode6~0 := 0;~alive6~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~nondet31#1, main_#t~nondet32#1, main_#t~nondet33#1, main_#t~nondet34#1, main_#t~ret35#1, main_#t~ret36#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;havoc main_#t~nondet4#1;~r1~0 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;~id1~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_#t~nondet6#1;~st1~0 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_#t~nondet7#1;~send1~0 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_#t~nondet8#1;assume 0 == main_#t~nondet8#1 || 1 == main_#t~nondet8#1;~mode1~0 := (if 0 == main_#t~nondet8#1 % 256 then 0 else 1);havoc main_#t~nondet8#1;havoc main_#t~nondet9#1;assume 0 == main_#t~nondet9#1 || 1 == main_#t~nondet9#1;~alive1~0 := (if 0 == main_#t~nondet9#1 % 256 then 0 else 1);havoc main_#t~nondet9#1;havoc main_#t~nondet10#1;~id2~0 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_#t~nondet11#1;~st2~0 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_#t~nondet12#1;~send2~0 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_#t~nondet13#1;assume 0 == main_#t~nondet13#1 || 1 == main_#t~nondet13#1;~mode2~0 := (if 0 == main_#t~nondet13#1 % 256 then 0 else 1);havoc main_#t~nondet13#1;havoc main_#t~nondet14#1;assume 0 == main_#t~nondet14#1 || 1 == main_#t~nondet14#1;~alive2~0 := (if 0 == main_#t~nondet14#1 % 256 then 0 else 1);havoc main_#t~nondet14#1;havoc main_#t~nondet15#1;~id3~0 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_#t~nondet16#1;~st3~0 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_#t~nondet17#1;~send3~0 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_#t~nondet18#1;assume 0 == main_#t~nondet18#1 || 1 == main_#t~nondet18#1;~mode3~0 := (if 0 == main_#t~nondet18#1 % 256 then 0 else 1);havoc main_#t~nondet18#1;havoc main_#t~nondet19#1;assume 0 == main_#t~nondet19#1 || 1 == main_#t~nondet19#1;~alive3~0 := (if 0 == main_#t~nondet19#1 % 256 then 0 else 1);havoc main_#t~nondet19#1;havoc main_#t~nondet20#1;~id4~0 := main_#t~nondet20#1;havoc main_#t~nondet20#1;havoc main_#t~nondet21#1;~st4~0 := main_#t~nondet21#1;havoc main_#t~nondet21#1;havoc main_#t~nondet22#1;~send4~0 := main_#t~nondet22#1;havoc main_#t~nondet22#1;havoc main_#t~nondet23#1;assume 0 == main_#t~nondet23#1 || 1 == main_#t~nondet23#1;~mode4~0 := (if 0 == main_#t~nondet23#1 % 256 then 0 else 1);havoc main_#t~nondet23#1;havoc main_#t~nondet24#1;assume 0 == main_#t~nondet24#1 || 1 == main_#t~nondet24#1;~alive4~0 := (if 0 == main_#t~nondet24#1 % 256 then 0 else 1);havoc main_#t~nondet24#1;havoc main_#t~nondet25#1;~id5~0 := main_#t~nondet25#1;havoc main_#t~nondet25#1;havoc main_#t~nondet26#1;~st5~0 := main_#t~nondet26#1;havoc main_#t~nondet26#1;havoc main_#t~nondet27#1;~send5~0 := main_#t~nondet27#1;havoc main_#t~nondet27#1;havoc main_#t~nondet28#1;assume 0 == main_#t~nondet28#1 || 1 == main_#t~nondet28#1;~mode5~0 := (if 0 == main_#t~nondet28#1 % 256 then 0 else 1);havoc main_#t~nondet28#1;havoc main_#t~nondet29#1;assume 0 == main_#t~nondet29#1 || 1 == main_#t~nondet29#1;~alive5~0 := (if 0 == main_#t~nondet29#1 % 256 then 0 else 1);havoc main_#t~nondet29#1;havoc main_#t~nondet30#1;~id6~0 := main_#t~nondet30#1;havoc main_#t~nondet30#1;havoc main_#t~nondet31#1;~st6~0 := main_#t~nondet31#1;havoc main_#t~nondet31#1;havoc main_#t~nondet32#1;~send6~0 := main_#t~nondet32#1;havoc main_#t~nondet32#1;havoc main_#t~nondet33#1;assume 0 == main_#t~nondet33#1 || 1 == main_#t~nondet33#1;~mode6~0 := (if 0 == main_#t~nondet33#1 % 256 then 0 else 1);havoc main_#t~nondet33#1;havoc main_#t~nondet34#1;assume 0 == main_#t~nondet34#1 || 1 == main_#t~nondet34#1;~alive6~0 := (if 0 == main_#t~nondet34#1 % 256 then 0 else 1);havoc main_#t~nondet34#1;assume { :begin_inline_init } true;havoc init_#res#1;havoc init_~tmp~0#1;havoc init_~tmp~0#1;" "assume 0 == (if ~r1~0 % 256 % 4294967296 <= 2147483647 then ~r1~0 % 256 % 4294967296 else ~r1~0 % 256 % 4294967296 - 4294967296);" "assume (if ~alive1~0 % 256 % 4294967296 <= 2147483647 then ~alive1~0 % 256 % 4294967296 else ~alive1~0 % 256 % 4294967296 - 4294967296) + (if ~alive2~0 % 256 % 4294967296 <= 2147483647 then ~alive2~0 % 256 % 4294967296 else ~alive2~0 % 256 % 4294967296 - 4294967296) + (if ~alive3~0 % 256 % 4294967296 <= 2147483647 then ~alive3~0 % 256 % 4294967296 else ~alive3~0 % 256 % 4294967296 - 4294967296) + (if ~alive4~0 % 256 % 4294967296 <= 2147483647 then ~alive4~0 % 256 % 4294967296 else ~alive4~0 % 256 % 4294967296 - 4294967296) + (if ~alive5~0 % 256 % 4294967296 <= 2147483647 then ~alive5~0 % 256 % 4294967296 else ~alive5~0 % 256 % 4294967296 - 4294967296) + (if ~alive6~0 % 256 % 4294967296 <= 2147483647 then ~alive6~0 % 256 % 4294967296 else ~alive6~0 % 256 % 4294967296 - 4294967296) >= 1;" "assume ~id1~0 >= 0;" "assume 0 == ~st1~0;" "assume ~send1~0 == ~id1~0;" "assume 0 == (if ~mode1~0 % 256 % 4294967296 <= 2147483647 then ~mode1~0 % 256 % 4294967296 else ~mode1~0 % 256 % 4294967296 - 4294967296);" "assume ~id2~0 >= 0;" "assume 0 == ~st2~0;" "assume ~send2~0 == ~id2~0;" "assume 0 == (if ~mode2~0 % 256 % 4294967296 <= 2147483647 then ~mode2~0 % 256 % 4294967296 else ~mode2~0 % 256 % 4294967296 - 4294967296);" "assume ~id3~0 >= 0;" "assume 0 == ~st3~0;" "assume ~send3~0 == ~id3~0;" "assume 0 == (if ~mode3~0 % 256 % 4294967296 <= 2147483647 then ~mode3~0 % 256 % 4294967296 else ~mode3~0 % 256 % 4294967296 - 4294967296);" "assume ~id4~0 >= 0;" "assume 0 == ~st4~0;" "assume ~send4~0 == ~id4~0;" "assume 0 == (if ~mode4~0 % 256 % 4294967296 <= 2147483647 then ~mode4~0 % 256 % 4294967296 else ~mode4~0 % 256 % 4294967296 - 4294967296);" "assume ~id5~0 >= 0;" "assume 0 == ~st5~0;" "assume ~send5~0 == ~id5~0;" "assume 0 == (if ~mode5~0 % 256 % 4294967296 <= 2147483647 then ~mode5~0 % 256 % 4294967296 else ~mode5~0 % 256 % 4294967296 - 4294967296);" "assume ~id6~0 >= 0;" "assume 0 == ~st6~0;" "assume ~send6~0 == ~id6~0;" "assume 0 == (if ~mode6~0 % 256 % 4294967296 <= 2147483647 then ~mode6~0 % 256 % 4294967296 else ~mode6~0 % 256 % 4294967296 - 4294967296);" "assume ~id1~0 != ~id2~0;" "assume ~id1~0 != ~id3~0;" "assume ~id1~0 != ~id4~0;" "assume ~id1~0 != ~id5~0;" "assume ~id1~0 != ~id6~0;" "assume ~id2~0 != ~id3~0;" "assume ~id2~0 != ~id4~0;" "assume ~id2~0 != ~id5~0;" "assume ~id2~0 != ~id6~0;" "assume ~id3~0 != ~id4~0;" "assume ~id3~0 != ~id5~0;" "assume ~id3~0 != ~id6~0;" "assume ~id4~0 != ~id5~0;" "assume ~id4~0 != ~id6~0;" "assume ~id5~0 != ~id6~0;init_~tmp~0#1 := 1;" "init_#res#1 := init_~tmp~0#1;" "main_#t~ret35#1 := init_#res#1;havoc init_~tmp~0#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret35#1;havoc main_#t~ret35#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1;" "assume !(0 == assume_abort_if_not_~cond#1);" "havoc assume_abort_if_not_~cond#1;havoc assume_abort_if_not_#in~cond#1;assume { :end_inline_assume_abort_if_not } true;~p1_old~0 := ~nomsg~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~nomsg~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~nomsg~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~nomsg~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~nomsg~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~nomsg~0;~p6_new~0 := ~nomsg~0;main_~i2~0#1 := 0;" [2024-11-28 03:26:33,652 INFO L749 eck$LassoCheckResult]: Loop: "assume { :begin_inline_node1 } true;havoc node1_~m1~0#1;havoc node1_~m1~0#1;node1_~m1~0#1 := ~nomsg~0;" "assume !(0 != ~mode1~0 % 256);" "assume 0 != ~alive1~0 % 256;~p1_new~0 := (if (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 <= 127 then (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 else (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 - 256);" "~mode1~0 := 1;" "havoc node1_~m1~0#1;assume { :end_inline_node1 } true;assume { :begin_inline_node2 } true;havoc node2_~m2~0#1;havoc node2_~m2~0#1;node2_~m2~0#1 := ~nomsg~0;" "assume 0 != ~mode2~0 % 256;node2_~m2~0#1 := ~p1_old~0;~p1_old~0 := ~nomsg~0;" "assume !(node2_~m2~0#1 != ~nomsg~0);" "~mode2~0 := 0;" "havoc node2_~m2~0#1;assume { :end_inline_node2 } true;assume { :begin_inline_node3 } true;havoc node3_~m3~0#1;havoc node3_~m3~0#1;node3_~m3~0#1 := ~nomsg~0;" "assume !(0 != ~mode3~0 % 256);" "assume 0 != ~alive3~0 % 256;~p3_new~0 := (if (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 <= 127 then (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 else (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 - 256);" "~mode3~0 := 1;" "havoc node3_~m3~0#1;assume { :end_inline_node3 } true;assume { :begin_inline_node4 } true;havoc node4_~m4~0#1;havoc node4_~m4~0#1;node4_~m4~0#1 := ~nomsg~0;" "assume !(0 != ~mode4~0 % 256);" "assume 0 != ~alive4~0 % 256;~p4_new~0 := (if (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 <= 127 then (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 else (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 - 256);" "~mode4~0 := 1;" "havoc node4_~m4~0#1;assume { :end_inline_node4 } true;assume { :begin_inline_node5 } true;havoc node5_~m5~0#1;havoc node5_~m5~0#1;node5_~m5~0#1 := ~nomsg~0;" "assume 0 != ~mode5~0 % 256;node5_~m5~0#1 := ~p4_old~0;~p4_old~0 := ~nomsg~0;" "assume !(node5_~m5~0#1 != ~nomsg~0);" "~mode5~0 := 0;" "havoc node5_~m5~0#1;assume { :end_inline_node5 } true;assume { :begin_inline_node6 } true;havoc node6_~m6~0#1;havoc node6_~m6~0#1;node6_~m6~0#1 := ~nomsg~0;" "assume 0 != ~mode6~0 % 256;node6_~m6~0#1 := ~p5_old~0;~p5_old~0 := ~nomsg~0;" "assume !(node6_~m6~0#1 != ~nomsg~0);" "~mode6~0 := 0;" "havoc node6_~m6~0#1;assume { :end_inline_node6 } true;~p1_old~0 := ~p1_new~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~p2_new~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~p3_new~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~p4_new~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~p5_new~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~p6_new~0;~p6_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_~tmp~1#1;havoc check_~tmp~1#1;" "assume ~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0 + ~st6~0 <= 1;" "assume (if ~r1~0 % 256 % 4294967296 <= 2147483647 then ~r1~0 % 256 % 4294967296 else ~r1~0 % 256 % 4294967296 - 4294967296) < 6;check_~tmp~1#1 := 1;" "check_#res#1 := check_~tmp~1#1;" "main_#t~ret36#1 := check_#res#1;havoc check_~tmp~1#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret36#1;havoc main_#t~ret36#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1;" "assume !(0 == assert_~arg#1 % 256);" "havoc assert_~arg#1;havoc assert_#in~arg#1;assume { :end_inline_assert } true;" [2024-11-28 03:26:33,654 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 03:26:33,655 INFO L85 PathProgramCache]: Analyzing trace with hash -1766357374, now seen corresponding path program 2 times [2024-11-28 03:26:33,655 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM [2024-11-28 03:26:33,655 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [569949571] [2024-11-28 03:26:33,655 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 03:26:33,655 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 03:26:33,759 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-28 03:26:33,759 INFO L357 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-28 03:26:33,840 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-28 03:26:33,868 INFO L130 FreeRefinementEngine]: Strategy CAMEL_NO_AM found a feasible trace [2024-11-28 03:26:33,868 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 03:26:33,869 INFO L85 PathProgramCache]: Analyzing trace with hash -1959206856, now seen corresponding path program 1 times [2024-11-28 03:26:33,870 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM [2024-11-28 03:26:33,870 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [341956578] [2024-11-28 03:26:33,870 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 03:26:33,870 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 03:26:33,897 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-28 03:26:33,899 INFO L357 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-28 03:26:33,919 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-28 03:26:33,929 INFO L130 FreeRefinementEngine]: Strategy CAMEL_NO_AM found a feasible trace [2024-11-28 03:26:33,930 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 03:26:33,930 INFO L85 PathProgramCache]: Analyzing trace with hash -1084175977, now seen corresponding path program 1 times [2024-11-28 03:26:33,930 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM [2024-11-28 03:26:33,930 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [795523803] [2024-11-28 03:26:33,931 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 03:26:33,931 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 03:26:33,966 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 03:26:34,077 INFO L136 FreeRefinementEngine]: Strategy CAMEL_NO_AM found an infeasible trace [2024-11-28 03:26:34,079 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [795523803] [2024-11-28 03:26:34,079 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [795523803] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-28 03:26:34,079 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1054975456] [2024-11-28 03:26:34,079 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 03:26:34,079 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-28 03:26:34,080 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_468e79eb-6d55-4a0d-b086-3c03e269e5f0/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 03:26:34,084 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_468e79eb-6d55-4a0d-b086-3c03e269e5f0/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-28 03:26:34,086 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_468e79eb-6d55-4a0d-b086-3c03e269e5f0/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2024-11-28 03:26:34,243 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 03:26:34,245 INFO L256 TraceCheckSpWp]: Trace formula consists of 354 conjuncts, 2 conjuncts are in the unsatisfiable core [2024-11-28 03:26:34,248 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-28 03:26:34,360 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-28 03:26:34,500 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1054975456] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-28 03:26:34,501 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-28 03:26:34,501 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [3, 3, 3] total 3 [2024-11-28 03:26:34,502 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2091308916] [2024-11-28 03:26:34,504 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-28 03:26:39,331 INFO L204 LassoAnalysis]: Preferences: [2024-11-28 03:26:39,331 INFO L125 ssoRankerPreferences]: Compute integeral hull: false [2024-11-28 03:26:39,332 INFO L126 ssoRankerPreferences]: Enable LassoPartitioneer: true [2024-11-28 03:26:39,332 INFO L127 ssoRankerPreferences]: Term annotations enabled: false [2024-11-28 03:26:39,332 INFO L128 ssoRankerPreferences]: Use exernal solver: true [2024-11-28 03:26:39,332 INFO L129 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-28 03:26:39,332 INFO L130 ssoRankerPreferences]: Dump SMT script to file: false [2024-11-28 03:26:39,332 INFO L131 ssoRankerPreferences]: Path of dumped script: [2024-11-28 03:26:39,333 INFO L132 ssoRankerPreferences]: Filename of dumped script: pals_lcr-var-start-time.6.1.ufo.UNBOUNDED.pals.c_Iteration4_Loop [2024-11-28 03:26:39,334 INFO L133 ssoRankerPreferences]: MapElimAlgo: Frank [2024-11-28 03:26:39,334 INFO L241 LassoAnalysis]: Starting lasso preprocessing... [2024-11-28 03:26:39,365 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-28 03:26:39,377 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-28 03:26:39,380 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-28 03:26:39,383 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-28 03:26:39,391 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-28 03:26:39,394 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-28 03:26:39,397 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-28 03:26:39,401 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-28 03:26:39,404 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-28 03:26:39,407 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-28 03:26:39,413 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-28 03:26:39,419 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-28 03:26:39,422 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-28 03:26:39,425 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-28 03:26:39,428 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-28 03:26:39,435 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-28 03:26:39,441 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-28 03:26:39,446 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-28 03:26:39,451 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-28 03:26:39,455 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-28 03:26:40,373 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-28 03:26:40,380 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-28 03:26:40,382 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-28 03:26:41,796 WARN L137 XnfTransformerHelper]: expecting exponential blowup for input size 16