./Ultimate.py --spec ../../sv-benchmarks/c/properties/termination.prp --file ../../sv-benchmarks/c/uthash-2.0.2/uthash_SAX_nondet_test1-1.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version d790fecc Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_557b012e-f21c-4559-9fd7-78beeb30f289/bin/uautomizer-verify-aQ6SnzHsRB/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_557b012e-f21c-4559-9fd7-78beeb30f289/bin/uautomizer-verify-aQ6SnzHsRB/plugins/org.eclipse.equinox.launcher_1.6.800.v20240513-1750.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_557b012e-f21c-4559-9fd7-78beeb30f289/bin/uautomizer-verify-aQ6SnzHsRB/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_557b012e-f21c-4559-9fd7-78beeb30f289/bin/uautomizer-verify-aQ6SnzHsRB/config/AutomizerTermination.xml -i ../../sv-benchmarks/c/uthash-2.0.2/uthash_SAX_nondet_test1-1.i -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_557b012e-f21c-4559-9fd7-78beeb30f289/bin/uautomizer-verify-aQ6SnzHsRB/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_557b012e-f21c-4559-9fd7-78beeb30f289/bin/uautomizer-verify-aQ6SnzHsRB --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash fdc85b042221b41aa26e62667e19ce1f6c246be9a2cb4f81fe8b15c8429db160 --- Real Ultimate output --- This is Ultimate 0.3.0-dev-d790fec [2024-11-27 20:21:12,151 INFO L188 SettingsManager]: Resetting all preferences to default values... [2024-11-27 20:21:12,259 INFO L114 SettingsManager]: Loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_557b012e-f21c-4559-9fd7-78beeb30f289/bin/uautomizer-verify-aQ6SnzHsRB/config/svcomp-Termination-32bit-Automizer_Default.epf [2024-11-27 20:21:12,266 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2024-11-27 20:21:12,266 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2024-11-27 20:21:12,320 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2024-11-27 20:21:12,321 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2024-11-27 20:21:12,322 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2024-11-27 20:21:12,323 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2024-11-27 20:21:12,323 INFO L153 SettingsManager]: * Use memory slicer=true [2024-11-27 20:21:12,325 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2024-11-27 20:21:12,325 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2024-11-27 20:21:12,326 INFO L153 SettingsManager]: * Use SBE=true [2024-11-27 20:21:12,327 INFO L151 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2024-11-27 20:21:12,327 INFO L153 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2024-11-27 20:21:12,327 INFO L153 SettingsManager]: * Use old map elimination=false [2024-11-27 20:21:12,327 INFO L153 SettingsManager]: * Use external solver (rank synthesis)=false [2024-11-27 20:21:12,327 INFO L153 SettingsManager]: * Use only trivial implications for array writes=true [2024-11-27 20:21:12,327 INFO L153 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2024-11-27 20:21:12,327 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2024-11-27 20:21:12,327 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2024-11-27 20:21:12,328 INFO L153 SettingsManager]: * sizeof long=4 [2024-11-27 20:21:12,328 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2024-11-27 20:21:12,328 INFO L153 SettingsManager]: * sizeof POINTER=4 [2024-11-27 20:21:12,328 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2024-11-27 20:21:12,328 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2024-11-27 20:21:12,328 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2024-11-27 20:21:12,328 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2024-11-27 20:21:12,328 INFO L153 SettingsManager]: * Check unreachability of reach_error function=false [2024-11-27 20:21:12,328 INFO L153 SettingsManager]: * sizeof long double=12 [2024-11-27 20:21:12,328 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2024-11-27 20:21:12,329 INFO L153 SettingsManager]: * Assume nondeterminstic values are in range=false [2024-11-27 20:21:12,329 INFO L153 SettingsManager]: * Behaviour of calls to undefined functions=OVERAPPROXIMATE_BEHAVIOUR [2024-11-27 20:21:12,329 INFO L153 SettingsManager]: * Use constant arrays=true [2024-11-27 20:21:12,329 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2024-11-27 20:21:12,329 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-11-27 20:21:12,331 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2024-11-27 20:21:12,331 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL_NO_AM [2024-11-27 20:21:12,332 INFO L151 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2024-11-27 20:21:12,332 INFO L153 SettingsManager]: * TransformationType=MODULO_NEIGHBOR Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_557b012e-f21c-4559-9fd7-78beeb30f289/bin/uautomizer-verify-aQ6SnzHsRB Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> fdc85b042221b41aa26e62667e19ce1f6c246be9a2cb4f81fe8b15c8429db160 [2024-11-27 20:21:12,789 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2024-11-27 20:21:12,804 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2024-11-27 20:21:12,807 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2024-11-27 20:21:12,811 INFO L270 PluginConnector]: Initializing CDTParser... [2024-11-27 20:21:12,811 INFO L274 PluginConnector]: CDTParser initialized [2024-11-27 20:21:12,814 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_557b012e-f21c-4559-9fd7-78beeb30f289/bin/uautomizer-verify-aQ6SnzHsRB/../../sv-benchmarks/c/uthash-2.0.2/uthash_SAX_nondet_test1-1.i [2024-11-27 20:21:16,619 INFO L533 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_557b012e-f21c-4559-9fd7-78beeb30f289/bin/uautomizer-verify-aQ6SnzHsRB/data/6ee8d9d93/af44d5d098df4079abef4cc64ec9f8d9/FLAG5ced0c0d0 [2024-11-27 20:21:17,263 INFO L384 CDTParser]: Found 1 translation units. [2024-11-27 20:21:17,264 INFO L180 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_557b012e-f21c-4559-9fd7-78beeb30f289/sv-benchmarks/c/uthash-2.0.2/uthash_SAX_nondet_test1-1.i [2024-11-27 20:21:17,295 INFO L427 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_557b012e-f21c-4559-9fd7-78beeb30f289/bin/uautomizer-verify-aQ6SnzHsRB/data/6ee8d9d93/af44d5d098df4079abef4cc64ec9f8d9/FLAG5ced0c0d0 [2024-11-27 20:21:17,324 INFO L435 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_557b012e-f21c-4559-9fd7-78beeb30f289/bin/uautomizer-verify-aQ6SnzHsRB/data/6ee8d9d93/af44d5d098df4079abef4cc64ec9f8d9 [2024-11-27 20:21:17,328 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2024-11-27 20:21:17,331 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2024-11-27 20:21:17,334 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2024-11-27 20:21:17,334 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2024-11-27 20:21:17,341 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2024-11-27 20:21:17,343 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 27.11 08:21:17" (1/1) ... [2024-11-27 20:21:17,344 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@7c5d2d15 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.11 08:21:17, skipping insertion in model container [2024-11-27 20:21:17,344 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 27.11 08:21:17" (1/1) ... [2024-11-27 20:21:17,423 INFO L175 MainTranslator]: Built tables and reachable declarations [2024-11-27 20:21:18,031 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-11-27 20:21:18,048 INFO L200 MainTranslator]: Completed pre-run [2024-11-27 20:21:18,155 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-11-27 20:21:18,203 INFO L204 MainTranslator]: Completed translation [2024-11-27 20:21:18,204 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.11 08:21:18 WrapperNode [2024-11-27 20:21:18,204 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2024-11-27 20:21:18,206 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2024-11-27 20:21:18,206 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2024-11-27 20:21:18,206 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2024-11-27 20:21:18,214 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.11 08:21:18" (1/1) ... [2024-11-27 20:21:18,237 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.11 08:21:18" (1/1) ... [2024-11-27 20:21:18,299 INFO L138 Inliner]: procedures = 176, calls = 170, calls flagged for inlining = 4, calls inlined = 4, statements flattened = 781 [2024-11-27 20:21:18,299 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2024-11-27 20:21:18,300 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2024-11-27 20:21:18,300 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2024-11-27 20:21:18,301 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2024-11-27 20:21:18,317 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.11 08:21:18" (1/1) ... [2024-11-27 20:21:18,318 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.11 08:21:18" (1/1) ... [2024-11-27 20:21:18,337 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.11 08:21:18" (1/1) ... [2024-11-27 20:21:18,394 INFO L175 MemorySlicer]: Split 158 memory accesses to 2 slices as follows [2, 156]. 99 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2, 0]. The 42 writes are split as follows [0, 42]. [2024-11-27 20:21:18,395 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.11 08:21:18" (1/1) ... [2024-11-27 20:21:18,395 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.11 08:21:18" (1/1) ... [2024-11-27 20:21:18,429 INFO L184 PluginConnector]: Executing the observer ReplaceArrayAssignments from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.11 08:21:18" (1/1) ... [2024-11-27 20:21:18,431 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.11 08:21:18" (1/1) ... [2024-11-27 20:21:18,441 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.11 08:21:18" (1/1) ... [2024-11-27 20:21:18,445 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.11 08:21:18" (1/1) ... [2024-11-27 20:21:18,449 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.11 08:21:18" (1/1) ... [2024-11-27 20:21:18,457 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2024-11-27 20:21:18,458 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2024-11-27 20:21:18,458 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2024-11-27 20:21:18,458 INFO L274 PluginConnector]: RCFGBuilder initialized [2024-11-27 20:21:18,459 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.11 08:21:18" (1/1) ... [2024-11-27 20:21:18,467 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-27 20:21:18,493 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_557b012e-f21c-4559-9fd7-78beeb30f289/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-27 20:21:18,511 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_557b012e-f21c-4559-9fd7-78beeb30f289/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-27 20:21:18,516 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_557b012e-f21c-4559-9fd7-78beeb30f289/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2024-11-27 20:21:18,551 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#0 [2024-11-27 20:21:18,551 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#1 [2024-11-27 20:21:18,552 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#0 [2024-11-27 20:21:18,552 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#1 [2024-11-27 20:21:18,552 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset#0 [2024-11-27 20:21:18,552 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset#1 [2024-11-27 20:21:18,553 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset#0 [2024-11-27 20:21:18,554 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset#1 [2024-11-27 20:21:18,554 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap [2024-11-27 20:21:18,554 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2024-11-27 20:21:18,554 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$#0 [2024-11-27 20:21:18,554 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$#1 [2024-11-27 20:21:18,554 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$#0 [2024-11-27 20:21:18,554 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$#1 [2024-11-27 20:21:18,555 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2024-11-27 20:21:18,555 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#0 [2024-11-27 20:21:18,555 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#1 [2024-11-27 20:21:18,555 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2024-11-27 20:21:18,556 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2024-11-27 20:21:18,850 INFO L234 CfgBuilder]: Building ICFG [2024-11-27 20:21:18,855 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2024-11-27 20:21:18,859 WARN L773 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2024-11-27 20:21:18,933 WARN L773 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2024-11-27 20:21:21,145 INFO L? ?]: Removed 195 outVars from TransFormulas that were not future-live. [2024-11-27 20:21:21,146 INFO L283 CfgBuilder]: Performing block encoding [2024-11-27 20:21:21,178 INFO L307 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2024-11-27 20:21:21,178 INFO L312 CfgBuilder]: Removed 18 assume(true) statements. [2024-11-27 20:21:21,179 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 27.11 08:21:21 BoogieIcfgContainer [2024-11-27 20:21:21,179 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2024-11-27 20:21:21,184 INFO L112 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2024-11-27 20:21:21,184 INFO L270 PluginConnector]: Initializing BuchiAutomizer... [2024-11-27 20:21:21,196 INFO L274 PluginConnector]: BuchiAutomizer initialized [2024-11-27 20:21:21,197 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2024-11-27 20:21:21,198 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 27.11 08:21:17" (1/3) ... [2024-11-27 20:21:21,199 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@64648d3e and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 27.11 08:21:21, skipping insertion in model container [2024-11-27 20:21:21,199 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2024-11-27 20:21:21,199 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.11 08:21:18" (2/3) ... [2024-11-27 20:21:21,200 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@64648d3e and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 27.11 08:21:21, skipping insertion in model container [2024-11-27 20:21:21,200 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2024-11-27 20:21:21,200 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 27.11 08:21:21" (3/3) ... [2024-11-27 20:21:21,203 INFO L363 chiAutomizerObserver]: Analyzing ICFG uthash_SAX_nondet_test1-1.i [2024-11-27 20:21:21,294 INFO L300 stractBuchiCegarLoop]: Interprodecural is true [2024-11-27 20:21:21,294 INFO L301 stractBuchiCegarLoop]: Hoare is None [2024-11-27 20:21:21,294 INFO L302 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2024-11-27 20:21:21,294 INFO L303 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2024-11-27 20:21:21,294 INFO L304 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2024-11-27 20:21:21,294 INFO L305 stractBuchiCegarLoop]: Difference is false [2024-11-27 20:21:21,295 INFO L306 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2024-11-27 20:21:21,295 INFO L310 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2024-11-27 20:21:21,304 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 216 states, 211 states have (on average 1.5876777251184835) internal successors, (335), 211 states have internal predecessors, (335), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-27 20:21:21,357 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 201 [2024-11-27 20:21:21,358 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-27 20:21:21,358 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-27 20:21:21,370 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2024-11-27 20:21:21,370 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1] [2024-11-27 20:21:21,370 INFO L332 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2024-11-27 20:21:21,372 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 216 states, 211 states have (on average 1.5876777251184835) internal successors, (335), 211 states have internal predecessors, (335), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-27 20:21:21,391 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 201 [2024-11-27 20:21:21,394 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-27 20:21:21,394 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-27 20:21:21,395 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2024-11-27 20:21:21,395 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1] [2024-11-27 20:21:21,407 INFO L747 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc4#1.base, main_#t~malloc4#1.offset, main_#t~nondet5#1, main_#t~mem6#1, main_#t~mem8#1, main_#t~mem7#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~bitwise19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~switch28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~bitwise40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc49#1.base, main_#t~malloc49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~memset~res52#1.base, main_#t~memset~res52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~malloc58#1.base, main_#t~malloc58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~memset~res65#1.base, main_#t~memset~res65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1, main_#t~post76#1, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1, main_#t~bitwise79#1, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~post83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem88#1, main_#t~mem87#1, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1, main_#t~short91#1, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1, main_#t~malloc94#1.base, main_#t~malloc94#1.offset, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1, main_#t~memset~res97#1.base, main_#t~memset~res97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem102#1, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1, main_#t~bitwise103#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem107#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1, main_#t~bitwise108#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem118#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1, main_#t~bitwise119#1, main_#t~mem120#1, main_#t~pre121#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem125#1, main_#t~post126#1, main_#t~mem130#1, main_#t~mem128#1, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem129#1, main_#t~mem131#1, main_#t~post132#1, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~post136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem140#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1, main_#t~post143#1, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem149#1, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem148#1, main_#t~ite152#1, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem154#1, main_#t~mem155#1.base, main_#t~mem155#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~post156#1, main_#t~mem157#1, main_#t~mem158#1.base, main_#t~mem158#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~sum~0#1;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~sum~0#1 := 0;main_~i~0#1 := 0;" [2024-11-27 20:21:21,407 INFO L749 eck$LassoCheckResult]: Loop: "assume main_~i~0#1 < 10;" "call main_#t~malloc4#1.base, main_#t~malloc4#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc4#1.base, main_#t~malloc4#1.offset;havoc main_#t~malloc4#1.base, main_#t~malloc4#1.offset;" "assume main_~user~0#1.base == 0 && main_~user~0#1.offset == 0;assume false;" "call write~int#1(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~nondet5#1;call write~int#1(main_#t~nondet5#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~nondet5#1;call main_#t~mem6#1 := read~int#1(main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);main_~sum~0#1 := main_~sum~0#1 + main_#t~mem6#1;havoc main_#t~mem6#1;" "assume !true;" "main_#t~post156#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post156#1;havoc main_#t~post156#1;" [2024-11-27 20:21:21,414 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-27 20:21:21,415 INFO L85 PathProgramCache]: Analyzing trace with hash 1539, now seen corresponding path program 1 times [2024-11-27 20:21:21,425 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM [2024-11-27 20:21:21,425 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2136095035] [2024-11-27 20:21:21,426 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-27 20:21:21,427 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-27 20:21:21,627 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-27 20:21:21,628 INFO L357 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-27 20:21:21,646 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-27 20:21:21,684 INFO L130 FreeRefinementEngine]: Strategy CAMEL_NO_AM found a feasible trace [2024-11-27 20:21:21,688 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-27 20:21:21,688 INFO L85 PathProgramCache]: Analyzing trace with hash 1660610827, now seen corresponding path program 1 times [2024-11-27 20:21:21,688 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM [2024-11-27 20:21:21,688 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2083697829] [2024-11-27 20:21:21,688 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-27 20:21:21,688 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-27 20:21:21,721 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-27 20:21:21,787 INFO L136 FreeRefinementEngine]: Strategy CAMEL_NO_AM found an infeasible trace [2024-11-27 20:21:21,790 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2083697829] [2024-11-27 20:21:21,791 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2083697829] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-27 20:21:21,792 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [300283907] [2024-11-27 20:21:21,793 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-27 20:21:21,794 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-27 20:21:21,794 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_557b012e-f21c-4559-9fd7-78beeb30f289/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-27 20:21:21,800 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_557b012e-f21c-4559-9fd7-78beeb30f289/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-27 20:21:21,803 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_557b012e-f21c-4559-9fd7-78beeb30f289/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2024-11-27 20:21:21,957 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-27 20:21:21,960 INFO L256 TraceCheckSpWp]: Trace formula consists of 49 conjuncts, 1 conjuncts are in the unsatisfiable core [2024-11-27 20:21:21,961 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-27 20:21:21,970 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-27 20:21:21,973 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [300283907] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-27 20:21:21,974 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-27 20:21:21,975 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [2, 2, 2] total 2 [2024-11-27 20:21:21,976 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1077986924] [2024-11-27 20:21:21,977 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-27 20:21:21,981 INFO L764 eck$LassoCheckResult]: loop already infeasible [2024-11-27 20:21:21,982 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL_NO_AM [2024-11-27 20:21:22,020 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2024-11-27 20:21:22,021 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2024-11-27 20:21:22,024 INFO L87 Difference]: Start difference. First operand has 216 states, 211 states have (on average 1.5876777251184835) internal successors, (335), 211 states have internal predecessors, (335), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Second operand has 2 states, 2 states have (on average 3.0) internal successors, (6), 2 states have internal predecessors, (6), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-27 20:21:22,055 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-27 20:21:22,056 INFO L93 Difference]: Finished difference Result 215 states and 303 transitions. [2024-11-27 20:21:22,057 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 215 states and 303 transitions. [2024-11-27 20:21:22,062 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 201 [2024-11-27 20:21:22,078 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 215 states to 208 states and 296 transitions. [2024-11-27 20:21:22,079 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 208 [2024-11-27 20:21:22,080 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 208 [2024-11-27 20:21:22,082 INFO L73 IsDeterministic]: Start isDeterministic. Operand 208 states and 296 transitions. [2024-11-27 20:21:22,085 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-27 20:21:22,086 INFO L218 hiAutomatonCegarLoop]: Abstraction has 208 states and 296 transitions. [2024-11-27 20:21:22,103 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 208 states and 296 transitions. [2024-11-27 20:21:22,122 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 208 to 208. [2024-11-27 20:21:22,123 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 208 states, 204 states have (on average 1.4215686274509804) internal successors, (290), 203 states have internal predecessors, (290), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-27 20:21:22,125 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 208 states to 208 states and 296 transitions. [2024-11-27 20:21:22,126 INFO L240 hiAutomatonCegarLoop]: Abstraction has 208 states and 296 transitions. [2024-11-27 20:21:22,127 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-11-27 20:21:22,135 INFO L425 stractBuchiCegarLoop]: Abstraction has 208 states and 296 transitions. [2024-11-27 20:21:22,135 INFO L332 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2024-11-27 20:21:22,135 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 208 states and 296 transitions. [2024-11-27 20:21:22,137 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 201 [2024-11-27 20:21:22,140 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-27 20:21:22,141 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-27 20:21:22,142 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2024-11-27 20:21:22,142 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-27 20:21:22,142 INFO L747 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc4#1.base, main_#t~malloc4#1.offset, main_#t~nondet5#1, main_#t~mem6#1, main_#t~mem8#1, main_#t~mem7#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~bitwise19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~switch28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~bitwise40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc49#1.base, main_#t~malloc49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~memset~res52#1.base, main_#t~memset~res52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~malloc58#1.base, main_#t~malloc58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~memset~res65#1.base, main_#t~memset~res65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1, main_#t~post76#1, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1, main_#t~bitwise79#1, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~post83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem88#1, main_#t~mem87#1, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1, main_#t~short91#1, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1, main_#t~malloc94#1.base, main_#t~malloc94#1.offset, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1, main_#t~memset~res97#1.base, main_#t~memset~res97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem102#1, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1, main_#t~bitwise103#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem107#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1, main_#t~bitwise108#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem118#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1, main_#t~bitwise119#1, main_#t~mem120#1, main_#t~pre121#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem125#1, main_#t~post126#1, main_#t~mem130#1, main_#t~mem128#1, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem129#1, main_#t~mem131#1, main_#t~post132#1, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~post136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem140#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1, main_#t~post143#1, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem149#1, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem148#1, main_#t~ite152#1, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem154#1, main_#t~mem155#1.base, main_#t~mem155#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~post156#1, main_#t~mem157#1, main_#t~mem158#1.base, main_#t~mem158#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~sum~0#1;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~sum~0#1 := 0;main_~i~0#1 := 0;" [2024-11-27 20:21:22,144 INFO L749 eck$LassoCheckResult]: Loop: "assume main_~i~0#1 < 10;" "call main_#t~malloc4#1.base, main_#t~malloc4#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc4#1.base, main_#t~malloc4#1.offset;havoc main_#t~malloc4#1.base, main_#t~malloc4#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call write~int#1(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~nondet5#1;call write~int#1(main_#t~nondet5#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~nondet5#1;call main_#t~mem6#1 := read~int#1(main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);main_~sum~0#1 := main_~sum~0#1 + main_#t~mem6#1;havoc main_#t~mem6#1;" "havoc main_~_ha_hashv~0#1;" "goto;" "havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4;" "assume !(main_~_hj_k~0#1 % 4294967296 >= 12);" "main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch28#1 := 11 == main_~_hj_k~0#1;" "assume main_#t~switch28#1;call main_#t~mem29#1 := read~int#1(main_~_hj_key~0#1.base, 10 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 16777216 * (main_#t~mem29#1 % 256 % 4294967296);" "main_#t~switch28#1 := main_#t~switch28#1 || 10 == main_~_hj_k~0#1;" "assume main_#t~switch28#1;call main_#t~mem30#1 := read~int#1(main_~_hj_key~0#1.base, 9 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 65536 * (main_#t~mem30#1 % 256 % 4294967296);" "main_#t~switch28#1 := main_#t~switch28#1 || 9 == main_~_hj_k~0#1;" "assume !main_#t~switch28#1;" "main_#t~switch28#1 := main_#t~switch28#1 || 8 == main_~_hj_k~0#1;" "assume main_#t~switch28#1;call main_#t~mem32#1 := read~int#1(main_~_hj_key~0#1.base, 7 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 16777216 * (main_#t~mem32#1 % 256 % 4294967296);" "main_#t~switch28#1 := main_#t~switch28#1 || 7 == main_~_hj_k~0#1;" "assume main_#t~switch28#1;call main_#t~mem33#1 := read~int#1(main_~_hj_key~0#1.base, 6 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 65536 * (main_#t~mem33#1 % 256 % 4294967296);" "main_#t~switch28#1 := main_#t~switch28#1 || 6 == main_~_hj_k~0#1;" "assume main_#t~switch28#1;call main_#t~mem34#1 := read~int#1(main_~_hj_key~0#1.base, 5 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 256 * (main_#t~mem34#1 % 256 % 4294967296);" "main_#t~switch28#1 := main_#t~switch28#1 || 5 == main_~_hj_k~0#1;" "assume main_#t~switch28#1;call main_#t~mem35#1 := read~int#1(main_~_hj_key~0#1.base, 4 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + (if main_#t~mem35#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem35#1 % 256 % 4294967296 else main_#t~mem35#1 % 256 % 4294967296 - 4294967296);" "main_#t~switch28#1 := main_#t~switch28#1 || 4 == main_~_hj_k~0#1;" "assume main_#t~switch28#1;call main_#t~mem36#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem36#1 % 256 % 4294967296);" "main_#t~switch28#1 := main_#t~switch28#1 || 3 == main_~_hj_k~0#1;" "assume main_#t~switch28#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem37#1 % 256 % 4294967296);" "main_#t~switch28#1 := main_#t~switch28#1 || 2 == main_~_hj_k~0#1;" "assume main_#t~switch28#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem38#1 % 256 % 4294967296);" "main_#t~switch28#1 := main_#t~switch28#1 || 1 == main_~_hj_k~0#1;" "assume main_#t~switch28#1;call main_#t~mem39#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem39#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem39#1 % 256 % 4294967296 else main_#t~mem39#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~mem39#1;havoc main_#t~switch28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~mem39#1;" "main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise40#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192;" "main_~_hj_i~0#1 := main_#t~bitwise40#1;havoc main_#t~bitwise40#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise41#1 := 256 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise41#1;havoc main_#t~bitwise41#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise42#1 := main_~_hj_j~0#1 % 4294967296 / 8192;" "main_~_ha_hashv~0#1 := main_#t~bitwise42#1;havoc main_#t~bitwise42#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise43#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096;" "main_~_hj_i~0#1 := main_#t~bitwise43#1;havoc main_#t~bitwise43#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise44#1 := 65536 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise44#1;havoc main_#t~bitwise44#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise45#1 := main_~_hj_j~0#1 % 4294967296 / 32;" "main_~_ha_hashv~0#1 := main_#t~bitwise45#1;havoc main_#t~bitwise45#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise46#1 := main_~_ha_hashv~0#1 % 4294967296 / 8;" "main_~_hj_i~0#1 := main_#t~bitwise46#1;havoc main_#t~bitwise46#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise47#1 := 1024 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise47#1;havoc main_#t~bitwise47#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise48#1 := main_~_hj_j~0#1 % 4294967296 / 32768;" "main_~_ha_hashv~0#1 := main_#t~bitwise48#1;havoc main_#t~bitwise48#1;" "assume !false;" "havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset;" "assume !false;" "assume !false;" "call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4);" "assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem66#1.base, main_#t~mem66#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset;" "call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_#t~mem67#1.base, 16 + main_#t~mem67#1.offset, 4);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem70#1 := read~int#1(main_#t~mem69#1.base, 20 + main_#t~mem69#1.offset, 4);call write~$Pointer$#1(main_#t~mem68#1.base, main_#t~mem68#1.offset - main_#t~mem70#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem67#1.base, main_#t~mem67#1.offset;havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1.base, main_#t~mem69#1.offset;havoc main_#t~mem70#1;call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_#t~mem71#1.base, 16 + main_#t~mem71#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem72#1.base, 8 + main_#t~mem72#1.offset, 4);havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem73#1.base, 16 + main_#t~mem73#1.offset, 4);havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;" "assume !false;" "havoc main_~_ha_bkt~0#1;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem75#1 := read~int#1(main_#t~mem74#1.base, 12 + main_#t~mem74#1.offset, 4);main_#t~post76#1 := main_#t~mem75#1;call write~int#1(1 + main_#t~post76#1, main_#t~mem74#1.base, 12 + main_#t~mem74#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset;havoc main_#t~mem75#1;havoc main_#t~post76#1;" "call main_#t~mem77#1.base, main_#t~mem77#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem78#1 := read~int#1(main_#t~mem77#1.base, 4 + main_#t~mem77#1.offset, 4);" "assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem78#1 - 1) % 4294967296;main_#t~bitwise79#1 := 0;" "main_~_ha_bkt~0#1 := main_#t~bitwise79#1;havoc main_#t~mem77#1.base, main_#t~mem77#1.offset;havoc main_#t~mem78#1;havoc main_#t~bitwise79#1;" "assume !false;" "call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem81#1.base, main_#t~mem81#1.offset := read~$Pointer$#1(main_#t~mem80#1.base, main_#t~mem80#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem81#1.base, main_#t~mem81#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;havoc main_#t~mem81#1.base, main_#t~mem81#1.offset;call main_#t~mem82#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post83#1 := main_#t~mem82#1;call write~int#1(1 + main_#t~post83#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem82#1;havoc main_#t~post83#1;call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem84#1.base, main_#t~mem84#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);" "assume main_#t~mem85#1.base != 0 || main_#t~mem85#1.offset != 0;havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;call main_#t~mem86#1.base, main_#t~mem86#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem86#1.base, 12 + main_#t~mem86#1.offset, 4);havoc main_#t~mem86#1.base, main_#t~mem86#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem88#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem87#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short91#1 := main_#t~mem88#1 % 4294967296 >= 10 * (1 + main_#t~mem87#1) % 4294967296;" "assume main_#t~short91#1;call main_#t~mem89#1.base, main_#t~mem89#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem90#1 := read~int#1(main_#t~mem89#1.base, 36 + main_#t~mem89#1.offset, 4);main_#t~short91#1 := 0 == main_#t~mem90#1 % 4294967296;" "assume !main_#t~short91#1;havoc main_#t~mem88#1;havoc main_#t~mem87#1;havoc main_#t~mem89#1.base, main_#t~mem89#1.offset;havoc main_#t~mem90#1;havoc main_#t~short91#1;" "havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset;" "assume !false;" "havoc main_~_ha_bkt~0#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~0#1;" "assume !false;" "main_#t~post156#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post156#1;havoc main_#t~post156#1;" [2024-11-27 20:21:22,148 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-27 20:21:22,148 INFO L85 PathProgramCache]: Analyzing trace with hash 1539, now seen corresponding path program 2 times [2024-11-27 20:21:22,148 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM [2024-11-27 20:21:22,149 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1025866494] [2024-11-27 20:21:22,149 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-27 20:21:22,149 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-27 20:21:22,160 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-27 20:21:22,160 INFO L357 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-27 20:21:22,167 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-27 20:21:22,175 INFO L130 FreeRefinementEngine]: Strategy CAMEL_NO_AM found a feasible trace [2024-11-27 20:21:22,176 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-27 20:21:22,177 INFO L85 PathProgramCache]: Analyzing trace with hash -662993938, now seen corresponding path program 1 times [2024-11-27 20:21:22,177 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM [2024-11-27 20:21:22,177 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1238641161] [2024-11-27 20:21:22,177 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-27 20:21:22,177 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-27 20:21:22,289 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-27 20:21:22,961 INFO L136 FreeRefinementEngine]: Strategy CAMEL_NO_AM found an infeasible trace [2024-11-27 20:21:22,961 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1238641161] [2024-11-27 20:21:22,962 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1238641161] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-27 20:21:22,962 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1761925073] [2024-11-27 20:21:22,962 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-27 20:21:22,962 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-27 20:21:22,962 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_557b012e-f21c-4559-9fd7-78beeb30f289/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-27 20:21:22,969 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_557b012e-f21c-4559-9fd7-78beeb30f289/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-27 20:21:22,972 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_557b012e-f21c-4559-9fd7-78beeb30f289/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2024-11-27 20:21:23,431 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-27 20:21:23,435 INFO L256 TraceCheckSpWp]: Trace formula consists of 543 conjuncts, 3 conjuncts are in the unsatisfiable core [2024-11-27 20:21:23,440 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-27 20:21:23,484 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-27 20:21:23,540 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1761925073] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-27 20:21:23,540 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-27 20:21:23,544 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 3, 3] total 5 [2024-11-27 20:21:23,545 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [309491266] [2024-11-27 20:21:23,545 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-27 20:21:23,546 INFO L764 eck$LassoCheckResult]: loop already infeasible [2024-11-27 20:21:23,546 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL_NO_AM [2024-11-27 20:21:23,546 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-27 20:21:23,547 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-11-27 20:21:23,547 INFO L87 Difference]: Start difference. First operand 208 states and 296 transitions. cyclomatic complexity: 91 Second operand has 5 states, 5 states have (on average 16.8) internal successors, (84), 5 states have internal predecessors, (84), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-27 20:21:23,826 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-27 20:21:23,826 INFO L93 Difference]: Finished difference Result 214 states and 295 transitions. [2024-11-27 20:21:23,826 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 214 states and 295 transitions. [2024-11-27 20:21:23,830 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 207 [2024-11-27 20:21:23,836 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 214 states to 214 states and 295 transitions. [2024-11-27 20:21:23,839 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 214 [2024-11-27 20:21:23,840 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 214 [2024-11-27 20:21:23,841 INFO L73 IsDeterministic]: Start isDeterministic. Operand 214 states and 295 transitions. [2024-11-27 20:21:23,842 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-27 20:21:23,844 INFO L218 hiAutomatonCegarLoop]: Abstraction has 214 states and 295 transitions. [2024-11-27 20:21:23,845 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 214 states and 295 transitions. [2024-11-27 20:21:23,858 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 214 to 214. [2024-11-27 20:21:23,859 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 214 states, 210 states have (on average 1.3761904761904762) internal successors, (289), 209 states have internal predecessors, (289), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-27 20:21:23,861 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 214 states to 214 states and 295 transitions. [2024-11-27 20:21:23,862 INFO L240 hiAutomatonCegarLoop]: Abstraction has 214 states and 295 transitions. [2024-11-27 20:21:23,863 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-27 20:21:23,865 INFO L425 stractBuchiCegarLoop]: Abstraction has 214 states and 295 transitions. [2024-11-27 20:21:23,866 INFO L332 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2024-11-27 20:21:23,867 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 214 states and 295 transitions. [2024-11-27 20:21:23,869 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 207 [2024-11-27 20:21:23,870 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-27 20:21:23,870 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-27 20:21:23,872 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2024-11-27 20:21:23,875 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-27 20:21:23,876 INFO L747 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc4#1.base, main_#t~malloc4#1.offset, main_#t~nondet5#1, main_#t~mem6#1, main_#t~mem8#1, main_#t~mem7#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~bitwise19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~switch28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~bitwise40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc49#1.base, main_#t~malloc49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~memset~res52#1.base, main_#t~memset~res52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~malloc58#1.base, main_#t~malloc58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~memset~res65#1.base, main_#t~memset~res65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1, main_#t~post76#1, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1, main_#t~bitwise79#1, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~post83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem88#1, main_#t~mem87#1, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1, main_#t~short91#1, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1, main_#t~malloc94#1.base, main_#t~malloc94#1.offset, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1, main_#t~memset~res97#1.base, main_#t~memset~res97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem102#1, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1, main_#t~bitwise103#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem107#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1, main_#t~bitwise108#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem118#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1, main_#t~bitwise119#1, main_#t~mem120#1, main_#t~pre121#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem125#1, main_#t~post126#1, main_#t~mem130#1, main_#t~mem128#1, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem129#1, main_#t~mem131#1, main_#t~post132#1, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~post136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem140#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1, main_#t~post143#1, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem149#1, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem148#1, main_#t~ite152#1, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem154#1, main_#t~mem155#1.base, main_#t~mem155#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~post156#1, main_#t~mem157#1, main_#t~mem158#1.base, main_#t~mem158#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~sum~0#1;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~sum~0#1 := 0;main_~i~0#1 := 0;" [2024-11-27 20:21:23,876 INFO L749 eck$LassoCheckResult]: Loop: "assume main_~i~0#1 < 10;" "call main_#t~malloc4#1.base, main_#t~malloc4#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc4#1.base, main_#t~malloc4#1.offset;havoc main_#t~malloc4#1.base, main_#t~malloc4#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call write~int#1(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~nondet5#1;call write~int#1(main_#t~nondet5#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~nondet5#1;call main_#t~mem6#1 := read~int#1(main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);main_~sum~0#1 := main_~sum~0#1 + main_#t~mem6#1;havoc main_#t~mem6#1;" "havoc main_~_ha_hashv~0#1;" "goto;" "havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4;" "assume !(main_~_hj_k~0#1 % 4294967296 >= 12);" "main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch28#1 := 11 == main_~_hj_k~0#1;" "assume !main_#t~switch28#1;" "main_#t~switch28#1 := main_#t~switch28#1 || 10 == main_~_hj_k~0#1;" "assume !main_#t~switch28#1;" "main_#t~switch28#1 := main_#t~switch28#1 || 9 == main_~_hj_k~0#1;" "assume !main_#t~switch28#1;" "main_#t~switch28#1 := main_#t~switch28#1 || 8 == main_~_hj_k~0#1;" "assume !main_#t~switch28#1;" "main_#t~switch28#1 := main_#t~switch28#1 || 7 == main_~_hj_k~0#1;" "assume !main_#t~switch28#1;" "main_#t~switch28#1 := main_#t~switch28#1 || 6 == main_~_hj_k~0#1;" "assume !main_#t~switch28#1;" "main_#t~switch28#1 := main_#t~switch28#1 || 5 == main_~_hj_k~0#1;" "assume !main_#t~switch28#1;" "main_#t~switch28#1 := main_#t~switch28#1 || 4 == main_~_hj_k~0#1;" "assume main_#t~switch28#1;call main_#t~mem36#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem36#1 % 256 % 4294967296);" "main_#t~switch28#1 := main_#t~switch28#1 || 3 == main_~_hj_k~0#1;" "assume main_#t~switch28#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem37#1 % 256 % 4294967296);" "main_#t~switch28#1 := main_#t~switch28#1 || 2 == main_~_hj_k~0#1;" "assume main_#t~switch28#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem38#1 % 256 % 4294967296);" "main_#t~switch28#1 := main_#t~switch28#1 || 1 == main_~_hj_k~0#1;" "assume main_#t~switch28#1;call main_#t~mem39#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem39#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem39#1 % 256 % 4294967296 else main_#t~mem39#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~mem39#1;havoc main_#t~switch28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~mem39#1;" "main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise40#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192;" "main_~_hj_i~0#1 := main_#t~bitwise40#1;havoc main_#t~bitwise40#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise41#1 := 256 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise41#1;havoc main_#t~bitwise41#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise42#1 := main_~_hj_j~0#1 % 4294967296 / 8192;" "main_~_ha_hashv~0#1 := main_#t~bitwise42#1;havoc main_#t~bitwise42#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise43#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096;" "main_~_hj_i~0#1 := main_#t~bitwise43#1;havoc main_#t~bitwise43#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise44#1 := 65536 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise44#1;havoc main_#t~bitwise44#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise45#1 := main_~_hj_j~0#1 % 4294967296 / 32;" "main_~_ha_hashv~0#1 := main_#t~bitwise45#1;havoc main_#t~bitwise45#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise46#1 := main_~_ha_hashv~0#1 % 4294967296 / 8;" "main_~_hj_i~0#1 := main_#t~bitwise46#1;havoc main_#t~bitwise46#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise47#1 := 1024 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise47#1;havoc main_#t~bitwise47#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise48#1 := main_~_hj_j~0#1 % 4294967296 / 32768;" "main_~_ha_hashv~0#1 := main_#t~bitwise48#1;havoc main_#t~bitwise48#1;" "assume !false;" "havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset;" "assume !false;" "assume !false;" "call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4);" "assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem66#1.base, main_#t~mem66#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset;" "call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_#t~mem67#1.base, 16 + main_#t~mem67#1.offset, 4);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem70#1 := read~int#1(main_#t~mem69#1.base, 20 + main_#t~mem69#1.offset, 4);call write~$Pointer$#1(main_#t~mem68#1.base, main_#t~mem68#1.offset - main_#t~mem70#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem67#1.base, main_#t~mem67#1.offset;havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1.base, main_#t~mem69#1.offset;havoc main_#t~mem70#1;call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_#t~mem71#1.base, 16 + main_#t~mem71#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem72#1.base, 8 + main_#t~mem72#1.offset, 4);havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem73#1.base, 16 + main_#t~mem73#1.offset, 4);havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;" "assume !false;" "havoc main_~_ha_bkt~0#1;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem75#1 := read~int#1(main_#t~mem74#1.base, 12 + main_#t~mem74#1.offset, 4);main_#t~post76#1 := main_#t~mem75#1;call write~int#1(1 + main_#t~post76#1, main_#t~mem74#1.base, 12 + main_#t~mem74#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset;havoc main_#t~mem75#1;havoc main_#t~post76#1;" "call main_#t~mem77#1.base, main_#t~mem77#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem78#1 := read~int#1(main_#t~mem77#1.base, 4 + main_#t~mem77#1.offset, 4);" "assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem78#1 - 1) % 4294967296;main_#t~bitwise79#1 := 0;" "main_~_ha_bkt~0#1 := main_#t~bitwise79#1;havoc main_#t~mem77#1.base, main_#t~mem77#1.offset;havoc main_#t~mem78#1;havoc main_#t~bitwise79#1;" "assume !false;" "call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem81#1.base, main_#t~mem81#1.offset := read~$Pointer$#1(main_#t~mem80#1.base, main_#t~mem80#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem81#1.base, main_#t~mem81#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;havoc main_#t~mem81#1.base, main_#t~mem81#1.offset;call main_#t~mem82#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post83#1 := main_#t~mem82#1;call write~int#1(1 + main_#t~post83#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem82#1;havoc main_#t~post83#1;call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem84#1.base, main_#t~mem84#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);" "assume main_#t~mem85#1.base != 0 || main_#t~mem85#1.offset != 0;havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;call main_#t~mem86#1.base, main_#t~mem86#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem86#1.base, 12 + main_#t~mem86#1.offset, 4);havoc main_#t~mem86#1.base, main_#t~mem86#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem88#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem87#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short91#1 := main_#t~mem88#1 % 4294967296 >= 10 * (1 + main_#t~mem87#1) % 4294967296;" "assume main_#t~short91#1;call main_#t~mem89#1.base, main_#t~mem89#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem90#1 := read~int#1(main_#t~mem89#1.base, 36 + main_#t~mem89#1.offset, 4);main_#t~short91#1 := 0 == main_#t~mem90#1 % 4294967296;" "assume !main_#t~short91#1;havoc main_#t~mem88#1;havoc main_#t~mem87#1;havoc main_#t~mem89#1.base, main_#t~mem89#1.offset;havoc main_#t~mem90#1;havoc main_#t~short91#1;" "havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset;" "assume !false;" "havoc main_~_ha_bkt~0#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~0#1;" "assume !false;" "main_#t~post156#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post156#1;havoc main_#t~post156#1;" [2024-11-27 20:21:23,877 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-27 20:21:23,877 INFO L85 PathProgramCache]: Analyzing trace with hash 1539, now seen corresponding path program 3 times [2024-11-27 20:21:23,877 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM [2024-11-27 20:21:23,877 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [464523761] [2024-11-27 20:21:23,878 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-27 20:21:23,878 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-27 20:21:23,893 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-27 20:21:23,894 INFO L357 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-27 20:21:23,907 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-27 20:21:23,925 INFO L130 FreeRefinementEngine]: Strategy CAMEL_NO_AM found a feasible trace [2024-11-27 20:21:23,926 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-27 20:21:23,930 INFO L85 PathProgramCache]: Analyzing trace with hash 1604649594, now seen corresponding path program 1 times [2024-11-27 20:21:23,930 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM [2024-11-27 20:21:23,931 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [581042753] [2024-11-27 20:21:23,931 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-27 20:21:23,931 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-27 20:21:24,502 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-27 20:21:25,605 INFO L136 FreeRefinementEngine]: Strategy CAMEL_NO_AM found an infeasible trace [2024-11-27 20:21:25,608 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [581042753] [2024-11-27 20:21:25,608 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [581042753] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-27 20:21:25,608 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [467915194] [2024-11-27 20:21:25,608 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-27 20:21:25,609 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-27 20:21:25,609 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_557b012e-f21c-4559-9fd7-78beeb30f289/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-27 20:21:25,615 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_557b012e-f21c-4559-9fd7-78beeb30f289/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-27 20:21:25,618 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_557b012e-f21c-4559-9fd7-78beeb30f289/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2024-11-27 20:21:26,131 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-27 20:21:26,135 INFO L256 TraceCheckSpWp]: Trace formula consists of 495 conjuncts, 15 conjuncts are in the unsatisfiable core [2024-11-27 20:21:26,141 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-27 20:21:26,468 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-27 20:21:26,885 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [467915194] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-27 20:21:26,886 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-27 20:21:26,886 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 8, 7] total 17 [2024-11-27 20:21:26,886 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [735783649] [2024-11-27 20:21:26,886 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-27 20:21:26,890 INFO L764 eck$LassoCheckResult]: loop already infeasible [2024-11-27 20:21:26,890 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL_NO_AM [2024-11-27 20:21:26,891 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2024-11-27 20:21:26,892 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=51, Invalid=221, Unknown=0, NotChecked=0, Total=272 [2024-11-27 20:21:26,892 INFO L87 Difference]: Start difference. First operand 214 states and 295 transitions. cyclomatic complexity: 84 Second operand has 17 states, 17 states have (on average 8.117647058823529) internal successors, (138), 17 states have internal predecessors, (138), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-27 20:21:30,673 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-27 20:21:30,673 INFO L93 Difference]: Finished difference Result 397 states and 546 transitions. [2024-11-27 20:21:30,673 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 397 states and 546 transitions. [2024-11-27 20:21:30,679 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 390 [2024-11-27 20:21:30,684 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 397 states to 397 states and 546 transitions. [2024-11-27 20:21:30,684 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 397 [2024-11-27 20:21:30,685 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 397 [2024-11-27 20:21:30,686 INFO L73 IsDeterministic]: Start isDeterministic. Operand 397 states and 546 transitions. [2024-11-27 20:21:30,687 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-27 20:21:30,691 INFO L218 hiAutomatonCegarLoop]: Abstraction has 397 states and 546 transitions. [2024-11-27 20:21:30,692 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 397 states and 546 transitions. [2024-11-27 20:21:30,707 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 397 to 255. [2024-11-27 20:21:30,710 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 255 states, 251 states have (on average 1.342629482071713) internal successors, (337), 250 states have internal predecessors, (337), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-27 20:21:30,715 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 255 states to 255 states and 343 transitions. [2024-11-27 20:21:30,715 INFO L240 hiAutomatonCegarLoop]: Abstraction has 255 states and 343 transitions. [2024-11-27 20:21:30,717 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2024-11-27 20:21:30,718 INFO L425 stractBuchiCegarLoop]: Abstraction has 255 states and 343 transitions. [2024-11-27 20:21:30,718 INFO L332 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2024-11-27 20:21:30,719 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 255 states and 343 transitions. [2024-11-27 20:21:30,720 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 248 [2024-11-27 20:21:30,721 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-27 20:21:30,722 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-27 20:21:30,723 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2024-11-27 20:21:30,724 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-27 20:21:30,725 INFO L747 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc4#1.base, main_#t~malloc4#1.offset, main_#t~nondet5#1, main_#t~mem6#1, main_#t~mem8#1, main_#t~mem7#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~bitwise19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~switch28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~bitwise40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc49#1.base, main_#t~malloc49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~memset~res52#1.base, main_#t~memset~res52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~malloc58#1.base, main_#t~malloc58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~memset~res65#1.base, main_#t~memset~res65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1, main_#t~post76#1, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1, main_#t~bitwise79#1, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~post83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem88#1, main_#t~mem87#1, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1, main_#t~short91#1, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1, main_#t~malloc94#1.base, main_#t~malloc94#1.offset, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1, main_#t~memset~res97#1.base, main_#t~memset~res97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem102#1, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1, main_#t~bitwise103#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem107#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1, main_#t~bitwise108#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem118#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1, main_#t~bitwise119#1, main_#t~mem120#1, main_#t~pre121#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem125#1, main_#t~post126#1, main_#t~mem130#1, main_#t~mem128#1, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem129#1, main_#t~mem131#1, main_#t~post132#1, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~post136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem140#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1, main_#t~post143#1, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem149#1, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem148#1, main_#t~ite152#1, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem154#1, main_#t~mem155#1.base, main_#t~mem155#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~post156#1, main_#t~mem157#1, main_#t~mem158#1.base, main_#t~mem158#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~sum~0#1;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~sum~0#1 := 0;main_~i~0#1 := 0;" [2024-11-27 20:21:30,725 INFO L749 eck$LassoCheckResult]: Loop: "assume main_~i~0#1 < 10;" "call main_#t~malloc4#1.base, main_#t~malloc4#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc4#1.base, main_#t~malloc4#1.offset;havoc main_#t~malloc4#1.base, main_#t~malloc4#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call write~int#1(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~nondet5#1;call write~int#1(main_#t~nondet5#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~nondet5#1;call main_#t~mem6#1 := read~int#1(main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);main_~sum~0#1 := main_~sum~0#1 + main_#t~mem6#1;havoc main_#t~mem6#1;" "havoc main_~_ha_hashv~0#1;" "goto;" "havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4;" "assume !(main_~_hj_k~0#1 % 4294967296 >= 12);" "main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch28#1 := 11 == main_~_hj_k~0#1;" "assume !main_#t~switch28#1;" "main_#t~switch28#1 := main_#t~switch28#1 || 10 == main_~_hj_k~0#1;" "assume !main_#t~switch28#1;" "main_#t~switch28#1 := main_#t~switch28#1 || 9 == main_~_hj_k~0#1;" "assume !main_#t~switch28#1;" "main_#t~switch28#1 := main_#t~switch28#1 || 8 == main_~_hj_k~0#1;" "assume !main_#t~switch28#1;" "main_#t~switch28#1 := main_#t~switch28#1 || 7 == main_~_hj_k~0#1;" "assume !main_#t~switch28#1;" "main_#t~switch28#1 := main_#t~switch28#1 || 6 == main_~_hj_k~0#1;" "assume !main_#t~switch28#1;" "main_#t~switch28#1 := main_#t~switch28#1 || 5 == main_~_hj_k~0#1;" "assume !main_#t~switch28#1;" "main_#t~switch28#1 := main_#t~switch28#1 || 4 == main_~_hj_k~0#1;" "assume main_#t~switch28#1;call main_#t~mem36#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem36#1 % 256 % 4294967296);" "main_#t~switch28#1 := main_#t~switch28#1 || 3 == main_~_hj_k~0#1;" "assume main_#t~switch28#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem37#1 % 256 % 4294967296);" "main_#t~switch28#1 := main_#t~switch28#1 || 2 == main_~_hj_k~0#1;" "assume main_#t~switch28#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem38#1 % 256 % 4294967296);" "main_#t~switch28#1 := main_#t~switch28#1 || 1 == main_~_hj_k~0#1;" "assume main_#t~switch28#1;call main_#t~mem39#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem39#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem39#1 % 256 % 4294967296 else main_#t~mem39#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~mem39#1;havoc main_#t~switch28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~mem39#1;" "main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise40#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192;" "main_~_hj_i~0#1 := main_#t~bitwise40#1;havoc main_#t~bitwise40#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume !(0 == main_~_hj_j~0#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296);" "assume !(main_~_hj_j~0#1 % 4294967296 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296);" "havoc main_#t~bitwise41#1;assume main_#t~bitwise41#1 % 4294967296 <= main_~_hj_j~0#1 % 4294967296 + 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296;" "main_~_hj_j~0#1 := main_#t~bitwise41#1;havoc main_#t~bitwise41#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise42#1 := main_~_hj_j~0#1 % 4294967296 / 8192;" "main_~_ha_hashv~0#1 := main_#t~bitwise42#1;havoc main_#t~bitwise42#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise43#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096;" "main_~_hj_i~0#1 := main_#t~bitwise43#1;havoc main_#t~bitwise43#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise44#1 := 65536 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise44#1;havoc main_#t~bitwise44#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise45#1 := main_~_hj_j~0#1 % 4294967296 / 32;" "main_~_ha_hashv~0#1 := main_#t~bitwise45#1;havoc main_#t~bitwise45#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise46#1 := main_~_ha_hashv~0#1 % 4294967296 / 8;" "main_~_hj_i~0#1 := main_#t~bitwise46#1;havoc main_#t~bitwise46#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise47#1 := 1024 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise47#1;havoc main_#t~bitwise47#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise48#1 := main_~_hj_j~0#1 % 4294967296 / 32768;" "main_~_ha_hashv~0#1 := main_#t~bitwise48#1;havoc main_#t~bitwise48#1;" "assume !false;" "havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset;" "assume !false;" "assume !false;" "call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4);" "assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem66#1.base, main_#t~mem66#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset;" "call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_#t~mem67#1.base, 16 + main_#t~mem67#1.offset, 4);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem70#1 := read~int#1(main_#t~mem69#1.base, 20 + main_#t~mem69#1.offset, 4);call write~$Pointer$#1(main_#t~mem68#1.base, main_#t~mem68#1.offset - main_#t~mem70#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem67#1.base, main_#t~mem67#1.offset;havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1.base, main_#t~mem69#1.offset;havoc main_#t~mem70#1;call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_#t~mem71#1.base, 16 + main_#t~mem71#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem72#1.base, 8 + main_#t~mem72#1.offset, 4);havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem73#1.base, 16 + main_#t~mem73#1.offset, 4);havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;" "assume !false;" "havoc main_~_ha_bkt~0#1;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem75#1 := read~int#1(main_#t~mem74#1.base, 12 + main_#t~mem74#1.offset, 4);main_#t~post76#1 := main_#t~mem75#1;call write~int#1(1 + main_#t~post76#1, main_#t~mem74#1.base, 12 + main_#t~mem74#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset;havoc main_#t~mem75#1;havoc main_#t~post76#1;" "call main_#t~mem77#1.base, main_#t~mem77#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem78#1 := read~int#1(main_#t~mem77#1.base, 4 + main_#t~mem77#1.offset, 4);" "assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem78#1 - 1) % 4294967296;main_#t~bitwise79#1 := 0;" "main_~_ha_bkt~0#1 := main_#t~bitwise79#1;havoc main_#t~mem77#1.base, main_#t~mem77#1.offset;havoc main_#t~mem78#1;havoc main_#t~bitwise79#1;" "assume !false;" "call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem81#1.base, main_#t~mem81#1.offset := read~$Pointer$#1(main_#t~mem80#1.base, main_#t~mem80#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem81#1.base, main_#t~mem81#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;havoc main_#t~mem81#1.base, main_#t~mem81#1.offset;call main_#t~mem82#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post83#1 := main_#t~mem82#1;call write~int#1(1 + main_#t~post83#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem82#1;havoc main_#t~post83#1;call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem84#1.base, main_#t~mem84#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);" "assume main_#t~mem85#1.base != 0 || main_#t~mem85#1.offset != 0;havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;call main_#t~mem86#1.base, main_#t~mem86#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem86#1.base, 12 + main_#t~mem86#1.offset, 4);havoc main_#t~mem86#1.base, main_#t~mem86#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem88#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem87#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short91#1 := main_#t~mem88#1 % 4294967296 >= 10 * (1 + main_#t~mem87#1) % 4294967296;" "assume main_#t~short91#1;call main_#t~mem89#1.base, main_#t~mem89#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem90#1 := read~int#1(main_#t~mem89#1.base, 36 + main_#t~mem89#1.offset, 4);main_#t~short91#1 := 0 == main_#t~mem90#1 % 4294967296;" "assume !main_#t~short91#1;havoc main_#t~mem88#1;havoc main_#t~mem87#1;havoc main_#t~mem89#1.base, main_#t~mem89#1.offset;havoc main_#t~mem90#1;havoc main_#t~short91#1;" "havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset;" "assume !false;" "havoc main_~_ha_bkt~0#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~0#1;" "assume !false;" "main_#t~post156#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post156#1;havoc main_#t~post156#1;" [2024-11-27 20:21:30,725 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-27 20:21:30,726 INFO L85 PathProgramCache]: Analyzing trace with hash 1539, now seen corresponding path program 4 times [2024-11-27 20:21:30,726 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM [2024-11-27 20:21:30,726 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1005337030] [2024-11-27 20:21:30,726 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-27 20:21:30,726 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-27 20:21:30,736 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-27 20:21:30,736 INFO L357 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-27 20:21:30,741 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-27 20:21:30,748 INFO L130 FreeRefinementEngine]: Strategy CAMEL_NO_AM found a feasible trace [2024-11-27 20:21:30,748 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-27 20:21:30,749 INFO L85 PathProgramCache]: Analyzing trace with hash -2146891074, now seen corresponding path program 1 times [2024-11-27 20:21:30,749 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM [2024-11-27 20:21:30,749 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1071507960] [2024-11-27 20:21:30,749 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-27 20:21:30,750 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-27 20:21:31,241 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-27 20:21:32,576 INFO L136 FreeRefinementEngine]: Strategy CAMEL_NO_AM found an infeasible trace [2024-11-27 20:21:32,576 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1071507960] [2024-11-27 20:21:32,577 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1071507960] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-27 20:21:32,577 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [929875889] [2024-11-27 20:21:32,577 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-27 20:21:32,577 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-27 20:21:32,577 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_557b012e-f21c-4559-9fd7-78beeb30f289/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-27 20:21:32,583 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_557b012e-f21c-4559-9fd7-78beeb30f289/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-27 20:21:32,586 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_557b012e-f21c-4559-9fd7-78beeb30f289/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2024-11-27 20:21:39,419 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-27 20:21:39,427 INFO L256 TraceCheckSpWp]: Trace formula consists of 495 conjuncts, 28 conjuncts are in the unsatisfiable core [2024-11-27 20:21:39,431 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-27 20:22:02,055 WARN L286 SmtUtils]: Spent 21.60s on a formula simplification that was a NOOP. DAG size: 20 (called from [L 728] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher.simplify) [2024-11-27 20:22:14,251 WARN L286 SmtUtils]: Spent 12.19s on a formula simplification that was a NOOP. DAG size: 24 (called from [L 728] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher.simplify) [2024-11-27 20:22:33,185 WARN L286 SmtUtils]: Spent 18.93s on a formula simplification that was a NOOP. DAG size: 20 (called from [L 728] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher.simplify) [2024-11-27 20:22:46,979 WARN L286 SmtUtils]: Spent 13.26s on a formula simplification that was a NOOP. DAG size: 20 (called from [L 728] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher.simplify) [2024-11-27 20:23:10,996 WARN L286 SmtUtils]: Spent 24.01s on a formula simplification that was a NOOP. DAG size: 24 (called from [L 728] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher.simplify) [2024-11-27 20:23:18,268 WARN L286 SmtUtils]: Spent 7.27s on a formula simplification that was a NOOP. DAG size: 3 (called from [L 728] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher.simplify) [2024-11-27 20:23:42,287 WARN L286 SmtUtils]: Spent 24.02s on a formula simplification that was a NOOP. DAG size: 20 (called from [L 728] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher.simplify) [2024-11-27 20:23:54,351 WARN L286 SmtUtils]: Spent 12.06s on a formula simplification that was a NOOP. DAG size: 3 (called from [L 728] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher.simplify) [2024-11-27 20:24:06,360 WARN L851 $PredicateComparison]: unable to prove that (exists ((v_z_3 Int) (v_y_6 Int)) (let ((.cse3 (mod (+ (* 4294967294 v_z_3) (* 4294950911 |c_ULTIMATE.start_main_~_ha_hashv~0#1|) 4276993779) 4294967296))) (let ((.cse2 (* .cse3 1585335238689546240)) (.cse0 (* 8192 |c_ULTIMATE.start_main_~_ha_hashv~0#1|)) (.cse1 (* v_y_6 2305878193585782784))) (and (<= (+ 6808963003367954993584799745 v_z_3 .cse0 .cse1) .cse2) (<= .cse2 (+ 6808963003367954997879767040 v_z_3 .cse0 .cse1)) (= (+ (* 64425558016 v_y_6) (* .cse3 2952871935) (div (+ (* (- 193522368004095) .cse3) |c_ULTIMATE.start_main_~_ha_hashv~0#1|) 4096) 190240422162160680960) 0) (<= 0 v_z_3) (<= v_z_3 8191))))) is different from false [2024-11-27 20:24:06,740 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-27 20:25:22,291 WARN L286 SmtUtils]: Spent 12.02s on a formula simplification that was a NOOP. DAG size: 15 (called from [L 728] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher.simplify) [2024-11-27 20:25:46,304 WARN L286 SmtUtils]: Spent 24.01s on a formula simplification. DAG size of input: 22 DAG size of output: 1 (called from [L 728] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher.simplify) [2024-11-27 20:25:58,332 WARN L286 SmtUtils]: Spent 12.03s on a formula simplification that was a NOOP. DAG size: 16 (called from [L 728] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher.simplify) [2024-11-27 20:26:22,344 WARN L286 SmtUtils]: Spent 24.01s on a formula simplification that was a NOOP. DAG size: 13 (called from [L 728] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher.simplify) [2024-11-27 20:26:46,356 WARN L286 SmtUtils]: Spent 24.01s on a formula simplification that was a NOOP. DAG size: 12 (called from [L 728] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher.simplify) [2024-11-27 20:27:02,130 WARN L286 SmtUtils]: Spent 15.77s on a formula simplification that was a NOOP. DAG size: 7 (called from [L 728] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher.simplify) [2024-11-27 20:27:14,768 WARN L286 SmtUtils]: Spent 12.64s on a formula simplification that was a NOOP. DAG size: 6 (called from [L 728] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher.simplify) [2024-11-27 20:27:38,968 WARN L286 SmtUtils]: Spent 24.02s on a formula simplification that was a NOOP. DAG size: 20 (called from [L 728] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher.simplify) [2024-11-27 20:27:51,047 WARN L286 SmtUtils]: Spent 12.08s on a formula simplification that was a NOOP. DAG size: 18 (called from [L 728] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher.simplify) [2024-11-27 20:28:15,062 WARN L286 SmtUtils]: Spent 24.01s on a formula simplification that was a NOOP. DAG size: 28 (called from [L 728] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher.simplify) [2024-11-27 20:28:39,084 WARN L286 SmtUtils]: Spent 24.02s on a formula simplification. DAG size of input: 35 DAG size of output: 1 (called from [L 728] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher.simplify) [2024-11-27 20:28:51,116 WARN L286 SmtUtils]: Spent 12.03s on a formula simplification that was a NOOP. DAG size: 18 (called from [L 728] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher.simplify) [2024-11-27 20:29:15,136 WARN L286 SmtUtils]: Spent 24.02s on a formula simplification that was a NOOP. DAG size: 28 (called from [L 728] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher.simplify) [2024-11-27 20:29:39,151 WARN L286 SmtUtils]: Spent 24.01s on a formula simplification that was a NOOP. DAG size: 20 (called from [L 728] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher.simplify) [2024-11-27 20:30:03,175 WARN L286 SmtUtils]: Spent 24.02s on a formula simplification that was a NOOP. DAG size: 25 (called from [L 728] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher.simplify) [2024-11-27 20:30:27,191 WARN L286 SmtUtils]: Spent 24.01s on a formula simplification that was a NOOP. DAG size: 25 (called from [L 728] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher.simplify) [2024-11-27 20:30:51,221 WARN L286 SmtUtils]: Spent 24.03s on a formula simplification. DAG size of input: 18 DAG size of output: 1 (called from [L 728] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher.simplify) [2024-11-27 20:31:15,699 WARN L286 SmtUtils]: Spent 24.02s on a formula simplification that was a NOOP. DAG size: 21 (called from [L 728] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher.simplify) [2024-11-27 20:31:27,815 WARN L286 SmtUtils]: Spent 12.12s on a formula simplification that was a NOOP. DAG size: 18 (called from [L 728] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher.simplify) [2024-11-27 20:31:51,828 WARN L286 SmtUtils]: Spent 24.01s on a formula simplification that was a NOOP. DAG size: 21 (called from [L 728] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher.simplify) [2024-11-27 20:32:04,981 WARN L286 SmtUtils]: Spent 13.15s on a formula simplification that was a NOOP. DAG size: 24 (called from [L 728] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher.simplify) [2024-11-27 20:32:17,330 WARN L286 SmtUtils]: Spent 12.35s on a formula simplification that was a NOOP. DAG size: 24 (called from [L 728] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher.simplify) [2024-11-27 20:32:41,342 WARN L286 SmtUtils]: Spent 24.01s on a formula simplification that was a NOOP. DAG size: 15 (called from [L 728] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher.simplify) [2024-11-27 20:33:05,105 WARN L286 SmtUtils]: Spent 23.76s on a formula simplification. DAG size of input: 15 DAG size of output: 1 (called from [L 728] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher.simplify) [2024-11-27 20:33:32,717 WARN L286 SmtUtils]: Spent 24.02s on a formula simplification that was a NOOP. DAG size: 25 (called from [L 728] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher.simplify) [2024-11-27 20:33:56,729 WARN L286 SmtUtils]: Spent 24.01s on a formula simplification that was a NOOP. DAG size: 25 (called from [L 728] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher.simplify) [2024-11-27 20:34:20,749 WARN L286 SmtUtils]: Spent 24.02s on a formula simplification. DAG size of input: 18 DAG size of output: 1 (called from [L 728] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher.simplify) [2024-11-27 20:34:44,763 WARN L286 SmtUtils]: Spent 24.01s on a formula simplification that was a NOOP. DAG size: 28 (called from [L 728] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher.simplify) [2024-11-27 20:35:08,775 WARN L286 SmtUtils]: Spent 24.01s on a formula simplification that was a NOOP. DAG size: 18 (called from [L 728] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher.simplify) [2024-11-27 20:35:32,804 WARN L286 SmtUtils]: Spent 24.03s on a formula simplification that was a NOOP. DAG size: 18 (called from [L 728] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher.simplify) [2024-11-27 20:35:56,827 WARN L286 SmtUtils]: Spent 24.02s on a formula simplification. DAG size of input: 35 DAG size of output: 1 (called from [L 728] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher.simplify) [2024-11-27 20:36:20,845 WARN L286 SmtUtils]: Spent 24.02s on a formula simplification that was a NOOP. DAG size: 20 (called from [L 728] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher.simplify)