./Ultimate.py --spec ../../sv-benchmarks/c/properties/termination.prp --file ../../sv-benchmarks/c/uthash-2.0.2/uthash_SAX_test6-2.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version d790fecc Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3f86fdff-c6c4-46c5-9202-1e23723ed6cd/bin/uautomizer-verify-aQ6SnzHsRB/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3f86fdff-c6c4-46c5-9202-1e23723ed6cd/bin/uautomizer-verify-aQ6SnzHsRB/plugins/org.eclipse.equinox.launcher_1.6.800.v20240513-1750.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3f86fdff-c6c4-46c5-9202-1e23723ed6cd/bin/uautomizer-verify-aQ6SnzHsRB/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3f86fdff-c6c4-46c5-9202-1e23723ed6cd/bin/uautomizer-verify-aQ6SnzHsRB/config/AutomizerTermination.xml -i ../../sv-benchmarks/c/uthash-2.0.2/uthash_SAX_test6-2.i -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3f86fdff-c6c4-46c5-9202-1e23723ed6cd/bin/uautomizer-verify-aQ6SnzHsRB/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3f86fdff-c6c4-46c5-9202-1e23723ed6cd/bin/uautomizer-verify-aQ6SnzHsRB --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash bb48026e7f870ff561a4cdd394c24cb5edb1d0f2fc8e8ef2bffe0b7b8438fda4 --- Real Ultimate output --- This is Ultimate 0.3.0-dev-d790fec [2024-11-28 02:47:15,265 INFO L188 SettingsManager]: Resetting all preferences to default values... [2024-11-28 02:47:15,379 INFO L114 SettingsManager]: Loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3f86fdff-c6c4-46c5-9202-1e23723ed6cd/bin/uautomizer-verify-aQ6SnzHsRB/config/svcomp-Termination-32bit-Automizer_Default.epf [2024-11-28 02:47:15,389 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2024-11-28 02:47:15,390 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2024-11-28 02:47:15,426 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2024-11-28 02:47:15,428 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2024-11-28 02:47:15,428 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2024-11-28 02:47:15,429 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2024-11-28 02:47:15,429 INFO L153 SettingsManager]: * Use memory slicer=true [2024-11-28 02:47:15,429 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2024-11-28 02:47:15,430 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2024-11-28 02:47:15,430 INFO L153 SettingsManager]: * Use SBE=true [2024-11-28 02:47:15,430 INFO L151 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2024-11-28 02:47:15,431 INFO L153 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2024-11-28 02:47:15,431 INFO L153 SettingsManager]: * Use old map elimination=false [2024-11-28 02:47:15,431 INFO L153 SettingsManager]: * Use external solver (rank synthesis)=false [2024-11-28 02:47:15,432 INFO L153 SettingsManager]: * Use only trivial implications for array writes=true [2024-11-28 02:47:15,432 INFO L153 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2024-11-28 02:47:15,432 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2024-11-28 02:47:15,432 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2024-11-28 02:47:15,433 INFO L153 SettingsManager]: * sizeof long=4 [2024-11-28 02:47:15,433 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2024-11-28 02:47:15,433 INFO L153 SettingsManager]: * sizeof POINTER=4 [2024-11-28 02:47:15,433 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2024-11-28 02:47:15,433 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2024-11-28 02:47:15,433 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2024-11-28 02:47:15,433 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2024-11-28 02:47:15,433 INFO L153 SettingsManager]: * Check unreachability of reach_error function=false [2024-11-28 02:47:15,433 INFO L153 SettingsManager]: * sizeof long double=12 [2024-11-28 02:47:15,433 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2024-11-28 02:47:15,433 INFO L153 SettingsManager]: * Assume nondeterminstic values are in range=false [2024-11-28 02:47:15,433 INFO L153 SettingsManager]: * Behaviour of calls to undefined functions=OVERAPPROXIMATE_BEHAVIOUR [2024-11-28 02:47:15,433 INFO L153 SettingsManager]: * Use constant arrays=true [2024-11-28 02:47:15,434 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2024-11-28 02:47:15,434 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-11-28 02:47:15,434 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2024-11-28 02:47:15,434 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL_NO_AM [2024-11-28 02:47:15,434 INFO L151 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2024-11-28 02:47:15,434 INFO L153 SettingsManager]: * TransformationType=MODULO_NEIGHBOR Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3f86fdff-c6c4-46c5-9202-1e23723ed6cd/bin/uautomizer-verify-aQ6SnzHsRB Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> bb48026e7f870ff561a4cdd394c24cb5edb1d0f2fc8e8ef2bffe0b7b8438fda4 [2024-11-28 02:47:15,775 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2024-11-28 02:47:15,784 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2024-11-28 02:47:15,787 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2024-11-28 02:47:15,788 INFO L270 PluginConnector]: Initializing CDTParser... [2024-11-28 02:47:15,789 INFO L274 PluginConnector]: CDTParser initialized [2024-11-28 02:47:15,790 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3f86fdff-c6c4-46c5-9202-1e23723ed6cd/bin/uautomizer-verify-aQ6SnzHsRB/../../sv-benchmarks/c/uthash-2.0.2/uthash_SAX_test6-2.i [2024-11-28 02:47:18,750 INFO L533 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3f86fdff-c6c4-46c5-9202-1e23723ed6cd/bin/uautomizer-verify-aQ6SnzHsRB/data/b56b48c2c/f2ef092b8ae647b2a8c322df6fe9a4cf/FLAG37aa834e6 [2024-11-28 02:47:19,167 INFO L384 CDTParser]: Found 1 translation units. [2024-11-28 02:47:19,168 INFO L180 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3f86fdff-c6c4-46c5-9202-1e23723ed6cd/sv-benchmarks/c/uthash-2.0.2/uthash_SAX_test6-2.i [2024-11-28 02:47:19,185 INFO L427 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3f86fdff-c6c4-46c5-9202-1e23723ed6cd/bin/uautomizer-verify-aQ6SnzHsRB/data/b56b48c2c/f2ef092b8ae647b2a8c322df6fe9a4cf/FLAG37aa834e6 [2024-11-28 02:47:19,201 INFO L435 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3f86fdff-c6c4-46c5-9202-1e23723ed6cd/bin/uautomizer-verify-aQ6SnzHsRB/data/b56b48c2c/f2ef092b8ae647b2a8c322df6fe9a4cf [2024-11-28 02:47:19,204 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2024-11-28 02:47:19,206 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2024-11-28 02:47:19,207 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2024-11-28 02:47:19,208 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2024-11-28 02:47:19,213 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2024-11-28 02:47:19,214 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.11 02:47:19" (1/1) ... [2024-11-28 02:47:19,214 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@77c0ed91 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 02:47:19, skipping insertion in model container [2024-11-28 02:47:19,215 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.11 02:47:19" (1/1) ... [2024-11-28 02:47:19,258 INFO L175 MainTranslator]: Built tables and reachable declarations [2024-11-28 02:47:20,077 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-11-28 02:47:20,105 INFO L200 MainTranslator]: Completed pre-run [2024-11-28 02:47:20,262 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-11-28 02:47:20,345 INFO L204 MainTranslator]: Completed translation [2024-11-28 02:47:20,346 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 02:47:20 WrapperNode [2024-11-28 02:47:20,346 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2024-11-28 02:47:20,347 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2024-11-28 02:47:20,348 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2024-11-28 02:47:20,348 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2024-11-28 02:47:20,356 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 02:47:20" (1/1) ... [2024-11-28 02:47:20,389 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 02:47:20" (1/1) ... [2024-11-28 02:47:20,475 INFO L138 Inliner]: procedures = 282, calls = 353, calls flagged for inlining = 25, calls inlined = 37, statements flattened = 1768 [2024-11-28 02:47:20,476 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2024-11-28 02:47:20,476 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2024-11-28 02:47:20,477 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2024-11-28 02:47:20,477 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2024-11-28 02:47:20,491 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 02:47:20" (1/1) ... [2024-11-28 02:47:20,491 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 02:47:20" (1/1) ... [2024-11-28 02:47:20,504 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 02:47:20" (1/1) ... [2024-11-28 02:47:20,712 INFO L175 MemorySlicer]: Split 326 memory accesses to 4 slices as follows [2, 19, 271, 34]. 83 percent of accesses are in the largest equivalence class. The 12 initializations are split as follows [2, 10, 0, 0]. The 65 writes are split as follows [0, 3, 58, 4]. [2024-11-28 02:47:20,712 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 02:47:20" (1/1) ... [2024-11-28 02:47:20,713 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 02:47:20" (1/1) ... [2024-11-28 02:47:20,796 INFO L184 PluginConnector]: Executing the observer ReplaceArrayAssignments from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 02:47:20" (1/1) ... [2024-11-28 02:47:20,803 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 02:47:20" (1/1) ... [2024-11-28 02:47:20,828 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 02:47:20" (1/1) ... [2024-11-28 02:47:20,845 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 02:47:20" (1/1) ... [2024-11-28 02:47:20,855 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 02:47:20" (1/1) ... [2024-11-28 02:47:20,881 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2024-11-28 02:47:20,882 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2024-11-28 02:47:20,882 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2024-11-28 02:47:20,882 INFO L274 PluginConnector]: RCFGBuilder initialized [2024-11-28 02:47:20,883 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 02:47:20" (1/1) ... [2024-11-28 02:47:20,895 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-28 02:47:20,914 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3f86fdff-c6c4-46c5-9202-1e23723ed6cd/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 02:47:20,935 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3f86fdff-c6c4-46c5-9202-1e23723ed6cd/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-28 02:47:20,940 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3f86fdff-c6c4-46c5-9202-1e23723ed6cd/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2024-11-28 02:47:20,982 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset#0 [2024-11-28 02:47:20,982 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset#1 [2024-11-28 02:47:20,982 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset#2 [2024-11-28 02:47:20,983 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset#3 [2024-11-28 02:47:20,983 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset#0 [2024-11-28 02:47:20,983 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset#1 [2024-11-28 02:47:20,983 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset#2 [2024-11-28 02:47:20,983 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset#3 [2024-11-28 02:47:20,983 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2024-11-28 02:47:20,983 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$#0 [2024-11-28 02:47:20,983 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$#1 [2024-11-28 02:47:20,984 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$#2 [2024-11-28 02:47:20,984 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$#3 [2024-11-28 02:47:20,984 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2024-11-28 02:47:20,984 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#0 [2024-11-28 02:47:20,985 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#1 [2024-11-28 02:47:20,985 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#2 [2024-11-28 02:47:20,985 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#3 [2024-11-28 02:47:20,985 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#0 [2024-11-28 02:47:20,985 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#1 [2024-11-28 02:47:20,985 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#2 [2024-11-28 02:47:20,985 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#3 [2024-11-28 02:47:20,985 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap [2024-11-28 02:47:20,985 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2024-11-28 02:47:20,986 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$#0 [2024-11-28 02:47:20,986 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$#1 [2024-11-28 02:47:20,986 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$#2 [2024-11-28 02:47:20,986 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$#3 [2024-11-28 02:47:20,986 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#0 [2024-11-28 02:47:20,986 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#1 [2024-11-28 02:47:20,986 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#2 [2024-11-28 02:47:20,986 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#3 [2024-11-28 02:47:20,986 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2024-11-28 02:47:20,986 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2024-11-28 02:47:21,318 INFO L234 CfgBuilder]: Building ICFG [2024-11-28 02:47:21,320 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2024-11-28 02:47:21,326 WARN L773 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2024-11-28 02:47:21,380 WARN L773 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2024-11-28 02:47:21,407 WARN L773 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2024-11-28 02:47:21,433 WARN L773 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2024-11-28 02:47:23,858 INFO L? ?]: Removed 486 outVars from TransFormulas that were not future-live. [2024-11-28 02:47:23,858 INFO L283 CfgBuilder]: Performing block encoding [2024-11-28 02:47:23,881 INFO L307 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2024-11-28 02:47:23,882 INFO L312 CfgBuilder]: Removed 41 assume(true) statements. [2024-11-28 02:47:23,882 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.11 02:47:23 BoogieIcfgContainer [2024-11-28 02:47:23,882 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2024-11-28 02:47:23,883 INFO L112 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2024-11-28 02:47:23,883 INFO L270 PluginConnector]: Initializing BuchiAutomizer... [2024-11-28 02:47:23,890 INFO L274 PluginConnector]: BuchiAutomizer initialized [2024-11-28 02:47:23,891 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2024-11-28 02:47:23,891 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 28.11 02:47:19" (1/3) ... [2024-11-28 02:47:23,892 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@247ef37f and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 28.11 02:47:23, skipping insertion in model container [2024-11-28 02:47:23,893 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2024-11-28 02:47:23,893 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 02:47:20" (2/3) ... [2024-11-28 02:47:23,893 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@247ef37f and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 28.11 02:47:23, skipping insertion in model container [2024-11-28 02:47:23,893 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2024-11-28 02:47:23,893 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.11 02:47:23" (3/3) ... [2024-11-28 02:47:23,895 INFO L363 chiAutomizerObserver]: Analyzing ICFG uthash_SAX_test6-2.i [2024-11-28 02:47:23,986 INFO L300 stractBuchiCegarLoop]: Interprodecural is true [2024-11-28 02:47:23,986 INFO L301 stractBuchiCegarLoop]: Hoare is None [2024-11-28 02:47:23,986 INFO L302 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2024-11-28 02:47:23,986 INFO L303 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2024-11-28 02:47:23,986 INFO L304 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2024-11-28 02:47:23,986 INFO L305 stractBuchiCegarLoop]: Difference is false [2024-11-28 02:47:23,987 INFO L306 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2024-11-28 02:47:23,987 INFO L310 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2024-11-28 02:47:23,994 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 506 states, 501 states have (on average 1.5828343313373254) internal successors, (793), 501 states have internal predecessors, (793), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-28 02:47:24,061 INFO L131 ngComponentsAnalysis]: Automaton has 5 accepting balls. 479 [2024-11-28 02:47:24,066 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-28 02:47:24,066 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-28 02:47:24,075 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2024-11-28 02:47:24,075 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 02:47:24,075 INFO L332 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2024-11-28 02:47:24,077 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 506 states, 501 states have (on average 1.5828343313373254) internal successors, (793), 501 states have internal predecessors, (793), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-28 02:47:24,101 INFO L131 ngComponentsAnalysis]: Automaton has 5 accepting balls. 479 [2024-11-28 02:47:24,102 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-28 02:47:24,102 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-28 02:47:24,102 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2024-11-28 02:47:24,105 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 02:47:24,117 INFO L747 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(21, 2);call #Ultimate.allocInit(40, 3);~#alt_malloc_sizes~0.base, ~#alt_malloc_sizes~0.offset := 3, 0;call write~init~int#1(0, ~#alt_malloc_sizes~0.base, ~#alt_malloc_sizes~0.offset, 4);call write~init~int#1(0, ~#alt_malloc_sizes~0.base, 4 + ~#alt_malloc_sizes~0.offset, 4);call write~init~int#1(0, ~#alt_malloc_sizes~0.base, 8 + ~#alt_malloc_sizes~0.offset, 4);call write~init~int#1(0, ~#alt_malloc_sizes~0.base, 12 + ~#alt_malloc_sizes~0.offset, 4);call write~init~int#1(0, ~#alt_malloc_sizes~0.base, 16 + ~#alt_malloc_sizes~0.offset, 4);call write~init~int#1(0, ~#alt_malloc_sizes~0.base, 20 + ~#alt_malloc_sizes~0.offset, 4);call write~init~int#1(0, ~#alt_malloc_sizes~0.base, 24 + ~#alt_malloc_sizes~0.offset, 4);call write~init~int#1(0, ~#alt_malloc_sizes~0.base, 28 + ~#alt_malloc_sizes~0.offset, 4);call write~init~int#1(0, ~#alt_malloc_sizes~0.base, 32 + ~#alt_malloc_sizes~0.offset, 4);call write~init~int#1(0, ~#alt_malloc_sizes~0.base, 36 + ~#alt_malloc_sizes~0.offset, 4);~alt_malloc_balance~0 := 0;~alt_memcmp_count~0 := 0;~alt_bzero_count~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~mem40#1, main_#t~ret41#1.base, main_#t~ret41#1.offset, main_#t~mem42#1, main_#t~mem43#1, main_#t~mem44#1, main_#t~mem46#1, main_#t~mem45#1, main_#t~mem47#1, main_#t~mem48#1, main_#t~mem50#1, main_#t~mem49#1, main_#t~mem51#1, main_#t~mem52#1, main_#t~mem54#1, main_#t~mem53#1, main_#t~mem55#1, main_#t~mem56#1, main_#t~bitwise57#1, main_#t~bitwise58#1, main_#t~bitwise59#1, main_#t~bitwise60#1, main_#t~bitwise61#1, main_#t~bitwise62#1, main_#t~bitwise63#1, main_#t~bitwise64#1, main_#t~bitwise65#1, main_#t~switch66#1, main_#t~mem67#1, main_#t~mem68#1, main_#t~mem69#1, main_#t~mem70#1, main_#t~mem71#1, main_#t~mem72#1, main_#t~mem73#1, main_#t~mem74#1, main_#t~mem75#1, main_#t~mem76#1, main_#t~mem77#1, main_#t~bitwise78#1, main_#t~bitwise79#1, main_#t~bitwise80#1, main_#t~bitwise81#1, main_#t~bitwise82#1, main_#t~bitwise83#1, main_#t~bitwise84#1, main_#t~bitwise85#1, main_#t~bitwise86#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~ret87#1.base, main_#t~ret87#1.offset, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~ret95#1.base, main_#t~ret95#1.offset, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1, main_#t~mem107#1.base, main_#t~mem107#1.offset, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1, main_#t~post112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1, main_#t~bitwise115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1, main_#t~post119#1, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem124#1, main_#t~mem123#1, main_#t~mem125#1.base, main_#t~mem125#1.offset, main_#t~mem126#1, main_#t~short127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~ret130#1.base, main_#t~ret130#1.offset, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem132#1, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem137#1, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~mem136#1, main_#t~bitwise138#1, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem142#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1, main_#t~bitwise143#1, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem153#1, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1, main_#t~bitwise154#1, main_#t~mem155#1, main_#t~pre156#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_#t~mem160#1, main_#t~post161#1, main_#t~mem165#1, main_#t~mem163#1, main_#t~mem162#1.base, main_#t~mem162#1.offset, main_#t~mem164#1, main_#t~mem166#1, main_#t~post167#1, main_#t~mem168#1.base, main_#t~mem168#1.offset, main_#t~mem169#1.base, main_#t~mem169#1.offset, main_#t~mem170#1.base, main_#t~mem170#1.offset, main_#t~post171#1, main_#t~mem172#1.base, main_#t~mem172#1.offset, main_#t~mem173#1.base, main_#t~mem173#1.offset, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1, main_#t~mem176#1.base, main_#t~mem176#1.offset, main_#t~mem177#1, main_#t~mem178#1.base, main_#t~mem178#1.offset, main_#t~mem179#1, main_#t~post180#1, main_#t~mem181#1.base, main_#t~mem181#1.offset, main_#t~mem182#1.base, main_#t~mem182#1.offset, main_#t~mem183#1.base, main_#t~mem183#1.offset, main_#t~mem186#1, main_#t~mem184#1.base, main_#t~mem184#1.offset, main_#t~mem185#1, main_#t~ite189#1, main_#t~mem187#1.base, main_#t~mem187#1.offset, main_#t~mem188#1, main_#t~mem190#1.base, main_#t~mem190#1.offset, main_#t~mem191#1, main_#t~mem192#1.base, main_#t~mem192#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem193#1, main_#t~post194#1, main_#t~mem195#1, main_#t~mem197#1, main_#t~mem196#1, main_#t~mem198#1, main_#t~mem199#1, main_#t~mem201#1, main_#t~mem200#1, main_#t~mem202#1, main_#t~mem203#1, main_#t~mem205#1, main_#t~mem204#1, main_#t~mem206#1, main_#t~mem207#1, main_#t~bitwise208#1, main_#t~bitwise209#1, main_#t~bitwise210#1, main_#t~bitwise211#1, main_#t~bitwise212#1, main_#t~bitwise213#1, main_#t~bitwise214#1, main_#t~bitwise215#1, main_#t~bitwise216#1, main_#t~switch217#1, main_#t~mem218#1, main_#t~mem219#1, main_#t~mem220#1, main_#t~mem221#1, main_#t~mem222#1, main_#t~mem223#1, main_#t~mem224#1, main_#t~mem225#1, main_#t~mem226#1, main_#t~mem227#1, main_#t~mem228#1, main_#t~bitwise229#1, main_#t~bitwise230#1, main_#t~bitwise231#1, main_#t~bitwise232#1, main_#t~bitwise233#1, main_#t~bitwise234#1, main_#t~bitwise235#1, main_#t~bitwise236#1, main_#t~bitwise237#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1, main_#t~bitwise240#1, main_#t~mem241#1.base, main_#t~mem241#1.offset, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1, main_#t~mem249#1, main_#t~mem250#1, main_#t~short251#1, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~ret253#1, main_#t~mem254#1.base, main_#t~mem254#1.offset, main_#t~mem255#1.base, main_#t~mem255#1.offset, main_#t~mem256#1.base, main_#t~mem256#1.offset, main_#t~mem257#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1.base, main_#t~mem259#1.offset, main_#t~short260#1, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~mem271#1, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1.base, main_#t~mem273#1.offset, main_#t~mem274#1.base, main_#t~mem274#1.offset, main_#t~mem275#1, main_#t~mem276#1.base, main_#t~mem276#1.offset, main_#t~mem277#1.base, main_#t~mem277#1.offset, main_#t~mem278#1.base, main_#t~mem278#1.offset, main_#t~mem279#1.base, main_#t~mem279#1.offset, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem281#1, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem285#1, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~mem284#1, main_#t~bitwise286#1, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~mem289#1, main_#t~post290#1, main_#t~mem291#1.base, main_#t~mem291#1.offset, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1.base, main_#t~mem296#1.offset, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem300#1, main_#t~post301#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem302#1, main_#t~post303#1, main_#t~mem304#1.base, main_#t~mem304#1.offset, main_#t~ite306#1.base, main_#t~ite306#1.offset, main_#t~mem305#1.base, main_#t~mem305#1.offset, main_#t~mem307#1.base, main_#t~mem307#1.offset, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~short309#1, main_#t~mem310#1.base, main_#t~mem310#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1.base, main_#t~mem312#1.offset, main_#t~mem313#1, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~mem315#1.base, main_#t~mem315#1.offset, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~mem317#1.base, main_#t~mem317#1.offset, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_#t~mem319#1.base, main_#t~mem319#1.offset, main_#t~mem320#1, main_#t~mem321#1.base, main_#t~mem321#1.offset, main_#t~mem322#1.base, main_#t~mem322#1.offset, main_#t~mem323#1.base, main_#t~mem323#1.offset, main_#t~mem324#1, main_#t~mem325#1.base, main_#t~mem325#1.offset, main_#t~mem326#1.base, main_#t~mem326#1.offset, main_#t~mem327#1.base, main_#t~mem327#1.offset, main_#t~mem328#1.base, main_#t~mem328#1.offset, main_#t~mem329#1.base, main_#t~mem329#1.offset, main_#t~mem330#1, main_#t~mem331#1.base, main_#t~mem331#1.offset, main_#t~mem334#1, main_#t~mem332#1.base, main_#t~mem332#1.offset, main_#t~mem333#1, main_#t~bitwise335#1, main_#t~mem336#1.base, main_#t~mem336#1.offset, main_#t~mem337#1.base, main_#t~mem337#1.offset, main_#t~mem338#1, main_#t~post339#1, main_#t~mem340#1.base, main_#t~mem340#1.offset, main_#t~mem341#1.base, main_#t~mem341#1.offset, main_#t~mem342#1.base, main_#t~mem342#1.offset, main_#t~mem343#1.base, main_#t~mem343#1.offset, main_#t~mem344#1.base, main_#t~mem344#1.offset, main_#t~mem345#1.base, main_#t~mem345#1.offset, main_#t~mem346#1.base, main_#t~mem346#1.offset, main_#t~mem347#1.base, main_#t~mem347#1.offset, main_~_hd_head~1#1.base, main_~_hd_head~1#1.offset, main_#t~mem348#1.base, main_#t~mem348#1.offset, main_#t~mem349#1, main_#t~post350#1, main_~_hd_bkt~1#1, main_~_hd_hh_del~1#1.base, main_~_hd_hh_del~1#1.offset, main_#t~ite352#1.base, main_#t~ite352#1.offset, main_#t~mem351#1.base, main_#t~mem351#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int#3(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4);" [2024-11-28 02:47:24,118 INFO L749 eck$LassoCheckResult]: Loop: "call main_#t~mem40#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume main_#t~mem40#1 < 10;havoc main_#t~mem40#1;" "assume { :begin_inline_real_malloc } true;real_malloc_#in~n#1 := 40;havoc real_malloc_#res#1.base, real_malloc_#res#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset, real_malloc_~n#1;real_malloc_~n#1 := real_malloc_#in~n#1;call real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset := #Ultimate.allocOnHeap(real_malloc_~n#1 % 4294967296);real_malloc_#res#1.base, real_malloc_#res#1.offset := real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset;" "main_#t~ret41#1.base, main_#t~ret41#1.offset := real_malloc_#res#1.base, real_malloc_#res#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset, real_malloc_~n#1;havoc real_malloc_#in~n#1;assume { :end_inline_real_malloc } true;main_~user~0#1.base, main_~user~0#1.offset := main_#t~ret41#1.base, main_#t~ret41#1.offset;havoc main_#t~ret41#1.base, main_#t~ret41#1.offset;" "assume main_~user~0#1.base == 0 && main_~user~0#1.offset == 0;assume false;" "call main_#t~mem42#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem42#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem42#1;call main_#t~mem43#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem44#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem43#1 * main_#t~mem44#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem43#1;havoc main_#t~mem44#1;" "assume !true;" "call main_#t~mem193#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post194#1 := main_#t~mem193#1;call write~int#3(1 + main_#t~post194#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem193#1;havoc main_#t~post194#1;" [2024-11-28 02:47:24,124 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 02:47:24,128 INFO L85 PathProgramCache]: Analyzing trace with hash 2115, now seen corresponding path program 1 times [2024-11-28 02:47:24,140 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM [2024-11-28 02:47:24,141 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1265777956] [2024-11-28 02:47:24,141 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:47:24,142 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 02:47:24,298 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-28 02:47:24,299 INFO L357 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-28 02:47:24,335 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-28 02:47:24,375 INFO L130 FreeRefinementEngine]: Strategy CAMEL_NO_AM found a feasible trace [2024-11-28 02:47:24,378 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 02:47:24,378 INFO L85 PathProgramCache]: Analyzing trace with hash 1110717004, now seen corresponding path program 1 times [2024-11-28 02:47:24,379 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM [2024-11-28 02:47:24,379 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [362082982] [2024-11-28 02:47:24,379 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:47:24,379 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 02:47:24,406 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 02:47:24,471 INFO L136 FreeRefinementEngine]: Strategy CAMEL_NO_AM found an infeasible trace [2024-11-28 02:47:24,472 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [362082982] [2024-11-28 02:47:24,472 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [362082982] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-28 02:47:24,472 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [828192843] [2024-11-28 02:47:24,472 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:47:24,473 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-28 02:47:24,473 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3f86fdff-c6c4-46c5-9202-1e23723ed6cd/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 02:47:24,480 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3f86fdff-c6c4-46c5-9202-1e23723ed6cd/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-28 02:47:24,481 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3f86fdff-c6c4-46c5-9202-1e23723ed6cd/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2024-11-28 02:47:24,686 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 02:47:24,688 INFO L256 TraceCheckSpWp]: Trace formula consists of 79 conjuncts, 1 conjuncts are in the unsatisfiable core [2024-11-28 02:47:24,689 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-28 02:47:24,695 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-28 02:47:24,699 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [828192843] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-28 02:47:24,701 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-28 02:47:24,701 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [2, 2, 2] total 2 [2024-11-28 02:47:24,702 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1377322203] [2024-11-28 02:47:24,703 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-28 02:47:24,706 INFO L764 eck$LassoCheckResult]: loop already infeasible [2024-11-28 02:47:24,707 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL_NO_AM [2024-11-28 02:47:24,742 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2024-11-28 02:47:24,743 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2024-11-28 02:47:24,748 INFO L87 Difference]: Start difference. First operand has 506 states, 501 states have (on average 1.5828343313373254) internal successors, (793), 501 states have internal predecessors, (793), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Second operand has 2 states, 2 states have (on average 4.0) internal successors, (8), 2 states have internal predecessors, (8), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 02:47:24,802 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 02:47:24,803 INFO L93 Difference]: Finished difference Result 488 states and 677 transitions. [2024-11-28 02:47:24,804 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 488 states and 677 transitions. [2024-11-28 02:47:24,815 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 452 [2024-11-28 02:47:24,832 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 488 states to 470 states and 659 transitions. [2024-11-28 02:47:24,833 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 470 [2024-11-28 02:47:24,835 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 470 [2024-11-28 02:47:24,836 INFO L73 IsDeterministic]: Start isDeterministic. Operand 470 states and 659 transitions. [2024-11-28 02:47:24,839 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-28 02:47:24,839 INFO L218 hiAutomatonCegarLoop]: Abstraction has 470 states and 659 transitions. [2024-11-28 02:47:24,861 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 470 states and 659 transitions. [2024-11-28 02:47:24,888 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 470 to 470. [2024-11-28 02:47:24,889 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 470 states, 466 states have (on average 1.4012875536480687) internal successors, (653), 465 states have internal predecessors, (653), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-28 02:47:24,892 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 470 states to 470 states and 659 transitions. [2024-11-28 02:47:24,894 INFO L240 hiAutomatonCegarLoop]: Abstraction has 470 states and 659 transitions. [2024-11-28 02:47:24,894 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-11-28 02:47:24,898 INFO L425 stractBuchiCegarLoop]: Abstraction has 470 states and 659 transitions. [2024-11-28 02:47:24,898 INFO L332 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2024-11-28 02:47:24,898 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 470 states and 659 transitions. [2024-11-28 02:47:24,901 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 452 [2024-11-28 02:47:24,901 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-28 02:47:24,901 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-28 02:47:24,903 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2024-11-28 02:47:24,903 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 02:47:24,903 INFO L747 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(21, 2);call #Ultimate.allocInit(40, 3);~#alt_malloc_sizes~0.base, ~#alt_malloc_sizes~0.offset := 3, 0;call write~init~int#1(0, ~#alt_malloc_sizes~0.base, ~#alt_malloc_sizes~0.offset, 4);call write~init~int#1(0, ~#alt_malloc_sizes~0.base, 4 + ~#alt_malloc_sizes~0.offset, 4);call write~init~int#1(0, ~#alt_malloc_sizes~0.base, 8 + ~#alt_malloc_sizes~0.offset, 4);call write~init~int#1(0, ~#alt_malloc_sizes~0.base, 12 + ~#alt_malloc_sizes~0.offset, 4);call write~init~int#1(0, ~#alt_malloc_sizes~0.base, 16 + ~#alt_malloc_sizes~0.offset, 4);call write~init~int#1(0, ~#alt_malloc_sizes~0.base, 20 + ~#alt_malloc_sizes~0.offset, 4);call write~init~int#1(0, ~#alt_malloc_sizes~0.base, 24 + ~#alt_malloc_sizes~0.offset, 4);call write~init~int#1(0, ~#alt_malloc_sizes~0.base, 28 + ~#alt_malloc_sizes~0.offset, 4);call write~init~int#1(0, ~#alt_malloc_sizes~0.base, 32 + ~#alt_malloc_sizes~0.offset, 4);call write~init~int#1(0, ~#alt_malloc_sizes~0.base, 36 + ~#alt_malloc_sizes~0.offset, 4);~alt_malloc_balance~0 := 0;~alt_memcmp_count~0 := 0;~alt_bzero_count~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~mem40#1, main_#t~ret41#1.base, main_#t~ret41#1.offset, main_#t~mem42#1, main_#t~mem43#1, main_#t~mem44#1, main_#t~mem46#1, main_#t~mem45#1, main_#t~mem47#1, main_#t~mem48#1, main_#t~mem50#1, main_#t~mem49#1, main_#t~mem51#1, main_#t~mem52#1, main_#t~mem54#1, main_#t~mem53#1, main_#t~mem55#1, main_#t~mem56#1, main_#t~bitwise57#1, main_#t~bitwise58#1, main_#t~bitwise59#1, main_#t~bitwise60#1, main_#t~bitwise61#1, main_#t~bitwise62#1, main_#t~bitwise63#1, main_#t~bitwise64#1, main_#t~bitwise65#1, main_#t~switch66#1, main_#t~mem67#1, main_#t~mem68#1, main_#t~mem69#1, main_#t~mem70#1, main_#t~mem71#1, main_#t~mem72#1, main_#t~mem73#1, main_#t~mem74#1, main_#t~mem75#1, main_#t~mem76#1, main_#t~mem77#1, main_#t~bitwise78#1, main_#t~bitwise79#1, main_#t~bitwise80#1, main_#t~bitwise81#1, main_#t~bitwise82#1, main_#t~bitwise83#1, main_#t~bitwise84#1, main_#t~bitwise85#1, main_#t~bitwise86#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~ret87#1.base, main_#t~ret87#1.offset, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~ret95#1.base, main_#t~ret95#1.offset, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1, main_#t~mem107#1.base, main_#t~mem107#1.offset, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1, main_#t~post112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1, main_#t~bitwise115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1, main_#t~post119#1, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem124#1, main_#t~mem123#1, main_#t~mem125#1.base, main_#t~mem125#1.offset, main_#t~mem126#1, main_#t~short127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~ret130#1.base, main_#t~ret130#1.offset, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem132#1, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem137#1, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~mem136#1, main_#t~bitwise138#1, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem142#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1, main_#t~bitwise143#1, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem153#1, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1, main_#t~bitwise154#1, main_#t~mem155#1, main_#t~pre156#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_#t~mem160#1, main_#t~post161#1, main_#t~mem165#1, main_#t~mem163#1, main_#t~mem162#1.base, main_#t~mem162#1.offset, main_#t~mem164#1, main_#t~mem166#1, main_#t~post167#1, main_#t~mem168#1.base, main_#t~mem168#1.offset, main_#t~mem169#1.base, main_#t~mem169#1.offset, main_#t~mem170#1.base, main_#t~mem170#1.offset, main_#t~post171#1, main_#t~mem172#1.base, main_#t~mem172#1.offset, main_#t~mem173#1.base, main_#t~mem173#1.offset, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1, main_#t~mem176#1.base, main_#t~mem176#1.offset, main_#t~mem177#1, main_#t~mem178#1.base, main_#t~mem178#1.offset, main_#t~mem179#1, main_#t~post180#1, main_#t~mem181#1.base, main_#t~mem181#1.offset, main_#t~mem182#1.base, main_#t~mem182#1.offset, main_#t~mem183#1.base, main_#t~mem183#1.offset, main_#t~mem186#1, main_#t~mem184#1.base, main_#t~mem184#1.offset, main_#t~mem185#1, main_#t~ite189#1, main_#t~mem187#1.base, main_#t~mem187#1.offset, main_#t~mem188#1, main_#t~mem190#1.base, main_#t~mem190#1.offset, main_#t~mem191#1, main_#t~mem192#1.base, main_#t~mem192#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem193#1, main_#t~post194#1, main_#t~mem195#1, main_#t~mem197#1, main_#t~mem196#1, main_#t~mem198#1, main_#t~mem199#1, main_#t~mem201#1, main_#t~mem200#1, main_#t~mem202#1, main_#t~mem203#1, main_#t~mem205#1, main_#t~mem204#1, main_#t~mem206#1, main_#t~mem207#1, main_#t~bitwise208#1, main_#t~bitwise209#1, main_#t~bitwise210#1, main_#t~bitwise211#1, main_#t~bitwise212#1, main_#t~bitwise213#1, main_#t~bitwise214#1, main_#t~bitwise215#1, main_#t~bitwise216#1, main_#t~switch217#1, main_#t~mem218#1, main_#t~mem219#1, main_#t~mem220#1, main_#t~mem221#1, main_#t~mem222#1, main_#t~mem223#1, main_#t~mem224#1, main_#t~mem225#1, main_#t~mem226#1, main_#t~mem227#1, main_#t~mem228#1, main_#t~bitwise229#1, main_#t~bitwise230#1, main_#t~bitwise231#1, main_#t~bitwise232#1, main_#t~bitwise233#1, main_#t~bitwise234#1, main_#t~bitwise235#1, main_#t~bitwise236#1, main_#t~bitwise237#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1, main_#t~bitwise240#1, main_#t~mem241#1.base, main_#t~mem241#1.offset, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1, main_#t~mem249#1, main_#t~mem250#1, main_#t~short251#1, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~ret253#1, main_#t~mem254#1.base, main_#t~mem254#1.offset, main_#t~mem255#1.base, main_#t~mem255#1.offset, main_#t~mem256#1.base, main_#t~mem256#1.offset, main_#t~mem257#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1.base, main_#t~mem259#1.offset, main_#t~short260#1, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~mem271#1, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1.base, main_#t~mem273#1.offset, main_#t~mem274#1.base, main_#t~mem274#1.offset, main_#t~mem275#1, main_#t~mem276#1.base, main_#t~mem276#1.offset, main_#t~mem277#1.base, main_#t~mem277#1.offset, main_#t~mem278#1.base, main_#t~mem278#1.offset, main_#t~mem279#1.base, main_#t~mem279#1.offset, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem281#1, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem285#1, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~mem284#1, main_#t~bitwise286#1, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~mem289#1, main_#t~post290#1, main_#t~mem291#1.base, main_#t~mem291#1.offset, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1.base, main_#t~mem296#1.offset, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem300#1, main_#t~post301#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem302#1, main_#t~post303#1, main_#t~mem304#1.base, main_#t~mem304#1.offset, main_#t~ite306#1.base, main_#t~ite306#1.offset, main_#t~mem305#1.base, main_#t~mem305#1.offset, main_#t~mem307#1.base, main_#t~mem307#1.offset, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~short309#1, main_#t~mem310#1.base, main_#t~mem310#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1.base, main_#t~mem312#1.offset, main_#t~mem313#1, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~mem315#1.base, main_#t~mem315#1.offset, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~mem317#1.base, main_#t~mem317#1.offset, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_#t~mem319#1.base, main_#t~mem319#1.offset, main_#t~mem320#1, main_#t~mem321#1.base, main_#t~mem321#1.offset, main_#t~mem322#1.base, main_#t~mem322#1.offset, main_#t~mem323#1.base, main_#t~mem323#1.offset, main_#t~mem324#1, main_#t~mem325#1.base, main_#t~mem325#1.offset, main_#t~mem326#1.base, main_#t~mem326#1.offset, main_#t~mem327#1.base, main_#t~mem327#1.offset, main_#t~mem328#1.base, main_#t~mem328#1.offset, main_#t~mem329#1.base, main_#t~mem329#1.offset, main_#t~mem330#1, main_#t~mem331#1.base, main_#t~mem331#1.offset, main_#t~mem334#1, main_#t~mem332#1.base, main_#t~mem332#1.offset, main_#t~mem333#1, main_#t~bitwise335#1, main_#t~mem336#1.base, main_#t~mem336#1.offset, main_#t~mem337#1.base, main_#t~mem337#1.offset, main_#t~mem338#1, main_#t~post339#1, main_#t~mem340#1.base, main_#t~mem340#1.offset, main_#t~mem341#1.base, main_#t~mem341#1.offset, main_#t~mem342#1.base, main_#t~mem342#1.offset, main_#t~mem343#1.base, main_#t~mem343#1.offset, main_#t~mem344#1.base, main_#t~mem344#1.offset, main_#t~mem345#1.base, main_#t~mem345#1.offset, main_#t~mem346#1.base, main_#t~mem346#1.offset, main_#t~mem347#1.base, main_#t~mem347#1.offset, main_~_hd_head~1#1.base, main_~_hd_head~1#1.offset, main_#t~mem348#1.base, main_#t~mem348#1.offset, main_#t~mem349#1, main_#t~post350#1, main_~_hd_bkt~1#1, main_~_hd_hh_del~1#1.base, main_~_hd_hh_del~1#1.offset, main_#t~ite352#1.base, main_#t~ite352#1.offset, main_#t~mem351#1.base, main_#t~mem351#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int#3(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4);" [2024-11-28 02:47:24,904 INFO L749 eck$LassoCheckResult]: Loop: "call main_#t~mem40#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume main_#t~mem40#1 < 10;havoc main_#t~mem40#1;" "assume { :begin_inline_real_malloc } true;real_malloc_#in~n#1 := 40;havoc real_malloc_#res#1.base, real_malloc_#res#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset, real_malloc_~n#1;real_malloc_~n#1 := real_malloc_#in~n#1;call real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset := #Ultimate.allocOnHeap(real_malloc_~n#1 % 4294967296);real_malloc_#res#1.base, real_malloc_#res#1.offset := real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset;" "main_#t~ret41#1.base, main_#t~ret41#1.offset := real_malloc_#res#1.base, real_malloc_#res#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset, real_malloc_~n#1;havoc real_malloc_#in~n#1;assume { :end_inline_real_malloc } true;main_~user~0#1.base, main_~user~0#1.offset := main_#t~ret41#1.base, main_#t~ret41#1.offset;havoc main_#t~ret41#1.base, main_#t~ret41#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call main_#t~mem42#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem42#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem42#1;call main_#t~mem43#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem44#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem43#1 * main_#t~mem44#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem43#1;havoc main_#t~mem44#1;" "havoc main_~_ha_hashv~0#1;" "goto;" "havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4;" "assume !(main_~_hj_k~0#1 % 4294967296 >= 12);" "main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch66#1 := 11 == main_~_hj_k~0#1;" "assume main_#t~switch66#1;call main_#t~mem67#1 := read~int#2(main_~_hj_key~0#1.base, 10 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 16777216 * (main_#t~mem67#1 % 256 % 4294967296);" "main_#t~switch66#1 := main_#t~switch66#1 || 10 == main_~_hj_k~0#1;" "assume main_#t~switch66#1;call main_#t~mem68#1 := read~int#2(main_~_hj_key~0#1.base, 9 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 65536 * (main_#t~mem68#1 % 256 % 4294967296);" "main_#t~switch66#1 := main_#t~switch66#1 || 9 == main_~_hj_k~0#1;" "assume main_#t~switch66#1;call main_#t~mem69#1 := read~int#2(main_~_hj_key~0#1.base, 8 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 256 * (main_#t~mem69#1 % 256 % 4294967296);" "main_#t~switch66#1 := main_#t~switch66#1 || 8 == main_~_hj_k~0#1;" "assume main_#t~switch66#1;call main_#t~mem70#1 := read~int#2(main_~_hj_key~0#1.base, 7 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 16777216 * (main_#t~mem70#1 % 256 % 4294967296);" "main_#t~switch66#1 := main_#t~switch66#1 || 7 == main_~_hj_k~0#1;" "assume main_#t~switch66#1;call main_#t~mem71#1 := read~int#2(main_~_hj_key~0#1.base, 6 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 65536 * (main_#t~mem71#1 % 256 % 4294967296);" "main_#t~switch66#1 := main_#t~switch66#1 || 6 == main_~_hj_k~0#1;" "assume main_#t~switch66#1;call main_#t~mem72#1 := read~int#2(main_~_hj_key~0#1.base, 5 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 256 * (main_#t~mem72#1 % 256 % 4294967296);" "main_#t~switch66#1 := main_#t~switch66#1 || 5 == main_~_hj_k~0#1;" "assume main_#t~switch66#1;call main_#t~mem73#1 := read~int#2(main_~_hj_key~0#1.base, 4 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + (if main_#t~mem73#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem73#1 % 256 % 4294967296 else main_#t~mem73#1 % 256 % 4294967296 - 4294967296);" "main_#t~switch66#1 := main_#t~switch66#1 || 4 == main_~_hj_k~0#1;" "assume main_#t~switch66#1;call main_#t~mem74#1 := read~int#2(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem74#1 % 256 % 4294967296);" "main_#t~switch66#1 := main_#t~switch66#1 || 3 == main_~_hj_k~0#1;" "assume !main_#t~switch66#1;" "main_#t~switch66#1 := main_#t~switch66#1 || 2 == main_~_hj_k~0#1;" "assume main_#t~switch66#1;call main_#t~mem76#1 := read~int#2(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem76#1 % 256 % 4294967296);" "main_#t~switch66#1 := main_#t~switch66#1 || 1 == main_~_hj_k~0#1;" "assume main_#t~switch66#1;call main_#t~mem77#1 := read~int#2(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem77#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem77#1 % 256 % 4294967296 else main_#t~mem77#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch66#1;havoc main_#t~mem67#1;havoc main_#t~mem68#1;havoc main_#t~mem69#1;havoc main_#t~mem70#1;havoc main_#t~mem71#1;havoc main_#t~mem72#1;havoc main_#t~mem73#1;havoc main_#t~mem74#1;havoc main_#t~mem75#1;havoc main_#t~mem76#1;havoc main_#t~mem77#1;havoc main_#t~switch66#1;havoc main_#t~mem67#1;havoc main_#t~mem68#1;havoc main_#t~mem69#1;havoc main_#t~mem70#1;havoc main_#t~mem71#1;havoc main_#t~mem72#1;havoc main_#t~mem73#1;havoc main_#t~mem74#1;havoc main_#t~mem75#1;havoc main_#t~mem76#1;havoc main_#t~mem77#1;" "main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise78#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192;" "main_~_hj_i~0#1 := main_#t~bitwise78#1;havoc main_#t~bitwise78#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise79#1 := 256 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise79#1;havoc main_#t~bitwise79#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise80#1 := main_~_hj_j~0#1 % 4294967296 / 8192;" "main_~_ha_hashv~0#1 := main_#t~bitwise80#1;havoc main_#t~bitwise80#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise81#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096;" "main_~_hj_i~0#1 := main_#t~bitwise81#1;havoc main_#t~bitwise81#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise82#1 := 65536 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise82#1;havoc main_#t~bitwise82#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise83#1 := main_~_hj_j~0#1 % 4294967296 / 32;" "main_~_ha_hashv~0#1 := main_#t~bitwise83#1;havoc main_#t~bitwise83#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise84#1 := main_~_ha_hashv~0#1 % 4294967296 / 8;" "main_~_hj_i~0#1 := main_#t~bitwise84#1;havoc main_#t~bitwise84#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise85#1 := 1024 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise85#1;havoc main_#t~bitwise85#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise86#1 := main_~_hj_j~0#1 % 4294967296 / 32768;" "main_~_ha_hashv~0#1 := main_#t~bitwise86#1;havoc main_#t~bitwise86#1;" "assume !false;" "havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset;" "assume !false;" "assume !false;" "call write~int#2(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#2(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4);" "assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem102#1.base, main_#t~mem102#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#2(main_#t~mem102#1.base, main_#t~mem102#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem102#1.base, main_#t~mem102#1.offset;" "call write~$Pointer$#2(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem103#1.base, main_#t~mem103#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem104#1.base, main_#t~mem104#1.offset := read~$Pointer$#2(main_#t~mem103#1.base, 16 + main_#t~mem103#1.offset, 4);call main_#t~mem105#1.base, main_#t~mem105#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem106#1 := read~int#2(main_#t~mem105#1.base, 20 + main_#t~mem105#1.offset, 4);call write~$Pointer$#2(main_#t~mem104#1.base, main_#t~mem104#1.offset - main_#t~mem106#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem103#1.base, main_#t~mem103#1.offset;havoc main_#t~mem104#1.base, main_#t~mem104#1.offset;havoc main_#t~mem105#1.base, main_#t~mem105#1.offset;havoc main_#t~mem106#1;call main_#t~mem107#1.base, main_#t~mem107#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem108#1.base, main_#t~mem108#1.offset := read~$Pointer$#2(main_#t~mem107#1.base, 16 + main_#t~mem107#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem108#1.base, 8 + main_#t~mem108#1.offset, 4);havoc main_#t~mem107#1.base, main_#t~mem107#1.offset;havoc main_#t~mem108#1.base, main_#t~mem108#1.offset;call main_#t~mem109#1.base, main_#t~mem109#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem109#1.base, 16 + main_#t~mem109#1.offset, 4);havoc main_#t~mem109#1.base, main_#t~mem109#1.offset;" "assume !false;" "havoc main_~_ha_bkt~0#1;call main_#t~mem110#1.base, main_#t~mem110#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem111#1 := read~int#2(main_#t~mem110#1.base, 12 + main_#t~mem110#1.offset, 4);main_#t~post112#1 := main_#t~mem111#1;call write~int#2(1 + main_#t~post112#1, main_#t~mem110#1.base, 12 + main_#t~mem110#1.offset, 4);havoc main_#t~mem110#1.base, main_#t~mem110#1.offset;havoc main_#t~mem111#1;havoc main_#t~post112#1;" "call main_#t~mem113#1.base, main_#t~mem113#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem114#1 := read~int#2(main_#t~mem113#1.base, 4 + main_#t~mem113#1.offset, 4);" "assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem114#1 - 1) % 4294967296;main_#t~bitwise115#1 := 0;" "main_~_ha_bkt~0#1 := main_#t~bitwise115#1;havoc main_#t~mem113#1.base, main_#t~mem113#1.offset;havoc main_#t~mem114#1;havoc main_#t~bitwise115#1;" "assume !false;" "call main_#t~mem116#1.base, main_#t~mem116#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem117#1.base, main_#t~mem117#1.offset := read~$Pointer$#2(main_#t~mem116#1.base, main_#t~mem116#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem117#1.base, main_#t~mem117#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem116#1.base, main_#t~mem116#1.offset;havoc main_#t~mem117#1.base, main_#t~mem117#1.offset;call main_#t~mem118#1 := read~int#2(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post119#1 := main_#t~mem118#1;call write~int#2(1 + main_#t~post119#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem118#1;havoc main_#t~post119#1;call main_#t~mem120#1.base, main_#t~mem120#1.offset := read~$Pointer$#2(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#2(main_#t~mem120#1.base, main_#t~mem120#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem120#1.base, main_#t~mem120#1.offset;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem121#1.base, main_#t~mem121#1.offset := read~$Pointer$#2(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);" "assume main_#t~mem121#1.base != 0 || main_#t~mem121#1.offset != 0;havoc main_#t~mem121#1.base, main_#t~mem121#1.offset;call main_#t~mem122#1.base, main_#t~mem122#1.offset := read~$Pointer$#2(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem122#1.base, 12 + main_#t~mem122#1.offset, 4);havoc main_#t~mem122#1.base, main_#t~mem122#1.offset;" "call write~$Pointer$#2(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem124#1 := read~int#2(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem123#1 := read~int#2(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short127#1 := main_#t~mem124#1 % 4294967296 >= 10 * (1 + main_#t~mem123#1) % 4294967296;" "assume main_#t~short127#1;call main_#t~mem125#1.base, main_#t~mem125#1.offset := read~$Pointer$#2(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem126#1 := read~int#2(main_#t~mem125#1.base, 36 + main_#t~mem125#1.offset, 4);main_#t~short127#1 := 0 == main_#t~mem126#1 % 4294967296;" "assume !main_#t~short127#1;havoc main_#t~mem124#1;havoc main_#t~mem123#1;havoc main_#t~mem125#1.base, main_#t~mem125#1.offset;havoc main_#t~mem126#1;havoc main_#t~short127#1;" "havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset;" "assume !false;" "havoc main_~_ha_bkt~0#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~0#1;" "assume !false;" "call main_#t~mem193#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post194#1 := main_#t~mem193#1;call write~int#3(1 + main_#t~post194#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem193#1;havoc main_#t~post194#1;" [2024-11-28 02:47:24,905 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 02:47:24,905 INFO L85 PathProgramCache]: Analyzing trace with hash 2115, now seen corresponding path program 2 times [2024-11-28 02:47:24,905 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM [2024-11-28 02:47:24,905 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [224402659] [2024-11-28 02:47:24,905 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:47:24,906 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 02:47:24,949 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-28 02:47:24,953 INFO L357 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-28 02:47:24,983 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-28 02:47:25,002 INFO L130 FreeRefinementEngine]: Strategy CAMEL_NO_AM found a feasible trace [2024-11-28 02:47:25,002 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 02:47:25,003 INFO L85 PathProgramCache]: Analyzing trace with hash -637494438, now seen corresponding path program 1 times [2024-11-28 02:47:25,003 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM [2024-11-28 02:47:25,003 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [193480718] [2024-11-28 02:47:25,003 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:47:25,003 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 02:47:25,146 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 02:47:25,676 INFO L136 FreeRefinementEngine]: Strategy CAMEL_NO_AM found an infeasible trace [2024-11-28 02:47:25,677 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [193480718] [2024-11-28 02:47:25,677 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [193480718] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-28 02:47:25,677 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1897726586] [2024-11-28 02:47:25,677 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:47:25,678 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-28 02:47:25,678 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3f86fdff-c6c4-46c5-9202-1e23723ed6cd/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 02:47:25,685 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3f86fdff-c6c4-46c5-9202-1e23723ed6cd/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-28 02:47:25,689 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3f86fdff-c6c4-46c5-9202-1e23723ed6cd/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2024-11-28 02:47:26,046 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 02:47:26,050 INFO L256 TraceCheckSpWp]: Trace formula consists of 573 conjuncts, 3 conjuncts are in the unsatisfiable core [2024-11-28 02:47:26,052 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-28 02:47:26,074 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-28 02:47:26,101 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1897726586] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-28 02:47:26,102 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-28 02:47:26,103 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 3, 3] total 5 [2024-11-28 02:47:26,103 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [886771036] [2024-11-28 02:47:26,103 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-28 02:47:26,103 INFO L764 eck$LassoCheckResult]: loop already infeasible [2024-11-28 02:47:26,104 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL_NO_AM [2024-11-28 02:47:26,127 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-28 02:47:26,127 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-11-28 02:47:26,127 INFO L87 Difference]: Start difference. First operand 470 states and 659 transitions. cyclomatic complexity: 193 Second operand has 5 states, 5 states have (on average 19.6) internal successors, (98), 5 states have internal predecessors, (98), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 02:47:26,342 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 02:47:26,342 INFO L93 Difference]: Finished difference Result 476 states and 658 transitions. [2024-11-28 02:47:26,342 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 476 states and 658 transitions. [2024-11-28 02:47:26,351 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 458 [2024-11-28 02:47:26,359 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 476 states to 476 states and 658 transitions. [2024-11-28 02:47:26,359 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 476 [2024-11-28 02:47:26,361 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 476 [2024-11-28 02:47:26,361 INFO L73 IsDeterministic]: Start isDeterministic. Operand 476 states and 658 transitions. [2024-11-28 02:47:26,370 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-28 02:47:26,370 INFO L218 hiAutomatonCegarLoop]: Abstraction has 476 states and 658 transitions. [2024-11-28 02:47:26,371 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 476 states and 658 transitions. [2024-11-28 02:47:26,393 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 476 to 476. [2024-11-28 02:47:26,397 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 476 states, 472 states have (on average 1.38135593220339) internal successors, (652), 471 states have internal predecessors, (652), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-28 02:47:26,400 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 476 states to 476 states and 658 transitions. [2024-11-28 02:47:26,404 INFO L240 hiAutomatonCegarLoop]: Abstraction has 476 states and 658 transitions. [2024-11-28 02:47:26,404 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-28 02:47:26,405 INFO L425 stractBuchiCegarLoop]: Abstraction has 476 states and 658 transitions. [2024-11-28 02:47:26,407 INFO L332 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2024-11-28 02:47:26,407 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 476 states and 658 transitions. [2024-11-28 02:47:26,412 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 458 [2024-11-28 02:47:26,412 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-28 02:47:26,412 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-28 02:47:26,413 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2024-11-28 02:47:26,416 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 02:47:26,416 INFO L747 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(21, 2);call #Ultimate.allocInit(40, 3);~#alt_malloc_sizes~0.base, ~#alt_malloc_sizes~0.offset := 3, 0;call write~init~int#1(0, ~#alt_malloc_sizes~0.base, ~#alt_malloc_sizes~0.offset, 4);call write~init~int#1(0, ~#alt_malloc_sizes~0.base, 4 + ~#alt_malloc_sizes~0.offset, 4);call write~init~int#1(0, ~#alt_malloc_sizes~0.base, 8 + ~#alt_malloc_sizes~0.offset, 4);call write~init~int#1(0, ~#alt_malloc_sizes~0.base, 12 + ~#alt_malloc_sizes~0.offset, 4);call write~init~int#1(0, ~#alt_malloc_sizes~0.base, 16 + ~#alt_malloc_sizes~0.offset, 4);call write~init~int#1(0, ~#alt_malloc_sizes~0.base, 20 + ~#alt_malloc_sizes~0.offset, 4);call write~init~int#1(0, ~#alt_malloc_sizes~0.base, 24 + ~#alt_malloc_sizes~0.offset, 4);call write~init~int#1(0, ~#alt_malloc_sizes~0.base, 28 + ~#alt_malloc_sizes~0.offset, 4);call write~init~int#1(0, ~#alt_malloc_sizes~0.base, 32 + ~#alt_malloc_sizes~0.offset, 4);call write~init~int#1(0, ~#alt_malloc_sizes~0.base, 36 + ~#alt_malloc_sizes~0.offset, 4);~alt_malloc_balance~0 := 0;~alt_memcmp_count~0 := 0;~alt_bzero_count~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~mem40#1, main_#t~ret41#1.base, main_#t~ret41#1.offset, main_#t~mem42#1, main_#t~mem43#1, main_#t~mem44#1, main_#t~mem46#1, main_#t~mem45#1, main_#t~mem47#1, main_#t~mem48#1, main_#t~mem50#1, main_#t~mem49#1, main_#t~mem51#1, main_#t~mem52#1, main_#t~mem54#1, main_#t~mem53#1, main_#t~mem55#1, main_#t~mem56#1, main_#t~bitwise57#1, main_#t~bitwise58#1, main_#t~bitwise59#1, main_#t~bitwise60#1, main_#t~bitwise61#1, main_#t~bitwise62#1, main_#t~bitwise63#1, main_#t~bitwise64#1, main_#t~bitwise65#1, main_#t~switch66#1, main_#t~mem67#1, main_#t~mem68#1, main_#t~mem69#1, main_#t~mem70#1, main_#t~mem71#1, main_#t~mem72#1, main_#t~mem73#1, main_#t~mem74#1, main_#t~mem75#1, main_#t~mem76#1, main_#t~mem77#1, main_#t~bitwise78#1, main_#t~bitwise79#1, main_#t~bitwise80#1, main_#t~bitwise81#1, main_#t~bitwise82#1, main_#t~bitwise83#1, main_#t~bitwise84#1, main_#t~bitwise85#1, main_#t~bitwise86#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~ret87#1.base, main_#t~ret87#1.offset, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~ret95#1.base, main_#t~ret95#1.offset, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1, main_#t~mem107#1.base, main_#t~mem107#1.offset, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1, main_#t~post112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1, main_#t~bitwise115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1, main_#t~post119#1, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem124#1, main_#t~mem123#1, main_#t~mem125#1.base, main_#t~mem125#1.offset, main_#t~mem126#1, main_#t~short127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~ret130#1.base, main_#t~ret130#1.offset, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem132#1, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem137#1, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~mem136#1, main_#t~bitwise138#1, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem142#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1, main_#t~bitwise143#1, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem153#1, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1, main_#t~bitwise154#1, main_#t~mem155#1, main_#t~pre156#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_#t~mem160#1, main_#t~post161#1, main_#t~mem165#1, main_#t~mem163#1, main_#t~mem162#1.base, main_#t~mem162#1.offset, main_#t~mem164#1, main_#t~mem166#1, main_#t~post167#1, main_#t~mem168#1.base, main_#t~mem168#1.offset, main_#t~mem169#1.base, main_#t~mem169#1.offset, main_#t~mem170#1.base, main_#t~mem170#1.offset, main_#t~post171#1, main_#t~mem172#1.base, main_#t~mem172#1.offset, main_#t~mem173#1.base, main_#t~mem173#1.offset, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1, main_#t~mem176#1.base, main_#t~mem176#1.offset, main_#t~mem177#1, main_#t~mem178#1.base, main_#t~mem178#1.offset, main_#t~mem179#1, main_#t~post180#1, main_#t~mem181#1.base, main_#t~mem181#1.offset, main_#t~mem182#1.base, main_#t~mem182#1.offset, main_#t~mem183#1.base, main_#t~mem183#1.offset, main_#t~mem186#1, main_#t~mem184#1.base, main_#t~mem184#1.offset, main_#t~mem185#1, main_#t~ite189#1, main_#t~mem187#1.base, main_#t~mem187#1.offset, main_#t~mem188#1, main_#t~mem190#1.base, main_#t~mem190#1.offset, main_#t~mem191#1, main_#t~mem192#1.base, main_#t~mem192#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem193#1, main_#t~post194#1, main_#t~mem195#1, main_#t~mem197#1, main_#t~mem196#1, main_#t~mem198#1, main_#t~mem199#1, main_#t~mem201#1, main_#t~mem200#1, main_#t~mem202#1, main_#t~mem203#1, main_#t~mem205#1, main_#t~mem204#1, main_#t~mem206#1, main_#t~mem207#1, main_#t~bitwise208#1, main_#t~bitwise209#1, main_#t~bitwise210#1, main_#t~bitwise211#1, main_#t~bitwise212#1, main_#t~bitwise213#1, main_#t~bitwise214#1, main_#t~bitwise215#1, main_#t~bitwise216#1, main_#t~switch217#1, main_#t~mem218#1, main_#t~mem219#1, main_#t~mem220#1, main_#t~mem221#1, main_#t~mem222#1, main_#t~mem223#1, main_#t~mem224#1, main_#t~mem225#1, main_#t~mem226#1, main_#t~mem227#1, main_#t~mem228#1, main_#t~bitwise229#1, main_#t~bitwise230#1, main_#t~bitwise231#1, main_#t~bitwise232#1, main_#t~bitwise233#1, main_#t~bitwise234#1, main_#t~bitwise235#1, main_#t~bitwise236#1, main_#t~bitwise237#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1, main_#t~bitwise240#1, main_#t~mem241#1.base, main_#t~mem241#1.offset, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1, main_#t~mem249#1, main_#t~mem250#1, main_#t~short251#1, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~ret253#1, main_#t~mem254#1.base, main_#t~mem254#1.offset, main_#t~mem255#1.base, main_#t~mem255#1.offset, main_#t~mem256#1.base, main_#t~mem256#1.offset, main_#t~mem257#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1.base, main_#t~mem259#1.offset, main_#t~short260#1, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~mem271#1, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1.base, main_#t~mem273#1.offset, main_#t~mem274#1.base, main_#t~mem274#1.offset, main_#t~mem275#1, main_#t~mem276#1.base, main_#t~mem276#1.offset, main_#t~mem277#1.base, main_#t~mem277#1.offset, main_#t~mem278#1.base, main_#t~mem278#1.offset, main_#t~mem279#1.base, main_#t~mem279#1.offset, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem281#1, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem285#1, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~mem284#1, main_#t~bitwise286#1, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~mem289#1, main_#t~post290#1, main_#t~mem291#1.base, main_#t~mem291#1.offset, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1.base, main_#t~mem296#1.offset, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem300#1, main_#t~post301#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem302#1, main_#t~post303#1, main_#t~mem304#1.base, main_#t~mem304#1.offset, main_#t~ite306#1.base, main_#t~ite306#1.offset, main_#t~mem305#1.base, main_#t~mem305#1.offset, main_#t~mem307#1.base, main_#t~mem307#1.offset, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~short309#1, main_#t~mem310#1.base, main_#t~mem310#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1.base, main_#t~mem312#1.offset, main_#t~mem313#1, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~mem315#1.base, main_#t~mem315#1.offset, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~mem317#1.base, main_#t~mem317#1.offset, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_#t~mem319#1.base, main_#t~mem319#1.offset, main_#t~mem320#1, main_#t~mem321#1.base, main_#t~mem321#1.offset, main_#t~mem322#1.base, main_#t~mem322#1.offset, main_#t~mem323#1.base, main_#t~mem323#1.offset, main_#t~mem324#1, main_#t~mem325#1.base, main_#t~mem325#1.offset, main_#t~mem326#1.base, main_#t~mem326#1.offset, main_#t~mem327#1.base, main_#t~mem327#1.offset, main_#t~mem328#1.base, main_#t~mem328#1.offset, main_#t~mem329#1.base, main_#t~mem329#1.offset, main_#t~mem330#1, main_#t~mem331#1.base, main_#t~mem331#1.offset, main_#t~mem334#1, main_#t~mem332#1.base, main_#t~mem332#1.offset, main_#t~mem333#1, main_#t~bitwise335#1, main_#t~mem336#1.base, main_#t~mem336#1.offset, main_#t~mem337#1.base, main_#t~mem337#1.offset, main_#t~mem338#1, main_#t~post339#1, main_#t~mem340#1.base, main_#t~mem340#1.offset, main_#t~mem341#1.base, main_#t~mem341#1.offset, main_#t~mem342#1.base, main_#t~mem342#1.offset, main_#t~mem343#1.base, main_#t~mem343#1.offset, main_#t~mem344#1.base, main_#t~mem344#1.offset, main_#t~mem345#1.base, main_#t~mem345#1.offset, main_#t~mem346#1.base, main_#t~mem346#1.offset, main_#t~mem347#1.base, main_#t~mem347#1.offset, main_~_hd_head~1#1.base, main_~_hd_head~1#1.offset, main_#t~mem348#1.base, main_#t~mem348#1.offset, main_#t~mem349#1, main_#t~post350#1, main_~_hd_bkt~1#1, main_~_hd_hh_del~1#1.base, main_~_hd_hh_del~1#1.offset, main_#t~ite352#1.base, main_#t~ite352#1.offset, main_#t~mem351#1.base, main_#t~mem351#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int#3(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4);" [2024-11-28 02:47:26,417 INFO L749 eck$LassoCheckResult]: Loop: "call main_#t~mem40#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume main_#t~mem40#1 < 10;havoc main_#t~mem40#1;" "assume { :begin_inline_real_malloc } true;real_malloc_#in~n#1 := 40;havoc real_malloc_#res#1.base, real_malloc_#res#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset, real_malloc_~n#1;real_malloc_~n#1 := real_malloc_#in~n#1;call real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset := #Ultimate.allocOnHeap(real_malloc_~n#1 % 4294967296);real_malloc_#res#1.base, real_malloc_#res#1.offset := real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset;" "main_#t~ret41#1.base, main_#t~ret41#1.offset := real_malloc_#res#1.base, real_malloc_#res#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset, real_malloc_~n#1;havoc real_malloc_#in~n#1;assume { :end_inline_real_malloc } true;main_~user~0#1.base, main_~user~0#1.offset := main_#t~ret41#1.base, main_#t~ret41#1.offset;havoc main_#t~ret41#1.base, main_#t~ret41#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call main_#t~mem42#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem42#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem42#1;call main_#t~mem43#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem44#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem43#1 * main_#t~mem44#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem43#1;havoc main_#t~mem44#1;" "havoc main_~_ha_hashv~0#1;" "goto;" "havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4;" "assume !(main_~_hj_k~0#1 % 4294967296 >= 12);" "main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch66#1 := 11 == main_~_hj_k~0#1;" "assume !main_#t~switch66#1;" "main_#t~switch66#1 := main_#t~switch66#1 || 10 == main_~_hj_k~0#1;" "assume !main_#t~switch66#1;" "main_#t~switch66#1 := main_#t~switch66#1 || 9 == main_~_hj_k~0#1;" "assume !main_#t~switch66#1;" "main_#t~switch66#1 := main_#t~switch66#1 || 8 == main_~_hj_k~0#1;" "assume !main_#t~switch66#1;" "main_#t~switch66#1 := main_#t~switch66#1 || 7 == main_~_hj_k~0#1;" "assume !main_#t~switch66#1;" "main_#t~switch66#1 := main_#t~switch66#1 || 6 == main_~_hj_k~0#1;" "assume !main_#t~switch66#1;" "main_#t~switch66#1 := main_#t~switch66#1 || 5 == main_~_hj_k~0#1;" "assume !main_#t~switch66#1;" "main_#t~switch66#1 := main_#t~switch66#1 || 4 == main_~_hj_k~0#1;" "assume !main_#t~switch66#1;" "main_#t~switch66#1 := main_#t~switch66#1 || 3 == main_~_hj_k~0#1;" "assume main_#t~switch66#1;call main_#t~mem75#1 := read~int#2(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem75#1 % 256 % 4294967296);" "main_#t~switch66#1 := main_#t~switch66#1 || 2 == main_~_hj_k~0#1;" "assume main_#t~switch66#1;call main_#t~mem76#1 := read~int#2(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem76#1 % 256 % 4294967296);" "main_#t~switch66#1 := main_#t~switch66#1 || 1 == main_~_hj_k~0#1;" "assume main_#t~switch66#1;call main_#t~mem77#1 := read~int#2(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem77#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem77#1 % 256 % 4294967296 else main_#t~mem77#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch66#1;havoc main_#t~mem67#1;havoc main_#t~mem68#1;havoc main_#t~mem69#1;havoc main_#t~mem70#1;havoc main_#t~mem71#1;havoc main_#t~mem72#1;havoc main_#t~mem73#1;havoc main_#t~mem74#1;havoc main_#t~mem75#1;havoc main_#t~mem76#1;havoc main_#t~mem77#1;havoc main_#t~switch66#1;havoc main_#t~mem67#1;havoc main_#t~mem68#1;havoc main_#t~mem69#1;havoc main_#t~mem70#1;havoc main_#t~mem71#1;havoc main_#t~mem72#1;havoc main_#t~mem73#1;havoc main_#t~mem74#1;havoc main_#t~mem75#1;havoc main_#t~mem76#1;havoc main_#t~mem77#1;" "main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise78#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192;" "main_~_hj_i~0#1 := main_#t~bitwise78#1;havoc main_#t~bitwise78#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise79#1 := 256 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise79#1;havoc main_#t~bitwise79#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise80#1 := main_~_hj_j~0#1 % 4294967296 / 8192;" "main_~_ha_hashv~0#1 := main_#t~bitwise80#1;havoc main_#t~bitwise80#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise81#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096;" "main_~_hj_i~0#1 := main_#t~bitwise81#1;havoc main_#t~bitwise81#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise82#1 := 65536 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise82#1;havoc main_#t~bitwise82#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise83#1 := main_~_hj_j~0#1 % 4294967296 / 32;" "main_~_ha_hashv~0#1 := main_#t~bitwise83#1;havoc main_#t~bitwise83#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise84#1 := main_~_ha_hashv~0#1 % 4294967296 / 8;" "main_~_hj_i~0#1 := main_#t~bitwise84#1;havoc main_#t~bitwise84#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise85#1 := 1024 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise85#1;havoc main_#t~bitwise85#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise86#1 := main_~_hj_j~0#1 % 4294967296 / 32768;" "main_~_ha_hashv~0#1 := main_#t~bitwise86#1;havoc main_#t~bitwise86#1;" "assume !false;" "havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset;" "assume !false;" "assume !false;" "call write~int#2(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#2(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4);" "assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem102#1.base, main_#t~mem102#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#2(main_#t~mem102#1.base, main_#t~mem102#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem102#1.base, main_#t~mem102#1.offset;" "call write~$Pointer$#2(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem103#1.base, main_#t~mem103#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem104#1.base, main_#t~mem104#1.offset := read~$Pointer$#2(main_#t~mem103#1.base, 16 + main_#t~mem103#1.offset, 4);call main_#t~mem105#1.base, main_#t~mem105#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem106#1 := read~int#2(main_#t~mem105#1.base, 20 + main_#t~mem105#1.offset, 4);call write~$Pointer$#2(main_#t~mem104#1.base, main_#t~mem104#1.offset - main_#t~mem106#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem103#1.base, main_#t~mem103#1.offset;havoc main_#t~mem104#1.base, main_#t~mem104#1.offset;havoc main_#t~mem105#1.base, main_#t~mem105#1.offset;havoc main_#t~mem106#1;call main_#t~mem107#1.base, main_#t~mem107#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem108#1.base, main_#t~mem108#1.offset := read~$Pointer$#2(main_#t~mem107#1.base, 16 + main_#t~mem107#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem108#1.base, 8 + main_#t~mem108#1.offset, 4);havoc main_#t~mem107#1.base, main_#t~mem107#1.offset;havoc main_#t~mem108#1.base, main_#t~mem108#1.offset;call main_#t~mem109#1.base, main_#t~mem109#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem109#1.base, 16 + main_#t~mem109#1.offset, 4);havoc main_#t~mem109#1.base, main_#t~mem109#1.offset;" "assume !false;" "havoc main_~_ha_bkt~0#1;call main_#t~mem110#1.base, main_#t~mem110#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem111#1 := read~int#2(main_#t~mem110#1.base, 12 + main_#t~mem110#1.offset, 4);main_#t~post112#1 := main_#t~mem111#1;call write~int#2(1 + main_#t~post112#1, main_#t~mem110#1.base, 12 + main_#t~mem110#1.offset, 4);havoc main_#t~mem110#1.base, main_#t~mem110#1.offset;havoc main_#t~mem111#1;havoc main_#t~post112#1;" "call main_#t~mem113#1.base, main_#t~mem113#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem114#1 := read~int#2(main_#t~mem113#1.base, 4 + main_#t~mem113#1.offset, 4);" "assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem114#1 - 1) % 4294967296;main_#t~bitwise115#1 := 0;" "main_~_ha_bkt~0#1 := main_#t~bitwise115#1;havoc main_#t~mem113#1.base, main_#t~mem113#1.offset;havoc main_#t~mem114#1;havoc main_#t~bitwise115#1;" "assume !false;" "call main_#t~mem116#1.base, main_#t~mem116#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem117#1.base, main_#t~mem117#1.offset := read~$Pointer$#2(main_#t~mem116#1.base, main_#t~mem116#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem117#1.base, main_#t~mem117#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem116#1.base, main_#t~mem116#1.offset;havoc main_#t~mem117#1.base, main_#t~mem117#1.offset;call main_#t~mem118#1 := read~int#2(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post119#1 := main_#t~mem118#1;call write~int#2(1 + main_#t~post119#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem118#1;havoc main_#t~post119#1;call main_#t~mem120#1.base, main_#t~mem120#1.offset := read~$Pointer$#2(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#2(main_#t~mem120#1.base, main_#t~mem120#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem120#1.base, main_#t~mem120#1.offset;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem121#1.base, main_#t~mem121#1.offset := read~$Pointer$#2(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);" "assume main_#t~mem121#1.base != 0 || main_#t~mem121#1.offset != 0;havoc main_#t~mem121#1.base, main_#t~mem121#1.offset;call main_#t~mem122#1.base, main_#t~mem122#1.offset := read~$Pointer$#2(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem122#1.base, 12 + main_#t~mem122#1.offset, 4);havoc main_#t~mem122#1.base, main_#t~mem122#1.offset;" "call write~$Pointer$#2(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem124#1 := read~int#2(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem123#1 := read~int#2(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short127#1 := main_#t~mem124#1 % 4294967296 >= 10 * (1 + main_#t~mem123#1) % 4294967296;" "assume main_#t~short127#1;call main_#t~mem125#1.base, main_#t~mem125#1.offset := read~$Pointer$#2(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem126#1 := read~int#2(main_#t~mem125#1.base, 36 + main_#t~mem125#1.offset, 4);main_#t~short127#1 := 0 == main_#t~mem126#1 % 4294967296;" "assume !main_#t~short127#1;havoc main_#t~mem124#1;havoc main_#t~mem123#1;havoc main_#t~mem125#1.base, main_#t~mem125#1.offset;havoc main_#t~mem126#1;havoc main_#t~short127#1;" "havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset;" "assume !false;" "havoc main_~_ha_bkt~0#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~0#1;" "assume !false;" "call main_#t~mem193#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post194#1 := main_#t~mem193#1;call write~int#3(1 + main_#t~post194#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem193#1;havoc main_#t~post194#1;" [2024-11-28 02:47:26,418 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 02:47:26,418 INFO L85 PathProgramCache]: Analyzing trace with hash 2115, now seen corresponding path program 3 times [2024-11-28 02:47:26,418 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM [2024-11-28 02:47:26,418 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1753931980] [2024-11-28 02:47:26,418 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:47:26,418 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 02:47:26,442 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-28 02:47:26,447 INFO L357 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-28 02:47:26,463 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-28 02:47:26,472 INFO L130 FreeRefinementEngine]: Strategy CAMEL_NO_AM found a feasible trace [2024-11-28 02:47:26,474 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 02:47:26,474 INFO L85 PathProgramCache]: Analyzing trace with hash -609728024, now seen corresponding path program 1 times [2024-11-28 02:47:26,475 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM [2024-11-28 02:47:26,477 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [443004743] [2024-11-28 02:47:26,477 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:47:26,477 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 02:47:26,551 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 02:47:26,811 INFO L136 FreeRefinementEngine]: Strategy CAMEL_NO_AM found an infeasible trace [2024-11-28 02:47:26,811 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [443004743] [2024-11-28 02:47:26,811 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [443004743] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-28 02:47:26,811 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [526606799] [2024-11-28 02:47:26,812 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:47:26,812 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-28 02:47:26,812 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3f86fdff-c6c4-46c5-9202-1e23723ed6cd/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 02:47:26,815 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3f86fdff-c6c4-46c5-9202-1e23723ed6cd/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-28 02:47:26,819 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3f86fdff-c6c4-46c5-9202-1e23723ed6cd/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2024-11-28 02:47:27,221 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 02:47:27,225 INFO L256 TraceCheckSpWp]: Trace formula consists of 517 conjuncts, 4 conjuncts are in the unsatisfiable core [2024-11-28 02:47:27,227 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-28 02:47:27,312 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-28 02:47:27,396 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [526606799] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-28 02:47:27,396 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-28 02:47:27,396 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 5, 5] total 9 [2024-11-28 02:47:27,396 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [274353711] [2024-11-28 02:47:27,396 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-28 02:47:27,397 INFO L764 eck$LassoCheckResult]: loop already infeasible [2024-11-28 02:47:27,397 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL_NO_AM [2024-11-28 02:47:27,397 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2024-11-28 02:47:27,399 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=48, Unknown=0, NotChecked=0, Total=72 [2024-11-28 02:47:27,399 INFO L87 Difference]: Start difference. First operand 476 states and 658 transitions. cyclomatic complexity: 186 Second operand has 9 states, 9 states have (on average 13.0) internal successors, (117), 9 states have internal predecessors, (117), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 02:47:27,585 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 02:47:27,586 INFO L93 Difference]: Finished difference Result 421 states and 571 transitions. [2024-11-28 02:47:27,586 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 421 states and 571 transitions. [2024-11-28 02:47:27,590 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 403 [2024-11-28 02:47:27,595 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 421 states to 421 states and 571 transitions. [2024-11-28 02:47:27,595 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 421 [2024-11-28 02:47:27,596 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 421 [2024-11-28 02:47:27,596 INFO L73 IsDeterministic]: Start isDeterministic. Operand 421 states and 571 transitions. [2024-11-28 02:47:27,600 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-28 02:47:27,600 INFO L218 hiAutomatonCegarLoop]: Abstraction has 421 states and 571 transitions. [2024-11-28 02:47:27,601 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 421 states and 571 transitions. [2024-11-28 02:47:27,613 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 421 to 421. [2024-11-28 02:47:27,617 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 421 states, 417 states have (on average 1.354916067146283) internal successors, (565), 416 states have internal predecessors, (565), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-28 02:47:27,622 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 421 states to 421 states and 571 transitions. [2024-11-28 02:47:27,622 INFO L240 hiAutomatonCegarLoop]: Abstraction has 421 states and 571 transitions. [2024-11-28 02:47:27,623 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-28 02:47:27,624 INFO L425 stractBuchiCegarLoop]: Abstraction has 421 states and 571 transitions. [2024-11-28 02:47:27,624 INFO L332 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2024-11-28 02:47:27,624 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 421 states and 571 transitions. [2024-11-28 02:47:27,627 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 403 [2024-11-28 02:47:27,627 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-28 02:47:27,628 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-28 02:47:27,630 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2024-11-28 02:47:27,630 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 02:47:27,630 INFO L747 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(21, 2);call #Ultimate.allocInit(40, 3);~#alt_malloc_sizes~0.base, ~#alt_malloc_sizes~0.offset := 3, 0;call write~init~int#1(0, ~#alt_malloc_sizes~0.base, ~#alt_malloc_sizes~0.offset, 4);call write~init~int#1(0, ~#alt_malloc_sizes~0.base, 4 + ~#alt_malloc_sizes~0.offset, 4);call write~init~int#1(0, ~#alt_malloc_sizes~0.base, 8 + ~#alt_malloc_sizes~0.offset, 4);call write~init~int#1(0, ~#alt_malloc_sizes~0.base, 12 + ~#alt_malloc_sizes~0.offset, 4);call write~init~int#1(0, ~#alt_malloc_sizes~0.base, 16 + ~#alt_malloc_sizes~0.offset, 4);call write~init~int#1(0, ~#alt_malloc_sizes~0.base, 20 + ~#alt_malloc_sizes~0.offset, 4);call write~init~int#1(0, ~#alt_malloc_sizes~0.base, 24 + ~#alt_malloc_sizes~0.offset, 4);call write~init~int#1(0, ~#alt_malloc_sizes~0.base, 28 + ~#alt_malloc_sizes~0.offset, 4);call write~init~int#1(0, ~#alt_malloc_sizes~0.base, 32 + ~#alt_malloc_sizes~0.offset, 4);call write~init~int#1(0, ~#alt_malloc_sizes~0.base, 36 + ~#alt_malloc_sizes~0.offset, 4);~alt_malloc_balance~0 := 0;~alt_memcmp_count~0 := 0;~alt_bzero_count~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~mem40#1, main_#t~ret41#1.base, main_#t~ret41#1.offset, main_#t~mem42#1, main_#t~mem43#1, main_#t~mem44#1, main_#t~mem46#1, main_#t~mem45#1, main_#t~mem47#1, main_#t~mem48#1, main_#t~mem50#1, main_#t~mem49#1, main_#t~mem51#1, main_#t~mem52#1, main_#t~mem54#1, main_#t~mem53#1, main_#t~mem55#1, main_#t~mem56#1, main_#t~bitwise57#1, main_#t~bitwise58#1, main_#t~bitwise59#1, main_#t~bitwise60#1, main_#t~bitwise61#1, main_#t~bitwise62#1, main_#t~bitwise63#1, main_#t~bitwise64#1, main_#t~bitwise65#1, main_#t~switch66#1, main_#t~mem67#1, main_#t~mem68#1, main_#t~mem69#1, main_#t~mem70#1, main_#t~mem71#1, main_#t~mem72#1, main_#t~mem73#1, main_#t~mem74#1, main_#t~mem75#1, main_#t~mem76#1, main_#t~mem77#1, main_#t~bitwise78#1, main_#t~bitwise79#1, main_#t~bitwise80#1, main_#t~bitwise81#1, main_#t~bitwise82#1, main_#t~bitwise83#1, main_#t~bitwise84#1, main_#t~bitwise85#1, main_#t~bitwise86#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~ret87#1.base, main_#t~ret87#1.offset, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~ret95#1.base, main_#t~ret95#1.offset, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1, main_#t~mem107#1.base, main_#t~mem107#1.offset, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1, main_#t~post112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1, main_#t~bitwise115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1, main_#t~post119#1, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem124#1, main_#t~mem123#1, main_#t~mem125#1.base, main_#t~mem125#1.offset, main_#t~mem126#1, main_#t~short127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~ret130#1.base, main_#t~ret130#1.offset, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem132#1, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem137#1, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~mem136#1, main_#t~bitwise138#1, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem142#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1, main_#t~bitwise143#1, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem153#1, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1, main_#t~bitwise154#1, main_#t~mem155#1, main_#t~pre156#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_#t~mem160#1, main_#t~post161#1, main_#t~mem165#1, main_#t~mem163#1, main_#t~mem162#1.base, main_#t~mem162#1.offset, main_#t~mem164#1, main_#t~mem166#1, main_#t~post167#1, main_#t~mem168#1.base, main_#t~mem168#1.offset, main_#t~mem169#1.base, main_#t~mem169#1.offset, main_#t~mem170#1.base, main_#t~mem170#1.offset, main_#t~post171#1, main_#t~mem172#1.base, main_#t~mem172#1.offset, main_#t~mem173#1.base, main_#t~mem173#1.offset, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1, main_#t~mem176#1.base, main_#t~mem176#1.offset, main_#t~mem177#1, main_#t~mem178#1.base, main_#t~mem178#1.offset, main_#t~mem179#1, main_#t~post180#1, main_#t~mem181#1.base, main_#t~mem181#1.offset, main_#t~mem182#1.base, main_#t~mem182#1.offset, main_#t~mem183#1.base, main_#t~mem183#1.offset, main_#t~mem186#1, main_#t~mem184#1.base, main_#t~mem184#1.offset, main_#t~mem185#1, main_#t~ite189#1, main_#t~mem187#1.base, main_#t~mem187#1.offset, main_#t~mem188#1, main_#t~mem190#1.base, main_#t~mem190#1.offset, main_#t~mem191#1, main_#t~mem192#1.base, main_#t~mem192#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem193#1, main_#t~post194#1, main_#t~mem195#1, main_#t~mem197#1, main_#t~mem196#1, main_#t~mem198#1, main_#t~mem199#1, main_#t~mem201#1, main_#t~mem200#1, main_#t~mem202#1, main_#t~mem203#1, main_#t~mem205#1, main_#t~mem204#1, main_#t~mem206#1, main_#t~mem207#1, main_#t~bitwise208#1, main_#t~bitwise209#1, main_#t~bitwise210#1, main_#t~bitwise211#1, main_#t~bitwise212#1, main_#t~bitwise213#1, main_#t~bitwise214#1, main_#t~bitwise215#1, main_#t~bitwise216#1, main_#t~switch217#1, main_#t~mem218#1, main_#t~mem219#1, main_#t~mem220#1, main_#t~mem221#1, main_#t~mem222#1, main_#t~mem223#1, main_#t~mem224#1, main_#t~mem225#1, main_#t~mem226#1, main_#t~mem227#1, main_#t~mem228#1, main_#t~bitwise229#1, main_#t~bitwise230#1, main_#t~bitwise231#1, main_#t~bitwise232#1, main_#t~bitwise233#1, main_#t~bitwise234#1, main_#t~bitwise235#1, main_#t~bitwise236#1, main_#t~bitwise237#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1, main_#t~bitwise240#1, main_#t~mem241#1.base, main_#t~mem241#1.offset, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1, main_#t~mem249#1, main_#t~mem250#1, main_#t~short251#1, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~ret253#1, main_#t~mem254#1.base, main_#t~mem254#1.offset, main_#t~mem255#1.base, main_#t~mem255#1.offset, main_#t~mem256#1.base, main_#t~mem256#1.offset, main_#t~mem257#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1.base, main_#t~mem259#1.offset, main_#t~short260#1, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~mem271#1, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1.base, main_#t~mem273#1.offset, main_#t~mem274#1.base, main_#t~mem274#1.offset, main_#t~mem275#1, main_#t~mem276#1.base, main_#t~mem276#1.offset, main_#t~mem277#1.base, main_#t~mem277#1.offset, main_#t~mem278#1.base, main_#t~mem278#1.offset, main_#t~mem279#1.base, main_#t~mem279#1.offset, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem281#1, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem285#1, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~mem284#1, main_#t~bitwise286#1, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~mem289#1, main_#t~post290#1, main_#t~mem291#1.base, main_#t~mem291#1.offset, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1.base, main_#t~mem296#1.offset, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem300#1, main_#t~post301#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem302#1, main_#t~post303#1, main_#t~mem304#1.base, main_#t~mem304#1.offset, main_#t~ite306#1.base, main_#t~ite306#1.offset, main_#t~mem305#1.base, main_#t~mem305#1.offset, main_#t~mem307#1.base, main_#t~mem307#1.offset, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~short309#1, main_#t~mem310#1.base, main_#t~mem310#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1.base, main_#t~mem312#1.offset, main_#t~mem313#1, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~mem315#1.base, main_#t~mem315#1.offset, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~mem317#1.base, main_#t~mem317#1.offset, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_#t~mem319#1.base, main_#t~mem319#1.offset, main_#t~mem320#1, main_#t~mem321#1.base, main_#t~mem321#1.offset, main_#t~mem322#1.base, main_#t~mem322#1.offset, main_#t~mem323#1.base, main_#t~mem323#1.offset, main_#t~mem324#1, main_#t~mem325#1.base, main_#t~mem325#1.offset, main_#t~mem326#1.base, main_#t~mem326#1.offset, main_#t~mem327#1.base, main_#t~mem327#1.offset, main_#t~mem328#1.base, main_#t~mem328#1.offset, main_#t~mem329#1.base, main_#t~mem329#1.offset, main_#t~mem330#1, main_#t~mem331#1.base, main_#t~mem331#1.offset, main_#t~mem334#1, main_#t~mem332#1.base, main_#t~mem332#1.offset, main_#t~mem333#1, main_#t~bitwise335#1, main_#t~mem336#1.base, main_#t~mem336#1.offset, main_#t~mem337#1.base, main_#t~mem337#1.offset, main_#t~mem338#1, main_#t~post339#1, main_#t~mem340#1.base, main_#t~mem340#1.offset, main_#t~mem341#1.base, main_#t~mem341#1.offset, main_#t~mem342#1.base, main_#t~mem342#1.offset, main_#t~mem343#1.base, main_#t~mem343#1.offset, main_#t~mem344#1.base, main_#t~mem344#1.offset, main_#t~mem345#1.base, main_#t~mem345#1.offset, main_#t~mem346#1.base, main_#t~mem346#1.offset, main_#t~mem347#1.base, main_#t~mem347#1.offset, main_~_hd_head~1#1.base, main_~_hd_head~1#1.offset, main_#t~mem348#1.base, main_#t~mem348#1.offset, main_#t~mem349#1, main_#t~post350#1, main_~_hd_bkt~1#1, main_~_hd_hh_del~1#1.base, main_~_hd_hh_del~1#1.offset, main_#t~ite352#1.base, main_#t~ite352#1.offset, main_#t~mem351#1.base, main_#t~mem351#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int#3(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4);" [2024-11-28 02:47:27,631 INFO L749 eck$LassoCheckResult]: Loop: "call main_#t~mem40#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume main_#t~mem40#1 < 10;havoc main_#t~mem40#1;" "assume { :begin_inline_real_malloc } true;real_malloc_#in~n#1 := 40;havoc real_malloc_#res#1.base, real_malloc_#res#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset, real_malloc_~n#1;real_malloc_~n#1 := real_malloc_#in~n#1;call real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset := #Ultimate.allocOnHeap(real_malloc_~n#1 % 4294967296);real_malloc_#res#1.base, real_malloc_#res#1.offset := real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset;" "main_#t~ret41#1.base, main_#t~ret41#1.offset := real_malloc_#res#1.base, real_malloc_#res#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset, real_malloc_~n#1;havoc real_malloc_#in~n#1;assume { :end_inline_real_malloc } true;main_~user~0#1.base, main_~user~0#1.offset := main_#t~ret41#1.base, main_#t~ret41#1.offset;havoc main_#t~ret41#1.base, main_#t~ret41#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call main_#t~mem42#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem42#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem42#1;call main_#t~mem43#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem44#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem43#1 * main_#t~mem44#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem43#1;havoc main_#t~mem44#1;" "havoc main_~_ha_hashv~0#1;" "goto;" "havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4;" "assume !(main_~_hj_k~0#1 % 4294967296 >= 12);" "main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch66#1 := 11 == main_~_hj_k~0#1;" "assume !main_#t~switch66#1;" "main_#t~switch66#1 := main_#t~switch66#1 || 10 == main_~_hj_k~0#1;" "assume !main_#t~switch66#1;" "main_#t~switch66#1 := main_#t~switch66#1 || 9 == main_~_hj_k~0#1;" "assume !main_#t~switch66#1;" "main_#t~switch66#1 := main_#t~switch66#1 || 8 == main_~_hj_k~0#1;" "assume !main_#t~switch66#1;" "main_#t~switch66#1 := main_#t~switch66#1 || 7 == main_~_hj_k~0#1;" "assume !main_#t~switch66#1;" "main_#t~switch66#1 := main_#t~switch66#1 || 6 == main_~_hj_k~0#1;" "assume !main_#t~switch66#1;" "main_#t~switch66#1 := main_#t~switch66#1 || 5 == main_~_hj_k~0#1;" "assume !main_#t~switch66#1;" "main_#t~switch66#1 := main_#t~switch66#1 || 4 == main_~_hj_k~0#1;" "assume main_#t~switch66#1;call main_#t~mem74#1 := read~int#2(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem74#1 % 256 % 4294967296);" "main_#t~switch66#1 := main_#t~switch66#1 || 3 == main_~_hj_k~0#1;" "assume main_#t~switch66#1;call main_#t~mem75#1 := read~int#2(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem75#1 % 256 % 4294967296);" "main_#t~switch66#1 := main_#t~switch66#1 || 2 == main_~_hj_k~0#1;" "assume main_#t~switch66#1;call main_#t~mem76#1 := read~int#2(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem76#1 % 256 % 4294967296);" "main_#t~switch66#1 := main_#t~switch66#1 || 1 == main_~_hj_k~0#1;" "assume main_#t~switch66#1;call main_#t~mem77#1 := read~int#2(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem77#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem77#1 % 256 % 4294967296 else main_#t~mem77#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch66#1;havoc main_#t~mem67#1;havoc main_#t~mem68#1;havoc main_#t~mem69#1;havoc main_#t~mem70#1;havoc main_#t~mem71#1;havoc main_#t~mem72#1;havoc main_#t~mem73#1;havoc main_#t~mem74#1;havoc main_#t~mem75#1;havoc main_#t~mem76#1;havoc main_#t~mem77#1;havoc main_#t~switch66#1;havoc main_#t~mem67#1;havoc main_#t~mem68#1;havoc main_#t~mem69#1;havoc main_#t~mem70#1;havoc main_#t~mem71#1;havoc main_#t~mem72#1;havoc main_#t~mem73#1;havoc main_#t~mem74#1;havoc main_#t~mem75#1;havoc main_#t~mem76#1;havoc main_#t~mem77#1;" "main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise78#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192;" "main_~_hj_i~0#1 := main_#t~bitwise78#1;havoc main_#t~bitwise78#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise79#1 := 256 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise79#1;havoc main_#t~bitwise79#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise80#1 := main_~_hj_j~0#1 % 4294967296 / 8192;" "main_~_ha_hashv~0#1 := main_#t~bitwise80#1;havoc main_#t~bitwise80#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise81#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096;" "main_~_hj_i~0#1 := main_#t~bitwise81#1;havoc main_#t~bitwise81#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise82#1 := 65536 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise82#1;havoc main_#t~bitwise82#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise83#1 := main_~_hj_j~0#1 % 4294967296 / 32;" "main_~_ha_hashv~0#1 := main_#t~bitwise83#1;havoc main_#t~bitwise83#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise84#1 := main_~_ha_hashv~0#1 % 4294967296 / 8;" "main_~_hj_i~0#1 := main_#t~bitwise84#1;havoc main_#t~bitwise84#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise85#1 := 1024 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise85#1;havoc main_#t~bitwise85#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise86#1 := main_~_hj_j~0#1 % 4294967296 / 32768;" "main_~_ha_hashv~0#1 := main_#t~bitwise86#1;havoc main_#t~bitwise86#1;" "assume !false;" "havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset;" "assume !false;" "assume !false;" "call write~int#2(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#2(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4);" "assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem102#1.base, main_#t~mem102#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#2(main_#t~mem102#1.base, main_#t~mem102#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem102#1.base, main_#t~mem102#1.offset;" "call write~$Pointer$#2(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem103#1.base, main_#t~mem103#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem104#1.base, main_#t~mem104#1.offset := read~$Pointer$#2(main_#t~mem103#1.base, 16 + main_#t~mem103#1.offset, 4);call main_#t~mem105#1.base, main_#t~mem105#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem106#1 := read~int#2(main_#t~mem105#1.base, 20 + main_#t~mem105#1.offset, 4);call write~$Pointer$#2(main_#t~mem104#1.base, main_#t~mem104#1.offset - main_#t~mem106#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem103#1.base, main_#t~mem103#1.offset;havoc main_#t~mem104#1.base, main_#t~mem104#1.offset;havoc main_#t~mem105#1.base, main_#t~mem105#1.offset;havoc main_#t~mem106#1;call main_#t~mem107#1.base, main_#t~mem107#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem108#1.base, main_#t~mem108#1.offset := read~$Pointer$#2(main_#t~mem107#1.base, 16 + main_#t~mem107#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem108#1.base, 8 + main_#t~mem108#1.offset, 4);havoc main_#t~mem107#1.base, main_#t~mem107#1.offset;havoc main_#t~mem108#1.base, main_#t~mem108#1.offset;call main_#t~mem109#1.base, main_#t~mem109#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem109#1.base, 16 + main_#t~mem109#1.offset, 4);havoc main_#t~mem109#1.base, main_#t~mem109#1.offset;" "assume !false;" "havoc main_~_ha_bkt~0#1;call main_#t~mem110#1.base, main_#t~mem110#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem111#1 := read~int#2(main_#t~mem110#1.base, 12 + main_#t~mem110#1.offset, 4);main_#t~post112#1 := main_#t~mem111#1;call write~int#2(1 + main_#t~post112#1, main_#t~mem110#1.base, 12 + main_#t~mem110#1.offset, 4);havoc main_#t~mem110#1.base, main_#t~mem110#1.offset;havoc main_#t~mem111#1;havoc main_#t~post112#1;" "call main_#t~mem113#1.base, main_#t~mem113#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem114#1 := read~int#2(main_#t~mem113#1.base, 4 + main_#t~mem113#1.offset, 4);" "assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem114#1 - 1) % 4294967296;main_#t~bitwise115#1 := 0;" "main_~_ha_bkt~0#1 := main_#t~bitwise115#1;havoc main_#t~mem113#1.base, main_#t~mem113#1.offset;havoc main_#t~mem114#1;havoc main_#t~bitwise115#1;" "assume !false;" "call main_#t~mem116#1.base, main_#t~mem116#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem117#1.base, main_#t~mem117#1.offset := read~$Pointer$#2(main_#t~mem116#1.base, main_#t~mem116#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem117#1.base, main_#t~mem117#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem116#1.base, main_#t~mem116#1.offset;havoc main_#t~mem117#1.base, main_#t~mem117#1.offset;call main_#t~mem118#1 := read~int#2(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post119#1 := main_#t~mem118#1;call write~int#2(1 + main_#t~post119#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem118#1;havoc main_#t~post119#1;call main_#t~mem120#1.base, main_#t~mem120#1.offset := read~$Pointer$#2(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#2(main_#t~mem120#1.base, main_#t~mem120#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem120#1.base, main_#t~mem120#1.offset;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem121#1.base, main_#t~mem121#1.offset := read~$Pointer$#2(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);" "assume main_#t~mem121#1.base != 0 || main_#t~mem121#1.offset != 0;havoc main_#t~mem121#1.base, main_#t~mem121#1.offset;call main_#t~mem122#1.base, main_#t~mem122#1.offset := read~$Pointer$#2(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem122#1.base, 12 + main_#t~mem122#1.offset, 4);havoc main_#t~mem122#1.base, main_#t~mem122#1.offset;" "call write~$Pointer$#2(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem124#1 := read~int#2(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem123#1 := read~int#2(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short127#1 := main_#t~mem124#1 % 4294967296 >= 10 * (1 + main_#t~mem123#1) % 4294967296;" "assume main_#t~short127#1;call main_#t~mem125#1.base, main_#t~mem125#1.offset := read~$Pointer$#2(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem126#1 := read~int#2(main_#t~mem125#1.base, 36 + main_#t~mem125#1.offset, 4);main_#t~short127#1 := 0 == main_#t~mem126#1 % 4294967296;" "assume !main_#t~short127#1;havoc main_#t~mem124#1;havoc main_#t~mem123#1;havoc main_#t~mem125#1.base, main_#t~mem125#1.offset;havoc main_#t~mem126#1;havoc main_#t~short127#1;" "havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset;" "assume !false;" "havoc main_~_ha_bkt~0#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~0#1;" "assume !false;" "call main_#t~mem193#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post194#1 := main_#t~mem193#1;call write~int#3(1 + main_#t~post194#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem193#1;havoc main_#t~post194#1;" [2024-11-28 02:47:27,631 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 02:47:27,631 INFO L85 PathProgramCache]: Analyzing trace with hash 2115, now seen corresponding path program 4 times [2024-11-28 02:47:27,631 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM [2024-11-28 02:47:27,631 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1867708020] [2024-11-28 02:47:27,631 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:47:27,631 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 02:47:27,658 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-28 02:47:27,658 INFO L357 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-28 02:47:27,672 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-28 02:47:27,681 INFO L130 FreeRefinementEngine]: Strategy CAMEL_NO_AM found a feasible trace [2024-11-28 02:47:27,682 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 02:47:27,682 INFO L85 PathProgramCache]: Analyzing trace with hash -1053628698, now seen corresponding path program 1 times [2024-11-28 02:47:27,682 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM [2024-11-28 02:47:27,682 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [61583477] [2024-11-28 02:47:27,682 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:47:27,682 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 02:47:28,101 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 02:47:28,751 INFO L136 FreeRefinementEngine]: Strategy CAMEL_NO_AM found an infeasible trace [2024-11-28 02:47:28,751 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [61583477] [2024-11-28 02:47:28,751 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [61583477] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-28 02:47:28,751 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1331407686] [2024-11-28 02:47:28,751 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:47:28,751 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-28 02:47:28,751 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3f86fdff-c6c4-46c5-9202-1e23723ed6cd/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 02:47:28,755 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3f86fdff-c6c4-46c5-9202-1e23723ed6cd/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-28 02:47:28,760 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3f86fdff-c6c4-46c5-9202-1e23723ed6cd/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2024-11-28 02:47:29,235 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 02:47:29,240 INFO L256 TraceCheckSpWp]: Trace formula consists of 525 conjuncts, 15 conjuncts are in the unsatisfiable core [2024-11-28 02:47:29,243 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-28 02:47:29,452 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-28 02:47:30,145 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1331407686] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-28 02:47:30,145 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-28 02:47:30,145 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 8, 7] total 17 [2024-11-28 02:47:30,146 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1312820311] [2024-11-28 02:47:30,146 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-28 02:47:30,167 INFO L764 eck$LassoCheckResult]: loop already infeasible [2024-11-28 02:47:30,167 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL_NO_AM [2024-11-28 02:47:30,167 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2024-11-28 02:47:30,168 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=55, Invalid=217, Unknown=0, NotChecked=0, Total=272 [2024-11-28 02:47:30,168 INFO L87 Difference]: Start difference. First operand 421 states and 571 transitions. cyclomatic complexity: 154 Second operand has 17 states, 17 states have (on average 8.235294117647058) internal successors, (140), 17 states have internal predecessors, (140), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 02:47:32,254 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 02:47:32,254 INFO L93 Difference]: Finished difference Result 516 states and 697 transitions. [2024-11-28 02:47:32,254 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 516 states and 697 transitions. [2024-11-28 02:47:32,260 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 498 [2024-11-28 02:47:32,265 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 516 states to 516 states and 697 transitions. [2024-11-28 02:47:32,265 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 516 [2024-11-28 02:47:32,266 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 516 [2024-11-28 02:47:32,266 INFO L73 IsDeterministic]: Start isDeterministic. Operand 516 states and 697 transitions. [2024-11-28 02:47:32,267 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-28 02:47:32,268 INFO L218 hiAutomatonCegarLoop]: Abstraction has 516 states and 697 transitions. [2024-11-28 02:47:32,269 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 516 states and 697 transitions. [2024-11-28 02:47:32,278 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 516 to 429. [2024-11-28 02:47:32,280 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 429 states, 425 states have (on average 1.348235294117647) internal successors, (573), 424 states have internal predecessors, (573), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-28 02:47:32,283 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 429 states to 429 states and 579 transitions. [2024-11-28 02:47:32,283 INFO L240 hiAutomatonCegarLoop]: Abstraction has 429 states and 579 transitions. [2024-11-28 02:47:32,284 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2024-11-28 02:47:32,285 INFO L425 stractBuchiCegarLoop]: Abstraction has 429 states and 579 transitions. [2024-11-28 02:47:32,285 INFO L332 stractBuchiCegarLoop]: ======== Iteration 5 ============ [2024-11-28 02:47:32,285 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 429 states and 579 transitions. [2024-11-28 02:47:32,288 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 411 [2024-11-28 02:47:32,288 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-28 02:47:32,288 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-28 02:47:32,289 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2024-11-28 02:47:32,289 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 02:47:32,289 INFO L747 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(21, 2);call #Ultimate.allocInit(40, 3);~#alt_malloc_sizes~0.base, ~#alt_malloc_sizes~0.offset := 3, 0;call write~init~int#1(0, ~#alt_malloc_sizes~0.base, ~#alt_malloc_sizes~0.offset, 4);call write~init~int#1(0, ~#alt_malloc_sizes~0.base, 4 + ~#alt_malloc_sizes~0.offset, 4);call write~init~int#1(0, ~#alt_malloc_sizes~0.base, 8 + ~#alt_malloc_sizes~0.offset, 4);call write~init~int#1(0, ~#alt_malloc_sizes~0.base, 12 + ~#alt_malloc_sizes~0.offset, 4);call write~init~int#1(0, ~#alt_malloc_sizes~0.base, 16 + ~#alt_malloc_sizes~0.offset, 4);call write~init~int#1(0, ~#alt_malloc_sizes~0.base, 20 + ~#alt_malloc_sizes~0.offset, 4);call write~init~int#1(0, ~#alt_malloc_sizes~0.base, 24 + ~#alt_malloc_sizes~0.offset, 4);call write~init~int#1(0, ~#alt_malloc_sizes~0.base, 28 + ~#alt_malloc_sizes~0.offset, 4);call write~init~int#1(0, ~#alt_malloc_sizes~0.base, 32 + ~#alt_malloc_sizes~0.offset, 4);call write~init~int#1(0, ~#alt_malloc_sizes~0.base, 36 + ~#alt_malloc_sizes~0.offset, 4);~alt_malloc_balance~0 := 0;~alt_memcmp_count~0 := 0;~alt_bzero_count~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~mem40#1, main_#t~ret41#1.base, main_#t~ret41#1.offset, main_#t~mem42#1, main_#t~mem43#1, main_#t~mem44#1, main_#t~mem46#1, main_#t~mem45#1, main_#t~mem47#1, main_#t~mem48#1, main_#t~mem50#1, main_#t~mem49#1, main_#t~mem51#1, main_#t~mem52#1, main_#t~mem54#1, main_#t~mem53#1, main_#t~mem55#1, main_#t~mem56#1, main_#t~bitwise57#1, main_#t~bitwise58#1, main_#t~bitwise59#1, main_#t~bitwise60#1, main_#t~bitwise61#1, main_#t~bitwise62#1, main_#t~bitwise63#1, main_#t~bitwise64#1, main_#t~bitwise65#1, main_#t~switch66#1, main_#t~mem67#1, main_#t~mem68#1, main_#t~mem69#1, main_#t~mem70#1, main_#t~mem71#1, main_#t~mem72#1, main_#t~mem73#1, main_#t~mem74#1, main_#t~mem75#1, main_#t~mem76#1, main_#t~mem77#1, main_#t~bitwise78#1, main_#t~bitwise79#1, main_#t~bitwise80#1, main_#t~bitwise81#1, main_#t~bitwise82#1, main_#t~bitwise83#1, main_#t~bitwise84#1, main_#t~bitwise85#1, main_#t~bitwise86#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~ret87#1.base, main_#t~ret87#1.offset, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~ret95#1.base, main_#t~ret95#1.offset, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1, main_#t~mem107#1.base, main_#t~mem107#1.offset, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1, main_#t~post112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1, main_#t~bitwise115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1, main_#t~post119#1, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem124#1, main_#t~mem123#1, main_#t~mem125#1.base, main_#t~mem125#1.offset, main_#t~mem126#1, main_#t~short127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~ret130#1.base, main_#t~ret130#1.offset, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem132#1, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem137#1, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~mem136#1, main_#t~bitwise138#1, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem142#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1, main_#t~bitwise143#1, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem153#1, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1, main_#t~bitwise154#1, main_#t~mem155#1, main_#t~pre156#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_#t~mem160#1, main_#t~post161#1, main_#t~mem165#1, main_#t~mem163#1, main_#t~mem162#1.base, main_#t~mem162#1.offset, main_#t~mem164#1, main_#t~mem166#1, main_#t~post167#1, main_#t~mem168#1.base, main_#t~mem168#1.offset, main_#t~mem169#1.base, main_#t~mem169#1.offset, main_#t~mem170#1.base, main_#t~mem170#1.offset, main_#t~post171#1, main_#t~mem172#1.base, main_#t~mem172#1.offset, main_#t~mem173#1.base, main_#t~mem173#1.offset, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1, main_#t~mem176#1.base, main_#t~mem176#1.offset, main_#t~mem177#1, main_#t~mem178#1.base, main_#t~mem178#1.offset, main_#t~mem179#1, main_#t~post180#1, main_#t~mem181#1.base, main_#t~mem181#1.offset, main_#t~mem182#1.base, main_#t~mem182#1.offset, main_#t~mem183#1.base, main_#t~mem183#1.offset, main_#t~mem186#1, main_#t~mem184#1.base, main_#t~mem184#1.offset, main_#t~mem185#1, main_#t~ite189#1, main_#t~mem187#1.base, main_#t~mem187#1.offset, main_#t~mem188#1, main_#t~mem190#1.base, main_#t~mem190#1.offset, main_#t~mem191#1, main_#t~mem192#1.base, main_#t~mem192#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem193#1, main_#t~post194#1, main_#t~mem195#1, main_#t~mem197#1, main_#t~mem196#1, main_#t~mem198#1, main_#t~mem199#1, main_#t~mem201#1, main_#t~mem200#1, main_#t~mem202#1, main_#t~mem203#1, main_#t~mem205#1, main_#t~mem204#1, main_#t~mem206#1, main_#t~mem207#1, main_#t~bitwise208#1, main_#t~bitwise209#1, main_#t~bitwise210#1, main_#t~bitwise211#1, main_#t~bitwise212#1, main_#t~bitwise213#1, main_#t~bitwise214#1, main_#t~bitwise215#1, main_#t~bitwise216#1, main_#t~switch217#1, main_#t~mem218#1, main_#t~mem219#1, main_#t~mem220#1, main_#t~mem221#1, main_#t~mem222#1, main_#t~mem223#1, main_#t~mem224#1, main_#t~mem225#1, main_#t~mem226#1, main_#t~mem227#1, main_#t~mem228#1, main_#t~bitwise229#1, main_#t~bitwise230#1, main_#t~bitwise231#1, main_#t~bitwise232#1, main_#t~bitwise233#1, main_#t~bitwise234#1, main_#t~bitwise235#1, main_#t~bitwise236#1, main_#t~bitwise237#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1, main_#t~bitwise240#1, main_#t~mem241#1.base, main_#t~mem241#1.offset, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1, main_#t~mem249#1, main_#t~mem250#1, main_#t~short251#1, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~ret253#1, main_#t~mem254#1.base, main_#t~mem254#1.offset, main_#t~mem255#1.base, main_#t~mem255#1.offset, main_#t~mem256#1.base, main_#t~mem256#1.offset, main_#t~mem257#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1.base, main_#t~mem259#1.offset, main_#t~short260#1, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~mem271#1, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1.base, main_#t~mem273#1.offset, main_#t~mem274#1.base, main_#t~mem274#1.offset, main_#t~mem275#1, main_#t~mem276#1.base, main_#t~mem276#1.offset, main_#t~mem277#1.base, main_#t~mem277#1.offset, main_#t~mem278#1.base, main_#t~mem278#1.offset, main_#t~mem279#1.base, main_#t~mem279#1.offset, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem281#1, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem285#1, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~mem284#1, main_#t~bitwise286#1, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~mem289#1, main_#t~post290#1, main_#t~mem291#1.base, main_#t~mem291#1.offset, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1.base, main_#t~mem296#1.offset, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem300#1, main_#t~post301#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem302#1, main_#t~post303#1, main_#t~mem304#1.base, main_#t~mem304#1.offset, main_#t~ite306#1.base, main_#t~ite306#1.offset, main_#t~mem305#1.base, main_#t~mem305#1.offset, main_#t~mem307#1.base, main_#t~mem307#1.offset, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~short309#1, main_#t~mem310#1.base, main_#t~mem310#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1.base, main_#t~mem312#1.offset, main_#t~mem313#1, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~mem315#1.base, main_#t~mem315#1.offset, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~mem317#1.base, main_#t~mem317#1.offset, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_#t~mem319#1.base, main_#t~mem319#1.offset, main_#t~mem320#1, main_#t~mem321#1.base, main_#t~mem321#1.offset, main_#t~mem322#1.base, main_#t~mem322#1.offset, main_#t~mem323#1.base, main_#t~mem323#1.offset, main_#t~mem324#1, main_#t~mem325#1.base, main_#t~mem325#1.offset, main_#t~mem326#1.base, main_#t~mem326#1.offset, main_#t~mem327#1.base, main_#t~mem327#1.offset, main_#t~mem328#1.base, main_#t~mem328#1.offset, main_#t~mem329#1.base, main_#t~mem329#1.offset, main_#t~mem330#1, main_#t~mem331#1.base, main_#t~mem331#1.offset, main_#t~mem334#1, main_#t~mem332#1.base, main_#t~mem332#1.offset, main_#t~mem333#1, main_#t~bitwise335#1, main_#t~mem336#1.base, main_#t~mem336#1.offset, main_#t~mem337#1.base, main_#t~mem337#1.offset, main_#t~mem338#1, main_#t~post339#1, main_#t~mem340#1.base, main_#t~mem340#1.offset, main_#t~mem341#1.base, main_#t~mem341#1.offset, main_#t~mem342#1.base, main_#t~mem342#1.offset, main_#t~mem343#1.base, main_#t~mem343#1.offset, main_#t~mem344#1.base, main_#t~mem344#1.offset, main_#t~mem345#1.base, main_#t~mem345#1.offset, main_#t~mem346#1.base, main_#t~mem346#1.offset, main_#t~mem347#1.base, main_#t~mem347#1.offset, main_~_hd_head~1#1.base, main_~_hd_head~1#1.offset, main_#t~mem348#1.base, main_#t~mem348#1.offset, main_#t~mem349#1, main_#t~post350#1, main_~_hd_bkt~1#1, main_~_hd_hh_del~1#1.base, main_~_hd_hh_del~1#1.offset, main_#t~ite352#1.base, main_#t~ite352#1.offset, main_#t~mem351#1.base, main_#t~mem351#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int#3(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4);" [2024-11-28 02:47:32,290 INFO L749 eck$LassoCheckResult]: Loop: "call main_#t~mem40#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume main_#t~mem40#1 < 10;havoc main_#t~mem40#1;" "assume { :begin_inline_real_malloc } true;real_malloc_#in~n#1 := 40;havoc real_malloc_#res#1.base, real_malloc_#res#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset, real_malloc_~n#1;real_malloc_~n#1 := real_malloc_#in~n#1;call real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset := #Ultimate.allocOnHeap(real_malloc_~n#1 % 4294967296);real_malloc_#res#1.base, real_malloc_#res#1.offset := real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset;" "main_#t~ret41#1.base, main_#t~ret41#1.offset := real_malloc_#res#1.base, real_malloc_#res#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset, real_malloc_~n#1;havoc real_malloc_#in~n#1;assume { :end_inline_real_malloc } true;main_~user~0#1.base, main_~user~0#1.offset := main_#t~ret41#1.base, main_#t~ret41#1.offset;havoc main_#t~ret41#1.base, main_#t~ret41#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call main_#t~mem42#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem42#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem42#1;call main_#t~mem43#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem44#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem43#1 * main_#t~mem44#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem43#1;havoc main_#t~mem44#1;" "havoc main_~_ha_hashv~0#1;" "goto;" "havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4;" "assume !(main_~_hj_k~0#1 % 4294967296 >= 12);" "main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch66#1 := 11 == main_~_hj_k~0#1;" "assume !main_#t~switch66#1;" "main_#t~switch66#1 := main_#t~switch66#1 || 10 == main_~_hj_k~0#1;" "assume !main_#t~switch66#1;" "main_#t~switch66#1 := main_#t~switch66#1 || 9 == main_~_hj_k~0#1;" "assume !main_#t~switch66#1;" "main_#t~switch66#1 := main_#t~switch66#1 || 8 == main_~_hj_k~0#1;" "assume !main_#t~switch66#1;" "main_#t~switch66#1 := main_#t~switch66#1 || 7 == main_~_hj_k~0#1;" "assume !main_#t~switch66#1;" "main_#t~switch66#1 := main_#t~switch66#1 || 6 == main_~_hj_k~0#1;" "assume !main_#t~switch66#1;" "main_#t~switch66#1 := main_#t~switch66#1 || 5 == main_~_hj_k~0#1;" "assume !main_#t~switch66#1;" "main_#t~switch66#1 := main_#t~switch66#1 || 4 == main_~_hj_k~0#1;" "assume main_#t~switch66#1;call main_#t~mem74#1 := read~int#2(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem74#1 % 256 % 4294967296);" "main_#t~switch66#1 := main_#t~switch66#1 || 3 == main_~_hj_k~0#1;" "assume main_#t~switch66#1;call main_#t~mem75#1 := read~int#2(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem75#1 % 256 % 4294967296);" "main_#t~switch66#1 := main_#t~switch66#1 || 2 == main_~_hj_k~0#1;" "assume main_#t~switch66#1;call main_#t~mem76#1 := read~int#2(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem76#1 % 256 % 4294967296);" "main_#t~switch66#1 := main_#t~switch66#1 || 1 == main_~_hj_k~0#1;" "assume main_#t~switch66#1;call main_#t~mem77#1 := read~int#2(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem77#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem77#1 % 256 % 4294967296 else main_#t~mem77#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch66#1;havoc main_#t~mem67#1;havoc main_#t~mem68#1;havoc main_#t~mem69#1;havoc main_#t~mem70#1;havoc main_#t~mem71#1;havoc main_#t~mem72#1;havoc main_#t~mem73#1;havoc main_#t~mem74#1;havoc main_#t~mem75#1;havoc main_#t~mem76#1;havoc main_#t~mem77#1;havoc main_#t~switch66#1;havoc main_#t~mem67#1;havoc main_#t~mem68#1;havoc main_#t~mem69#1;havoc main_#t~mem70#1;havoc main_#t~mem71#1;havoc main_#t~mem72#1;havoc main_#t~mem73#1;havoc main_#t~mem74#1;havoc main_#t~mem75#1;havoc main_#t~mem76#1;havoc main_#t~mem77#1;" "main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise78#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192;" "main_~_hj_i~0#1 := main_#t~bitwise78#1;havoc main_#t~bitwise78#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume !(0 == main_~_hj_j~0#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296);" "assume !(main_~_hj_j~0#1 % 4294967296 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296);" "havoc main_#t~bitwise79#1;assume main_#t~bitwise79#1 % 4294967296 <= main_~_hj_j~0#1 % 4294967296 + 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296;" "main_~_hj_j~0#1 := main_#t~bitwise79#1;havoc main_#t~bitwise79#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise80#1 := main_~_hj_j~0#1 % 4294967296 / 8192;" "main_~_ha_hashv~0#1 := main_#t~bitwise80#1;havoc main_#t~bitwise80#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise81#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096;" "main_~_hj_i~0#1 := main_#t~bitwise81#1;havoc main_#t~bitwise81#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise82#1 := 65536 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise82#1;havoc main_#t~bitwise82#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise83#1 := main_~_hj_j~0#1 % 4294967296 / 32;" "main_~_ha_hashv~0#1 := main_#t~bitwise83#1;havoc main_#t~bitwise83#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise84#1 := main_~_ha_hashv~0#1 % 4294967296 / 8;" "main_~_hj_i~0#1 := main_#t~bitwise84#1;havoc main_#t~bitwise84#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise85#1 := 1024 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise85#1;havoc main_#t~bitwise85#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise86#1 := main_~_hj_j~0#1 % 4294967296 / 32768;" "main_~_ha_hashv~0#1 := main_#t~bitwise86#1;havoc main_#t~bitwise86#1;" "assume !false;" "havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset;" "assume !false;" "assume !false;" "call write~int#2(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#2(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4);" "assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem102#1.base, main_#t~mem102#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#2(main_#t~mem102#1.base, main_#t~mem102#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem102#1.base, main_#t~mem102#1.offset;" "call write~$Pointer$#2(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem103#1.base, main_#t~mem103#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem104#1.base, main_#t~mem104#1.offset := read~$Pointer$#2(main_#t~mem103#1.base, 16 + main_#t~mem103#1.offset, 4);call main_#t~mem105#1.base, main_#t~mem105#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem106#1 := read~int#2(main_#t~mem105#1.base, 20 + main_#t~mem105#1.offset, 4);call write~$Pointer$#2(main_#t~mem104#1.base, main_#t~mem104#1.offset - main_#t~mem106#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem103#1.base, main_#t~mem103#1.offset;havoc main_#t~mem104#1.base, main_#t~mem104#1.offset;havoc main_#t~mem105#1.base, main_#t~mem105#1.offset;havoc main_#t~mem106#1;call main_#t~mem107#1.base, main_#t~mem107#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem108#1.base, main_#t~mem108#1.offset := read~$Pointer$#2(main_#t~mem107#1.base, 16 + main_#t~mem107#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem108#1.base, 8 + main_#t~mem108#1.offset, 4);havoc main_#t~mem107#1.base, main_#t~mem107#1.offset;havoc main_#t~mem108#1.base, main_#t~mem108#1.offset;call main_#t~mem109#1.base, main_#t~mem109#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem109#1.base, 16 + main_#t~mem109#1.offset, 4);havoc main_#t~mem109#1.base, main_#t~mem109#1.offset;" "assume !false;" "havoc main_~_ha_bkt~0#1;call main_#t~mem110#1.base, main_#t~mem110#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem111#1 := read~int#2(main_#t~mem110#1.base, 12 + main_#t~mem110#1.offset, 4);main_#t~post112#1 := main_#t~mem111#1;call write~int#2(1 + main_#t~post112#1, main_#t~mem110#1.base, 12 + main_#t~mem110#1.offset, 4);havoc main_#t~mem110#1.base, main_#t~mem110#1.offset;havoc main_#t~mem111#1;havoc main_#t~post112#1;" "call main_#t~mem113#1.base, main_#t~mem113#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem114#1 := read~int#2(main_#t~mem113#1.base, 4 + main_#t~mem113#1.offset, 4);" "assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem114#1 - 1) % 4294967296;main_#t~bitwise115#1 := 0;" "main_~_ha_bkt~0#1 := main_#t~bitwise115#1;havoc main_#t~mem113#1.base, main_#t~mem113#1.offset;havoc main_#t~mem114#1;havoc main_#t~bitwise115#1;" "assume !false;" "call main_#t~mem116#1.base, main_#t~mem116#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem117#1.base, main_#t~mem117#1.offset := read~$Pointer$#2(main_#t~mem116#1.base, main_#t~mem116#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem117#1.base, main_#t~mem117#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem116#1.base, main_#t~mem116#1.offset;havoc main_#t~mem117#1.base, main_#t~mem117#1.offset;call main_#t~mem118#1 := read~int#2(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post119#1 := main_#t~mem118#1;call write~int#2(1 + main_#t~post119#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem118#1;havoc main_#t~post119#1;call main_#t~mem120#1.base, main_#t~mem120#1.offset := read~$Pointer$#2(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#2(main_#t~mem120#1.base, main_#t~mem120#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem120#1.base, main_#t~mem120#1.offset;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem121#1.base, main_#t~mem121#1.offset := read~$Pointer$#2(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);" "assume main_#t~mem121#1.base != 0 || main_#t~mem121#1.offset != 0;havoc main_#t~mem121#1.base, main_#t~mem121#1.offset;call main_#t~mem122#1.base, main_#t~mem122#1.offset := read~$Pointer$#2(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem122#1.base, 12 + main_#t~mem122#1.offset, 4);havoc main_#t~mem122#1.base, main_#t~mem122#1.offset;" "call write~$Pointer$#2(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem124#1 := read~int#2(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem123#1 := read~int#2(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short127#1 := main_#t~mem124#1 % 4294967296 >= 10 * (1 + main_#t~mem123#1) % 4294967296;" "assume main_#t~short127#1;call main_#t~mem125#1.base, main_#t~mem125#1.offset := read~$Pointer$#2(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem126#1 := read~int#2(main_#t~mem125#1.base, 36 + main_#t~mem125#1.offset, 4);main_#t~short127#1 := 0 == main_#t~mem126#1 % 4294967296;" "assume !main_#t~short127#1;havoc main_#t~mem124#1;havoc main_#t~mem123#1;havoc main_#t~mem125#1.base, main_#t~mem125#1.offset;havoc main_#t~mem126#1;havoc main_#t~short127#1;" "havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset;" "assume !false;" "havoc main_~_ha_bkt~0#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~0#1;" "assume !false;" "call main_#t~mem193#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post194#1 := main_#t~mem193#1;call write~int#3(1 + main_#t~post194#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem193#1;havoc main_#t~post194#1;" [2024-11-28 02:47:32,290 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 02:47:32,290 INFO L85 PathProgramCache]: Analyzing trace with hash 2115, now seen corresponding path program 5 times [2024-11-28 02:47:32,291 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM [2024-11-28 02:47:32,291 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [623374515] [2024-11-28 02:47:32,291 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:47:32,291 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 02:47:32,309 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-28 02:47:32,309 INFO L357 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-28 02:47:32,318 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-28 02:47:32,328 INFO L130 FreeRefinementEngine]: Strategy CAMEL_NO_AM found a feasible trace [2024-11-28 02:47:32,329 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 02:47:32,329 INFO L85 PathProgramCache]: Analyzing trace with hash 61996797, now seen corresponding path program 1 times [2024-11-28 02:47:32,329 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM [2024-11-28 02:47:32,329 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1895742758] [2024-11-28 02:47:32,329 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:47:32,329 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 02:47:33,267 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 02:47:34,561 INFO L136 FreeRefinementEngine]: Strategy CAMEL_NO_AM found an infeasible trace [2024-11-28 02:47:34,561 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1895742758] [2024-11-28 02:47:34,562 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1895742758] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-28 02:47:34,562 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1518947] [2024-11-28 02:47:34,562 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:47:34,562 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-28 02:47:34,562 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3f86fdff-c6c4-46c5-9202-1e23723ed6cd/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 02:47:34,567 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3f86fdff-c6c4-46c5-9202-1e23723ed6cd/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-28 02:47:34,569 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3f86fdff-c6c4-46c5-9202-1e23723ed6cd/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2024-11-28 02:47:36,409 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 02:47:36,413 INFO L256 TraceCheckSpWp]: Trace formula consists of 525 conjuncts, 18 conjuncts are in the unsatisfiable core [2024-11-28 02:47:36,417 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-28 02:47:49,811 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-28 02:48:40,551 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1518947] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-28 02:48:40,551 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-28 02:48:40,551 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 9, 9] total 22 [2024-11-28 02:48:40,552 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1389924042] [2024-11-28 02:48:40,552 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-28 02:48:40,552 INFO L764 eck$LassoCheckResult]: loop already infeasible [2024-11-28 02:48:40,553 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL_NO_AM [2024-11-28 02:48:40,553 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2024-11-28 02:48:40,554 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=67, Invalid=391, Unknown=4, NotChecked=0, Total=462 [2024-11-28 02:48:40,554 INFO L87 Difference]: Start difference. First operand 429 states and 579 transitions. cyclomatic complexity: 154 Second operand has 22 states, 22 states have (on average 5.681818181818182) internal successors, (125), 22 states have internal predecessors, (125), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 02:48:45,602 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.27s for a HTC check with result VALID. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [] [2024-11-28 02:48:49,358 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 3.74s for a HTC check with result VALID. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [] [2024-11-28 02:48:59,499 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 3.90s for a HTC check with result VALID. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [] [2024-11-28 02:49:04,172 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.52s for a HTC check with result VALID. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [0] [2024-11-28 02:49:12,657 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 02:49:12,657 INFO L93 Difference]: Finished difference Result 562 states and 761 transitions. [2024-11-28 02:49:12,657 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 562 states and 761 transitions. [2024-11-28 02:49:12,663 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 544 [2024-11-28 02:49:12,668 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 562 states to 562 states and 761 transitions. [2024-11-28 02:49:12,668 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 562 [2024-11-28 02:49:12,669 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 562 [2024-11-28 02:49:12,669 INFO L73 IsDeterministic]: Start isDeterministic. Operand 562 states and 761 transitions. [2024-11-28 02:49:12,671 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-28 02:49:12,671 INFO L218 hiAutomatonCegarLoop]: Abstraction has 562 states and 761 transitions. [2024-11-28 02:49:12,672 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 562 states and 761 transitions. [2024-11-28 02:49:12,680 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 562 to 445. [2024-11-28 02:49:12,682 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 445 states, 441 states have (on average 1.3514739229024944) internal successors, (596), 440 states have internal predecessors, (596), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-28 02:49:12,685 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 445 states to 445 states and 602 transitions. [2024-11-28 02:49:12,685 INFO L240 hiAutomatonCegarLoop]: Abstraction has 445 states and 602 transitions. [2024-11-28 02:49:12,686 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2024-11-28 02:49:12,686 INFO L425 stractBuchiCegarLoop]: Abstraction has 445 states and 602 transitions. [2024-11-28 02:49:12,687 INFO L332 stractBuchiCegarLoop]: ======== Iteration 6 ============ [2024-11-28 02:49:12,687 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 445 states and 602 transitions. [2024-11-28 02:49:12,690 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 427 [2024-11-28 02:49:12,690 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-28 02:49:12,690 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-28 02:49:12,691 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2024-11-28 02:49:12,691 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 02:49:12,692 INFO L747 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(21, 2);call #Ultimate.allocInit(40, 3);~#alt_malloc_sizes~0.base, ~#alt_malloc_sizes~0.offset := 3, 0;call write~init~int#1(0, ~#alt_malloc_sizes~0.base, ~#alt_malloc_sizes~0.offset, 4);call write~init~int#1(0, ~#alt_malloc_sizes~0.base, 4 + ~#alt_malloc_sizes~0.offset, 4);call write~init~int#1(0, ~#alt_malloc_sizes~0.base, 8 + ~#alt_malloc_sizes~0.offset, 4);call write~init~int#1(0, ~#alt_malloc_sizes~0.base, 12 + ~#alt_malloc_sizes~0.offset, 4);call write~init~int#1(0, ~#alt_malloc_sizes~0.base, 16 + ~#alt_malloc_sizes~0.offset, 4);call write~init~int#1(0, ~#alt_malloc_sizes~0.base, 20 + ~#alt_malloc_sizes~0.offset, 4);call write~init~int#1(0, ~#alt_malloc_sizes~0.base, 24 + ~#alt_malloc_sizes~0.offset, 4);call write~init~int#1(0, ~#alt_malloc_sizes~0.base, 28 + ~#alt_malloc_sizes~0.offset, 4);call write~init~int#1(0, ~#alt_malloc_sizes~0.base, 32 + ~#alt_malloc_sizes~0.offset, 4);call write~init~int#1(0, ~#alt_malloc_sizes~0.base, 36 + ~#alt_malloc_sizes~0.offset, 4);~alt_malloc_balance~0 := 0;~alt_memcmp_count~0 := 0;~alt_bzero_count~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~mem40#1, main_#t~ret41#1.base, main_#t~ret41#1.offset, main_#t~mem42#1, main_#t~mem43#1, main_#t~mem44#1, main_#t~mem46#1, main_#t~mem45#1, main_#t~mem47#1, main_#t~mem48#1, main_#t~mem50#1, main_#t~mem49#1, main_#t~mem51#1, main_#t~mem52#1, main_#t~mem54#1, main_#t~mem53#1, main_#t~mem55#1, main_#t~mem56#1, main_#t~bitwise57#1, main_#t~bitwise58#1, main_#t~bitwise59#1, main_#t~bitwise60#1, main_#t~bitwise61#1, main_#t~bitwise62#1, main_#t~bitwise63#1, main_#t~bitwise64#1, main_#t~bitwise65#1, main_#t~switch66#1, main_#t~mem67#1, main_#t~mem68#1, main_#t~mem69#1, main_#t~mem70#1, main_#t~mem71#1, main_#t~mem72#1, main_#t~mem73#1, main_#t~mem74#1, main_#t~mem75#1, main_#t~mem76#1, main_#t~mem77#1, main_#t~bitwise78#1, main_#t~bitwise79#1, main_#t~bitwise80#1, main_#t~bitwise81#1, main_#t~bitwise82#1, main_#t~bitwise83#1, main_#t~bitwise84#1, main_#t~bitwise85#1, main_#t~bitwise86#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~ret87#1.base, main_#t~ret87#1.offset, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~ret95#1.base, main_#t~ret95#1.offset, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1, main_#t~mem107#1.base, main_#t~mem107#1.offset, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1, main_#t~post112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1, main_#t~bitwise115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1, main_#t~post119#1, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem124#1, main_#t~mem123#1, main_#t~mem125#1.base, main_#t~mem125#1.offset, main_#t~mem126#1, main_#t~short127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~ret130#1.base, main_#t~ret130#1.offset, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem132#1, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem137#1, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~mem136#1, main_#t~bitwise138#1, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem142#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1, main_#t~bitwise143#1, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem153#1, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1, main_#t~bitwise154#1, main_#t~mem155#1, main_#t~pre156#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_#t~mem160#1, main_#t~post161#1, main_#t~mem165#1, main_#t~mem163#1, main_#t~mem162#1.base, main_#t~mem162#1.offset, main_#t~mem164#1, main_#t~mem166#1, main_#t~post167#1, main_#t~mem168#1.base, main_#t~mem168#1.offset, main_#t~mem169#1.base, main_#t~mem169#1.offset, main_#t~mem170#1.base, main_#t~mem170#1.offset, main_#t~post171#1, main_#t~mem172#1.base, main_#t~mem172#1.offset, main_#t~mem173#1.base, main_#t~mem173#1.offset, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1, main_#t~mem176#1.base, main_#t~mem176#1.offset, main_#t~mem177#1, main_#t~mem178#1.base, main_#t~mem178#1.offset, main_#t~mem179#1, main_#t~post180#1, main_#t~mem181#1.base, main_#t~mem181#1.offset, main_#t~mem182#1.base, main_#t~mem182#1.offset, main_#t~mem183#1.base, main_#t~mem183#1.offset, main_#t~mem186#1, main_#t~mem184#1.base, main_#t~mem184#1.offset, main_#t~mem185#1, main_#t~ite189#1, main_#t~mem187#1.base, main_#t~mem187#1.offset, main_#t~mem188#1, main_#t~mem190#1.base, main_#t~mem190#1.offset, main_#t~mem191#1, main_#t~mem192#1.base, main_#t~mem192#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem193#1, main_#t~post194#1, main_#t~mem195#1, main_#t~mem197#1, main_#t~mem196#1, main_#t~mem198#1, main_#t~mem199#1, main_#t~mem201#1, main_#t~mem200#1, main_#t~mem202#1, main_#t~mem203#1, main_#t~mem205#1, main_#t~mem204#1, main_#t~mem206#1, main_#t~mem207#1, main_#t~bitwise208#1, main_#t~bitwise209#1, main_#t~bitwise210#1, main_#t~bitwise211#1, main_#t~bitwise212#1, main_#t~bitwise213#1, main_#t~bitwise214#1, main_#t~bitwise215#1, main_#t~bitwise216#1, main_#t~switch217#1, main_#t~mem218#1, main_#t~mem219#1, main_#t~mem220#1, main_#t~mem221#1, main_#t~mem222#1, main_#t~mem223#1, main_#t~mem224#1, main_#t~mem225#1, main_#t~mem226#1, main_#t~mem227#1, main_#t~mem228#1, main_#t~bitwise229#1, main_#t~bitwise230#1, main_#t~bitwise231#1, main_#t~bitwise232#1, main_#t~bitwise233#1, main_#t~bitwise234#1, main_#t~bitwise235#1, main_#t~bitwise236#1, main_#t~bitwise237#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1, main_#t~bitwise240#1, main_#t~mem241#1.base, main_#t~mem241#1.offset, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1, main_#t~mem249#1, main_#t~mem250#1, main_#t~short251#1, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~ret253#1, main_#t~mem254#1.base, main_#t~mem254#1.offset, main_#t~mem255#1.base, main_#t~mem255#1.offset, main_#t~mem256#1.base, main_#t~mem256#1.offset, main_#t~mem257#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1.base, main_#t~mem259#1.offset, main_#t~short260#1, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~mem271#1, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1.base, main_#t~mem273#1.offset, main_#t~mem274#1.base, main_#t~mem274#1.offset, main_#t~mem275#1, main_#t~mem276#1.base, main_#t~mem276#1.offset, main_#t~mem277#1.base, main_#t~mem277#1.offset, main_#t~mem278#1.base, main_#t~mem278#1.offset, main_#t~mem279#1.base, main_#t~mem279#1.offset, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem281#1, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem285#1, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~mem284#1, main_#t~bitwise286#1, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~mem289#1, main_#t~post290#1, main_#t~mem291#1.base, main_#t~mem291#1.offset, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1.base, main_#t~mem296#1.offset, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem300#1, main_#t~post301#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem302#1, main_#t~post303#1, main_#t~mem304#1.base, main_#t~mem304#1.offset, main_#t~ite306#1.base, main_#t~ite306#1.offset, main_#t~mem305#1.base, main_#t~mem305#1.offset, main_#t~mem307#1.base, main_#t~mem307#1.offset, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~short309#1, main_#t~mem310#1.base, main_#t~mem310#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1.base, main_#t~mem312#1.offset, main_#t~mem313#1, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~mem315#1.base, main_#t~mem315#1.offset, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~mem317#1.base, main_#t~mem317#1.offset, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_#t~mem319#1.base, main_#t~mem319#1.offset, main_#t~mem320#1, main_#t~mem321#1.base, main_#t~mem321#1.offset, main_#t~mem322#1.base, main_#t~mem322#1.offset, main_#t~mem323#1.base, main_#t~mem323#1.offset, main_#t~mem324#1, main_#t~mem325#1.base, main_#t~mem325#1.offset, main_#t~mem326#1.base, main_#t~mem326#1.offset, main_#t~mem327#1.base, main_#t~mem327#1.offset, main_#t~mem328#1.base, main_#t~mem328#1.offset, main_#t~mem329#1.base, main_#t~mem329#1.offset, main_#t~mem330#1, main_#t~mem331#1.base, main_#t~mem331#1.offset, main_#t~mem334#1, main_#t~mem332#1.base, main_#t~mem332#1.offset, main_#t~mem333#1, main_#t~bitwise335#1, main_#t~mem336#1.base, main_#t~mem336#1.offset, main_#t~mem337#1.base, main_#t~mem337#1.offset, main_#t~mem338#1, main_#t~post339#1, main_#t~mem340#1.base, main_#t~mem340#1.offset, main_#t~mem341#1.base, main_#t~mem341#1.offset, main_#t~mem342#1.base, main_#t~mem342#1.offset, main_#t~mem343#1.base, main_#t~mem343#1.offset, main_#t~mem344#1.base, main_#t~mem344#1.offset, main_#t~mem345#1.base, main_#t~mem345#1.offset, main_#t~mem346#1.base, main_#t~mem346#1.offset, main_#t~mem347#1.base, main_#t~mem347#1.offset, main_~_hd_head~1#1.base, main_~_hd_head~1#1.offset, main_#t~mem348#1.base, main_#t~mem348#1.offset, main_#t~mem349#1, main_#t~post350#1, main_~_hd_bkt~1#1, main_~_hd_hh_del~1#1.base, main_~_hd_hh_del~1#1.offset, main_#t~ite352#1.base, main_#t~ite352#1.offset, main_#t~mem351#1.base, main_#t~mem351#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int#3(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4);" [2024-11-28 02:49:12,692 INFO L749 eck$LassoCheckResult]: Loop: "call main_#t~mem40#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume main_#t~mem40#1 < 10;havoc main_#t~mem40#1;" "assume { :begin_inline_real_malloc } true;real_malloc_#in~n#1 := 40;havoc real_malloc_#res#1.base, real_malloc_#res#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset, real_malloc_~n#1;real_malloc_~n#1 := real_malloc_#in~n#1;call real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset := #Ultimate.allocOnHeap(real_malloc_~n#1 % 4294967296);real_malloc_#res#1.base, real_malloc_#res#1.offset := real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset;" "main_#t~ret41#1.base, main_#t~ret41#1.offset := real_malloc_#res#1.base, real_malloc_#res#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset, real_malloc_~n#1;havoc real_malloc_#in~n#1;assume { :end_inline_real_malloc } true;main_~user~0#1.base, main_~user~0#1.offset := main_#t~ret41#1.base, main_#t~ret41#1.offset;havoc main_#t~ret41#1.base, main_#t~ret41#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call main_#t~mem42#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem42#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem42#1;call main_#t~mem43#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem44#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem43#1 * main_#t~mem44#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem43#1;havoc main_#t~mem44#1;" "havoc main_~_ha_hashv~0#1;" "goto;" "havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4;" "assume !(main_~_hj_k~0#1 % 4294967296 >= 12);" "main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch66#1 := 11 == main_~_hj_k~0#1;" "assume !main_#t~switch66#1;" "main_#t~switch66#1 := main_#t~switch66#1 || 10 == main_~_hj_k~0#1;" "assume !main_#t~switch66#1;" "main_#t~switch66#1 := main_#t~switch66#1 || 9 == main_~_hj_k~0#1;" "assume !main_#t~switch66#1;" "main_#t~switch66#1 := main_#t~switch66#1 || 8 == main_~_hj_k~0#1;" "assume !main_#t~switch66#1;" "main_#t~switch66#1 := main_#t~switch66#1 || 7 == main_~_hj_k~0#1;" "assume !main_#t~switch66#1;" "main_#t~switch66#1 := main_#t~switch66#1 || 6 == main_~_hj_k~0#1;" "assume !main_#t~switch66#1;" "main_#t~switch66#1 := main_#t~switch66#1 || 5 == main_~_hj_k~0#1;" "assume !main_#t~switch66#1;" "main_#t~switch66#1 := main_#t~switch66#1 || 4 == main_~_hj_k~0#1;" "assume main_#t~switch66#1;call main_#t~mem74#1 := read~int#2(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem74#1 % 256 % 4294967296);" "main_#t~switch66#1 := main_#t~switch66#1 || 3 == main_~_hj_k~0#1;" "assume main_#t~switch66#1;call main_#t~mem75#1 := read~int#2(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem75#1 % 256 % 4294967296);" "main_#t~switch66#1 := main_#t~switch66#1 || 2 == main_~_hj_k~0#1;" "assume main_#t~switch66#1;call main_#t~mem76#1 := read~int#2(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem76#1 % 256 % 4294967296);" "main_#t~switch66#1 := main_#t~switch66#1 || 1 == main_~_hj_k~0#1;" "assume main_#t~switch66#1;call main_#t~mem77#1 := read~int#2(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem77#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem77#1 % 256 % 4294967296 else main_#t~mem77#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch66#1;havoc main_#t~mem67#1;havoc main_#t~mem68#1;havoc main_#t~mem69#1;havoc main_#t~mem70#1;havoc main_#t~mem71#1;havoc main_#t~mem72#1;havoc main_#t~mem73#1;havoc main_#t~mem74#1;havoc main_#t~mem75#1;havoc main_#t~mem76#1;havoc main_#t~mem77#1;havoc main_#t~switch66#1;havoc main_#t~mem67#1;havoc main_#t~mem68#1;havoc main_#t~mem69#1;havoc main_#t~mem70#1;havoc main_#t~mem71#1;havoc main_#t~mem72#1;havoc main_#t~mem73#1;havoc main_#t~mem74#1;havoc main_#t~mem75#1;havoc main_#t~mem76#1;havoc main_#t~mem77#1;" "main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume !(0 == main_~_hj_i~0#1 % 4294967296);" "assume !(0 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296);" "assume main_~_hj_i~0#1 % 4294967296 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise78#1 := 0;" "main_~_hj_i~0#1 := main_#t~bitwise78#1;havoc main_#t~bitwise78#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise79#1 := 256 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise79#1;havoc main_#t~bitwise79#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume !(0 == main_~_ha_hashv~0#1 % 4294967296);" "assume 0 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise80#1 := main_~_ha_hashv~0#1;" "main_~_ha_hashv~0#1 := main_#t~bitwise80#1;havoc main_#t~bitwise80#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise81#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096;" "main_~_hj_i~0#1 := main_#t~bitwise81#1;havoc main_#t~bitwise81#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise82#1 := 65536 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise82#1;havoc main_#t~bitwise82#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise83#1 := main_~_hj_j~0#1 % 4294967296 / 32;" "main_~_ha_hashv~0#1 := main_#t~bitwise83#1;havoc main_#t~bitwise83#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise84#1 := main_~_ha_hashv~0#1 % 4294967296 / 8;" "main_~_hj_i~0#1 := main_#t~bitwise84#1;havoc main_#t~bitwise84#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise85#1 := 1024 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise85#1;havoc main_#t~bitwise85#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise86#1 := main_~_hj_j~0#1 % 4294967296 / 32768;" "main_~_ha_hashv~0#1 := main_#t~bitwise86#1;havoc main_#t~bitwise86#1;" "assume !false;" "havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset;" "assume !false;" "assume !false;" "call write~int#2(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#2(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4);" "assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem102#1.base, main_#t~mem102#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#2(main_#t~mem102#1.base, main_#t~mem102#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem102#1.base, main_#t~mem102#1.offset;" "call write~$Pointer$#2(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem103#1.base, main_#t~mem103#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem104#1.base, main_#t~mem104#1.offset := read~$Pointer$#2(main_#t~mem103#1.base, 16 + main_#t~mem103#1.offset, 4);call main_#t~mem105#1.base, main_#t~mem105#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem106#1 := read~int#2(main_#t~mem105#1.base, 20 + main_#t~mem105#1.offset, 4);call write~$Pointer$#2(main_#t~mem104#1.base, main_#t~mem104#1.offset - main_#t~mem106#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem103#1.base, main_#t~mem103#1.offset;havoc main_#t~mem104#1.base, main_#t~mem104#1.offset;havoc main_#t~mem105#1.base, main_#t~mem105#1.offset;havoc main_#t~mem106#1;call main_#t~mem107#1.base, main_#t~mem107#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem108#1.base, main_#t~mem108#1.offset := read~$Pointer$#2(main_#t~mem107#1.base, 16 + main_#t~mem107#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem108#1.base, 8 + main_#t~mem108#1.offset, 4);havoc main_#t~mem107#1.base, main_#t~mem107#1.offset;havoc main_#t~mem108#1.base, main_#t~mem108#1.offset;call main_#t~mem109#1.base, main_#t~mem109#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem109#1.base, 16 + main_#t~mem109#1.offset, 4);havoc main_#t~mem109#1.base, main_#t~mem109#1.offset;" "assume !false;" "havoc main_~_ha_bkt~0#1;call main_#t~mem110#1.base, main_#t~mem110#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem111#1 := read~int#2(main_#t~mem110#1.base, 12 + main_#t~mem110#1.offset, 4);main_#t~post112#1 := main_#t~mem111#1;call write~int#2(1 + main_#t~post112#1, main_#t~mem110#1.base, 12 + main_#t~mem110#1.offset, 4);havoc main_#t~mem110#1.base, main_#t~mem110#1.offset;havoc main_#t~mem111#1;havoc main_#t~post112#1;" "call main_#t~mem113#1.base, main_#t~mem113#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem114#1 := read~int#2(main_#t~mem113#1.base, 4 + main_#t~mem113#1.offset, 4);" "assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem114#1 - 1) % 4294967296;main_#t~bitwise115#1 := 0;" "main_~_ha_bkt~0#1 := main_#t~bitwise115#1;havoc main_#t~mem113#1.base, main_#t~mem113#1.offset;havoc main_#t~mem114#1;havoc main_#t~bitwise115#1;" "assume !false;" "call main_#t~mem116#1.base, main_#t~mem116#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem117#1.base, main_#t~mem117#1.offset := read~$Pointer$#2(main_#t~mem116#1.base, main_#t~mem116#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem117#1.base, main_#t~mem117#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem116#1.base, main_#t~mem116#1.offset;havoc main_#t~mem117#1.base, main_#t~mem117#1.offset;call main_#t~mem118#1 := read~int#2(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post119#1 := main_#t~mem118#1;call write~int#2(1 + main_#t~post119#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem118#1;havoc main_#t~post119#1;call main_#t~mem120#1.base, main_#t~mem120#1.offset := read~$Pointer$#2(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#2(main_#t~mem120#1.base, main_#t~mem120#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem120#1.base, main_#t~mem120#1.offset;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem121#1.base, main_#t~mem121#1.offset := read~$Pointer$#2(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);" "assume main_#t~mem121#1.base != 0 || main_#t~mem121#1.offset != 0;havoc main_#t~mem121#1.base, main_#t~mem121#1.offset;call main_#t~mem122#1.base, main_#t~mem122#1.offset := read~$Pointer$#2(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem122#1.base, 12 + main_#t~mem122#1.offset, 4);havoc main_#t~mem122#1.base, main_#t~mem122#1.offset;" "call write~$Pointer$#2(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem124#1 := read~int#2(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem123#1 := read~int#2(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short127#1 := main_#t~mem124#1 % 4294967296 >= 10 * (1 + main_#t~mem123#1) % 4294967296;" "assume main_#t~short127#1;call main_#t~mem125#1.base, main_#t~mem125#1.offset := read~$Pointer$#2(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem126#1 := read~int#2(main_#t~mem125#1.base, 36 + main_#t~mem125#1.offset, 4);main_#t~short127#1 := 0 == main_#t~mem126#1 % 4294967296;" "assume !main_#t~short127#1;havoc main_#t~mem124#1;havoc main_#t~mem123#1;havoc main_#t~mem125#1.base, main_#t~mem125#1.offset;havoc main_#t~mem126#1;havoc main_#t~short127#1;" "havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset;" "assume !false;" "havoc main_~_ha_bkt~0#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~0#1;" "assume !false;" "call main_#t~mem193#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post194#1 := main_#t~mem193#1;call write~int#3(1 + main_#t~post194#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem193#1;havoc main_#t~post194#1;" [2024-11-28 02:49:12,693 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 02:49:12,693 INFO L85 PathProgramCache]: Analyzing trace with hash 2115, now seen corresponding path program 6 times [2024-11-28 02:49:12,693 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM [2024-11-28 02:49:12,694 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1702434454] [2024-11-28 02:49:12,694 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:49:12,694 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 02:49:12,714 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-28 02:49:12,715 INFO L357 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-28 02:49:12,724 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-28 02:49:12,736 INFO L130 FreeRefinementEngine]: Strategy CAMEL_NO_AM found a feasible trace [2024-11-28 02:49:12,737 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 02:49:12,737 INFO L85 PathProgramCache]: Analyzing trace with hash 1037429849, now seen corresponding path program 1 times [2024-11-28 02:49:12,737 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM [2024-11-28 02:49:12,737 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1028443162] [2024-11-28 02:49:12,737 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:49:12,737 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 02:49:12,839 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 02:49:13,281 INFO L136 FreeRefinementEngine]: Strategy CAMEL_NO_AM found an infeasible trace [2024-11-28 02:49:13,281 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1028443162] [2024-11-28 02:49:13,281 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1028443162] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-28 02:49:13,284 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [760190457] [2024-11-28 02:49:13,284 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:49:13,285 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-28 02:49:13,285 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3f86fdff-c6c4-46c5-9202-1e23723ed6cd/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 02:49:13,289 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3f86fdff-c6c4-46c5-9202-1e23723ed6cd/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-28 02:49:13,291 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3f86fdff-c6c4-46c5-9202-1e23723ed6cd/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2024-11-28 02:49:13,674 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 02:49:13,677 INFO L256 TraceCheckSpWp]: Trace formula consists of 528 conjuncts, 13 conjuncts are in the unsatisfiable core [2024-11-28 02:49:13,680 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-28 02:49:13,957 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-28 02:49:14,222 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [760190457] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-28 02:49:14,222 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-28 02:49:14,222 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6, 6] total 14 [2024-11-28 02:49:14,223 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1813444479] [2024-11-28 02:49:14,223 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-28 02:49:14,223 INFO L764 eck$LassoCheckResult]: loop already infeasible [2024-11-28 02:49:14,223 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL_NO_AM [2024-11-28 02:49:14,224 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2024-11-28 02:49:14,224 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=50, Invalid=132, Unknown=0, NotChecked=0, Total=182 [2024-11-28 02:49:14,224 INFO L87 Difference]: Start difference. First operand 445 states and 602 transitions. cyclomatic complexity: 161 Second operand has 14 states, 14 states have (on average 10.214285714285714) internal successors, (143), 14 states have internal predecessors, (143), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 02:49:15,071 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 02:49:15,071 INFO L93 Difference]: Finished difference Result 458 states and 618 transitions. [2024-11-28 02:49:15,071 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 458 states and 618 transitions. [2024-11-28 02:49:15,075 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 440 [2024-11-28 02:49:15,080 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 458 states to 458 states and 618 transitions. [2024-11-28 02:49:15,080 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 458 [2024-11-28 02:49:15,082 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 458 [2024-11-28 02:49:15,083 INFO L73 IsDeterministic]: Start isDeterministic. Operand 458 states and 618 transitions. [2024-11-28 02:49:15,084 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-28 02:49:15,085 INFO L218 hiAutomatonCegarLoop]: Abstraction has 458 states and 618 transitions. [2024-11-28 02:49:15,086 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 458 states and 618 transitions. [2024-11-28 02:49:15,097 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 458 to 441. [2024-11-28 02:49:15,100 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 441 states, 437 states have (on average 1.3478260869565217) internal successors, (589), 436 states have internal predecessors, (589), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-28 02:49:15,103 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 441 states to 441 states and 595 transitions. [2024-11-28 02:49:15,103 INFO L240 hiAutomatonCegarLoop]: Abstraction has 441 states and 595 transitions. [2024-11-28 02:49:15,104 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2024-11-28 02:49:15,105 INFO L425 stractBuchiCegarLoop]: Abstraction has 441 states and 595 transitions. [2024-11-28 02:49:15,105 INFO L332 stractBuchiCegarLoop]: ======== Iteration 7 ============ [2024-11-28 02:49:15,106 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 441 states and 595 transitions. [2024-11-28 02:49:15,108 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 423 [2024-11-28 02:49:15,108 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-28 02:49:15,108 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-28 02:49:15,109 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2024-11-28 02:49:15,109 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 02:49:15,111 INFO L747 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(21, 2);call #Ultimate.allocInit(40, 3);~#alt_malloc_sizes~0.base, ~#alt_malloc_sizes~0.offset := 3, 0;call write~init~int#1(0, ~#alt_malloc_sizes~0.base, ~#alt_malloc_sizes~0.offset, 4);call write~init~int#1(0, ~#alt_malloc_sizes~0.base, 4 + ~#alt_malloc_sizes~0.offset, 4);call write~init~int#1(0, ~#alt_malloc_sizes~0.base, 8 + ~#alt_malloc_sizes~0.offset, 4);call write~init~int#1(0, ~#alt_malloc_sizes~0.base, 12 + ~#alt_malloc_sizes~0.offset, 4);call write~init~int#1(0, ~#alt_malloc_sizes~0.base, 16 + ~#alt_malloc_sizes~0.offset, 4);call write~init~int#1(0, ~#alt_malloc_sizes~0.base, 20 + ~#alt_malloc_sizes~0.offset, 4);call write~init~int#1(0, ~#alt_malloc_sizes~0.base, 24 + ~#alt_malloc_sizes~0.offset, 4);call write~init~int#1(0, ~#alt_malloc_sizes~0.base, 28 + ~#alt_malloc_sizes~0.offset, 4);call write~init~int#1(0, ~#alt_malloc_sizes~0.base, 32 + ~#alt_malloc_sizes~0.offset, 4);call write~init~int#1(0, ~#alt_malloc_sizes~0.base, 36 + ~#alt_malloc_sizes~0.offset, 4);~alt_malloc_balance~0 := 0;~alt_memcmp_count~0 := 0;~alt_bzero_count~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~mem40#1, main_#t~ret41#1.base, main_#t~ret41#1.offset, main_#t~mem42#1, main_#t~mem43#1, main_#t~mem44#1, main_#t~mem46#1, main_#t~mem45#1, main_#t~mem47#1, main_#t~mem48#1, main_#t~mem50#1, main_#t~mem49#1, main_#t~mem51#1, main_#t~mem52#1, main_#t~mem54#1, main_#t~mem53#1, main_#t~mem55#1, main_#t~mem56#1, main_#t~bitwise57#1, main_#t~bitwise58#1, main_#t~bitwise59#1, main_#t~bitwise60#1, main_#t~bitwise61#1, main_#t~bitwise62#1, main_#t~bitwise63#1, main_#t~bitwise64#1, main_#t~bitwise65#1, main_#t~switch66#1, main_#t~mem67#1, main_#t~mem68#1, main_#t~mem69#1, main_#t~mem70#1, main_#t~mem71#1, main_#t~mem72#1, main_#t~mem73#1, main_#t~mem74#1, main_#t~mem75#1, main_#t~mem76#1, main_#t~mem77#1, main_#t~bitwise78#1, main_#t~bitwise79#1, main_#t~bitwise80#1, main_#t~bitwise81#1, main_#t~bitwise82#1, main_#t~bitwise83#1, main_#t~bitwise84#1, main_#t~bitwise85#1, main_#t~bitwise86#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~ret87#1.base, main_#t~ret87#1.offset, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~ret95#1.base, main_#t~ret95#1.offset, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1, main_#t~mem107#1.base, main_#t~mem107#1.offset, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1, main_#t~post112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1, main_#t~bitwise115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1, main_#t~post119#1, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem124#1, main_#t~mem123#1, main_#t~mem125#1.base, main_#t~mem125#1.offset, main_#t~mem126#1, main_#t~short127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~ret130#1.base, main_#t~ret130#1.offset, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem132#1, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem137#1, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~mem136#1, main_#t~bitwise138#1, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem142#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1, main_#t~bitwise143#1, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem153#1, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1, main_#t~bitwise154#1, main_#t~mem155#1, main_#t~pre156#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_#t~mem160#1, main_#t~post161#1, main_#t~mem165#1, main_#t~mem163#1, main_#t~mem162#1.base, main_#t~mem162#1.offset, main_#t~mem164#1, main_#t~mem166#1, main_#t~post167#1, main_#t~mem168#1.base, main_#t~mem168#1.offset, main_#t~mem169#1.base, main_#t~mem169#1.offset, main_#t~mem170#1.base, main_#t~mem170#1.offset, main_#t~post171#1, main_#t~mem172#1.base, main_#t~mem172#1.offset, main_#t~mem173#1.base, main_#t~mem173#1.offset, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1, main_#t~mem176#1.base, main_#t~mem176#1.offset, main_#t~mem177#1, main_#t~mem178#1.base, main_#t~mem178#1.offset, main_#t~mem179#1, main_#t~post180#1, main_#t~mem181#1.base, main_#t~mem181#1.offset, main_#t~mem182#1.base, main_#t~mem182#1.offset, main_#t~mem183#1.base, main_#t~mem183#1.offset, main_#t~mem186#1, main_#t~mem184#1.base, main_#t~mem184#1.offset, main_#t~mem185#1, main_#t~ite189#1, main_#t~mem187#1.base, main_#t~mem187#1.offset, main_#t~mem188#1, main_#t~mem190#1.base, main_#t~mem190#1.offset, main_#t~mem191#1, main_#t~mem192#1.base, main_#t~mem192#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem193#1, main_#t~post194#1, main_#t~mem195#1, main_#t~mem197#1, main_#t~mem196#1, main_#t~mem198#1, main_#t~mem199#1, main_#t~mem201#1, main_#t~mem200#1, main_#t~mem202#1, main_#t~mem203#1, main_#t~mem205#1, main_#t~mem204#1, main_#t~mem206#1, main_#t~mem207#1, main_#t~bitwise208#1, main_#t~bitwise209#1, main_#t~bitwise210#1, main_#t~bitwise211#1, main_#t~bitwise212#1, main_#t~bitwise213#1, main_#t~bitwise214#1, main_#t~bitwise215#1, main_#t~bitwise216#1, main_#t~switch217#1, main_#t~mem218#1, main_#t~mem219#1, main_#t~mem220#1, main_#t~mem221#1, main_#t~mem222#1, main_#t~mem223#1, main_#t~mem224#1, main_#t~mem225#1, main_#t~mem226#1, main_#t~mem227#1, main_#t~mem228#1, main_#t~bitwise229#1, main_#t~bitwise230#1, main_#t~bitwise231#1, main_#t~bitwise232#1, main_#t~bitwise233#1, main_#t~bitwise234#1, main_#t~bitwise235#1, main_#t~bitwise236#1, main_#t~bitwise237#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1, main_#t~bitwise240#1, main_#t~mem241#1.base, main_#t~mem241#1.offset, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1, main_#t~mem249#1, main_#t~mem250#1, main_#t~short251#1, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~ret253#1, main_#t~mem254#1.base, main_#t~mem254#1.offset, main_#t~mem255#1.base, main_#t~mem255#1.offset, main_#t~mem256#1.base, main_#t~mem256#1.offset, main_#t~mem257#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1.base, main_#t~mem259#1.offset, main_#t~short260#1, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~mem271#1, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1.base, main_#t~mem273#1.offset, main_#t~mem274#1.base, main_#t~mem274#1.offset, main_#t~mem275#1, main_#t~mem276#1.base, main_#t~mem276#1.offset, main_#t~mem277#1.base, main_#t~mem277#1.offset, main_#t~mem278#1.base, main_#t~mem278#1.offset, main_#t~mem279#1.base, main_#t~mem279#1.offset, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem281#1, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem285#1, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~mem284#1, main_#t~bitwise286#1, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~mem289#1, main_#t~post290#1, main_#t~mem291#1.base, main_#t~mem291#1.offset, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1.base, main_#t~mem296#1.offset, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem300#1, main_#t~post301#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem302#1, main_#t~post303#1, main_#t~mem304#1.base, main_#t~mem304#1.offset, main_#t~ite306#1.base, main_#t~ite306#1.offset, main_#t~mem305#1.base, main_#t~mem305#1.offset, main_#t~mem307#1.base, main_#t~mem307#1.offset, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~short309#1, main_#t~mem310#1.base, main_#t~mem310#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1.base, main_#t~mem312#1.offset, main_#t~mem313#1, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~mem315#1.base, main_#t~mem315#1.offset, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~mem317#1.base, main_#t~mem317#1.offset, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_#t~mem319#1.base, main_#t~mem319#1.offset, main_#t~mem320#1, main_#t~mem321#1.base, main_#t~mem321#1.offset, main_#t~mem322#1.base, main_#t~mem322#1.offset, main_#t~mem323#1.base, main_#t~mem323#1.offset, main_#t~mem324#1, main_#t~mem325#1.base, main_#t~mem325#1.offset, main_#t~mem326#1.base, main_#t~mem326#1.offset, main_#t~mem327#1.base, main_#t~mem327#1.offset, main_#t~mem328#1.base, main_#t~mem328#1.offset, main_#t~mem329#1.base, main_#t~mem329#1.offset, main_#t~mem330#1, main_#t~mem331#1.base, main_#t~mem331#1.offset, main_#t~mem334#1, main_#t~mem332#1.base, main_#t~mem332#1.offset, main_#t~mem333#1, main_#t~bitwise335#1, main_#t~mem336#1.base, main_#t~mem336#1.offset, main_#t~mem337#1.base, main_#t~mem337#1.offset, main_#t~mem338#1, main_#t~post339#1, main_#t~mem340#1.base, main_#t~mem340#1.offset, main_#t~mem341#1.base, main_#t~mem341#1.offset, main_#t~mem342#1.base, main_#t~mem342#1.offset, main_#t~mem343#1.base, main_#t~mem343#1.offset, main_#t~mem344#1.base, main_#t~mem344#1.offset, main_#t~mem345#1.base, main_#t~mem345#1.offset, main_#t~mem346#1.base, main_#t~mem346#1.offset, main_#t~mem347#1.base, main_#t~mem347#1.offset, main_~_hd_head~1#1.base, main_~_hd_head~1#1.offset, main_#t~mem348#1.base, main_#t~mem348#1.offset, main_#t~mem349#1, main_#t~post350#1, main_~_hd_bkt~1#1, main_~_hd_hh_del~1#1.base, main_~_hd_hh_del~1#1.offset, main_#t~ite352#1.base, main_#t~ite352#1.offset, main_#t~mem351#1.base, main_#t~mem351#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int#3(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4);" [2024-11-28 02:49:15,111 INFO L749 eck$LassoCheckResult]: Loop: "call main_#t~mem40#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume main_#t~mem40#1 < 10;havoc main_#t~mem40#1;" "assume { :begin_inline_real_malloc } true;real_malloc_#in~n#1 := 40;havoc real_malloc_#res#1.base, real_malloc_#res#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset, real_malloc_~n#1;real_malloc_~n#1 := real_malloc_#in~n#1;call real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset := #Ultimate.allocOnHeap(real_malloc_~n#1 % 4294967296);real_malloc_#res#1.base, real_malloc_#res#1.offset := real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset;" "main_#t~ret41#1.base, main_#t~ret41#1.offset := real_malloc_#res#1.base, real_malloc_#res#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset, real_malloc_~n#1;havoc real_malloc_#in~n#1;assume { :end_inline_real_malloc } true;main_~user~0#1.base, main_~user~0#1.offset := main_#t~ret41#1.base, main_#t~ret41#1.offset;havoc main_#t~ret41#1.base, main_#t~ret41#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call main_#t~mem42#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem42#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem42#1;call main_#t~mem43#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem44#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem43#1 * main_#t~mem44#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem43#1;havoc main_#t~mem44#1;" "havoc main_~_ha_hashv~0#1;" "goto;" "havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4;" "assume !(main_~_hj_k~0#1 % 4294967296 >= 12);" "main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch66#1 := 11 == main_~_hj_k~0#1;" "assume !main_#t~switch66#1;" "main_#t~switch66#1 := main_#t~switch66#1 || 10 == main_~_hj_k~0#1;" "assume !main_#t~switch66#1;" "main_#t~switch66#1 := main_#t~switch66#1 || 9 == main_~_hj_k~0#1;" "assume !main_#t~switch66#1;" "main_#t~switch66#1 := main_#t~switch66#1 || 8 == main_~_hj_k~0#1;" "assume !main_#t~switch66#1;" "main_#t~switch66#1 := main_#t~switch66#1 || 7 == main_~_hj_k~0#1;" "assume !main_#t~switch66#1;" "main_#t~switch66#1 := main_#t~switch66#1 || 6 == main_~_hj_k~0#1;" "assume !main_#t~switch66#1;" "main_#t~switch66#1 := main_#t~switch66#1 || 5 == main_~_hj_k~0#1;" "assume !main_#t~switch66#1;" "main_#t~switch66#1 := main_#t~switch66#1 || 4 == main_~_hj_k~0#1;" "assume main_#t~switch66#1;call main_#t~mem74#1 := read~int#2(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem74#1 % 256 % 4294967296);" "main_#t~switch66#1 := main_#t~switch66#1 || 3 == main_~_hj_k~0#1;" "assume main_#t~switch66#1;call main_#t~mem75#1 := read~int#2(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem75#1 % 256 % 4294967296);" "main_#t~switch66#1 := main_#t~switch66#1 || 2 == main_~_hj_k~0#1;" "assume main_#t~switch66#1;call main_#t~mem76#1 := read~int#2(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem76#1 % 256 % 4294967296);" "main_#t~switch66#1 := main_#t~switch66#1 || 1 == main_~_hj_k~0#1;" "assume main_#t~switch66#1;call main_#t~mem77#1 := read~int#2(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem77#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem77#1 % 256 % 4294967296 else main_#t~mem77#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch66#1;havoc main_#t~mem67#1;havoc main_#t~mem68#1;havoc main_#t~mem69#1;havoc main_#t~mem70#1;havoc main_#t~mem71#1;havoc main_#t~mem72#1;havoc main_#t~mem73#1;havoc main_#t~mem74#1;havoc main_#t~mem75#1;havoc main_#t~mem76#1;havoc main_#t~mem77#1;havoc main_#t~switch66#1;havoc main_#t~mem67#1;havoc main_#t~mem68#1;havoc main_#t~mem69#1;havoc main_#t~mem70#1;havoc main_#t~mem71#1;havoc main_#t~mem72#1;havoc main_#t~mem73#1;havoc main_#t~mem74#1;havoc main_#t~mem75#1;havoc main_#t~mem76#1;havoc main_#t~mem77#1;" "main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume !(0 == main_~_hj_i~0#1 % 4294967296);" "assume !(0 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296);" "assume !(main_~_hj_i~0#1 % 4294967296 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296);" "havoc main_#t~bitwise78#1;assume main_#t~bitwise78#1 % 4294967296 <= main_~_hj_i~0#1 % 4294967296 + main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296;" "main_~_hj_i~0#1 := main_#t~bitwise78#1;havoc main_#t~bitwise78#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise79#1 := 256 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise79#1;havoc main_#t~bitwise79#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise80#1 := main_~_hj_j~0#1 % 4294967296 / 8192;" "main_~_ha_hashv~0#1 := main_#t~bitwise80#1;havoc main_#t~bitwise80#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise81#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096;" "main_~_hj_i~0#1 := main_#t~bitwise81#1;havoc main_#t~bitwise81#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise82#1 := 65536 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise82#1;havoc main_#t~bitwise82#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise83#1 := main_~_hj_j~0#1 % 4294967296 / 32;" "main_~_ha_hashv~0#1 := main_#t~bitwise83#1;havoc main_#t~bitwise83#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise84#1 := main_~_ha_hashv~0#1 % 4294967296 / 8;" "main_~_hj_i~0#1 := main_#t~bitwise84#1;havoc main_#t~bitwise84#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise85#1 := 1024 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise85#1;havoc main_#t~bitwise85#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise86#1 := main_~_hj_j~0#1 % 4294967296 / 32768;" "main_~_ha_hashv~0#1 := main_#t~bitwise86#1;havoc main_#t~bitwise86#1;" "assume !false;" "havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset;" "assume !false;" "assume !false;" "call write~int#2(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#2(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4);" "assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem102#1.base, main_#t~mem102#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#2(main_#t~mem102#1.base, main_#t~mem102#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem102#1.base, main_#t~mem102#1.offset;" "call write~$Pointer$#2(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem103#1.base, main_#t~mem103#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem104#1.base, main_#t~mem104#1.offset := read~$Pointer$#2(main_#t~mem103#1.base, 16 + main_#t~mem103#1.offset, 4);call main_#t~mem105#1.base, main_#t~mem105#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem106#1 := read~int#2(main_#t~mem105#1.base, 20 + main_#t~mem105#1.offset, 4);call write~$Pointer$#2(main_#t~mem104#1.base, main_#t~mem104#1.offset - main_#t~mem106#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem103#1.base, main_#t~mem103#1.offset;havoc main_#t~mem104#1.base, main_#t~mem104#1.offset;havoc main_#t~mem105#1.base, main_#t~mem105#1.offset;havoc main_#t~mem106#1;call main_#t~mem107#1.base, main_#t~mem107#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem108#1.base, main_#t~mem108#1.offset := read~$Pointer$#2(main_#t~mem107#1.base, 16 + main_#t~mem107#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem108#1.base, 8 + main_#t~mem108#1.offset, 4);havoc main_#t~mem107#1.base, main_#t~mem107#1.offset;havoc main_#t~mem108#1.base, main_#t~mem108#1.offset;call main_#t~mem109#1.base, main_#t~mem109#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem109#1.base, 16 + main_#t~mem109#1.offset, 4);havoc main_#t~mem109#1.base, main_#t~mem109#1.offset;" "assume !false;" "havoc main_~_ha_bkt~0#1;call main_#t~mem110#1.base, main_#t~mem110#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem111#1 := read~int#2(main_#t~mem110#1.base, 12 + main_#t~mem110#1.offset, 4);main_#t~post112#1 := main_#t~mem111#1;call write~int#2(1 + main_#t~post112#1, main_#t~mem110#1.base, 12 + main_#t~mem110#1.offset, 4);havoc main_#t~mem110#1.base, main_#t~mem110#1.offset;havoc main_#t~mem111#1;havoc main_#t~post112#1;" "call main_#t~mem113#1.base, main_#t~mem113#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem114#1 := read~int#2(main_#t~mem113#1.base, 4 + main_#t~mem113#1.offset, 4);" "assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem114#1 - 1) % 4294967296;main_#t~bitwise115#1 := 0;" "main_~_ha_bkt~0#1 := main_#t~bitwise115#1;havoc main_#t~mem113#1.base, main_#t~mem113#1.offset;havoc main_#t~mem114#1;havoc main_#t~bitwise115#1;" "assume !false;" "call main_#t~mem116#1.base, main_#t~mem116#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem117#1.base, main_#t~mem117#1.offset := read~$Pointer$#2(main_#t~mem116#1.base, main_#t~mem116#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem117#1.base, main_#t~mem117#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem116#1.base, main_#t~mem116#1.offset;havoc main_#t~mem117#1.base, main_#t~mem117#1.offset;call main_#t~mem118#1 := read~int#2(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post119#1 := main_#t~mem118#1;call write~int#2(1 + main_#t~post119#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem118#1;havoc main_#t~post119#1;call main_#t~mem120#1.base, main_#t~mem120#1.offset := read~$Pointer$#2(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#2(main_#t~mem120#1.base, main_#t~mem120#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem120#1.base, main_#t~mem120#1.offset;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem121#1.base, main_#t~mem121#1.offset := read~$Pointer$#2(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);" "assume main_#t~mem121#1.base != 0 || main_#t~mem121#1.offset != 0;havoc main_#t~mem121#1.base, main_#t~mem121#1.offset;call main_#t~mem122#1.base, main_#t~mem122#1.offset := read~$Pointer$#2(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem122#1.base, 12 + main_#t~mem122#1.offset, 4);havoc main_#t~mem122#1.base, main_#t~mem122#1.offset;" "call write~$Pointer$#2(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem124#1 := read~int#2(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem123#1 := read~int#2(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short127#1 := main_#t~mem124#1 % 4294967296 >= 10 * (1 + main_#t~mem123#1) % 4294967296;" "assume main_#t~short127#1;call main_#t~mem125#1.base, main_#t~mem125#1.offset := read~$Pointer$#2(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem126#1 := read~int#2(main_#t~mem125#1.base, 36 + main_#t~mem125#1.offset, 4);main_#t~short127#1 := 0 == main_#t~mem126#1 % 4294967296;" "assume !main_#t~short127#1;havoc main_#t~mem124#1;havoc main_#t~mem123#1;havoc main_#t~mem125#1.base, main_#t~mem125#1.offset;havoc main_#t~mem126#1;havoc main_#t~short127#1;" "havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset;" "assume !false;" "havoc main_~_ha_bkt~0#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~0#1;" "assume !false;" "call main_#t~mem193#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post194#1 := main_#t~mem193#1;call write~int#3(1 + main_#t~post194#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem193#1;havoc main_#t~post194#1;" [2024-11-28 02:49:15,112 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 02:49:15,112 INFO L85 PathProgramCache]: Analyzing trace with hash 2115, now seen corresponding path program 7 times [2024-11-28 02:49:15,112 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM [2024-11-28 02:49:15,112 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1768607714] [2024-11-28 02:49:15,112 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:49:15,112 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 02:49:15,125 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-28 02:49:15,126 INFO L357 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-28 02:49:15,132 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-28 02:49:15,140 INFO L130 FreeRefinementEngine]: Strategy CAMEL_NO_AM found a feasible trace [2024-11-28 02:49:15,140 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 02:49:15,141 INFO L85 PathProgramCache]: Analyzing trace with hash 1540729385, now seen corresponding path program 1 times [2024-11-28 02:49:15,141 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM [2024-11-28 02:49:15,141 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [627769988] [2024-11-28 02:49:15,141 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:49:15,141 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 02:49:15,446 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 02:49:15,847 INFO L136 FreeRefinementEngine]: Strategy CAMEL_NO_AM found an infeasible trace [2024-11-28 02:49:15,847 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [627769988] [2024-11-28 02:49:15,847 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [627769988] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-28 02:49:15,847 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1064233395] [2024-11-28 02:49:15,847 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:49:15,847 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-28 02:49:15,847 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3f86fdff-c6c4-46c5-9202-1e23723ed6cd/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 02:49:15,854 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3f86fdff-c6c4-46c5-9202-1e23723ed6cd/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-28 02:49:15,856 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3f86fdff-c6c4-46c5-9202-1e23723ed6cd/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2024-11-28 02:49:16,459 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 02:49:16,464 INFO L256 TraceCheckSpWp]: Trace formula consists of 525 conjuncts, 16 conjuncts are in the unsatisfiable core [2024-11-28 02:49:16,467 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-28 02:49:16,892 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-28 02:49:29,070 WARN L286 SmtUtils]: Spent 12.01s on a formula simplification that was a NOOP. DAG size: 13 (called from [L 188] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.DualJunctionTir.tryToEliminateOne) [2024-11-28 02:49:41,081 WARN L286 SmtUtils]: Spent 12.01s on a formula simplification that was a NOOP. DAG size: 13 (called from [L 728] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher.simplify) [2024-11-28 02:49:53,091 WARN L286 SmtUtils]: Spent 12.01s on a formula simplification that was a NOOP. DAG size: 9 (called from [L 728] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher.simplify) [2024-11-28 02:50:05,127 WARN L286 SmtUtils]: Spent 12.03s on a formula simplification that was a NOOP. DAG size: 5 (called from [L 728] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher.simplify) [2024-11-28 02:50:17,148 WARN L873 $PredicateComparison]: unable to prove that (let ((.cse1 (mod (+ |c_ULTIMATE.start_main_~_hj_j~0#1| (* 4294967295 |c_ULTIMATE.start_main_~_ha_hashv~0#1|)) 4294967296)) (.cse0 (mod |c_ULTIMATE.start_main_~_ha_hashv~0#1| 4294967296))) (and (or (< (mod (+ 4294967295 (* 4294967039 |c_ULTIMATE.start_main_~_ha_hashv~0#1|) (* 257 |c_ULTIMATE.start_main_~_hj_j~0#1|)) 4294967296) (+ 4294967295 .cse0)) (< .cse1 1)) (forall ((v_z_25 Int) (v_y_25 Int)) (let ((.cse2 (* v_y_25 4294967296)) (.cse3 (* 257 v_z_25))) (or (< (+ .cse2 .cse3) 0) (< 0 (+ .cse2 .cse0 .cse3)) (< 0 (+ .cse1 v_z_25)) (< v_z_25 0)))) (or (< .cse0 1) (< 0 (mod (+ |c_ULTIMATE.start_main_~_hj_j~0#1| (* 16711934 |c_ULTIMATE.start_main_~_ha_hashv~0#1|)) 4294967296))))) is different from true [2024-11-28 02:50:29,297 WARN L286 SmtUtils]: Spent 12.01s on a formula simplification that was a NOOP. DAG size: 9 (called from [L 728] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher.simplify) [2024-11-28 02:50:41,311 WARN L286 SmtUtils]: Spent 12.01s on a formula simplification that was a NOOP. DAG size: 13 (called from [L 728] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher.simplify) [2024-11-28 02:50:53,637 WARN L286 SmtUtils]: Spent 12.02s on a formula simplification that was a NOOP. DAG size: 9 (called from [L 728] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher.simplify) [2024-11-28 02:51:05,664 WARN L286 SmtUtils]: Spent 12.03s on a formula simplification that was a NOOP. DAG size: 13 (called from [L 728] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher.simplify) [2024-11-28 02:51:17,717 WARN L286 SmtUtils]: Spent 12.03s on a formula simplification that was a NOOP. DAG size: 5 (called from [L 728] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher.simplify) [2024-11-28 02:51:29,768 WARN L286 SmtUtils]: Spent 12.02s on a formula simplification that was a NOOP. DAG size: 9 (called from [L 728] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher.simplify) [2024-11-28 02:51:41,782 WARN L286 SmtUtils]: Spent 12.01s on a formula simplification that was a NOOP. DAG size: 13 (called from [L 728] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher.simplify) [2024-11-28 02:51:53,859 WARN L286 SmtUtils]: Spent 12.03s on a formula simplification that was a NOOP. DAG size: 5 (called from [L 728] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher.simplify) [2024-11-28 02:52:05,915 WARN L286 SmtUtils]: Spent 12.02s on a formula simplification that was a NOOP. DAG size: 9 (called from [L 728] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher.simplify) [2024-11-28 02:52:17,928 WARN L286 SmtUtils]: Spent 12.01s on a formula simplification that was a NOOP. DAG size: 13 (called from [L 728] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher.simplify) [2024-11-28 02:52:30,208 WARN L286 SmtUtils]: Spent 12.02s on a formula simplification that was a NOOP. DAG size: 9 (called from [L 728] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher.simplify) [2024-11-28 02:52:42,223 WARN L286 SmtUtils]: Spent 12.01s on a formula simplification that was a NOOP. DAG size: 13 (called from [L 728] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher.simplify) [2024-11-28 02:52:54,587 WARN L286 SmtUtils]: Spent 12.01s on a formula simplification that was a NOOP. DAG size: 9 (called from [L 728] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher.simplify) [2024-11-28 02:53:06,602 WARN L286 SmtUtils]: Spent 12.01s on a formula simplification that was a NOOP. DAG size: 13 (called from [L 728] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher.simplify) [2024-11-28 02:53:18,656 WARN L286 SmtUtils]: Spent 12.03s on a formula simplification that was a NOOP. DAG size: 5 (called from [L 728] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher.simplify) [2024-11-28 02:53:30,711 WARN L286 SmtUtils]: Spent 12.01s on a formula simplification that was a NOOP. DAG size: 9 (called from [L 728] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher.simplify) [2024-11-28 02:53:42,727 WARN L286 SmtUtils]: Spent 12.02s on a formula simplification that was a NOOP. DAG size: 13 (called from [L 728] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher.simplify) [2024-11-28 02:53:54,782 WARN L286 SmtUtils]: Spent 12.04s on a formula simplification that was a NOOP. DAG size: 5 (called from [L 728] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher.simplify) [2024-11-28 02:54:06,834 WARN L286 SmtUtils]: Spent 12.02s on a formula simplification that was a NOOP. DAG size: 9 (called from [L 728] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher.simplify) [2024-11-28 02:54:18,847 WARN L286 SmtUtils]: Spent 12.01s on a formula simplification that was a NOOP. DAG size: 13 (called from [L 728] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher.simplify) [2024-11-28 02:54:30,906 WARN L286 SmtUtils]: Spent 12.04s on a formula simplification that was a NOOP. DAG size: 5 (called from [L 728] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher.simplify) [2024-11-28 02:54:42,968 WARN L286 SmtUtils]: Spent 12.02s on a formula simplification that was a NOOP. DAG size: 9 (called from [L 728] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher.simplify) [2024-11-28 02:54:54,982 WARN L286 SmtUtils]: Spent 12.01s on a formula simplification that was a NOOP. DAG size: 13 (called from [L 728] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher.simplify) [2024-11-28 02:55:07,067 WARN L286 SmtUtils]: Spent 12.02s on a formula simplification that was a NOOP. DAG size: 9 (called from [L 728] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher.simplify) [2024-11-28 02:55:19,083 WARN L286 SmtUtils]: Spent 12.02s on a formula simplification that was a NOOP. DAG size: 13 (called from [L 728] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher.simplify) [2024-11-28 02:55:31,386 WARN L286 SmtUtils]: Spent 12.02s on a formula simplification that was a NOOP. DAG size: 9 (called from [L 728] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher.simplify) [2024-11-28 02:55:43,403 WARN L286 SmtUtils]: Spent 12.02s on a formula simplification that was a NOOP. DAG size: 13 (called from [L 728] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher.simplify) [2024-11-28 02:55:55,461 WARN L286 SmtUtils]: Spent 12.04s on a formula simplification that was a NOOP. DAG size: 5 (called from [L 728] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher.simplify) [2024-11-28 02:56:07,514 WARN L286 SmtUtils]: Spent 12.01s on a formula simplification that was a NOOP. DAG size: 9 (called from [L 728] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher.simplify) [2024-11-28 02:56:19,534 WARN L286 SmtUtils]: Spent 12.02s on a formula simplification that was a NOOP. DAG size: 13 (called from [L 728] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher.simplify) [2024-11-28 02:56:31,631 WARN L286 SmtUtils]: Spent 12.02s on a formula simplification that was a NOOP. DAG size: 9 (called from [L 728] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher.simplify) [2024-11-28 02:56:43,656 WARN L286 SmtUtils]: Spent 12.02s on a formula simplification that was a NOOP. DAG size: 13 (called from [L 728] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher.simplify) [2024-11-28 02:56:55,700 WARN L286 SmtUtils]: Spent 12.03s on a formula simplification that was a NOOP. DAG size: 5 (called from [L 728] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher.simplify) [2024-11-28 02:57:07,763 WARN L286 SmtUtils]: Spent 12.03s on a formula simplification that was a NOOP. DAG size: 9 (called from [L 728] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher.simplify) [2024-11-28 02:57:19,780 WARN L286 SmtUtils]: Spent 12.02s on a formula simplification that was a NOOP. DAG size: 13 (called from [L 728] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher.simplify) [2024-11-28 02:57:31,833 WARN L286 SmtUtils]: Spent 12.04s on a formula simplification that was a NOOP. DAG size: 5 (called from [L 728] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher.simplify) [2024-11-28 02:57:43,880 WARN L286 SmtUtils]: Spent 12.01s on a formula simplification that was a NOOP. DAG size: 9 (called from [L 728] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher.simplify) [2024-11-28 02:57:51,104 WARN L286 SmtUtils]: Spent 7.22s on a formula simplification. DAG size of input: 13 DAG size of output: 1 (called from [L 728] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher.simplify) [2024-11-28 02:57:51,908 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1064233395] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-28 02:57:51,908 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-28 02:57:51,908 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 8] total 18 [2024-11-28 02:57:51,908 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1285942626] [2024-11-28 02:57:51,909 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-28 02:57:51,909 INFO L764 eck$LassoCheckResult]: loop already infeasible [2024-11-28 02:57:51,909 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL_NO_AM [2024-11-28 02:57:51,909 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2024-11-28 02:57:51,909 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=65, Invalid=210, Unknown=1, NotChecked=30, Total=306 [2024-11-28 02:57:51,910 INFO L87 Difference]: Start difference. First operand 441 states and 595 transitions. cyclomatic complexity: 158 Second operand has 18 states, 18 states have (on average 8.277777777777779) internal successors, (149), 18 states have internal predecessors, (149), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 02:57:55,268 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 02:57:55,269 INFO L93 Difference]: Finished difference Result 521 states and 698 transitions. [2024-11-28 02:57:55,269 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 521 states and 698 transitions. [2024-11-28 02:57:55,274 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 503 [2024-11-28 02:57:55,279 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 521 states to 521 states and 698 transitions. [2024-11-28 02:57:55,279 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 521 [2024-11-28 02:57:55,280 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 521 [2024-11-28 02:57:55,280 INFO L73 IsDeterministic]: Start isDeterministic. Operand 521 states and 698 transitions. [2024-11-28 02:57:55,281 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-28 02:57:55,282 INFO L218 hiAutomatonCegarLoop]: Abstraction has 521 states and 698 transitions. [2024-11-28 02:57:55,283 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 521 states and 698 transitions. [2024-11-28 02:57:55,291 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 521 to 445. [2024-11-28 02:57:55,292 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 445 states, 441 states have (on average 1.344671201814059) internal successors, (593), 440 states have internal predecessors, (593), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-28 02:57:55,295 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 445 states to 445 states and 599 transitions. [2024-11-28 02:57:55,295 INFO L240 hiAutomatonCegarLoop]: Abstraction has 445 states and 599 transitions. [2024-11-28 02:57:55,296 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2024-11-28 02:57:55,296 INFO L425 stractBuchiCegarLoop]: Abstraction has 445 states and 599 transitions. [2024-11-28 02:57:55,296 INFO L332 stractBuchiCegarLoop]: ======== Iteration 8 ============ [2024-11-28 02:57:55,297 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 445 states and 599 transitions. [2024-11-28 02:57:55,300 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 427 [2024-11-28 02:57:55,300 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-28 02:57:55,300 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-28 02:57:55,301 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2024-11-28 02:57:55,301 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 02:57:55,301 INFO L747 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(21, 2);call #Ultimate.allocInit(40, 3);~#alt_malloc_sizes~0.base, ~#alt_malloc_sizes~0.offset := 3, 0;call write~init~int#1(0, ~#alt_malloc_sizes~0.base, ~#alt_malloc_sizes~0.offset, 4);call write~init~int#1(0, ~#alt_malloc_sizes~0.base, 4 + ~#alt_malloc_sizes~0.offset, 4);call write~init~int#1(0, ~#alt_malloc_sizes~0.base, 8 + ~#alt_malloc_sizes~0.offset, 4);call write~init~int#1(0, ~#alt_malloc_sizes~0.base, 12 + ~#alt_malloc_sizes~0.offset, 4);call write~init~int#1(0, ~#alt_malloc_sizes~0.base, 16 + ~#alt_malloc_sizes~0.offset, 4);call write~init~int#1(0, ~#alt_malloc_sizes~0.base, 20 + ~#alt_malloc_sizes~0.offset, 4);call write~init~int#1(0, ~#alt_malloc_sizes~0.base, 24 + ~#alt_malloc_sizes~0.offset, 4);call write~init~int#1(0, ~#alt_malloc_sizes~0.base, 28 + ~#alt_malloc_sizes~0.offset, 4);call write~init~int#1(0, ~#alt_malloc_sizes~0.base, 32 + ~#alt_malloc_sizes~0.offset, 4);call write~init~int#1(0, ~#alt_malloc_sizes~0.base, 36 + ~#alt_malloc_sizes~0.offset, 4);~alt_malloc_balance~0 := 0;~alt_memcmp_count~0 := 0;~alt_bzero_count~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~mem40#1, main_#t~ret41#1.base, main_#t~ret41#1.offset, main_#t~mem42#1, main_#t~mem43#1, main_#t~mem44#1, main_#t~mem46#1, main_#t~mem45#1, main_#t~mem47#1, main_#t~mem48#1, main_#t~mem50#1, main_#t~mem49#1, main_#t~mem51#1, main_#t~mem52#1, main_#t~mem54#1, main_#t~mem53#1, main_#t~mem55#1, main_#t~mem56#1, main_#t~bitwise57#1, main_#t~bitwise58#1, main_#t~bitwise59#1, main_#t~bitwise60#1, main_#t~bitwise61#1, main_#t~bitwise62#1, main_#t~bitwise63#1, main_#t~bitwise64#1, main_#t~bitwise65#1, main_#t~switch66#1, main_#t~mem67#1, main_#t~mem68#1, main_#t~mem69#1, main_#t~mem70#1, main_#t~mem71#1, main_#t~mem72#1, main_#t~mem73#1, main_#t~mem74#1, main_#t~mem75#1, main_#t~mem76#1, main_#t~mem77#1, main_#t~bitwise78#1, main_#t~bitwise79#1, main_#t~bitwise80#1, main_#t~bitwise81#1, main_#t~bitwise82#1, main_#t~bitwise83#1, main_#t~bitwise84#1, main_#t~bitwise85#1, main_#t~bitwise86#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~ret87#1.base, main_#t~ret87#1.offset, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~ret95#1.base, main_#t~ret95#1.offset, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1, main_#t~mem107#1.base, main_#t~mem107#1.offset, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1, main_#t~post112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1, main_#t~bitwise115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1, main_#t~post119#1, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem124#1, main_#t~mem123#1, main_#t~mem125#1.base, main_#t~mem125#1.offset, main_#t~mem126#1, main_#t~short127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~ret130#1.base, main_#t~ret130#1.offset, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem132#1, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem137#1, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~mem136#1, main_#t~bitwise138#1, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem142#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1, main_#t~bitwise143#1, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem153#1, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1, main_#t~bitwise154#1, main_#t~mem155#1, main_#t~pre156#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_#t~mem160#1, main_#t~post161#1, main_#t~mem165#1, main_#t~mem163#1, main_#t~mem162#1.base, main_#t~mem162#1.offset, main_#t~mem164#1, main_#t~mem166#1, main_#t~post167#1, main_#t~mem168#1.base, main_#t~mem168#1.offset, main_#t~mem169#1.base, main_#t~mem169#1.offset, main_#t~mem170#1.base, main_#t~mem170#1.offset, main_#t~post171#1, main_#t~mem172#1.base, main_#t~mem172#1.offset, main_#t~mem173#1.base, main_#t~mem173#1.offset, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1, main_#t~mem176#1.base, main_#t~mem176#1.offset, main_#t~mem177#1, main_#t~mem178#1.base, main_#t~mem178#1.offset, main_#t~mem179#1, main_#t~post180#1, main_#t~mem181#1.base, main_#t~mem181#1.offset, main_#t~mem182#1.base, main_#t~mem182#1.offset, main_#t~mem183#1.base, main_#t~mem183#1.offset, main_#t~mem186#1, main_#t~mem184#1.base, main_#t~mem184#1.offset, main_#t~mem185#1, main_#t~ite189#1, main_#t~mem187#1.base, main_#t~mem187#1.offset, main_#t~mem188#1, main_#t~mem190#1.base, main_#t~mem190#1.offset, main_#t~mem191#1, main_#t~mem192#1.base, main_#t~mem192#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem193#1, main_#t~post194#1, main_#t~mem195#1, main_#t~mem197#1, main_#t~mem196#1, main_#t~mem198#1, main_#t~mem199#1, main_#t~mem201#1, main_#t~mem200#1, main_#t~mem202#1, main_#t~mem203#1, main_#t~mem205#1, main_#t~mem204#1, main_#t~mem206#1, main_#t~mem207#1, main_#t~bitwise208#1, main_#t~bitwise209#1, main_#t~bitwise210#1, main_#t~bitwise211#1, main_#t~bitwise212#1, main_#t~bitwise213#1, main_#t~bitwise214#1, main_#t~bitwise215#1, main_#t~bitwise216#1, main_#t~switch217#1, main_#t~mem218#1, main_#t~mem219#1, main_#t~mem220#1, main_#t~mem221#1, main_#t~mem222#1, main_#t~mem223#1, main_#t~mem224#1, main_#t~mem225#1, main_#t~mem226#1, main_#t~mem227#1, main_#t~mem228#1, main_#t~bitwise229#1, main_#t~bitwise230#1, main_#t~bitwise231#1, main_#t~bitwise232#1, main_#t~bitwise233#1, main_#t~bitwise234#1, main_#t~bitwise235#1, main_#t~bitwise236#1, main_#t~bitwise237#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1, main_#t~bitwise240#1, main_#t~mem241#1.base, main_#t~mem241#1.offset, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1, main_#t~mem249#1, main_#t~mem250#1, main_#t~short251#1, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~ret253#1, main_#t~mem254#1.base, main_#t~mem254#1.offset, main_#t~mem255#1.base, main_#t~mem255#1.offset, main_#t~mem256#1.base, main_#t~mem256#1.offset, main_#t~mem257#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1.base, main_#t~mem259#1.offset, main_#t~short260#1, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~mem271#1, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1.base, main_#t~mem273#1.offset, main_#t~mem274#1.base, main_#t~mem274#1.offset, main_#t~mem275#1, main_#t~mem276#1.base, main_#t~mem276#1.offset, main_#t~mem277#1.base, main_#t~mem277#1.offset, main_#t~mem278#1.base, main_#t~mem278#1.offset, main_#t~mem279#1.base, main_#t~mem279#1.offset, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem281#1, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem285#1, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~mem284#1, main_#t~bitwise286#1, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~mem289#1, main_#t~post290#1, main_#t~mem291#1.base, main_#t~mem291#1.offset, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1.base, main_#t~mem296#1.offset, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem300#1, main_#t~post301#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem302#1, main_#t~post303#1, main_#t~mem304#1.base, main_#t~mem304#1.offset, main_#t~ite306#1.base, main_#t~ite306#1.offset, main_#t~mem305#1.base, main_#t~mem305#1.offset, main_#t~mem307#1.base, main_#t~mem307#1.offset, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~short309#1, main_#t~mem310#1.base, main_#t~mem310#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1.base, main_#t~mem312#1.offset, main_#t~mem313#1, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~mem315#1.base, main_#t~mem315#1.offset, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~mem317#1.base, main_#t~mem317#1.offset, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_#t~mem319#1.base, main_#t~mem319#1.offset, main_#t~mem320#1, main_#t~mem321#1.base, main_#t~mem321#1.offset, main_#t~mem322#1.base, main_#t~mem322#1.offset, main_#t~mem323#1.base, main_#t~mem323#1.offset, main_#t~mem324#1, main_#t~mem325#1.base, main_#t~mem325#1.offset, main_#t~mem326#1.base, main_#t~mem326#1.offset, main_#t~mem327#1.base, main_#t~mem327#1.offset, main_#t~mem328#1.base, main_#t~mem328#1.offset, main_#t~mem329#1.base, main_#t~mem329#1.offset, main_#t~mem330#1, main_#t~mem331#1.base, main_#t~mem331#1.offset, main_#t~mem334#1, main_#t~mem332#1.base, main_#t~mem332#1.offset, main_#t~mem333#1, main_#t~bitwise335#1, main_#t~mem336#1.base, main_#t~mem336#1.offset, main_#t~mem337#1.base, main_#t~mem337#1.offset, main_#t~mem338#1, main_#t~post339#1, main_#t~mem340#1.base, main_#t~mem340#1.offset, main_#t~mem341#1.base, main_#t~mem341#1.offset, main_#t~mem342#1.base, main_#t~mem342#1.offset, main_#t~mem343#1.base, main_#t~mem343#1.offset, main_#t~mem344#1.base, main_#t~mem344#1.offset, main_#t~mem345#1.base, main_#t~mem345#1.offset, main_#t~mem346#1.base, main_#t~mem346#1.offset, main_#t~mem347#1.base, main_#t~mem347#1.offset, main_~_hd_head~1#1.base, main_~_hd_head~1#1.offset, main_#t~mem348#1.base, main_#t~mem348#1.offset, main_#t~mem349#1, main_#t~post350#1, main_~_hd_bkt~1#1, main_~_hd_hh_del~1#1.base, main_~_hd_hh_del~1#1.offset, main_#t~ite352#1.base, main_#t~ite352#1.offset, main_#t~mem351#1.base, main_#t~mem351#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int#3(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4);" [2024-11-28 02:57:55,303 INFO L749 eck$LassoCheckResult]: Loop: "call main_#t~mem40#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume main_#t~mem40#1 < 10;havoc main_#t~mem40#1;" "assume { :begin_inline_real_malloc } true;real_malloc_#in~n#1 := 40;havoc real_malloc_#res#1.base, real_malloc_#res#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset, real_malloc_~n#1;real_malloc_~n#1 := real_malloc_#in~n#1;call real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset := #Ultimate.allocOnHeap(real_malloc_~n#1 % 4294967296);real_malloc_#res#1.base, real_malloc_#res#1.offset := real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset;" "main_#t~ret41#1.base, main_#t~ret41#1.offset := real_malloc_#res#1.base, real_malloc_#res#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset, real_malloc_~n#1;havoc real_malloc_#in~n#1;assume { :end_inline_real_malloc } true;main_~user~0#1.base, main_~user~0#1.offset := main_#t~ret41#1.base, main_#t~ret41#1.offset;havoc main_#t~ret41#1.base, main_#t~ret41#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call main_#t~mem42#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem42#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem42#1;call main_#t~mem43#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem44#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem43#1 * main_#t~mem44#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem43#1;havoc main_#t~mem44#1;" "havoc main_~_ha_hashv~0#1;" "goto;" "havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4;" "assume !(main_~_hj_k~0#1 % 4294967296 >= 12);" "main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch66#1 := 11 == main_~_hj_k~0#1;" "assume !main_#t~switch66#1;" "main_#t~switch66#1 := main_#t~switch66#1 || 10 == main_~_hj_k~0#1;" "assume !main_#t~switch66#1;" "main_#t~switch66#1 := main_#t~switch66#1 || 9 == main_~_hj_k~0#1;" "assume !main_#t~switch66#1;" "main_#t~switch66#1 := main_#t~switch66#1 || 8 == main_~_hj_k~0#1;" "assume !main_#t~switch66#1;" "main_#t~switch66#1 := main_#t~switch66#1 || 7 == main_~_hj_k~0#1;" "assume !main_#t~switch66#1;" "main_#t~switch66#1 := main_#t~switch66#1 || 6 == main_~_hj_k~0#1;" "assume !main_#t~switch66#1;" "main_#t~switch66#1 := main_#t~switch66#1 || 5 == main_~_hj_k~0#1;" "assume !main_#t~switch66#1;" "main_#t~switch66#1 := main_#t~switch66#1 || 4 == main_~_hj_k~0#1;" "assume main_#t~switch66#1;call main_#t~mem74#1 := read~int#2(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem74#1 % 256 % 4294967296);" "main_#t~switch66#1 := main_#t~switch66#1 || 3 == main_~_hj_k~0#1;" "assume main_#t~switch66#1;call main_#t~mem75#1 := read~int#2(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem75#1 % 256 % 4294967296);" "main_#t~switch66#1 := main_#t~switch66#1 || 2 == main_~_hj_k~0#1;" "assume main_#t~switch66#1;call main_#t~mem76#1 := read~int#2(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem76#1 % 256 % 4294967296);" "main_#t~switch66#1 := main_#t~switch66#1 || 1 == main_~_hj_k~0#1;" "assume main_#t~switch66#1;call main_#t~mem77#1 := read~int#2(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem77#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem77#1 % 256 % 4294967296 else main_#t~mem77#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch66#1;havoc main_#t~mem67#1;havoc main_#t~mem68#1;havoc main_#t~mem69#1;havoc main_#t~mem70#1;havoc main_#t~mem71#1;havoc main_#t~mem72#1;havoc main_#t~mem73#1;havoc main_#t~mem74#1;havoc main_#t~mem75#1;havoc main_#t~mem76#1;havoc main_#t~mem77#1;havoc main_#t~switch66#1;havoc main_#t~mem67#1;havoc main_#t~mem68#1;havoc main_#t~mem69#1;havoc main_#t~mem70#1;havoc main_#t~mem71#1;havoc main_#t~mem72#1;havoc main_#t~mem73#1;havoc main_#t~mem74#1;havoc main_#t~mem75#1;havoc main_#t~mem76#1;havoc main_#t~mem77#1;" "main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise78#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192;" "main_~_hj_i~0#1 := main_#t~bitwise78#1;havoc main_#t~bitwise78#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume !(0 == main_~_hj_j~0#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296);" "assume !(main_~_hj_j~0#1 % 4294967296 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296);" "havoc main_#t~bitwise79#1;assume main_#t~bitwise79#1 % 4294967296 <= main_~_hj_j~0#1 % 4294967296 + 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296;" "main_~_hj_j~0#1 := main_#t~bitwise79#1;havoc main_#t~bitwise79#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise80#1 := main_~_hj_j~0#1 % 4294967296 / 8192;" "main_~_ha_hashv~0#1 := main_#t~bitwise80#1;havoc main_#t~bitwise80#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume !(0 == main_~_hj_i~0#1 % 4294967296);" "assume 0 == main_~_ha_hashv~0#1 % 4294967296 / 4096 % 4294967296;main_#t~bitwise81#1 := main_~_hj_i~0#1;" "main_~_hj_i~0#1 := main_#t~bitwise81#1;havoc main_#t~bitwise81#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise82#1 := 65536 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise82#1;havoc main_#t~bitwise82#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise83#1 := main_~_hj_j~0#1 % 4294967296 / 32;" "main_~_ha_hashv~0#1 := main_#t~bitwise83#1;havoc main_#t~bitwise83#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise84#1 := main_~_ha_hashv~0#1 % 4294967296 / 8;" "main_~_hj_i~0#1 := main_#t~bitwise84#1;havoc main_#t~bitwise84#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise85#1 := 1024 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise85#1;havoc main_#t~bitwise85#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise86#1 := main_~_hj_j~0#1 % 4294967296 / 32768;" "main_~_ha_hashv~0#1 := main_#t~bitwise86#1;havoc main_#t~bitwise86#1;" "assume !false;" "havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset;" "assume !false;" "assume !false;" "call write~int#2(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#2(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4);" "assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem102#1.base, main_#t~mem102#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#2(main_#t~mem102#1.base, main_#t~mem102#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem102#1.base, main_#t~mem102#1.offset;" "call write~$Pointer$#2(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem103#1.base, main_#t~mem103#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem104#1.base, main_#t~mem104#1.offset := read~$Pointer$#2(main_#t~mem103#1.base, 16 + main_#t~mem103#1.offset, 4);call main_#t~mem105#1.base, main_#t~mem105#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem106#1 := read~int#2(main_#t~mem105#1.base, 20 + main_#t~mem105#1.offset, 4);call write~$Pointer$#2(main_#t~mem104#1.base, main_#t~mem104#1.offset - main_#t~mem106#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem103#1.base, main_#t~mem103#1.offset;havoc main_#t~mem104#1.base, main_#t~mem104#1.offset;havoc main_#t~mem105#1.base, main_#t~mem105#1.offset;havoc main_#t~mem106#1;call main_#t~mem107#1.base, main_#t~mem107#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem108#1.base, main_#t~mem108#1.offset := read~$Pointer$#2(main_#t~mem107#1.base, 16 + main_#t~mem107#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem108#1.base, 8 + main_#t~mem108#1.offset, 4);havoc main_#t~mem107#1.base, main_#t~mem107#1.offset;havoc main_#t~mem108#1.base, main_#t~mem108#1.offset;call main_#t~mem109#1.base, main_#t~mem109#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem109#1.base, 16 + main_#t~mem109#1.offset, 4);havoc main_#t~mem109#1.base, main_#t~mem109#1.offset;" "assume !false;" "havoc main_~_ha_bkt~0#1;call main_#t~mem110#1.base, main_#t~mem110#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem111#1 := read~int#2(main_#t~mem110#1.base, 12 + main_#t~mem110#1.offset, 4);main_#t~post112#1 := main_#t~mem111#1;call write~int#2(1 + main_#t~post112#1, main_#t~mem110#1.base, 12 + main_#t~mem110#1.offset, 4);havoc main_#t~mem110#1.base, main_#t~mem110#1.offset;havoc main_#t~mem111#1;havoc main_#t~post112#1;" "call main_#t~mem113#1.base, main_#t~mem113#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem114#1 := read~int#2(main_#t~mem113#1.base, 4 + main_#t~mem113#1.offset, 4);" "assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem114#1 - 1) % 4294967296;main_#t~bitwise115#1 := 0;" "main_~_ha_bkt~0#1 := main_#t~bitwise115#1;havoc main_#t~mem113#1.base, main_#t~mem113#1.offset;havoc main_#t~mem114#1;havoc main_#t~bitwise115#1;" "assume !false;" "call main_#t~mem116#1.base, main_#t~mem116#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem117#1.base, main_#t~mem117#1.offset := read~$Pointer$#2(main_#t~mem116#1.base, main_#t~mem116#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem117#1.base, main_#t~mem117#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem116#1.base, main_#t~mem116#1.offset;havoc main_#t~mem117#1.base, main_#t~mem117#1.offset;call main_#t~mem118#1 := read~int#2(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post119#1 := main_#t~mem118#1;call write~int#2(1 + main_#t~post119#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem118#1;havoc main_#t~post119#1;call main_#t~mem120#1.base, main_#t~mem120#1.offset := read~$Pointer$#2(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#2(main_#t~mem120#1.base, main_#t~mem120#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem120#1.base, main_#t~mem120#1.offset;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem121#1.base, main_#t~mem121#1.offset := read~$Pointer$#2(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);" "assume main_#t~mem121#1.base != 0 || main_#t~mem121#1.offset != 0;havoc main_#t~mem121#1.base, main_#t~mem121#1.offset;call main_#t~mem122#1.base, main_#t~mem122#1.offset := read~$Pointer$#2(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem122#1.base, 12 + main_#t~mem122#1.offset, 4);havoc main_#t~mem122#1.base, main_#t~mem122#1.offset;" "call write~$Pointer$#2(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem124#1 := read~int#2(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem123#1 := read~int#2(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short127#1 := main_#t~mem124#1 % 4294967296 >= 10 * (1 + main_#t~mem123#1) % 4294967296;" "assume main_#t~short127#1;call main_#t~mem125#1.base, main_#t~mem125#1.offset := read~$Pointer$#2(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem126#1 := read~int#2(main_#t~mem125#1.base, 36 + main_#t~mem125#1.offset, 4);main_#t~short127#1 := 0 == main_#t~mem126#1 % 4294967296;" "assume !main_#t~short127#1;havoc main_#t~mem124#1;havoc main_#t~mem123#1;havoc main_#t~mem125#1.base, main_#t~mem125#1.offset;havoc main_#t~mem126#1;havoc main_#t~short127#1;" "havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset;" "assume !false;" "havoc main_~_ha_bkt~0#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~0#1;" "assume !false;" "call main_#t~mem193#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post194#1 := main_#t~mem193#1;call write~int#3(1 + main_#t~post194#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem193#1;havoc main_#t~post194#1;" [2024-11-28 02:57:55,304 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 02:57:55,304 INFO L85 PathProgramCache]: Analyzing trace with hash 2115, now seen corresponding path program 8 times [2024-11-28 02:57:55,304 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM [2024-11-28 02:57:55,304 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [228750671] [2024-11-28 02:57:55,304 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:57:55,305 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 02:57:55,322 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-28 02:57:55,323 INFO L357 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-28 02:57:55,331 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-28 02:57:55,342 INFO L130 FreeRefinementEngine]: Strategy CAMEL_NO_AM found a feasible trace [2024-11-28 02:57:55,342 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 02:57:55,342 INFO L85 PathProgramCache]: Analyzing trace with hash 416643441, now seen corresponding path program 1 times [2024-11-28 02:57:55,343 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM [2024-11-28 02:57:55,343 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1513875435] [2024-11-28 02:57:55,343 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:57:55,343 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 02:57:55,656 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 02:57:56,709 INFO L136 FreeRefinementEngine]: Strategy CAMEL_NO_AM found an infeasible trace [2024-11-28 02:57:56,710 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1513875435] [2024-11-28 02:57:56,710 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1513875435] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-28 02:57:56,710 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1172665103] [2024-11-28 02:57:56,710 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:57:56,710 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-28 02:57:56,711 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3f86fdff-c6c4-46c5-9202-1e23723ed6cd/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 02:57:56,716 INFO L229 MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3f86fdff-c6c4-46c5-9202-1e23723ed6cd/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-28 02:57:56,718 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3f86fdff-c6c4-46c5-9202-1e23723ed6cd/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2024-11-28 02:57:58,458 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 02:57:58,462 INFO L256 TraceCheckSpWp]: Trace formula consists of 526 conjuncts, 20 conjuncts are in the unsatisfiable core [2024-11-28 02:57:58,464 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-28 02:58:01,336 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-28 02:58:04,779 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1172665103] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-28 02:58:04,779 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-28 02:58:04,779 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11, 11] total 25 [2024-11-28 02:58:04,780 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1285699817] [2024-11-28 02:58:04,780 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-28 02:58:04,780 INFO L764 eck$LassoCheckResult]: loop already infeasible [2024-11-28 02:58:04,780 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL_NO_AM [2024-11-28 02:58:04,781 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2024-11-28 02:58:04,782 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=94, Invalid=506, Unknown=0, NotChecked=0, Total=600 [2024-11-28 02:58:04,782 INFO L87 Difference]: Start difference. First operand 445 states and 599 transitions. cyclomatic complexity: 158 Second operand has 25 states, 25 states have (on average 5.12) internal successors, (128), 25 states have internal predecessors, (128), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 02:58:18,120 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 3.78s for a HTC check with result INVALID. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [] [2024-11-28 02:58:21,054 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 1.34s for a HTC check with result INVALID. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [] [2024-11-28 02:58:39,792 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 12.00s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [0] [2024-11-28 02:58:51,827 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 12.04s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [0] [2024-11-28 02:59:03,867 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 12.04s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [0] [2024-11-28 02:59:15,910 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 12.04s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [0] [2024-11-28 02:59:27,949 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 12.04s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [0] [2024-11-28 02:59:32,520 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 4.57s for a HTC check with result VALID. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [0] [2024-11-28 02:59:44,522 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 12.00s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [0] [2024-11-28 02:59:56,559 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 12.04s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [0] [2024-11-28 03:00:08,604 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 12.04s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [0] [2024-11-28 03:00:20,641 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 12.04s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [0] [2024-11-28 03:00:32,677 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 12.04s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [0] [2024-11-28 03:00:39,152 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 6.47s for a HTC check with result VALID. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [0] [2024-11-28 03:00:42,497 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 3.34s for a HTC check with result VALID. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [0] [2024-11-28 03:00:54,500 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 12.00s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [0] [2024-11-28 03:01:06,539 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 12.04s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [0] [2024-11-28 03:01:13,760 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 7.22s for a HTC check with result VALID. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [0] [2024-11-28 03:01:25,762 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 12.00s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [0] [2024-11-28 03:01:37,801 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 12.04s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [0] [2024-11-28 03:01:49,824 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 12.02s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [0] [2024-11-28 03:01:52,815 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.70s for a HTC check with result INVALID. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [0] [2024-11-28 03:01:57,115 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 03:01:57,115 INFO L93 Difference]: Finished difference Result 553 states and 742 transitions. [2024-11-28 03:01:57,116 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 553 states and 742 transitions. [2024-11-28 03:01:57,120 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 535 [2024-11-28 03:01:57,125 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 553 states to 553 states and 742 transitions. [2024-11-28 03:01:57,125 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 553 [2024-11-28 03:01:57,126 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 553 [2024-11-28 03:01:57,126 INFO L73 IsDeterministic]: Start isDeterministic. Operand 553 states and 742 transitions. [2024-11-28 03:01:57,128 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-28 03:01:57,128 INFO L218 hiAutomatonCegarLoop]: Abstraction has 553 states and 742 transitions. [2024-11-28 03:01:57,129 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 553 states and 742 transitions. [2024-11-28 03:01:57,137 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 553 to 455. [2024-11-28 03:01:57,139 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 455 states, 451 states have (on average 1.3436807095343681) internal successors, (606), 450 states have internal predecessors, (606), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-28 03:01:57,141 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 455 states to 455 states and 612 transitions. [2024-11-28 03:01:57,141 INFO L240 hiAutomatonCegarLoop]: Abstraction has 455 states and 612 transitions. [2024-11-28 03:01:57,142 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2024-11-28 03:01:57,143 INFO L425 stractBuchiCegarLoop]: Abstraction has 455 states and 612 transitions. [2024-11-28 03:01:57,143 INFO L332 stractBuchiCegarLoop]: ======== Iteration 9 ============ [2024-11-28 03:01:57,143 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 455 states and 612 transitions. [2024-11-28 03:01:57,146 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 437 [2024-11-28 03:01:57,146 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-28 03:01:57,146 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-28 03:01:57,147 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2024-11-28 03:01:57,147 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 03:01:57,147 INFO L747 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(21, 2);call #Ultimate.allocInit(40, 3);~#alt_malloc_sizes~0.base, ~#alt_malloc_sizes~0.offset := 3, 0;call write~init~int#1(0, ~#alt_malloc_sizes~0.base, ~#alt_malloc_sizes~0.offset, 4);call write~init~int#1(0, ~#alt_malloc_sizes~0.base, 4 + ~#alt_malloc_sizes~0.offset, 4);call write~init~int#1(0, ~#alt_malloc_sizes~0.base, 8 + ~#alt_malloc_sizes~0.offset, 4);call write~init~int#1(0, ~#alt_malloc_sizes~0.base, 12 + ~#alt_malloc_sizes~0.offset, 4);call write~init~int#1(0, ~#alt_malloc_sizes~0.base, 16 + ~#alt_malloc_sizes~0.offset, 4);call write~init~int#1(0, ~#alt_malloc_sizes~0.base, 20 + ~#alt_malloc_sizes~0.offset, 4);call write~init~int#1(0, ~#alt_malloc_sizes~0.base, 24 + ~#alt_malloc_sizes~0.offset, 4);call write~init~int#1(0, ~#alt_malloc_sizes~0.base, 28 + ~#alt_malloc_sizes~0.offset, 4);call write~init~int#1(0, ~#alt_malloc_sizes~0.base, 32 + ~#alt_malloc_sizes~0.offset, 4);call write~init~int#1(0, ~#alt_malloc_sizes~0.base, 36 + ~#alt_malloc_sizes~0.offset, 4);~alt_malloc_balance~0 := 0;~alt_memcmp_count~0 := 0;~alt_bzero_count~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~mem40#1, main_#t~ret41#1.base, main_#t~ret41#1.offset, main_#t~mem42#1, main_#t~mem43#1, main_#t~mem44#1, main_#t~mem46#1, main_#t~mem45#1, main_#t~mem47#1, main_#t~mem48#1, main_#t~mem50#1, main_#t~mem49#1, main_#t~mem51#1, main_#t~mem52#1, main_#t~mem54#1, main_#t~mem53#1, main_#t~mem55#1, main_#t~mem56#1, main_#t~bitwise57#1, main_#t~bitwise58#1, main_#t~bitwise59#1, main_#t~bitwise60#1, main_#t~bitwise61#1, main_#t~bitwise62#1, main_#t~bitwise63#1, main_#t~bitwise64#1, main_#t~bitwise65#1, main_#t~switch66#1, main_#t~mem67#1, main_#t~mem68#1, main_#t~mem69#1, main_#t~mem70#1, main_#t~mem71#1, main_#t~mem72#1, main_#t~mem73#1, main_#t~mem74#1, main_#t~mem75#1, main_#t~mem76#1, main_#t~mem77#1, main_#t~bitwise78#1, main_#t~bitwise79#1, main_#t~bitwise80#1, main_#t~bitwise81#1, main_#t~bitwise82#1, main_#t~bitwise83#1, main_#t~bitwise84#1, main_#t~bitwise85#1, main_#t~bitwise86#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~ret87#1.base, main_#t~ret87#1.offset, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~ret95#1.base, main_#t~ret95#1.offset, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1, main_#t~mem107#1.base, main_#t~mem107#1.offset, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1, main_#t~post112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1, main_#t~bitwise115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1, main_#t~post119#1, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem124#1, main_#t~mem123#1, main_#t~mem125#1.base, main_#t~mem125#1.offset, main_#t~mem126#1, main_#t~short127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~ret130#1.base, main_#t~ret130#1.offset, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem132#1, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem137#1, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~mem136#1, main_#t~bitwise138#1, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem142#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1, main_#t~bitwise143#1, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem153#1, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1, main_#t~bitwise154#1, main_#t~mem155#1, main_#t~pre156#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_#t~mem160#1, main_#t~post161#1, main_#t~mem165#1, main_#t~mem163#1, main_#t~mem162#1.base, main_#t~mem162#1.offset, main_#t~mem164#1, main_#t~mem166#1, main_#t~post167#1, main_#t~mem168#1.base, main_#t~mem168#1.offset, main_#t~mem169#1.base, main_#t~mem169#1.offset, main_#t~mem170#1.base, main_#t~mem170#1.offset, main_#t~post171#1, main_#t~mem172#1.base, main_#t~mem172#1.offset, main_#t~mem173#1.base, main_#t~mem173#1.offset, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1, main_#t~mem176#1.base, main_#t~mem176#1.offset, main_#t~mem177#1, main_#t~mem178#1.base, main_#t~mem178#1.offset, main_#t~mem179#1, main_#t~post180#1, main_#t~mem181#1.base, main_#t~mem181#1.offset, main_#t~mem182#1.base, main_#t~mem182#1.offset, main_#t~mem183#1.base, main_#t~mem183#1.offset, main_#t~mem186#1, main_#t~mem184#1.base, main_#t~mem184#1.offset, main_#t~mem185#1, main_#t~ite189#1, main_#t~mem187#1.base, main_#t~mem187#1.offset, main_#t~mem188#1, main_#t~mem190#1.base, main_#t~mem190#1.offset, main_#t~mem191#1, main_#t~mem192#1.base, main_#t~mem192#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem193#1, main_#t~post194#1, main_#t~mem195#1, main_#t~mem197#1, main_#t~mem196#1, main_#t~mem198#1, main_#t~mem199#1, main_#t~mem201#1, main_#t~mem200#1, main_#t~mem202#1, main_#t~mem203#1, main_#t~mem205#1, main_#t~mem204#1, main_#t~mem206#1, main_#t~mem207#1, main_#t~bitwise208#1, main_#t~bitwise209#1, main_#t~bitwise210#1, main_#t~bitwise211#1, main_#t~bitwise212#1, main_#t~bitwise213#1, main_#t~bitwise214#1, main_#t~bitwise215#1, main_#t~bitwise216#1, main_#t~switch217#1, main_#t~mem218#1, main_#t~mem219#1, main_#t~mem220#1, main_#t~mem221#1, main_#t~mem222#1, main_#t~mem223#1, main_#t~mem224#1, main_#t~mem225#1, main_#t~mem226#1, main_#t~mem227#1, main_#t~mem228#1, main_#t~bitwise229#1, main_#t~bitwise230#1, main_#t~bitwise231#1, main_#t~bitwise232#1, main_#t~bitwise233#1, main_#t~bitwise234#1, main_#t~bitwise235#1, main_#t~bitwise236#1, main_#t~bitwise237#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1, main_#t~bitwise240#1, main_#t~mem241#1.base, main_#t~mem241#1.offset, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1, main_#t~mem249#1, main_#t~mem250#1, main_#t~short251#1, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~ret253#1, main_#t~mem254#1.base, main_#t~mem254#1.offset, main_#t~mem255#1.base, main_#t~mem255#1.offset, main_#t~mem256#1.base, main_#t~mem256#1.offset, main_#t~mem257#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1.base, main_#t~mem259#1.offset, main_#t~short260#1, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~mem271#1, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1.base, main_#t~mem273#1.offset, main_#t~mem274#1.base, main_#t~mem274#1.offset, main_#t~mem275#1, main_#t~mem276#1.base, main_#t~mem276#1.offset, main_#t~mem277#1.base, main_#t~mem277#1.offset, main_#t~mem278#1.base, main_#t~mem278#1.offset, main_#t~mem279#1.base, main_#t~mem279#1.offset, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem281#1, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem285#1, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~mem284#1, main_#t~bitwise286#1, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~mem289#1, main_#t~post290#1, main_#t~mem291#1.base, main_#t~mem291#1.offset, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1.base, main_#t~mem296#1.offset, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem300#1, main_#t~post301#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem302#1, main_#t~post303#1, main_#t~mem304#1.base, main_#t~mem304#1.offset, main_#t~ite306#1.base, main_#t~ite306#1.offset, main_#t~mem305#1.base, main_#t~mem305#1.offset, main_#t~mem307#1.base, main_#t~mem307#1.offset, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~short309#1, main_#t~mem310#1.base, main_#t~mem310#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1.base, main_#t~mem312#1.offset, main_#t~mem313#1, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~mem315#1.base, main_#t~mem315#1.offset, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~mem317#1.base, main_#t~mem317#1.offset, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_#t~mem319#1.base, main_#t~mem319#1.offset, main_#t~mem320#1, main_#t~mem321#1.base, main_#t~mem321#1.offset, main_#t~mem322#1.base, main_#t~mem322#1.offset, main_#t~mem323#1.base, main_#t~mem323#1.offset, main_#t~mem324#1, main_#t~mem325#1.base, main_#t~mem325#1.offset, main_#t~mem326#1.base, main_#t~mem326#1.offset, main_#t~mem327#1.base, main_#t~mem327#1.offset, main_#t~mem328#1.base, main_#t~mem328#1.offset, main_#t~mem329#1.base, main_#t~mem329#1.offset, main_#t~mem330#1, main_#t~mem331#1.base, main_#t~mem331#1.offset, main_#t~mem334#1, main_#t~mem332#1.base, main_#t~mem332#1.offset, main_#t~mem333#1, main_#t~bitwise335#1, main_#t~mem336#1.base, main_#t~mem336#1.offset, main_#t~mem337#1.base, main_#t~mem337#1.offset, main_#t~mem338#1, main_#t~post339#1, main_#t~mem340#1.base, main_#t~mem340#1.offset, main_#t~mem341#1.base, main_#t~mem341#1.offset, main_#t~mem342#1.base, main_#t~mem342#1.offset, main_#t~mem343#1.base, main_#t~mem343#1.offset, main_#t~mem344#1.base, main_#t~mem344#1.offset, main_#t~mem345#1.base, main_#t~mem345#1.offset, main_#t~mem346#1.base, main_#t~mem346#1.offset, main_#t~mem347#1.base, main_#t~mem347#1.offset, main_~_hd_head~1#1.base, main_~_hd_head~1#1.offset, main_#t~mem348#1.base, main_#t~mem348#1.offset, main_#t~mem349#1, main_#t~post350#1, main_~_hd_bkt~1#1, main_~_hd_hh_del~1#1.base, main_~_hd_hh_del~1#1.offset, main_#t~ite352#1.base, main_#t~ite352#1.offset, main_#t~mem351#1.base, main_#t~mem351#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int#3(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4);" [2024-11-28 03:01:57,147 INFO L749 eck$LassoCheckResult]: Loop: "call main_#t~mem40#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume main_#t~mem40#1 < 10;havoc main_#t~mem40#1;" "assume { :begin_inline_real_malloc } true;real_malloc_#in~n#1 := 40;havoc real_malloc_#res#1.base, real_malloc_#res#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset, real_malloc_~n#1;real_malloc_~n#1 := real_malloc_#in~n#1;call real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset := #Ultimate.allocOnHeap(real_malloc_~n#1 % 4294967296);real_malloc_#res#1.base, real_malloc_#res#1.offset := real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset;" "main_#t~ret41#1.base, main_#t~ret41#1.offset := real_malloc_#res#1.base, real_malloc_#res#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset, real_malloc_~n#1;havoc real_malloc_#in~n#1;assume { :end_inline_real_malloc } true;main_~user~0#1.base, main_~user~0#1.offset := main_#t~ret41#1.base, main_#t~ret41#1.offset;havoc main_#t~ret41#1.base, main_#t~ret41#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call main_#t~mem42#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem42#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem42#1;call main_#t~mem43#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem44#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem43#1 * main_#t~mem44#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem43#1;havoc main_#t~mem44#1;" "havoc main_~_ha_hashv~0#1;" "goto;" "havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4;" "assume !(main_~_hj_k~0#1 % 4294967296 >= 12);" "main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch66#1 := 11 == main_~_hj_k~0#1;" "assume !main_#t~switch66#1;" "main_#t~switch66#1 := main_#t~switch66#1 || 10 == main_~_hj_k~0#1;" "assume !main_#t~switch66#1;" "main_#t~switch66#1 := main_#t~switch66#1 || 9 == main_~_hj_k~0#1;" "assume !main_#t~switch66#1;" "main_#t~switch66#1 := main_#t~switch66#1 || 8 == main_~_hj_k~0#1;" "assume !main_#t~switch66#1;" "main_#t~switch66#1 := main_#t~switch66#1 || 7 == main_~_hj_k~0#1;" "assume !main_#t~switch66#1;" "main_#t~switch66#1 := main_#t~switch66#1 || 6 == main_~_hj_k~0#1;" "assume !main_#t~switch66#1;" "main_#t~switch66#1 := main_#t~switch66#1 || 5 == main_~_hj_k~0#1;" "assume !main_#t~switch66#1;" "main_#t~switch66#1 := main_#t~switch66#1 || 4 == main_~_hj_k~0#1;" "assume main_#t~switch66#1;call main_#t~mem74#1 := read~int#2(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem74#1 % 256 % 4294967296);" "main_#t~switch66#1 := main_#t~switch66#1 || 3 == main_~_hj_k~0#1;" "assume main_#t~switch66#1;call main_#t~mem75#1 := read~int#2(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem75#1 % 256 % 4294967296);" "main_#t~switch66#1 := main_#t~switch66#1 || 2 == main_~_hj_k~0#1;" "assume main_#t~switch66#1;call main_#t~mem76#1 := read~int#2(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem76#1 % 256 % 4294967296);" "main_#t~switch66#1 := main_#t~switch66#1 || 1 == main_~_hj_k~0#1;" "assume main_#t~switch66#1;call main_#t~mem77#1 := read~int#2(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem77#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem77#1 % 256 % 4294967296 else main_#t~mem77#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch66#1;havoc main_#t~mem67#1;havoc main_#t~mem68#1;havoc main_#t~mem69#1;havoc main_#t~mem70#1;havoc main_#t~mem71#1;havoc main_#t~mem72#1;havoc main_#t~mem73#1;havoc main_#t~mem74#1;havoc main_#t~mem75#1;havoc main_#t~mem76#1;havoc main_#t~mem77#1;havoc main_#t~switch66#1;havoc main_#t~mem67#1;havoc main_#t~mem68#1;havoc main_#t~mem69#1;havoc main_#t~mem70#1;havoc main_#t~mem71#1;havoc main_#t~mem72#1;havoc main_#t~mem73#1;havoc main_#t~mem74#1;havoc main_#t~mem75#1;havoc main_#t~mem76#1;havoc main_#t~mem77#1;" "main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume !(0 == main_~_hj_i~0#1 % 4294967296);" "assume !(0 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296);" "assume main_~_hj_i~0#1 % 4294967296 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise78#1 := 0;" "main_~_hj_i~0#1 := main_#t~bitwise78#1;havoc main_#t~bitwise78#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume !(0 == main_~_hj_j~0#1 % 4294967296);" "assume 0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296;main_#t~bitwise79#1 := main_~_hj_j~0#1;" "main_~_hj_j~0#1 := main_#t~bitwise79#1;havoc main_#t~bitwise79#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume !(0 == main_~_ha_hashv~0#1 % 4294967296);" "assume 0 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise80#1 := main_~_ha_hashv~0#1;" "main_~_ha_hashv~0#1 := main_#t~bitwise80#1;havoc main_#t~bitwise80#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise81#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096;" "main_~_hj_i~0#1 := main_#t~bitwise81#1;havoc main_#t~bitwise81#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise82#1 := 65536 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise82#1;havoc main_#t~bitwise82#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise83#1 := main_~_hj_j~0#1 % 4294967296 / 32;" "main_~_ha_hashv~0#1 := main_#t~bitwise83#1;havoc main_#t~bitwise83#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise84#1 := main_~_ha_hashv~0#1 % 4294967296 / 8;" "main_~_hj_i~0#1 := main_#t~bitwise84#1;havoc main_#t~bitwise84#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise85#1 := 1024 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise85#1;havoc main_#t~bitwise85#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise86#1 := main_~_hj_j~0#1 % 4294967296 / 32768;" "main_~_ha_hashv~0#1 := main_#t~bitwise86#1;havoc main_#t~bitwise86#1;" "assume !false;" "havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset;" "assume !false;" "assume !false;" "call write~int#2(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#2(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4);" "assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem102#1.base, main_#t~mem102#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#2(main_#t~mem102#1.base, main_#t~mem102#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem102#1.base, main_#t~mem102#1.offset;" "call write~$Pointer$#2(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem103#1.base, main_#t~mem103#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem104#1.base, main_#t~mem104#1.offset := read~$Pointer$#2(main_#t~mem103#1.base, 16 + main_#t~mem103#1.offset, 4);call main_#t~mem105#1.base, main_#t~mem105#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem106#1 := read~int#2(main_#t~mem105#1.base, 20 + main_#t~mem105#1.offset, 4);call write~$Pointer$#2(main_#t~mem104#1.base, main_#t~mem104#1.offset - main_#t~mem106#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem103#1.base, main_#t~mem103#1.offset;havoc main_#t~mem104#1.base, main_#t~mem104#1.offset;havoc main_#t~mem105#1.base, main_#t~mem105#1.offset;havoc main_#t~mem106#1;call main_#t~mem107#1.base, main_#t~mem107#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem108#1.base, main_#t~mem108#1.offset := read~$Pointer$#2(main_#t~mem107#1.base, 16 + main_#t~mem107#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem108#1.base, 8 + main_#t~mem108#1.offset, 4);havoc main_#t~mem107#1.base, main_#t~mem107#1.offset;havoc main_#t~mem108#1.base, main_#t~mem108#1.offset;call main_#t~mem109#1.base, main_#t~mem109#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem109#1.base, 16 + main_#t~mem109#1.offset, 4);havoc main_#t~mem109#1.base, main_#t~mem109#1.offset;" "assume !false;" "havoc main_~_ha_bkt~0#1;call main_#t~mem110#1.base, main_#t~mem110#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem111#1 := read~int#2(main_#t~mem110#1.base, 12 + main_#t~mem110#1.offset, 4);main_#t~post112#1 := main_#t~mem111#1;call write~int#2(1 + main_#t~post112#1, main_#t~mem110#1.base, 12 + main_#t~mem110#1.offset, 4);havoc main_#t~mem110#1.base, main_#t~mem110#1.offset;havoc main_#t~mem111#1;havoc main_#t~post112#1;" "call main_#t~mem113#1.base, main_#t~mem113#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem114#1 := read~int#2(main_#t~mem113#1.base, 4 + main_#t~mem113#1.offset, 4);" "assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem114#1 - 1) % 4294967296;main_#t~bitwise115#1 := 0;" "main_~_ha_bkt~0#1 := main_#t~bitwise115#1;havoc main_#t~mem113#1.base, main_#t~mem113#1.offset;havoc main_#t~mem114#1;havoc main_#t~bitwise115#1;" "assume !false;" "call main_#t~mem116#1.base, main_#t~mem116#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem117#1.base, main_#t~mem117#1.offset := read~$Pointer$#2(main_#t~mem116#1.base, main_#t~mem116#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem117#1.base, main_#t~mem117#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem116#1.base, main_#t~mem116#1.offset;havoc main_#t~mem117#1.base, main_#t~mem117#1.offset;call main_#t~mem118#1 := read~int#2(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post119#1 := main_#t~mem118#1;call write~int#2(1 + main_#t~post119#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem118#1;havoc main_#t~post119#1;call main_#t~mem120#1.base, main_#t~mem120#1.offset := read~$Pointer$#2(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#2(main_#t~mem120#1.base, main_#t~mem120#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem120#1.base, main_#t~mem120#1.offset;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem121#1.base, main_#t~mem121#1.offset := read~$Pointer$#2(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);" "assume main_#t~mem121#1.base != 0 || main_#t~mem121#1.offset != 0;havoc main_#t~mem121#1.base, main_#t~mem121#1.offset;call main_#t~mem122#1.base, main_#t~mem122#1.offset := read~$Pointer$#2(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem122#1.base, 12 + main_#t~mem122#1.offset, 4);havoc main_#t~mem122#1.base, main_#t~mem122#1.offset;" "call write~$Pointer$#2(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem124#1 := read~int#2(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem123#1 := read~int#2(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short127#1 := main_#t~mem124#1 % 4294967296 >= 10 * (1 + main_#t~mem123#1) % 4294967296;" "assume main_#t~short127#1;call main_#t~mem125#1.base, main_#t~mem125#1.offset := read~$Pointer$#2(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem126#1 := read~int#2(main_#t~mem125#1.base, 36 + main_#t~mem125#1.offset, 4);main_#t~short127#1 := 0 == main_#t~mem126#1 % 4294967296;" "assume !main_#t~short127#1;havoc main_#t~mem124#1;havoc main_#t~mem123#1;havoc main_#t~mem125#1.base, main_#t~mem125#1.offset;havoc main_#t~mem126#1;havoc main_#t~short127#1;" "havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset;" "assume !false;" "havoc main_~_ha_bkt~0#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~0#1;" "assume !false;" "call main_#t~mem193#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post194#1 := main_#t~mem193#1;call write~int#3(1 + main_#t~post194#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem193#1;havoc main_#t~post194#1;" [2024-11-28 03:01:57,147 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 03:01:57,148 INFO L85 PathProgramCache]: Analyzing trace with hash 2115, now seen corresponding path program 9 times [2024-11-28 03:01:57,148 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM [2024-11-28 03:01:57,148 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [236669100] [2024-11-28 03:01:57,148 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 03:01:57,148 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 03:01:57,163 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-28 03:01:57,164 INFO L357 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-28 03:01:57,175 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-28 03:01:57,185 INFO L130 FreeRefinementEngine]: Strategy CAMEL_NO_AM found a feasible trace [2024-11-28 03:01:57,186 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 03:01:57,186 INFO L85 PathProgramCache]: Analyzing trace with hash -1361977323, now seen corresponding path program 1 times [2024-11-28 03:01:57,187 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM [2024-11-28 03:01:57,187 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1589168142] [2024-11-28 03:01:57,187 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 03:01:57,187 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 03:01:57,332 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 03:01:57,823 INFO L136 FreeRefinementEngine]: Strategy CAMEL_NO_AM found an infeasible trace [2024-11-28 03:01:57,824 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1589168142] [2024-11-28 03:01:57,824 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1589168142] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-28 03:01:57,824 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1405163050] [2024-11-28 03:01:57,824 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 03:01:57,824 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-28 03:01:57,824 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3f86fdff-c6c4-46c5-9202-1e23723ed6cd/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 03:01:57,830 INFO L229 MonitoredProcess]: Starting monitored process 10 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3f86fdff-c6c4-46c5-9202-1e23723ed6cd/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-28 03:01:57,832 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3f86fdff-c6c4-46c5-9202-1e23723ed6cd/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process [2024-11-28 03:01:58,336 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 03:01:58,344 INFO L256 TraceCheckSpWp]: Trace formula consists of 529 conjuncts, 17 conjuncts are in the unsatisfiable core [2024-11-28 03:01:58,346 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-28 03:01:58,540 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-28 03:01:59,050 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1405163050] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-28 03:01:59,051 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-28 03:01:59,051 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 9] total 17 [2024-11-28 03:01:59,051 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1577827847] [2024-11-28 03:01:59,053 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-28 03:01:59,054 INFO L764 eck$LassoCheckResult]: loop already infeasible [2024-11-28 03:01:59,054 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL_NO_AM [2024-11-28 03:01:59,054 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2024-11-28 03:01:59,054 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=54, Invalid=218, Unknown=0, NotChecked=0, Total=272 [2024-11-28 03:01:59,055 INFO L87 Difference]: Start difference. First operand 455 states and 612 transitions. cyclomatic complexity: 161 Second operand has 17 states, 17 states have (on average 7.117647058823529) internal successors, (121), 17 states have internal predecessors, (121), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 03:02:03,370 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 03:02:03,371 INFO L93 Difference]: Finished difference Result 575 states and 772 transitions. [2024-11-28 03:02:03,371 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 575 states and 772 transitions. [2024-11-28 03:02:03,374 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 557 [2024-11-28 03:02:03,378 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 575 states to 575 states and 772 transitions. [2024-11-28 03:02:03,378 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 575 [2024-11-28 03:02:03,379 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 575 [2024-11-28 03:02:03,380 INFO L73 IsDeterministic]: Start isDeterministic. Operand 575 states and 772 transitions. [2024-11-28 03:02:03,381 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-28 03:02:03,381 INFO L218 hiAutomatonCegarLoop]: Abstraction has 575 states and 772 transitions. [2024-11-28 03:02:03,383 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 575 states and 772 transitions. [2024-11-28 03:02:03,391 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 575 to 464. [2024-11-28 03:02:03,392 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 464 states, 460 states have (on average 1.3434782608695652) internal successors, (618), 459 states have internal predecessors, (618), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-28 03:02:03,395 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 464 states to 464 states and 624 transitions. [2024-11-28 03:02:03,395 INFO L240 hiAutomatonCegarLoop]: Abstraction has 464 states and 624 transitions. [2024-11-28 03:02:03,397 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2024-11-28 03:02:03,399 INFO L425 stractBuchiCegarLoop]: Abstraction has 464 states and 624 transitions. [2024-11-28 03:02:03,399 INFO L332 stractBuchiCegarLoop]: ======== Iteration 10 ============ [2024-11-28 03:02:03,400 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 464 states and 624 transitions. [2024-11-28 03:02:03,403 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 446 [2024-11-28 03:02:03,403 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-28 03:02:03,403 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-28 03:02:03,405 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2024-11-28 03:02:03,405 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 03:02:03,406 INFO L747 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(21, 2);call #Ultimate.allocInit(40, 3);~#alt_malloc_sizes~0.base, ~#alt_malloc_sizes~0.offset := 3, 0;call write~init~int#1(0, ~#alt_malloc_sizes~0.base, ~#alt_malloc_sizes~0.offset, 4);call write~init~int#1(0, ~#alt_malloc_sizes~0.base, 4 + ~#alt_malloc_sizes~0.offset, 4);call write~init~int#1(0, ~#alt_malloc_sizes~0.base, 8 + ~#alt_malloc_sizes~0.offset, 4);call write~init~int#1(0, ~#alt_malloc_sizes~0.base, 12 + ~#alt_malloc_sizes~0.offset, 4);call write~init~int#1(0, ~#alt_malloc_sizes~0.base, 16 + ~#alt_malloc_sizes~0.offset, 4);call write~init~int#1(0, ~#alt_malloc_sizes~0.base, 20 + ~#alt_malloc_sizes~0.offset, 4);call write~init~int#1(0, ~#alt_malloc_sizes~0.base, 24 + ~#alt_malloc_sizes~0.offset, 4);call write~init~int#1(0, ~#alt_malloc_sizes~0.base, 28 + ~#alt_malloc_sizes~0.offset, 4);call write~init~int#1(0, ~#alt_malloc_sizes~0.base, 32 + ~#alt_malloc_sizes~0.offset, 4);call write~init~int#1(0, ~#alt_malloc_sizes~0.base, 36 + ~#alt_malloc_sizes~0.offset, 4);~alt_malloc_balance~0 := 0;~alt_memcmp_count~0 := 0;~alt_bzero_count~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~mem40#1, main_#t~ret41#1.base, main_#t~ret41#1.offset, main_#t~mem42#1, main_#t~mem43#1, main_#t~mem44#1, main_#t~mem46#1, main_#t~mem45#1, main_#t~mem47#1, main_#t~mem48#1, main_#t~mem50#1, main_#t~mem49#1, main_#t~mem51#1, main_#t~mem52#1, main_#t~mem54#1, main_#t~mem53#1, main_#t~mem55#1, main_#t~mem56#1, main_#t~bitwise57#1, main_#t~bitwise58#1, main_#t~bitwise59#1, main_#t~bitwise60#1, main_#t~bitwise61#1, main_#t~bitwise62#1, main_#t~bitwise63#1, main_#t~bitwise64#1, main_#t~bitwise65#1, main_#t~switch66#1, main_#t~mem67#1, main_#t~mem68#1, main_#t~mem69#1, main_#t~mem70#1, main_#t~mem71#1, main_#t~mem72#1, main_#t~mem73#1, main_#t~mem74#1, main_#t~mem75#1, main_#t~mem76#1, main_#t~mem77#1, main_#t~bitwise78#1, main_#t~bitwise79#1, main_#t~bitwise80#1, main_#t~bitwise81#1, main_#t~bitwise82#1, main_#t~bitwise83#1, main_#t~bitwise84#1, main_#t~bitwise85#1, main_#t~bitwise86#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~ret87#1.base, main_#t~ret87#1.offset, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~ret95#1.base, main_#t~ret95#1.offset, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1, main_#t~mem107#1.base, main_#t~mem107#1.offset, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1, main_#t~post112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1, main_#t~bitwise115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1, main_#t~post119#1, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem124#1, main_#t~mem123#1, main_#t~mem125#1.base, main_#t~mem125#1.offset, main_#t~mem126#1, main_#t~short127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~ret130#1.base, main_#t~ret130#1.offset, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem132#1, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem137#1, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~mem136#1, main_#t~bitwise138#1, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem142#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1, main_#t~bitwise143#1, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem153#1, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1, main_#t~bitwise154#1, main_#t~mem155#1, main_#t~pre156#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_#t~mem160#1, main_#t~post161#1, main_#t~mem165#1, main_#t~mem163#1, main_#t~mem162#1.base, main_#t~mem162#1.offset, main_#t~mem164#1, main_#t~mem166#1, main_#t~post167#1, main_#t~mem168#1.base, main_#t~mem168#1.offset, main_#t~mem169#1.base, main_#t~mem169#1.offset, main_#t~mem170#1.base, main_#t~mem170#1.offset, main_#t~post171#1, main_#t~mem172#1.base, main_#t~mem172#1.offset, main_#t~mem173#1.base, main_#t~mem173#1.offset, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1, main_#t~mem176#1.base, main_#t~mem176#1.offset, main_#t~mem177#1, main_#t~mem178#1.base, main_#t~mem178#1.offset, main_#t~mem179#1, main_#t~post180#1, main_#t~mem181#1.base, main_#t~mem181#1.offset, main_#t~mem182#1.base, main_#t~mem182#1.offset, main_#t~mem183#1.base, main_#t~mem183#1.offset, main_#t~mem186#1, main_#t~mem184#1.base, main_#t~mem184#1.offset, main_#t~mem185#1, main_#t~ite189#1, main_#t~mem187#1.base, main_#t~mem187#1.offset, main_#t~mem188#1, main_#t~mem190#1.base, main_#t~mem190#1.offset, main_#t~mem191#1, main_#t~mem192#1.base, main_#t~mem192#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem193#1, main_#t~post194#1, main_#t~mem195#1, main_#t~mem197#1, main_#t~mem196#1, main_#t~mem198#1, main_#t~mem199#1, main_#t~mem201#1, main_#t~mem200#1, main_#t~mem202#1, main_#t~mem203#1, main_#t~mem205#1, main_#t~mem204#1, main_#t~mem206#1, main_#t~mem207#1, main_#t~bitwise208#1, main_#t~bitwise209#1, main_#t~bitwise210#1, main_#t~bitwise211#1, main_#t~bitwise212#1, main_#t~bitwise213#1, main_#t~bitwise214#1, main_#t~bitwise215#1, main_#t~bitwise216#1, main_#t~switch217#1, main_#t~mem218#1, main_#t~mem219#1, main_#t~mem220#1, main_#t~mem221#1, main_#t~mem222#1, main_#t~mem223#1, main_#t~mem224#1, main_#t~mem225#1, main_#t~mem226#1, main_#t~mem227#1, main_#t~mem228#1, main_#t~bitwise229#1, main_#t~bitwise230#1, main_#t~bitwise231#1, main_#t~bitwise232#1, main_#t~bitwise233#1, main_#t~bitwise234#1, main_#t~bitwise235#1, main_#t~bitwise236#1, main_#t~bitwise237#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1, main_#t~bitwise240#1, main_#t~mem241#1.base, main_#t~mem241#1.offset, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1, main_#t~mem249#1, main_#t~mem250#1, main_#t~short251#1, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~ret253#1, main_#t~mem254#1.base, main_#t~mem254#1.offset, main_#t~mem255#1.base, main_#t~mem255#1.offset, main_#t~mem256#1.base, main_#t~mem256#1.offset, main_#t~mem257#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1.base, main_#t~mem259#1.offset, main_#t~short260#1, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~mem271#1, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1.base, main_#t~mem273#1.offset, main_#t~mem274#1.base, main_#t~mem274#1.offset, main_#t~mem275#1, main_#t~mem276#1.base, main_#t~mem276#1.offset, main_#t~mem277#1.base, main_#t~mem277#1.offset, main_#t~mem278#1.base, main_#t~mem278#1.offset, main_#t~mem279#1.base, main_#t~mem279#1.offset, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem281#1, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem285#1, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~mem284#1, main_#t~bitwise286#1, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~mem289#1, main_#t~post290#1, main_#t~mem291#1.base, main_#t~mem291#1.offset, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1.base, main_#t~mem296#1.offset, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem300#1, main_#t~post301#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem302#1, main_#t~post303#1, main_#t~mem304#1.base, main_#t~mem304#1.offset, main_#t~ite306#1.base, main_#t~ite306#1.offset, main_#t~mem305#1.base, main_#t~mem305#1.offset, main_#t~mem307#1.base, main_#t~mem307#1.offset, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~short309#1, main_#t~mem310#1.base, main_#t~mem310#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1.base, main_#t~mem312#1.offset, main_#t~mem313#1, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~mem315#1.base, main_#t~mem315#1.offset, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~mem317#1.base, main_#t~mem317#1.offset, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_#t~mem319#1.base, main_#t~mem319#1.offset, main_#t~mem320#1, main_#t~mem321#1.base, main_#t~mem321#1.offset, main_#t~mem322#1.base, main_#t~mem322#1.offset, main_#t~mem323#1.base, main_#t~mem323#1.offset, main_#t~mem324#1, main_#t~mem325#1.base, main_#t~mem325#1.offset, main_#t~mem326#1.base, main_#t~mem326#1.offset, main_#t~mem327#1.base, main_#t~mem327#1.offset, main_#t~mem328#1.base, main_#t~mem328#1.offset, main_#t~mem329#1.base, main_#t~mem329#1.offset, main_#t~mem330#1, main_#t~mem331#1.base, main_#t~mem331#1.offset, main_#t~mem334#1, main_#t~mem332#1.base, main_#t~mem332#1.offset, main_#t~mem333#1, main_#t~bitwise335#1, main_#t~mem336#1.base, main_#t~mem336#1.offset, main_#t~mem337#1.base, main_#t~mem337#1.offset, main_#t~mem338#1, main_#t~post339#1, main_#t~mem340#1.base, main_#t~mem340#1.offset, main_#t~mem341#1.base, main_#t~mem341#1.offset, main_#t~mem342#1.base, main_#t~mem342#1.offset, main_#t~mem343#1.base, main_#t~mem343#1.offset, main_#t~mem344#1.base, main_#t~mem344#1.offset, main_#t~mem345#1.base, main_#t~mem345#1.offset, main_#t~mem346#1.base, main_#t~mem346#1.offset, main_#t~mem347#1.base, main_#t~mem347#1.offset, main_~_hd_head~1#1.base, main_~_hd_head~1#1.offset, main_#t~mem348#1.base, main_#t~mem348#1.offset, main_#t~mem349#1, main_#t~post350#1, main_~_hd_bkt~1#1, main_~_hd_hh_del~1#1.base, main_~_hd_hh_del~1#1.offset, main_#t~ite352#1.base, main_#t~ite352#1.offset, main_#t~mem351#1.base, main_#t~mem351#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int#3(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4);" [2024-11-28 03:02:03,406 INFO L749 eck$LassoCheckResult]: Loop: "call main_#t~mem40#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume main_#t~mem40#1 < 10;havoc main_#t~mem40#1;" "assume { :begin_inline_real_malloc } true;real_malloc_#in~n#1 := 40;havoc real_malloc_#res#1.base, real_malloc_#res#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset, real_malloc_~n#1;real_malloc_~n#1 := real_malloc_#in~n#1;call real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset := #Ultimate.allocOnHeap(real_malloc_~n#1 % 4294967296);real_malloc_#res#1.base, real_malloc_#res#1.offset := real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset;" "main_#t~ret41#1.base, main_#t~ret41#1.offset := real_malloc_#res#1.base, real_malloc_#res#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset, real_malloc_~n#1;havoc real_malloc_#in~n#1;assume { :end_inline_real_malloc } true;main_~user~0#1.base, main_~user~0#1.offset := main_#t~ret41#1.base, main_#t~ret41#1.offset;havoc main_#t~ret41#1.base, main_#t~ret41#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call main_#t~mem42#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem42#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem42#1;call main_#t~mem43#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem44#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem43#1 * main_#t~mem44#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem43#1;havoc main_#t~mem44#1;" "havoc main_~_ha_hashv~0#1;" "goto;" "havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4;" "assume !(main_~_hj_k~0#1 % 4294967296 >= 12);" "main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch66#1 := 11 == main_~_hj_k~0#1;" "assume !main_#t~switch66#1;" "main_#t~switch66#1 := main_#t~switch66#1 || 10 == main_~_hj_k~0#1;" "assume !main_#t~switch66#1;" "main_#t~switch66#1 := main_#t~switch66#1 || 9 == main_~_hj_k~0#1;" "assume !main_#t~switch66#1;" "main_#t~switch66#1 := main_#t~switch66#1 || 8 == main_~_hj_k~0#1;" "assume !main_#t~switch66#1;" "main_#t~switch66#1 := main_#t~switch66#1 || 7 == main_~_hj_k~0#1;" "assume !main_#t~switch66#1;" "main_#t~switch66#1 := main_#t~switch66#1 || 6 == main_~_hj_k~0#1;" "assume !main_#t~switch66#1;" "main_#t~switch66#1 := main_#t~switch66#1 || 5 == main_~_hj_k~0#1;" "assume !main_#t~switch66#1;" "main_#t~switch66#1 := main_#t~switch66#1 || 4 == main_~_hj_k~0#1;" "assume main_#t~switch66#1;call main_#t~mem74#1 := read~int#2(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem74#1 % 256 % 4294967296);" "main_#t~switch66#1 := main_#t~switch66#1 || 3 == main_~_hj_k~0#1;" "assume main_#t~switch66#1;call main_#t~mem75#1 := read~int#2(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem75#1 % 256 % 4294967296);" "main_#t~switch66#1 := main_#t~switch66#1 || 2 == main_~_hj_k~0#1;" "assume main_#t~switch66#1;call main_#t~mem76#1 := read~int#2(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem76#1 % 256 % 4294967296);" "main_#t~switch66#1 := main_#t~switch66#1 || 1 == main_~_hj_k~0#1;" "assume main_#t~switch66#1;call main_#t~mem77#1 := read~int#2(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem77#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem77#1 % 256 % 4294967296 else main_#t~mem77#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch66#1;havoc main_#t~mem67#1;havoc main_#t~mem68#1;havoc main_#t~mem69#1;havoc main_#t~mem70#1;havoc main_#t~mem71#1;havoc main_#t~mem72#1;havoc main_#t~mem73#1;havoc main_#t~mem74#1;havoc main_#t~mem75#1;havoc main_#t~mem76#1;havoc main_#t~mem77#1;havoc main_#t~switch66#1;havoc main_#t~mem67#1;havoc main_#t~mem68#1;havoc main_#t~mem69#1;havoc main_#t~mem70#1;havoc main_#t~mem71#1;havoc main_#t~mem72#1;havoc main_#t~mem73#1;havoc main_#t~mem74#1;havoc main_#t~mem75#1;havoc main_#t~mem76#1;havoc main_#t~mem77#1;" "main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise78#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192;" "main_~_hj_i~0#1 := main_#t~bitwise78#1;havoc main_#t~bitwise78#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume !(0 == main_~_hj_j~0#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296);" "assume !(main_~_hj_j~0#1 % 4294967296 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296);" "havoc main_#t~bitwise79#1;assume main_#t~bitwise79#1 % 4294967296 <= main_~_hj_j~0#1 % 4294967296 + 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296;" "main_~_hj_j~0#1 := main_#t~bitwise79#1;havoc main_#t~bitwise79#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise80#1 := main_~_hj_j~0#1 % 4294967296 / 8192;" "main_~_ha_hashv~0#1 := main_#t~bitwise80#1;havoc main_#t~bitwise80#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume !(0 == main_~_hj_i~0#1 % 4294967296);" "assume 0 == main_~_ha_hashv~0#1 % 4294967296 / 4096 % 4294967296;main_#t~bitwise81#1 := main_~_hj_i~0#1;" "main_~_hj_i~0#1 := main_#t~bitwise81#1;havoc main_#t~bitwise81#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume !(0 == main_~_hj_j~0#1 % 4294967296);" "assume 0 == 65536 * (main_~_hj_i~0#1 % 4294967296) % 4294967296;main_#t~bitwise82#1 := main_~_hj_j~0#1;" "main_~_hj_j~0#1 := main_#t~bitwise82#1;havoc main_#t~bitwise82#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise83#1 := main_~_hj_j~0#1 % 4294967296 / 32;" "main_~_ha_hashv~0#1 := main_#t~bitwise83#1;havoc main_#t~bitwise83#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise84#1 := main_~_ha_hashv~0#1 % 4294967296 / 8;" "main_~_hj_i~0#1 := main_#t~bitwise84#1;havoc main_#t~bitwise84#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise85#1 := 1024 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise85#1;havoc main_#t~bitwise85#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise86#1 := main_~_hj_j~0#1 % 4294967296 / 32768;" "main_~_ha_hashv~0#1 := main_#t~bitwise86#1;havoc main_#t~bitwise86#1;" "assume !false;" "havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset;" "assume !false;" "assume !false;" "call write~int#2(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#2(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4);" "assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem102#1.base, main_#t~mem102#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#2(main_#t~mem102#1.base, main_#t~mem102#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem102#1.base, main_#t~mem102#1.offset;" "call write~$Pointer$#2(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem103#1.base, main_#t~mem103#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem104#1.base, main_#t~mem104#1.offset := read~$Pointer$#2(main_#t~mem103#1.base, 16 + main_#t~mem103#1.offset, 4);call main_#t~mem105#1.base, main_#t~mem105#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem106#1 := read~int#2(main_#t~mem105#1.base, 20 + main_#t~mem105#1.offset, 4);call write~$Pointer$#2(main_#t~mem104#1.base, main_#t~mem104#1.offset - main_#t~mem106#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem103#1.base, main_#t~mem103#1.offset;havoc main_#t~mem104#1.base, main_#t~mem104#1.offset;havoc main_#t~mem105#1.base, main_#t~mem105#1.offset;havoc main_#t~mem106#1;call main_#t~mem107#1.base, main_#t~mem107#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem108#1.base, main_#t~mem108#1.offset := read~$Pointer$#2(main_#t~mem107#1.base, 16 + main_#t~mem107#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem108#1.base, 8 + main_#t~mem108#1.offset, 4);havoc main_#t~mem107#1.base, main_#t~mem107#1.offset;havoc main_#t~mem108#1.base, main_#t~mem108#1.offset;call main_#t~mem109#1.base, main_#t~mem109#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem109#1.base, 16 + main_#t~mem109#1.offset, 4);havoc main_#t~mem109#1.base, main_#t~mem109#1.offset;" "assume !false;" "havoc main_~_ha_bkt~0#1;call main_#t~mem110#1.base, main_#t~mem110#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem111#1 := read~int#2(main_#t~mem110#1.base, 12 + main_#t~mem110#1.offset, 4);main_#t~post112#1 := main_#t~mem111#1;call write~int#2(1 + main_#t~post112#1, main_#t~mem110#1.base, 12 + main_#t~mem110#1.offset, 4);havoc main_#t~mem110#1.base, main_#t~mem110#1.offset;havoc main_#t~mem111#1;havoc main_#t~post112#1;" "call main_#t~mem113#1.base, main_#t~mem113#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem114#1 := read~int#2(main_#t~mem113#1.base, 4 + main_#t~mem113#1.offset, 4);" "assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem114#1 - 1) % 4294967296;main_#t~bitwise115#1 := 0;" "main_~_ha_bkt~0#1 := main_#t~bitwise115#1;havoc main_#t~mem113#1.base, main_#t~mem113#1.offset;havoc main_#t~mem114#1;havoc main_#t~bitwise115#1;" "assume !false;" "call main_#t~mem116#1.base, main_#t~mem116#1.offset := read~$Pointer$#2(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem117#1.base, main_#t~mem117#1.offset := read~$Pointer$#2(main_#t~mem116#1.base, main_#t~mem116#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem117#1.base, main_#t~mem117#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem116#1.base, main_#t~mem116#1.offset;havoc main_#t~mem117#1.base, main_#t~mem117#1.offset;call main_#t~mem118#1 := read~int#2(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post119#1 := main_#t~mem118#1;call write~int#2(1 + main_#t~post119#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem118#1;havoc main_#t~post119#1;call main_#t~mem120#1.base, main_#t~mem120#1.offset := read~$Pointer$#2(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#2(main_#t~mem120#1.base, main_#t~mem120#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem120#1.base, main_#t~mem120#1.offset;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem121#1.base, main_#t~mem121#1.offset := read~$Pointer$#2(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);" "assume main_#t~mem121#1.base != 0 || main_#t~mem121#1.offset != 0;havoc main_#t~mem121#1.base, main_#t~mem121#1.offset;call main_#t~mem122#1.base, main_#t~mem122#1.offset := read~$Pointer$#2(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem122#1.base, 12 + main_#t~mem122#1.offset, 4);havoc main_#t~mem122#1.base, main_#t~mem122#1.offset;" "call write~$Pointer$#2(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem124#1 := read~int#2(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem123#1 := read~int#2(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short127#1 := main_#t~mem124#1 % 4294967296 >= 10 * (1 + main_#t~mem123#1) % 4294967296;" "assume main_#t~short127#1;call main_#t~mem125#1.base, main_#t~mem125#1.offset := read~$Pointer$#2(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem126#1 := read~int#2(main_#t~mem125#1.base, 36 + main_#t~mem125#1.offset, 4);main_#t~short127#1 := 0 == main_#t~mem126#1 % 4294967296;" "assume !main_#t~short127#1;havoc main_#t~mem124#1;havoc main_#t~mem123#1;havoc main_#t~mem125#1.base, main_#t~mem125#1.offset;havoc main_#t~mem126#1;havoc main_#t~short127#1;" "havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset;" "assume !false;" "havoc main_~_ha_bkt~0#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~0#1;" "assume !false;" "call main_#t~mem193#1 := read~int#3(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post194#1 := main_#t~mem193#1;call write~int#3(1 + main_#t~post194#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem193#1;havoc main_#t~post194#1;" [2024-11-28 03:02:03,406 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 03:02:03,406 INFO L85 PathProgramCache]: Analyzing trace with hash 2115, now seen corresponding path program 10 times [2024-11-28 03:02:03,406 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM [2024-11-28 03:02:03,408 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2045158109] [2024-11-28 03:02:03,408 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 03:02:03,408 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 03:02:03,425 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-28 03:02:03,425 INFO L357 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-28 03:02:03,432 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-28 03:02:03,442 INFO L130 FreeRefinementEngine]: Strategy CAMEL_NO_AM found a feasible trace [2024-11-28 03:02:03,443 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 03:02:03,444 INFO L85 PathProgramCache]: Analyzing trace with hash -1965246319, now seen corresponding path program 1 times [2024-11-28 03:02:03,444 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM [2024-11-28 03:02:03,444 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1158511663] [2024-11-28 03:02:03,444 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 03:02:03,445 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 03:02:04,054 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 03:02:05,941 INFO L136 FreeRefinementEngine]: Strategy CAMEL_NO_AM found an infeasible trace [2024-11-28 03:02:05,942 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1158511663] [2024-11-28 03:02:05,942 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1158511663] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-28 03:02:05,942 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1566259636] [2024-11-28 03:02:05,942 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 03:02:05,942 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-28 03:02:05,942 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3f86fdff-c6c4-46c5-9202-1e23723ed6cd/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 03:02:05,945 INFO L229 MonitoredProcess]: Starting monitored process 11 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3f86fdff-c6c4-46c5-9202-1e23723ed6cd/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-28 03:02:05,946 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3f86fdff-c6c4-46c5-9202-1e23723ed6cd/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Waiting until timeout for monitored process [2024-11-28 03:02:10,102 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 03:02:10,108 INFO L256 TraceCheckSpWp]: Trace formula consists of 527 conjuncts, 26 conjuncts are in the unsatisfiable core [2024-11-28 03:02:10,111 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-28 03:02:11,088 INFO L312 TraceCheckSpWp]: Computing backward predicates...