./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w64_d8_e0.c --full-output --architecture 64bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version d790fecc Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e79ab4e9-2c15-41d1-a9a3-9aa0806e687c/bin/uautomizer-verify-aQ6SnzHsRB/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e79ab4e9-2c15-41d1-a9a3-9aa0806e687c/bin/uautomizer-verify-aQ6SnzHsRB/plugins/org.eclipse.equinox.launcher_1.6.800.v20240513-1750.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e79ab4e9-2c15-41d1-a9a3-9aa0806e687c/bin/uautomizer-verify-aQ6SnzHsRB/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e79ab4e9-2c15-41d1-a9a3-9aa0806e687c/bin/uautomizer-verify-aQ6SnzHsRB/config/AutomizerReach.xml -i ../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w64_d8_e0.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e79ab4e9-2c15-41d1-a9a3-9aa0806e687c/bin/uautomizer-verify-aQ6SnzHsRB/config/svcomp-Reach-64bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e79ab4e9-2c15-41d1-a9a3-9aa0806e687c/bin/uautomizer-verify-aQ6SnzHsRB --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash dcf39230c24eb915e747e88202e73a35b6e85db9fcbfa83adc9e68e89fc807d5 --- Real Ultimate output --- This is Ultimate 0.3.0-dev-d790fec [2024-11-28 05:00:58,372 INFO L188 SettingsManager]: Resetting all preferences to default values... [2024-11-28 05:00:58,463 INFO L114 SettingsManager]: Loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e79ab4e9-2c15-41d1-a9a3-9aa0806e687c/bin/uautomizer-verify-aQ6SnzHsRB/config/svcomp-Reach-64bit-Automizer_Default.epf [2024-11-28 05:00:58,469 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2024-11-28 05:00:58,469 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2024-11-28 05:00:58,504 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2024-11-28 05:00:58,505 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2024-11-28 05:00:58,505 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2024-11-28 05:00:58,506 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2024-11-28 05:00:58,506 INFO L153 SettingsManager]: * Use memory slicer=true [2024-11-28 05:00:58,507 INFO L151 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2024-11-28 05:00:58,507 INFO L153 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2024-11-28 05:00:58,508 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2024-11-28 05:00:58,508 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2024-11-28 05:00:58,508 INFO L153 SettingsManager]: * Use SBE=true [2024-11-28 05:00:58,508 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2024-11-28 05:00:58,508 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2024-11-28 05:00:58,508 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2024-11-28 05:00:58,508 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2024-11-28 05:00:58,508 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2024-11-28 05:00:58,508 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2024-11-28 05:00:58,509 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2024-11-28 05:00:58,509 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2024-11-28 05:00:58,509 INFO L153 SettingsManager]: * Behaviour of calls to undefined functions=OVERAPPROXIMATE_BEHAVIOUR [2024-11-28 05:00:58,509 INFO L153 SettingsManager]: * Use constant arrays=true [2024-11-28 05:00:58,509 INFO L151 SettingsManager]: Preferences of IcfgBuilder differ from their defaults: [2024-11-28 05:00:58,509 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-11-28 05:00:58,509 INFO L153 SettingsManager]: * Only consider context switches at boundaries of atomic blocks=true [2024-11-28 05:00:58,509 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2024-11-28 05:00:58,509 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2024-11-28 05:00:58,509 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2024-11-28 05:00:58,509 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-11-28 05:00:58,510 INFO L153 SettingsManager]: * Only consider context switches at boundaries of atomic blocks=true [2024-11-28 05:00:58,510 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2024-11-28 05:00:58,510 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2024-11-28 05:00:58,510 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2024-11-28 05:00:58,510 INFO L153 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2024-11-28 05:00:58,510 INFO L153 SettingsManager]: * Compute procedure contracts=false [2024-11-28 05:00:58,510 INFO L153 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopHeads [2024-11-28 05:00:58,510 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2024-11-28 05:00:58,510 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2024-11-28 05:00:58,510 INFO L153 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false [2024-11-28 05:00:58,511 INFO L153 SettingsManager]: * Automaton type used in concurrency analysis=PETRI_NET [2024-11-28 05:00:58,511 INFO L153 SettingsManager]: * Order on configurations for Petri net unfoldings=DBO [2024-11-28 05:00:58,511 INFO L153 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2024-11-28 05:00:58,511 INFO L153 SettingsManager]: * Looper check in Petri net analysis=SEMANTIC Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e79ab4e9-2c15-41d1-a9a3-9aa0806e687c/bin/uautomizer-verify-aQ6SnzHsRB Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> dcf39230c24eb915e747e88202e73a35b6e85db9fcbfa83adc9e68e89fc807d5 [2024-11-28 05:00:58,802 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2024-11-28 05:00:58,810 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2024-11-28 05:00:58,812 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2024-11-28 05:00:58,813 INFO L270 PluginConnector]: Initializing CDTParser... [2024-11-28 05:00:58,813 INFO L274 PluginConnector]: CDTParser initialized [2024-11-28 05:00:58,815 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e79ab4e9-2c15-41d1-a9a3-9aa0806e687c/bin/uautomizer-verify-aQ6SnzHsRB/../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w64_d8_e0.c [2024-11-28 05:01:01,707 INFO L533 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e79ab4e9-2c15-41d1-a9a3-9aa0806e687c/bin/uautomizer-verify-aQ6SnzHsRB/data/f50db5eab/1c79de3353b244c7b8015744a575d131/FLAG67f3e9b6c [2024-11-28 05:01:02,014 INFO L384 CDTParser]: Found 1 translation units. [2024-11-28 05:01:02,014 INFO L180 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e79ab4e9-2c15-41d1-a9a3-9aa0806e687c/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w64_d8_e0.c [2024-11-28 05:01:02,025 INFO L427 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e79ab4e9-2c15-41d1-a9a3-9aa0806e687c/bin/uautomizer-verify-aQ6SnzHsRB/data/f50db5eab/1c79de3353b244c7b8015744a575d131/FLAG67f3e9b6c [2024-11-28 05:01:02,292 INFO L435 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e79ab4e9-2c15-41d1-a9a3-9aa0806e687c/bin/uautomizer-verify-aQ6SnzHsRB/data/f50db5eab/1c79de3353b244c7b8015744a575d131 [2024-11-28 05:01:02,294 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2024-11-28 05:01:02,295 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2024-11-28 05:01:02,296 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2024-11-28 05:01:02,297 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2024-11-28 05:01:02,301 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2024-11-28 05:01:02,302 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.11 05:01:02" (1/1) ... [2024-11-28 05:01:02,303 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@656f21dc and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 05:01:02, skipping insertion in model container [2024-11-28 05:01:02,303 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.11 05:01:02" (1/1) ... [2024-11-28 05:01:02,335 INFO L175 MainTranslator]: Built tables and reachable declarations [2024-11-28 05:01:02,491 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e79ab4e9-2c15-41d1-a9a3-9aa0806e687c/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w64_d8_e0.c[1279,1292] [2024-11-28 05:01:02,735 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-11-28 05:01:02,750 INFO L200 MainTranslator]: Completed pre-run [2024-11-28 05:01:02,760 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e79ab4e9-2c15-41d1-a9a3-9aa0806e687c/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w64_d8_e0.c[1279,1292] [2024-11-28 05:01:02,890 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-11-28 05:01:02,904 INFO L204 MainTranslator]: Completed translation [2024-11-28 05:01:02,904 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 05:01:02 WrapperNode [2024-11-28 05:01:02,904 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2024-11-28 05:01:02,905 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2024-11-28 05:01:02,906 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2024-11-28 05:01:02,906 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2024-11-28 05:01:02,912 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 05:01:02" (1/1) ... [2024-11-28 05:01:02,934 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 05:01:02" (1/1) ... [2024-11-28 05:01:03,144 INFO L138 Inliner]: procedures = 17, calls = 11, calls flagged for inlining = 3, calls inlined = 3, statements flattened = 1382 [2024-11-28 05:01:03,145 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2024-11-28 05:01:03,146 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2024-11-28 05:01:03,146 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2024-11-28 05:01:03,146 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2024-11-28 05:01:03,155 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 05:01:02" (1/1) ... [2024-11-28 05:01:03,155 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 05:01:02" (1/1) ... [2024-11-28 05:01:03,193 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 05:01:02" (1/1) ... [2024-11-28 05:01:03,313 INFO L175 MemorySlicer]: Split 2 memory accesses to 1 slices as follows [2]. 100 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2]. The 0 writes are split as follows [0]. [2024-11-28 05:01:03,317 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 05:01:02" (1/1) ... [2024-11-28 05:01:03,318 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 05:01:02" (1/1) ... [2024-11-28 05:01:03,373 INFO L184 PluginConnector]: Executing the observer ReplaceArrayAssignments from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 05:01:02" (1/1) ... [2024-11-28 05:01:03,377 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 05:01:02" (1/1) ... [2024-11-28 05:01:03,393 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 05:01:02" (1/1) ... [2024-11-28 05:01:03,416 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 05:01:02" (1/1) ... [2024-11-28 05:01:03,435 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 05:01:02" (1/1) ... [2024-11-28 05:01:03,460 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2024-11-28 05:01:03,461 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2024-11-28 05:01:03,461 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2024-11-28 05:01:03,462 INFO L274 PluginConnector]: RCFGBuilder initialized [2024-11-28 05:01:03,467 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 05:01:02" (1/1) ... [2024-11-28 05:01:03,473 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2024-11-28 05:01:03,485 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e79ab4e9-2c15-41d1-a9a3-9aa0806e687c/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 05:01:03,500 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e79ab4e9-2c15-41d1-a9a3-9aa0806e687c/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (exit command is (exit), workingDir is null) [2024-11-28 05:01:03,504 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e79ab4e9-2c15-41d1-a9a3-9aa0806e687c/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Waiting until timeout for monitored process [2024-11-28 05:01:03,531 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2024-11-28 05:01:03,532 INFO L130 BoogieDeclarations]: Found specification of procedure assume_abort_if_not [2024-11-28 05:01:03,532 INFO L138 BoogieDeclarations]: Found implementation of procedure assume_abort_if_not [2024-11-28 05:01:03,532 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#0 [2024-11-28 05:01:03,533 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2024-11-28 05:01:03,533 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2024-11-28 05:01:03,813 INFO L234 CfgBuilder]: Building ICFG [2024-11-28 05:01:03,814 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2024-11-28 05:01:05,907 INFO L? ?]: Removed 754 outVars from TransFormulas that were not future-live. [2024-11-28 05:01:05,908 INFO L283 CfgBuilder]: Performing block encoding [2024-11-28 05:01:05,935 INFO L307 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2024-11-28 05:01:05,939 INFO L312 CfgBuilder]: Removed 1 assume(true) statements. [2024-11-28 05:01:05,940 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.11 05:01:05 BoogieIcfgContainer [2024-11-28 05:01:05,940 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2024-11-28 05:01:05,942 INFO L112 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2024-11-28 05:01:05,944 INFO L270 PluginConnector]: Initializing TraceAbstraction... [2024-11-28 05:01:05,972 INFO L274 PluginConnector]: TraceAbstraction initialized [2024-11-28 05:01:05,973 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 28.11 05:01:02" (1/3) ... [2024-11-28 05:01:05,974 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@d937813 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.11 05:01:05, skipping insertion in model container [2024-11-28 05:01:05,974 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 05:01:02" (2/3) ... [2024-11-28 05:01:05,974 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@d937813 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.11 05:01:05, skipping insertion in model container [2024-11-28 05:01:05,975 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.11 05:01:05" (3/3) ... [2024-11-28 05:01:05,976 INFO L128 eAbstractionObserver]: Analyzing ICFG btor2c-lazyMod.circular_pointer_top_w64_d8_e0.c [2024-11-28 05:01:05,995 INFO L216 ceAbstractionStarter]: Automizer settings: Hoare:LoopHeads NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2024-11-28 05:01:05,996 INFO L151 ceAbstractionStarter]: Applying trace abstraction to ICFG btor2c-lazyMod.circular_pointer_top_w64_d8_e0.c that has 2 procedures, 392 locations, 1 initial locations, 1 loop locations, and 1 error locations. [2024-11-28 05:01:06,082 INFO L332 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2024-11-28 05:01:06,100 INFO L333 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mAutomataTypeConcurrency=PETRI_NET, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopHeads, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@761aadf2, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2024-11-28 05:01:06,100 INFO L334 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2024-11-28 05:01:06,106 INFO L276 IsEmpty]: Start isEmpty. Operand has 392 states, 386 states have (on average 1.4922279792746114) internal successors, (576), 387 states have internal predecessors, (576), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-28 05:01:06,122 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 118 [2024-11-28 05:01:06,124 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 05:01:06,124 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 05:01:06,125 INFO L396 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 05:01:06,130 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 05:01:06,130 INFO L85 PathProgramCache]: Analyzing trace with hash -1934366869, now seen corresponding path program 1 times [2024-11-28 05:01:06,138 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 05:01:06,138 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1995674705] [2024-11-28 05:01:06,138 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 05:01:06,139 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 05:01:06,344 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 05:01:06,588 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-11-28 05:01:06,589 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 05:01:06,589 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1995674705] [2024-11-28 05:01:06,590 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1995674705] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-28 05:01:06,590 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1722716903] [2024-11-28 05:01:06,590 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 05:01:06,590 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-28 05:01:06,590 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e79ab4e9-2c15-41d1-a9a3-9aa0806e687c/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 05:01:06,593 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e79ab4e9-2c15-41d1-a9a3-9aa0806e687c/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-28 05:01:06,595 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e79ab4e9-2c15-41d1-a9a3-9aa0806e687c/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2024-11-28 05:01:07,054 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 05:01:07,060 INFO L256 TraceCheckSpWp]: Trace formula consists of 685 conjuncts, 1 conjuncts are in the unsatisfiable core [2024-11-28 05:01:07,066 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-28 05:01:07,092 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-11-28 05:01:07,092 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-11-28 05:01:07,092 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1722716903] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 05:01:07,092 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-11-28 05:01:07,092 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [2] total 2 [2024-11-28 05:01:07,096 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [417774673] [2024-11-28 05:01:07,097 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 05:01:07,101 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 2 states [2024-11-28 05:01:07,102 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 05:01:07,125 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2024-11-28 05:01:07,126 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2024-11-28 05:01:07,129 INFO L87 Difference]: Start difference. First operand has 392 states, 386 states have (on average 1.4922279792746114) internal successors, (576), 387 states have internal predecessors, (576), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Second operand has 2 states, 2 states have (on average 53.5) internal successors, (107), 2 states have internal predecessors, (107), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 2 states have call successors, (3) [2024-11-28 05:01:07,200 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 05:01:07,201 INFO L93 Difference]: Finished difference Result 711 states and 1061 transitions. [2024-11-28 05:01:07,201 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-11-28 05:01:07,206 INFO L78 Accepts]: Start accepts. Automaton has has 2 states, 2 states have (on average 53.5) internal successors, (107), 2 states have internal predecessors, (107), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 2 states have call successors, (3) Word has length 117 [2024-11-28 05:01:07,207 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 05:01:07,217 INFO L225 Difference]: With dead ends: 711 [2024-11-28 05:01:07,217 INFO L226 Difference]: Without dead ends: 389 [2024-11-28 05:01:07,221 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 118 GetRequests, 118 SyntacticMatches, 0 SemanticMatches, 0 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2024-11-28 05:01:07,226 INFO L435 NwaCegarLoop]: 577 mSDtfsCounter, 0 mSDsluCounter, 0 mSDsCounter, 0 mSdLazyCounter, 0 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 577 SdHoareTripleChecker+Invalid, 0 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 0 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-28 05:01:07,227 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 577 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 0 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-28 05:01:07,244 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 389 states. [2024-11-28 05:01:07,292 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 389 to 389. [2024-11-28 05:01:07,294 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 389 states, 384 states have (on average 1.4869791666666667) internal successors, (571), 384 states have internal predecessors, (571), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-28 05:01:07,300 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 389 states to 389 states and 577 transitions. [2024-11-28 05:01:07,303 INFO L78 Accepts]: Start accepts. Automaton has 389 states and 577 transitions. Word has length 117 [2024-11-28 05:01:07,304 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 05:01:07,304 INFO L471 AbstractCegarLoop]: Abstraction has 389 states and 577 transitions. [2024-11-28 05:01:07,304 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 2 states, 2 states have (on average 53.5) internal successors, (107), 2 states have internal predecessors, (107), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 2 states have call successors, (3) [2024-11-28 05:01:07,304 INFO L276 IsEmpty]: Start isEmpty. Operand 389 states and 577 transitions. [2024-11-28 05:01:07,310 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 118 [2024-11-28 05:01:07,310 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 05:01:07,311 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 05:01:07,323 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e79ab4e9-2c15-41d1-a9a3-9aa0806e687c/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Forceful destruction successful, exit code 0 [2024-11-28 05:01:07,511 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0,2 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e79ab4e9-2c15-41d1-a9a3-9aa0806e687c/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-28 05:01:07,511 INFO L396 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 05:01:07,512 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 05:01:07,512 INFO L85 PathProgramCache]: Analyzing trace with hash 504535717, now seen corresponding path program 1 times [2024-11-28 05:01:07,512 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 05:01:07,512 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1069687011] [2024-11-28 05:01:07,513 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 05:01:07,513 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 05:01:07,819 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 05:01:08,901 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-28 05:01:08,901 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 05:01:08,901 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1069687011] [2024-11-28 05:01:08,901 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1069687011] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 05:01:08,901 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 05:01:08,901 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-28 05:01:08,902 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1486589705] [2024-11-28 05:01:08,902 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 05:01:08,902 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-28 05:01:08,902 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 05:01:08,903 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-28 05:01:08,903 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-28 05:01:08,906 INFO L87 Difference]: Start difference. First operand 389 states and 577 transitions. Second operand has 4 states, 4 states have (on average 26.25) internal successors, (105), 4 states have internal predecessors, (105), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-28 05:01:08,978 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 05:01:08,979 INFO L93 Difference]: Finished difference Result 393 states and 581 transitions. [2024-11-28 05:01:08,979 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-28 05:01:08,979 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 26.25) internal successors, (105), 4 states have internal predecessors, (105), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 117 [2024-11-28 05:01:08,980 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 05:01:08,983 INFO L225 Difference]: With dead ends: 393 [2024-11-28 05:01:08,986 INFO L226 Difference]: Without dead ends: 391 [2024-11-28 05:01:08,987 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-28 05:01:08,988 INFO L435 NwaCegarLoop]: 575 mSDtfsCounter, 0 mSDsluCounter, 1144 mSDsCounter, 0 mSdLazyCounter, 11 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 1719 SdHoareTripleChecker+Invalid, 11 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 11 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-28 05:01:08,988 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 1719 Invalid, 11 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 11 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-28 05:01:08,989 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 391 states. [2024-11-28 05:01:09,012 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 391 to 391. [2024-11-28 05:01:09,014 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 391 states, 386 states have (on average 1.4844559585492227) internal successors, (573), 386 states have internal predecessors, (573), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-28 05:01:09,016 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 391 states to 391 states and 579 transitions. [2024-11-28 05:01:09,016 INFO L78 Accepts]: Start accepts. Automaton has 391 states and 579 transitions. Word has length 117 [2024-11-28 05:01:09,017 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 05:01:09,019 INFO L471 AbstractCegarLoop]: Abstraction has 391 states and 579 transitions. [2024-11-28 05:01:09,020 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 26.25) internal successors, (105), 4 states have internal predecessors, (105), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-28 05:01:09,020 INFO L276 IsEmpty]: Start isEmpty. Operand 391 states and 579 transitions. [2024-11-28 05:01:09,023 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 119 [2024-11-28 05:01:09,024 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 05:01:09,027 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 05:01:09,027 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2024-11-28 05:01:09,027 INFO L396 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 05:01:09,028 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 05:01:09,028 INFO L85 PathProgramCache]: Analyzing trace with hash -1537566187, now seen corresponding path program 1 times [2024-11-28 05:01:09,028 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 05:01:09,028 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1270248921] [2024-11-28 05:01:09,028 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 05:01:09,028 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 05:01:09,152 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 05:01:09,646 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-28 05:01:09,650 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 05:01:09,650 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1270248921] [2024-11-28 05:01:09,651 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1270248921] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 05:01:09,651 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 05:01:09,651 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-28 05:01:09,651 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [249220572] [2024-11-28 05:01:09,651 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 05:01:09,651 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-28 05:01:09,652 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 05:01:09,652 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-28 05:01:09,653 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-11-28 05:01:09,653 INFO L87 Difference]: Start difference. First operand 391 states and 579 transitions. Second operand has 5 states, 5 states have (on average 21.2) internal successors, (106), 5 states have internal predecessors, (106), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-28 05:01:10,173 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 05:01:10,173 INFO L93 Difference]: Finished difference Result 971 states and 1441 transitions. [2024-11-28 05:01:10,174 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-28 05:01:10,174 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 21.2) internal successors, (106), 5 states have internal predecessors, (106), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 118 [2024-11-28 05:01:10,175 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 05:01:10,177 INFO L225 Difference]: With dead ends: 971 [2024-11-28 05:01:10,178 INFO L226 Difference]: Without dead ends: 391 [2024-11-28 05:01:10,182 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2024-11-28 05:01:10,183 INFO L435 NwaCegarLoop]: 629 mSDtfsCounter, 1090 mSDsluCounter, 1058 mSDsCounter, 0 mSdLazyCounter, 246 mSolverCounterSat, 29 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1090 SdHoareTripleChecker+Valid, 1687 SdHoareTripleChecker+Invalid, 275 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 29 IncrementalHoareTripleChecker+Valid, 246 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2024-11-28 05:01:10,184 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1090 Valid, 1687 Invalid, 275 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [29 Valid, 246 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2024-11-28 05:01:10,186 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 391 states. [2024-11-28 05:01:10,205 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 391 to 391. [2024-11-28 05:01:10,206 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 391 states, 386 states have (on average 1.4818652849740932) internal successors, (572), 386 states have internal predecessors, (572), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-28 05:01:10,208 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 391 states to 391 states and 578 transitions. [2024-11-28 05:01:10,209 INFO L78 Accepts]: Start accepts. Automaton has 391 states and 578 transitions. Word has length 118 [2024-11-28 05:01:10,209 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 05:01:10,209 INFO L471 AbstractCegarLoop]: Abstraction has 391 states and 578 transitions. [2024-11-28 05:01:10,209 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 21.2) internal successors, (106), 5 states have internal predecessors, (106), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-28 05:01:10,210 INFO L276 IsEmpty]: Start isEmpty. Operand 391 states and 578 transitions. [2024-11-28 05:01:10,211 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 120 [2024-11-28 05:01:10,211 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 05:01:10,211 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 05:01:10,212 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2024-11-28 05:01:10,212 INFO L396 AbstractCegarLoop]: === Iteration 4 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 05:01:10,212 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 05:01:10,213 INFO L85 PathProgramCache]: Analyzing trace with hash 930225119, now seen corresponding path program 1 times [2024-11-28 05:01:10,213 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 05:01:10,213 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [272608840] [2024-11-28 05:01:10,213 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 05:01:10,213 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 05:01:10,313 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 05:01:10,665 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-28 05:01:10,666 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 05:01:10,666 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [272608840] [2024-11-28 05:01:10,666 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [272608840] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 05:01:10,666 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 05:01:10,666 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-28 05:01:10,666 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1278181628] [2024-11-28 05:01:10,666 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 05:01:10,667 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-28 05:01:10,667 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 05:01:10,668 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-28 05:01:10,668 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-28 05:01:10,668 INFO L87 Difference]: Start difference. First operand 391 states and 578 transitions. Second operand has 4 states, 4 states have (on average 26.75) internal successors, (107), 4 states have internal predecessors, (107), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-28 05:01:10,707 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 05:01:10,707 INFO L93 Difference]: Finished difference Result 714 states and 1055 transitions. [2024-11-28 05:01:10,707 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-28 05:01:10,708 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 26.75) internal successors, (107), 4 states have internal predecessors, (107), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 119 [2024-11-28 05:01:10,708 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 05:01:10,709 INFO L225 Difference]: With dead ends: 714 [2024-11-28 05:01:10,710 INFO L226 Difference]: Without dead ends: 393 [2024-11-28 05:01:10,710 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-28 05:01:10,711 INFO L435 NwaCegarLoop]: 574 mSDtfsCounter, 0 mSDsluCounter, 1138 mSDsCounter, 0 mSdLazyCounter, 15 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 1712 SdHoareTripleChecker+Invalid, 15 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 15 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-28 05:01:10,711 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 1712 Invalid, 15 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 15 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-28 05:01:10,712 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 393 states. [2024-11-28 05:01:10,720 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 393 to 393. [2024-11-28 05:01:10,721 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 393 states, 388 states have (on average 1.4793814432989691) internal successors, (574), 388 states have internal predecessors, (574), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-28 05:01:10,722 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 393 states to 393 states and 580 transitions. [2024-11-28 05:01:10,723 INFO L78 Accepts]: Start accepts. Automaton has 393 states and 580 transitions. Word has length 119 [2024-11-28 05:01:10,723 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 05:01:10,723 INFO L471 AbstractCegarLoop]: Abstraction has 393 states and 580 transitions. [2024-11-28 05:01:10,723 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 26.75) internal successors, (107), 4 states have internal predecessors, (107), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-28 05:01:10,723 INFO L276 IsEmpty]: Start isEmpty. Operand 393 states and 580 transitions. [2024-11-28 05:01:10,725 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 121 [2024-11-28 05:01:10,725 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 05:01:10,725 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 05:01:10,725 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3 [2024-11-28 05:01:10,725 INFO L396 AbstractCegarLoop]: === Iteration 5 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 05:01:10,726 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 05:01:10,726 INFO L85 PathProgramCache]: Analyzing trace with hash 1969209588, now seen corresponding path program 1 times [2024-11-28 05:01:10,726 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 05:01:10,726 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [478526624] [2024-11-28 05:01:10,726 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 05:01:10,726 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 05:01:10,824 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 05:01:11,372 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-28 05:01:11,373 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 05:01:11,374 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [478526624] [2024-11-28 05:01:11,374 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [478526624] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 05:01:11,374 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 05:01:11,374 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-28 05:01:11,374 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1188103795] [2024-11-28 05:01:11,374 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 05:01:11,375 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-28 05:01:11,375 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 05:01:11,375 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-28 05:01:11,375 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-28 05:01:11,376 INFO L87 Difference]: Start difference. First operand 393 states and 580 transitions. Second operand has 4 states, 4 states have (on average 27.0) internal successors, (108), 4 states have internal predecessors, (108), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-28 05:01:11,518 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 05:01:11,518 INFO L93 Difference]: Finished difference Result 716 states and 1056 transitions. [2024-11-28 05:01:11,518 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-28 05:01:11,518 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 27.0) internal successors, (108), 4 states have internal predecessors, (108), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 120 [2024-11-28 05:01:11,519 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 05:01:11,520 INFO L225 Difference]: With dead ends: 716 [2024-11-28 05:01:11,520 INFO L226 Difference]: Without dead ends: 393 [2024-11-28 05:01:11,521 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-11-28 05:01:11,521 INFO L435 NwaCegarLoop]: 534 mSDtfsCounter, 482 mSDsluCounter, 536 mSDsCounter, 0 mSdLazyCounter, 84 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 482 SdHoareTripleChecker+Valid, 1070 SdHoareTripleChecker+Invalid, 84 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 84 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-28 05:01:11,521 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [482 Valid, 1070 Invalid, 84 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 84 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-28 05:01:11,522 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 393 states. [2024-11-28 05:01:11,530 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 393 to 393. [2024-11-28 05:01:11,531 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 393 states, 388 states have (on average 1.4768041237113403) internal successors, (573), 388 states have internal predecessors, (573), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-28 05:01:11,533 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 393 states to 393 states and 579 transitions. [2024-11-28 05:01:11,533 INFO L78 Accepts]: Start accepts. Automaton has 393 states and 579 transitions. Word has length 120 [2024-11-28 05:01:11,533 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 05:01:11,533 INFO L471 AbstractCegarLoop]: Abstraction has 393 states and 579 transitions. [2024-11-28 05:01:11,534 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 27.0) internal successors, (108), 4 states have internal predecessors, (108), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-28 05:01:11,534 INFO L276 IsEmpty]: Start isEmpty. Operand 393 states and 579 transitions. [2024-11-28 05:01:11,535 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 122 [2024-11-28 05:01:11,535 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 05:01:11,535 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 05:01:11,535 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4 [2024-11-28 05:01:11,535 INFO L396 AbstractCegarLoop]: === Iteration 6 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 05:01:11,536 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 05:01:11,536 INFO L85 PathProgramCache]: Analyzing trace with hash -923559006, now seen corresponding path program 1 times [2024-11-28 05:01:11,536 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 05:01:11,536 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1676070846] [2024-11-28 05:01:11,536 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 05:01:11,536 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 05:01:11,632 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 05:01:11,905 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-28 05:01:11,905 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 05:01:11,905 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1676070846] [2024-11-28 05:01:11,905 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1676070846] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 05:01:11,905 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 05:01:11,905 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-28 05:01:11,905 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1209626794] [2024-11-28 05:01:11,905 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 05:01:11,906 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-28 05:01:11,906 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 05:01:11,906 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-28 05:01:11,907 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-11-28 05:01:11,907 INFO L87 Difference]: Start difference. First operand 393 states and 579 transitions. Second operand has 5 states, 5 states have (on average 21.8) internal successors, (109), 5 states have internal predecessors, (109), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-28 05:01:12,030 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 05:01:12,030 INFO L93 Difference]: Finished difference Result 718 states and 1056 transitions. [2024-11-28 05:01:12,031 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-11-28 05:01:12,031 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 21.8) internal successors, (109), 5 states have internal predecessors, (109), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 121 [2024-11-28 05:01:12,031 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 05:01:12,033 INFO L225 Difference]: With dead ends: 718 [2024-11-28 05:01:12,033 INFO L226 Difference]: Without dead ends: 393 [2024-11-28 05:01:12,033 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2024-11-28 05:01:12,034 INFO L435 NwaCegarLoop]: 568 mSDtfsCounter, 485 mSDsluCounter, 1106 mSDsCounter, 0 mSdLazyCounter, 54 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 485 SdHoareTripleChecker+Valid, 1674 SdHoareTripleChecker+Invalid, 54 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 54 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-28 05:01:12,034 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [485 Valid, 1674 Invalid, 54 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 54 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-28 05:01:12,036 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 393 states. [2024-11-28 05:01:12,052 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 393 to 393. [2024-11-28 05:01:12,057 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 393 states, 388 states have (on average 1.4742268041237114) internal successors, (572), 388 states have internal predecessors, (572), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-28 05:01:12,059 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 393 states to 393 states and 578 transitions. [2024-11-28 05:01:12,063 INFO L78 Accepts]: Start accepts. Automaton has 393 states and 578 transitions. Word has length 121 [2024-11-28 05:01:12,063 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 05:01:12,063 INFO L471 AbstractCegarLoop]: Abstraction has 393 states and 578 transitions. [2024-11-28 05:01:12,064 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 21.8) internal successors, (109), 5 states have internal predecessors, (109), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-28 05:01:12,064 INFO L276 IsEmpty]: Start isEmpty. Operand 393 states and 578 transitions. [2024-11-28 05:01:12,065 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 123 [2024-11-28 05:01:12,065 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 05:01:12,065 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 05:01:12,065 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5 [2024-11-28 05:01:12,065 INFO L396 AbstractCegarLoop]: === Iteration 7 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 05:01:12,066 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 05:01:12,066 INFO L85 PathProgramCache]: Analyzing trace with hash 728541133, now seen corresponding path program 1 times [2024-11-28 05:01:12,066 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 05:01:12,066 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [28789937] [2024-11-28 05:01:12,066 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 05:01:12,066 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 05:01:12,177 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 05:01:12,463 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-28 05:01:12,463 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 05:01:12,463 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [28789937] [2024-11-28 05:01:12,463 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [28789937] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 05:01:12,463 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 05:01:12,463 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-28 05:01:12,463 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2045348607] [2024-11-28 05:01:12,463 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 05:01:12,464 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-28 05:01:12,464 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 05:01:12,464 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-28 05:01:12,464 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-28 05:01:12,465 INFO L87 Difference]: Start difference. First operand 393 states and 578 transitions. Second operand has 5 states, 5 states have (on average 22.0) internal successors, (110), 5 states have internal predecessors, (110), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-28 05:01:12,594 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 05:01:12,595 INFO L93 Difference]: Finished difference Result 716 states and 1052 transitions. [2024-11-28 05:01:12,595 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-28 05:01:12,595 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 22.0) internal successors, (110), 5 states have internal predecessors, (110), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 122 [2024-11-28 05:01:12,596 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 05:01:12,597 INFO L225 Difference]: With dead ends: 716 [2024-11-28 05:01:12,597 INFO L226 Difference]: Without dead ends: 393 [2024-11-28 05:01:12,598 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-11-28 05:01:12,598 INFO L435 NwaCegarLoop]: 534 mSDtfsCounter, 1033 mSDsluCounter, 536 mSDsCounter, 0 mSdLazyCounter, 80 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1036 SdHoareTripleChecker+Valid, 1070 SdHoareTripleChecker+Invalid, 81 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 80 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-28 05:01:12,599 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1036 Valid, 1070 Invalid, 81 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 80 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-28 05:01:12,600 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 393 states. [2024-11-28 05:01:12,608 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 393 to 393. [2024-11-28 05:01:12,609 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 393 states, 388 states have (on average 1.4716494845360826) internal successors, (571), 388 states have internal predecessors, (571), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-28 05:01:12,611 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 393 states to 393 states and 577 transitions. [2024-11-28 05:01:12,611 INFO L78 Accepts]: Start accepts. Automaton has 393 states and 577 transitions. Word has length 122 [2024-11-28 05:01:12,611 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 05:01:12,612 INFO L471 AbstractCegarLoop]: Abstraction has 393 states and 577 transitions. [2024-11-28 05:01:12,612 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 22.0) internal successors, (110), 5 states have internal predecessors, (110), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-28 05:01:12,612 INFO L276 IsEmpty]: Start isEmpty. Operand 393 states and 577 transitions. [2024-11-28 05:01:12,613 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 124 [2024-11-28 05:01:12,613 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 05:01:12,613 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 05:01:12,613 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6 [2024-11-28 05:01:12,614 INFO L396 AbstractCegarLoop]: === Iteration 8 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 05:01:12,614 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 05:01:12,614 INFO L85 PathProgramCache]: Analyzing trace with hash 187884130, now seen corresponding path program 1 times [2024-11-28 05:01:12,614 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 05:01:12,614 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [119960187] [2024-11-28 05:01:12,614 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 05:01:12,614 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 05:01:12,705 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 05:01:13,011 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-28 05:01:13,011 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 05:01:13,011 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [119960187] [2024-11-28 05:01:13,011 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [119960187] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 05:01:13,011 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 05:01:13,011 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-28 05:01:13,011 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [270333489] [2024-11-28 05:01:13,011 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 05:01:13,012 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-28 05:01:13,012 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 05:01:13,012 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-28 05:01:13,012 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-28 05:01:13,013 INFO L87 Difference]: Start difference. First operand 393 states and 577 transitions. Second operand has 5 states, 5 states have (on average 22.2) internal successors, (111), 5 states have internal predecessors, (111), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-28 05:01:13,146 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 05:01:13,146 INFO L93 Difference]: Finished difference Result 716 states and 1050 transitions. [2024-11-28 05:01:13,147 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-28 05:01:13,147 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 22.2) internal successors, (111), 5 states have internal predecessors, (111), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 123 [2024-11-28 05:01:13,147 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 05:01:13,149 INFO L225 Difference]: With dead ends: 716 [2024-11-28 05:01:13,149 INFO L226 Difference]: Without dead ends: 393 [2024-11-28 05:01:13,150 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-11-28 05:01:13,150 INFO L435 NwaCegarLoop]: 534 mSDtfsCounter, 555 mSDsluCounter, 543 mSDsCounter, 0 mSdLazyCounter, 78 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 558 SdHoareTripleChecker+Valid, 1077 SdHoareTripleChecker+Invalid, 79 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 78 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-28 05:01:13,151 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [558 Valid, 1077 Invalid, 79 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 78 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-28 05:01:13,152 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 393 states. [2024-11-28 05:01:13,160 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 393 to 393. [2024-11-28 05:01:13,161 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 393 states, 388 states have (on average 1.4690721649484537) internal successors, (570), 388 states have internal predecessors, (570), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-28 05:01:13,163 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 393 states to 393 states and 576 transitions. [2024-11-28 05:01:13,163 INFO L78 Accepts]: Start accepts. Automaton has 393 states and 576 transitions. Word has length 123 [2024-11-28 05:01:13,163 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 05:01:13,163 INFO L471 AbstractCegarLoop]: Abstraction has 393 states and 576 transitions. [2024-11-28 05:01:13,163 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 22.2) internal successors, (111), 5 states have internal predecessors, (111), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-28 05:01:13,164 INFO L276 IsEmpty]: Start isEmpty. Operand 393 states and 576 transitions. [2024-11-28 05:01:13,165 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 125 [2024-11-28 05:01:13,165 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 05:01:13,166 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 05:01:13,166 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7 [2024-11-28 05:01:13,166 INFO L396 AbstractCegarLoop]: === Iteration 9 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 05:01:13,166 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 05:01:13,166 INFO L85 PathProgramCache]: Analyzing trace with hash 358061862, now seen corresponding path program 1 times [2024-11-28 05:01:13,167 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 05:01:13,167 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [602184327] [2024-11-28 05:01:13,167 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 05:01:13,167 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 05:01:13,292 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 05:01:13,791 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-28 05:01:13,791 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 05:01:13,792 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [602184327] [2024-11-28 05:01:13,792 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [602184327] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 05:01:13,792 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 05:01:13,792 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-28 05:01:13,792 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1445625332] [2024-11-28 05:01:13,792 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 05:01:13,792 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-28 05:01:13,792 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 05:01:13,793 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-28 05:01:13,793 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-28 05:01:13,793 INFO L87 Difference]: Start difference. First operand 393 states and 576 transitions. Second operand has 4 states, 4 states have (on average 28.0) internal successors, (112), 4 states have internal predecessors, (112), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-28 05:01:13,882 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 05:01:13,882 INFO L93 Difference]: Finished difference Result 716 states and 1048 transitions. [2024-11-28 05:01:13,883 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-28 05:01:13,883 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 28.0) internal successors, (112), 4 states have internal predecessors, (112), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 124 [2024-11-28 05:01:13,883 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 05:01:13,885 INFO L225 Difference]: With dead ends: 716 [2024-11-28 05:01:13,885 INFO L226 Difference]: Without dead ends: 393 [2024-11-28 05:01:13,885 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-11-28 05:01:13,886 INFO L435 NwaCegarLoop]: 550 mSDtfsCounter, 483 mSDsluCounter, 552 mSDsCounter, 0 mSdLazyCounter, 42 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 483 SdHoareTripleChecker+Valid, 1102 SdHoareTripleChecker+Invalid, 43 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 42 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-28 05:01:13,886 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [483 Valid, 1102 Invalid, 43 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 42 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-28 05:01:13,887 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 393 states. [2024-11-28 05:01:13,896 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 393 to 393. [2024-11-28 05:01:13,898 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 393 states, 388 states have (on average 1.4639175257731958) internal successors, (568), 388 states have internal predecessors, (568), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-28 05:01:13,900 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 393 states to 393 states and 574 transitions. [2024-11-28 05:01:13,900 INFO L78 Accepts]: Start accepts. Automaton has 393 states and 574 transitions. Word has length 124 [2024-11-28 05:01:13,901 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 05:01:13,901 INFO L471 AbstractCegarLoop]: Abstraction has 393 states and 574 transitions. [2024-11-28 05:01:13,901 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 28.0) internal successors, (112), 4 states have internal predecessors, (112), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-28 05:01:13,901 INFO L276 IsEmpty]: Start isEmpty. Operand 393 states and 574 transitions. [2024-11-28 05:01:13,902 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 127 [2024-11-28 05:01:13,902 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 05:01:13,902 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 05:01:13,902 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8 [2024-11-28 05:01:13,903 INFO L396 AbstractCegarLoop]: === Iteration 10 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 05:01:13,903 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 05:01:13,903 INFO L85 PathProgramCache]: Analyzing trace with hash 1506252195, now seen corresponding path program 1 times [2024-11-28 05:01:13,903 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 05:01:13,903 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [944309414] [2024-11-28 05:01:13,903 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 05:01:13,903 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 05:01:14,001 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 05:01:14,355 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-28 05:01:14,355 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 05:01:14,355 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [944309414] [2024-11-28 05:01:14,355 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [944309414] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 05:01:14,355 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 05:01:14,355 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-28 05:01:14,355 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [387050557] [2024-11-28 05:01:14,356 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 05:01:14,356 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-28 05:01:14,356 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 05:01:14,356 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-28 05:01:14,356 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-28 05:01:14,357 INFO L87 Difference]: Start difference. First operand 393 states and 574 transitions. Second operand has 5 states, 5 states have (on average 22.8) internal successors, (114), 5 states have internal predecessors, (114), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-28 05:01:14,460 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 05:01:14,461 INFO L93 Difference]: Finished difference Result 716 states and 1044 transitions. [2024-11-28 05:01:14,461 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-28 05:01:14,461 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 22.8) internal successors, (114), 5 states have internal predecessors, (114), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 126 [2024-11-28 05:01:14,462 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 05:01:14,463 INFO L225 Difference]: With dead ends: 716 [2024-11-28 05:01:14,463 INFO L226 Difference]: Without dead ends: 393 [2024-11-28 05:01:14,464 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-11-28 05:01:14,466 INFO L435 NwaCegarLoop]: 550 mSDtfsCounter, 1033 mSDsluCounter, 552 mSDsCounter, 0 mSdLazyCounter, 40 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1036 SdHoareTripleChecker+Valid, 1102 SdHoareTripleChecker+Invalid, 41 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 40 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-28 05:01:14,467 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1036 Valid, 1102 Invalid, 41 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 40 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-28 05:01:14,467 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 393 states. [2024-11-28 05:01:14,477 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 393 to 393. [2024-11-28 05:01:14,478 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 393 states, 388 states have (on average 1.461340206185567) internal successors, (567), 388 states have internal predecessors, (567), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-28 05:01:14,480 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 393 states to 393 states and 573 transitions. [2024-11-28 05:01:14,480 INFO L78 Accepts]: Start accepts. Automaton has 393 states and 573 transitions. Word has length 126 [2024-11-28 05:01:14,480 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 05:01:14,480 INFO L471 AbstractCegarLoop]: Abstraction has 393 states and 573 transitions. [2024-11-28 05:01:14,481 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 22.8) internal successors, (114), 5 states have internal predecessors, (114), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-28 05:01:14,481 INFO L276 IsEmpty]: Start isEmpty. Operand 393 states and 573 transitions. [2024-11-28 05:01:14,482 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 128 [2024-11-28 05:01:14,482 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 05:01:14,483 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 05:01:14,483 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable9 [2024-11-28 05:01:14,484 INFO L396 AbstractCegarLoop]: === Iteration 11 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 05:01:14,484 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 05:01:14,484 INFO L85 PathProgramCache]: Analyzing trace with hash -1413439803, now seen corresponding path program 1 times [2024-11-28 05:01:14,484 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 05:01:14,484 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [942318605] [2024-11-28 05:01:14,484 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 05:01:14,485 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 05:01:14,624 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 05:01:15,026 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-28 05:01:15,026 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 05:01:15,026 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [942318605] [2024-11-28 05:01:15,026 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [942318605] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 05:01:15,026 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 05:01:15,026 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-28 05:01:15,026 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [896593312] [2024-11-28 05:01:15,027 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 05:01:15,027 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-28 05:01:15,027 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 05:01:15,027 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-28 05:01:15,027 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-28 05:01:15,028 INFO L87 Difference]: Start difference. First operand 393 states and 573 transitions. Second operand has 4 states, 4 states have (on average 28.75) internal successors, (115), 4 states have internal predecessors, (115), 2 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2024-11-28 05:01:15,115 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 05:01:15,115 INFO L93 Difference]: Finished difference Result 716 states and 1042 transitions. [2024-11-28 05:01:15,115 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-28 05:01:15,115 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 28.75) internal successors, (115), 4 states have internal predecessors, (115), 2 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 127 [2024-11-28 05:01:15,116 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 05:01:15,117 INFO L225 Difference]: With dead ends: 716 [2024-11-28 05:01:15,117 INFO L226 Difference]: Without dead ends: 393 [2024-11-28 05:01:15,118 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-11-28 05:01:15,119 INFO L435 NwaCegarLoop]: 553 mSDtfsCounter, 518 mSDsluCounter, 555 mSDsCounter, 0 mSdLazyCounter, 32 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 520 SdHoareTripleChecker+Valid, 1108 SdHoareTripleChecker+Invalid, 32 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 32 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-28 05:01:15,119 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [520 Valid, 1108 Invalid, 32 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 32 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-28 05:01:15,120 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 393 states. [2024-11-28 05:01:15,144 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 393 to 393. [2024-11-28 05:01:15,148 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 393 states, 388 states have (on average 1.458762886597938) internal successors, (566), 388 states have internal predecessors, (566), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-28 05:01:15,150 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 393 states to 393 states and 572 transitions. [2024-11-28 05:01:15,151 INFO L78 Accepts]: Start accepts. Automaton has 393 states and 572 transitions. Word has length 127 [2024-11-28 05:01:15,151 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 05:01:15,151 INFO L471 AbstractCegarLoop]: Abstraction has 393 states and 572 transitions. [2024-11-28 05:01:15,151 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 28.75) internal successors, (115), 4 states have internal predecessors, (115), 2 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2024-11-28 05:01:15,151 INFO L276 IsEmpty]: Start isEmpty. Operand 393 states and 572 transitions. [2024-11-28 05:01:15,153 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 129 [2024-11-28 05:01:15,153 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 05:01:15,154 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 05:01:15,154 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable10 [2024-11-28 05:01:15,154 INFO L396 AbstractCegarLoop]: === Iteration 12 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 05:01:15,154 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 05:01:15,155 INFO L85 PathProgramCache]: Analyzing trace with hash -12372935, now seen corresponding path program 1 times [2024-11-28 05:01:15,155 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 05:01:15,155 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [260440341] [2024-11-28 05:01:15,155 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 05:01:15,155 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 05:01:15,354 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 05:01:15,783 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-28 05:01:15,783 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 05:01:15,783 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [260440341] [2024-11-28 05:01:15,783 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [260440341] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 05:01:15,783 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 05:01:15,784 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-28 05:01:15,784 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [367208745] [2024-11-28 05:01:15,784 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 05:01:15,784 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-28 05:01:15,784 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 05:01:15,785 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-28 05:01:15,785 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-28 05:01:15,785 INFO L87 Difference]: Start difference. First operand 393 states and 572 transitions. Second operand has 5 states, 5 states have (on average 23.2) internal successors, (116), 5 states have internal predecessors, (116), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-28 05:01:15,933 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 05:01:15,933 INFO L93 Difference]: Finished difference Result 716 states and 1040 transitions. [2024-11-28 05:01:15,933 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-28 05:01:15,934 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 23.2) internal successors, (116), 5 states have internal predecessors, (116), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 128 [2024-11-28 05:01:15,934 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 05:01:15,935 INFO L225 Difference]: With dead ends: 716 [2024-11-28 05:01:15,936 INFO L226 Difference]: Without dead ends: 393 [2024-11-28 05:01:15,936 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-11-28 05:01:15,937 INFO L435 NwaCegarLoop]: 530 mSDtfsCounter, 473 mSDsluCounter, 532 mSDsCounter, 0 mSdLazyCounter, 76 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 473 SdHoareTripleChecker+Valid, 1062 SdHoareTripleChecker+Invalid, 76 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 76 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-28 05:01:15,937 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [473 Valid, 1062 Invalid, 76 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 76 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-28 05:01:15,938 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 393 states. [2024-11-28 05:01:15,947 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 393 to 393. [2024-11-28 05:01:15,948 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 393 states, 388 states have (on average 1.4561855670103092) internal successors, (565), 388 states have internal predecessors, (565), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-28 05:01:15,950 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 393 states to 393 states and 571 transitions. [2024-11-28 05:01:15,950 INFO L78 Accepts]: Start accepts. Automaton has 393 states and 571 transitions. Word has length 128 [2024-11-28 05:01:15,950 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 05:01:15,950 INFO L471 AbstractCegarLoop]: Abstraction has 393 states and 571 transitions. [2024-11-28 05:01:15,951 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 23.2) internal successors, (116), 5 states have internal predecessors, (116), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-28 05:01:15,951 INFO L276 IsEmpty]: Start isEmpty. Operand 393 states and 571 transitions. [2024-11-28 05:01:15,952 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 130 [2024-11-28 05:01:15,952 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 05:01:15,952 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 05:01:15,952 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable11 [2024-11-28 05:01:15,952 INFO L396 AbstractCegarLoop]: === Iteration 13 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 05:01:15,953 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 05:01:15,953 INFO L85 PathProgramCache]: Analyzing trace with hash -1411160021, now seen corresponding path program 1 times [2024-11-28 05:01:15,953 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 05:01:15,953 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1507621490] [2024-11-28 05:01:15,953 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 05:01:15,953 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 05:01:16,157 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 05:01:16,538 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-28 05:01:16,538 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 05:01:16,538 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1507621490] [2024-11-28 05:01:16,539 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1507621490] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 05:01:16,539 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 05:01:16,539 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-28 05:01:16,539 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1940452188] [2024-11-28 05:01:16,539 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 05:01:16,540 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-28 05:01:16,540 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 05:01:16,540 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-28 05:01:16,540 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-28 05:01:16,541 INFO L87 Difference]: Start difference. First operand 393 states and 571 transitions. Second operand has 4 states, 4 states have (on average 29.25) internal successors, (117), 4 states have internal predecessors, (117), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-28 05:01:16,793 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 05:01:16,794 INFO L93 Difference]: Finished difference Result 718 states and 1040 transitions. [2024-11-28 05:01:16,794 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-28 05:01:16,794 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 29.25) internal successors, (117), 4 states have internal predecessors, (117), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 129 [2024-11-28 05:01:16,795 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 05:01:16,796 INFO L225 Difference]: With dead ends: 718 [2024-11-28 05:01:16,796 INFO L226 Difference]: Without dead ends: 393 [2024-11-28 05:01:16,797 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-28 05:01:16,798 INFO L435 NwaCegarLoop]: 562 mSDtfsCounter, 2 mSDsluCounter, 974 mSDsCounter, 0 mSdLazyCounter, 161 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2 SdHoareTripleChecker+Valid, 1536 SdHoareTripleChecker+Invalid, 161 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 161 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-11-28 05:01:16,798 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2 Valid, 1536 Invalid, 161 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 161 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-11-28 05:01:16,799 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 393 states. [2024-11-28 05:01:16,809 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 393 to 393. [2024-11-28 05:01:16,810 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 393 states, 388 states have (on average 1.4536082474226804) internal successors, (564), 388 states have internal predecessors, (564), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-28 05:01:16,812 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 393 states to 393 states and 570 transitions. [2024-11-28 05:01:16,813 INFO L78 Accepts]: Start accepts. Automaton has 393 states and 570 transitions. Word has length 129 [2024-11-28 05:01:16,813 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 05:01:16,813 INFO L471 AbstractCegarLoop]: Abstraction has 393 states and 570 transitions. [2024-11-28 05:01:16,813 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 29.25) internal successors, (117), 4 states have internal predecessors, (117), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-28 05:01:16,814 INFO L276 IsEmpty]: Start isEmpty. Operand 393 states and 570 transitions. [2024-11-28 05:01:16,815 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 131 [2024-11-28 05:01:16,815 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 05:01:16,815 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 05:01:16,815 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable12 [2024-11-28 05:01:16,815 INFO L396 AbstractCegarLoop]: === Iteration 14 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 05:01:16,816 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 05:01:16,816 INFO L85 PathProgramCache]: Analyzing trace with hash -1039408138, now seen corresponding path program 1 times [2024-11-28 05:01:16,816 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 05:01:16,816 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1027822754] [2024-11-28 05:01:16,816 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 05:01:16,816 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 05:01:17,006 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 05:01:17,453 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-28 05:01:17,453 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 05:01:17,453 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1027822754] [2024-11-28 05:01:17,453 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1027822754] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 05:01:17,453 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 05:01:17,453 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-28 05:01:17,453 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [855784584] [2024-11-28 05:01:17,453 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 05:01:17,454 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-28 05:01:17,454 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 05:01:17,454 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-28 05:01:17,454 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-28 05:01:17,455 INFO L87 Difference]: Start difference. First operand 393 states and 570 transitions. Second operand has 5 states, 5 states have (on average 23.6) internal successors, (118), 5 states have internal predecessors, (118), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-28 05:01:17,617 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 05:01:17,617 INFO L93 Difference]: Finished difference Result 716 states and 1036 transitions. [2024-11-28 05:01:17,619 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-28 05:01:17,619 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 23.6) internal successors, (118), 5 states have internal predecessors, (118), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 130 [2024-11-28 05:01:17,619 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 05:01:17,621 INFO L225 Difference]: With dead ends: 716 [2024-11-28 05:01:17,621 INFO L226 Difference]: Without dead ends: 393 [2024-11-28 05:01:17,621 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-11-28 05:01:17,622 INFO L435 NwaCegarLoop]: 529 mSDtfsCounter, 930 mSDsluCounter, 531 mSDsCounter, 0 mSdLazyCounter, 74 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 930 SdHoareTripleChecker+Valid, 1060 SdHoareTripleChecker+Invalid, 74 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 74 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-28 05:01:17,622 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [930 Valid, 1060 Invalid, 74 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 74 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-28 05:01:17,623 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 393 states. [2024-11-28 05:01:17,635 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 393 to 393. [2024-11-28 05:01:17,636 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 393 states, 388 states have (on average 1.4510309278350515) internal successors, (563), 388 states have internal predecessors, (563), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-28 05:01:17,638 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 393 states to 393 states and 569 transitions. [2024-11-28 05:01:17,638 INFO L78 Accepts]: Start accepts. Automaton has 393 states and 569 transitions. Word has length 130 [2024-11-28 05:01:17,638 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 05:01:17,638 INFO L471 AbstractCegarLoop]: Abstraction has 393 states and 569 transitions. [2024-11-28 05:01:17,639 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 23.6) internal successors, (118), 5 states have internal predecessors, (118), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-28 05:01:17,639 INFO L276 IsEmpty]: Start isEmpty. Operand 393 states and 569 transitions. [2024-11-28 05:01:17,640 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 132 [2024-11-28 05:01:17,640 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 05:01:17,640 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 05:01:17,640 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable13 [2024-11-28 05:01:17,641 INFO L396 AbstractCegarLoop]: === Iteration 15 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 05:01:17,641 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 05:01:17,641 INFO L85 PathProgramCache]: Analyzing trace with hash 1963964559, now seen corresponding path program 1 times [2024-11-28 05:01:17,641 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 05:01:17,641 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1830126449] [2024-11-28 05:01:17,641 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 05:01:17,642 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 05:01:17,795 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 05:01:18,201 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-28 05:01:18,201 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 05:01:18,201 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1830126449] [2024-11-28 05:01:18,201 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1830126449] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 05:01:18,201 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 05:01:18,201 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-28 05:01:18,201 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [78474893] [2024-11-28 05:01:18,201 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 05:01:18,202 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-28 05:01:18,202 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 05:01:18,202 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-28 05:01:18,205 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-28 05:01:18,205 INFO L87 Difference]: Start difference. First operand 393 states and 569 transitions. Second operand has 5 states, 5 states have (on average 23.8) internal successors, (119), 5 states have internal predecessors, (119), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-28 05:01:18,356 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 05:01:18,356 INFO L93 Difference]: Finished difference Result 716 states and 1034 transitions. [2024-11-28 05:01:18,357 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-28 05:01:18,357 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 23.8) internal successors, (119), 5 states have internal predecessors, (119), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 131 [2024-11-28 05:01:18,358 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 05:01:18,359 INFO L225 Difference]: With dead ends: 716 [2024-11-28 05:01:18,359 INFO L226 Difference]: Without dead ends: 393 [2024-11-28 05:01:18,360 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-11-28 05:01:18,360 INFO L435 NwaCegarLoop]: 529 mSDtfsCounter, 466 mSDsluCounter, 538 mSDsCounter, 0 mSdLazyCounter, 72 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 466 SdHoareTripleChecker+Valid, 1067 SdHoareTripleChecker+Invalid, 72 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 72 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-28 05:01:18,361 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [466 Valid, 1067 Invalid, 72 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 72 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-28 05:01:18,362 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 393 states. [2024-11-28 05:01:18,373 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 393 to 393. [2024-11-28 05:01:18,374 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 393 states, 388 states have (on average 1.4484536082474226) internal successors, (562), 388 states have internal predecessors, (562), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-28 05:01:18,376 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 393 states to 393 states and 568 transitions. [2024-11-28 05:01:18,376 INFO L78 Accepts]: Start accepts. Automaton has 393 states and 568 transitions. Word has length 131 [2024-11-28 05:01:18,377 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 05:01:18,377 INFO L471 AbstractCegarLoop]: Abstraction has 393 states and 568 transitions. [2024-11-28 05:01:18,377 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 23.8) internal successors, (119), 5 states have internal predecessors, (119), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-28 05:01:18,377 INFO L276 IsEmpty]: Start isEmpty. Operand 393 states and 568 transitions. [2024-11-28 05:01:18,378 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 133 [2024-11-28 05:01:18,379 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 05:01:18,379 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 05:01:18,379 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable14 [2024-11-28 05:01:18,379 INFO L396 AbstractCegarLoop]: === Iteration 16 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 05:01:18,379 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 05:01:18,380 INFO L85 PathProgramCache]: Analyzing trace with hash -1513937355, now seen corresponding path program 1 times [2024-11-28 05:01:18,380 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 05:01:18,380 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [44029586] [2024-11-28 05:01:18,380 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 05:01:18,380 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 05:01:18,539 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 05:01:18,722 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-28 05:01:18,722 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 05:01:18,722 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [44029586] [2024-11-28 05:01:18,722 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [44029586] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 05:01:18,722 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 05:01:18,722 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-28 05:01:18,723 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [784737532] [2024-11-28 05:01:18,723 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 05:01:18,723 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-28 05:01:18,723 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 05:01:18,724 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-28 05:01:18,724 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-28 05:01:18,724 INFO L87 Difference]: Start difference. First operand 393 states and 568 transitions. Second operand has 4 states, 4 states have (on average 30.0) internal successors, (120), 4 states have internal predecessors, (120), 2 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2024-11-28 05:01:18,808 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 05:01:18,809 INFO L93 Difference]: Finished difference Result 716 states and 1032 transitions. [2024-11-28 05:01:18,810 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-28 05:01:18,810 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 30.0) internal successors, (120), 4 states have internal predecessors, (120), 2 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 132 [2024-11-28 05:01:18,810 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 05:01:18,812 INFO L225 Difference]: With dead ends: 716 [2024-11-28 05:01:18,812 INFO L226 Difference]: Without dead ends: 393 [2024-11-28 05:01:18,813 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-11-28 05:01:18,813 INFO L435 NwaCegarLoop]: 549 mSDtfsCounter, 512 mSDsluCounter, 551 mSDsCounter, 0 mSdLazyCounter, 30 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 514 SdHoareTripleChecker+Valid, 1100 SdHoareTripleChecker+Invalid, 30 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 30 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-28 05:01:18,814 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [514 Valid, 1100 Invalid, 30 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 30 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-28 05:01:18,815 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 393 states. [2024-11-28 05:01:18,825 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 393 to 393. [2024-11-28 05:01:18,826 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 393 states, 388 states have (on average 1.4458762886597938) internal successors, (561), 388 states have internal predecessors, (561), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-28 05:01:18,828 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 393 states to 393 states and 567 transitions. [2024-11-28 05:01:18,828 INFO L78 Accepts]: Start accepts. Automaton has 393 states and 567 transitions. Word has length 132 [2024-11-28 05:01:18,829 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 05:01:18,829 INFO L471 AbstractCegarLoop]: Abstraction has 393 states and 567 transitions. [2024-11-28 05:01:18,829 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 30.0) internal successors, (120), 4 states have internal predecessors, (120), 2 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2024-11-28 05:01:18,829 INFO L276 IsEmpty]: Start isEmpty. Operand 393 states and 567 transitions. [2024-11-28 05:01:18,830 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 134 [2024-11-28 05:01:18,831 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 05:01:18,831 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 05:01:18,831 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable15 [2024-11-28 05:01:18,831 INFO L396 AbstractCegarLoop]: === Iteration 17 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 05:01:18,832 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 05:01:18,832 INFO L85 PathProgramCache]: Analyzing trace with hash -946071650, now seen corresponding path program 1 times [2024-11-28 05:01:18,832 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 05:01:18,832 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1732956347] [2024-11-28 05:01:18,833 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 05:01:18,833 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 05:01:19,027 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 05:01:19,648 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-28 05:01:19,649 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 05:01:19,649 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1732956347] [2024-11-28 05:01:19,649 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1732956347] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 05:01:19,649 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 05:01:19,649 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-28 05:01:19,649 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [694213449] [2024-11-28 05:01:19,649 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 05:01:19,649 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-28 05:01:19,649 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 05:01:19,650 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-28 05:01:19,650 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-11-28 05:01:19,651 INFO L87 Difference]: Start difference. First operand 393 states and 567 transitions. Second operand has 5 states, 5 states have (on average 24.2) internal successors, (121), 5 states have internal predecessors, (121), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-28 05:01:20,118 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 05:01:20,119 INFO L93 Difference]: Finished difference Result 720 states and 1035 transitions. [2024-11-28 05:01:20,119 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-11-28 05:01:20,119 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 24.2) internal successors, (121), 5 states have internal predecessors, (121), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 133 [2024-11-28 05:01:20,120 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 05:01:20,121 INFO L225 Difference]: With dead ends: 720 [2024-11-28 05:01:20,122 INFO L226 Difference]: Without dead ends: 397 [2024-11-28 05:01:20,122 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-11-28 05:01:20,123 INFO L435 NwaCegarLoop]: 414 mSDtfsCounter, 480 mSDsluCounter, 807 mSDsCounter, 0 mSdLazyCounter, 460 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 480 SdHoareTripleChecker+Valid, 1221 SdHoareTripleChecker+Invalid, 460 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 460 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2024-11-28 05:01:20,123 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [480 Valid, 1221 Invalid, 460 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 460 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2024-11-28 05:01:20,124 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 397 states. [2024-11-28 05:01:20,134 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 397 to 396. [2024-11-28 05:01:20,135 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 396 states, 391 states have (on average 1.4424552429667519) internal successors, (564), 391 states have internal predecessors, (564), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-28 05:01:20,137 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 396 states to 396 states and 570 transitions. [2024-11-28 05:01:20,138 INFO L78 Accepts]: Start accepts. Automaton has 396 states and 570 transitions. Word has length 133 [2024-11-28 05:01:20,138 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 05:01:20,138 INFO L471 AbstractCegarLoop]: Abstraction has 396 states and 570 transitions. [2024-11-28 05:01:20,138 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 24.2) internal successors, (121), 5 states have internal predecessors, (121), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-28 05:01:20,138 INFO L276 IsEmpty]: Start isEmpty. Operand 396 states and 570 transitions. [2024-11-28 05:01:20,139 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 135 [2024-11-28 05:01:20,140 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 05:01:20,140 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 05:01:20,140 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable16 [2024-11-28 05:01:20,140 INFO L396 AbstractCegarLoop]: === Iteration 18 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 05:01:20,141 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 05:01:20,141 INFO L85 PathProgramCache]: Analyzing trace with hash -1423363068, now seen corresponding path program 1 times [2024-11-28 05:01:20,141 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 05:01:20,141 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1273222510] [2024-11-28 05:01:20,141 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 05:01:20,141 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 05:01:20,309 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 05:01:21,160 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-28 05:01:21,160 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 05:01:21,160 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1273222510] [2024-11-28 05:01:21,160 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1273222510] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 05:01:21,160 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 05:01:21,161 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-11-28 05:01:21,161 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1554969634] [2024-11-28 05:01:21,161 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 05:01:21,161 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-11-28 05:01:21,161 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 05:01:21,162 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-11-28 05:01:21,162 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2024-11-28 05:01:21,162 INFO L87 Difference]: Start difference. First operand 396 states and 570 transitions. Second operand has 6 states, 6 states have (on average 20.333333333333332) internal successors, (122), 6 states have internal predecessors, (122), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-28 05:01:21,331 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 05:01:21,331 INFO L93 Difference]: Finished difference Result 845 states and 1205 transitions. [2024-11-28 05:01:21,332 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-28 05:01:21,332 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 20.333333333333332) internal successors, (122), 6 states have internal predecessors, (122), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 134 [2024-11-28 05:01:21,333 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 05:01:21,335 INFO L225 Difference]: With dead ends: 845 [2024-11-28 05:01:21,335 INFO L226 Difference]: Without dead ends: 519 [2024-11-28 05:01:21,336 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=23, Invalid=49, Unknown=0, NotChecked=0, Total=72 [2024-11-28 05:01:21,336 INFO L435 NwaCegarLoop]: 551 mSDtfsCounter, 857 mSDsluCounter, 1647 mSDsCounter, 0 mSdLazyCounter, 60 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 860 SdHoareTripleChecker+Valid, 2198 SdHoareTripleChecker+Invalid, 63 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 60 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-28 05:01:21,337 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [860 Valid, 2198 Invalid, 63 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 60 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-28 05:01:21,338 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 519 states. [2024-11-28 05:01:21,357 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 519 to 519. [2024-11-28 05:01:21,358 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 519 states, 511 states have (on average 1.4207436399217221) internal successors, (726), 511 states have internal predecessors, (726), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-11-28 05:01:21,361 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 519 states to 519 states and 738 transitions. [2024-11-28 05:01:21,361 INFO L78 Accepts]: Start accepts. Automaton has 519 states and 738 transitions. Word has length 134 [2024-11-28 05:01:21,361 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 05:01:21,362 INFO L471 AbstractCegarLoop]: Abstraction has 519 states and 738 transitions. [2024-11-28 05:01:21,362 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 20.333333333333332) internal successors, (122), 6 states have internal predecessors, (122), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-28 05:01:21,362 INFO L276 IsEmpty]: Start isEmpty. Operand 519 states and 738 transitions. [2024-11-28 05:01:21,367 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 323 [2024-11-28 05:01:21,367 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 05:01:21,367 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 05:01:21,367 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable17 [2024-11-28 05:01:21,368 INFO L396 AbstractCegarLoop]: === Iteration 19 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 05:01:21,368 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 05:01:21,368 INFO L85 PathProgramCache]: Analyzing trace with hash -1268001746, now seen corresponding path program 1 times [2024-11-28 05:01:21,368 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 05:01:21,368 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [248973560] [2024-11-28 05:01:21,368 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 05:01:21,369 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 05:01:21,645 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 05:01:22,311 INFO L134 CoverageAnalysis]: Checked inductivity of 143 backedges. 83 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-28 05:01:22,312 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 05:01:22,312 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [248973560] [2024-11-28 05:01:22,312 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [248973560] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 05:01:22,312 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 05:01:22,312 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-28 05:01:22,312 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [893548885] [2024-11-28 05:01:22,312 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 05:01:22,313 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-28 05:01:22,314 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 05:01:22,315 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-28 05:01:22,315 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-28 05:01:22,315 INFO L87 Difference]: Start difference. First operand 519 states and 738 transitions. Second operand has 5 states, 5 states have (on average 59.0) internal successors, (295), 5 states have internal predecessors, (295), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-28 05:01:22,438 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 05:01:22,439 INFO L93 Difference]: Finished difference Result 845 states and 1204 transitions. [2024-11-28 05:01:22,439 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-28 05:01:22,440 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 59.0) internal successors, (295), 5 states have internal predecessors, (295), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 322 [2024-11-28 05:01:22,440 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 05:01:22,442 INFO L225 Difference]: With dead ends: 845 [2024-11-28 05:01:22,443 INFO L226 Difference]: Without dead ends: 519 [2024-11-28 05:01:22,443 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-11-28 05:01:22,444 INFO L435 NwaCegarLoop]: 528 mSDtfsCounter, 938 mSDsluCounter, 530 mSDsCounter, 0 mSdLazyCounter, 70 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 941 SdHoareTripleChecker+Valid, 1058 SdHoareTripleChecker+Invalid, 71 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 70 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-28 05:01:22,444 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [941 Valid, 1058 Invalid, 71 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 70 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-28 05:01:22,446 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 519 states. [2024-11-28 05:01:22,466 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 519 to 519. [2024-11-28 05:01:22,467 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 519 states, 511 states have (on average 1.4187866927592956) internal successors, (725), 511 states have internal predecessors, (725), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-11-28 05:01:22,470 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 519 states to 519 states and 737 transitions. [2024-11-28 05:01:22,470 INFO L78 Accepts]: Start accepts. Automaton has 519 states and 737 transitions. Word has length 322 [2024-11-28 05:01:22,470 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 05:01:22,471 INFO L471 AbstractCegarLoop]: Abstraction has 519 states and 737 transitions. [2024-11-28 05:01:22,471 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 59.0) internal successors, (295), 5 states have internal predecessors, (295), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-28 05:01:22,471 INFO L276 IsEmpty]: Start isEmpty. Operand 519 states and 737 transitions. [2024-11-28 05:01:22,476 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 324 [2024-11-28 05:01:22,476 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 05:01:22,477 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 05:01:22,477 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable18 [2024-11-28 05:01:22,477 INFO L396 AbstractCegarLoop]: === Iteration 20 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 05:01:22,478 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 05:01:22,478 INFO L85 PathProgramCache]: Analyzing trace with hash -359755872, now seen corresponding path program 1 times [2024-11-28 05:01:22,478 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 05:01:22,478 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1424977156] [2024-11-28 05:01:22,478 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 05:01:22,478 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 05:01:22,720 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 05:01:23,322 INFO L134 CoverageAnalysis]: Checked inductivity of 143 backedges. 83 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-28 05:01:23,323 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 05:01:23,323 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1424977156] [2024-11-28 05:01:23,323 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1424977156] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 05:01:23,323 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 05:01:23,323 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-28 05:01:23,323 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1297732744] [2024-11-28 05:01:23,324 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 05:01:23,324 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-28 05:01:23,324 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 05:01:23,325 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-28 05:01:23,325 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-28 05:01:23,325 INFO L87 Difference]: Start difference. First operand 519 states and 737 transitions. Second operand has 5 states, 5 states have (on average 59.2) internal successors, (296), 5 states have internal predecessors, (296), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-28 05:01:23,451 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 05:01:23,451 INFO L93 Difference]: Finished difference Result 845 states and 1202 transitions. [2024-11-28 05:01:23,452 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-28 05:01:23,452 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 59.2) internal successors, (296), 5 states have internal predecessors, (296), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 323 [2024-11-28 05:01:23,453 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 05:01:23,455 INFO L225 Difference]: With dead ends: 845 [2024-11-28 05:01:23,455 INFO L226 Difference]: Without dead ends: 519 [2024-11-28 05:01:23,456 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-11-28 05:01:23,459 INFO L435 NwaCegarLoop]: 528 mSDtfsCounter, 507 mSDsluCounter, 537 mSDsCounter, 0 mSdLazyCounter, 68 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 510 SdHoareTripleChecker+Valid, 1065 SdHoareTripleChecker+Invalid, 69 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 68 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-28 05:01:23,459 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [510 Valid, 1065 Invalid, 69 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 68 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-28 05:01:23,460 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 519 states. [2024-11-28 05:01:23,478 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 519 to 519. [2024-11-28 05:01:23,480 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 519 states, 511 states have (on average 1.4168297455968688) internal successors, (724), 511 states have internal predecessors, (724), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-11-28 05:01:23,483 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 519 states to 519 states and 736 transitions. [2024-11-28 05:01:23,483 INFO L78 Accepts]: Start accepts. Automaton has 519 states and 736 transitions. Word has length 323 [2024-11-28 05:01:23,483 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 05:01:23,484 INFO L471 AbstractCegarLoop]: Abstraction has 519 states and 736 transitions. [2024-11-28 05:01:23,484 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 59.2) internal successors, (296), 5 states have internal predecessors, (296), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-28 05:01:23,484 INFO L276 IsEmpty]: Start isEmpty. Operand 519 states and 736 transitions. [2024-11-28 05:01:23,488 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 325 [2024-11-28 05:01:23,489 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 05:01:23,489 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 05:01:23,489 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable19 [2024-11-28 05:01:23,489 INFO L396 AbstractCegarLoop]: === Iteration 21 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 05:01:23,490 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 05:01:23,490 INFO L85 PathProgramCache]: Analyzing trace with hash 367336281, now seen corresponding path program 1 times [2024-11-28 05:01:23,490 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 05:01:23,490 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [284135806] [2024-11-28 05:01:23,490 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 05:01:23,490 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 05:01:23,765 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 05:01:24,303 INFO L134 CoverageAnalysis]: Checked inductivity of 143 backedges. 83 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-28 05:01:24,304 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 05:01:24,305 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [284135806] [2024-11-28 05:01:24,305 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [284135806] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 05:01:24,305 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 05:01:24,305 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-28 05:01:24,305 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [392990022] [2024-11-28 05:01:24,305 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 05:01:24,307 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-28 05:01:24,307 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 05:01:24,308 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-28 05:01:24,308 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-28 05:01:24,308 INFO L87 Difference]: Start difference. First operand 519 states and 736 transitions. Second operand has 5 states, 5 states have (on average 59.4) internal successors, (297), 5 states have internal predecessors, (297), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-28 05:01:24,434 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 05:01:24,435 INFO L93 Difference]: Finished difference Result 845 states and 1200 transitions. [2024-11-28 05:01:24,435 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-28 05:01:24,435 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 59.4) internal successors, (297), 5 states have internal predecessors, (297), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 324 [2024-11-28 05:01:24,436 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 05:01:24,438 INFO L225 Difference]: With dead ends: 845 [2024-11-28 05:01:24,438 INFO L226 Difference]: Without dead ends: 519 [2024-11-28 05:01:24,439 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-11-28 05:01:24,439 INFO L435 NwaCegarLoop]: 528 mSDtfsCounter, 499 mSDsluCounter, 537 mSDsCounter, 0 mSdLazyCounter, 66 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 502 SdHoareTripleChecker+Valid, 1065 SdHoareTripleChecker+Invalid, 67 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 66 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-28 05:01:24,439 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [502 Valid, 1065 Invalid, 67 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 66 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-28 05:01:24,442 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 519 states. [2024-11-28 05:01:24,459 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 519 to 519. [2024-11-28 05:01:24,460 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 519 states, 511 states have (on average 1.4148727984344422) internal successors, (723), 511 states have internal predecessors, (723), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-11-28 05:01:24,463 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 519 states to 519 states and 735 transitions. [2024-11-28 05:01:24,463 INFO L78 Accepts]: Start accepts. Automaton has 519 states and 735 transitions. Word has length 324 [2024-11-28 05:01:24,464 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 05:01:24,465 INFO L471 AbstractCegarLoop]: Abstraction has 519 states and 735 transitions. [2024-11-28 05:01:24,465 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 59.4) internal successors, (297), 5 states have internal predecessors, (297), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-28 05:01:24,465 INFO L276 IsEmpty]: Start isEmpty. Operand 519 states and 735 transitions. [2024-11-28 05:01:24,469 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 326 [2024-11-28 05:01:24,469 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 05:01:24,470 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 05:01:24,470 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable20 [2024-11-28 05:01:24,470 INFO L396 AbstractCegarLoop]: === Iteration 22 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 05:01:24,472 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 05:01:24,472 INFO L85 PathProgramCache]: Analyzing trace with hash 56994795, now seen corresponding path program 1 times [2024-11-28 05:01:24,472 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 05:01:24,472 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [624710957] [2024-11-28 05:01:24,472 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 05:01:24,472 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 05:01:24,756 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 05:01:25,393 INFO L134 CoverageAnalysis]: Checked inductivity of 143 backedges. 83 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-28 05:01:25,393 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 05:01:25,393 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [624710957] [2024-11-28 05:01:25,393 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [624710957] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 05:01:25,393 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 05:01:25,393 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-28 05:01:25,393 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1145251804] [2024-11-28 05:01:25,394 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 05:01:25,394 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-28 05:01:25,394 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 05:01:25,395 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-28 05:01:25,395 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-28 05:01:25,395 INFO L87 Difference]: Start difference. First operand 519 states and 735 transitions. Second operand has 5 states, 5 states have (on average 59.6) internal successors, (298), 5 states have internal predecessors, (298), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-28 05:01:25,529 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 05:01:25,530 INFO L93 Difference]: Finished difference Result 845 states and 1198 transitions. [2024-11-28 05:01:25,533 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-28 05:01:25,533 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 59.6) internal successors, (298), 5 states have internal predecessors, (298), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 325 [2024-11-28 05:01:25,534 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 05:01:25,536 INFO L225 Difference]: With dead ends: 845 [2024-11-28 05:01:25,536 INFO L226 Difference]: Without dead ends: 519 [2024-11-28 05:01:25,537 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-11-28 05:01:25,538 INFO L435 NwaCegarLoop]: 528 mSDtfsCounter, 491 mSDsluCounter, 537 mSDsCounter, 0 mSdLazyCounter, 64 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 494 SdHoareTripleChecker+Valid, 1065 SdHoareTripleChecker+Invalid, 65 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 64 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-28 05:01:25,538 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [494 Valid, 1065 Invalid, 65 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 64 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-28 05:01:25,539 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 519 states. [2024-11-28 05:01:25,556 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 519 to 519. [2024-11-28 05:01:25,558 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 519 states, 511 states have (on average 1.4129158512720157) internal successors, (722), 511 states have internal predecessors, (722), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-11-28 05:01:25,561 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 519 states to 519 states and 734 transitions. [2024-11-28 05:01:25,562 INFO L78 Accepts]: Start accepts. Automaton has 519 states and 734 transitions. Word has length 325 [2024-11-28 05:01:25,562 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 05:01:25,562 INFO L471 AbstractCegarLoop]: Abstraction has 519 states and 734 transitions. [2024-11-28 05:01:25,563 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 59.6) internal successors, (298), 5 states have internal predecessors, (298), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-28 05:01:25,563 INFO L276 IsEmpty]: Start isEmpty. Operand 519 states and 734 transitions. [2024-11-28 05:01:25,567 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 327 [2024-11-28 05:01:25,568 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 05:01:25,568 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 05:01:25,568 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable21 [2024-11-28 05:01:25,568 INFO L396 AbstractCegarLoop]: === Iteration 23 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 05:01:25,569 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 05:01:25,569 INFO L85 PathProgramCache]: Analyzing trace with hash -1111568636, now seen corresponding path program 1 times [2024-11-28 05:01:25,569 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 05:01:25,569 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [316148333] [2024-11-28 05:01:25,569 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 05:01:25,569 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 05:01:25,939 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 05:01:26,624 INFO L134 CoverageAnalysis]: Checked inductivity of 143 backedges. 83 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-28 05:01:26,624 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 05:01:26,624 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [316148333] [2024-11-28 05:01:26,625 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [316148333] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 05:01:26,625 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 05:01:26,625 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-28 05:01:26,625 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2143168361] [2024-11-28 05:01:26,625 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 05:01:26,625 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-28 05:01:26,625 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 05:01:26,626 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-28 05:01:26,629 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-28 05:01:26,630 INFO L87 Difference]: Start difference. First operand 519 states and 734 transitions. Second operand has 5 states, 5 states have (on average 59.8) internal successors, (299), 5 states have internal predecessors, (299), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-28 05:01:26,718 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 05:01:26,718 INFO L93 Difference]: Finished difference Result 845 states and 1196 transitions. [2024-11-28 05:01:26,718 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-28 05:01:26,719 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 59.8) internal successors, (299), 5 states have internal predecessors, (299), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 326 [2024-11-28 05:01:26,719 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 05:01:26,721 INFO L225 Difference]: With dead ends: 845 [2024-11-28 05:01:26,722 INFO L226 Difference]: Without dead ends: 519 [2024-11-28 05:01:26,722 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-11-28 05:01:26,723 INFO L435 NwaCegarLoop]: 540 mSDtfsCounter, 476 mSDsluCounter, 549 mSDsCounter, 0 mSdLazyCounter, 38 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 479 SdHoareTripleChecker+Valid, 1089 SdHoareTripleChecker+Invalid, 39 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 38 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-28 05:01:26,723 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [479 Valid, 1089 Invalid, 39 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 38 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-28 05:01:26,724 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 519 states. [2024-11-28 05:01:26,741 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 519 to 519. [2024-11-28 05:01:26,742 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 519 states, 511 states have (on average 1.4109589041095891) internal successors, (721), 511 states have internal predecessors, (721), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-11-28 05:01:26,744 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 519 states to 519 states and 733 transitions. [2024-11-28 05:01:26,745 INFO L78 Accepts]: Start accepts. Automaton has 519 states and 733 transitions. Word has length 326 [2024-11-28 05:01:26,745 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 05:01:26,745 INFO L471 AbstractCegarLoop]: Abstraction has 519 states and 733 transitions. [2024-11-28 05:01:26,746 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 59.8) internal successors, (299), 5 states have internal predecessors, (299), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-28 05:01:26,746 INFO L276 IsEmpty]: Start isEmpty. Operand 519 states and 733 transitions. [2024-11-28 05:01:26,750 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 328 [2024-11-28 05:01:26,750 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 05:01:26,750 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 05:01:26,751 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable22 [2024-11-28 05:01:26,751 INFO L396 AbstractCegarLoop]: === Iteration 24 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 05:01:26,751 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 05:01:26,751 INFO L85 PathProgramCache]: Analyzing trace with hash -1755980618, now seen corresponding path program 1 times [2024-11-28 05:01:26,751 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 05:01:26,752 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [948325773] [2024-11-28 05:01:26,752 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 05:01:26,752 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 05:01:27,025 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 05:01:27,718 INFO L134 CoverageAnalysis]: Checked inductivity of 143 backedges. 83 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-28 05:01:27,718 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 05:01:27,718 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [948325773] [2024-11-28 05:01:27,718 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [948325773] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 05:01:27,718 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 05:01:27,719 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-28 05:01:27,719 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [862279106] [2024-11-28 05:01:27,719 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 05:01:27,719 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-28 05:01:27,719 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 05:01:27,720 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-28 05:01:27,720 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-28 05:01:27,721 INFO L87 Difference]: Start difference. First operand 519 states and 733 transitions. Second operand has 5 states, 5 states have (on average 60.0) internal successors, (300), 5 states have internal predecessors, (300), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-28 05:01:27,810 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 05:01:27,811 INFO L93 Difference]: Finished difference Result 845 states and 1194 transitions. [2024-11-28 05:01:27,811 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-28 05:01:27,811 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 60.0) internal successors, (300), 5 states have internal predecessors, (300), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 327 [2024-11-28 05:01:27,812 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 05:01:27,814 INFO L225 Difference]: With dead ends: 845 [2024-11-28 05:01:27,814 INFO L226 Difference]: Without dead ends: 519 [2024-11-28 05:01:27,815 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-11-28 05:01:27,815 INFO L435 NwaCegarLoop]: 540 mSDtfsCounter, 851 mSDsluCounter, 542 mSDsCounter, 0 mSdLazyCounter, 36 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 854 SdHoareTripleChecker+Valid, 1082 SdHoareTripleChecker+Invalid, 37 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 36 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-28 05:01:27,816 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [854 Valid, 1082 Invalid, 37 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 36 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-28 05:01:27,817 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 519 states. [2024-11-28 05:01:27,833 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 519 to 519. [2024-11-28 05:01:27,835 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 519 states, 511 states have (on average 1.4090019569471623) internal successors, (720), 511 states have internal predecessors, (720), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-11-28 05:01:27,839 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 519 states to 519 states and 732 transitions. [2024-11-28 05:01:27,840 INFO L78 Accepts]: Start accepts. Automaton has 519 states and 732 transitions. Word has length 327 [2024-11-28 05:01:27,841 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 05:01:27,841 INFO L471 AbstractCegarLoop]: Abstraction has 519 states and 732 transitions. [2024-11-28 05:01:27,841 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 60.0) internal successors, (300), 5 states have internal predecessors, (300), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-28 05:01:27,841 INFO L276 IsEmpty]: Start isEmpty. Operand 519 states and 732 transitions. [2024-11-28 05:01:27,845 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 329 [2024-11-28 05:01:27,846 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 05:01:27,846 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 05:01:27,846 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable23 [2024-11-28 05:01:27,847 INFO L396 AbstractCegarLoop]: === Iteration 25 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 05:01:27,847 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 05:01:27,848 INFO L85 PathProgramCache]: Analyzing trace with hash -82399441, now seen corresponding path program 1 times [2024-11-28 05:01:27,848 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 05:01:27,848 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1825837625] [2024-11-28 05:01:27,848 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 05:01:27,848 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 05:01:28,135 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 05:01:28,739 INFO L134 CoverageAnalysis]: Checked inductivity of 143 backedges. 83 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-28 05:01:28,739 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 05:01:28,739 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1825837625] [2024-11-28 05:01:28,739 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1825837625] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 05:01:28,739 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 05:01:28,739 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-28 05:01:28,739 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [462025069] [2024-11-28 05:01:28,740 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 05:01:28,740 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-28 05:01:28,740 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 05:01:28,741 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-28 05:01:28,742 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-28 05:01:28,742 INFO L87 Difference]: Start difference. First operand 519 states and 732 transitions. Second operand has 5 states, 5 states have (on average 60.2) internal successors, (301), 5 states have internal predecessors, (301), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-28 05:01:29,157 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 05:01:29,157 INFO L93 Difference]: Finished difference Result 845 states and 1192 transitions. [2024-11-28 05:01:29,158 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-28 05:01:29,158 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 60.2) internal successors, (301), 5 states have internal predecessors, (301), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 328 [2024-11-28 05:01:29,159 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 05:01:29,161 INFO L225 Difference]: With dead ends: 845 [2024-11-28 05:01:29,161 INFO L226 Difference]: Without dead ends: 519 [2024-11-28 05:01:29,162 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-11-28 05:01:29,163 INFO L435 NwaCegarLoop]: 401 mSDtfsCounter, 828 mSDsluCounter, 403 mSDsCounter, 0 mSdLazyCounter, 312 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 831 SdHoareTripleChecker+Valid, 804 SdHoareTripleChecker+Invalid, 313 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 312 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2024-11-28 05:01:29,164 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [831 Valid, 804 Invalid, 313 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 312 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2024-11-28 05:01:29,165 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 519 states. [2024-11-28 05:01:29,184 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 519 to 519. [2024-11-28 05:01:29,188 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 519 states, 511 states have (on average 1.4070450097847358) internal successors, (719), 511 states have internal predecessors, (719), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-11-28 05:01:29,191 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 519 states to 519 states and 731 transitions. [2024-11-28 05:01:29,191 INFO L78 Accepts]: Start accepts. Automaton has 519 states and 731 transitions. Word has length 328 [2024-11-28 05:01:29,192 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 05:01:29,192 INFO L471 AbstractCegarLoop]: Abstraction has 519 states and 731 transitions. [2024-11-28 05:01:29,194 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 60.2) internal successors, (301), 5 states have internal predecessors, (301), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-28 05:01:29,194 INFO L276 IsEmpty]: Start isEmpty. Operand 519 states and 731 transitions. [2024-11-28 05:01:29,199 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 330 [2024-11-28 05:01:29,199 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 05:01:29,199 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 05:01:29,199 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable24 [2024-11-28 05:01:29,200 INFO L396 AbstractCegarLoop]: === Iteration 26 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 05:01:29,200 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 05:01:29,200 INFO L85 PathProgramCache]: Analyzing trace with hash -1868897791, now seen corresponding path program 1 times [2024-11-28 05:01:29,200 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 05:01:29,200 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1132627495] [2024-11-28 05:01:29,201 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 05:01:29,201 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 05:01:29,953 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 05:01:30,799 INFO L134 CoverageAnalysis]: Checked inductivity of 143 backedges. 83 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-28 05:01:30,800 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 05:01:30,800 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1132627495] [2024-11-28 05:01:30,800 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1132627495] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 05:01:30,800 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 05:01:30,800 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-28 05:01:30,801 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [980280949] [2024-11-28 05:01:30,801 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 05:01:30,801 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-28 05:01:30,802 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 05:01:30,802 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-28 05:01:30,803 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-28 05:01:30,804 INFO L87 Difference]: Start difference. First operand 519 states and 731 transitions. Second operand has 4 states, 4 states have (on average 75.5) internal successors, (302), 4 states have internal predecessors, (302), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-28 05:01:30,886 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 05:01:30,886 INFO L93 Difference]: Finished difference Result 845 states and 1190 transitions. [2024-11-28 05:01:30,886 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-28 05:01:30,887 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 75.5) internal successors, (302), 4 states have internal predecessors, (302), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 329 [2024-11-28 05:01:30,887 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 05:01:30,889 INFO L225 Difference]: With dead ends: 845 [2024-11-28 05:01:30,889 INFO L226 Difference]: Without dead ends: 519 [2024-11-28 05:01:30,890 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-11-28 05:01:30,890 INFO L435 NwaCegarLoop]: 539 mSDtfsCounter, 382 mSDsluCounter, 541 mSDsCounter, 0 mSdLazyCounter, 34 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 382 SdHoareTripleChecker+Valid, 1080 SdHoareTripleChecker+Invalid, 34 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 34 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-28 05:01:30,891 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [382 Valid, 1080 Invalid, 34 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 34 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-28 05:01:30,892 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 519 states. [2024-11-28 05:01:30,907 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 519 to 519. [2024-11-28 05:01:30,908 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 519 states, 511 states have (on average 1.4050880626223092) internal successors, (718), 511 states have internal predecessors, (718), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-11-28 05:01:30,910 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 519 states to 519 states and 730 transitions. [2024-11-28 05:01:30,911 INFO L78 Accepts]: Start accepts. Automaton has 519 states and 730 transitions. Word has length 329 [2024-11-28 05:01:30,911 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 05:01:30,911 INFO L471 AbstractCegarLoop]: Abstraction has 519 states and 730 transitions. [2024-11-28 05:01:30,912 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 75.5) internal successors, (302), 4 states have internal predecessors, (302), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-28 05:01:30,912 INFO L276 IsEmpty]: Start isEmpty. Operand 519 states and 730 transitions. [2024-11-28 05:01:30,916 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 331 [2024-11-28 05:01:30,916 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 05:01:30,916 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 05:01:30,917 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable25 [2024-11-28 05:01:30,917 INFO L396 AbstractCegarLoop]: === Iteration 27 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 05:01:30,917 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 05:01:30,917 INFO L85 PathProgramCache]: Analyzing trace with hash -1273434243, now seen corresponding path program 1 times [2024-11-28 05:01:30,918 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 05:01:30,918 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1284969949] [2024-11-28 05:01:30,918 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 05:01:30,918 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 05:01:31,460 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 05:01:32,194 INFO L134 CoverageAnalysis]: Checked inductivity of 143 backedges. 83 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-28 05:01:32,195 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 05:01:32,195 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1284969949] [2024-11-28 05:01:32,195 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1284969949] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 05:01:32,195 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 05:01:32,195 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-28 05:01:32,195 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [280553060] [2024-11-28 05:01:32,195 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 05:01:32,196 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-28 05:01:32,196 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 05:01:32,197 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-28 05:01:32,197 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-28 05:01:32,197 INFO L87 Difference]: Start difference. First operand 519 states and 730 transitions. Second operand has 5 states, 5 states have (on average 60.6) internal successors, (303), 5 states have internal predecessors, (303), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-28 05:01:32,343 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 05:01:32,343 INFO L93 Difference]: Finished difference Result 845 states and 1188 transitions. [2024-11-28 05:01:32,344 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-28 05:01:32,344 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 60.6) internal successors, (303), 5 states have internal predecessors, (303), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 330 [2024-11-28 05:01:32,344 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 05:01:32,346 INFO L225 Difference]: With dead ends: 845 [2024-11-28 05:01:32,347 INFO L226 Difference]: Without dead ends: 519 [2024-11-28 05:01:32,347 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-11-28 05:01:32,348 INFO L435 NwaCegarLoop]: 524 mSDtfsCounter, 454 mSDsluCounter, 533 mSDsCounter, 0 mSdLazyCounter, 62 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 454 SdHoareTripleChecker+Valid, 1057 SdHoareTripleChecker+Invalid, 62 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 62 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-28 05:01:32,349 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [454 Valid, 1057 Invalid, 62 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 62 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-28 05:01:32,351 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 519 states. [2024-11-28 05:01:32,370 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 519 to 519. [2024-11-28 05:01:32,371 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 519 states, 511 states have (on average 1.4031311154598827) internal successors, (717), 511 states have internal predecessors, (717), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-11-28 05:01:32,374 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 519 states to 519 states and 729 transitions. [2024-11-28 05:01:32,374 INFO L78 Accepts]: Start accepts. Automaton has 519 states and 729 transitions. Word has length 330 [2024-11-28 05:01:32,375 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 05:01:32,375 INFO L471 AbstractCegarLoop]: Abstraction has 519 states and 729 transitions. [2024-11-28 05:01:32,375 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 60.6) internal successors, (303), 5 states have internal predecessors, (303), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-28 05:01:32,375 INFO L276 IsEmpty]: Start isEmpty. Operand 519 states and 729 transitions. [2024-11-28 05:01:32,380 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 332 [2024-11-28 05:01:32,380 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 05:01:32,381 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 05:01:32,381 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable26 [2024-11-28 05:01:32,381 INFO L396 AbstractCegarLoop]: === Iteration 28 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 05:01:32,381 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 05:01:32,382 INFO L85 PathProgramCache]: Analyzing trace with hash -951941311, now seen corresponding path program 1 times [2024-11-28 05:01:32,382 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 05:01:32,382 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [597108327] [2024-11-28 05:01:32,382 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 05:01:32,382 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 05:01:32,949 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 05:01:33,642 INFO L134 CoverageAnalysis]: Checked inductivity of 143 backedges. 83 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-28 05:01:33,643 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 05:01:33,643 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [597108327] [2024-11-28 05:01:33,643 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [597108327] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 05:01:33,643 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 05:01:33,643 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-28 05:01:33,643 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1240415448] [2024-11-28 05:01:33,643 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 05:01:33,645 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-28 05:01:33,645 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 05:01:33,646 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-28 05:01:33,646 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-28 05:01:33,646 INFO L87 Difference]: Start difference. First operand 519 states and 729 transitions. Second operand has 5 states, 5 states have (on average 60.8) internal successors, (304), 5 states have internal predecessors, (304), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-28 05:01:33,777 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 05:01:33,777 INFO L93 Difference]: Finished difference Result 845 states and 1186 transitions. [2024-11-28 05:01:33,778 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-28 05:01:33,778 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 60.8) internal successors, (304), 5 states have internal predecessors, (304), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 331 [2024-11-28 05:01:33,779 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 05:01:33,780 INFO L225 Difference]: With dead ends: 845 [2024-11-28 05:01:33,781 INFO L226 Difference]: Without dead ends: 519 [2024-11-28 05:01:33,781 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-11-28 05:01:33,782 INFO L435 NwaCegarLoop]: 524 mSDtfsCounter, 453 mSDsluCounter, 533 mSDsCounter, 0 mSdLazyCounter, 60 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 453 SdHoareTripleChecker+Valid, 1057 SdHoareTripleChecker+Invalid, 60 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 60 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-28 05:01:33,783 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [453 Valid, 1057 Invalid, 60 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 60 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-28 05:01:33,784 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 519 states. [2024-11-28 05:01:33,801 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 519 to 519. [2024-11-28 05:01:33,802 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 519 states, 511 states have (on average 1.401174168297456) internal successors, (716), 511 states have internal predecessors, (716), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-11-28 05:01:33,804 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 519 states to 519 states and 728 transitions. [2024-11-28 05:01:33,804 INFO L78 Accepts]: Start accepts. Automaton has 519 states and 728 transitions. Word has length 331 [2024-11-28 05:01:33,805 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 05:01:33,805 INFO L471 AbstractCegarLoop]: Abstraction has 519 states and 728 transitions. [2024-11-28 05:01:33,805 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 60.8) internal successors, (304), 5 states have internal predecessors, (304), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-28 05:01:33,805 INFO L276 IsEmpty]: Start isEmpty. Operand 519 states and 728 transitions. [2024-11-28 05:01:33,810 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 333 [2024-11-28 05:01:33,810 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 05:01:33,811 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 05:01:33,811 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable27 [2024-11-28 05:01:33,811 INFO L396 AbstractCegarLoop]: === Iteration 29 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 05:01:33,811 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 05:01:33,811 INFO L85 PathProgramCache]: Analyzing trace with hash 139590734, now seen corresponding path program 1 times [2024-11-28 05:01:33,812 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 05:01:33,812 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1118905446] [2024-11-28 05:01:33,812 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 05:01:33,812 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 05:01:34,354 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 05:01:35,186 INFO L134 CoverageAnalysis]: Checked inductivity of 143 backedges. 83 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-28 05:01:35,186 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 05:01:35,186 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1118905446] [2024-11-28 05:01:35,186 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1118905446] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 05:01:35,186 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 05:01:35,186 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-28 05:01:35,187 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [952163823] [2024-11-28 05:01:35,187 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 05:01:35,187 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-28 05:01:35,187 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 05:01:35,189 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-28 05:01:35,189 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-28 05:01:35,189 INFO L87 Difference]: Start difference. First operand 519 states and 728 transitions. Second operand has 5 states, 5 states have (on average 61.0) internal successors, (305), 5 states have internal predecessors, (305), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-28 05:01:35,327 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 05:01:35,327 INFO L93 Difference]: Finished difference Result 845 states and 1184 transitions. [2024-11-28 05:01:35,328 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-28 05:01:35,328 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 61.0) internal successors, (305), 5 states have internal predecessors, (305), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 332 [2024-11-28 05:01:35,329 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 05:01:35,331 INFO L225 Difference]: With dead ends: 845 [2024-11-28 05:01:35,331 INFO L226 Difference]: Without dead ends: 519 [2024-11-28 05:01:35,332 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-11-28 05:01:35,333 INFO L435 NwaCegarLoop]: 524 mSDtfsCounter, 842 mSDsluCounter, 526 mSDsCounter, 0 mSdLazyCounter, 58 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 842 SdHoareTripleChecker+Valid, 1050 SdHoareTripleChecker+Invalid, 58 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 58 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-28 05:01:35,334 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [842 Valid, 1050 Invalid, 58 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 58 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-28 05:01:35,338 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 519 states. [2024-11-28 05:01:35,352 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 519 to 519. [2024-11-28 05:01:35,353 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 519 states, 511 states have (on average 1.3992172211350293) internal successors, (715), 511 states have internal predecessors, (715), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-11-28 05:01:35,355 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 519 states to 519 states and 727 transitions. [2024-11-28 05:01:35,355 INFO L78 Accepts]: Start accepts. Automaton has 519 states and 727 transitions. Word has length 332 [2024-11-28 05:01:35,356 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 05:01:35,356 INFO L471 AbstractCegarLoop]: Abstraction has 519 states and 727 transitions. [2024-11-28 05:01:35,356 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 61.0) internal successors, (305), 5 states have internal predecessors, (305), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-28 05:01:35,356 INFO L276 IsEmpty]: Start isEmpty. Operand 519 states and 727 transitions. [2024-11-28 05:01:35,359 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 334 [2024-11-28 05:01:35,359 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 05:01:35,359 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 05:01:35,359 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable28 [2024-11-28 05:01:35,359 INFO L396 AbstractCegarLoop]: === Iteration 30 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 05:01:35,360 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 05:01:35,360 INFO L85 PathProgramCache]: Analyzing trace with hash -745808464, now seen corresponding path program 1 times [2024-11-28 05:01:35,360 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 05:01:35,360 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2142943695] [2024-11-28 05:01:35,360 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 05:01:35,361 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 05:01:36,178 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 05:01:37,305 INFO L134 CoverageAnalysis]: Checked inductivity of 143 backedges. 77 proven. 0 refuted. 0 times theorem prover too weak. 66 trivial. 0 not checked. [2024-11-28 05:01:37,305 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 05:01:37,305 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2142943695] [2024-11-28 05:01:37,306 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2142943695] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 05:01:37,306 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 05:01:37,306 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-28 05:01:37,306 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1786058273] [2024-11-28 05:01:37,306 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 05:01:37,307 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-28 05:01:37,307 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 05:01:37,308 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-28 05:01:37,308 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-11-28 05:01:37,308 INFO L87 Difference]: Start difference. First operand 519 states and 727 transitions. Second operand has 5 states, 5 states have (on average 60.6) internal successors, (303), 5 states have internal predecessors, (303), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-28 05:01:37,370 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 05:01:37,370 INFO L93 Difference]: Finished difference Result 941 states and 1298 transitions. [2024-11-28 05:01:37,371 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-11-28 05:01:37,371 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 60.6) internal successors, (303), 5 states have internal predecessors, (303), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 333 [2024-11-28 05:01:37,372 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 05:01:37,375 INFO L225 Difference]: With dead ends: 941 [2024-11-28 05:01:37,375 INFO L226 Difference]: Without dead ends: 613 [2024-11-28 05:01:37,375 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-11-28 05:01:37,376 INFO L435 NwaCegarLoop]: 546 mSDtfsCounter, 17 mSDsluCounter, 1629 mSDsCounter, 0 mSdLazyCounter, 32 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 17 SdHoareTripleChecker+Valid, 2175 SdHoareTripleChecker+Invalid, 32 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 32 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-28 05:01:37,376 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [17 Valid, 2175 Invalid, 32 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 32 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-28 05:01:37,378 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 613 states. [2024-11-28 05:01:37,394 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 613 to 609. [2024-11-28 05:01:37,395 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 609 states, 601 states have (on average 1.3660565723793676) internal successors, (821), 601 states have internal predecessors, (821), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-11-28 05:01:37,397 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 609 states to 609 states and 833 transitions. [2024-11-28 05:01:37,398 INFO L78 Accepts]: Start accepts. Automaton has 609 states and 833 transitions. Word has length 333 [2024-11-28 05:01:37,398 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 05:01:37,398 INFO L471 AbstractCegarLoop]: Abstraction has 609 states and 833 transitions. [2024-11-28 05:01:37,398 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 60.6) internal successors, (303), 5 states have internal predecessors, (303), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-28 05:01:37,399 INFO L276 IsEmpty]: Start isEmpty. Operand 609 states and 833 transitions. [2024-11-28 05:01:37,401 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 336 [2024-11-28 05:01:37,401 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 05:01:37,401 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 05:01:37,401 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable29 [2024-11-28 05:01:37,402 INFO L396 AbstractCegarLoop]: === Iteration 31 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 05:01:37,402 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 05:01:37,402 INFO L85 PathProgramCache]: Analyzing trace with hash 1591163324, now seen corresponding path program 1 times [2024-11-28 05:01:37,402 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 05:01:37,402 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [750448084] [2024-11-28 05:01:37,403 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 05:01:37,403 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 05:01:38,263 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 05:01:38,845 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 84 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-28 05:01:38,845 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 05:01:38,846 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [750448084] [2024-11-28 05:01:38,846 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [750448084] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 05:01:38,846 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 05:01:38,846 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-11-28 05:01:38,846 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1366803810] [2024-11-28 05:01:38,846 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 05:01:38,847 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-11-28 05:01:38,847 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 05:01:38,848 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-11-28 05:01:38,848 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2024-11-28 05:01:38,850 INFO L87 Difference]: Start difference. First operand 609 states and 833 transitions. Second operand has 6 states, 6 states have (on average 51.333333333333336) internal successors, (308), 6 states have internal predecessors, (308), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-28 05:01:39,515 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 05:01:39,515 INFO L93 Difference]: Finished difference Result 1423 states and 1954 transitions. [2024-11-28 05:01:39,515 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-28 05:01:39,516 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 51.333333333333336) internal successors, (308), 6 states have internal predecessors, (308), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 335 [2024-11-28 05:01:39,516 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 05:01:39,520 INFO L225 Difference]: With dead ends: 1423 [2024-11-28 05:01:39,520 INFO L226 Difference]: Without dead ends: 1052 [2024-11-28 05:01:39,521 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2024-11-28 05:01:39,524 INFO L435 NwaCegarLoop]: 544 mSDtfsCounter, 348 mSDsluCounter, 1977 mSDsCounter, 0 mSdLazyCounter, 607 mSolverCounterSat, 8 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 351 SdHoareTripleChecker+Valid, 2521 SdHoareTripleChecker+Invalid, 615 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 8 IncrementalHoareTripleChecker+Valid, 607 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2024-11-28 05:01:39,525 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [351 Valid, 2521 Invalid, 615 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [8 Valid, 607 Invalid, 0 Unknown, 0 Unchecked, 0.6s Time] [2024-11-28 05:01:39,527 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1052 states. [2024-11-28 05:01:39,557 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1052 to 936. [2024-11-28 05:01:39,558 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 936 states, 925 states have (on average 1.3621621621621622) internal successors, (1260), 925 states have internal predecessors, (1260), 9 states have call successors, (9), 1 states have call predecessors, (9), 1 states have return successors, (9), 9 states have call predecessors, (9), 9 states have call successors, (9) [2024-11-28 05:01:39,562 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 936 states to 936 states and 1278 transitions. [2024-11-28 05:01:39,562 INFO L78 Accepts]: Start accepts. Automaton has 936 states and 1278 transitions. Word has length 335 [2024-11-28 05:01:39,563 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 05:01:39,564 INFO L471 AbstractCegarLoop]: Abstraction has 936 states and 1278 transitions. [2024-11-28 05:01:39,564 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 51.333333333333336) internal successors, (308), 6 states have internal predecessors, (308), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-28 05:01:39,564 INFO L276 IsEmpty]: Start isEmpty. Operand 936 states and 1278 transitions. [2024-11-28 05:01:39,567 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 337 [2024-11-28 05:01:39,567 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 05:01:39,568 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 05:01:39,568 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable30 [2024-11-28 05:01:39,568 INFO L396 AbstractCegarLoop]: === Iteration 32 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 05:01:39,568 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 05:01:39,569 INFO L85 PathProgramCache]: Analyzing trace with hash 1614923872, now seen corresponding path program 1 times [2024-11-28 05:01:39,569 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 05:01:39,569 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [11605141] [2024-11-28 05:01:39,569 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 05:01:39,569 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 05:01:40,397 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 05:01:41,299 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 84 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-28 05:01:41,299 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 05:01:41,299 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [11605141] [2024-11-28 05:01:41,299 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [11605141] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 05:01:41,299 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 05:01:41,300 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-11-28 05:01:41,300 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2000296959] [2024-11-28 05:01:41,300 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 05:01:41,301 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-11-28 05:01:41,302 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 05:01:41,303 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-11-28 05:01:41,303 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2024-11-28 05:01:41,303 INFO L87 Difference]: Start difference. First operand 936 states and 1278 transitions. Second operand has 6 states, 6 states have (on average 51.5) internal successors, (309), 6 states have internal predecessors, (309), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-28 05:01:42,009 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 05:01:42,009 INFO L93 Difference]: Finished difference Result 1330 states and 1820 transitions. [2024-11-28 05:01:42,009 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-28 05:01:42,010 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 51.5) internal successors, (309), 6 states have internal predecessors, (309), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 336 [2024-11-28 05:01:42,010 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 05:01:42,014 INFO L225 Difference]: With dead ends: 1330 [2024-11-28 05:01:42,014 INFO L226 Difference]: Without dead ends: 959 [2024-11-28 05:01:42,015 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2024-11-28 05:01:42,016 INFO L435 NwaCegarLoop]: 398 mSDtfsCounter, 766 mSDsluCounter, 1185 mSDsCounter, 0 mSdLazyCounter, 631 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 769 SdHoareTripleChecker+Valid, 1583 SdHoareTripleChecker+Invalid, 631 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 631 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2024-11-28 05:01:42,016 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [769 Valid, 1583 Invalid, 631 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 631 Invalid, 0 Unknown, 0 Unchecked, 0.6s Time] [2024-11-28 05:01:42,021 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 959 states. [2024-11-28 05:01:42,059 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 959 to 937. [2024-11-28 05:01:42,062 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 937 states, 926 states have (on average 1.3617710583153348) internal successors, (1261), 926 states have internal predecessors, (1261), 9 states have call successors, (9), 1 states have call predecessors, (9), 1 states have return successors, (9), 9 states have call predecessors, (9), 9 states have call successors, (9) [2024-11-28 05:01:42,066 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 937 states to 937 states and 1279 transitions. [2024-11-28 05:01:42,067 INFO L78 Accepts]: Start accepts. Automaton has 937 states and 1279 transitions. Word has length 336 [2024-11-28 05:01:42,067 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 05:01:42,067 INFO L471 AbstractCegarLoop]: Abstraction has 937 states and 1279 transitions. [2024-11-28 05:01:42,067 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 51.5) internal successors, (309), 6 states have internal predecessors, (309), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-28 05:01:42,068 INFO L276 IsEmpty]: Start isEmpty. Operand 937 states and 1279 transitions. [2024-11-28 05:01:42,073 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 337 [2024-11-28 05:01:42,073 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 05:01:42,073 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 05:01:42,073 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable31 [2024-11-28 05:01:42,074 INFO L396 AbstractCegarLoop]: === Iteration 33 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 05:01:42,074 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 05:01:42,074 INFO L85 PathProgramCache]: Analyzing trace with hash -390800339, now seen corresponding path program 1 times [2024-11-28 05:01:42,074 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 05:01:42,075 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1416653553] [2024-11-28 05:01:42,075 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 05:01:42,075 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 05:01:42,935 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 05:01:43,968 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 30 proven. 0 refuted. 0 times theorem prover too weak. 114 trivial. 0 not checked. [2024-11-28 05:01:43,969 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 05:01:43,969 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1416653553] [2024-11-28 05:01:43,969 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1416653553] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 05:01:43,969 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 05:01:43,969 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2024-11-28 05:01:43,969 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1041608992] [2024-11-28 05:01:43,970 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 05:01:43,970 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2024-11-28 05:01:43,970 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 05:01:43,971 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2024-11-28 05:01:43,971 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2024-11-28 05:01:43,971 INFO L87 Difference]: Start difference. First operand 937 states and 1279 transitions. Second operand has 8 states, 8 states have (on average 32.25) internal successors, (258), 8 states have internal predecessors, (258), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-28 05:01:44,210 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 05:01:44,210 INFO L93 Difference]: Finished difference Result 2114 states and 2877 transitions. [2024-11-28 05:01:44,211 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2024-11-28 05:01:44,211 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 32.25) internal successors, (258), 8 states have internal predecessors, (258), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 336 [2024-11-28 05:01:44,211 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 05:01:44,216 INFO L225 Difference]: With dead ends: 2114 [2024-11-28 05:01:44,216 INFO L226 Difference]: Without dead ends: 1625 [2024-11-28 05:01:44,217 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=20, Invalid=52, Unknown=0, NotChecked=0, Total=72 [2024-11-28 05:01:44,218 INFO L435 NwaCegarLoop]: 1288 mSDtfsCounter, 782 mSDsluCounter, 6603 mSDsCounter, 0 mSdLazyCounter, 180 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 785 SdHoareTripleChecker+Valid, 7891 SdHoareTripleChecker+Invalid, 180 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 180 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-11-28 05:01:44,218 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [785 Valid, 7891 Invalid, 180 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 180 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-11-28 05:01:44,220 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1625 states. [2024-11-28 05:01:44,254 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1625 to 1004. [2024-11-28 05:01:44,256 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1004 states, 990 states have (on average 1.3656565656565656) internal successors, (1352), 990 states have internal predecessors, (1352), 12 states have call successors, (12), 1 states have call predecessors, (12), 1 states have return successors, (12), 12 states have call predecessors, (12), 12 states have call successors, (12) [2024-11-28 05:01:44,258 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1004 states to 1004 states and 1376 transitions. [2024-11-28 05:01:44,258 INFO L78 Accepts]: Start accepts. Automaton has 1004 states and 1376 transitions. Word has length 336 [2024-11-28 05:01:44,259 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 05:01:44,259 INFO L471 AbstractCegarLoop]: Abstraction has 1004 states and 1376 transitions. [2024-11-28 05:01:44,259 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 32.25) internal successors, (258), 8 states have internal predecessors, (258), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-28 05:01:44,259 INFO L276 IsEmpty]: Start isEmpty. Operand 1004 states and 1376 transitions. [2024-11-28 05:01:44,262 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 338 [2024-11-28 05:01:44,262 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 05:01:44,262 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 05:01:44,262 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable32 [2024-11-28 05:01:44,262 INFO L396 AbstractCegarLoop]: === Iteration 34 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 05:01:44,263 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 05:01:44,263 INFO L85 PathProgramCache]: Analyzing trace with hash -855877697, now seen corresponding path program 1 times [2024-11-28 05:01:44,263 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 05:01:44,263 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1654859989] [2024-11-28 05:01:44,264 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 05:01:44,264 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 05:01:45,162 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 05:01:45,738 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 46 proven. 0 refuted. 0 times theorem prover too weak. 98 trivial. 0 not checked. [2024-11-28 05:01:45,739 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 05:01:45,739 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1654859989] [2024-11-28 05:01:45,739 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1654859989] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 05:01:45,739 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 05:01:45,739 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2024-11-28 05:01:45,739 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1236058067] [2024-11-28 05:01:45,739 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 05:01:45,740 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2024-11-28 05:01:45,740 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 05:01:45,741 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-11-28 05:01:45,741 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2024-11-28 05:01:45,741 INFO L87 Difference]: Start difference. First operand 1004 states and 1376 transitions. Second operand has 7 states, 7 states have (on average 39.285714285714285) internal successors, (275), 7 states have internal predecessors, (275), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-28 05:01:46,127 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 05:01:46,127 INFO L93 Difference]: Finished difference Result 2132 states and 2919 transitions. [2024-11-28 05:01:46,127 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2024-11-28 05:01:46,128 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 39.285714285714285) internal successors, (275), 7 states have internal predecessors, (275), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 337 [2024-11-28 05:01:46,128 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 05:01:46,131 INFO L225 Difference]: With dead ends: 2132 [2024-11-28 05:01:46,131 INFO L226 Difference]: Without dead ends: 1020 [2024-11-28 05:01:46,133 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=27, Invalid=83, Unknown=0, NotChecked=0, Total=110 [2024-11-28 05:01:46,133 INFO L435 NwaCegarLoop]: 529 mSDtfsCounter, 630 mSDsluCounter, 1979 mSDsCounter, 0 mSdLazyCounter, 250 mSolverCounterSat, 8 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 633 SdHoareTripleChecker+Valid, 2508 SdHoareTripleChecker+Invalid, 258 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 8 IncrementalHoareTripleChecker+Valid, 250 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2024-11-28 05:01:46,134 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [633 Valid, 2508 Invalid, 258 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [8 Valid, 250 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2024-11-28 05:01:46,135 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1020 states. [2024-11-28 05:01:46,163 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1020 to 1012. [2024-11-28 05:01:46,164 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1012 states, 998 states have (on average 1.3587174348697395) internal successors, (1356), 998 states have internal predecessors, (1356), 12 states have call successors, (12), 1 states have call predecessors, (12), 1 states have return successors, (12), 12 states have call predecessors, (12), 12 states have call successors, (12) [2024-11-28 05:01:46,166 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1012 states to 1012 states and 1380 transitions. [2024-11-28 05:01:46,167 INFO L78 Accepts]: Start accepts. Automaton has 1012 states and 1380 transitions. Word has length 337 [2024-11-28 05:01:46,167 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 05:01:46,167 INFO L471 AbstractCegarLoop]: Abstraction has 1012 states and 1380 transitions. [2024-11-28 05:01:46,167 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 39.285714285714285) internal successors, (275), 7 states have internal predecessors, (275), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-28 05:01:46,168 INFO L276 IsEmpty]: Start isEmpty. Operand 1012 states and 1380 transitions. [2024-11-28 05:01:46,170 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 340 [2024-11-28 05:01:46,170 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 05:01:46,171 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 05:01:46,171 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable33 [2024-11-28 05:01:46,171 INFO L396 AbstractCegarLoop]: === Iteration 35 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 05:01:46,171 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 05:01:46,172 INFO L85 PathProgramCache]: Analyzing trace with hash 2025188781, now seen corresponding path program 1 times [2024-11-28 05:01:46,172 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 05:01:46,172 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [872574264] [2024-11-28 05:01:46,172 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 05:01:46,172 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 05:01:47,212 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 05:01:48,195 INFO L134 CoverageAnalysis]: Checked inductivity of 145 backedges. 52 proven. 0 refuted. 0 times theorem prover too weak. 93 trivial. 0 not checked. [2024-11-28 05:01:48,195 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 05:01:48,196 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [872574264] [2024-11-28 05:01:48,196 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [872574264] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 05:01:48,196 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 05:01:48,196 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2024-11-28 05:01:48,196 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [871083480] [2024-11-28 05:01:48,196 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 05:01:48,197 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2024-11-28 05:01:48,197 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 05:01:48,197 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2024-11-28 05:01:48,198 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2024-11-28 05:01:48,198 INFO L87 Difference]: Start difference. First operand 1012 states and 1380 transitions. Second operand has 8 states, 8 states have (on average 35.25) internal successors, (282), 8 states have internal predecessors, (282), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-28 05:01:49,111 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 05:01:49,112 INFO L93 Difference]: Finished difference Result 2518 states and 3403 transitions. [2024-11-28 05:01:49,112 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2024-11-28 05:01:49,112 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 35.25) internal successors, (282), 8 states have internal predecessors, (282), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 339 [2024-11-28 05:01:49,113 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 05:01:49,118 INFO L225 Difference]: With dead ends: 2518 [2024-11-28 05:01:49,118 INFO L226 Difference]: Without dead ends: 1878 [2024-11-28 05:01:49,119 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=37, Invalid=95, Unknown=0, NotChecked=0, Total=132 [2024-11-28 05:01:49,120 INFO L435 NwaCegarLoop]: 416 mSDtfsCounter, 1287 mSDsluCounter, 2000 mSDsCounter, 0 mSdLazyCounter, 970 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.7s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1290 SdHoareTripleChecker+Valid, 2416 SdHoareTripleChecker+Invalid, 970 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 970 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.8s IncrementalHoareTripleChecker+Time [2024-11-28 05:01:49,120 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1290 Valid, 2416 Invalid, 970 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 970 Invalid, 0 Unknown, 0 Unchecked, 0.8s Time] [2024-11-28 05:01:49,122 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1878 states. [2024-11-28 05:01:49,167 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1878 to 1870. [2024-11-28 05:01:49,170 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1870 states, 1844 states have (on average 1.3503253796095445) internal successors, (2490), 1844 states have internal predecessors, (2490), 24 states have call successors, (24), 1 states have call predecessors, (24), 1 states have return successors, (24), 24 states have call predecessors, (24), 24 states have call successors, (24) [2024-11-28 05:01:49,173 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1870 states to 1870 states and 2538 transitions. [2024-11-28 05:01:49,174 INFO L78 Accepts]: Start accepts. Automaton has 1870 states and 2538 transitions. Word has length 339 [2024-11-28 05:01:49,174 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 05:01:49,174 INFO L471 AbstractCegarLoop]: Abstraction has 1870 states and 2538 transitions. [2024-11-28 05:01:49,175 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 35.25) internal successors, (282), 8 states have internal predecessors, (282), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-28 05:01:49,175 INFO L276 IsEmpty]: Start isEmpty. Operand 1870 states and 2538 transitions. [2024-11-28 05:01:49,179 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 342 [2024-11-28 05:01:49,179 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 05:01:49,180 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 05:01:49,180 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable34 [2024-11-28 05:01:49,180 INFO L396 AbstractCegarLoop]: === Iteration 36 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 05:01:49,181 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 05:01:49,181 INFO L85 PathProgramCache]: Analyzing trace with hash -2002348361, now seen corresponding path program 1 times [2024-11-28 05:01:49,181 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 05:01:49,181 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1954430719] [2024-11-28 05:01:49,181 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 05:01:49,181 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 05:01:49,950 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 05:01:50,762 INFO L134 CoverageAnalysis]: Checked inductivity of 146 backedges. 79 proven. 4 refuted. 0 times theorem prover too weak. 63 trivial. 0 not checked. [2024-11-28 05:01:50,762 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 05:01:50,762 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1954430719] [2024-11-28 05:01:50,762 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1954430719] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-28 05:01:50,762 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1610136177] [2024-11-28 05:01:50,762 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 05:01:50,764 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-28 05:01:50,764 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e79ab4e9-2c15-41d1-a9a3-9aa0806e687c/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 05:01:50,766 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e79ab4e9-2c15-41d1-a9a3-9aa0806e687c/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-28 05:01:50,770 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e79ab4e9-2c15-41d1-a9a3-9aa0806e687c/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2024-11-28 05:01:52,037 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 05:01:52,044 INFO L256 TraceCheckSpWp]: Trace formula consists of 2047 conjuncts, 7 conjuncts are in the unsatisfiable core [2024-11-28 05:01:52,058 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-28 05:01:52,453 INFO L134 CoverageAnalysis]: Checked inductivity of 146 backedges. 88 proven. 0 refuted. 0 times theorem prover too weak. 58 trivial. 0 not checked. [2024-11-28 05:01:52,453 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-11-28 05:01:52,453 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1610136177] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 05:01:52,453 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-11-28 05:01:52,453 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [6] total 7 [2024-11-28 05:01:52,453 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1580304904] [2024-11-28 05:01:52,454 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 05:01:52,454 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-28 05:01:52,455 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 05:01:52,455 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-28 05:01:52,456 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2024-11-28 05:01:52,456 INFO L87 Difference]: Start difference. First operand 1870 states and 2538 transitions. Second operand has 4 states, 4 states have (on average 71.5) internal successors, (286), 4 states have internal predecessors, (286), 2 states have call successors, (6), 2 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-28 05:01:52,830 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 05:01:52,830 INFO L93 Difference]: Finished difference Result 2599 states and 3514 transitions. [2024-11-28 05:01:52,830 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-28 05:01:52,830 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 71.5) internal successors, (286), 4 states have internal predecessors, (286), 2 states have call successors, (6), 2 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 341 [2024-11-28 05:01:52,831 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 05:01:52,834 INFO L225 Difference]: With dead ends: 2599 [2024-11-28 05:01:52,834 INFO L226 Difference]: Without dead ends: 1010 [2024-11-28 05:01:52,836 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 350 GetRequests, 344 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2024-11-28 05:01:52,837 INFO L435 NwaCegarLoop]: 396 mSDtfsCounter, 458 mSDsluCounter, 398 mSDsCounter, 0 mSdLazyCounter, 309 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 458 SdHoareTripleChecker+Valid, 794 SdHoareTripleChecker+Invalid, 309 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 309 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2024-11-28 05:01:52,837 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [458 Valid, 794 Invalid, 309 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 309 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2024-11-28 05:01:52,839 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1010 states. [2024-11-28 05:01:52,873 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1010 to 1010. [2024-11-28 05:01:52,874 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1010 states, 996 states have (on average 1.3534136546184738) internal successors, (1348), 996 states have internal predecessors, (1348), 12 states have call successors, (12), 1 states have call predecessors, (12), 1 states have return successors, (12), 12 states have call predecessors, (12), 12 states have call successors, (12) [2024-11-28 05:01:52,876 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1010 states to 1010 states and 1372 transitions. [2024-11-28 05:01:52,876 INFO L78 Accepts]: Start accepts. Automaton has 1010 states and 1372 transitions. Word has length 341 [2024-11-28 05:01:52,877 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 05:01:52,877 INFO L471 AbstractCegarLoop]: Abstraction has 1010 states and 1372 transitions. [2024-11-28 05:01:52,877 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 71.5) internal successors, (286), 4 states have internal predecessors, (286), 2 states have call successors, (6), 2 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-28 05:01:52,877 INFO L276 IsEmpty]: Start isEmpty. Operand 1010 states and 1372 transitions. [2024-11-28 05:01:52,880 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 342 [2024-11-28 05:01:52,880 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 05:01:52,880 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 05:01:52,895 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e79ab4e9-2c15-41d1-a9a3-9aa0806e687c/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Ended with exit code 0 [2024-11-28 05:01:53,081 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e79ab4e9-2c15-41d1-a9a3-9aa0806e687c/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable35 [2024-11-28 05:01:53,081 INFO L396 AbstractCegarLoop]: === Iteration 37 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 05:01:53,081 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 05:01:53,082 INFO L85 PathProgramCache]: Analyzing trace with hash 615740921, now seen corresponding path program 1 times [2024-11-28 05:01:53,082 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 05:01:53,082 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [173064393] [2024-11-28 05:01:53,082 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 05:01:53,082 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 05:01:53,987 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 05:01:55,244 INFO L134 CoverageAnalysis]: Checked inductivity of 146 backedges. 20 proven. 0 refuted. 0 times theorem prover too weak. 126 trivial. 0 not checked. [2024-11-28 05:01:55,244 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 05:01:55,244 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [173064393] [2024-11-28 05:01:55,244 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [173064393] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 05:01:55,244 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 05:01:55,244 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2024-11-28 05:01:55,245 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1125476418] [2024-11-28 05:01:55,245 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 05:01:55,245 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2024-11-28 05:01:55,245 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 05:01:55,246 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2024-11-28 05:01:55,246 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=38, Unknown=0, NotChecked=0, Total=56 [2024-11-28 05:01:55,246 INFO L87 Difference]: Start difference. First operand 1010 states and 1372 transitions. Second operand has 8 states, 8 states have (on average 31.625) internal successors, (253), 8 states have internal predecessors, (253), 2 states have call successors, (4), 1 states have call predecessors, (4), 1 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) [2024-11-28 05:01:55,974 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 05:01:55,974 INFO L93 Difference]: Finished difference Result 1843 states and 2494 transitions. [2024-11-28 05:01:55,975 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2024-11-28 05:01:55,975 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 31.625) internal successors, (253), 8 states have internal predecessors, (253), 2 states have call successors, (4), 1 states have call predecessors, (4), 1 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) Word has length 341 [2024-11-28 05:01:55,975 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 05:01:55,978 INFO L225 Difference]: With dead ends: 1843 [2024-11-28 05:01:55,978 INFO L226 Difference]: Without dead ends: 1042 [2024-11-28 05:01:55,980 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=18, Invalid=38, Unknown=0, NotChecked=0, Total=56 [2024-11-28 05:01:55,980 INFO L435 NwaCegarLoop]: 394 mSDtfsCounter, 539 mSDsluCounter, 1931 mSDsCounter, 0 mSdLazyCounter, 950 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 541 SdHoareTripleChecker+Valid, 2325 SdHoareTripleChecker+Invalid, 953 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 950 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.7s IncrementalHoareTripleChecker+Time [2024-11-28 05:01:55,980 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [541 Valid, 2325 Invalid, 953 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 950 Invalid, 0 Unknown, 0 Unchecked, 0.7s Time] [2024-11-28 05:01:55,982 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1042 states. [2024-11-28 05:01:56,013 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1042 to 1030. [2024-11-28 05:01:56,014 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1030 states, 1016 states have (on average 1.3543307086614174) internal successors, (1376), 1016 states have internal predecessors, (1376), 12 states have call successors, (12), 1 states have call predecessors, (12), 1 states have return successors, (12), 12 states have call predecessors, (12), 12 states have call successors, (12) [2024-11-28 05:01:56,017 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1030 states to 1030 states and 1400 transitions. [2024-11-28 05:01:56,017 INFO L78 Accepts]: Start accepts. Automaton has 1030 states and 1400 transitions. Word has length 341 [2024-11-28 05:01:56,017 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 05:01:56,018 INFO L471 AbstractCegarLoop]: Abstraction has 1030 states and 1400 transitions. [2024-11-28 05:01:56,018 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 31.625) internal successors, (253), 8 states have internal predecessors, (253), 2 states have call successors, (4), 1 states have call predecessors, (4), 1 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) [2024-11-28 05:01:56,018 INFO L276 IsEmpty]: Start isEmpty. Operand 1030 states and 1400 transitions. [2024-11-28 05:01:56,022 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 344 [2024-11-28 05:01:56,022 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 05:01:56,023 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 05:01:56,023 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable36 [2024-11-28 05:01:56,023 INFO L396 AbstractCegarLoop]: === Iteration 38 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 05:01:56,024 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 05:01:56,024 INFO L85 PathProgramCache]: Analyzing trace with hash 425632909, now seen corresponding path program 1 times [2024-11-28 05:01:56,024 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 05:01:56,024 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [15242795] [2024-11-28 05:01:56,024 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 05:01:56,024 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 05:01:56,887 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 05:01:58,105 INFO L134 CoverageAnalysis]: Checked inductivity of 147 backedges. 4 proven. 83 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-28 05:01:58,105 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 05:01:58,105 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [15242795] [2024-11-28 05:01:58,105 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [15242795] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-28 05:01:58,106 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1940716095] [2024-11-28 05:01:58,106 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 05:01:58,106 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-28 05:01:58,106 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e79ab4e9-2c15-41d1-a9a3-9aa0806e687c/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 05:01:58,111 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e79ab4e9-2c15-41d1-a9a3-9aa0806e687c/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-28 05:01:58,113 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e79ab4e9-2c15-41d1-a9a3-9aa0806e687c/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2024-11-28 05:01:59,287 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 05:01:59,295 INFO L256 TraceCheckSpWp]: Trace formula consists of 2053 conjuncts, 46 conjuncts are in the unsatisfiable core [2024-11-28 05:01:59,304 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-28 05:01:59,587 INFO L134 CoverageAnalysis]: Checked inductivity of 147 backedges. 41 proven. 0 refuted. 0 times theorem prover too weak. 106 trivial. 0 not checked. [2024-11-28 05:01:59,587 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-11-28 05:01:59,587 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1940716095] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 05:01:59,587 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-11-28 05:01:59,587 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [11] total 15 [2024-11-28 05:01:59,588 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [290824491] [2024-11-28 05:01:59,588 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 05:01:59,588 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-11-28 05:01:59,588 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 05:01:59,589 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-11-28 05:01:59,589 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=34, Invalid=176, Unknown=0, NotChecked=0, Total=210 [2024-11-28 05:01:59,589 INFO L87 Difference]: Start difference. First operand 1030 states and 1400 transitions. Second operand has 6 states, 6 states have (on average 43.0) internal successors, (258), 6 states have internal predecessors, (258), 2 states have call successors, (4), 2 states have call predecessors, (4), 2 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) [2024-11-28 05:02:00,074 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 05:02:00,075 INFO L93 Difference]: Finished difference Result 1870 states and 2529 transitions. [2024-11-28 05:02:00,075 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-28 05:02:00,075 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 43.0) internal successors, (258), 6 states have internal predecessors, (258), 2 states have call successors, (4), 2 states have call predecessors, (4), 2 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) Word has length 343 [2024-11-28 05:02:00,075 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 05:02:00,078 INFO L225 Difference]: With dead ends: 1870 [2024-11-28 05:02:00,078 INFO L226 Difference]: Without dead ends: 1046 [2024-11-28 05:02:00,079 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 353 GetRequests, 340 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 24 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=34, Invalid=176, Unknown=0, NotChecked=0, Total=210 [2024-11-28 05:02:00,079 INFO L435 NwaCegarLoop]: 390 mSDtfsCounter, 488 mSDsluCounter, 1163 mSDsCounter, 0 mSdLazyCounter, 642 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 490 SdHoareTripleChecker+Valid, 1553 SdHoareTripleChecker+Invalid, 644 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 642 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2024-11-28 05:02:00,079 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [490 Valid, 1553 Invalid, 644 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 642 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2024-11-28 05:02:00,081 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1046 states. [2024-11-28 05:02:00,105 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1046 to 1022. [2024-11-28 05:02:00,106 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1022 states, 1008 states have (on average 1.3452380952380953) internal successors, (1356), 1008 states have internal predecessors, (1356), 12 states have call successors, (12), 1 states have call predecessors, (12), 1 states have return successors, (12), 12 states have call predecessors, (12), 12 states have call successors, (12) [2024-11-28 05:02:00,108 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1022 states to 1022 states and 1380 transitions. [2024-11-28 05:02:00,108 INFO L78 Accepts]: Start accepts. Automaton has 1022 states and 1380 transitions. Word has length 343 [2024-11-28 05:02:00,109 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 05:02:00,109 INFO L471 AbstractCegarLoop]: Abstraction has 1022 states and 1380 transitions. [2024-11-28 05:02:00,112 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 43.0) internal successors, (258), 6 states have internal predecessors, (258), 2 states have call successors, (4), 2 states have call predecessors, (4), 2 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) [2024-11-28 05:02:00,112 INFO L276 IsEmpty]: Start isEmpty. Operand 1022 states and 1380 transitions. [2024-11-28 05:02:00,115 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 346 [2024-11-28 05:02:00,119 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 05:02:00,120 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 05:02:00,134 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e79ab4e9-2c15-41d1-a9a3-9aa0806e687c/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Ended with exit code 0 [2024-11-28 05:02:00,320 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 4 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e79ab4e9-2c15-41d1-a9a3-9aa0806e687c/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable37 [2024-11-28 05:02:00,320 INFO L396 AbstractCegarLoop]: === Iteration 39 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 05:02:00,321 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 05:02:00,321 INFO L85 PathProgramCache]: Analyzing trace with hash -119240141, now seen corresponding path program 1 times [2024-11-28 05:02:00,321 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 05:02:00,321 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [711212205] [2024-11-28 05:02:00,322 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 05:02:00,322 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 05:02:01,142 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 05:02:02,454 INFO L134 CoverageAnalysis]: Checked inductivity of 148 backedges. 4 proven. 84 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-28 05:02:02,455 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 05:02:02,455 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [711212205] [2024-11-28 05:02:02,455 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [711212205] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-28 05:02:02,455 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [283722963] [2024-11-28 05:02:02,455 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 05:02:02,455 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-28 05:02:02,455 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e79ab4e9-2c15-41d1-a9a3-9aa0806e687c/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 05:02:02,459 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e79ab4e9-2c15-41d1-a9a3-9aa0806e687c/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-28 05:02:02,460 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e79ab4e9-2c15-41d1-a9a3-9aa0806e687c/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2024-11-28 05:02:03,739 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 05:02:03,756 INFO L256 TraceCheckSpWp]: Trace formula consists of 2055 conjuncts, 33 conjuncts are in the unsatisfiable core [2024-11-28 05:02:03,764 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-28 05:02:04,743 INFO L134 CoverageAnalysis]: Checked inductivity of 148 backedges. 78 proven. 6 refuted. 0 times theorem prover too weak. 64 trivial. 0 not checked. [2024-11-28 05:02:04,743 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-28 05:02:06,202 INFO L134 CoverageAnalysis]: Checked inductivity of 148 backedges. 78 proven. 3 refuted. 0 times theorem prover too weak. 67 trivial. 0 not checked. [2024-11-28 05:02:06,202 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [283722963] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-28 05:02:06,202 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-28 05:02:06,202 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 9, 10] total 26 [2024-11-28 05:02:06,202 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [840299024] [2024-11-28 05:02:06,202 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-28 05:02:06,203 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 26 states [2024-11-28 05:02:06,203 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 05:02:06,204 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2024-11-28 05:02:06,204 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=89, Invalid=561, Unknown=0, NotChecked=0, Total=650 [2024-11-28 05:02:06,205 INFO L87 Difference]: Start difference. First operand 1022 states and 1380 transitions. Second operand has 26 states, 26 states have (on average 33.0) internal successors, (858), 26 states have internal predecessors, (858), 6 states have call successors, (15), 2 states have call predecessors, (15), 2 states have return successors, (15), 6 states have call predecessors, (15), 6 states have call successors, (15) [2024-11-28 05:02:08,243 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 05:02:08,244 INFO L93 Difference]: Finished difference Result 1820 states and 2445 transitions. [2024-11-28 05:02:08,244 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2024-11-28 05:02:08,244 INFO L78 Accepts]: Start accepts. Automaton has has 26 states, 26 states have (on average 33.0) internal successors, (858), 26 states have internal predecessors, (858), 6 states have call successors, (15), 2 states have call predecessors, (15), 2 states have return successors, (15), 6 states have call predecessors, (15), 6 states have call successors, (15) Word has length 345 [2024-11-28 05:02:08,244 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 05:02:08,247 INFO L225 Difference]: With dead ends: 1820 [2024-11-28 05:02:08,247 INFO L226 Difference]: Without dead ends: 1046 [2024-11-28 05:02:08,249 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 723 GetRequests, 677 SyntacticMatches, 0 SemanticMatches, 46 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 363 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=367, Invalid=1889, Unknown=0, NotChecked=0, Total=2256 [2024-11-28 05:02:08,249 INFO L435 NwaCegarLoop]: 483 mSDtfsCounter, 1409 mSDsluCounter, 5468 mSDsCounter, 0 mSdLazyCounter, 2862 mSolverCounterSat, 5 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1409 SdHoareTripleChecker+Valid, 5951 SdHoareTripleChecker+Invalid, 2867 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 5 IncrementalHoareTripleChecker+Valid, 2862 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.6s IncrementalHoareTripleChecker+Time [2024-11-28 05:02:08,249 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1409 Valid, 5951 Invalid, 2867 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [5 Valid, 2862 Invalid, 0 Unknown, 0 Unchecked, 1.6s Time] [2024-11-28 05:02:08,250 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1046 states. [2024-11-28 05:02:08,272 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1046 to 1035. [2024-11-28 05:02:08,273 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1035 states, 1021 states have (on average 1.3379040156709108) internal successors, (1366), 1021 states have internal predecessors, (1366), 12 states have call successors, (12), 1 states have call predecessors, (12), 1 states have return successors, (12), 12 states have call predecessors, (12), 12 states have call successors, (12) [2024-11-28 05:02:08,275 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1035 states to 1035 states and 1390 transitions. [2024-11-28 05:02:08,276 INFO L78 Accepts]: Start accepts. Automaton has 1035 states and 1390 transitions. Word has length 345 [2024-11-28 05:02:08,276 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 05:02:08,276 INFO L471 AbstractCegarLoop]: Abstraction has 1035 states and 1390 transitions. [2024-11-28 05:02:08,276 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 26 states, 26 states have (on average 33.0) internal successors, (858), 26 states have internal predecessors, (858), 6 states have call successors, (15), 2 states have call predecessors, (15), 2 states have return successors, (15), 6 states have call predecessors, (15), 6 states have call successors, (15) [2024-11-28 05:02:08,277 INFO L276 IsEmpty]: Start isEmpty. Operand 1035 states and 1390 transitions. [2024-11-28 05:02:08,279 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 350 [2024-11-28 05:02:08,280 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 05:02:08,280 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 05:02:08,295 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e79ab4e9-2c15-41d1-a9a3-9aa0806e687c/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Ended with exit code 0 [2024-11-28 05:02:08,480 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 5 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e79ab4e9-2c15-41d1-a9a3-9aa0806e687c/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable38 [2024-11-28 05:02:08,481 INFO L396 AbstractCegarLoop]: === Iteration 40 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 05:02:08,481 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 05:02:08,482 INFO L85 PathProgramCache]: Analyzing trace with hash -1308830486, now seen corresponding path program 1 times [2024-11-28 05:02:08,482 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 05:02:08,482 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [31728884] [2024-11-28 05:02:08,482 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 05:02:08,482 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 05:02:08,689 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 05:02:09,237 INFO L134 CoverageAnalysis]: Checked inductivity of 149 backedges. 51 proven. 0 refuted. 0 times theorem prover too weak. 98 trivial. 0 not checked. [2024-11-28 05:02:09,237 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 05:02:09,237 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [31728884] [2024-11-28 05:02:09,237 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [31728884] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 05:02:09,237 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 05:02:09,237 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-28 05:02:09,238 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1953873473] [2024-11-28 05:02:09,238 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 05:02:09,238 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-28 05:02:09,238 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 05:02:09,239 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-28 05:02:09,239 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-11-28 05:02:09,239 INFO L87 Difference]: Start difference. First operand 1035 states and 1390 transitions. Second operand has 5 states, 5 states have (on average 57.6) internal successors, (288), 5 states have internal predecessors, (288), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-28 05:02:09,287 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 05:02:09,287 INFO L93 Difference]: Finished difference Result 1707 states and 2297 transitions. [2024-11-28 05:02:09,287 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-11-28 05:02:09,287 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 57.6) internal successors, (288), 5 states have internal predecessors, (288), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 349 [2024-11-28 05:02:09,288 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 05:02:09,292 INFO L225 Difference]: With dead ends: 1707 [2024-11-28 05:02:09,292 INFO L226 Difference]: Without dead ends: 1089 [2024-11-28 05:02:09,293 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-11-28 05:02:09,296 INFO L435 NwaCegarLoop]: 544 mSDtfsCounter, 16 mSDsluCounter, 1620 mSDsCounter, 0 mSdLazyCounter, 23 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 16 SdHoareTripleChecker+Valid, 2164 SdHoareTripleChecker+Invalid, 23 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 23 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-28 05:02:09,297 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [16 Valid, 2164 Invalid, 23 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 23 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-28 05:02:09,298 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1089 states. [2024-11-28 05:02:09,322 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1089 to 1089. [2024-11-28 05:02:09,323 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1089 states, 1075 states have (on average 1.3432558139534885) internal successors, (1444), 1075 states have internal predecessors, (1444), 12 states have call successors, (12), 1 states have call predecessors, (12), 1 states have return successors, (12), 12 states have call predecessors, (12), 12 states have call successors, (12) [2024-11-28 05:02:09,325 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1089 states to 1089 states and 1468 transitions. [2024-11-28 05:02:09,326 INFO L78 Accepts]: Start accepts. Automaton has 1089 states and 1468 transitions. Word has length 349 [2024-11-28 05:02:09,326 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 05:02:09,327 INFO L471 AbstractCegarLoop]: Abstraction has 1089 states and 1468 transitions. [2024-11-28 05:02:09,327 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 57.6) internal successors, (288), 5 states have internal predecessors, (288), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-28 05:02:09,327 INFO L276 IsEmpty]: Start isEmpty. Operand 1089 states and 1468 transitions. [2024-11-28 05:02:09,330 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 351 [2024-11-28 05:02:09,330 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 05:02:09,331 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 05:02:09,331 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable39 [2024-11-28 05:02:09,331 INFO L396 AbstractCegarLoop]: === Iteration 41 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 05:02:09,331 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 05:02:09,332 INFO L85 PathProgramCache]: Analyzing trace with hash 765704138, now seen corresponding path program 1 times [2024-11-28 05:02:09,332 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 05:02:09,332 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1778955469] [2024-11-28 05:02:09,332 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 05:02:09,332 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 05:02:10,308 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 05:02:11,370 INFO L134 CoverageAnalysis]: Checked inductivity of 150 backedges. 54 proven. 17 refuted. 0 times theorem prover too weak. 79 trivial. 0 not checked. [2024-11-28 05:02:11,370 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 05:02:11,370 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1778955469] [2024-11-28 05:02:11,370 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1778955469] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-28 05:02:11,371 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2099976436] [2024-11-28 05:02:11,371 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 05:02:11,371 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-28 05:02:11,371 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e79ab4e9-2c15-41d1-a9a3-9aa0806e687c/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 05:02:11,373 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e79ab4e9-2c15-41d1-a9a3-9aa0806e687c/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-28 05:02:11,376 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e79ab4e9-2c15-41d1-a9a3-9aa0806e687c/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2024-11-28 05:02:13,041 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 05:02:13,050 INFO L256 TraceCheckSpWp]: Trace formula consists of 2064 conjuncts, 20 conjuncts are in the unsatisfiable core [2024-11-28 05:02:13,058 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-28 05:02:13,345 INFO L134 CoverageAnalysis]: Checked inductivity of 150 backedges. 120 proven. 0 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2024-11-28 05:02:13,345 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-11-28 05:02:13,345 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2099976436] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 05:02:13,345 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-11-28 05:02:13,345 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [9] total 15 [2024-11-28 05:02:13,346 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [22061505] [2024-11-28 05:02:13,346 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 05:02:13,346 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2024-11-28 05:02:13,346 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 05:02:13,347 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2024-11-28 05:02:13,347 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=36, Invalid=174, Unknown=0, NotChecked=0, Total=210 [2024-11-28 05:02:13,347 INFO L87 Difference]: Start difference. First operand 1089 states and 1468 transitions. Second operand has 8 states, 8 states have (on average 40.375) internal successors, (323), 8 states have internal predecessors, (323), 2 states have call successors, (6), 2 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-28 05:02:13,984 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 05:02:13,984 INFO L93 Difference]: Finished difference Result 2431 states and 3284 transitions. [2024-11-28 05:02:13,985 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2024-11-28 05:02:13,985 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 40.375) internal successors, (323), 8 states have internal predecessors, (323), 2 states have call successors, (6), 2 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 350 [2024-11-28 05:02:13,985 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 05:02:13,991 INFO L225 Difference]: With dead ends: 2431 [2024-11-28 05:02:13,991 INFO L226 Difference]: Without dead ends: 1891 [2024-11-28 05:02:13,992 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 360 GetRequests, 345 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 43 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=48, Invalid=224, Unknown=0, NotChecked=0, Total=272 [2024-11-28 05:02:13,993 INFO L435 NwaCegarLoop]: 395 mSDtfsCounter, 928 mSDsluCounter, 1867 mSDsCounter, 0 mSdLazyCounter, 911 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 934 SdHoareTripleChecker+Valid, 2262 SdHoareTripleChecker+Invalid, 911 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 911 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2024-11-28 05:02:13,993 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [934 Valid, 2262 Invalid, 911 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 911 Invalid, 0 Unknown, 0 Unchecked, 0.6s Time] [2024-11-28 05:02:13,995 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1891 states. [2024-11-28 05:02:14,029 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1891 to 1545. [2024-11-28 05:02:14,031 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1545 states, 1522 states have (on average 1.325886990801577) internal successors, (2018), 1522 states have internal predecessors, (2018), 21 states have call successors, (21), 1 states have call predecessors, (21), 1 states have return successors, (21), 21 states have call predecessors, (21), 21 states have call successors, (21) [2024-11-28 05:02:14,034 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1545 states to 1545 states and 2060 transitions. [2024-11-28 05:02:14,034 INFO L78 Accepts]: Start accepts. Automaton has 1545 states and 2060 transitions. Word has length 350 [2024-11-28 05:02:14,035 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 05:02:14,035 INFO L471 AbstractCegarLoop]: Abstraction has 1545 states and 2060 transitions. [2024-11-28 05:02:14,035 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 40.375) internal successors, (323), 8 states have internal predecessors, (323), 2 states have call successors, (6), 2 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-28 05:02:14,035 INFO L276 IsEmpty]: Start isEmpty. Operand 1545 states and 2060 transitions. [2024-11-28 05:02:14,040 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 352 [2024-11-28 05:02:14,041 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 05:02:14,041 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 05:02:14,058 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e79ab4e9-2c15-41d1-a9a3-9aa0806e687c/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Forceful destruction successful, exit code 0 [2024-11-28 05:02:14,242 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable40,6 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e79ab4e9-2c15-41d1-a9a3-9aa0806e687c/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-28 05:02:14,243 INFO L396 AbstractCegarLoop]: === Iteration 42 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 05:02:14,243 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 05:02:14,243 INFO L85 PathProgramCache]: Analyzing trace with hash 569675601, now seen corresponding path program 1 times [2024-11-28 05:02:14,243 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 05:02:14,244 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1529361797] [2024-11-28 05:02:14,244 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 05:02:14,244 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 05:02:15,690 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 05:02:16,902 INFO L134 CoverageAnalysis]: Checked inductivity of 150 backedges. 44 proven. 0 refuted. 0 times theorem prover too weak. 106 trivial. 0 not checked. [2024-11-28 05:02:16,902 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 05:02:16,902 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1529361797] [2024-11-28 05:02:16,902 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1529361797] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 05:02:16,902 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 05:02:16,903 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2024-11-28 05:02:16,903 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1747659429] [2024-11-28 05:02:16,903 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 05:02:16,903 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 9 states [2024-11-28 05:02:16,903 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 05:02:16,904 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2024-11-28 05:02:16,904 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=52, Unknown=0, NotChecked=0, Total=72 [2024-11-28 05:02:16,904 INFO L87 Difference]: Start difference. First operand 1545 states and 2060 transitions. Second operand has 9 states, 9 states have (on average 31.444444444444443) internal successors, (283), 9 states have internal predecessors, (283), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) [2024-11-28 05:02:18,178 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 05:02:18,178 INFO L93 Difference]: Finished difference Result 3593 states and 4728 transitions. [2024-11-28 05:02:18,178 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2024-11-28 05:02:18,179 INFO L78 Accepts]: Start accepts. Automaton has has 9 states, 9 states have (on average 31.444444444444443) internal successors, (283), 9 states have internal predecessors, (283), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) Word has length 351 [2024-11-28 05:02:18,179 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 05:02:18,185 INFO L225 Difference]: With dead ends: 3593 [2024-11-28 05:02:18,185 INFO L226 Difference]: Without dead ends: 2647 [2024-11-28 05:02:18,187 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 20 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=61, Invalid=149, Unknown=0, NotChecked=0, Total=210 [2024-11-28 05:02:18,187 INFO L435 NwaCegarLoop]: 605 mSDtfsCounter, 848 mSDsluCounter, 2761 mSDsCounter, 0 mSdLazyCounter, 1554 mSolverCounterSat, 5 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.9s Time, 0 mProtectedPredicate, 0 mProtectedAction, 849 SdHoareTripleChecker+Valid, 3366 SdHoareTripleChecker+Invalid, 1559 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 5 IncrementalHoareTripleChecker+Valid, 1554 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.1s IncrementalHoareTripleChecker+Time [2024-11-28 05:02:18,187 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [849 Valid, 3366 Invalid, 1559 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [5 Valid, 1554 Invalid, 0 Unknown, 0 Unchecked, 1.1s Time] [2024-11-28 05:02:18,189 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2647 states. [2024-11-28 05:02:18,229 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2647 to 1794. [2024-11-28 05:02:18,231 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1794 states, 1764 states have (on average 1.3310657596371882) internal successors, (2348), 1764 states have internal predecessors, (2348), 28 states have call successors, (28), 1 states have call predecessors, (28), 1 states have return successors, (28), 28 states have call predecessors, (28), 28 states have call successors, (28) [2024-11-28 05:02:18,234 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1794 states to 1794 states and 2404 transitions. [2024-11-28 05:02:18,235 INFO L78 Accepts]: Start accepts. Automaton has 1794 states and 2404 transitions. Word has length 351 [2024-11-28 05:02:18,235 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 05:02:18,235 INFO L471 AbstractCegarLoop]: Abstraction has 1794 states and 2404 transitions. [2024-11-28 05:02:18,240 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 9 states, 9 states have (on average 31.444444444444443) internal successors, (283), 9 states have internal predecessors, (283), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) [2024-11-28 05:02:18,240 INFO L276 IsEmpty]: Start isEmpty. Operand 1794 states and 2404 transitions. [2024-11-28 05:02:18,243 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 352 [2024-11-28 05:02:18,244 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 05:02:18,244 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 05:02:18,248 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable41 [2024-11-28 05:02:18,248 INFO L396 AbstractCegarLoop]: === Iteration 43 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 05:02:18,248 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 05:02:18,251 INFO L85 PathProgramCache]: Analyzing trace with hash -1847452847, now seen corresponding path program 1 times [2024-11-28 05:02:18,251 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 05:02:18,251 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1999458826] [2024-11-28 05:02:18,251 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 05:02:18,251 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 05:02:19,723 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 05:02:24,022 INFO L134 CoverageAnalysis]: Checked inductivity of 150 backedges. 50 proven. 40 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-28 05:02:24,023 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 05:02:24,023 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1999458826] [2024-11-28 05:02:24,023 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1999458826] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-28 05:02:24,023 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [58122459] [2024-11-28 05:02:24,023 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 05:02:24,023 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-28 05:02:24,024 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e79ab4e9-2c15-41d1-a9a3-9aa0806e687c/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 05:02:24,026 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e79ab4e9-2c15-41d1-a9a3-9aa0806e687c/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-28 05:02:24,029 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e79ab4e9-2c15-41d1-a9a3-9aa0806e687c/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2024-11-28 05:02:25,963 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 05:02:25,971 INFO L256 TraceCheckSpWp]: Trace formula consists of 2067 conjuncts, 11 conjuncts are in the unsatisfiable core [2024-11-28 05:02:25,977 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-28 05:02:26,063 INFO L134 CoverageAnalysis]: Checked inductivity of 150 backedges. 76 proven. 0 refuted. 0 times theorem prover too weak. 74 trivial. 0 not checked. [2024-11-28 05:02:26,063 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-11-28 05:02:26,063 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [58122459] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 05:02:26,063 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-11-28 05:02:26,063 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [20] total 24 [2024-11-28 05:02:26,063 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [154821316] [2024-11-28 05:02:26,063 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 05:02:26,064 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-11-28 05:02:26,064 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 05:02:26,064 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-11-28 05:02:26,064 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=70, Invalid=482, Unknown=0, NotChecked=0, Total=552 [2024-11-28 05:02:26,065 INFO L87 Difference]: Start difference. First operand 1794 states and 2404 transitions. Second operand has 6 states, 5 states have (on average 55.8) internal successors, (279), 6 states have internal predecessors, (279), 3 states have call successors, (6), 2 states have call predecessors, (6), 3 states have return successors, (6), 2 states have call predecessors, (6), 3 states have call successors, (6) [2024-11-28 05:02:26,152 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 05:02:26,153 INFO L93 Difference]: Finished difference Result 3059 states and 4090 transitions. [2024-11-28 05:02:26,153 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-28 05:02:26,153 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 5 states have (on average 55.8) internal successors, (279), 6 states have internal predecessors, (279), 3 states have call successors, (6), 2 states have call predecessors, (6), 3 states have return successors, (6), 2 states have call predecessors, (6), 3 states have call successors, (6) Word has length 351 [2024-11-28 05:02:26,154 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 05:02:26,158 INFO L225 Difference]: With dead ends: 3059 [2024-11-28 05:02:26,159 INFO L226 Difference]: Without dead ends: 1794 [2024-11-28 05:02:26,160 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 371 GetRequests, 349 SyntacticMatches, 0 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 150 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=70, Invalid=482, Unknown=0, NotChecked=0, Total=552 [2024-11-28 05:02:26,161 INFO L435 NwaCegarLoop]: 544 mSDtfsCounter, 0 mSDsluCounter, 2157 mSDsCounter, 0 mSdLazyCounter, 39 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 2701 SdHoareTripleChecker+Invalid, 39 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 39 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-28 05:02:26,161 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 2701 Invalid, 39 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 39 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-28 05:02:26,163 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1794 states. [2024-11-28 05:02:26,203 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1794 to 1794. [2024-11-28 05:02:26,205 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1794 states, 1764 states have (on average 1.3231292517006803) internal successors, (2334), 1764 states have internal predecessors, (2334), 28 states have call successors, (28), 1 states have call predecessors, (28), 1 states have return successors, (28), 28 states have call predecessors, (28), 28 states have call successors, (28) [2024-11-28 05:02:26,208 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1794 states to 1794 states and 2390 transitions. [2024-11-28 05:02:26,208 INFO L78 Accepts]: Start accepts. Automaton has 1794 states and 2390 transitions. Word has length 351 [2024-11-28 05:02:26,209 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 05:02:26,211 INFO L471 AbstractCegarLoop]: Abstraction has 1794 states and 2390 transitions. [2024-11-28 05:02:26,211 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 5 states have (on average 55.8) internal successors, (279), 6 states have internal predecessors, (279), 3 states have call successors, (6), 2 states have call predecessors, (6), 3 states have return successors, (6), 2 states have call predecessors, (6), 3 states have call successors, (6) [2024-11-28 05:02:26,212 INFO L276 IsEmpty]: Start isEmpty. Operand 1794 states and 2390 transitions. [2024-11-28 05:02:26,216 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 354 [2024-11-28 05:02:26,216 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 05:02:26,216 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 05:02:26,233 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e79ab4e9-2c15-41d1-a9a3-9aa0806e687c/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Ended with exit code 0 [2024-11-28 05:02:26,417 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable42,7 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e79ab4e9-2c15-41d1-a9a3-9aa0806e687c/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-28 05:02:26,417 INFO L396 AbstractCegarLoop]: === Iteration 44 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 05:02:26,417 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 05:02:26,417 INFO L85 PathProgramCache]: Analyzing trace with hash 325124609, now seen corresponding path program 1 times [2024-11-28 05:02:26,417 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 05:02:26,417 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2002720089] [2024-11-28 05:02:26,418 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 05:02:26,418 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 05:02:27,138 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 05:02:28,013 INFO L134 CoverageAnalysis]: Checked inductivity of 151 backedges. 91 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-28 05:02:28,014 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 05:02:28,014 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2002720089] [2024-11-28 05:02:28,014 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2002720089] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 05:02:28,014 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 05:02:28,014 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2024-11-28 05:02:28,014 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [251923578] [2024-11-28 05:02:28,014 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 05:02:28,015 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 9 states [2024-11-28 05:02:28,015 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 05:02:28,015 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2024-11-28 05:02:28,015 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=52, Unknown=0, NotChecked=0, Total=72 [2024-11-28 05:02:28,015 INFO L87 Difference]: Start difference. First operand 1794 states and 2390 transitions. Second operand has 9 states, 9 states have (on average 36.22222222222222) internal successors, (326), 9 states have internal predecessors, (326), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) [2024-11-28 05:02:29,167 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 05:02:29,167 INFO L93 Difference]: Finished difference Result 3196 states and 4226 transitions. [2024-11-28 05:02:29,168 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2024-11-28 05:02:29,168 INFO L78 Accepts]: Start accepts. Automaton has has 9 states, 9 states have (on average 36.22222222222222) internal successors, (326), 9 states have internal predecessors, (326), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) Word has length 353 [2024-11-28 05:02:29,168 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 05:02:29,171 INFO L225 Difference]: With dead ends: 3196 [2024-11-28 05:02:29,171 INFO L226 Difference]: Without dead ends: 2647 [2024-11-28 05:02:29,171 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=43, Invalid=113, Unknown=0, NotChecked=0, Total=156 [2024-11-28 05:02:29,172 INFO L435 NwaCegarLoop]: 589 mSDtfsCounter, 820 mSDsluCounter, 2700 mSDsCounter, 0 mSdLazyCounter, 1467 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.9s Time, 0 mProtectedPredicate, 0 mProtectedAction, 821 SdHoareTripleChecker+Valid, 3289 SdHoareTripleChecker+Invalid, 1471 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 1467 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.0s IncrementalHoareTripleChecker+Time [2024-11-28 05:02:29,172 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [821 Valid, 3289 Invalid, 1471 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 1467 Invalid, 0 Unknown, 0 Unchecked, 1.0s Time] [2024-11-28 05:02:29,174 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2647 states. [2024-11-28 05:02:29,214 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2647 to 2399. [2024-11-28 05:02:29,217 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2399 states, 2369 states have (on average 1.3013929928239765) internal successors, (3083), 2369 states have internal predecessors, (3083), 28 states have call successors, (28), 1 states have call predecessors, (28), 1 states have return successors, (28), 28 states have call predecessors, (28), 28 states have call successors, (28) [2024-11-28 05:02:29,219 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2399 states to 2399 states and 3139 transitions. [2024-11-28 05:02:29,220 INFO L78 Accepts]: Start accepts. Automaton has 2399 states and 3139 transitions. Word has length 353 [2024-11-28 05:02:29,220 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 05:02:29,220 INFO L471 AbstractCegarLoop]: Abstraction has 2399 states and 3139 transitions. [2024-11-28 05:02:29,220 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 9 states, 9 states have (on average 36.22222222222222) internal successors, (326), 9 states have internal predecessors, (326), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) [2024-11-28 05:02:29,220 INFO L276 IsEmpty]: Start isEmpty. Operand 2399 states and 3139 transitions. [2024-11-28 05:02:29,223 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 354 [2024-11-28 05:02:29,223 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 05:02:29,223 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 05:02:29,224 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable43 [2024-11-28 05:02:29,224 INFO L396 AbstractCegarLoop]: === Iteration 45 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 05:02:29,224 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 05:02:29,224 INFO L85 PathProgramCache]: Analyzing trace with hash -658268286, now seen corresponding path program 1 times [2024-11-28 05:02:29,224 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 05:02:29,224 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [86616840] [2024-11-28 05:02:29,224 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 05:02:29,225 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 05:02:29,981 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 05:02:31,642 INFO L134 CoverageAnalysis]: Checked inductivity of 149 backedges. 39 proven. 0 refuted. 0 times theorem prover too weak. 110 trivial. 0 not checked. [2024-11-28 05:02:31,642 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 05:02:31,642 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [86616840] [2024-11-28 05:02:31,643 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [86616840] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 05:02:31,643 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 05:02:31,643 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2024-11-28 05:02:31,643 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [671112438] [2024-11-28 05:02:31,643 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 05:02:31,643 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 10 states [2024-11-28 05:02:31,643 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 05:02:31,644 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2024-11-28 05:02:31,644 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=69, Unknown=0, NotChecked=0, Total=90 [2024-11-28 05:02:31,644 INFO L87 Difference]: Start difference. First operand 2399 states and 3139 transitions. Second operand has 10 states, 10 states have (on average 28.2) internal successors, (282), 10 states have internal predecessors, (282), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) [2024-11-28 05:02:32,085 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 05:02:32,086 INFO L93 Difference]: Finished difference Result 4470 states and 5836 transitions. [2024-11-28 05:02:32,086 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2024-11-28 05:02:32,086 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 10 states have (on average 28.2) internal successors, (282), 10 states have internal predecessors, (282), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) Word has length 353 [2024-11-28 05:02:32,087 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 05:02:32,093 INFO L225 Difference]: With dead ends: 4470 [2024-11-28 05:02:32,093 INFO L226 Difference]: Without dead ends: 3234 [2024-11-28 05:02:32,095 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 21 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=48, Invalid=162, Unknown=0, NotChecked=0, Total=210 [2024-11-28 05:02:32,096 INFO L435 NwaCegarLoop]: 820 mSDtfsCounter, 1664 mSDsluCounter, 5039 mSDsCounter, 0 mSdLazyCounter, 425 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1669 SdHoareTripleChecker+Valid, 5859 SdHoareTripleChecker+Invalid, 429 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 425 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2024-11-28 05:02:32,096 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1669 Valid, 5859 Invalid, 429 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 425 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2024-11-28 05:02:32,099 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3234 states. [2024-11-28 05:02:32,153 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3234 to 2527. [2024-11-28 05:02:32,155 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2527 states, 2491 states have (on average 1.2994781212364512) internal successors, (3237), 2491 states have internal predecessors, (3237), 34 states have call successors, (34), 1 states have call predecessors, (34), 1 states have return successors, (34), 34 states have call predecessors, (34), 34 states have call successors, (34) [2024-11-28 05:02:32,159 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2527 states to 2527 states and 3305 transitions. [2024-11-28 05:02:32,159 INFO L78 Accepts]: Start accepts. Automaton has 2527 states and 3305 transitions. Word has length 353 [2024-11-28 05:02:32,160 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 05:02:32,160 INFO L471 AbstractCegarLoop]: Abstraction has 2527 states and 3305 transitions. [2024-11-28 05:02:32,160 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 10 states, 10 states have (on average 28.2) internal successors, (282), 10 states have internal predecessors, (282), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) [2024-11-28 05:02:32,160 INFO L276 IsEmpty]: Start isEmpty. Operand 2527 states and 3305 transitions. [2024-11-28 05:02:32,164 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 354 [2024-11-28 05:02:32,164 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 05:02:32,164 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 05:02:32,164 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable44 [2024-11-28 05:02:32,164 INFO L396 AbstractCegarLoop]: === Iteration 46 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 05:02:32,165 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 05:02:32,165 INFO L85 PathProgramCache]: Analyzing trace with hash -1153544926, now seen corresponding path program 1 times [2024-11-28 05:02:32,165 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 05:02:32,165 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1669343460] [2024-11-28 05:02:32,165 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 05:02:32,165 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 05:02:33,579 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 05:02:35,500 INFO L134 CoverageAnalysis]: Checked inductivity of 147 backedges. 2 proven. 85 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-28 05:02:35,501 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 05:02:35,501 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1669343460] [2024-11-28 05:02:35,501 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1669343460] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-28 05:02:35,501 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [918941191] [2024-11-28 05:02:35,501 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 05:02:35,501 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-28 05:02:35,501 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e79ab4e9-2c15-41d1-a9a3-9aa0806e687c/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 05:02:35,505 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e79ab4e9-2c15-41d1-a9a3-9aa0806e687c/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-28 05:02:35,506 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e79ab4e9-2c15-41d1-a9a3-9aa0806e687c/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2024-11-28 05:02:37,542 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 05:02:37,551 INFO L256 TraceCheckSpWp]: Trace formula consists of 2073 conjuncts, 11 conjuncts are in the unsatisfiable core [2024-11-28 05:02:37,558 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-28 05:02:37,648 INFO L134 CoverageAnalysis]: Checked inductivity of 147 backedges. 57 proven. 0 refuted. 0 times theorem prover too weak. 90 trivial. 0 not checked. [2024-11-28 05:02:37,648 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-11-28 05:02:37,648 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [918941191] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 05:02:37,648 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-11-28 05:02:37,648 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [13] total 17 [2024-11-28 05:02:37,649 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1478039111] [2024-11-28 05:02:37,649 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 05:02:37,649 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-11-28 05:02:37,649 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 05:02:37,650 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-11-28 05:02:37,650 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=35, Invalid=237, Unknown=0, NotChecked=0, Total=272 [2024-11-28 05:02:37,650 INFO L87 Difference]: Start difference. First operand 2527 states and 3305 transitions. Second operand has 6 states, 5 states have (on average 55.2) internal successors, (276), 6 states have internal predecessors, (276), 3 states have call successors, (5), 2 states have call predecessors, (5), 3 states have return successors, (5), 2 states have call predecessors, (5), 3 states have call successors, (5) [2024-11-28 05:02:37,764 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 05:02:37,764 INFO L93 Difference]: Finished difference Result 4575 states and 5963 transitions. [2024-11-28 05:02:37,765 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-28 05:02:37,765 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 5 states have (on average 55.2) internal successors, (276), 6 states have internal predecessors, (276), 3 states have call successors, (5), 2 states have call predecessors, (5), 3 states have return successors, (5), 2 states have call predecessors, (5), 3 states have call successors, (5) Word has length 353 [2024-11-28 05:02:37,765 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 05:02:37,771 INFO L225 Difference]: With dead ends: 4575 [2024-11-28 05:02:37,771 INFO L226 Difference]: Without dead ends: 2527 [2024-11-28 05:02:37,774 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 368 GetRequests, 351 SyntacticMatches, 2 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 36 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=35, Invalid=237, Unknown=0, NotChecked=0, Total=272 [2024-11-28 05:02:37,774 INFO L435 NwaCegarLoop]: 543 mSDtfsCounter, 0 mSDsluCounter, 2153 mSDsCounter, 0 mSdLazyCounter, 39 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 2696 SdHoareTripleChecker+Invalid, 39 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 39 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-28 05:02:37,775 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 2696 Invalid, 39 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 39 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-28 05:02:37,777 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2527 states. [2024-11-28 05:02:37,846 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2527 to 2527. [2024-11-28 05:02:37,848 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2527 states, 2491 states have (on average 1.2966680048173425) internal successors, (3230), 2491 states have internal predecessors, (3230), 34 states have call successors, (34), 1 states have call predecessors, (34), 1 states have return successors, (34), 34 states have call predecessors, (34), 34 states have call successors, (34) [2024-11-28 05:02:37,855 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2527 states to 2527 states and 3298 transitions. [2024-11-28 05:02:37,856 INFO L78 Accepts]: Start accepts. Automaton has 2527 states and 3298 transitions. Word has length 353 [2024-11-28 05:02:37,856 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 05:02:37,856 INFO L471 AbstractCegarLoop]: Abstraction has 2527 states and 3298 transitions. [2024-11-28 05:02:37,856 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 5 states have (on average 55.2) internal successors, (276), 6 states have internal predecessors, (276), 3 states have call successors, (5), 2 states have call predecessors, (5), 3 states have return successors, (5), 2 states have call predecessors, (5), 3 states have call successors, (5) [2024-11-28 05:02:37,857 INFO L276 IsEmpty]: Start isEmpty. Operand 2527 states and 3298 transitions. [2024-11-28 05:02:37,863 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 354 [2024-11-28 05:02:37,864 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 05:02:37,864 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 05:02:37,882 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e79ab4e9-2c15-41d1-a9a3-9aa0806e687c/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Forceful destruction successful, exit code 0 [2024-11-28 05:02:38,065 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable45,8 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e79ab4e9-2c15-41d1-a9a3-9aa0806e687c/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-28 05:02:38,065 INFO L396 AbstractCegarLoop]: === Iteration 47 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 05:02:38,065 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 05:02:38,066 INFO L85 PathProgramCache]: Analyzing trace with hash 1414674721, now seen corresponding path program 1 times [2024-11-28 05:02:38,066 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 05:02:38,066 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [126176703] [2024-11-28 05:02:38,066 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 05:02:38,066 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 05:02:38,817 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 05:02:39,306 INFO L134 CoverageAnalysis]: Checked inductivity of 149 backedges. 89 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-28 05:02:39,306 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 05:02:39,306 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [126176703] [2024-11-28 05:02:39,306 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [126176703] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 05:02:39,306 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 05:02:39,306 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-11-28 05:02:39,306 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1642141755] [2024-11-28 05:02:39,306 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 05:02:39,307 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-11-28 05:02:39,307 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 05:02:39,307 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-11-28 05:02:39,307 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2024-11-28 05:02:39,308 INFO L87 Difference]: Start difference. First operand 2527 states and 3298 transitions. Second operand has 6 states, 6 states have (on average 54.333333333333336) internal successors, (326), 6 states have internal predecessors, (326), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-28 05:02:39,927 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 05:02:39,927 INFO L93 Difference]: Finished difference Result 4017 states and 5259 transitions. [2024-11-28 05:02:39,928 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-28 05:02:39,928 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 54.333333333333336) internal successors, (326), 6 states have internal predecessors, (326), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 353 [2024-11-28 05:02:39,928 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 05:02:39,935 INFO L225 Difference]: With dead ends: 4017 [2024-11-28 05:02:39,935 INFO L226 Difference]: Without dead ends: 3424 [2024-11-28 05:02:39,937 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2024-11-28 05:02:39,937 INFO L435 NwaCegarLoop]: 693 mSDtfsCounter, 742 mSDsluCounter, 1758 mSDsCounter, 0 mSdLazyCounter, 974 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 745 SdHoareTripleChecker+Valid, 2451 SdHoareTripleChecker+Invalid, 975 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 974 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2024-11-28 05:02:39,938 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [745 Valid, 2451 Invalid, 975 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 974 Invalid, 0 Unknown, 0 Unchecked, 0.6s Time] [2024-11-28 05:02:39,940 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3424 states. [2024-11-28 05:02:39,992 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3424 to 2601. [2024-11-28 05:02:39,995 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2601 states, 2563 states have (on average 1.298088177916504) internal successors, (3327), 2563 states have internal predecessors, (3327), 36 states have call successors, (36), 1 states have call predecessors, (36), 1 states have return successors, (36), 36 states have call predecessors, (36), 36 states have call successors, (36) [2024-11-28 05:02:39,999 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2601 states to 2601 states and 3399 transitions. [2024-11-28 05:02:39,999 INFO L78 Accepts]: Start accepts. Automaton has 2601 states and 3399 transitions. Word has length 353 [2024-11-28 05:02:40,000 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 05:02:40,000 INFO L471 AbstractCegarLoop]: Abstraction has 2601 states and 3399 transitions. [2024-11-28 05:02:40,000 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 54.333333333333336) internal successors, (326), 6 states have internal predecessors, (326), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-28 05:02:40,000 INFO L276 IsEmpty]: Start isEmpty. Operand 2601 states and 3399 transitions. [2024-11-28 05:02:40,004 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 354 [2024-11-28 05:02:40,004 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 05:02:40,004 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 05:02:40,005 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable46 [2024-11-28 05:02:40,005 INFO L396 AbstractCegarLoop]: === Iteration 48 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 05:02:40,005 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 05:02:40,005 INFO L85 PathProgramCache]: Analyzing trace with hash 420471906, now seen corresponding path program 1 times [2024-11-28 05:02:40,006 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 05:02:40,006 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1845754127] [2024-11-28 05:02:40,006 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 05:02:40,006 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 05:02:40,928 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 05:02:42,033 INFO L134 CoverageAnalysis]: Checked inductivity of 149 backedges. 89 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-28 05:02:42,034 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 05:02:42,034 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1845754127] [2024-11-28 05:02:42,034 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1845754127] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 05:02:42,034 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 05:02:42,034 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2024-11-28 05:02:42,034 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [821690726] [2024-11-28 05:02:42,034 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 05:02:42,034 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 10 states [2024-11-28 05:02:42,034 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 05:02:42,035 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2024-11-28 05:02:42,035 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=27, Invalid=63, Unknown=0, NotChecked=0, Total=90 [2024-11-28 05:02:42,035 INFO L87 Difference]: Start difference. First operand 2601 states and 3399 transitions. Second operand has 10 states, 10 states have (on average 32.6) internal successors, (326), 10 states have internal predecessors, (326), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-28 05:02:43,202 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 05:02:43,202 INFO L93 Difference]: Finished difference Result 6713 states and 8777 transitions. [2024-11-28 05:02:43,203 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2024-11-28 05:02:43,203 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 10 states have (on average 32.6) internal successors, (326), 10 states have internal predecessors, (326), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 353 [2024-11-28 05:02:43,203 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 05:02:43,213 INFO L225 Difference]: With dead ends: 6713 [2024-11-28 05:02:43,214 INFO L226 Difference]: Without dead ends: 6120 [2024-11-28 05:02:43,215 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=47, Invalid=109, Unknown=0, NotChecked=0, Total=156 [2024-11-28 05:02:43,215 INFO L435 NwaCegarLoop]: 388 mSDtfsCounter, 2484 mSDsluCounter, 2652 mSDsCounter, 0 mSdLazyCounter, 1276 mSolverCounterSat, 6 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.9s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2490 SdHoareTripleChecker+Valid, 3040 SdHoareTripleChecker+Invalid, 1282 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 6 IncrementalHoareTripleChecker+Valid, 1276 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.0s IncrementalHoareTripleChecker+Time [2024-11-28 05:02:43,215 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2490 Valid, 3040 Invalid, 1282 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [6 Valid, 1276 Invalid, 0 Unknown, 0 Unchecked, 1.0s Time] [2024-11-28 05:02:43,218 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6120 states. [2024-11-28 05:02:43,286 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6120 to 2775. [2024-11-28 05:02:43,289 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2775 states, 2729 states have (on average 1.2975448882374496) internal successors, (3541), 2729 states have internal predecessors, (3541), 44 states have call successors, (44), 1 states have call predecessors, (44), 1 states have return successors, (44), 44 states have call predecessors, (44), 44 states have call successors, (44) [2024-11-28 05:02:43,293 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2775 states to 2775 states and 3629 transitions. [2024-11-28 05:02:43,293 INFO L78 Accepts]: Start accepts. Automaton has 2775 states and 3629 transitions. Word has length 353 [2024-11-28 05:02:43,294 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 05:02:43,294 INFO L471 AbstractCegarLoop]: Abstraction has 2775 states and 3629 transitions. [2024-11-28 05:02:43,294 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 10 states, 10 states have (on average 32.6) internal successors, (326), 10 states have internal predecessors, (326), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-28 05:02:43,294 INFO L276 IsEmpty]: Start isEmpty. Operand 2775 states and 3629 transitions. [2024-11-28 05:02:43,298 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 355 [2024-11-28 05:02:43,298 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 05:02:43,299 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 05:02:43,299 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable47 [2024-11-28 05:02:43,299 INFO L396 AbstractCegarLoop]: === Iteration 49 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 05:02:43,299 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 05:02:43,300 INFO L85 PathProgramCache]: Analyzing trace with hash -507611325, now seen corresponding path program 1 times [2024-11-28 05:02:43,300 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 05:02:43,300 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [899456078] [2024-11-28 05:02:43,300 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 05:02:43,300 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 05:02:43,510 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 05:02:44,150 INFO L134 CoverageAnalysis]: Checked inductivity of 149 backedges. 41 proven. 0 refuted. 0 times theorem prover too weak. 108 trivial. 0 not checked. [2024-11-28 05:02:44,150 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 05:02:44,150 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [899456078] [2024-11-28 05:02:44,150 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [899456078] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 05:02:44,151 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 05:02:44,151 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-11-28 05:02:44,151 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1341002056] [2024-11-28 05:02:44,151 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 05:02:44,151 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-11-28 05:02:44,151 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 05:02:44,152 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-11-28 05:02:44,152 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2024-11-28 05:02:44,152 INFO L87 Difference]: Start difference. First operand 2775 states and 3629 transitions. Second operand has 6 states, 6 states have (on average 47.5) internal successors, (285), 6 states have internal predecessors, (285), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-28 05:02:44,605 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 05:02:44,605 INFO L93 Difference]: Finished difference Result 4497 states and 5843 transitions. [2024-11-28 05:02:44,605 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-28 05:02:44,606 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 47.5) internal successors, (285), 6 states have internal predecessors, (285), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 354 [2024-11-28 05:02:44,606 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 05:02:44,611 INFO L225 Difference]: With dead ends: 4497 [2024-11-28 05:02:44,612 INFO L226 Difference]: Without dead ends: 2855 [2024-11-28 05:02:44,614 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2024-11-28 05:02:44,614 INFO L435 NwaCegarLoop]: 399 mSDtfsCounter, 503 mSDsluCounter, 1170 mSDsCounter, 0 mSdLazyCounter, 618 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 503 SdHoareTripleChecker+Valid, 1569 SdHoareTripleChecker+Invalid, 619 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 618 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2024-11-28 05:02:44,614 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [503 Valid, 1569 Invalid, 619 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 618 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2024-11-28 05:02:44,617 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2855 states. [2024-11-28 05:02:44,675 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2855 to 2815. [2024-11-28 05:02:44,678 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2815 states, 2769 states have (on average 1.2932466594438425) internal successors, (3581), 2769 states have internal predecessors, (3581), 44 states have call successors, (44), 1 states have call predecessors, (44), 1 states have return successors, (44), 44 states have call predecessors, (44), 44 states have call successors, (44) [2024-11-28 05:02:44,682 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2815 states to 2815 states and 3669 transitions. [2024-11-28 05:02:44,682 INFO L78 Accepts]: Start accepts. Automaton has 2815 states and 3669 transitions. Word has length 354 [2024-11-28 05:02:44,683 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 05:02:44,683 INFO L471 AbstractCegarLoop]: Abstraction has 2815 states and 3669 transitions. [2024-11-28 05:02:44,683 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 47.5) internal successors, (285), 6 states have internal predecessors, (285), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-28 05:02:44,683 INFO L276 IsEmpty]: Start isEmpty. Operand 2815 states and 3669 transitions. [2024-11-28 05:02:44,688 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 355 [2024-11-28 05:02:44,688 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 05:02:44,688 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 05:02:44,688 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable48 [2024-11-28 05:02:44,688 INFO L396 AbstractCegarLoop]: === Iteration 50 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 05:02:44,689 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 05:02:44,689 INFO L85 PathProgramCache]: Analyzing trace with hash 1200514099, now seen corresponding path program 1 times [2024-11-28 05:02:44,689 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 05:02:44,689 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1658329829] [2024-11-28 05:02:44,689 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 05:02:44,689 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 05:02:46,068 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 05:02:49,828 INFO L134 CoverageAnalysis]: Checked inductivity of 148 backedges. 50 proven. 38 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-28 05:02:49,828 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 05:02:49,828 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1658329829] [2024-11-28 05:02:49,829 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1658329829] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-28 05:02:49,829 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1069203602] [2024-11-28 05:02:49,829 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 05:02:49,829 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-28 05:02:49,829 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e79ab4e9-2c15-41d1-a9a3-9aa0806e687c/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 05:02:49,830 INFO L229 MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e79ab4e9-2c15-41d1-a9a3-9aa0806e687c/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-28 05:02:49,832 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e79ab4e9-2c15-41d1-a9a3-9aa0806e687c/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2024-11-28 05:02:52,241 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 05:02:52,250 INFO L256 TraceCheckSpWp]: Trace formula consists of 2076 conjuncts, 61 conjuncts are in the unsatisfiable core [2024-11-28 05:02:52,259 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-28 05:02:53,444 INFO L134 CoverageAnalysis]: Checked inductivity of 148 backedges. 120 proven. 4 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2024-11-28 05:02:53,444 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-28 05:02:55,433 INFO L134 CoverageAnalysis]: Checked inductivity of 148 backedges. 82 proven. 6 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-28 05:02:55,433 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1069203602] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-28 05:02:55,433 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-28 05:02:55,433 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 12, 12] total 37 [2024-11-28 05:02:55,433 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1198892039] [2024-11-28 05:02:55,433 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-28 05:02:55,434 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 37 states [2024-11-28 05:02:55,434 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 05:02:55,435 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 37 interpolants. [2024-11-28 05:02:55,436 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=180, Invalid=1152, Unknown=0, NotChecked=0, Total=1332 [2024-11-28 05:02:55,436 INFO L87 Difference]: Start difference. First operand 2815 states and 3669 transitions. Second operand has 37 states, 37 states have (on average 22.594594594594593) internal successors, (836), 37 states have internal predecessors, (836), 7 states have call successors, (18), 2 states have call predecessors, (18), 2 states have return successors, (18), 7 states have call predecessors, (18), 7 states have call successors, (18) [2024-11-28 05:03:03,446 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 05:03:03,446 INFO L93 Difference]: Finished difference Result 10782 states and 13983 transitions. [2024-11-28 05:03:03,446 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 71 states. [2024-11-28 05:03:03,447 INFO L78 Accepts]: Start accepts. Automaton has has 37 states, 37 states have (on average 22.594594594594593) internal successors, (836), 37 states have internal predecessors, (836), 7 states have call successors, (18), 2 states have call predecessors, (18), 2 states have return successors, (18), 7 states have call predecessors, (18), 7 states have call successors, (18) Word has length 354 [2024-11-28 05:03:03,447 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 05:03:03,453 INFO L225 Difference]: With dead ends: 10782 [2024-11-28 05:03:03,453 INFO L226 Difference]: Without dead ends: 8268 [2024-11-28 05:03:03,458 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 791 GetRequests, 689 SyntacticMatches, 0 SemanticMatches, 102 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2857 ImplicationChecksByTransitivity, 2.5s TimeCoverageRelationStatistics Valid=1362, Invalid=9350, Unknown=0, NotChecked=0, Total=10712 [2024-11-28 05:03:03,459 INFO L435 NwaCegarLoop]: 965 mSDtfsCounter, 3968 mSDsluCounter, 18575 mSDsCounter, 0 mSdLazyCounter, 11066 mSolverCounterSat, 45 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 5.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 3971 SdHoareTripleChecker+Valid, 19540 SdHoareTripleChecker+Invalid, 11111 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.1s SdHoareTripleChecker+Time, 45 IncrementalHoareTripleChecker+Valid, 11066 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 5.8s IncrementalHoareTripleChecker+Time [2024-11-28 05:03:03,459 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [3971 Valid, 19540 Invalid, 11111 Unknown, 0 Unchecked, 0.1s Time], IncrementalHoareTripleChecker [45 Valid, 11066 Invalid, 0 Unknown, 0 Unchecked, 5.8s Time] [2024-11-28 05:03:03,463 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8268 states. [2024-11-28 05:03:03,620 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8268 to 4532. [2024-11-28 05:03:03,625 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4532 states, 4461 states have (on average 1.2880520062766196) internal successors, (5746), 4461 states have internal predecessors, (5746), 69 states have call successors, (69), 1 states have call predecessors, (69), 1 states have return successors, (69), 69 states have call predecessors, (69), 69 states have call successors, (69) [2024-11-28 05:03:03,631 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4532 states to 4532 states and 5884 transitions. [2024-11-28 05:03:03,634 INFO L78 Accepts]: Start accepts. Automaton has 4532 states and 5884 transitions. Word has length 354 [2024-11-28 05:03:03,635 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 05:03:03,635 INFO L471 AbstractCegarLoop]: Abstraction has 4532 states and 5884 transitions. [2024-11-28 05:03:03,636 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 37 states, 37 states have (on average 22.594594594594593) internal successors, (836), 37 states have internal predecessors, (836), 7 states have call successors, (18), 2 states have call predecessors, (18), 2 states have return successors, (18), 7 states have call predecessors, (18), 7 states have call successors, (18) [2024-11-28 05:03:03,636 INFO L276 IsEmpty]: Start isEmpty. Operand 4532 states and 5884 transitions. [2024-11-28 05:03:03,642 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 355 [2024-11-28 05:03:03,642 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 05:03:03,642 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 05:03:03,661 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e79ab4e9-2c15-41d1-a9a3-9aa0806e687c/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Ended with exit code 0 [2024-11-28 05:03:03,843 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 9 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e79ab4e9-2c15-41d1-a9a3-9aa0806e687c/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable49 [2024-11-28 05:03:03,843 INFO L396 AbstractCegarLoop]: === Iteration 51 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 05:03:03,844 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 05:03:03,844 INFO L85 PathProgramCache]: Analyzing trace with hash 1183100303, now seen corresponding path program 1 times [2024-11-28 05:03:03,844 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 05:03:03,844 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2121925015] [2024-11-28 05:03:03,844 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 05:03:03,844 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 05:03:04,681 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 05:03:05,532 INFO L134 CoverageAnalysis]: Checked inductivity of 147 backedges. 33 proven. 0 refuted. 0 times theorem prover too weak. 114 trivial. 0 not checked. [2024-11-28 05:03:05,532 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 05:03:05,532 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2121925015] [2024-11-28 05:03:05,532 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2121925015] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 05:03:05,532 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 05:03:05,533 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2024-11-28 05:03:05,533 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1940140625] [2024-11-28 05:03:05,533 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 05:03:05,533 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 9 states [2024-11-28 05:03:05,533 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 05:03:05,534 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2024-11-28 05:03:05,534 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=48, Unknown=0, NotChecked=0, Total=72 [2024-11-28 05:03:05,534 INFO L87 Difference]: Start difference. First operand 4532 states and 5884 transitions. Second operand has 9 states, 9 states have (on average 31.0) internal successors, (279), 9 states have internal predecessors, (279), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-28 05:03:06,437 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 05:03:06,437 INFO L93 Difference]: Finished difference Result 10753 states and 13939 transitions. [2024-11-28 05:03:06,438 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2024-11-28 05:03:06,438 INFO L78 Accepts]: Start accepts. Automaton has has 9 states, 9 states have (on average 31.0) internal successors, (279), 9 states have internal predecessors, (279), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 354 [2024-11-28 05:03:06,438 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 05:03:06,443 INFO L225 Difference]: With dead ends: 10753 [2024-11-28 05:03:06,443 INFO L226 Difference]: Without dead ends: 7474 [2024-11-28 05:03:06,446 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=31, Invalid=59, Unknown=0, NotChecked=0, Total=90 [2024-11-28 05:03:06,447 INFO L435 NwaCegarLoop]: 389 mSDtfsCounter, 1238 mSDsluCounter, 2195 mSDsCounter, 0 mSdLazyCounter, 1081 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.7s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1244 SdHoareTripleChecker+Valid, 2584 SdHoareTripleChecker+Invalid, 1083 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 1081 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.8s IncrementalHoareTripleChecker+Time [2024-11-28 05:03:06,447 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1244 Valid, 2584 Invalid, 1083 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 1081 Invalid, 0 Unknown, 0 Unchecked, 0.8s Time] [2024-11-28 05:03:06,450 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7474 states. [2024-11-28 05:03:06,560 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7474 to 4870. [2024-11-28 05:03:06,564 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4870 states, 4783 states have (on average 1.2862220363788417) internal successors, (6152), 4783 states have internal predecessors, (6152), 85 states have call successors, (85), 1 states have call predecessors, (85), 1 states have return successors, (85), 85 states have call predecessors, (85), 85 states have call successors, (85) [2024-11-28 05:03:06,571 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4870 states to 4870 states and 6322 transitions. [2024-11-28 05:03:06,571 INFO L78 Accepts]: Start accepts. Automaton has 4870 states and 6322 transitions. Word has length 354 [2024-11-28 05:03:06,572 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 05:03:06,572 INFO L471 AbstractCegarLoop]: Abstraction has 4870 states and 6322 transitions. [2024-11-28 05:03:06,572 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 9 states, 9 states have (on average 31.0) internal successors, (279), 9 states have internal predecessors, (279), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-28 05:03:06,572 INFO L276 IsEmpty]: Start isEmpty. Operand 4870 states and 6322 transitions. [2024-11-28 05:03:06,579 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 355 [2024-11-28 05:03:06,579 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 05:03:06,579 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 05:03:06,579 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable50 [2024-11-28 05:03:06,580 INFO L396 AbstractCegarLoop]: === Iteration 52 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 05:03:06,580 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 05:03:06,580 INFO L85 PathProgramCache]: Analyzing trace with hash 562660916, now seen corresponding path program 1 times [2024-11-28 05:03:06,580 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 05:03:06,580 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [869175096] [2024-11-28 05:03:06,580 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 05:03:06,581 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 05:03:07,591 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 05:03:09,043 INFO L134 CoverageAnalysis]: Checked inductivity of 147 backedges. 87 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-28 05:03:09,043 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 05:03:09,043 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [869175096] [2024-11-28 05:03:09,043 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [869175096] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 05:03:09,043 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 05:03:09,043 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2024-11-28 05:03:09,043 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1828752440] [2024-11-28 05:03:09,043 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 05:03:09,044 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 11 states [2024-11-28 05:03:09,044 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 05:03:09,045 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2024-11-28 05:03:09,045 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=26, Invalid=84, Unknown=0, NotChecked=0, Total=110 [2024-11-28 05:03:09,045 INFO L87 Difference]: Start difference. First operand 4870 states and 6322 transitions. Second operand has 11 states, 11 states have (on average 29.727272727272727) internal successors, (327), 11 states have internal predecessors, (327), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) [2024-11-28 05:03:10,422 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 05:03:10,423 INFO L93 Difference]: Finished difference Result 10074 states and 13086 transitions. [2024-11-28 05:03:10,423 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2024-11-28 05:03:10,423 INFO L78 Accepts]: Start accepts. Automaton has has 11 states, 11 states have (on average 29.727272727272727) internal successors, (327), 11 states have internal predecessors, (327), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) Word has length 354 [2024-11-28 05:03:10,424 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 05:03:10,432 INFO L225 Difference]: With dead ends: 10074 [2024-11-28 05:03:10,432 INFO L226 Difference]: Without dead ends: 8721 [2024-11-28 05:03:10,436 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 24 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=59, Invalid=181, Unknown=0, NotChecked=0, Total=240 [2024-11-28 05:03:10,437 INFO L435 NwaCegarLoop]: 434 mSDtfsCounter, 2002 mSDsluCounter, 2686 mSDsCounter, 0 mSdLazyCounter, 1531 mSolverCounterSat, 9 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2004 SdHoareTripleChecker+Valid, 3120 SdHoareTripleChecker+Invalid, 1540 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 9 IncrementalHoareTripleChecker+Valid, 1531 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.2s IncrementalHoareTripleChecker+Time [2024-11-28 05:03:10,437 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2004 Valid, 3120 Invalid, 1540 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [9 Valid, 1531 Invalid, 0 Unknown, 0 Unchecked, 1.2s Time] [2024-11-28 05:03:10,442 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8721 states. [2024-11-28 05:03:10,617 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8721 to 8546. [2024-11-28 05:03:10,623 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 8546 states, 8411 states have (on average 1.2824872191178218) internal successors, (10787), 8411 states have internal predecessors, (10787), 133 states have call successors, (133), 1 states have call predecessors, (133), 1 states have return successors, (133), 133 states have call predecessors, (133), 133 states have call successors, (133) [2024-11-28 05:03:10,635 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8546 states to 8546 states and 11053 transitions. [2024-11-28 05:03:10,637 INFO L78 Accepts]: Start accepts. Automaton has 8546 states and 11053 transitions. Word has length 354 [2024-11-28 05:03:10,638 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 05:03:10,638 INFO L471 AbstractCegarLoop]: Abstraction has 8546 states and 11053 transitions. [2024-11-28 05:03:10,638 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 11 states, 11 states have (on average 29.727272727272727) internal successors, (327), 11 states have internal predecessors, (327), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) [2024-11-28 05:03:10,638 INFO L276 IsEmpty]: Start isEmpty. Operand 8546 states and 11053 transitions. [2024-11-28 05:03:10,650 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 356 [2024-11-28 05:03:10,651 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 05:03:10,652 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 05:03:10,652 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable51 [2024-11-28 05:03:10,652 INFO L396 AbstractCegarLoop]: === Iteration 53 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 05:03:10,652 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 05:03:10,652 INFO L85 PathProgramCache]: Analyzing trace with hash 1341234832, now seen corresponding path program 1 times [2024-11-28 05:03:10,653 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 05:03:10,653 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2086262943] [2024-11-28 05:03:10,653 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 05:03:10,653 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 05:03:11,986 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 05:03:13,017 INFO L134 CoverageAnalysis]: Checked inductivity of 148 backedges. 85 proven. 3 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-28 05:03:13,017 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 05:03:13,017 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2086262943] [2024-11-28 05:03:13,017 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2086262943] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-28 05:03:13,017 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [568360709] [2024-11-28 05:03:13,018 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 05:03:13,018 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-28 05:03:13,018 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e79ab4e9-2c15-41d1-a9a3-9aa0806e687c/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 05:03:13,019 INFO L229 MonitoredProcess]: Starting monitored process 10 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e79ab4e9-2c15-41d1-a9a3-9aa0806e687c/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-28 05:03:13,020 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e79ab4e9-2c15-41d1-a9a3-9aa0806e687c/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process [2024-11-28 05:03:15,061 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 05:03:15,070 INFO L256 TraceCheckSpWp]: Trace formula consists of 2079 conjuncts, 11 conjuncts are in the unsatisfiable core [2024-11-28 05:03:15,074 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-28 05:03:15,132 INFO L134 CoverageAnalysis]: Checked inductivity of 148 backedges. 123 proven. 0 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-11-28 05:03:15,132 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-11-28 05:03:15,132 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [568360709] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 05:03:15,132 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-11-28 05:03:15,133 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [7] total 11 [2024-11-28 05:03:15,133 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2053268166] [2024-11-28 05:03:15,133 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 05:03:15,133 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-11-28 05:03:15,134 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 05:03:15,134 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-11-28 05:03:15,134 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=90, Unknown=0, NotChecked=0, Total=110 [2024-11-28 05:03:15,135 INFO L87 Difference]: Start difference. First operand 8546 states and 11053 transitions. Second operand has 6 states, 5 states have (on average 66.0) internal successors, (330), 6 states have internal predecessors, (330), 3 states have call successors, (6), 2 states have call predecessors, (6), 3 states have return successors, (6), 2 states have call predecessors, (6), 3 states have call successors, (6) [2024-11-28 05:03:15,331 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 05:03:15,331 INFO L93 Difference]: Finished difference Result 16633 states and 21476 transitions. [2024-11-28 05:03:15,332 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-28 05:03:15,332 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 5 states have (on average 66.0) internal successors, (330), 6 states have internal predecessors, (330), 3 states have call successors, (6), 2 states have call predecessors, (6), 3 states have return successors, (6), 2 states have call predecessors, (6), 3 states have call successors, (6) Word has length 355 [2024-11-28 05:03:15,332 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 05:03:15,339 INFO L225 Difference]: With dead ends: 16633 [2024-11-28 05:03:15,339 INFO L226 Difference]: Without dead ends: 8546 [2024-11-28 05:03:15,345 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 362 GetRequests, 353 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=20, Invalid=90, Unknown=0, NotChecked=0, Total=110 [2024-11-28 05:03:15,345 INFO L435 NwaCegarLoop]: 542 mSDtfsCounter, 0 mSDsluCounter, 2149 mSDsCounter, 0 mSdLazyCounter, 39 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 2691 SdHoareTripleChecker+Invalid, 39 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 39 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-28 05:03:15,345 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 2691 Invalid, 39 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 39 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-28 05:03:15,350 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8546 states. [2024-11-28 05:03:15,471 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8546 to 8546. [2024-11-28 05:03:15,475 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 8546 states, 8411 states have (on average 1.2802282725002971) internal successors, (10768), 8411 states have internal predecessors, (10768), 133 states have call successors, (133), 1 states have call predecessors, (133), 1 states have return successors, (133), 133 states have call predecessors, (133), 133 states have call successors, (133) [2024-11-28 05:03:15,483 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8546 states to 8546 states and 11034 transitions. [2024-11-28 05:03:15,484 INFO L78 Accepts]: Start accepts. Automaton has 8546 states and 11034 transitions. Word has length 355 [2024-11-28 05:03:15,484 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 05:03:15,485 INFO L471 AbstractCegarLoop]: Abstraction has 8546 states and 11034 transitions. [2024-11-28 05:03:15,485 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 5 states have (on average 66.0) internal successors, (330), 6 states have internal predecessors, (330), 3 states have call successors, (6), 2 states have call predecessors, (6), 3 states have return successors, (6), 2 states have call predecessors, (6), 3 states have call successors, (6) [2024-11-28 05:03:15,485 INFO L276 IsEmpty]: Start isEmpty. Operand 8546 states and 11034 transitions. [2024-11-28 05:03:15,492 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 357 [2024-11-28 05:03:15,492 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 05:03:15,492 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 05:03:15,505 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e79ab4e9-2c15-41d1-a9a3-9aa0806e687c/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Ended with exit code 0 [2024-11-28 05:03:15,692 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 10 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e79ab4e9-2c15-41d1-a9a3-9aa0806e687c/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable52 [2024-11-28 05:03:15,692 INFO L396 AbstractCegarLoop]: === Iteration 54 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 05:03:15,693 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 05:03:15,693 INFO L85 PathProgramCache]: Analyzing trace with hash -752288331, now seen corresponding path program 1 times [2024-11-28 05:03:15,693 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 05:03:15,693 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [382692882] [2024-11-28 05:03:15,693 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 05:03:15,693 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 05:03:16,994 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 05:03:18,652 INFO L134 CoverageAnalysis]: Checked inductivity of 149 backedges. 89 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-28 05:03:18,653 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 05:03:18,653 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [382692882] [2024-11-28 05:03:18,653 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [382692882] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 05:03:18,653 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 05:03:18,653 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2024-11-28 05:03:18,653 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1221201216] [2024-11-28 05:03:18,653 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 05:03:18,653 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 12 states [2024-11-28 05:03:18,653 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 05:03:18,654 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2024-11-28 05:03:18,654 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=34, Invalid=98, Unknown=0, NotChecked=0, Total=132 [2024-11-28 05:03:18,654 INFO L87 Difference]: Start difference. First operand 8546 states and 11034 transitions. Second operand has 12 states, 12 states have (on average 27.416666666666668) internal successors, (329), 12 states have internal predecessors, (329), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-28 05:03:20,775 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 05:03:20,775 INFO L93 Difference]: Finished difference Result 14451 states and 18824 transitions. [2024-11-28 05:03:20,775 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2024-11-28 05:03:20,776 INFO L78 Accepts]: Start accepts. Automaton has has 12 states, 12 states have (on average 27.416666666666668) internal successors, (329), 12 states have internal predecessors, (329), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 356 [2024-11-28 05:03:20,776 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 05:03:20,787 INFO L225 Difference]: With dead ends: 14451 [2024-11-28 05:03:20,788 INFO L226 Difference]: Without dead ends: 12104 [2024-11-28 05:03:20,793 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=54, Invalid=156, Unknown=0, NotChecked=0, Total=210 [2024-11-28 05:03:20,793 INFO L435 NwaCegarLoop]: 660 mSDtfsCounter, 1109 mSDsluCounter, 4991 mSDsCounter, 0 mSdLazyCounter, 3196 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1112 SdHoareTripleChecker+Valid, 5651 SdHoareTripleChecker+Invalid, 3196 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 3196 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.9s IncrementalHoareTripleChecker+Time [2024-11-28 05:03:20,793 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1112 Valid, 5651 Invalid, 3196 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 3196 Invalid, 0 Unknown, 0 Unchecked, 1.9s Time] [2024-11-28 05:03:20,800 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12104 states. [2024-11-28 05:03:20,954 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12104 to 9102. [2024-11-28 05:03:20,959 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 9102 states, 8950 states have (on average 1.2831284916201118) internal successors, (11484), 8950 states have internal predecessors, (11484), 150 states have call successors, (150), 1 states have call predecessors, (150), 1 states have return successors, (150), 150 states have call predecessors, (150), 150 states have call successors, (150) [2024-11-28 05:03:20,967 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9102 states to 9102 states and 11784 transitions. [2024-11-28 05:03:20,968 INFO L78 Accepts]: Start accepts. Automaton has 9102 states and 11784 transitions. Word has length 356 [2024-11-28 05:03:20,968 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 05:03:20,968 INFO L471 AbstractCegarLoop]: Abstraction has 9102 states and 11784 transitions. [2024-11-28 05:03:20,968 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 12 states, 12 states have (on average 27.416666666666668) internal successors, (329), 12 states have internal predecessors, (329), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-28 05:03:20,968 INFO L276 IsEmpty]: Start isEmpty. Operand 9102 states and 11784 transitions. [2024-11-28 05:03:20,975 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 357 [2024-11-28 05:03:20,975 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 05:03:20,975 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 05:03:20,975 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable53 [2024-11-28 05:03:20,975 INFO L396 AbstractCegarLoop]: === Iteration 55 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 05:03:20,975 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 05:03:20,976 INFO L85 PathProgramCache]: Analyzing trace with hash 1082671478, now seen corresponding path program 1 times [2024-11-28 05:03:20,976 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 05:03:20,976 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2060918110] [2024-11-28 05:03:20,976 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 05:03:20,976 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 05:03:22,455 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 05:03:23,265 INFO L134 CoverageAnalysis]: Checked inductivity of 151 backedges. 84 proven. 4 refuted. 0 times theorem prover too weak. 63 trivial. 0 not checked. [2024-11-28 05:03:23,265 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 05:03:23,266 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2060918110] [2024-11-28 05:03:23,266 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2060918110] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-28 05:03:23,266 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1928402163] [2024-11-28 05:03:23,266 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 05:03:23,266 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-28 05:03:23,266 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e79ab4e9-2c15-41d1-a9a3-9aa0806e687c/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 05:03:23,268 INFO L229 MonitoredProcess]: Starting monitored process 11 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e79ab4e9-2c15-41d1-a9a3-9aa0806e687c/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-28 05:03:23,269 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e79ab4e9-2c15-41d1-a9a3-9aa0806e687c/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Waiting until timeout for monitored process [2024-11-28 05:03:25,782 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 05:03:25,791 INFO L256 TraceCheckSpWp]: Trace formula consists of 2082 conjuncts, 47 conjuncts are in the unsatisfiable core [2024-11-28 05:03:25,799 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-28 05:03:26,667 INFO L134 CoverageAnalysis]: Checked inductivity of 151 backedges. 124 proven. 0 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2024-11-28 05:03:26,667 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-11-28 05:03:26,668 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1928402163] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 05:03:26,668 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-11-28 05:03:26,668 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [6] total 13 [2024-11-28 05:03:26,668 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [50104859] [2024-11-28 05:03:26,668 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 05:03:26,669 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 10 states [2024-11-28 05:03:26,669 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 05:03:26,669 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2024-11-28 05:03:26,669 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=35, Invalid=121, Unknown=0, NotChecked=0, Total=156 [2024-11-28 05:03:26,669 INFO L87 Difference]: Start difference. First operand 9102 states and 11784 transitions. Second operand has 10 states, 10 states have (on average 33.0) internal successors, (330), 10 states have internal predecessors, (330), 2 states have call successors, (6), 2 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-28 05:03:27,414 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 05:03:27,414 INFO L93 Difference]: Finished difference Result 17739 states and 22945 transitions. [2024-11-28 05:03:27,414 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2024-11-28 05:03:27,414 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 10 states have (on average 33.0) internal successors, (330), 10 states have internal predecessors, (330), 2 states have call successors, (6), 2 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 356 [2024-11-28 05:03:27,415 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 05:03:27,421 INFO L225 Difference]: With dead ends: 17739 [2024-11-28 05:03:27,421 INFO L226 Difference]: Without dead ends: 9102 [2024-11-28 05:03:27,427 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 363 GetRequests, 352 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=35, Invalid=121, Unknown=0, NotChecked=0, Total=156 [2024-11-28 05:03:27,428 INFO L435 NwaCegarLoop]: 380 mSDtfsCounter, 303 mSDsluCounter, 2234 mSDsCounter, 0 mSdLazyCounter, 1157 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 303 SdHoareTripleChecker+Valid, 2614 SdHoareTripleChecker+Invalid, 1159 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 1157 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2024-11-28 05:03:27,428 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [303 Valid, 2614 Invalid, 1159 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 1157 Invalid, 0 Unknown, 0 Unchecked, 0.6s Time] [2024-11-28 05:03:27,433 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9102 states. [2024-11-28 05:03:27,548 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9102 to 9048. [2024-11-28 05:03:27,553 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 9048 states, 8896 states have (on average 1.282486510791367) internal successors, (11409), 8896 states have internal predecessors, (11409), 150 states have call successors, (150), 1 states have call predecessors, (150), 1 states have return successors, (150), 150 states have call predecessors, (150), 150 states have call successors, (150) [2024-11-28 05:03:27,561 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9048 states to 9048 states and 11709 transitions. [2024-11-28 05:03:27,562 INFO L78 Accepts]: Start accepts. Automaton has 9048 states and 11709 transitions. Word has length 356 [2024-11-28 05:03:27,562 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 05:03:27,562 INFO L471 AbstractCegarLoop]: Abstraction has 9048 states and 11709 transitions. [2024-11-28 05:03:27,562 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 10 states, 10 states have (on average 33.0) internal successors, (330), 10 states have internal predecessors, (330), 2 states have call successors, (6), 2 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-28 05:03:27,562 INFO L276 IsEmpty]: Start isEmpty. Operand 9048 states and 11709 transitions. [2024-11-28 05:03:27,568 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 357 [2024-11-28 05:03:27,568 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 05:03:27,569 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 05:03:27,581 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e79ab4e9-2c15-41d1-a9a3-9aa0806e687c/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Ended with exit code 0 [2024-11-28 05:03:27,769 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 11 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e79ab4e9-2c15-41d1-a9a3-9aa0806e687c/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable54 [2024-11-28 05:03:27,769 INFO L396 AbstractCegarLoop]: === Iteration 56 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 05:03:27,770 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 05:03:27,770 INFO L85 PathProgramCache]: Analyzing trace with hash 2041114541, now seen corresponding path program 1 times [2024-11-28 05:03:27,770 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 05:03:27,770 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [910712796] [2024-11-28 05:03:27,770 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 05:03:27,770 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 05:03:29,137 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 05:03:31,059 INFO L134 CoverageAnalysis]: Checked inductivity of 150 backedges. 2 proven. 88 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-28 05:03:31,060 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 05:03:31,060 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [910712796] [2024-11-28 05:03:31,060 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [910712796] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-28 05:03:31,060 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [500903523] [2024-11-28 05:03:31,060 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 05:03:31,060 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-28 05:03:31,060 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e79ab4e9-2c15-41d1-a9a3-9aa0806e687c/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 05:03:31,063 INFO L229 MonitoredProcess]: Starting monitored process 12 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e79ab4e9-2c15-41d1-a9a3-9aa0806e687c/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-28 05:03:31,066 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e79ab4e9-2c15-41d1-a9a3-9aa0806e687c/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Waiting until timeout for monitored process [2024-11-28 05:03:33,738 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 05:03:33,747 INFO L256 TraceCheckSpWp]: Trace formula consists of 2082 conjuncts, 75 conjuncts are in the unsatisfiable core [2024-11-28 05:03:33,754 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-28 05:03:36,164 INFO L134 CoverageAnalysis]: Checked inductivity of 150 backedges. 36 proven. 54 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-28 05:03:36,164 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-28 05:03:42,018 INFO L134 CoverageAnalysis]: Checked inductivity of 150 backedges. 2 proven. 88 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-28 05:03:42,018 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [500903523] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-28 05:03:42,018 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-28 05:03:42,018 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 17, 17] total 43 [2024-11-28 05:03:42,018 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1489390229] [2024-11-28 05:03:42,018 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-28 05:03:42,019 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 43 states [2024-11-28 05:03:42,019 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 05:03:42,020 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 43 interpolants. [2024-11-28 05:03:42,021 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=196, Invalid=1610, Unknown=0, NotChecked=0, Total=1806 [2024-11-28 05:03:42,021 INFO L87 Difference]: Start difference. First operand 9048 states and 11709 transitions. Second operand has 43 states, 43 states have (on average 22.627906976744185) internal successors, (973), 43 states have internal predecessors, (973), 6 states have call successors, (18), 1 states have call predecessors, (18), 1 states have return successors, (18), 6 states have call predecessors, (18), 6 states have call successors, (18) [2024-11-28 05:03:45,670 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 05:03:45,670 INFO L93 Difference]: Finished difference Result 15639 states and 20209 transitions. [2024-11-28 05:03:45,670 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2024-11-28 05:03:45,671 INFO L78 Accepts]: Start accepts. Automaton has has 43 states, 43 states have (on average 22.627906976744185) internal successors, (973), 43 states have internal predecessors, (973), 6 states have call successors, (18), 1 states have call predecessors, (18), 1 states have return successors, (18), 6 states have call predecessors, (18), 6 states have call successors, (18) Word has length 356 [2024-11-28 05:03:45,671 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 05:03:45,678 INFO L225 Difference]: With dead ends: 15639 [2024-11-28 05:03:45,678 INFO L226 Difference]: Without dead ends: 9352 [2024-11-28 05:03:45,683 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 748 GetRequests, 683 SyntacticMatches, 2 SemanticMatches, 63 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1009 ImplicationChecksByTransitivity, 2.0s TimeCoverageRelationStatistics Valid=499, Invalid=3661, Unknown=0, NotChecked=0, Total=4160 [2024-11-28 05:03:45,683 INFO L435 NwaCegarLoop]: 488 mSDtfsCounter, 1194 mSDsluCounter, 9700 mSDsCounter, 0 mSdLazyCounter, 4681 mSolverCounterSat, 10 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 2.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1194 SdHoareTripleChecker+Valid, 10188 SdHoareTripleChecker+Invalid, 4691 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 10 IncrementalHoareTripleChecker+Valid, 4681 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 2.7s IncrementalHoareTripleChecker+Time [2024-11-28 05:03:45,683 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1194 Valid, 10188 Invalid, 4691 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [10 Valid, 4681 Invalid, 0 Unknown, 0 Unchecked, 2.7s Time] [2024-11-28 05:03:45,687 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9352 states. [2024-11-28 05:03:45,857 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9352 to 9240. [2024-11-28 05:03:45,862 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 9240 states, 9088 states have (on average 1.2773987676056338) internal successors, (11609), 9088 states have internal predecessors, (11609), 150 states have call successors, (150), 1 states have call predecessors, (150), 1 states have return successors, (150), 150 states have call predecessors, (150), 150 states have call successors, (150) [2024-11-28 05:03:45,870 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9240 states to 9240 states and 11909 transitions. [2024-11-28 05:03:45,871 INFO L78 Accepts]: Start accepts. Automaton has 9240 states and 11909 transitions. Word has length 356 [2024-11-28 05:03:45,871 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 05:03:45,871 INFO L471 AbstractCegarLoop]: Abstraction has 9240 states and 11909 transitions. [2024-11-28 05:03:45,871 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 43 states, 43 states have (on average 22.627906976744185) internal successors, (973), 43 states have internal predecessors, (973), 6 states have call successors, (18), 1 states have call predecessors, (18), 1 states have return successors, (18), 6 states have call predecessors, (18), 6 states have call successors, (18) [2024-11-28 05:03:45,871 INFO L276 IsEmpty]: Start isEmpty. Operand 9240 states and 11909 transitions. [2024-11-28 05:03:45,877 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 357 [2024-11-28 05:03:45,877 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 05:03:45,878 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 05:03:45,894 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e79ab4e9-2c15-41d1-a9a3-9aa0806e687c/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Forceful destruction successful, exit code 0 [2024-11-28 05:03:46,078 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 12 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e79ab4e9-2c15-41d1-a9a3-9aa0806e687c/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable55 [2024-11-28 05:03:46,078 INFO L396 AbstractCegarLoop]: === Iteration 57 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 05:03:46,078 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 05:03:46,079 INFO L85 PathProgramCache]: Analyzing trace with hash -152670903, now seen corresponding path program 1 times [2024-11-28 05:03:46,079 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 05:03:46,079 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1399695724] [2024-11-28 05:03:46,079 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 05:03:46,079 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 05:03:46,245 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 05:03:46,636 INFO L134 CoverageAnalysis]: Checked inductivity of 149 backedges. 53 proven. 0 refuted. 0 times theorem prover too weak. 96 trivial. 0 not checked. [2024-11-28 05:03:46,637 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 05:03:46,637 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1399695724] [2024-11-28 05:03:46,637 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1399695724] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 05:03:46,637 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 05:03:46,637 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-28 05:03:46,637 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1172220216] [2024-11-28 05:03:46,637 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 05:03:46,637 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-28 05:03:46,637 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 05:03:46,638 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-28 05:03:46,638 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-28 05:03:46,638 INFO L87 Difference]: Start difference. First operand 9240 states and 11909 transitions. Second operand has 5 states, 5 states have (on average 60.0) internal successors, (300), 5 states have internal predecessors, (300), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-28 05:03:46,870 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 05:03:46,870 INFO L93 Difference]: Finished difference Result 15679 states and 20179 transitions. [2024-11-28 05:03:46,871 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-28 05:03:46,871 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 60.0) internal successors, (300), 5 states have internal predecessors, (300), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 356 [2024-11-28 05:03:46,871 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 05:03:46,881 INFO L225 Difference]: With dead ends: 15679 [2024-11-28 05:03:46,881 INFO L226 Difference]: Without dead ends: 9264 [2024-11-28 05:03:46,887 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-28 05:03:46,888 INFO L435 NwaCegarLoop]: 541 mSDtfsCounter, 0 mSDsluCounter, 1607 mSDsCounter, 0 mSdLazyCounter, 23 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 2148 SdHoareTripleChecker+Invalid, 24 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 23 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-28 05:03:46,888 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 2148 Invalid, 24 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 23 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-28 05:03:46,893 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9264 states. [2024-11-28 05:03:47,088 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9264 to 9264. [2024-11-28 05:03:47,095 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 9264 states, 9112 states have (on average 1.273595258999122) internal successors, (11605), 9112 states have internal predecessors, (11605), 150 states have call successors, (150), 1 states have call predecessors, (150), 1 states have return successors, (150), 150 states have call predecessors, (150), 150 states have call successors, (150) [2024-11-28 05:03:47,108 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9264 states to 9264 states and 11905 transitions. [2024-11-28 05:03:47,109 INFO L78 Accepts]: Start accepts. Automaton has 9264 states and 11905 transitions. Word has length 356 [2024-11-28 05:03:47,109 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 05:03:47,109 INFO L471 AbstractCegarLoop]: Abstraction has 9264 states and 11905 transitions. [2024-11-28 05:03:47,110 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 60.0) internal successors, (300), 5 states have internal predecessors, (300), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-28 05:03:47,110 INFO L276 IsEmpty]: Start isEmpty. Operand 9264 states and 11905 transitions. [2024-11-28 05:03:47,119 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 358 [2024-11-28 05:03:47,119 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 05:03:47,120 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 05:03:47,120 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable56 [2024-11-28 05:03:47,120 INFO L396 AbstractCegarLoop]: === Iteration 58 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 05:03:47,120 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 05:03:47,120 INFO L85 PathProgramCache]: Analyzing trace with hash 1171553710, now seen corresponding path program 1 times [2024-11-28 05:03:47,121 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 05:03:47,121 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1589789209] [2024-11-28 05:03:47,121 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 05:03:47,121 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 05:03:47,333 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 05:03:48,035 INFO L134 CoverageAnalysis]: Checked inductivity of 149 backedges. 89 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-28 05:03:48,035 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 05:03:48,035 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1589789209] [2024-11-28 05:03:48,035 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1589789209] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 05:03:48,035 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 05:03:48,036 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-11-28 05:03:48,036 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1582052829] [2024-11-28 05:03:48,036 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 05:03:48,036 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-11-28 05:03:48,036 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 05:03:48,037 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-11-28 05:03:48,037 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2024-11-28 05:03:48,037 INFO L87 Difference]: Start difference. First operand 9264 states and 11905 transitions. Second operand has 6 states, 6 states have (on average 55.0) internal successors, (330), 6 states have internal predecessors, (330), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-28 05:03:48,213 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 05:03:48,213 INFO L93 Difference]: Finished difference Result 13676 states and 17688 transitions. [2024-11-28 05:03:48,213 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-28 05:03:48,214 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 55.0) internal successors, (330), 6 states have internal predecessors, (330), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 357 [2024-11-28 05:03:48,214 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 05:03:48,221 INFO L225 Difference]: With dead ends: 13676 [2024-11-28 05:03:48,221 INFO L226 Difference]: Without dead ends: 10675 [2024-11-28 05:03:48,225 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2024-11-28 05:03:48,225 INFO L435 NwaCegarLoop]: 933 mSDtfsCounter, 369 mSDsluCounter, 3326 mSDsCounter, 0 mSdLazyCounter, 42 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 369 SdHoareTripleChecker+Valid, 4259 SdHoareTripleChecker+Invalid, 42 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 42 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-28 05:03:48,225 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [369 Valid, 4259 Invalid, 42 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 42 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-28 05:03:48,229 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10675 states. [2024-11-28 05:03:48,365 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10675 to 9276. [2024-11-28 05:03:48,371 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 9276 states, 9116 states have (on average 1.2716103554190434) internal successors, (11592), 9116 states have internal predecessors, (11592), 158 states have call successors, (158), 1 states have call predecessors, (158), 1 states have return successors, (158), 158 states have call predecessors, (158), 158 states have call successors, (158) [2024-11-28 05:03:48,380 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9276 states to 9276 states and 11908 transitions. [2024-11-28 05:03:48,381 INFO L78 Accepts]: Start accepts. Automaton has 9276 states and 11908 transitions. Word has length 357 [2024-11-28 05:03:48,382 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 05:03:48,382 INFO L471 AbstractCegarLoop]: Abstraction has 9276 states and 11908 transitions. [2024-11-28 05:03:48,382 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 55.0) internal successors, (330), 6 states have internal predecessors, (330), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-28 05:03:48,382 INFO L276 IsEmpty]: Start isEmpty. Operand 9276 states and 11908 transitions. [2024-11-28 05:03:48,390 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 358 [2024-11-28 05:03:48,390 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 05:03:48,390 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 05:03:48,390 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable57 [2024-11-28 05:03:48,390 INFO L396 AbstractCegarLoop]: === Iteration 59 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 05:03:48,391 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 05:03:48,391 INFO L85 PathProgramCache]: Analyzing trace with hash 414587049, now seen corresponding path program 1 times [2024-11-28 05:03:48,391 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 05:03:48,391 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [759176518] [2024-11-28 05:03:48,391 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 05:03:48,391 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 05:03:50,379 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-28 05:03:50,380 INFO L357 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-28 05:03:52,599 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-28 05:03:52,898 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-28 05:03:52,899 INFO L340 BasicCegarLoop]: Counterexample is feasible [2024-11-28 05:03:52,899 INFO L782 garLoopResultBuilder]: Registering result UNSAFE for location ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION (0 of 1 remaining) [2024-11-28 05:03:52,901 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable58 [2024-11-28 05:03:52,907 INFO L422 BasicCegarLoop]: Path program histogram: [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 05:03:53,204 INFO L170 ceAbstractionStarter]: Computing trace abstraction results [2024-11-28 05:03:53,207 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 28.11 05:03:53 BoogieIcfgContainer [2024-11-28 05:03:53,207 INFO L131 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2024-11-28 05:03:53,208 INFO L112 PluginConnector]: ------------------------Witness Printer---------------------------- [2024-11-28 05:03:53,208 INFO L270 PluginConnector]: Initializing Witness Printer... [2024-11-28 05:03:53,208 INFO L274 PluginConnector]: Witness Printer initialized [2024-11-28 05:03:53,209 INFO L184 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.11 05:01:05" (3/4) ... [2024-11-28 05:03:53,211 INFO L149 WitnessPrinter]: No result that supports witness generation found [2024-11-28 05:03:53,212 INFO L131 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2024-11-28 05:03:53,213 INFO L158 Benchmark]: Toolchain (without parser) took 170917.89ms. Allocated memory was 117.4MB in the beginning and 2.5GB in the end (delta: 2.3GB). Free memory was 91.7MB in the beginning and 1.3GB in the end (delta: -1.2GB). Peak memory consumption was 1.1GB. Max. memory is 16.1GB. [2024-11-28 05:03:53,213 INFO L158 Benchmark]: CDTParser took 0.37ms. Allocated memory is still 117.4MB. Free memory was 72.8MB in the beginning and 72.6MB in the end (delta: 146.9kB). There was no memory consumed. Max. memory is 16.1GB. [2024-11-28 05:03:53,213 INFO L158 Benchmark]: CACSL2BoogieTranslator took 608.50ms. Allocated memory is still 117.4MB. Free memory was 91.7MB in the beginning and 63.0MB in the end (delta: 28.6MB). Peak memory consumption was 33.6MB. Max. memory is 16.1GB. [2024-11-28 05:03:53,214 INFO L158 Benchmark]: Boogie Procedure Inliner took 240.13ms. Allocated memory is still 117.4MB. Free memory was 63.0MB in the beginning and 76.7MB in the end (delta: -13.7MB). Peak memory consumption was 41.6MB. Max. memory is 16.1GB. [2024-11-28 05:03:53,215 INFO L158 Benchmark]: Boogie Preprocessor took 313.89ms. Allocated memory is still 117.4MB. Free memory was 76.7MB in the beginning and 64.6MB in the end (delta: 12.1MB). Peak memory consumption was 17.2MB. Max. memory is 16.1GB. [2024-11-28 05:03:53,215 INFO L158 Benchmark]: RCFGBuilder took 2478.74ms. Allocated memory was 117.4MB in the beginning and 234.9MB in the end (delta: 117.4MB). Free memory was 64.6MB in the beginning and 65.0MB in the end (delta: -389.7kB). Peak memory consumption was 112.2MB. Max. memory is 16.1GB. [2024-11-28 05:03:53,215 INFO L158 Benchmark]: TraceAbstraction took 167264.74ms. Allocated memory was 234.9MB in the beginning and 2.5GB in the end (delta: 2.2GB). Free memory was 64.5MB in the beginning and 1.3GB in the end (delta: -1.3GB). Peak memory consumption was 975.0MB. Max. memory is 16.1GB. [2024-11-28 05:03:53,215 INFO L158 Benchmark]: Witness Printer took 4.44ms. Allocated memory is still 2.5GB. Free memory was 1.3GB in the beginning and 1.3GB in the end (delta: 216.3kB). There was no memory consumed. Max. memory is 16.1GB. [2024-11-28 05:03:53,216 INFO L338 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.37ms. Allocated memory is still 117.4MB. Free memory was 72.8MB in the beginning and 72.6MB in the end (delta: 146.9kB). There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 608.50ms. Allocated memory is still 117.4MB. Free memory was 91.7MB in the beginning and 63.0MB in the end (delta: 28.6MB). Peak memory consumption was 33.6MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 240.13ms. Allocated memory is still 117.4MB. Free memory was 63.0MB in the beginning and 76.7MB in the end (delta: -13.7MB). Peak memory consumption was 41.6MB. Max. memory is 16.1GB. * Boogie Preprocessor took 313.89ms. Allocated memory is still 117.4MB. Free memory was 76.7MB in the beginning and 64.6MB in the end (delta: 12.1MB). Peak memory consumption was 17.2MB. Max. memory is 16.1GB. * RCFGBuilder took 2478.74ms. Allocated memory was 117.4MB in the beginning and 234.9MB in the end (delta: 117.4MB). Free memory was 64.6MB in the beginning and 65.0MB in the end (delta: -389.7kB). Peak memory consumption was 112.2MB. Max. memory is 16.1GB. * TraceAbstraction took 167264.74ms. Allocated memory was 234.9MB in the beginning and 2.5GB in the end (delta: 2.2GB). Free memory was 64.5MB in the beginning and 1.3GB in the end (delta: -1.3GB). Peak memory consumption was 975.0MB. Max. memory is 16.1GB. * Witness Printer took 4.44ms. Allocated memory is still 2.5GB. Free memory was 1.3GB in the beginning and 1.3GB in the end (delta: 216.3kB). There was no memory consumed. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: ErrorAutomatonStatistics NumberErrorTraces: 0, NumberStatementsAllTraces: 0, NumberRelevantStatements: 0, 0.0s ErrorAutomatonConstructionTimeTotal, 0.0s FaulLocalizationTime, NumberStatementsFirstTrace: -1, TraceLengthAvg: 0, 0.0s ErrorAutomatonConstructionTimeAvg, 0.0s ErrorAutomatonDifferenceTimeAvg, 0.0s ErrorAutomatonDifferenceTimeTotal, NumberOfNoEnhancement: 0, NumberOfFiniteEnhancement: 0, NumberOfInfiniteEnhancement: 0 - UnprovableResult [Line: 21]: Unable to prove that a call to reach_error is unreachable Unable to prove that a call to reach_error is unreachable Reason: overapproximation of bitwiseOr at line 126, overapproximation of bitwiseOr at line 290, overapproximation of bitwiseOr at line 145, overapproximation of bitwiseAnd at line 365, overapproximation of bitwiseAnd at line 384, overapproximation of bitwiseAnd at line 146, overapproximation of bitwiseAnd at line 222, overapproximation of bitwiseAnd at line 110, overapproximation of bitwiseAnd at line 228, overapproximation of bitwiseAnd at line 234, overapproximation of bitwiseAnd at line 515, overapproximation of bitwiseAnd at line 441, overapproximation of bitwiseAnd at line 202, overapproximation of bitwiseAnd at line 210, overapproximation of bitwiseAnd at line 106, overapproximation of bitwiseAnd at line 403, overapproximation of bitwiseAnd at line 299. Possible FailurePath: [L26] const SORT_1 mask_SORT_1 = (SORT_1)-1 >> (sizeof(SORT_1) * 8 - 1); [L27] const SORT_1 msb_SORT_1 = (SORT_1)1 << (1 - 1); [L29] const SORT_3 mask_SORT_3 = (SORT_3)-1 >> (sizeof(SORT_3) * 8 - 64); [L30] const SORT_3 msb_SORT_3 = (SORT_3)1 << (64 - 1); [L32] const SORT_11 mask_SORT_11 = (SORT_11)-1 >> (sizeof(SORT_11) * 8 - 5); [L33] const SORT_11 msb_SORT_11 = (SORT_11)1 << (5 - 1); [L35] const SORT_13 mask_SORT_13 = (SORT_13)-1 >> (sizeof(SORT_13) * 8 - 4); [L36] const SORT_13 msb_SORT_13 = (SORT_13)1 << (4 - 1); [L38] const SORT_19 mask_SORT_19 = (SORT_19)-1 >> (sizeof(SORT_19) * 8 - 3); [L39] const SORT_19 msb_SORT_19 = (SORT_19)1 << (3 - 1); [L41] const SORT_40 mask_SORT_40 = (SORT_40)-1 >> (sizeof(SORT_40) * 8 - 2); [L42] const SORT_40 msb_SORT_40 = (SORT_40)1 << (2 - 1); [L44] const SORT_13 var_15 = 8; [L45] const SORT_19 var_20 = 7; [L46] const SORT_19 var_25 = 6; [L47] const SORT_19 var_30 = 5; [L48] const SORT_19 var_35 = 4; [L49] const SORT_40 var_41 = 3; [L50] const SORT_40 var_46 = 2; [L51] const SORT_1 var_51 = 1; [L52] const SORT_13 var_64 = 9; [L53] const SORT_11 var_81 = 0; [L54] const SORT_1 var_111 = 0; [L55] const SORT_3 var_268 = 0; [L57] SORT_1 input_2; [L58] SORT_3 input_4; [L59] SORT_1 input_5; [L60] SORT_1 input_6; [L61] SORT_1 input_7; [L62] SORT_1 input_8; [L63] SORT_3 input_9; [L64] SORT_1 input_109; [L66] EXPR __VERIFIER_nondet_ulong() & mask_SORT_3 VAL [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L66] SORT_3 state_10 = __VERIFIER_nondet_ulong() & mask_SORT_3; [L67] EXPR __VERIFIER_nondet_uchar() & mask_SORT_11 VAL [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L67] SORT_11 state_12 = __VERIFIER_nondet_uchar() & mask_SORT_11; [L68] EXPR __VERIFIER_nondet_ulong() & mask_SORT_3 VAL [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L68] SORT_3 state_18 = __VERIFIER_nondet_ulong() & mask_SORT_3; [L69] EXPR __VERIFIER_nondet_ulong() & mask_SORT_3 VAL [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_18=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L69] SORT_3 state_24 = __VERIFIER_nondet_ulong() & mask_SORT_3; [L70] EXPR __VERIFIER_nondet_ulong() & mask_SORT_3 VAL [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_18=0, state_24=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L70] SORT_3 state_29 = __VERIFIER_nondet_ulong() & mask_SORT_3; [L71] EXPR __VERIFIER_nondet_ulong() & mask_SORT_3 VAL [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L71] SORT_3 state_34 = __VERIFIER_nondet_ulong() & mask_SORT_3; [L72] EXPR __VERIFIER_nondet_ulong() & mask_SORT_3 VAL [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L72] SORT_3 state_39 = __VERIFIER_nondet_ulong() & mask_SORT_3; [L73] EXPR __VERIFIER_nondet_ulong() & mask_SORT_3 VAL [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L73] SORT_3 state_45 = __VERIFIER_nondet_ulong() & mask_SORT_3; [L74] EXPR __VERIFIER_nondet_ulong() & mask_SORT_3 VAL [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L74] SORT_3 state_50 = __VERIFIER_nondet_ulong() & mask_SORT_3; [L75] EXPR __VERIFIER_nondet_ulong() & mask_SORT_3 VAL [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L75] SORT_3 state_55 = __VERIFIER_nondet_ulong() & mask_SORT_3; [L76] EXPR __VERIFIER_nondet_uchar() & mask_SORT_11 VAL [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L76] SORT_11 state_60 = __VERIFIER_nondet_uchar() & mask_SORT_11; [L77] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L77] SORT_1 state_68 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L78] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L78] SORT_1 state_69 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L79] EXPR __VERIFIER_nondet_uchar() & mask_SORT_11 VAL [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L79] SORT_11 state_72 = __VERIFIER_nondet_uchar() & mask_SORT_11; [L80] EXPR __VERIFIER_nondet_ulong() & mask_SORT_3 VAL [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L80] SORT_3 state_87 = __VERIFIER_nondet_ulong() & mask_SORT_3; [L81] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L81] SORT_1 state_91 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L82] EXPR __VERIFIER_nondet_uchar() & mask_SORT_11 VAL [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L82] SORT_11 state_136 = __VERIFIER_nondet_uchar() & mask_SORT_11; [L84] SORT_1 init_92_arg_1 = var_51; [L85] state_91 = init_92_arg_1 VAL [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L88] input_2 = __VERIFIER_nondet_uchar() [L89] input_4 = __VERIFIER_nondet_ulong() [L90] input_5 = __VERIFIER_nondet_uchar() [L91] input_6 = __VERIFIER_nondet_uchar() [L92] input_7 = __VERIFIER_nondet_uchar() [L93] EXPR input_7 & mask_SORT_1 VAL [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L93] input_7 = input_7 & mask_SORT_1 [L94] input_8 = __VERIFIER_nondet_uchar() [L95] input_9 = __VERIFIER_nondet_ulong() [L96] input_109 = __VERIFIER_nondet_uchar() [L98] SORT_1 var_93_arg_0 = input_7; [L99] SORT_1 var_93_arg_1 = state_91; [L100] SORT_1 var_93 = var_93_arg_0 == var_93_arg_1; [L101] SORT_1 var_94_arg_0 = var_51; [L102] SORT_1 var_94 = ~var_94_arg_0; [L103] SORT_1 var_95_arg_0 = var_93; [L104] SORT_1 var_95_arg_1 = var_94; VAL [input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_95_arg_0=0, var_95_arg_1=-2] [L105] EXPR var_95_arg_0 | var_95_arg_1 VAL [input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L105] SORT_1 var_95 = var_95_arg_0 | var_95_arg_1; [L106] EXPR var_95 & mask_SORT_1 VAL [input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L106] var_95 = var_95 & mask_SORT_1 [L107] SORT_1 constr_96_arg_0 = var_95; VAL [constr_96_arg_0=1, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L108] CALL assume_abort_if_not(constr_96_arg_0) VAL [\old(cond)=1] [L22] COND FALSE !(!cond) VAL [\old(cond)=1] [L108] RET assume_abort_if_not(constr_96_arg_0) VAL [constr_96_arg_0=1, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L109] SORT_13 var_65_arg_0 = var_64; VAL [constr_96_arg_0=1, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_65_arg_0=9, var_81=0] [L110] EXPR var_65_arg_0 & mask_SORT_13 VAL [constr_96_arg_0=1, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L110] var_65_arg_0 = var_65_arg_0 & mask_SORT_13 [L111] SORT_11 var_65 = var_65_arg_0; [L112] SORT_11 var_66_arg_0 = state_60; [L113] SORT_11 var_66_arg_1 = var_65; [L114] SORT_1 var_66 = var_66_arg_0 == var_66_arg_1; [L115] SORT_1 var_97_arg_0 = var_66; [L116] SORT_1 var_97 = ~var_97_arg_0; [L117] SORT_1 var_98_arg_0 = input_6; [L118] SORT_1 var_98 = ~var_98_arg_0; [L119] SORT_1 var_99_arg_0 = var_97; [L120] SORT_1 var_99_arg_1 = var_98; VAL [constr_96_arg_0=1, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_99_arg_0=-1, var_99_arg_1=-1] [L121] EXPR var_99_arg_0 | var_99_arg_1 VAL [constr_96_arg_0=1, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L121] SORT_1 var_99 = var_99_arg_0 | var_99_arg_1; [L122] SORT_1 var_100_arg_0 = var_51; [L123] SORT_1 var_100 = ~var_100_arg_0; [L124] SORT_1 var_101_arg_0 = var_99; [L125] SORT_1 var_101_arg_1 = var_100; VAL [constr_96_arg_0=1, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_101_arg_0=255, var_101_arg_1=-2, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L126] EXPR var_101_arg_0 | var_101_arg_1 VAL [constr_96_arg_0=1, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L126] SORT_1 var_101 = var_101_arg_0 | var_101_arg_1; [L127] EXPR var_101 & mask_SORT_1 VAL [constr_96_arg_0=1, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L127] var_101 = var_101 & mask_SORT_1 [L128] SORT_1 constr_102_arg_0 = var_101; VAL [constr_102_arg_0=1, constr_96_arg_0=1, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L129] CALL assume_abort_if_not(constr_102_arg_0) VAL [\old(cond)=1] [L22] COND FALSE !(!cond) VAL [\old(cond)=1] [L129] RET assume_abort_if_not(constr_102_arg_0) VAL [constr_102_arg_0=1, constr_96_arg_0=1, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L130] SORT_11 var_61_arg_0 = state_60; [L131] SORT_1 var_61 = var_61_arg_0 != 0; [L132] SORT_1 var_62_arg_0 = var_61; [L133] SORT_1 var_62 = ~var_62_arg_0; [L134] SORT_1 var_103_arg_0 = var_62; [L135] SORT_1 var_103 = ~var_103_arg_0; [L136] SORT_1 var_104_arg_0 = input_5; [L137] SORT_1 var_104 = ~var_104_arg_0; [L138] SORT_1 var_105_arg_0 = var_103; [L139] SORT_1 var_105_arg_1 = var_104; VAL [constr_102_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_105_arg_0=-256, var_105_arg_1=-1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L140] EXPR var_105_arg_0 | var_105_arg_1 VAL [constr_102_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L140] SORT_1 var_105 = var_105_arg_0 | var_105_arg_1; [L141] SORT_1 var_106_arg_0 = var_51; [L142] SORT_1 var_106 = ~var_106_arg_0; [L143] SORT_1 var_107_arg_0 = var_105; [L144] SORT_1 var_107_arg_1 = var_106; VAL [constr_102_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_107_arg_0=255, var_107_arg_1=-2, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L145] EXPR var_107_arg_0 | var_107_arg_1 VAL [constr_102_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L145] SORT_1 var_107 = var_107_arg_0 | var_107_arg_1; [L146] EXPR var_107 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L146] var_107 = var_107 & mask_SORT_1 [L147] SORT_1 constr_108_arg_0 = var_107; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L148] CALL assume_abort_if_not(constr_108_arg_0) VAL [\old(cond)=1] [L22] COND FALSE !(!cond) VAL [\old(cond)=1] [L148] RET assume_abort_if_not(constr_108_arg_0) VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L150] SORT_1 var_112_arg_0 = state_91; [L151] SORT_1 var_112_arg_1 = var_111; [L152] SORT_1 var_112_arg_2 = var_51; [L153] SORT_1 var_112 = var_112_arg_0 ? var_112_arg_1 : var_112_arg_2; [L154] SORT_1 var_70_arg_0 = state_69; [L155] SORT_1 var_70 = ~var_70_arg_0; [L156] SORT_1 var_71_arg_0 = state_68; [L157] SORT_1 var_71_arg_1 = var_70; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_71_arg_0=0, var_71_arg_1=-1, var_81=0] [L158] EXPR var_71_arg_0 & var_71_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L158] SORT_1 var_71 = var_71_arg_0 & var_71_arg_1; [L159] SORT_11 var_73_arg_0 = state_72; [L160] SORT_1 var_73 = var_73_arg_0 != 0; [L161] SORT_1 var_74_arg_0 = var_71; [L162] SORT_1 var_74_arg_1 = var_73; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_74_arg_0=0, var_74_arg_1=0, var_81=0] [L163] EXPR var_74_arg_0 & var_74_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L163] SORT_1 var_74 = var_74_arg_0 & var_74_arg_1; [L164] SORT_1 var_75_arg_0 = state_68; [L165] SORT_1 var_75 = ~var_75_arg_0; [L166] SORT_1 var_76_arg_0 = input_6; [L167] SORT_1 var_76_arg_1 = var_75; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_74=0, var_76_arg_0=0, var_76_arg_1=-1, var_81=0] [L168] EXPR var_76_arg_0 & var_76_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_74=0, var_81=0] [L168] SORT_1 var_76 = var_76_arg_0 & var_76_arg_1; [L169] SORT_1 var_77_arg_0 = var_76; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_74=0, var_77_arg_0=0, var_81=0] [L170] EXPR var_77_arg_0 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_74=0, var_81=0] [L170] var_77_arg_0 = var_77_arg_0 & mask_SORT_1 [L171] SORT_11 var_77 = var_77_arg_0; [L172] SORT_11 var_78_arg_0 = state_72; [L173] SORT_11 var_78_arg_1 = var_77; [L174] SORT_11 var_78 = var_78_arg_0 + var_78_arg_1; [L175] SORT_1 var_79_arg_0 = input_5; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_74=0, var_78=0, var_79_arg_0=0, var_81=0] [L176] EXPR var_79_arg_0 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_74=0, var_78=0, var_81=0] [L176] var_79_arg_0 = var_79_arg_0 & mask_SORT_1 [L177] SORT_11 var_79 = var_79_arg_0; [L178] SORT_11 var_80_arg_0 = var_78; [L179] SORT_11 var_80_arg_1 = var_79; [L180] SORT_11 var_80 = var_80_arg_0 - var_80_arg_1; [L181] SORT_1 var_82_arg_0 = input_7; [L182] SORT_11 var_82_arg_1 = var_81; [L183] SORT_11 var_82_arg_2 = var_80; [L184] SORT_11 var_82 = var_82_arg_0 ? var_82_arg_1 : var_82_arg_2; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_74=0, var_81=0, var_82=0] [L185] EXPR var_82 & mask_SORT_11 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_74=0, var_81=0] [L185] var_82 = var_82 & mask_SORT_11 [L186] SORT_11 var_83_arg_0 = var_82; [L187] SORT_1 var_83 = var_83_arg_0 != 0; [L188] SORT_1 var_84_arg_0 = var_83; [L189] SORT_1 var_84 = ~var_84_arg_0; [L190] SORT_1 var_85_arg_0 = var_74; [L191] SORT_1 var_85_arg_1 = var_84; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85_arg_0=0, var_85_arg_1=-1] [L192] EXPR var_85_arg_0 & var_85_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0] [L192] SORT_1 var_85 = var_85_arg_0 & var_85_arg_1; [L193] SORT_1 var_86_arg_0 = var_85; [L194] SORT_1 var_86 = ~var_86_arg_0; [L195] SORT_11 var_14_arg_0 = state_12; [L196] SORT_13 var_14 = var_14_arg_0 >> 0; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L197] EXPR var_14 & mask_SORT_13 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L197] var_14 = var_14 & mask_SORT_13 [L198] SORT_13 var_56_arg_0 = var_14; [L199] SORT_1 var_56 = var_56_arg_0 != 0; [L200] SORT_1 var_57_arg_0 = var_56; [L201] SORT_1 var_57 = ~var_57_arg_0; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_57=-1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L202] EXPR var_57 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L202] var_57 = var_57 & mask_SORT_1 [L203] SORT_1 var_52_arg_0 = var_51; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_52_arg_0=1, var_57=0, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L204] EXPR var_52_arg_0 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_57=0, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L204] var_52_arg_0 = var_52_arg_0 & mask_SORT_1 [L205] SORT_13 var_52 = var_52_arg_0; [L206] SORT_13 var_53_arg_0 = var_14; [L207] SORT_13 var_53_arg_1 = var_52; [L208] SORT_1 var_53 = var_53_arg_0 == var_53_arg_1; [L209] SORT_40 var_47_arg_0 = var_46; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_47_arg_0=2, var_51=1, var_53=0, var_57=0, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L210] EXPR var_47_arg_0 & mask_SORT_40 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_53=0, var_57=0, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L210] var_47_arg_0 = var_47_arg_0 & mask_SORT_40 [L211] SORT_13 var_47 = var_47_arg_0; [L212] SORT_13 var_48_arg_0 = var_14; [L213] SORT_13 var_48_arg_1 = var_47; [L214] SORT_1 var_48 = var_48_arg_0 == var_48_arg_1; [L215] SORT_40 var_42_arg_0 = var_41; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_42_arg_0=3, var_46=2, var_48=0, var_51=1, var_53=0, var_57=0, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L216] EXPR var_42_arg_0 & mask_SORT_40 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_48=0, var_51=1, var_53=0, var_57=0, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L216] var_42_arg_0 = var_42_arg_0 & mask_SORT_40 [L217] SORT_13 var_42 = var_42_arg_0; [L218] SORT_13 var_43_arg_0 = var_14; [L219] SORT_13 var_43_arg_1 = var_42; [L220] SORT_1 var_43 = var_43_arg_0 == var_43_arg_1; [L221] SORT_19 var_36_arg_0 = var_35; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_36_arg_0=4, var_41=3, var_43=0, var_46=2, var_48=0, var_51=1, var_53=0, var_57=0, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L222] EXPR var_36_arg_0 & mask_SORT_19 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_43=0, var_46=2, var_48=0, var_51=1, var_53=0, var_57=0, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L222] var_36_arg_0 = var_36_arg_0 & mask_SORT_19 [L223] SORT_13 var_36 = var_36_arg_0; [L224] SORT_13 var_37_arg_0 = var_14; [L225] SORT_13 var_37_arg_1 = var_36; [L226] SORT_1 var_37 = var_37_arg_0 == var_37_arg_1; [L227] SORT_19 var_31_arg_0 = var_30; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_31_arg_0=5, var_35=4, var_37=0, var_41=3, var_43=0, var_46=2, var_48=0, var_51=1, var_53=0, var_57=0, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L228] EXPR var_31_arg_0 & mask_SORT_19 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_37=0, var_41=3, var_43=0, var_46=2, var_48=0, var_51=1, var_53=0, var_57=0, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L228] var_31_arg_0 = var_31_arg_0 & mask_SORT_19 [L229] SORT_13 var_31 = var_31_arg_0; [L230] SORT_13 var_32_arg_0 = var_14; [L231] SORT_13 var_32_arg_1 = var_31; [L232] SORT_1 var_32 = var_32_arg_0 == var_32_arg_1; [L233] SORT_19 var_26_arg_0 = var_25; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_26_arg_0=6, var_30=5, var_32=0, var_35=4, var_37=0, var_41=3, var_43=0, var_46=2, var_48=0, var_51=1, var_53=0, var_57=0, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L234] EXPR var_26_arg_0 & mask_SORT_19 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_32=0, var_35=4, var_37=0, var_41=3, var_43=0, var_46=2, var_48=0, var_51=1, var_53=0, var_57=0, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L234] var_26_arg_0 = var_26_arg_0 & mask_SORT_19 [L235] SORT_13 var_26 = var_26_arg_0; [L236] SORT_13 var_27_arg_0 = var_14; [L237] SORT_13 var_27_arg_1 = var_26; [L238] SORT_1 var_27 = var_27_arg_0 == var_27_arg_1; [L239] SORT_19 var_21_arg_0 = var_20; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_14=0, var_15=8, var_20=7, var_21_arg_0=7, var_25=6, var_268=0, var_27=0, var_30=5, var_32=0, var_35=4, var_37=0, var_41=3, var_43=0, var_46=2, var_48=0, var_51=1, var_53=0, var_57=0, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L240] EXPR var_21_arg_0 & mask_SORT_19 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_27=0, var_30=5, var_32=0, var_35=4, var_37=0, var_41=3, var_43=0, var_46=2, var_48=0, var_51=1, var_53=0, var_57=0, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L240] var_21_arg_0 = var_21_arg_0 & mask_SORT_19 [L241] SORT_13 var_21 = var_21_arg_0; [L242] SORT_13 var_22_arg_0 = var_14; [L243] SORT_13 var_22_arg_1 = var_21; [L244] SORT_1 var_22 = var_22_arg_0 == var_22_arg_1; [L245] SORT_13 var_16_arg_0 = var_14; [L246] SORT_13 var_16_arg_1 = var_15; [L247] SORT_1 var_16 = var_16_arg_0 == var_16_arg_1; [L248] SORT_1 var_17_arg_0 = var_16; [L249] SORT_3 var_17_arg_1 = state_10; [L250] SORT_3 var_17_arg_2 = input_9; [L251] SORT_3 var_17 = var_17_arg_0 ? var_17_arg_1 : var_17_arg_2; [L252] SORT_1 var_23_arg_0 = var_22; [L253] SORT_3 var_23_arg_1 = state_18; [L254] SORT_3 var_23_arg_2 = var_17; [L255] SORT_3 var_23 = var_23_arg_0 ? var_23_arg_1 : var_23_arg_2; [L256] SORT_1 var_28_arg_0 = var_27; [L257] SORT_3 var_28_arg_1 = state_24; [L258] SORT_3 var_28_arg_2 = var_23; [L259] SORT_3 var_28 = var_28_arg_0 ? var_28_arg_1 : var_28_arg_2; [L260] SORT_1 var_33_arg_0 = var_32; [L261] SORT_3 var_33_arg_1 = state_29; [L262] SORT_3 var_33_arg_2 = var_28; [L263] SORT_3 var_33 = var_33_arg_0 ? var_33_arg_1 : var_33_arg_2; [L264] SORT_1 var_38_arg_0 = var_37; [L265] SORT_3 var_38_arg_1 = state_34; [L266] SORT_3 var_38_arg_2 = var_33; [L267] SORT_3 var_38 = var_38_arg_0 ? var_38_arg_1 : var_38_arg_2; [L268] SORT_1 var_44_arg_0 = var_43; [L269] SORT_3 var_44_arg_1 = state_39; [L270] SORT_3 var_44_arg_2 = var_38; [L271] SORT_3 var_44 = var_44_arg_0 ? var_44_arg_1 : var_44_arg_2; [L272] SORT_1 var_49_arg_0 = var_48; [L273] SORT_3 var_49_arg_1 = state_45; [L274] SORT_3 var_49_arg_2 = var_44; [L275] SORT_3 var_49 = var_49_arg_0 ? var_49_arg_1 : var_49_arg_2; [L276] SORT_1 var_54_arg_0 = var_53; [L277] SORT_3 var_54_arg_1 = state_50; [L278] SORT_3 var_54_arg_2 = var_49; [L279] SORT_3 var_54 = var_54_arg_0 ? var_54_arg_1 : var_54_arg_2; [L280] SORT_1 var_58_arg_0 = var_57; [L281] SORT_3 var_58_arg_1 = state_55; [L282] SORT_3 var_58_arg_2 = var_54; [L283] SORT_3 var_58 = var_58_arg_0 ? var_58_arg_1 : var_58_arg_2; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_58=18446744073709551615U, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L284] EXPR var_58 & mask_SORT_3 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L284] var_58 = var_58 & mask_SORT_3 [L285] SORT_3 var_88_arg_0 = state_87; [L286] SORT_3 var_88_arg_1 = var_58; [L287] SORT_1 var_88 = var_88_arg_0 == var_88_arg_1; [L288] SORT_1 var_89_arg_0 = var_86; [L289] SORT_1 var_89_arg_1 = var_88; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0, var_89_arg_0=-1, var_89_arg_1=0] [L290] EXPR var_89_arg_0 | var_89_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L290] SORT_1 var_89 = var_89_arg_0 | var_89_arg_1; [L291] SORT_1 var_110_arg_0 = state_91; [L292] SORT_1 var_110_arg_1 = input_109; [L293] SORT_1 var_110_arg_2 = var_89; [L294] SORT_1 var_110 = var_110_arg_0 ? var_110_arg_1 : var_110_arg_2; [L295] SORT_1 var_113_arg_0 = var_110; [L296] SORT_1 var_113 = ~var_113_arg_0; [L297] SORT_1 var_114_arg_0 = var_112; [L298] SORT_1 var_114_arg_1 = var_113; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_114_arg_0=0, var_114_arg_1=-256, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L299] EXPR var_114_arg_0 & var_114_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L299] SORT_1 var_114 = var_114_arg_0 & var_114_arg_1; [L300] EXPR var_114 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L300] var_114 = var_114 & mask_SORT_1 [L301] SORT_1 bad_115_arg_0 = var_114; [L302] CALL __VERIFIER_assert(!(bad_115_arg_0)) [L21] COND FALSE !(!(cond)) [L302] RET __VERIFIER_assert(!(bad_115_arg_0)) [L304] SORT_11 var_137_arg_0 = state_136; [L305] SORT_13 var_137 = var_137_arg_0 >> 0; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L306] EXPR var_137 & mask_SORT_13 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L306] var_137 = var_137 & mask_SORT_13 [L307] SORT_13 var_194_arg_0 = var_137; [L308] SORT_13 var_194_arg_1 = var_15; [L309] SORT_1 var_194 = var_194_arg_0 == var_194_arg_1; [L310] SORT_1 var_195_arg_0 = input_6; [L311] SORT_1 var_195_arg_1 = var_194; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_137=0, var_15=8, var_195_arg_0=0, var_195_arg_1=0, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L312] EXPR var_195_arg_0 & var_195_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L312] SORT_1 var_195 = var_195_arg_0 & var_195_arg_1; [L313] EXPR var_195 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L313] var_195 = var_195 & mask_SORT_1 [L314] SORT_1 var_267_arg_0 = var_195; [L315] SORT_3 var_267_arg_1 = input_4; [L316] SORT_3 var_267_arg_2 = state_10; [L317] SORT_3 var_267 = var_267_arg_0 ? var_267_arg_1 : var_267_arg_2; [L318] SORT_1 var_269_arg_0 = input_7; [L319] SORT_3 var_269_arg_1 = var_268; [L320] SORT_3 var_269_arg_2 = var_267; [L321] SORT_3 var_269 = var_269_arg_0 ? var_269_arg_1 : var_269_arg_2; [L322] SORT_3 next_270_arg_1 = var_269; [L323] SORT_1 var_119_arg_0 = input_6; [L324] SORT_1 var_119_arg_1 = input_5; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_119_arg_0=0, var_119_arg_1=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L325] EXPR var_119_arg_0 | var_119_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L325] SORT_1 var_119 = var_119_arg_0 | var_119_arg_1; [L326] SORT_1 var_120_arg_0 = var_119; [L327] SORT_1 var_120_arg_1 = input_7; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120_arg_0=0, var_120_arg_1=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L328] EXPR var_120_arg_0 | var_120_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L328] SORT_1 var_120 = var_120_arg_0 | var_120_arg_1; [L329] EXPR var_120 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L329] var_120 = var_120 & mask_SORT_1 [L330] SORT_1 var_198_arg_0 = input_5; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_198_arg_0=0, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L331] EXPR var_198_arg_0 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L331] var_198_arg_0 = var_198_arg_0 & mask_SORT_1 [L332] SORT_11 var_198 = var_198_arg_0; [L333] SORT_11 var_199_arg_0 = state_12; [L334] SORT_11 var_199_arg_1 = var_198; [L335] SORT_11 var_199 = var_199_arg_0 + var_199_arg_1; [L336] SORT_1 var_271_arg_0 = var_120; [L337] SORT_11 var_271_arg_1 = var_199; [L338] SORT_11 var_271_arg_2 = state_12; [L339] SORT_11 var_271 = var_271_arg_0 ? var_271_arg_1 : var_271_arg_2; [L340] SORT_1 var_272_arg_0 = input_7; [L341] SORT_11 var_272_arg_1 = var_81; [L342] SORT_11 var_272_arg_2 = var_271; [L343] SORT_11 var_272 = var_272_arg_0 ? var_272_arg_1 : var_272_arg_2; [L344] SORT_11 next_273_arg_1 = var_272; [L345] SORT_19 var_187_arg_0 = var_20; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_187_arg_0=7, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L346] EXPR var_187_arg_0 & mask_SORT_19 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L346] var_187_arg_0 = var_187_arg_0 & mask_SORT_19 [L347] SORT_13 var_187 = var_187_arg_0; [L348] SORT_13 var_188_arg_0 = var_137; [L349] SORT_13 var_188_arg_1 = var_187; [L350] SORT_1 var_188 = var_188_arg_0 == var_188_arg_1; [L351] SORT_1 var_189_arg_0 = input_6; [L352] SORT_1 var_189_arg_1 = var_188; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_189_arg_0=0, var_189_arg_1=0, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L353] EXPR var_189_arg_0 & var_189_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L353] SORT_1 var_189 = var_189_arg_0 & var_189_arg_1; [L354] EXPR var_189 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L354] var_189 = var_189 & mask_SORT_1 [L355] SORT_1 var_274_arg_0 = var_189; [L356] SORT_3 var_274_arg_1 = input_4; [L357] SORT_3 var_274_arg_2 = state_18; [L358] SORT_3 var_274 = var_274_arg_0 ? var_274_arg_1 : var_274_arg_2; [L359] SORT_1 var_275_arg_0 = input_7; [L360] SORT_3 var_275_arg_1 = var_268; [L361] SORT_3 var_275_arg_2 = var_274; [L362] SORT_3 var_275 = var_275_arg_0 ? var_275_arg_1 : var_275_arg_2; [L363] SORT_3 next_276_arg_1 = var_275; [L364] SORT_19 var_180_arg_0 = var_25; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, state_136=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_180_arg_0=6, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L365] EXPR var_180_arg_0 & mask_SORT_19 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, state_136=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L365] var_180_arg_0 = var_180_arg_0 & mask_SORT_19 [L366] SORT_13 var_180 = var_180_arg_0; [L367] SORT_13 var_181_arg_0 = var_137; [L368] SORT_13 var_181_arg_1 = var_180; [L369] SORT_1 var_181 = var_181_arg_0 == var_181_arg_1; [L370] SORT_1 var_182_arg_0 = input_6; [L371] SORT_1 var_182_arg_1 = var_181; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, state_136=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_182_arg_0=0, var_182_arg_1=0, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L372] EXPR var_182_arg_0 & var_182_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, state_136=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L372] SORT_1 var_182 = var_182_arg_0 & var_182_arg_1; [L373] EXPR var_182 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, state_136=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L373] var_182 = var_182 & mask_SORT_1 [L374] SORT_1 var_277_arg_0 = var_182; [L375] SORT_3 var_277_arg_1 = input_4; [L376] SORT_3 var_277_arg_2 = state_24; [L377] SORT_3 var_277 = var_277_arg_0 ? var_277_arg_1 : var_277_arg_2; [L378] SORT_1 var_278_arg_0 = input_7; [L379] SORT_3 var_278_arg_1 = var_268; [L380] SORT_3 var_278_arg_2 = var_277; [L381] SORT_3 var_278 = var_278_arg_0 ? var_278_arg_1 : var_278_arg_2; [L382] SORT_3 next_279_arg_1 = var_278; [L383] SORT_19 var_173_arg_0 = var_30; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, state_136=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_173_arg_0=5, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L384] EXPR var_173_arg_0 & mask_SORT_19 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, state_136=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L384] var_173_arg_0 = var_173_arg_0 & mask_SORT_19 [L385] SORT_13 var_173 = var_173_arg_0; [L386] SORT_13 var_174_arg_0 = var_137; [L387] SORT_13 var_174_arg_1 = var_173; [L388] SORT_1 var_174 = var_174_arg_0 == var_174_arg_1; [L389] SORT_1 var_175_arg_0 = input_6; [L390] SORT_1 var_175_arg_1 = var_174; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, state_136=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_175_arg_0=0, var_175_arg_1=0, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L391] EXPR var_175_arg_0 & var_175_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, state_136=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L391] SORT_1 var_175 = var_175_arg_0 & var_175_arg_1; [L392] EXPR var_175 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, state_136=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L392] var_175 = var_175 & mask_SORT_1 [L393] SORT_1 var_280_arg_0 = var_175; [L394] SORT_3 var_280_arg_1 = input_4; [L395] SORT_3 var_280_arg_2 = state_29; [L396] SORT_3 var_280 = var_280_arg_0 ? var_280_arg_1 : var_280_arg_2; [L397] SORT_1 var_281_arg_0 = input_7; [L398] SORT_3 var_281_arg_1 = var_268; [L399] SORT_3 var_281_arg_2 = var_280; [L400] SORT_3 var_281 = var_281_arg_0 ? var_281_arg_1 : var_281_arg_2; [L401] SORT_3 next_282_arg_1 = var_281; [L402] SORT_19 var_166_arg_0 = var_35; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, state_136=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_166_arg_0=4, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L403] EXPR var_166_arg_0 & mask_SORT_19 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, state_136=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L403] var_166_arg_0 = var_166_arg_0 & mask_SORT_19 [L404] SORT_13 var_166 = var_166_arg_0; [L405] SORT_13 var_167_arg_0 = var_137; [L406] SORT_13 var_167_arg_1 = var_166; [L407] SORT_1 var_167 = var_167_arg_0 == var_167_arg_1; [L408] SORT_1 var_168_arg_0 = input_6; [L409] SORT_1 var_168_arg_1 = var_167; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, state_136=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_168_arg_0=0, var_168_arg_1=0, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L410] EXPR var_168_arg_0 & var_168_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, state_136=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L410] SORT_1 var_168 = var_168_arg_0 & var_168_arg_1; [L411] EXPR var_168 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, state_136=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L411] var_168 = var_168 & mask_SORT_1 [L412] SORT_1 var_283_arg_0 = var_168; [L413] SORT_3 var_283_arg_1 = input_4; [L414] SORT_3 var_283_arg_2 = state_34; [L415] SORT_3 var_283 = var_283_arg_0 ? var_283_arg_1 : var_283_arg_2; [L416] SORT_1 var_284_arg_0 = input_7; [L417] SORT_3 var_284_arg_1 = var_268; [L418] SORT_3 var_284_arg_2 = var_283; [L419] SORT_3 var_284 = var_284_arg_0 ? var_284_arg_1 : var_284_arg_2; [L420] SORT_3 next_285_arg_1 = var_284; [L421] SORT_40 var_159_arg_0 = var_41; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, state_136=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_159_arg_0=3, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L422] EXPR var_159_arg_0 & mask_SORT_40 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, state_136=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L422] var_159_arg_0 = var_159_arg_0 & mask_SORT_40 [L423] SORT_13 var_159 = var_159_arg_0; [L424] SORT_13 var_160_arg_0 = var_137; [L425] SORT_13 var_160_arg_1 = var_159; [L426] SORT_1 var_160 = var_160_arg_0 == var_160_arg_1; [L427] SORT_1 var_161_arg_0 = input_6; [L428] SORT_1 var_161_arg_1 = var_160; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, state_136=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_161_arg_0=0, var_161_arg_1=0, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L429] EXPR var_161_arg_0 & var_161_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, state_136=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L429] SORT_1 var_161 = var_161_arg_0 & var_161_arg_1; [L430] EXPR var_161 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, state_136=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L430] var_161 = var_161 & mask_SORT_1 [L431] SORT_1 var_286_arg_0 = var_161; [L432] SORT_3 var_286_arg_1 = input_4; [L433] SORT_3 var_286_arg_2 = state_39; [L434] SORT_3 var_286 = var_286_arg_0 ? var_286_arg_1 : var_286_arg_2; [L435] SORT_1 var_287_arg_0 = input_7; [L436] SORT_3 var_287_arg_1 = var_268; [L437] SORT_3 var_287_arg_2 = var_286; [L438] SORT_3 var_287 = var_287_arg_0 ? var_287_arg_1 : var_287_arg_2; [L439] SORT_3 next_288_arg_1 = var_287; [L440] SORT_40 var_152_arg_0 = var_46; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, state_136=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_152_arg_0=2, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L441] EXPR var_152_arg_0 & mask_SORT_40 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, state_136=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L441] var_152_arg_0 = var_152_arg_0 & mask_SORT_40 [L442] SORT_13 var_152 = var_152_arg_0; [L443] SORT_13 var_153_arg_0 = var_137; [L444] SORT_13 var_153_arg_1 = var_152; [L445] SORT_1 var_153 = var_153_arg_0 == var_153_arg_1; [L446] SORT_1 var_154_arg_0 = input_6; [L447] SORT_1 var_154_arg_1 = var_153; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, state_136=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_154_arg_0=0, var_154_arg_1=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L448] EXPR var_154_arg_0 & var_154_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, state_136=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L448] SORT_1 var_154 = var_154_arg_0 & var_154_arg_1; [L449] EXPR var_154 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, state_136=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L449] var_154 = var_154 & mask_SORT_1 [L450] SORT_1 var_289_arg_0 = var_154; [L451] SORT_3 var_289_arg_1 = input_4; [L452] SORT_3 var_289_arg_2 = state_45; [L453] SORT_3 var_289 = var_289_arg_0 ? var_289_arg_1 : var_289_arg_2; [L454] SORT_1 var_290_arg_0 = input_7; [L455] SORT_3 var_290_arg_1 = var_268; [L456] SORT_3 var_290_arg_2 = var_289; [L457] SORT_3 var_290 = var_290_arg_0 ? var_290_arg_1 : var_290_arg_2; [L458] SORT_3 next_291_arg_1 = var_290; [L459] SORT_1 var_145_arg_0 = var_51; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, state_136=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_145_arg_0=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L460] EXPR var_145_arg_0 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, state_136=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L460] var_145_arg_0 = var_145_arg_0 & mask_SORT_1 [L461] SORT_13 var_145 = var_145_arg_0; [L462] SORT_13 var_146_arg_0 = var_137; [L463] SORT_13 var_146_arg_1 = var_145; [L464] SORT_1 var_146 = var_146_arg_0 == var_146_arg_1; [L465] SORT_1 var_147_arg_0 = input_6; [L466] SORT_1 var_147_arg_1 = var_146; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, state_136=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_147_arg_0=0, var_147_arg_1=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L467] EXPR var_147_arg_0 & var_147_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, state_136=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L467] SORT_1 var_147 = var_147_arg_0 & var_147_arg_1; [L468] EXPR var_147 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, state_136=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L468] var_147 = var_147 & mask_SORT_1 [L469] SORT_1 var_292_arg_0 = var_147; [L470] SORT_3 var_292_arg_1 = input_4; [L471] SORT_3 var_292_arg_2 = state_50; [L472] SORT_3 var_292 = var_292_arg_0 ? var_292_arg_1 : var_292_arg_2; [L473] SORT_1 var_293_arg_0 = input_7; [L474] SORT_3 var_293_arg_1 = var_268; [L475] SORT_3 var_293_arg_2 = var_292; [L476] SORT_3 var_293 = var_293_arg_0 ? var_293_arg_1 : var_293_arg_2; [L477] SORT_3 next_294_arg_1 = var_293; [L478] SORT_13 var_138_arg_0 = var_137; [L479] SORT_1 var_138 = var_138_arg_0 != 0; [L480] SORT_1 var_139_arg_0 = var_138; [L481] SORT_1 var_139 = ~var_139_arg_0; [L482] SORT_1 var_140_arg_0 = input_6; [L483] SORT_1 var_140_arg_1 = var_139; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, state_136=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_140_arg_0=0, var_140_arg_1=-1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L484] EXPR var_140_arg_0 & var_140_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, state_136=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L484] SORT_1 var_140 = var_140_arg_0 & var_140_arg_1; [L485] EXPR var_140 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, state_136=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L485] var_140 = var_140 & mask_SORT_1 [L486] SORT_1 var_295_arg_0 = var_140; [L487] SORT_3 var_295_arg_1 = input_4; [L488] SORT_3 var_295_arg_2 = state_55; [L489] SORT_3 var_295 = var_295_arg_0 ? var_295_arg_1 : var_295_arg_2; [L490] SORT_1 var_296_arg_0 = input_7; [L491] SORT_3 var_296_arg_1 = var_268; [L492] SORT_3 var_296_arg_2 = var_295; [L493] SORT_3 var_296 = var_296_arg_0 ? var_296_arg_1 : var_296_arg_2; [L494] SORT_3 next_297_arg_1 = var_296; [L495] SORT_1 var_298_arg_0 = input_6; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, state_136=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_25=6, var_268=0, var_298_arg_0=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L496] EXPR var_298_arg_0 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, state_136=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L496] var_298_arg_0 = var_298_arg_0 & mask_SORT_1 [L497] SORT_11 var_298 = var_298_arg_0; [L498] SORT_11 var_299_arg_0 = state_60; [L499] SORT_11 var_299_arg_1 = var_298; [L500] SORT_11 var_299 = var_299_arg_0 + var_299_arg_1; [L501] SORT_1 var_300_arg_0 = input_5; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, state_136=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_25=6, var_268=0, var_299=0, var_300_arg_0=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L502] EXPR var_300_arg_0 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, state_136=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_25=6, var_268=0, var_299=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L502] var_300_arg_0 = var_300_arg_0 & mask_SORT_1 [L503] SORT_11 var_300 = var_300_arg_0; [L504] SORT_11 var_301_arg_0 = var_299; [L505] SORT_11 var_301_arg_1 = var_300; [L506] SORT_11 var_301 = var_301_arg_0 - var_301_arg_1; [L507] SORT_1 var_302_arg_0 = input_7; [L508] SORT_11 var_302_arg_1 = var_81; [L509] SORT_11 var_302_arg_2 = var_301; [L510] SORT_11 var_302 = var_302_arg_0 ? var_302_arg_1 : var_302_arg_2; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, state_136=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_25=6, var_268=0, var_302=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L511] EXPR var_302 & mask_SORT_11 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, state_136=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L511] var_302 = var_302 & mask_SORT_11 [L512] SORT_11 next_303_arg_1 = var_302; [L513] SORT_1 var_228_arg_0 = state_68; [L514] SORT_1 var_228 = ~var_228_arg_0; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, state_136=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_228=-1, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L515] EXPR var_228 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, state_136=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L515] var_228 = var_228 & mask_SORT_1 [L516] SORT_1 var_224_arg_0 = input_8; [L517] SORT_1 var_224_arg_1 = input_6; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, state_136=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_224_arg_0=0, var_224_arg_1=0, var_228=1, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L518] EXPR var_224_arg_0 & var_224_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, state_136=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_228=1, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L518] SORT_1 var_224 = var_224_arg_0 & var_224_arg_1; [L519] SORT_1 var_225_arg_0 = state_68; [L520] SORT_1 var_225_arg_1 = var_224; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, state_136=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_224=0, var_225_arg_0=0, var_225_arg_1=0, var_228=1, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L521] EXPR var_225_arg_0 | var_225_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, state_136=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_224=0, var_228=1, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L521] SORT_1 var_225 = var_225_arg_0 | var_225_arg_1; [L522] SORT_1 var_304_arg_0 = var_228; [L523] SORT_1 var_304_arg_1 = var_225; [L524] SORT_1 var_304_arg_2 = state_68; [L525] SORT_1 var_304 = var_304_arg_0 ? var_304_arg_1 : var_304_arg_2; [L526] SORT_1 var_305_arg_0 = input_7; [L527] SORT_1 var_305_arg_1 = var_111; [L528] SORT_1 var_305_arg_2 = var_304; [L529] SORT_1 var_305 = var_305_arg_0 ? var_305_arg_1 : var_305_arg_2; [L530] SORT_1 next_306_arg_1 = var_305; [L531] SORT_1 var_236_arg_0 = var_85; [L532] SORT_1 var_236_arg_1 = state_69; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, next_306_arg_1=0, state_136=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_224=0, var_228=1, var_236_arg_0=0, var_236_arg_1=0, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0] [L533] EXPR var_236_arg_0 | var_236_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, next_306_arg_1=0, state_136=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_224=0, var_228=1, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0] [L533] SORT_1 var_236 = var_236_arg_0 | var_236_arg_1; [L534] SORT_1 var_307_arg_0 = var_51; [L535] SORT_1 var_307_arg_1 = var_236; [L536] SORT_1 var_307_arg_2 = state_69; [L537] SORT_1 var_307 = var_307_arg_0 ? var_307_arg_1 : var_307_arg_2; [L538] SORT_1 var_308_arg_0 = input_7; [L539] SORT_1 var_308_arg_1 = var_111; [L540] SORT_1 var_308_arg_2 = var_307; [L541] SORT_1 var_308 = var_308_arg_0 ? var_308_arg_1 : var_308_arg_2; [L542] SORT_1 next_309_arg_1 = var_308; [L543] SORT_1 var_248_arg_0 = input_6; [L544] SORT_1 var_248_arg_1 = input_5; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, next_306_arg_1=0, next_309_arg_1=0, state_136=0, state_68=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_224=0, var_228=1, var_248_arg_0=0, var_248_arg_1=0, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0] [L545] EXPR var_248_arg_0 | var_248_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, next_306_arg_1=0, next_309_arg_1=0, state_136=0, state_68=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_224=0, var_228=1, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0] [L545] SORT_1 var_248 = var_248_arg_0 | var_248_arg_1; [L546] SORT_1 var_249_arg_0 = var_248; [L547] SORT_1 var_249_arg_1 = input_7; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, next_306_arg_1=0, next_309_arg_1=0, state_136=0, state_68=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_224=0, var_228=1, var_249_arg_0=0, var_249_arg_1=0, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0] [L548] EXPR var_249_arg_0 | var_249_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, next_306_arg_1=0, next_309_arg_1=0, state_136=0, state_68=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_224=0, var_228=1, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0] [L548] SORT_1 var_249 = var_249_arg_0 | var_249_arg_1; [L549] SORT_1 var_250_arg_0 = var_249; [L550] SORT_1 var_250_arg_1 = state_68; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, next_306_arg_1=0, next_309_arg_1=0, state_136=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_224=0, var_228=1, var_250_arg_0=0, var_250_arg_1=0, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0] [L551] EXPR var_250_arg_0 | var_250_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, next_306_arg_1=0, next_309_arg_1=0, state_136=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_224=0, var_228=1, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0] [L551] SORT_1 var_250 = var_250_arg_0 | var_250_arg_1; [L552] EXPR var_250 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, next_306_arg_1=0, next_309_arg_1=0, state_136=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_224=0, var_228=1, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0] [L552] var_250 = var_250 & mask_SORT_1 [L553] SORT_1 var_310_arg_0 = var_250; [L554] SORT_11 var_310_arg_1 = var_82; [L555] SORT_11 var_310_arg_2 = state_72; [L556] SORT_11 var_310 = var_310_arg_0 ? var_310_arg_1 : var_310_arg_2; [L557] SORT_1 var_311_arg_0 = input_7; [L558] SORT_11 var_311_arg_1 = var_81; [L559] SORT_11 var_311_arg_2 = var_310; [L560] SORT_11 var_311 = var_311_arg_0 ? var_311_arg_1 : var_311_arg_2; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, next_306_arg_1=0, next_309_arg_1=0, state_136=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_224=0, var_228=1, var_25=6, var_268=0, var_30=5, var_311=0, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L561] EXPR var_311 & mask_SORT_11 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, next_306_arg_1=0, next_309_arg_1=0, state_136=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_224=0, var_228=1, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L561] var_311 = var_311 & mask_SORT_11 [L562] SORT_11 next_312_arg_1 = var_311; [L563] SORT_1 var_233_arg_0 = var_224; [L564] SORT_1 var_233_arg_1 = var_228; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, next_306_arg_1=0, next_309_arg_1=0, next_312_arg_1=0, state_136=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_233_arg_0=0, var_233_arg_1=1, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L565] EXPR var_233_arg_0 & var_233_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, next_306_arg_1=0, next_309_arg_1=0, next_312_arg_1=0, state_136=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L565] SORT_1 var_233 = var_233_arg_0 & var_233_arg_1; [L566] EXPR var_233 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, next_306_arg_1=0, next_309_arg_1=0, next_312_arg_1=0, state_136=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L566] var_233 = var_233 & mask_SORT_1 [L567] SORT_1 var_313_arg_0 = var_233; [L568] SORT_3 var_313_arg_1 = input_4; [L569] SORT_3 var_313_arg_2 = state_87; [L570] SORT_3 var_313 = var_313_arg_0 ? var_313_arg_1 : var_313_arg_2; [L571] SORT_1 var_314_arg_0 = input_7; [L572] SORT_3 var_314_arg_1 = var_268; [L573] SORT_3 var_314_arg_2 = var_313; [L574] SORT_3 var_314 = var_314_arg_0 ? var_314_arg_1 : var_314_arg_2; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, next_306_arg_1=0, next_309_arg_1=0, next_312_arg_1=0, state_136=0, var_111=0, var_120=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_314=0, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L575] EXPR var_314 & mask_SORT_3 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, next_306_arg_1=0, next_309_arg_1=0, next_312_arg_1=0, state_136=0, var_111=0, var_120=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L575] var_314 = var_314 & mask_SORT_3 [L576] SORT_3 next_315_arg_1 = var_314; [L577] SORT_1 next_316_arg_1 = var_111; [L578] SORT_1 var_204_arg_0 = input_6; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, next_306_arg_1=0, next_309_arg_1=0, next_312_arg_1=0, next_315_arg_1=0, next_316_arg_1=0, state_136=0, var_111=0, var_120=0, var_15=8, var_204_arg_0=0, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L579] EXPR var_204_arg_0 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, next_306_arg_1=0, next_309_arg_1=0, next_312_arg_1=0, next_315_arg_1=0, next_316_arg_1=0, state_136=0, var_111=0, var_120=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L579] var_204_arg_0 = var_204_arg_0 & mask_SORT_1 [L580] SORT_11 var_204 = var_204_arg_0; [L581] SORT_11 var_205_arg_0 = state_136; [L582] SORT_11 var_205_arg_1 = var_204; [L583] SORT_11 var_205 = var_205_arg_0 + var_205_arg_1; [L584] SORT_1 var_317_arg_0 = var_120; [L585] SORT_11 var_317_arg_1 = var_205; [L586] SORT_11 var_317_arg_2 = state_136; [L587] SORT_11 var_317 = var_317_arg_0 ? var_317_arg_1 : var_317_arg_2; [L588] SORT_1 var_318_arg_0 = input_7; [L589] SORT_11 var_318_arg_1 = var_81; [L590] SORT_11 var_318_arg_2 = var_317; [L591] SORT_11 var_318 = var_318_arg_0 ? var_318_arg_1 : var_318_arg_2; [L592] SORT_11 next_319_arg_1 = var_318; [L594] state_10 = next_270_arg_1 [L595] state_12 = next_273_arg_1 [L596] state_18 = next_276_arg_1 [L597] state_24 = next_279_arg_1 [L598] state_29 = next_282_arg_1 [L599] state_34 = next_285_arg_1 [L600] state_39 = next_288_arg_1 [L601] state_45 = next_291_arg_1 [L602] state_50 = next_294_arg_1 [L603] state_55 = next_297_arg_1 [L604] state_60 = next_303_arg_1 [L605] state_68 = next_306_arg_1 [L606] state_69 = next_309_arg_1 [L607] state_72 = next_312_arg_1 [L608] state_87 = next_315_arg_1 [L609] state_91 = next_316_arg_1 [L610] state_136 = next_319_arg_1 [L88] input_2 = __VERIFIER_nondet_uchar() [L89] input_4 = __VERIFIER_nondet_ulong() [L90] input_5 = __VERIFIER_nondet_uchar() [L91] input_6 = __VERIFIER_nondet_uchar() [L92] input_7 = __VERIFIER_nondet_uchar() [L93] EXPR input_7 & mask_SORT_1 VAL [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L93] input_7 = input_7 & mask_SORT_1 [L94] input_8 = __VERIFIER_nondet_uchar() [L95] input_9 = __VERIFIER_nondet_ulong() [L96] input_109 = __VERIFIER_nondet_uchar() [L98] SORT_1 var_93_arg_0 = input_7; [L99] SORT_1 var_93_arg_1 = state_91; [L100] SORT_1 var_93 = var_93_arg_0 == var_93_arg_1; [L101] SORT_1 var_94_arg_0 = var_51; [L102] SORT_1 var_94 = ~var_94_arg_0; [L103] SORT_1 var_95_arg_0 = var_93; [L104] SORT_1 var_95_arg_1 = var_94; VAL [input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_95_arg_0=0, var_95_arg_1=-2] [L105] EXPR var_95_arg_0 | var_95_arg_1 VAL [input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L105] SORT_1 var_95 = var_95_arg_0 | var_95_arg_1; [L106] EXPR var_95 & mask_SORT_1 VAL [input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L106] var_95 = var_95 & mask_SORT_1 [L107] SORT_1 constr_96_arg_0 = var_95; VAL [constr_96_arg_0=1, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L108] CALL assume_abort_if_not(constr_96_arg_0) VAL [\old(cond)=1] [L22] COND FALSE !(!cond) VAL [\old(cond)=1] [L108] RET assume_abort_if_not(constr_96_arg_0) VAL [constr_96_arg_0=1, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L109] SORT_13 var_65_arg_0 = var_64; VAL [constr_96_arg_0=1, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_65_arg_0=9, var_81=0] [L110] EXPR var_65_arg_0 & mask_SORT_13 VAL [constr_96_arg_0=1, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L110] var_65_arg_0 = var_65_arg_0 & mask_SORT_13 [L111] SORT_11 var_65 = var_65_arg_0; [L112] SORT_11 var_66_arg_0 = state_60; [L113] SORT_11 var_66_arg_1 = var_65; [L114] SORT_1 var_66 = var_66_arg_0 == var_66_arg_1; [L115] SORT_1 var_97_arg_0 = var_66; [L116] SORT_1 var_97 = ~var_97_arg_0; [L117] SORT_1 var_98_arg_0 = input_6; [L118] SORT_1 var_98 = ~var_98_arg_0; [L119] SORT_1 var_99_arg_0 = var_97; [L120] SORT_1 var_99_arg_1 = var_98; VAL [constr_96_arg_0=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_99_arg_0=-1, var_99_arg_1=-1] [L121] EXPR var_99_arg_0 | var_99_arg_1 VAL [constr_96_arg_0=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L121] SORT_1 var_99 = var_99_arg_0 | var_99_arg_1; [L122] SORT_1 var_100_arg_0 = var_51; [L123] SORT_1 var_100 = ~var_100_arg_0; [L124] SORT_1 var_101_arg_0 = var_99; [L125] SORT_1 var_101_arg_1 = var_100; VAL [constr_96_arg_0=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_101_arg_0=255, var_101_arg_1=-2, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L126] EXPR var_101_arg_0 | var_101_arg_1 VAL [constr_96_arg_0=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L126] SORT_1 var_101 = var_101_arg_0 | var_101_arg_1; [L127] EXPR var_101 & mask_SORT_1 VAL [constr_96_arg_0=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L127] var_101 = var_101 & mask_SORT_1 [L128] SORT_1 constr_102_arg_0 = var_101; VAL [constr_102_arg_0=1, constr_96_arg_0=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L129] CALL assume_abort_if_not(constr_102_arg_0) VAL [\old(cond)=1] [L22] COND FALSE !(!cond) VAL [\old(cond)=1] [L129] RET assume_abort_if_not(constr_102_arg_0) VAL [constr_102_arg_0=1, constr_96_arg_0=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L130] SORT_11 var_61_arg_0 = state_60; [L131] SORT_1 var_61 = var_61_arg_0 != 0; [L132] SORT_1 var_62_arg_0 = var_61; [L133] SORT_1 var_62 = ~var_62_arg_0; [L134] SORT_1 var_103_arg_0 = var_62; [L135] SORT_1 var_103 = ~var_103_arg_0; [L136] SORT_1 var_104_arg_0 = input_5; [L137] SORT_1 var_104 = ~var_104_arg_0; [L138] SORT_1 var_105_arg_0 = var_103; [L139] SORT_1 var_105_arg_1 = var_104; VAL [constr_102_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_105_arg_0=-256, var_105_arg_1=-2, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L140] EXPR var_105_arg_0 | var_105_arg_1 VAL [constr_102_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L140] SORT_1 var_105 = var_105_arg_0 | var_105_arg_1; [L141] SORT_1 var_106_arg_0 = var_51; [L142] SORT_1 var_106 = ~var_106_arg_0; [L143] SORT_1 var_107_arg_0 = var_105; [L144] SORT_1 var_107_arg_1 = var_106; VAL [constr_102_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_107_arg_0=254, var_107_arg_1=-2, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L145] EXPR var_107_arg_0 | var_107_arg_1 VAL [constr_102_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L145] SORT_1 var_107 = var_107_arg_0 | var_107_arg_1; [L146] EXPR var_107 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L146] var_107 = var_107 & mask_SORT_1 [L147] SORT_1 constr_108_arg_0 = var_107; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L148] CALL assume_abort_if_not(constr_108_arg_0) VAL [\old(cond)=1] [L22] COND FALSE !(!cond) VAL [\old(cond)=1] [L148] RET assume_abort_if_not(constr_108_arg_0) VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L150] SORT_1 var_112_arg_0 = state_91; [L151] SORT_1 var_112_arg_1 = var_111; [L152] SORT_1 var_112_arg_2 = var_51; [L153] SORT_1 var_112 = var_112_arg_0 ? var_112_arg_1 : var_112_arg_2; [L154] SORT_1 var_70_arg_0 = state_69; [L155] SORT_1 var_70 = ~var_70_arg_0; [L156] SORT_1 var_71_arg_0 = state_68; [L157] SORT_1 var_71_arg_1 = var_70; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_71_arg_0=0, var_71_arg_1=-1, var_81=0] [L158] EXPR var_71_arg_0 & var_71_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L158] SORT_1 var_71 = var_71_arg_0 & var_71_arg_1; [L159] SORT_11 var_73_arg_0 = state_72; [L160] SORT_1 var_73 = var_73_arg_0 != 0; [L161] SORT_1 var_74_arg_0 = var_71; [L162] SORT_1 var_74_arg_1 = var_73; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_74_arg_0=0, var_74_arg_1=0, var_81=0] [L163] EXPR var_74_arg_0 & var_74_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L163] SORT_1 var_74 = var_74_arg_0 & var_74_arg_1; [L164] SORT_1 var_75_arg_0 = state_68; [L165] SORT_1 var_75 = ~var_75_arg_0; [L166] SORT_1 var_76_arg_0 = input_6; [L167] SORT_1 var_76_arg_1 = var_75; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_74=0, var_76_arg_0=0, var_76_arg_1=-1, var_81=0] [L168] EXPR var_76_arg_0 & var_76_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_74=0, var_81=0] [L168] SORT_1 var_76 = var_76_arg_0 & var_76_arg_1; [L169] SORT_1 var_77_arg_0 = var_76; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_74=0, var_77_arg_0=0, var_81=0] [L170] EXPR var_77_arg_0 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_74=0, var_81=0] [L170] var_77_arg_0 = var_77_arg_0 & mask_SORT_1 [L171] SORT_11 var_77 = var_77_arg_0; [L172] SORT_11 var_78_arg_0 = state_72; [L173] SORT_11 var_78_arg_1 = var_77; [L174] SORT_11 var_78 = var_78_arg_0 + var_78_arg_1; [L175] SORT_1 var_79_arg_0 = input_5; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_74=0, var_78=0, var_79_arg_0=1, var_81=0] [L176] EXPR var_79_arg_0 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_74=0, var_78=0, var_81=0] [L176] var_79_arg_0 = var_79_arg_0 & mask_SORT_1 [L177] SORT_11 var_79 = var_79_arg_0; [L178] SORT_11 var_80_arg_0 = var_78; [L179] SORT_11 var_80_arg_1 = var_79; [L180] SORT_11 var_80 = var_80_arg_0 - var_80_arg_1; [L181] SORT_1 var_82_arg_0 = input_7; [L182] SORT_11 var_82_arg_1 = var_81; [L183] SORT_11 var_82_arg_2 = var_80; [L184] SORT_11 var_82 = var_82_arg_0 ? var_82_arg_1 : var_82_arg_2; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_74=0, var_81=0, var_82=0] [L185] EXPR var_82 & mask_SORT_11 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_74=0, var_81=0] [L185] var_82 = var_82 & mask_SORT_11 [L186] SORT_11 var_83_arg_0 = var_82; [L187] SORT_1 var_83 = var_83_arg_0 != 0; [L188] SORT_1 var_84_arg_0 = var_83; [L189] SORT_1 var_84 = ~var_84_arg_0; [L190] SORT_1 var_85_arg_0 = var_74; [L191] SORT_1 var_85_arg_1 = var_84; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85_arg_0=0, var_85_arg_1=-1] [L192] EXPR var_85_arg_0 & var_85_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0] [L192] SORT_1 var_85 = var_85_arg_0 & var_85_arg_1; [L193] SORT_1 var_86_arg_0 = var_85; [L194] SORT_1 var_86 = ~var_86_arg_0; [L195] SORT_11 var_14_arg_0 = state_12; [L196] SORT_13 var_14 = var_14_arg_0 >> 0; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L197] EXPR var_14 & mask_SORT_13 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L197] var_14 = var_14 & mask_SORT_13 [L198] SORT_13 var_56_arg_0 = var_14; [L199] SORT_1 var_56 = var_56_arg_0 != 0; [L200] SORT_1 var_57_arg_0 = var_56; [L201] SORT_1 var_57 = ~var_57_arg_0; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_57=-1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L202] EXPR var_57 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L202] var_57 = var_57 & mask_SORT_1 [L203] SORT_1 var_52_arg_0 = var_51; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_52_arg_0=1, var_57=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L204] EXPR var_52_arg_0 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_57=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L204] var_52_arg_0 = var_52_arg_0 & mask_SORT_1 [L205] SORT_13 var_52 = var_52_arg_0; [L206] SORT_13 var_53_arg_0 = var_14; [L207] SORT_13 var_53_arg_1 = var_52; [L208] SORT_1 var_53 = var_53_arg_0 == var_53_arg_1; [L209] SORT_40 var_47_arg_0 = var_46; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_47_arg_0=2, var_51=1, var_53=0, var_57=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L210] EXPR var_47_arg_0 & mask_SORT_40 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_53=0, var_57=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L210] var_47_arg_0 = var_47_arg_0 & mask_SORT_40 [L211] SORT_13 var_47 = var_47_arg_0; [L212] SORT_13 var_48_arg_0 = var_14; [L213] SORT_13 var_48_arg_1 = var_47; [L214] SORT_1 var_48 = var_48_arg_0 == var_48_arg_1; [L215] SORT_40 var_42_arg_0 = var_41; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_42_arg_0=3, var_46=2, var_48=1, var_51=1, var_53=0, var_57=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L216] EXPR var_42_arg_0 & mask_SORT_40 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_48=1, var_51=1, var_53=0, var_57=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L216] var_42_arg_0 = var_42_arg_0 & mask_SORT_40 [L217] SORT_13 var_42 = var_42_arg_0; [L218] SORT_13 var_43_arg_0 = var_14; [L219] SORT_13 var_43_arg_1 = var_42; [L220] SORT_1 var_43 = var_43_arg_0 == var_43_arg_1; [L221] SORT_19 var_36_arg_0 = var_35; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_36_arg_0=4, var_41=3, var_43=0, var_46=2, var_48=1, var_51=1, var_53=0, var_57=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L222] EXPR var_36_arg_0 & mask_SORT_19 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_43=0, var_46=2, var_48=1, var_51=1, var_53=0, var_57=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L222] var_36_arg_0 = var_36_arg_0 & mask_SORT_19 [L223] SORT_13 var_36 = var_36_arg_0; [L224] SORT_13 var_37_arg_0 = var_14; [L225] SORT_13 var_37_arg_1 = var_36; [L226] SORT_1 var_37 = var_37_arg_0 == var_37_arg_1; [L227] SORT_19 var_31_arg_0 = var_30; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_31_arg_0=5, var_35=4, var_37=0, var_41=3, var_43=0, var_46=2, var_48=1, var_51=1, var_53=0, var_57=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L228] EXPR var_31_arg_0 & mask_SORT_19 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_37=0, var_41=3, var_43=0, var_46=2, var_48=1, var_51=1, var_53=0, var_57=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L228] var_31_arg_0 = var_31_arg_0 & mask_SORT_19 [L229] SORT_13 var_31 = var_31_arg_0; [L230] SORT_13 var_32_arg_0 = var_14; [L231] SORT_13 var_32_arg_1 = var_31; [L232] SORT_1 var_32 = var_32_arg_0 == var_32_arg_1; [L233] SORT_19 var_26_arg_0 = var_25; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_26_arg_0=6, var_30=5, var_32=1, var_35=4, var_37=0, var_41=3, var_43=0, var_46=2, var_48=1, var_51=1, var_53=0, var_57=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L234] EXPR var_26_arg_0 & mask_SORT_19 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_32=1, var_35=4, var_37=0, var_41=3, var_43=0, var_46=2, var_48=1, var_51=1, var_53=0, var_57=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L234] var_26_arg_0 = var_26_arg_0 & mask_SORT_19 [L235] SORT_13 var_26 = var_26_arg_0; [L236] SORT_13 var_27_arg_0 = var_14; [L237] SORT_13 var_27_arg_1 = var_26; [L238] SORT_1 var_27 = var_27_arg_0 == var_27_arg_1; [L239] SORT_19 var_21_arg_0 = var_20; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_14=0, var_15=8, var_20=7, var_21_arg_0=7, var_25=6, var_268=0, var_27=0, var_30=5, var_32=1, var_35=4, var_37=0, var_41=3, var_43=0, var_46=2, var_48=1, var_51=1, var_53=0, var_57=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L240] EXPR var_21_arg_0 & mask_SORT_19 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_27=0, var_30=5, var_32=1, var_35=4, var_37=0, var_41=3, var_43=0, var_46=2, var_48=1, var_51=1, var_53=0, var_57=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L240] var_21_arg_0 = var_21_arg_0 & mask_SORT_19 [L241] SORT_13 var_21 = var_21_arg_0; [L242] SORT_13 var_22_arg_0 = var_14; [L243] SORT_13 var_22_arg_1 = var_21; [L244] SORT_1 var_22 = var_22_arg_0 == var_22_arg_1; [L245] SORT_13 var_16_arg_0 = var_14; [L246] SORT_13 var_16_arg_1 = var_15; [L247] SORT_1 var_16 = var_16_arg_0 == var_16_arg_1; [L248] SORT_1 var_17_arg_0 = var_16; [L249] SORT_3 var_17_arg_1 = state_10; [L250] SORT_3 var_17_arg_2 = input_9; [L251] SORT_3 var_17 = var_17_arg_0 ? var_17_arg_1 : var_17_arg_2; [L252] SORT_1 var_23_arg_0 = var_22; [L253] SORT_3 var_23_arg_1 = state_18; [L254] SORT_3 var_23_arg_2 = var_17; [L255] SORT_3 var_23 = var_23_arg_0 ? var_23_arg_1 : var_23_arg_2; [L256] SORT_1 var_28_arg_0 = var_27; [L257] SORT_3 var_28_arg_1 = state_24; [L258] SORT_3 var_28_arg_2 = var_23; [L259] SORT_3 var_28 = var_28_arg_0 ? var_28_arg_1 : var_28_arg_2; [L260] SORT_1 var_33_arg_0 = var_32; [L261] SORT_3 var_33_arg_1 = state_29; [L262] SORT_3 var_33_arg_2 = var_28; [L263] SORT_3 var_33 = var_33_arg_0 ? var_33_arg_1 : var_33_arg_2; [L264] SORT_1 var_38_arg_0 = var_37; [L265] SORT_3 var_38_arg_1 = state_34; [L266] SORT_3 var_38_arg_2 = var_33; [L267] SORT_3 var_38 = var_38_arg_0 ? var_38_arg_1 : var_38_arg_2; [L268] SORT_1 var_44_arg_0 = var_43; [L269] SORT_3 var_44_arg_1 = state_39; [L270] SORT_3 var_44_arg_2 = var_38; [L271] SORT_3 var_44 = var_44_arg_0 ? var_44_arg_1 : var_44_arg_2; [L272] SORT_1 var_49_arg_0 = var_48; [L273] SORT_3 var_49_arg_1 = state_45; [L274] SORT_3 var_49_arg_2 = var_44; [L275] SORT_3 var_49 = var_49_arg_0 ? var_49_arg_1 : var_49_arg_2; [L276] SORT_1 var_54_arg_0 = var_53; [L277] SORT_3 var_54_arg_1 = state_50; [L278] SORT_3 var_54_arg_2 = var_49; [L279] SORT_3 var_54 = var_54_arg_0 ? var_54_arg_1 : var_54_arg_2; [L280] SORT_1 var_58_arg_0 = var_57; [L281] SORT_3 var_58_arg_1 = state_55; [L282] SORT_3 var_58_arg_2 = var_54; [L283] SORT_3 var_58 = var_58_arg_0 ? var_58_arg_1 : var_58_arg_2; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_58=0, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L284] EXPR var_58 & mask_SORT_3 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L284] var_58 = var_58 & mask_SORT_3 [L285] SORT_3 var_88_arg_0 = state_87; [L286] SORT_3 var_88_arg_1 = var_58; [L287] SORT_1 var_88 = var_88_arg_0 == var_88_arg_1; [L288] SORT_1 var_89_arg_0 = var_86; [L289] SORT_1 var_89_arg_1 = var_88; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0, var_89_arg_0=-1, var_89_arg_1=1] [L290] EXPR var_89_arg_0 | var_89_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L290] SORT_1 var_89 = var_89_arg_0 | var_89_arg_1; [L291] SORT_1 var_110_arg_0 = state_91; [L292] SORT_1 var_110_arg_1 = input_109; [L293] SORT_1 var_110_arg_2 = var_89; [L294] SORT_1 var_110 = var_110_arg_0 ? var_110_arg_1 : var_110_arg_2; [L295] SORT_1 var_113_arg_0 = var_110; [L296] SORT_1 var_113 = ~var_113_arg_0; [L297] SORT_1 var_114_arg_0 = var_112; [L298] SORT_1 var_114_arg_1 = var_113; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_114_arg_0=1, var_114_arg_1=-1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L299] EXPR var_114_arg_0 & var_114_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L299] SORT_1 var_114 = var_114_arg_0 & var_114_arg_1; [L300] EXPR var_114 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L300] var_114 = var_114 & mask_SORT_1 [L301] SORT_1 bad_115_arg_0 = var_114; [L302] CALL __VERIFIER_assert(!(bad_115_arg_0)) [L21] COND TRUE !(cond) [L21] reach_error() - StatisticsResult: Ultimate Automizer benchmark data CFG has 2 procedures, 392 locations, 1 error locations. Started 1 CEGAR loops. OverallTime: 166.9s, OverallIterations: 59, TraceHistogramMax: 6, PathProgramHistogramMax: 1, EmptinessCheckTime: 0.3s, AutomataDifference: 35.2s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, HoareTripleCheckerStatistics: 0 mSolverCounterUnknown, 41124 SdHoareTripleChecker+Valid, 26.9s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 41032 mSDsluCounter, 146523 SdHoareTripleChecker+Invalid, 22.9s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 0 IncrementalHoareTripleChecker+Unchecked, 114741 mSDsCounter, 159 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 40058 IncrementalHoareTripleChecker+Invalid, 40217 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 159 mSolverCounterUnsat, 31782 mSDtfsCounter, 40058 mSolverCounterSat, 0.5s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Unknown, PredicateUnifierStatistics: 0 DeclaredPredicates, 5288 GetRequests, 4728 SyntacticMatches, 4 SemanticMatches, 556 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4633 ImplicationChecksByTransitivity, 8.8s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=9276occurred in iteration=58, InterpolantAutomatonStates: 437, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 3.0s AutomataMinimizationTime, 58 MinimizatonAttempts, 18271 StatesRemovedByMinimization, 24 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 2.5s SsaConstructionTime, 38.0s SatisfiabilityAnalysisTime, 68.0s InterpolantComputationTime, 19930 NumberOfCodeBlocks, 19930 NumberOfCodeBlocksAsserted, 70 NumberOfCheckSat, 20556 ConstructedInterpolants, 0 QuantifiedInterpolants, 103816 SizeOfPredicates, 27 NumberOfNonLiveVariables, 21363 ConjunctsInSsa, 323 ConjunctsInUnsatCore, 72 InterpolantComputations, 55 PerfectInterpolantSequences, 7403/8014 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available, ConComCheckerStatistics: No data available RESULT: Ultimate could not prove your program: unable to determine feasibility of some traces [2024-11-28 05:03:53,259 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e79ab4e9-2c15-41d1-a9a3-9aa0806e687c/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Ended with exit code 0 Received shutdown request... --- End real Ultimate output --- Execution finished normally Using bit-precise analysis Retrying with bit-precise analysis ### Bit-precise run ### Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e79ab4e9-2c15-41d1-a9a3-9aa0806e687c/bin/uautomizer-verify-aQ6SnzHsRB/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e79ab4e9-2c15-41d1-a9a3-9aa0806e687c/bin/uautomizer-verify-aQ6SnzHsRB/plugins/org.eclipse.equinox.launcher_1.6.800.v20240513-1750.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e79ab4e9-2c15-41d1-a9a3-9aa0806e687c/bin/uautomizer-verify-aQ6SnzHsRB/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e79ab4e9-2c15-41d1-a9a3-9aa0806e687c/bin/uautomizer-verify-aQ6SnzHsRB/config/AutomizerReach.xml -i ../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w64_d8_e0.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e79ab4e9-2c15-41d1-a9a3-9aa0806e687c/bin/uautomizer-verify-aQ6SnzHsRB/config/svcomp-Reach-64bit-Automizer_Bitvector.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e79ab4e9-2c15-41d1-a9a3-9aa0806e687c/bin/uautomizer-verify-aQ6SnzHsRB --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash dcf39230c24eb915e747e88202e73a35b6e85db9fcbfa83adc9e68e89fc807d5 --- Real Ultimate output --- This is Ultimate 0.3.0-dev-d790fec [2024-11-28 05:03:55,888 INFO L188 SettingsManager]: Resetting all preferences to default values... [2024-11-28 05:03:56,003 INFO L114 SettingsManager]: Loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e79ab4e9-2c15-41d1-a9a3-9aa0806e687c/bin/uautomizer-verify-aQ6SnzHsRB/config/svcomp-Reach-64bit-Automizer_Bitvector.epf [2024-11-28 05:03:56,012 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2024-11-28 05:03:56,012 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2024-11-28 05:03:56,065 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2024-11-28 05:03:56,066 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2024-11-28 05:03:56,067 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2024-11-28 05:03:56,067 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2024-11-28 05:03:56,067 INFO L153 SettingsManager]: * Use memory slicer=true [2024-11-28 05:03:56,067 INFO L151 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2024-11-28 05:03:56,068 INFO L153 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2024-11-28 05:03:56,068 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2024-11-28 05:03:56,068 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2024-11-28 05:03:56,069 INFO L153 SettingsManager]: * Use SBE=true [2024-11-28 05:03:56,070 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2024-11-28 05:03:56,070 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2024-11-28 05:03:56,070 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2024-11-28 05:03:56,070 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2024-11-28 05:03:56,070 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2024-11-28 05:03:56,071 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2024-11-28 05:03:56,071 INFO L153 SettingsManager]: * Adapt memory model on pointer casts if necessary=true [2024-11-28 05:03:56,071 INFO L153 SettingsManager]: * Use bitvectors instead of ints=true [2024-11-28 05:03:56,071 INFO L153 SettingsManager]: * Memory model=HoenickeLindenmann_4ByteResolution [2024-11-28 05:03:56,071 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2024-11-28 05:03:56,071 INFO L153 SettingsManager]: * Behaviour of calls to undefined functions=OVERAPPROXIMATE_BEHAVIOUR [2024-11-28 05:03:56,071 INFO L153 SettingsManager]: * Use constant arrays=true [2024-11-28 05:03:56,072 INFO L151 SettingsManager]: Preferences of IcfgBuilder differ from their defaults: [2024-11-28 05:03:56,072 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-11-28 05:03:56,072 INFO L153 SettingsManager]: * Only consider context switches at boundaries of atomic blocks=true [2024-11-28 05:03:56,072 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2024-11-28 05:03:56,072 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2024-11-28 05:03:56,073 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2024-11-28 05:03:56,073 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-11-28 05:03:56,074 INFO L153 SettingsManager]: * Only consider context switches at boundaries of atomic blocks=true [2024-11-28 05:03:56,074 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2024-11-28 05:03:56,074 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2024-11-28 05:03:56,074 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2024-11-28 05:03:56,074 INFO L153 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2024-11-28 05:03:56,074 INFO L153 SettingsManager]: * Compute procedure contracts=false [2024-11-28 05:03:56,074 INFO L153 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopHeads [2024-11-28 05:03:56,075 INFO L153 SettingsManager]: * Trace refinement strategy=FOX [2024-11-28 05:03:56,075 INFO L153 SettingsManager]: * Command for external solver=cvc4 --incremental --print-success --lang smt [2024-11-28 05:03:56,075 INFO L153 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false [2024-11-28 05:03:56,075 INFO L153 SettingsManager]: * Automaton type used in concurrency analysis=PETRI_NET [2024-11-28 05:03:56,075 INFO L153 SettingsManager]: * Order on configurations for Petri net unfoldings=DBO [2024-11-28 05:03:56,075 INFO L153 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2024-11-28 05:03:56,075 INFO L153 SettingsManager]: * Looper check in Petri net analysis=SEMANTIC Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e79ab4e9-2c15-41d1-a9a3-9aa0806e687c/bin/uautomizer-verify-aQ6SnzHsRB Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> dcf39230c24eb915e747e88202e73a35b6e85db9fcbfa83adc9e68e89fc807d5 [2024-11-28 05:03:56,396 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2024-11-28 05:03:56,404 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2024-11-28 05:03:56,406 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2024-11-28 05:03:56,407 INFO L270 PluginConnector]: Initializing CDTParser... [2024-11-28 05:03:56,408 INFO L274 PluginConnector]: CDTParser initialized [2024-11-28 05:03:56,409 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e79ab4e9-2c15-41d1-a9a3-9aa0806e687c/bin/uautomizer-verify-aQ6SnzHsRB/../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w64_d8_e0.c [2024-11-28 05:03:59,320 INFO L533 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e79ab4e9-2c15-41d1-a9a3-9aa0806e687c/bin/uautomizer-verify-aQ6SnzHsRB/data/4b52a2612/c020c31b9cc548f19e45fbfdf53842e6/FLAG1bc23f291 [2024-11-28 05:03:59,692 INFO L384 CDTParser]: Found 1 translation units. [2024-11-28 05:03:59,693 INFO L180 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e79ab4e9-2c15-41d1-a9a3-9aa0806e687c/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w64_d8_e0.c [2024-11-28 05:03:59,707 INFO L427 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e79ab4e9-2c15-41d1-a9a3-9aa0806e687c/bin/uautomizer-verify-aQ6SnzHsRB/data/4b52a2612/c020c31b9cc548f19e45fbfdf53842e6/FLAG1bc23f291 [2024-11-28 05:03:59,731 INFO L435 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e79ab4e9-2c15-41d1-a9a3-9aa0806e687c/bin/uautomizer-verify-aQ6SnzHsRB/data/4b52a2612/c020c31b9cc548f19e45fbfdf53842e6 [2024-11-28 05:03:59,735 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2024-11-28 05:03:59,737 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2024-11-28 05:03:59,739 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2024-11-28 05:03:59,740 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2024-11-28 05:03:59,744 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2024-11-28 05:03:59,745 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.11 05:03:59" (1/1) ... [2024-11-28 05:03:59,748 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@5bd085 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 05:03:59, skipping insertion in model container [2024-11-28 05:03:59,748 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.11 05:03:59" (1/1) ... [2024-11-28 05:03:59,790 INFO L175 MainTranslator]: Built tables and reachable declarations [2024-11-28 05:03:59,979 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e79ab4e9-2c15-41d1-a9a3-9aa0806e687c/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w64_d8_e0.c[1279,1292] [2024-11-28 05:04:00,142 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-11-28 05:04:00,155 INFO L200 MainTranslator]: Completed pre-run [2024-11-28 05:04:00,163 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e79ab4e9-2c15-41d1-a9a3-9aa0806e687c/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w64_d8_e0.c[1279,1292] [2024-11-28 05:04:00,289 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-11-28 05:04:00,310 INFO L204 MainTranslator]: Completed translation [2024-11-28 05:04:00,311 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 05:04:00 WrapperNode [2024-11-28 05:04:00,311 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2024-11-28 05:04:00,312 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2024-11-28 05:04:00,312 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2024-11-28 05:04:00,312 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2024-11-28 05:04:00,318 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 05:04:00" (1/1) ... [2024-11-28 05:04:00,334 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 05:04:00" (1/1) ... [2024-11-28 05:04:00,392 INFO L138 Inliner]: procedures = 17, calls = 11, calls flagged for inlining = 3, calls inlined = 3, statements flattened = 638 [2024-11-28 05:04:00,393 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2024-11-28 05:04:00,393 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2024-11-28 05:04:00,393 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2024-11-28 05:04:00,393 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2024-11-28 05:04:00,406 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 05:04:00" (1/1) ... [2024-11-28 05:04:00,406 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 05:04:00" (1/1) ... [2024-11-28 05:04:00,418 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 05:04:00" (1/1) ... [2024-11-28 05:04:00,441 INFO L175 MemorySlicer]: Split 2 memory accesses to 1 slices as follows [2]. 100 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2]. The 0 writes are split as follows [0]. [2024-11-28 05:04:00,441 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 05:04:00" (1/1) ... [2024-11-28 05:04:00,441 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 05:04:00" (1/1) ... [2024-11-28 05:04:00,471 INFO L184 PluginConnector]: Executing the observer ReplaceArrayAssignments from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 05:04:00" (1/1) ... [2024-11-28 05:04:00,473 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 05:04:00" (1/1) ... [2024-11-28 05:04:00,483 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 05:04:00" (1/1) ... [2024-11-28 05:04:00,486 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 05:04:00" (1/1) ... [2024-11-28 05:04:00,491 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 05:04:00" (1/1) ... [2024-11-28 05:04:00,501 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2024-11-28 05:04:00,505 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2024-11-28 05:04:00,506 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2024-11-28 05:04:00,506 INFO L274 PluginConnector]: RCFGBuilder initialized [2024-11-28 05:04:00,507 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 05:04:00" (1/1) ... [2024-11-28 05:04:00,516 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2024-11-28 05:04:00,533 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e79ab4e9-2c15-41d1-a9a3-9aa0806e687c/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 05:04:00,547 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e79ab4e9-2c15-41d1-a9a3-9aa0806e687c/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (exit command is (exit), workingDir is null) [2024-11-28 05:04:00,551 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e79ab4e9-2c15-41d1-a9a3-9aa0806e687c/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Waiting until timeout for monitored process [2024-11-28 05:04:00,580 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2024-11-28 05:04:00,580 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~intINTTYPE1#0 [2024-11-28 05:04:00,581 INFO L130 BoogieDeclarations]: Found specification of procedure assume_abort_if_not [2024-11-28 05:04:00,581 INFO L138 BoogieDeclarations]: Found implementation of procedure assume_abort_if_not [2024-11-28 05:04:00,581 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2024-11-28 05:04:00,581 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2024-11-28 05:04:00,851 INFO L234 CfgBuilder]: Building ICFG [2024-11-28 05:04:00,853 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2024-11-28 05:04:01,659 INFO L? ?]: Removed 198 outVars from TransFormulas that were not future-live. [2024-11-28 05:04:01,660 INFO L283 CfgBuilder]: Performing block encoding [2024-11-28 05:04:01,671 INFO L307 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2024-11-28 05:04:01,671 INFO L312 CfgBuilder]: Removed 1 assume(true) statements. [2024-11-28 05:04:01,671 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.11 05:04:01 BoogieIcfgContainer [2024-11-28 05:04:01,672 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2024-11-28 05:04:01,674 INFO L112 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2024-11-28 05:04:01,674 INFO L270 PluginConnector]: Initializing TraceAbstraction... [2024-11-28 05:04:01,680 INFO L274 PluginConnector]: TraceAbstraction initialized [2024-11-28 05:04:01,680 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 28.11 05:03:59" (1/3) ... [2024-11-28 05:04:01,681 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@4cfbd25a and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.11 05:04:01, skipping insertion in model container [2024-11-28 05:04:01,682 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 05:04:00" (2/3) ... [2024-11-28 05:04:01,683 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@4cfbd25a and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.11 05:04:01, skipping insertion in model container [2024-11-28 05:04:01,684 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.11 05:04:01" (3/3) ... [2024-11-28 05:04:01,685 INFO L128 eAbstractionObserver]: Analyzing ICFG btor2c-lazyMod.circular_pointer_top_w64_d8_e0.c [2024-11-28 05:04:01,700 INFO L216 ceAbstractionStarter]: Automizer settings: Hoare:LoopHeads NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2024-11-28 05:04:01,701 INFO L151 ceAbstractionStarter]: Applying trace abstraction to ICFG btor2c-lazyMod.circular_pointer_top_w64_d8_e0.c that has 2 procedures, 20 locations, 1 initial locations, 1 loop locations, and 1 error locations. [2024-11-28 05:04:01,745 INFO L332 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2024-11-28 05:04:01,756 INFO L333 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mAutomataTypeConcurrency=PETRI_NET, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopHeads, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@1aefbcf5, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2024-11-28 05:04:01,756 INFO L334 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2024-11-28 05:04:01,760 INFO L276 IsEmpty]: Start isEmpty. Operand has 20 states, 14 states have (on average 1.2857142857142858) internal successors, (18), 15 states have internal predecessors, (18), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-28 05:04:01,766 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2024-11-28 05:04:01,766 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 05:04:01,767 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 05:04:01,768 INFO L396 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 05:04:01,772 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 05:04:01,773 INFO L85 PathProgramCache]: Analyzing trace with hash 1676994902, now seen corresponding path program 1 times [2024-11-28 05:04:01,784 INFO L118 FreeRefinementEngine]: Executing refinement strategy FOX [2024-11-28 05:04:01,784 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1643649010] [2024-11-28 05:04:01,785 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 05:04:01,785 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-28 05:04:01,786 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e79ab4e9-2c15-41d1-a9a3-9aa0806e687c/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 05:04:01,789 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e79ab4e9-2c15-41d1-a9a3-9aa0806e687c/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-28 05:04:01,793 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e79ab4e9-2c15-41d1-a9a3-9aa0806e687c/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2024-11-28 05:04:02,179 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 05:04:02,184 INFO L256 TraceCheckSpWp]: Trace formula consists of 262 conjuncts, 19 conjuncts are in the unsatisfiable core [2024-11-28 05:04:02,195 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-28 05:04:02,563 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-11-28 05:04:02,563 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-28 05:04:02,777 INFO L136 FreeRefinementEngine]: Strategy FOX found an infeasible trace [2024-11-28 05:04:02,778 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1643649010] [2024-11-28 05:04:02,778 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1643649010] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-28 05:04:02,778 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [78461619] [2024-11-28 05:04:02,779 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 05:04:02,779 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2024-11-28 05:04:02,779 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e79ab4e9-2c15-41d1-a9a3-9aa0806e687c/bin/uautomizer-verify-aQ6SnzHsRB/cvc4 [2024-11-28 05:04:02,781 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e79ab4e9-2c15-41d1-a9a3-9aa0806e687c/bin/uautomizer-verify-aQ6SnzHsRB/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2024-11-28 05:04:02,784 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e79ab4e9-2c15-41d1-a9a3-9aa0806e687c/bin/uautomizer-verify-aQ6SnzHsRB/cvc4 --incremental --print-success --lang smt (3)] Waiting until timeout for monitored process [2024-11-28 05:04:03,302 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 05:04:03,306 INFO L256 TraceCheckSpWp]: Trace formula consists of 262 conjuncts, 15 conjuncts are in the unsatisfiable core [2024-11-28 05:04:03,313 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-28 05:04:03,458 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-28 05:04:03,458 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-11-28 05:04:03,458 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [78461619] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 05:04:03,458 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-11-28 05:04:03,459 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [7] total 7 [2024-11-28 05:04:03,462 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [878779153] [2024-11-28 05:04:03,463 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 05:04:03,466 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-28 05:04:03,466 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy FOX [2024-11-28 05:04:03,486 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-28 05:04:03,487 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=53, Unknown=0, NotChecked=0, Total=72 [2024-11-28 05:04:03,489 INFO L87 Difference]: Start difference. First operand has 20 states, 14 states have (on average 1.2857142857142858) internal successors, (18), 15 states have internal predecessors, (18), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Second operand has 4 states, 4 states have (on average 2.75) internal successors, (11), 4 states have internal predecessors, (11), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-28 05:04:03,623 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 05:04:03,623 INFO L93 Difference]: Finished difference Result 43 states and 63 transitions. [2024-11-28 05:04:03,625 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-28 05:04:03,626 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 2.75) internal successors, (11), 4 states have internal predecessors, (11), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 23 [2024-11-28 05:04:03,626 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 05:04:03,632 INFO L225 Difference]: With dead ends: 43 [2024-11-28 05:04:03,632 INFO L226 Difference]: Without dead ends: 25 [2024-11-28 05:04:03,645 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 48 GetRequests, 41 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=19, Invalid=53, Unknown=0, NotChecked=0, Total=72 [2024-11-28 05:04:03,650 INFO L435 NwaCegarLoop]: 14 mSDtfsCounter, 0 mSDsluCounter, 24 mSDsCounter, 0 mSdLazyCounter, 18 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 38 SdHoareTripleChecker+Invalid, 18 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 18 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-28 05:04:03,651 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 38 Invalid, 18 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 18 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-28 05:04:03,665 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25 states. [2024-11-28 05:04:03,685 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25 to 25. [2024-11-28 05:04:03,687 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 25 states, 17 states have (on average 1.0588235294117647) internal successors, (18), 17 states have internal predecessors, (18), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-11-28 05:04:03,692 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25 states to 25 states and 30 transitions. [2024-11-28 05:04:03,695 INFO L78 Accepts]: Start accepts. Automaton has 25 states and 30 transitions. Word has length 23 [2024-11-28 05:04:03,696 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 05:04:03,697 INFO L471 AbstractCegarLoop]: Abstraction has 25 states and 30 transitions. [2024-11-28 05:04:03,698 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 2.75) internal successors, (11), 4 states have internal predecessors, (11), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-28 05:04:03,698 INFO L276 IsEmpty]: Start isEmpty. Operand 25 states and 30 transitions. [2024-11-28 05:04:03,699 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2024-11-28 05:04:03,700 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 05:04:03,701 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1] [2024-11-28 05:04:03,706 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e79ab4e9-2c15-41d1-a9a3-9aa0806e687c/bin/uautomizer-verify-aQ6SnzHsRB/cvc4 --incremental --print-success --lang smt (3)] Forceful destruction successful, exit code 0 [2024-11-28 05:04:03,908 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e79ab4e9-2c15-41d1-a9a3-9aa0806e687c/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Forceful destruction successful, exit code 0 [2024-11-28 05:04:04,101 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e79ab4e9-2c15-41d1-a9a3-9aa0806e687c/bin/uautomizer-verify-aQ6SnzHsRB/cvc4 --incremental --print-success --lang smt,2 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e79ab4e9-2c15-41d1-a9a3-9aa0806e687c/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-28 05:04:04,102 INFO L396 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 05:04:04,102 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 05:04:04,102 INFO L85 PathProgramCache]: Analyzing trace with hash -1294995197, now seen corresponding path program 1 times [2024-11-28 05:04:04,104 INFO L118 FreeRefinementEngine]: Executing refinement strategy FOX [2024-11-28 05:04:04,104 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1782047194] [2024-11-28 05:04:04,104 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 05:04:04,104 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-28 05:04:04,104 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e79ab4e9-2c15-41d1-a9a3-9aa0806e687c/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 05:04:04,107 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e79ab4e9-2c15-41d1-a9a3-9aa0806e687c/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-28 05:04:04,108 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e79ab4e9-2c15-41d1-a9a3-9aa0806e687c/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2024-11-28 05:04:04,531 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 05:04:04,542 INFO L256 TraceCheckSpWp]: Trace formula consists of 486 conjuncts, 43 conjuncts are in the unsatisfiable core [2024-11-28 05:04:04,554 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-28 05:04:05,228 INFO L134 CoverageAnalysis]: Checked inductivity of 68 backedges. 0 proven. 23 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2024-11-28 05:04:05,229 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-28 05:04:05,439 INFO L136 FreeRefinementEngine]: Strategy FOX found an infeasible trace [2024-11-28 05:04:05,439 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1782047194] [2024-11-28 05:04:05,439 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1782047194] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-28 05:04:05,439 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [1424263542] [2024-11-28 05:04:05,439 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 05:04:05,439 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2024-11-28 05:04:05,439 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e79ab4e9-2c15-41d1-a9a3-9aa0806e687c/bin/uautomizer-verify-aQ6SnzHsRB/cvc4 [2024-11-28 05:04:05,443 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e79ab4e9-2c15-41d1-a9a3-9aa0806e687c/bin/uautomizer-verify-aQ6SnzHsRB/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2024-11-28 05:04:05,444 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e79ab4e9-2c15-41d1-a9a3-9aa0806e687c/bin/uautomizer-verify-aQ6SnzHsRB/cvc4 --incremental --print-success --lang smt (5)] Waiting until timeout for monitored process [2024-11-28 05:04:06,356 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 05:04:06,385 INFO L256 TraceCheckSpWp]: Trace formula consists of 486 conjuncts, 40 conjuncts are in the unsatisfiable core [2024-11-28 05:04:06,400 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-28 05:04:06,779 INFO L134 CoverageAnalysis]: Checked inductivity of 68 backedges. 0 proven. 23 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2024-11-28 05:04:06,779 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-28 05:04:06,934 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [1424263542] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-28 05:04:06,934 INFO L185 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2024-11-28 05:04:06,934 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 9] total 10 [2024-11-28 05:04:06,934 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [40412349] [2024-11-28 05:04:06,934 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2024-11-28 05:04:06,935 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 10 states [2024-11-28 05:04:06,935 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy FOX [2024-11-28 05:04:06,936 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2024-11-28 05:04:06,936 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=108, Unknown=0, NotChecked=0, Total=132 [2024-11-28 05:04:06,936 INFO L87 Difference]: Start difference. First operand 25 states and 30 transitions. Second operand has 10 states, 9 states have (on average 2.4444444444444446) internal successors, (22), 10 states have internal predecessors, (22), 3 states have call successors, (6), 1 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 3 states have call successors, (6) [2024-11-28 05:04:07,411 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 05:04:07,411 INFO L93 Difference]: Finished difference Result 36 states and 44 transitions. [2024-11-28 05:04:07,412 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2024-11-28 05:04:07,412 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 9 states have (on average 2.4444444444444446) internal successors, (22), 10 states have internal predecessors, (22), 3 states have call successors, (6), 1 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 3 states have call successors, (6) Word has length 44 [2024-11-28 05:04:07,412 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 05:04:07,413 INFO L225 Difference]: With dead ends: 36 [2024-11-28 05:04:07,413 INFO L226 Difference]: Without dead ends: 34 [2024-11-28 05:04:07,413 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 98 GetRequests, 83 SyntacticMatches, 1 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 13 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=47, Invalid=193, Unknown=0, NotChecked=0, Total=240 [2024-11-28 05:04:07,414 INFO L435 NwaCegarLoop]: 12 mSDtfsCounter, 7 mSDsluCounter, 64 mSDsCounter, 0 mSdLazyCounter, 132 mSolverCounterSat, 7 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 7 SdHoareTripleChecker+Valid, 76 SdHoareTripleChecker+Invalid, 139 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 7 IncrementalHoareTripleChecker+Valid, 132 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2024-11-28 05:04:07,415 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [7 Valid, 76 Invalid, 139 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [7 Valid, 132 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2024-11-28 05:04:07,415 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34 states. [2024-11-28 05:04:07,421 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34 to 34. [2024-11-28 05:04:07,422 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 34 states, 23 states have (on average 1.0434782608695652) internal successors, (24), 23 states have internal predecessors, (24), 9 states have call successors, (9), 1 states have call predecessors, (9), 1 states have return successors, (9), 9 states have call predecessors, (9), 9 states have call successors, (9) [2024-11-28 05:04:07,423 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34 states to 34 states and 42 transitions. [2024-11-28 05:04:07,423 INFO L78 Accepts]: Start accepts. Automaton has 34 states and 42 transitions. Word has length 44 [2024-11-28 05:04:07,423 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 05:04:07,423 INFO L471 AbstractCegarLoop]: Abstraction has 34 states and 42 transitions. [2024-11-28 05:04:07,423 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 10 states, 9 states have (on average 2.4444444444444446) internal successors, (22), 10 states have internal predecessors, (22), 3 states have call successors, (6), 1 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 3 states have call successors, (6) [2024-11-28 05:04:07,424 INFO L276 IsEmpty]: Start isEmpty. Operand 34 states and 42 transitions. [2024-11-28 05:04:07,425 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2024-11-28 05:04:07,425 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 05:04:07,425 INFO L218 NwaCegarLoop]: trace histogram [9, 9, 9, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 1, 1, 1, 1] [2024-11-28 05:04:07,436 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e79ab4e9-2c15-41d1-a9a3-9aa0806e687c/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Forceful destruction successful, exit code 0 [2024-11-28 05:04:07,634 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e79ab4e9-2c15-41d1-a9a3-9aa0806e687c/bin/uautomizer-verify-aQ6SnzHsRB/cvc4 --incremental --print-success --lang smt (5)] Ended with exit code 0 [2024-11-28 05:04:07,830 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 4 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e79ab4e9-2c15-41d1-a9a3-9aa0806e687c/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true,5 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e79ab4e9-2c15-41d1-a9a3-9aa0806e687c/bin/uautomizer-verify-aQ6SnzHsRB/cvc4 --incremental --print-success --lang smt [2024-11-28 05:04:07,830 INFO L396 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 05:04:07,830 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 05:04:07,831 INFO L85 PathProgramCache]: Analyzing trace with hash 1531864950, now seen corresponding path program 2 times [2024-11-28 05:04:07,832 INFO L118 FreeRefinementEngine]: Executing refinement strategy FOX [2024-11-28 05:04:07,832 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1896864859] [2024-11-28 05:04:07,832 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2024-11-28 05:04:07,832 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-28 05:04:07,832 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e79ab4e9-2c15-41d1-a9a3-9aa0806e687c/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 05:04:07,835 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e79ab4e9-2c15-41d1-a9a3-9aa0806e687c/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-28 05:04:07,837 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e79ab4e9-2c15-41d1-a9a3-9aa0806e687c/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2024-11-28 05:04:08,478 INFO L229 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2024-11-28 05:04:08,478 INFO L230 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-28 05:04:08,489 INFO L256 TraceCheckSpWp]: Trace formula consists of 710 conjuncts, 88 conjuncts are in the unsatisfiable core [2024-11-28 05:04:08,511 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-28 05:04:13,003 INFO L134 CoverageAnalysis]: Checked inductivity of 169 backedges. 12 proven. 55 refuted. 0 times theorem prover too weak. 102 trivial. 0 not checked. [2024-11-28 05:04:13,003 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-28 05:04:18,090 WARN L851 $PredicateComparison]: unable to prove that (let ((.cse1 ((_ zero_extend 24) |c_ULTIMATE.start_main_~mask_SORT_1~0#1|))) (let ((.cse4 (= (_ bv0 8) ((_ extract 7 0) (bvand .cse1 (_ bv255 32))))) (.cse11 (= (_ bv0 32) ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |c_ULTIMATE.start_main_~mask_SORT_13~0#1|) ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) |c_ULTIMATE.start_main_~state_12~0#1|)))))))) (.cse10 (= ((_ extract 7 0) (bvand .cse1 (_ bv254 32))) (_ bv0 8))) (.cse14 (= |c_ULTIMATE.start_main_~state_91~0#1| (_ bv0 8)))) (let ((.cse0 (or (forall ((|v_ULTIMATE.start_main_~var_114_arg_0~0#1_19| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_110_arg_1~0#1_17| (_ BitVec 8))) (= ((_ extract 7 0) (bvand .cse1 ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_114_arg_0~0#1_19|) ((_ zero_extend 24) ((_ extract 7 0) (bvnot ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_110_arg_1~0#1_17|))))))))))) (_ bv0 8))) .cse14)) (.cse3 (not .cse14)) (.cse2 ((_ zero_extend 24) |c_ULTIMATE.start_main_~state_68~0#1|)) (.cse9 (not .cse10)) (.cse8 (not .cse11)) (.cse6 (not .cse4)) (.cse5 (= |c_ULTIMATE.start_main_~state_87~0#1| (bvand |c_ULTIMATE.start_main_~mask_SORT_3~0#1| |c_ULTIMATE.start_main_~state_55~0#1|)))) (and (or (and .cse0 (or (forall ((|v_ULTIMATE.start_main_~var_85_arg_1~0#1_17| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_114_arg_0~0#1_19| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_74_arg_1~0#1_17| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_71_arg_1~0#1_17| (_ BitVec 8))) (= ((_ extract 7 0) (bvand .cse1 ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) (bvnot ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) ((_ extract 7 0) (bvor (_ bv0 32) ((_ zero_extend 24) ((_ extract 7 0) (bvnot ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_74_arg_1~0#1_17|) ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_71_arg_1~0#1_17|) .cse2)))))) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_85_arg_1~0#1_17|))))))))))))))) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_114_arg_0~0#1_19|)))))) (_ bv0 8))) .cse3)) (let ((.cse7 (forall ((|v_ULTIMATE.start_main_~var_58_arg_2~0#1_15| (_ BitVec 64))) (= |c_ULTIMATE.start_main_~state_87~0#1| (bvand |c_ULTIMATE.start_main_~mask_SORT_3~0#1| |v_ULTIMATE.start_main_~var_58_arg_2~0#1_15|))))) (and (or (and (or .cse4 .cse5) (or .cse6 .cse7)) .cse8) (or (and (or .cse9 .cse7) (or .cse10 .cse5)) .cse11)))) (or (and .cse0 (or .cse3 (forall ((|v_ULTIMATE.start_main_~var_85_arg_1~0#1_17| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_114_arg_0~0#1_19| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_74_arg_1~0#1_17| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_71_arg_1~0#1_17| (_ BitVec 8))) (= (_ bv0 8) ((_ extract 7 0) (bvand .cse1 ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) (bvnot ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) ((_ extract 7 0) (bvor (_ bv1 32) ((_ zero_extend 24) ((_ extract 7 0) (bvnot ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_74_arg_1~0#1_17|) ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_71_arg_1~0#1_17|) .cse2)))))) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_85_arg_1~0#1_17|))))))))))))))) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_114_arg_0~0#1_19|)))))))))) (let ((.cse12 (forall ((|v_ULTIMATE.start_main_~var_58_arg_2~0#1_15| (_ BitVec 64))) (not (= |c_ULTIMATE.start_main_~state_87~0#1| (bvand |c_ULTIMATE.start_main_~mask_SORT_3~0#1| |v_ULTIMATE.start_main_~var_58_arg_2~0#1_15|))))) (.cse13 (not .cse5))) (and (or (and (or .cse9 .cse12) (or .cse10 .cse13)) .cse11) (or .cse8 (and (or .cse6 .cse12) (or .cse4 .cse13)))))))))) is different from false [2024-11-28 05:04:18,485 INFO L136 FreeRefinementEngine]: Strategy FOX found an infeasible trace [2024-11-28 05:04:18,485 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1896864859] [2024-11-28 05:04:18,485 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1896864859] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-28 05:04:18,485 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [747739672] [2024-11-28 05:04:18,485 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2024-11-28 05:04:18,485 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2024-11-28 05:04:18,485 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e79ab4e9-2c15-41d1-a9a3-9aa0806e687c/bin/uautomizer-verify-aQ6SnzHsRB/cvc4 [2024-11-28 05:04:18,487 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e79ab4e9-2c15-41d1-a9a3-9aa0806e687c/bin/uautomizer-verify-aQ6SnzHsRB/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2024-11-28 05:04:18,489 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e79ab4e9-2c15-41d1-a9a3-9aa0806e687c/bin/uautomizer-verify-aQ6SnzHsRB/cvc4 --incremental --print-success --lang smt (7)] Waiting until timeout for monitored process [2024-11-28 05:04:19,642 INFO L229 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2024-11-28 05:04:19,642 INFO L230 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-28 05:04:19,673 INFO L256 TraceCheckSpWp]: Trace formula consists of 710 conjuncts, 87 conjuncts are in the unsatisfiable core [2024-11-28 05:04:19,685 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-28 05:04:36,046 INFO L134 CoverageAnalysis]: Checked inductivity of 169 backedges. 12 proven. 55 refuted. 0 times theorem prover too weak. 102 trivial. 0 not checked. [2024-11-28 05:04:36,047 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-28 05:04:43,289 WARN L851 $PredicateComparison]: unable to prove that (let ((.cse4 ((_ zero_extend 24) |c_ULTIMATE.start_main_~mask_SORT_1~0#1|))) (let ((.cse6 ((_ zero_extend 24) |c_ULTIMATE.start_main_~state_68~0#1|)) (.cse2 (forall ((|v_ULTIMATE.start_main_~var_110_arg_1~0#1_21| (_ BitVec 8))) (= (_ bv0 8) ((_ extract 7 0) (bvand .cse4 ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) |c_ULTIMATE.start_main_~var_111~0#1|))) ((_ zero_extend 24) ((_ extract 7 0) (bvnot ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_110_arg_1~0#1_21|))))))))))))))) (let ((.cse3 (and (forall ((|v_ULTIMATE.start_main_~var_74_arg_1~0#1_21| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_112_arg_2~0#1_21| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_71_arg_1~0#1_21| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_85_arg_1~0#1_21| (_ BitVec 8))) (= ((_ extract 7 0) (bvand .cse4 ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) (bvnot ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) ((_ extract 7 0) (bvor (_ bv0 32) ((_ zero_extend 24) ((_ extract 7 0) (bvnot ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_74_arg_1~0#1_21|) ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_71_arg_1~0#1_21|) .cse6)))))) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_85_arg_1~0#1_21|))))))))))))))) ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_112_arg_2~0#1_21|)))))))) (_ bv0 8))) .cse2))) (let ((.cse5 (= (_ bv0 32) ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |c_ULTIMATE.start_main_~mask_SORT_13~0#1|) ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) |c_ULTIMATE.start_main_~state_12~0#1|)))))))) (.cse1 (let ((.cse7 (= |c_ULTIMATE.start_main_~state_87~0#1| (bvand |c_ULTIMATE.start_main_~mask_SORT_3~0#1| |c_ULTIMATE.start_main_~state_55~0#1|)))) (and (or (and .cse2 (forall ((|v_ULTIMATE.start_main_~var_74_arg_1~0#1_21| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_112_arg_2~0#1_21| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_71_arg_1~0#1_21| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_85_arg_1~0#1_21| (_ BitVec 8))) (= (_ bv0 8) ((_ extract 7 0) (bvand .cse4 ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) (bvnot ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) ((_ extract 7 0) (bvor (_ bv1 32) ((_ zero_extend 24) ((_ extract 7 0) (bvnot ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_74_arg_1~0#1_21|) ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_71_arg_1~0#1_21|) .cse6)))))) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_85_arg_1~0#1_21|))))))))))))))) ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_112_arg_2~0#1_21|))))))))))) (not .cse7)) (or .cse7 .cse3))))) (and (or (let ((.cse0 (= ((_ extract 7 0) (bvand .cse4 (_ bv254 32))) (_ bv0 8)))) (and (or .cse0 .cse1) (or (not .cse0) (and (or .cse2 (forall ((|v_ULTIMATE.start_main_~var_58_arg_2~0#1_19| (_ BitVec 64))) (not (= (bvand |c_ULTIMATE.start_main_~mask_SORT_3~0#1| |v_ULTIMATE.start_main_~var_58_arg_2~0#1_19|) |c_ULTIMATE.start_main_~state_87~0#1|)))) (or (forall ((|v_ULTIMATE.start_main_~var_58_arg_2~0#1_19| (_ BitVec 64))) (= (bvand |c_ULTIMATE.start_main_~mask_SORT_3~0#1| |v_ULTIMATE.start_main_~var_58_arg_2~0#1_19|) |c_ULTIMATE.start_main_~state_87~0#1|)) .cse3))))) .cse5) (or (= (_ bv0 8) ((_ extract 7 0) (bvand .cse4 (_ bv255 32)))) (not .cse5) .cse1)))))) is different from false [2024-11-28 05:04:44,452 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [747739672] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-28 05:04:44,452 INFO L185 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2024-11-28 05:04:44,452 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12] total 15 [2024-11-28 05:04:44,452 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2125295866] [2024-11-28 05:04:44,452 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2024-11-28 05:04:44,453 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 15 states [2024-11-28 05:04:44,454 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy FOX [2024-11-28 05:04:44,454 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2024-11-28 05:04:44,454 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=42, Invalid=203, Unknown=3, NotChecked=58, Total=306 [2024-11-28 05:04:44,455 INFO L87 Difference]: Start difference. First operand 34 states and 42 transitions. Second operand has 15 states, 12 states have (on average 2.8333333333333335) internal successors, (34), 15 states have internal predecessors, (34), 7 states have call successors, (13), 1 states have call predecessors, (13), 2 states have return successors, (13), 6 states have call predecessors, (13), 7 states have call successors, (13) [2024-11-28 05:05:13,195 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 05:05:13,195 INFO L93 Difference]: Finished difference Result 46 states and 57 transitions. [2024-11-28 05:05:13,195 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2024-11-28 05:05:13,196 INFO L78 Accepts]: Start accepts. Automaton has has 15 states, 12 states have (on average 2.8333333333333335) internal successors, (34), 15 states have internal predecessors, (34), 7 states have call successors, (13), 1 states have call predecessors, (13), 2 states have return successors, (13), 6 states have call predecessors, (13), 7 states have call successors, (13) Word has length 65 [2024-11-28 05:05:13,196 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 05:05:13,197 INFO L225 Difference]: With dead ends: 46 [2024-11-28 05:05:13,197 INFO L226 Difference]: Without dead ends: 44 [2024-11-28 05:05:13,198 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 146 GetRequests, 120 SyntacticMatches, 0 SemanticMatches, 26 ConstructedPredicates, 2 IntricatePredicates, 0 DeprecatedPredicates, 45 ImplicationChecksByTransitivity, 39.9s TimeCoverageRelationStatistics Valid=111, Invalid=541, Unknown=6, NotChecked=98, Total=756 [2024-11-28 05:05:13,199 INFO L435 NwaCegarLoop]: 12 mSDtfsCounter, 16 mSDsluCounter, 64 mSDsCounter, 0 mSdLazyCounter, 168 mSolverCounterSat, 11 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 4.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 16 SdHoareTripleChecker+Valid, 76 SdHoareTripleChecker+Invalid, 179 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 11 IncrementalHoareTripleChecker+Valid, 168 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 4.3s IncrementalHoareTripleChecker+Time [2024-11-28 05:05:13,200 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [16 Valid, 76 Invalid, 179 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [11 Valid, 168 Invalid, 0 Unknown, 0 Unchecked, 4.3s Time] [2024-11-28 05:05:13,201 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 44 states. [2024-11-28 05:05:13,214 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 44 to 43. [2024-11-28 05:05:13,215 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 43 states, 29 states have (on average 1.0344827586206897) internal successors, (30), 29 states have internal predecessors, (30), 12 states have call successors, (12), 1 states have call predecessors, (12), 1 states have return successors, (12), 12 states have call predecessors, (12), 12 states have call successors, (12) [2024-11-28 05:05:13,216 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 43 states to 43 states and 54 transitions. [2024-11-28 05:05:13,216 INFO L78 Accepts]: Start accepts. Automaton has 43 states and 54 transitions. Word has length 65 [2024-11-28 05:05:13,221 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 05:05:13,221 INFO L471 AbstractCegarLoop]: Abstraction has 43 states and 54 transitions. [2024-11-28 05:05:13,221 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 15 states, 12 states have (on average 2.8333333333333335) internal successors, (34), 15 states have internal predecessors, (34), 7 states have call successors, (13), 1 states have call predecessors, (13), 2 states have return successors, (13), 6 states have call predecessors, (13), 7 states have call successors, (13) [2024-11-28 05:05:13,221 INFO L276 IsEmpty]: Start isEmpty. Operand 43 states and 54 transitions. [2024-11-28 05:05:13,223 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 87 [2024-11-28 05:05:13,223 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 05:05:13,223 INFO L218 NwaCegarLoop]: trace histogram [12, 12, 12, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 3, 3, 1, 1, 1, 1] [2024-11-28 05:05:13,232 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e79ab4e9-2c15-41d1-a9a3-9aa0806e687c/bin/uautomizer-verify-aQ6SnzHsRB/cvc4 --incremental --print-success --lang smt (7)] Forceful destruction successful, exit code 0 [2024-11-28 05:05:13,431 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e79ab4e9-2c15-41d1-a9a3-9aa0806e687c/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Forceful destruction successful, exit code 0 [2024-11-28 05:05:13,623 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 7 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e79ab4e9-2c15-41d1-a9a3-9aa0806e687c/bin/uautomizer-verify-aQ6SnzHsRB/cvc4 --incremental --print-success --lang smt,6 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e79ab4e9-2c15-41d1-a9a3-9aa0806e687c/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-28 05:05:13,624 INFO L396 AbstractCegarLoop]: === Iteration 4 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 05:05:13,624 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 05:05:13,624 INFO L85 PathProgramCache]: Analyzing trace with hash -1616345373, now seen corresponding path program 3 times [2024-11-28 05:05:13,625 INFO L118 FreeRefinementEngine]: Executing refinement strategy FOX [2024-11-28 05:05:13,625 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [2061969076] [2024-11-28 05:05:13,625 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2024-11-28 05:05:13,625 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-28 05:05:13,625 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e79ab4e9-2c15-41d1-a9a3-9aa0806e687c/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 05:05:13,626 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e79ab4e9-2c15-41d1-a9a3-9aa0806e687c/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-28 05:05:13,628 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e79ab4e9-2c15-41d1-a9a3-9aa0806e687c/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2024-11-28 05:05:15,893 INFO L229 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 6 check-sat command(s) [2024-11-28 05:05:15,893 INFO L230 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-28 05:05:15,904 INFO L256 TraceCheckSpWp]: Trace formula consists of 885 conjuncts, 250 conjuncts are in the unsatisfiable core [2024-11-28 05:05:15,929 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-28 05:08:01,854 WARN L286 SmtUtils]: Spent 11.10s on a formula simplification that was a NOOP. DAG size: 414 (called from [L 388] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2024-11-28 05:08:27,190 WARN L286 SmtUtils]: Spent 11.52s on a formula simplification that was a NOOP. DAG size: 424 (called from [L 388] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2024-11-28 05:08:56,420 WARN L286 SmtUtils]: Spent 11.21s on a formula simplification that was a NOOP. DAG size: 417 (called from [L 388] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2024-11-28 05:09:49,192 WARN L249 Executor]: External (MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e79ab4e9-2c15-41d1-a9a3-9aa0806e687c/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1) with exit command (exit)) stderr output: (error "out of memory") [2024-11-28 05:09:49,192 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e79ab4e9-2c15-41d1-a9a3-9aa0806e687c/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Ended with exit code 101 [2024-11-28 05:09:49,193 INFO L136 FreeRefinementEngine]: Strategy FOX found an infeasible trace [2024-11-28 05:09:49,193 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2061969076] [2024-11-28 05:09:49,193 WARN L320 FreeRefinementEngine]: Global settings require throwing the following exception [2024-11-28 05:09:49,202 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e79ab4e9-2c15-41d1-a9a3-9aa0806e687c/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Ended with exit code 0 [2024-11-28 05:09:49,394 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 8 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e79ab4e9-2c15-41d1-a9a3-9aa0806e687c/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-28 05:09:49,394 FATAL L? ?]: An unrecoverable error occured during an interaction with an SMT solver: de.uni_freiburg.informatik.ultimate.logic.SMTLIBException: External (MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e79ab4e9-2c15-41d1-a9a3-9aa0806e687c/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1) with exit command (exit)) Received EOF on stdin. stderr output: (error "out of memory") at de.uni_freiburg.informatik.ultimate.smtsolver.external.Executor.parse(Executor.java:262) at de.uni_freiburg.informatik.ultimate.smtsolver.external.Executor.parseCheckSatResult(Executor.java:281) at de.uni_freiburg.informatik.ultimate.smtsolver.external.Scriptor.checkSat(Scriptor.java:155) at de.uni_freiburg.informatik.ultimate.logic.WrapperScript.checkSat(WrapperScript.java:163) at de.uni_freiburg.informatik.ultimate.logic.WrapperScript.checkSat(WrapperScript.java:163) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.ManagedScript.checkSat(ManagedScript.java:148) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.MonolithicImplicationChecker.checkImplication(MonolithicImplicationChecker.java:85) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier$PredicateComparison.compare(PredicateUnifier.java:912) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier$PredicateComparison.(PredicateUnifier.java:786) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate(PredicateUnifier.java:374) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate(PredicateUnifier.java:323) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.singletracecheck.TraceCheckSpWp$UnifyPostprocessor.postprocess(TraceCheckSpWp.java:555) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.predicates.IterativePredicateTransformer.applyPostprocessors(IterativePredicateTransformer.java:416) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.predicates.IterativePredicateTransformer.computeStrongestPostconditionSequence(IterativePredicateTransformer.java:195) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.singletracecheck.TraceCheckSpWp.computeInterpolantsUsingUnsatCore(TraceCheckSpWp.java:291) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.singletracecheck.TraceCheckSpWp.computeInterpolants(TraceCheckSpWp.java:181) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.singletracecheck.TraceCheckSpWp.(TraceCheckSpWp.java:160) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.IpTcStrategyModuleSpWp.construct(IpTcStrategyModuleSpWp.java:106) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.IpTcStrategyModuleSpWp.construct(IpTcStrategyModuleSpWp.java:1) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.IpTcStrategyModuleBase.getOrConstruct(IpTcStrategyModuleBase.java:101) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.IpTcStrategyModuleBase.isCorrect(IpTcStrategyModuleBase.java:57) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.tracehandling.AutomatonFreeRefinementEngine.checkFeasibility(AutomatonFreeRefinementEngine.java:210) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.tracehandling.AutomatonFreeRefinementEngine.executeStrategy(AutomatonFreeRefinementEngine.java:121) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.tracehandling.AutomatonFreeRefinementEngine.(AutomatonFreeRefinementEngine.java:85) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.TraceAbstractionRefinementEngine.(TraceAbstractionRefinementEngine.java:82) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.BasicCegarLoop.isCounterexampleFeasible(BasicCegarLoop.java:317) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.iterate(AbstractCegarLoop.java:407) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.startCegar(AbstractCegarLoop.java:342) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.runCegar(AbstractCegarLoop.java:324) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.executeCegarLoop(TraceAbstractionStarter.java:428) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.analyseProgram(TraceAbstractionStarter.java:314) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.analyseSequentialProgram(TraceAbstractionStarter.java:275) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.runCegarLoops(TraceAbstractionStarter.java:167) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.(TraceAbstractionStarter.java:140) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver.finish(TraceAbstractionObserver.java:132) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runObserver(PluginConnector.java:167) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runTool(PluginConnector.java:150) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.run(PluginConnector.java:127) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.executePluginConnector(ToolchainWalker.java:233) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.processPlugin(ToolchainWalker.java:227) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walkUnprotected(ToolchainWalker.java:144) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walk(ToolchainWalker.java:106) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainManager$Toolchain.processToolchain(ToolchainManager.java:319) at de.uni_freiburg.informatik.ultimate.core.coreplugin.toolchain.DefaultToolchainJob.run(DefaultToolchainJob.java:145) at org.eclipse.core.internal.jobs.Worker.run(Worker.java:63) Caused by: de.uni_freiburg.informatik.ultimate.logic.SMTLIBException: EOF at de.uni_freiburg.informatik.ultimate.smtsolver.external.Parser$Action$.CUP$do_action(Parser.java:1518) at de.uni_freiburg.informatik.ultimate.smtsolver.external.Parser.do_action(Parser.java:701) at com.github.jhoenicke.javacup.runtime.LRParser.parse(LRParser.java:383) at de.uni_freiburg.informatik.ultimate.smtsolver.external.Executor.parse(Executor.java:258) ... 44 more [2024-11-28 05:09:49,400 INFO L158 Benchmark]: Toolchain (without parser) took 349662.89ms. Allocated memory was 117.4MB in the beginning and 763.4MB in the end (delta: 645.9MB). Free memory was 91.5MB in the beginning and 383.2MB in the end (delta: -291.8MB). Peak memory consumption was 471.7MB. Max. memory is 16.1GB. [2024-11-28 05:09:49,400 INFO L158 Benchmark]: CDTParser took 0.37ms. Allocated memory is still 117.4MB. Free memory is still 83.9MB. There was no memory consumed. Max. memory is 16.1GB. [2024-11-28 05:09:49,400 INFO L158 Benchmark]: CACSL2BoogieTranslator took 572.22ms. Allocated memory is still 117.4MB. Free memory was 91.5MB in the beginning and 65.2MB in the end (delta: 26.3MB). Peak memory consumption was 25.2MB. Max. memory is 16.1GB. [2024-11-28 05:09:49,401 INFO L158 Benchmark]: Boogie Procedure Inliner took 80.94ms. Allocated memory is still 117.4MB. Free memory was 65.2MB in the beginning and 60.3MB in the end (delta: 4.8MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. [2024-11-28 05:09:49,401 INFO L158 Benchmark]: Boogie Preprocessor took 107.37ms. Allocated memory is still 117.4MB. Free memory was 60.3MB in the beginning and 54.7MB in the end (delta: 5.6MB). There was no memory consumed. Max. memory is 16.1GB. [2024-11-28 05:09:49,403 INFO L158 Benchmark]: RCFGBuilder took 1166.39ms. Allocated memory was 117.4MB in the beginning and 243.3MB in the end (delta: 125.8MB). Free memory was 54.7MB in the beginning and 206.8MB in the end (delta: -152.1MB). Peak memory consumption was 30.5MB. Max. memory is 16.1GB. [2024-11-28 05:09:49,404 INFO L158 Benchmark]: TraceAbstraction took 347725.58ms. Allocated memory was 243.3MB in the beginning and 763.4MB in the end (delta: 520.1MB). Free memory was 206.2MB in the beginning and 383.2MB in the end (delta: -177.1MB). Peak memory consumption was 462.7MB. Max. memory is 16.1GB. [2024-11-28 05:09:49,406 INFO L338 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.37ms. Allocated memory is still 117.4MB. Free memory is still 83.9MB. There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 572.22ms. Allocated memory is still 117.4MB. Free memory was 91.5MB in the beginning and 65.2MB in the end (delta: 26.3MB). Peak memory consumption was 25.2MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 80.94ms. Allocated memory is still 117.4MB. Free memory was 65.2MB in the beginning and 60.3MB in the end (delta: 4.8MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. * Boogie Preprocessor took 107.37ms. Allocated memory is still 117.4MB. Free memory was 60.3MB in the beginning and 54.7MB in the end (delta: 5.6MB). There was no memory consumed. Max. memory is 16.1GB. * RCFGBuilder took 1166.39ms. Allocated memory was 117.4MB in the beginning and 243.3MB in the end (delta: 125.8MB). Free memory was 54.7MB in the beginning and 206.8MB in the end (delta: -152.1MB). Peak memory consumption was 30.5MB. Max. memory is 16.1GB. * TraceAbstraction took 347725.58ms. Allocated memory was 243.3MB in the beginning and 763.4MB in the end (delta: 520.1MB). Free memory was 206.2MB in the beginning and 383.2MB in the end (delta: -177.1MB). Peak memory consumption was 462.7MB. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - ExceptionOrErrorResult: SMTLIBException: External (MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e79ab4e9-2c15-41d1-a9a3-9aa0806e687c/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1) with exit command (exit)) Received EOF on stdin. stderr output: (error "out of memory") de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: SMTLIBException: External (MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e79ab4e9-2c15-41d1-a9a3-9aa0806e687c/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1) with exit command (exit)) Received EOF on stdin. stderr output: (error "out of memory") : de.uni_freiburg.informatik.ultimate.smtsolver.external.Executor.parse(Executor.java:262) RESULT: Ultimate could not prove your program: Toolchain returned no result. Received shutdown request... --- End real Ultimate output --- Execution finished normally Writing output log to file Ultimate.log Result: ERROR: ExceptionOrErrorResult: SMTLIBException: External (MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e79ab4e9-2c15-41d1-a9a3-9aa0806e687c/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1) with exit command (exit)) Received EOF on stdin. stderr output: (error "out of memory")