./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w8_d8_e0.c --full-output --architecture 64bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version d790fecc Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25b25d56-1da7-44e1-806b-92cb0bdd2bbb/bin/uautomizer-verify-aQ6SnzHsRB/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25b25d56-1da7-44e1-806b-92cb0bdd2bbb/bin/uautomizer-verify-aQ6SnzHsRB/plugins/org.eclipse.equinox.launcher_1.6.800.v20240513-1750.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25b25d56-1da7-44e1-806b-92cb0bdd2bbb/bin/uautomizer-verify-aQ6SnzHsRB/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25b25d56-1da7-44e1-806b-92cb0bdd2bbb/bin/uautomizer-verify-aQ6SnzHsRB/config/AutomizerReach.xml -i ../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w8_d8_e0.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25b25d56-1da7-44e1-806b-92cb0bdd2bbb/bin/uautomizer-verify-aQ6SnzHsRB/config/svcomp-Reach-64bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25b25d56-1da7-44e1-806b-92cb0bdd2bbb/bin/uautomizer-verify-aQ6SnzHsRB --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash 892a8506f942e825df8a32caf9cdaec45fd7cb5b4dbda5bc8acf67b64cc58b84 --- Real Ultimate output --- This is Ultimate 0.3.0-dev-d790fec [2024-11-27 20:08:20,279 INFO L188 SettingsManager]: Resetting all preferences to default values... [2024-11-27 20:08:20,393 INFO L114 SettingsManager]: Loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25b25d56-1da7-44e1-806b-92cb0bdd2bbb/bin/uautomizer-verify-aQ6SnzHsRB/config/svcomp-Reach-64bit-Automizer_Default.epf [2024-11-27 20:08:20,401 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2024-11-27 20:08:20,401 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2024-11-27 20:08:20,448 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2024-11-27 20:08:20,449 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2024-11-27 20:08:20,450 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2024-11-27 20:08:20,450 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2024-11-27 20:08:20,451 INFO L153 SettingsManager]: * Use memory slicer=true [2024-11-27 20:08:20,452 INFO L151 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2024-11-27 20:08:20,452 INFO L153 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2024-11-27 20:08:20,453 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2024-11-27 20:08:20,453 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2024-11-27 20:08:20,454 INFO L153 SettingsManager]: * Use SBE=true [2024-11-27 20:08:20,454 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2024-11-27 20:08:20,455 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2024-11-27 20:08:20,455 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2024-11-27 20:08:20,455 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2024-11-27 20:08:20,456 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2024-11-27 20:08:20,456 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2024-11-27 20:08:20,456 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2024-11-27 20:08:20,456 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2024-11-27 20:08:20,456 INFO L153 SettingsManager]: * Behaviour of calls to undefined functions=OVERAPPROXIMATE_BEHAVIOUR [2024-11-27 20:08:20,456 INFO L153 SettingsManager]: * Use constant arrays=true [2024-11-27 20:08:20,456 INFO L151 SettingsManager]: Preferences of IcfgBuilder differ from their defaults: [2024-11-27 20:08:20,457 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-11-27 20:08:20,457 INFO L153 SettingsManager]: * Only consider context switches at boundaries of atomic blocks=true [2024-11-27 20:08:20,457 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2024-11-27 20:08:20,457 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2024-11-27 20:08:20,457 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2024-11-27 20:08:20,457 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-11-27 20:08:20,457 INFO L153 SettingsManager]: * Only consider context switches at boundaries of atomic blocks=true [2024-11-27 20:08:20,458 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2024-11-27 20:08:20,458 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2024-11-27 20:08:20,458 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2024-11-27 20:08:20,458 INFO L153 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2024-11-27 20:08:20,458 INFO L153 SettingsManager]: * Compute procedure contracts=false [2024-11-27 20:08:20,458 INFO L153 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopHeads [2024-11-27 20:08:20,458 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2024-11-27 20:08:20,458 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2024-11-27 20:08:20,459 INFO L153 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false [2024-11-27 20:08:20,460 INFO L153 SettingsManager]: * Automaton type used in concurrency analysis=PETRI_NET [2024-11-27 20:08:20,460 INFO L153 SettingsManager]: * Order on configurations for Petri net unfoldings=DBO [2024-11-27 20:08:20,460 INFO L153 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2024-11-27 20:08:20,460 INFO L153 SettingsManager]: * Looper check in Petri net analysis=SEMANTIC Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25b25d56-1da7-44e1-806b-92cb0bdd2bbb/bin/uautomizer-verify-aQ6SnzHsRB Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 892a8506f942e825df8a32caf9cdaec45fd7cb5b4dbda5bc8acf67b64cc58b84 [2024-11-27 20:08:20,790 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2024-11-27 20:08:20,799 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2024-11-27 20:08:20,806 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2024-11-27 20:08:20,808 INFO L270 PluginConnector]: Initializing CDTParser... [2024-11-27 20:08:20,808 INFO L274 PluginConnector]: CDTParser initialized [2024-11-27 20:08:20,809 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25b25d56-1da7-44e1-806b-92cb0bdd2bbb/bin/uautomizer-verify-aQ6SnzHsRB/../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w8_d8_e0.c [2024-11-27 20:08:23,922 INFO L533 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25b25d56-1da7-44e1-806b-92cb0bdd2bbb/bin/uautomizer-verify-aQ6SnzHsRB/data/c43645d00/2761b16329f84c2f942d3a9e558cc14a/FLAGb487e49ff [2024-11-27 20:08:24,408 INFO L384 CDTParser]: Found 1 translation units. [2024-11-27 20:08:24,409 INFO L180 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25b25d56-1da7-44e1-806b-92cb0bdd2bbb/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w8_d8_e0.c [2024-11-27 20:08:24,435 INFO L427 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25b25d56-1da7-44e1-806b-92cb0bdd2bbb/bin/uautomizer-verify-aQ6SnzHsRB/data/c43645d00/2761b16329f84c2f942d3a9e558cc14a/FLAGb487e49ff [2024-11-27 20:08:24,463 INFO L435 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25b25d56-1da7-44e1-806b-92cb0bdd2bbb/bin/uautomizer-verify-aQ6SnzHsRB/data/c43645d00/2761b16329f84c2f942d3a9e558cc14a [2024-11-27 20:08:24,467 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2024-11-27 20:08:24,470 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2024-11-27 20:08:24,473 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2024-11-27 20:08:24,473 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2024-11-27 20:08:24,479 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2024-11-27 20:08:24,480 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 27.11 08:08:24" (1/1) ... [2024-11-27 20:08:24,481 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@68b19cc0 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.11 08:08:24, skipping insertion in model container [2024-11-27 20:08:24,484 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 27.11 08:08:24" (1/1) ... [2024-11-27 20:08:24,540 INFO L175 MainTranslator]: Built tables and reachable declarations [2024-11-27 20:08:24,777 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25b25d56-1da7-44e1-806b-92cb0bdd2bbb/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w8_d8_e0.c[1278,1291] [2024-11-27 20:08:25,012 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-11-27 20:08:25,028 INFO L200 MainTranslator]: Completed pre-run [2024-11-27 20:08:25,039 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25b25d56-1da7-44e1-806b-92cb0bdd2bbb/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w8_d8_e0.c[1278,1291] [2024-11-27 20:08:25,239 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-11-27 20:08:25,264 INFO L204 MainTranslator]: Completed translation [2024-11-27 20:08:25,265 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.11 08:08:25 WrapperNode [2024-11-27 20:08:25,266 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2024-11-27 20:08:25,267 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2024-11-27 20:08:25,268 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2024-11-27 20:08:25,268 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2024-11-27 20:08:25,279 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.11 08:08:25" (1/1) ... [2024-11-27 20:08:25,317 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.11 08:08:25" (1/1) ... [2024-11-27 20:08:25,645 INFO L138 Inliner]: procedures = 17, calls = 11, calls flagged for inlining = 3, calls inlined = 3, statements flattened = 1382 [2024-11-27 20:08:25,645 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2024-11-27 20:08:25,646 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2024-11-27 20:08:25,646 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2024-11-27 20:08:25,646 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2024-11-27 20:08:25,658 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.11 08:08:25" (1/1) ... [2024-11-27 20:08:25,658 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.11 08:08:25" (1/1) ... [2024-11-27 20:08:25,687 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.11 08:08:25" (1/1) ... [2024-11-27 20:08:25,748 INFO L175 MemorySlicer]: Split 2 memory accesses to 1 slices as follows [2]. 100 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2]. The 0 writes are split as follows [0]. [2024-11-27 20:08:25,752 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.11 08:08:25" (1/1) ... [2024-11-27 20:08:25,753 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.11 08:08:25" (1/1) ... [2024-11-27 20:08:25,813 INFO L184 PluginConnector]: Executing the observer ReplaceArrayAssignments from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.11 08:08:25" (1/1) ... [2024-11-27 20:08:25,817 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.11 08:08:25" (1/1) ... [2024-11-27 20:08:25,840 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.11 08:08:25" (1/1) ... [2024-11-27 20:08:25,867 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.11 08:08:25" (1/1) ... [2024-11-27 20:08:25,879 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.11 08:08:25" (1/1) ... [2024-11-27 20:08:25,899 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2024-11-27 20:08:25,900 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2024-11-27 20:08:25,900 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2024-11-27 20:08:25,901 INFO L274 PluginConnector]: RCFGBuilder initialized [2024-11-27 20:08:25,902 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.11 08:08:25" (1/1) ... [2024-11-27 20:08:25,909 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2024-11-27 20:08:25,923 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25b25d56-1da7-44e1-806b-92cb0bdd2bbb/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-27 20:08:25,938 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25b25d56-1da7-44e1-806b-92cb0bdd2bbb/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (exit command is (exit), workingDir is null) [2024-11-27 20:08:25,947 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25b25d56-1da7-44e1-806b-92cb0bdd2bbb/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Waiting until timeout for monitored process [2024-11-27 20:08:25,973 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2024-11-27 20:08:25,973 INFO L130 BoogieDeclarations]: Found specification of procedure assume_abort_if_not [2024-11-27 20:08:25,973 INFO L138 BoogieDeclarations]: Found implementation of procedure assume_abort_if_not [2024-11-27 20:08:25,974 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#0 [2024-11-27 20:08:25,974 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2024-11-27 20:08:25,974 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2024-11-27 20:08:26,280 INFO L234 CfgBuilder]: Building ICFG [2024-11-27 20:08:26,283 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2024-11-27 20:08:29,053 INFO L? ?]: Removed 754 outVars from TransFormulas that were not future-live. [2024-11-27 20:08:29,054 INFO L283 CfgBuilder]: Performing block encoding [2024-11-27 20:08:29,084 INFO L307 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2024-11-27 20:08:29,088 INFO L312 CfgBuilder]: Removed 1 assume(true) statements. [2024-11-27 20:08:29,088 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 27.11 08:08:29 BoogieIcfgContainer [2024-11-27 20:08:29,090 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2024-11-27 20:08:29,093 INFO L112 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2024-11-27 20:08:29,093 INFO L270 PluginConnector]: Initializing TraceAbstraction... [2024-11-27 20:08:29,099 INFO L274 PluginConnector]: TraceAbstraction initialized [2024-11-27 20:08:29,100 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 27.11 08:08:24" (1/3) ... [2024-11-27 20:08:29,101 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@54c9243e and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 27.11 08:08:29, skipping insertion in model container [2024-11-27 20:08:29,101 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.11 08:08:25" (2/3) ... [2024-11-27 20:08:29,102 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@54c9243e and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 27.11 08:08:29, skipping insertion in model container [2024-11-27 20:08:29,102 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 27.11 08:08:29" (3/3) ... [2024-11-27 20:08:29,105 INFO L128 eAbstractionObserver]: Analyzing ICFG btor2c-lazyMod.circular_pointer_top_w8_d8_e0.c [2024-11-27 20:08:29,124 INFO L216 ceAbstractionStarter]: Automizer settings: Hoare:LoopHeads NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2024-11-27 20:08:29,126 INFO L151 ceAbstractionStarter]: Applying trace abstraction to ICFG btor2c-lazyMod.circular_pointer_top_w8_d8_e0.c that has 2 procedures, 392 locations, 1 initial locations, 1 loop locations, and 1 error locations. [2024-11-27 20:08:29,217 INFO L332 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2024-11-27 20:08:29,238 INFO L333 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mAutomataTypeConcurrency=PETRI_NET, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopHeads, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@2f427c01, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2024-11-27 20:08:29,238 INFO L334 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2024-11-27 20:08:29,247 INFO L276 IsEmpty]: Start isEmpty. Operand has 392 states, 386 states have (on average 1.4922279792746114) internal successors, (576), 387 states have internal predecessors, (576), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-27 20:08:29,269 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 118 [2024-11-27 20:08:29,269 INFO L210 NwaCegarLoop]: Found error trace [2024-11-27 20:08:29,270 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-27 20:08:29,272 INFO L396 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-27 20:08:29,278 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-27 20:08:29,280 INFO L85 PathProgramCache]: Analyzing trace with hash -1934366869, now seen corresponding path program 1 times [2024-11-27 20:08:29,290 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-27 20:08:29,290 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [691360160] [2024-11-27 20:08:29,291 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-27 20:08:29,292 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-27 20:08:29,549 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-27 20:08:29,957 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-11-27 20:08:29,957 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-27 20:08:29,958 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [691360160] [2024-11-27 20:08:29,958 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [691360160] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-27 20:08:29,962 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [30365970] [2024-11-27 20:08:29,962 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-27 20:08:29,962 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-27 20:08:29,962 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25b25d56-1da7-44e1-806b-92cb0bdd2bbb/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-27 20:08:29,969 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25b25d56-1da7-44e1-806b-92cb0bdd2bbb/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-27 20:08:29,971 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25b25d56-1da7-44e1-806b-92cb0bdd2bbb/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2024-11-27 20:08:30,494 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-27 20:08:30,501 INFO L256 TraceCheckSpWp]: Trace formula consists of 685 conjuncts, 1 conjuncts are in the unsatisfiable core [2024-11-27 20:08:30,513 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-27 20:08:30,547 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-11-27 20:08:30,550 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-11-27 20:08:30,551 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [30365970] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-27 20:08:30,551 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-11-27 20:08:30,552 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [2] total 2 [2024-11-27 20:08:30,554 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1877976126] [2024-11-27 20:08:30,558 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-27 20:08:30,564 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 2 states [2024-11-27 20:08:30,564 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-27 20:08:30,593 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2024-11-27 20:08:30,593 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2024-11-27 20:08:30,597 INFO L87 Difference]: Start difference. First operand has 392 states, 386 states have (on average 1.4922279792746114) internal successors, (576), 387 states have internal predecessors, (576), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Second operand has 2 states, 2 states have (on average 53.5) internal successors, (107), 2 states have internal predecessors, (107), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 2 states have call successors, (3) [2024-11-27 20:08:30,665 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-27 20:08:30,665 INFO L93 Difference]: Finished difference Result 711 states and 1061 transitions. [2024-11-27 20:08:30,666 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-11-27 20:08:30,668 INFO L78 Accepts]: Start accepts. Automaton has has 2 states, 2 states have (on average 53.5) internal successors, (107), 2 states have internal predecessors, (107), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 2 states have call successors, (3) Word has length 117 [2024-11-27 20:08:30,668 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-27 20:08:30,678 INFO L225 Difference]: With dead ends: 711 [2024-11-27 20:08:30,678 INFO L226 Difference]: Without dead ends: 389 [2024-11-27 20:08:30,682 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 118 GetRequests, 118 SyntacticMatches, 0 SemanticMatches, 0 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2024-11-27 20:08:30,685 INFO L435 NwaCegarLoop]: 577 mSDtfsCounter, 0 mSDsluCounter, 0 mSDsCounter, 0 mSdLazyCounter, 0 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 577 SdHoareTripleChecker+Invalid, 0 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 0 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-27 20:08:30,687 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 577 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 0 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-27 20:08:30,705 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 389 states. [2024-11-27 20:08:30,741 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 389 to 389. [2024-11-27 20:08:30,744 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 389 states, 384 states have (on average 1.4869791666666667) internal successors, (571), 384 states have internal predecessors, (571), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-27 20:08:30,751 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 389 states to 389 states and 577 transitions. [2024-11-27 20:08:30,753 INFO L78 Accepts]: Start accepts. Automaton has 389 states and 577 transitions. Word has length 117 [2024-11-27 20:08:30,753 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-27 20:08:30,754 INFO L471 AbstractCegarLoop]: Abstraction has 389 states and 577 transitions. [2024-11-27 20:08:30,754 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 2 states, 2 states have (on average 53.5) internal successors, (107), 2 states have internal predecessors, (107), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 2 states have call successors, (3) [2024-11-27 20:08:30,754 INFO L276 IsEmpty]: Start isEmpty. Operand 389 states and 577 transitions. [2024-11-27 20:08:30,757 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 118 [2024-11-27 20:08:30,757 INFO L210 NwaCegarLoop]: Found error trace [2024-11-27 20:08:30,758 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-27 20:08:30,771 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25b25d56-1da7-44e1-806b-92cb0bdd2bbb/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Ended with exit code 0 [2024-11-27 20:08:30,962 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 2 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25b25d56-1da7-44e1-806b-92cb0bdd2bbb/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable0 [2024-11-27 20:08:30,962 INFO L396 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-27 20:08:30,963 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-27 20:08:30,963 INFO L85 PathProgramCache]: Analyzing trace with hash 504535717, now seen corresponding path program 1 times [2024-11-27 20:08:30,963 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-27 20:08:30,963 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1930152334] [2024-11-27 20:08:30,964 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-27 20:08:30,964 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-27 20:08:31,266 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-27 20:08:32,385 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-27 20:08:32,386 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-27 20:08:32,386 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1930152334] [2024-11-27 20:08:32,386 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1930152334] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-27 20:08:32,386 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-27 20:08:32,386 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-27 20:08:32,386 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [911972685] [2024-11-27 20:08:32,386 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-27 20:08:32,387 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-27 20:08:32,387 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-27 20:08:32,388 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-27 20:08:32,392 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-27 20:08:32,393 INFO L87 Difference]: Start difference. First operand 389 states and 577 transitions. Second operand has 4 states, 4 states have (on average 26.25) internal successors, (105), 4 states have internal predecessors, (105), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-27 20:08:32,470 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-27 20:08:32,471 INFO L93 Difference]: Finished difference Result 393 states and 581 transitions. [2024-11-27 20:08:32,471 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-27 20:08:32,471 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 26.25) internal successors, (105), 4 states have internal predecessors, (105), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 117 [2024-11-27 20:08:32,474 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-27 20:08:32,476 INFO L225 Difference]: With dead ends: 393 [2024-11-27 20:08:32,480 INFO L226 Difference]: Without dead ends: 391 [2024-11-27 20:08:32,481 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-27 20:08:32,482 INFO L435 NwaCegarLoop]: 575 mSDtfsCounter, 0 mSDsluCounter, 1144 mSDsCounter, 0 mSdLazyCounter, 11 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 1719 SdHoareTripleChecker+Invalid, 11 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 11 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-27 20:08:32,482 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 1719 Invalid, 11 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 11 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-27 20:08:32,484 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 391 states. [2024-11-27 20:08:32,511 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 391 to 391. [2024-11-27 20:08:32,516 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 391 states, 386 states have (on average 1.4844559585492227) internal successors, (573), 386 states have internal predecessors, (573), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-27 20:08:32,519 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 391 states to 391 states and 579 transitions. [2024-11-27 20:08:32,521 INFO L78 Accepts]: Start accepts. Automaton has 391 states and 579 transitions. Word has length 117 [2024-11-27 20:08:32,523 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-27 20:08:32,523 INFO L471 AbstractCegarLoop]: Abstraction has 391 states and 579 transitions. [2024-11-27 20:08:32,524 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 26.25) internal successors, (105), 4 states have internal predecessors, (105), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-27 20:08:32,525 INFO L276 IsEmpty]: Start isEmpty. Operand 391 states and 579 transitions. [2024-11-27 20:08:32,531 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 119 [2024-11-27 20:08:32,531 INFO L210 NwaCegarLoop]: Found error trace [2024-11-27 20:08:32,531 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-27 20:08:32,531 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2024-11-27 20:08:32,531 INFO L396 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-27 20:08:32,532 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-27 20:08:32,532 INFO L85 PathProgramCache]: Analyzing trace with hash -1537566187, now seen corresponding path program 1 times [2024-11-27 20:08:32,532 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-27 20:08:32,532 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [220167257] [2024-11-27 20:08:32,532 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-27 20:08:32,533 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-27 20:08:32,725 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-27 20:08:33,288 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-27 20:08:33,288 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-27 20:08:33,288 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [220167257] [2024-11-27 20:08:33,289 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [220167257] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-27 20:08:33,289 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-27 20:08:33,289 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-27 20:08:33,289 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1026231414] [2024-11-27 20:08:33,289 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-27 20:08:33,292 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-27 20:08:33,292 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-27 20:08:33,293 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-27 20:08:33,293 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-11-27 20:08:33,293 INFO L87 Difference]: Start difference. First operand 391 states and 579 transitions. Second operand has 5 states, 5 states have (on average 21.2) internal successors, (106), 5 states have internal predecessors, (106), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-27 20:08:33,984 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-27 20:08:33,985 INFO L93 Difference]: Finished difference Result 971 states and 1441 transitions. [2024-11-27 20:08:33,985 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-27 20:08:33,986 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 21.2) internal successors, (106), 5 states have internal predecessors, (106), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 118 [2024-11-27 20:08:33,986 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-27 20:08:33,989 INFO L225 Difference]: With dead ends: 971 [2024-11-27 20:08:33,990 INFO L226 Difference]: Without dead ends: 391 [2024-11-27 20:08:33,993 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2024-11-27 20:08:33,996 INFO L435 NwaCegarLoop]: 629 mSDtfsCounter, 1090 mSDsluCounter, 1058 mSDsCounter, 0 mSdLazyCounter, 246 mSolverCounterSat, 29 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1090 SdHoareTripleChecker+Valid, 1687 SdHoareTripleChecker+Invalid, 275 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 29 IncrementalHoareTripleChecker+Valid, 246 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2024-11-27 20:08:33,997 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1090 Valid, 1687 Invalid, 275 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [29 Valid, 246 Invalid, 0 Unknown, 0 Unchecked, 0.6s Time] [2024-11-27 20:08:34,002 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 391 states. [2024-11-27 20:08:34,021 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 391 to 391. [2024-11-27 20:08:34,026 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 391 states, 386 states have (on average 1.4818652849740932) internal successors, (572), 386 states have internal predecessors, (572), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-27 20:08:34,029 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 391 states to 391 states and 578 transitions. [2024-11-27 20:08:34,032 INFO L78 Accepts]: Start accepts. Automaton has 391 states and 578 transitions. Word has length 118 [2024-11-27 20:08:34,033 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-27 20:08:34,033 INFO L471 AbstractCegarLoop]: Abstraction has 391 states and 578 transitions. [2024-11-27 20:08:34,034 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 21.2) internal successors, (106), 5 states have internal predecessors, (106), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-27 20:08:34,035 INFO L276 IsEmpty]: Start isEmpty. Operand 391 states and 578 transitions. [2024-11-27 20:08:34,036 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 120 [2024-11-27 20:08:34,039 INFO L210 NwaCegarLoop]: Found error trace [2024-11-27 20:08:34,039 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-27 20:08:34,039 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2024-11-27 20:08:34,040 INFO L396 AbstractCegarLoop]: === Iteration 4 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-27 20:08:34,040 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-27 20:08:34,040 INFO L85 PathProgramCache]: Analyzing trace with hash 930225119, now seen corresponding path program 1 times [2024-11-27 20:08:34,041 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-27 20:08:34,041 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [535365763] [2024-11-27 20:08:34,041 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-27 20:08:34,041 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-27 20:08:34,196 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-27 20:08:34,621 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-27 20:08:34,623 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-27 20:08:34,623 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [535365763] [2024-11-27 20:08:34,623 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [535365763] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-27 20:08:34,623 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-27 20:08:34,623 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-27 20:08:34,624 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [280056733] [2024-11-27 20:08:34,624 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-27 20:08:34,624 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-27 20:08:34,625 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-27 20:08:34,626 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-27 20:08:34,626 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-27 20:08:34,627 INFO L87 Difference]: Start difference. First operand 391 states and 578 transitions. Second operand has 4 states, 4 states have (on average 26.75) internal successors, (107), 4 states have internal predecessors, (107), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-27 20:08:34,698 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-27 20:08:34,698 INFO L93 Difference]: Finished difference Result 714 states and 1055 transitions. [2024-11-27 20:08:34,699 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-27 20:08:34,699 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 26.75) internal successors, (107), 4 states have internal predecessors, (107), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 119 [2024-11-27 20:08:34,700 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-27 20:08:34,702 INFO L225 Difference]: With dead ends: 714 [2024-11-27 20:08:34,702 INFO L226 Difference]: Without dead ends: 393 [2024-11-27 20:08:34,704 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-27 20:08:34,706 INFO L435 NwaCegarLoop]: 574 mSDtfsCounter, 0 mSDsluCounter, 1138 mSDsCounter, 0 mSdLazyCounter, 15 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 1712 SdHoareTripleChecker+Invalid, 15 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 15 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-27 20:08:34,707 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 1712 Invalid, 15 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 15 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-27 20:08:34,708 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 393 states. [2024-11-27 20:08:34,721 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 393 to 393. [2024-11-27 20:08:34,723 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 393 states, 388 states have (on average 1.4793814432989691) internal successors, (574), 388 states have internal predecessors, (574), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-27 20:08:34,727 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 393 states to 393 states and 580 transitions. [2024-11-27 20:08:34,728 INFO L78 Accepts]: Start accepts. Automaton has 393 states and 580 transitions. Word has length 119 [2024-11-27 20:08:34,728 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-27 20:08:34,728 INFO L471 AbstractCegarLoop]: Abstraction has 393 states and 580 transitions. [2024-11-27 20:08:34,729 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 26.75) internal successors, (107), 4 states have internal predecessors, (107), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-27 20:08:34,731 INFO L276 IsEmpty]: Start isEmpty. Operand 393 states and 580 transitions. [2024-11-27 20:08:34,732 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 121 [2024-11-27 20:08:34,732 INFO L210 NwaCegarLoop]: Found error trace [2024-11-27 20:08:34,733 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-27 20:08:34,733 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3 [2024-11-27 20:08:34,733 INFO L396 AbstractCegarLoop]: === Iteration 5 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-27 20:08:34,734 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-27 20:08:34,734 INFO L85 PathProgramCache]: Analyzing trace with hash 1969209588, now seen corresponding path program 1 times [2024-11-27 20:08:34,734 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-27 20:08:34,734 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [19060388] [2024-11-27 20:08:34,734 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-27 20:08:34,734 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-27 20:08:34,907 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-27 20:08:35,683 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-27 20:08:35,687 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-27 20:08:35,687 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [19060388] [2024-11-27 20:08:35,687 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [19060388] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-27 20:08:35,688 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-27 20:08:35,688 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-27 20:08:35,688 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1433174020] [2024-11-27 20:08:35,688 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-27 20:08:35,688 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-27 20:08:35,689 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-27 20:08:35,689 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-27 20:08:35,690 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-27 20:08:35,691 INFO L87 Difference]: Start difference. First operand 393 states and 580 transitions. Second operand has 4 states, 4 states have (on average 27.0) internal successors, (108), 4 states have internal predecessors, (108), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-27 20:08:35,898 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-27 20:08:35,898 INFO L93 Difference]: Finished difference Result 716 states and 1056 transitions. [2024-11-27 20:08:35,898 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-27 20:08:35,899 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 27.0) internal successors, (108), 4 states have internal predecessors, (108), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 120 [2024-11-27 20:08:35,899 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-27 20:08:35,901 INFO L225 Difference]: With dead ends: 716 [2024-11-27 20:08:35,901 INFO L226 Difference]: Without dead ends: 393 [2024-11-27 20:08:35,902 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-11-27 20:08:35,907 INFO L435 NwaCegarLoop]: 534 mSDtfsCounter, 484 mSDsluCounter, 536 mSDsCounter, 0 mSdLazyCounter, 84 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 484 SdHoareTripleChecker+Valid, 1070 SdHoareTripleChecker+Invalid, 84 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 84 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-11-27 20:08:35,907 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [484 Valid, 1070 Invalid, 84 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 84 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-11-27 20:08:35,909 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 393 states. [2024-11-27 20:08:35,924 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 393 to 393. [2024-11-27 20:08:35,926 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 393 states, 388 states have (on average 1.4768041237113403) internal successors, (573), 388 states have internal predecessors, (573), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-27 20:08:35,929 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 393 states to 393 states and 579 transitions. [2024-11-27 20:08:35,929 INFO L78 Accepts]: Start accepts. Automaton has 393 states and 579 transitions. Word has length 120 [2024-11-27 20:08:35,930 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-27 20:08:35,930 INFO L471 AbstractCegarLoop]: Abstraction has 393 states and 579 transitions. [2024-11-27 20:08:35,930 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 27.0) internal successors, (108), 4 states have internal predecessors, (108), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-27 20:08:35,931 INFO L276 IsEmpty]: Start isEmpty. Operand 393 states and 579 transitions. [2024-11-27 20:08:35,932 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 122 [2024-11-27 20:08:35,932 INFO L210 NwaCegarLoop]: Found error trace [2024-11-27 20:08:35,933 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-27 20:08:35,933 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4 [2024-11-27 20:08:35,934 INFO L396 AbstractCegarLoop]: === Iteration 6 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-27 20:08:35,934 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-27 20:08:35,935 INFO L85 PathProgramCache]: Analyzing trace with hash -2133916823, now seen corresponding path program 1 times [2024-11-27 20:08:35,935 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-27 20:08:35,935 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [113099919] [2024-11-27 20:08:35,935 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-27 20:08:35,936 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-27 20:08:36,063 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-27 20:08:36,466 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-27 20:08:36,467 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-27 20:08:36,468 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [113099919] [2024-11-27 20:08:36,468 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [113099919] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-27 20:08:36,468 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-27 20:08:36,468 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-27 20:08:36,468 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1517924466] [2024-11-27 20:08:36,468 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-27 20:08:36,469 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-27 20:08:36,472 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-27 20:08:36,473 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-27 20:08:36,473 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-27 20:08:36,474 INFO L87 Difference]: Start difference. First operand 393 states and 579 transitions. Second operand has 5 states, 5 states have (on average 21.8) internal successors, (109), 5 states have internal predecessors, (109), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-27 20:08:36,656 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-27 20:08:36,657 INFO L93 Difference]: Finished difference Result 716 states and 1054 transitions. [2024-11-27 20:08:36,657 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-27 20:08:36,658 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 21.8) internal successors, (109), 5 states have internal predecessors, (109), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 121 [2024-11-27 20:08:36,658 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-27 20:08:36,660 INFO L225 Difference]: With dead ends: 716 [2024-11-27 20:08:36,661 INFO L226 Difference]: Without dead ends: 393 [2024-11-27 20:08:36,661 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-11-27 20:08:36,664 INFO L435 NwaCegarLoop]: 534 mSDtfsCounter, 1041 mSDsluCounter, 536 mSDsCounter, 0 mSdLazyCounter, 82 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1044 SdHoareTripleChecker+Valid, 1070 SdHoareTripleChecker+Invalid, 83 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 82 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-27 20:08:36,666 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1044 Valid, 1070 Invalid, 83 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 82 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-27 20:08:36,668 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 393 states. [2024-11-27 20:08:36,685 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 393 to 393. [2024-11-27 20:08:36,686 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 393 states, 388 states have (on average 1.4742268041237114) internal successors, (572), 388 states have internal predecessors, (572), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-27 20:08:36,688 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 393 states to 393 states and 578 transitions. [2024-11-27 20:08:36,689 INFO L78 Accepts]: Start accepts. Automaton has 393 states and 578 transitions. Word has length 121 [2024-11-27 20:08:36,689 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-27 20:08:36,689 INFO L471 AbstractCegarLoop]: Abstraction has 393 states and 578 transitions. [2024-11-27 20:08:36,690 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 21.8) internal successors, (109), 5 states have internal predecessors, (109), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-27 20:08:36,690 INFO L276 IsEmpty]: Start isEmpty. Operand 393 states and 578 transitions. [2024-11-27 20:08:36,691 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 123 [2024-11-27 20:08:36,691 INFO L210 NwaCegarLoop]: Found error trace [2024-11-27 20:08:36,692 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-27 20:08:36,692 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5 [2024-11-27 20:08:36,692 INFO L396 AbstractCegarLoop]: === Iteration 7 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-27 20:08:36,693 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-27 20:08:36,693 INFO L85 PathProgramCache]: Analyzing trace with hash 728541133, now seen corresponding path program 1 times [2024-11-27 20:08:36,693 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-27 20:08:36,693 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1626172901] [2024-11-27 20:08:36,693 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-27 20:08:36,693 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-27 20:08:36,796 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-27 20:08:37,136 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-27 20:08:37,136 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-27 20:08:37,136 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1626172901] [2024-11-27 20:08:37,136 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1626172901] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-27 20:08:37,136 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-27 20:08:37,136 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-27 20:08:37,136 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1391857703] [2024-11-27 20:08:37,137 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-27 20:08:37,137 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-27 20:08:37,137 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-27 20:08:37,138 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-27 20:08:37,138 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-27 20:08:37,138 INFO L87 Difference]: Start difference. First operand 393 states and 578 transitions. Second operand has 5 states, 5 states have (on average 22.0) internal successors, (110), 5 states have internal predecessors, (110), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-27 20:08:37,308 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-27 20:08:37,309 INFO L93 Difference]: Finished difference Result 716 states and 1052 transitions. [2024-11-27 20:08:37,309 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-27 20:08:37,309 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 22.0) internal successors, (110), 5 states have internal predecessors, (110), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 122 [2024-11-27 20:08:37,310 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-27 20:08:37,312 INFO L225 Difference]: With dead ends: 716 [2024-11-27 20:08:37,312 INFO L226 Difference]: Without dead ends: 393 [2024-11-27 20:08:37,313 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-11-27 20:08:37,313 INFO L435 NwaCegarLoop]: 534 mSDtfsCounter, 559 mSDsluCounter, 543 mSDsCounter, 0 mSdLazyCounter, 80 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 562 SdHoareTripleChecker+Valid, 1077 SdHoareTripleChecker+Invalid, 81 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 80 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-27 20:08:37,314 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [562 Valid, 1077 Invalid, 81 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 80 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-27 20:08:37,315 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 393 states. [2024-11-27 20:08:37,325 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 393 to 393. [2024-11-27 20:08:37,326 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 393 states, 388 states have (on average 1.4716494845360826) internal successors, (571), 388 states have internal predecessors, (571), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-27 20:08:37,329 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 393 states to 393 states and 577 transitions. [2024-11-27 20:08:37,330 INFO L78 Accepts]: Start accepts. Automaton has 393 states and 577 transitions. Word has length 122 [2024-11-27 20:08:37,330 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-27 20:08:37,330 INFO L471 AbstractCegarLoop]: Abstraction has 393 states and 577 transitions. [2024-11-27 20:08:37,330 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 22.0) internal successors, (110), 5 states have internal predecessors, (110), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-27 20:08:37,330 INFO L276 IsEmpty]: Start isEmpty. Operand 393 states and 577 transitions. [2024-11-27 20:08:37,332 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 124 [2024-11-27 20:08:37,332 INFO L210 NwaCegarLoop]: Found error trace [2024-11-27 20:08:37,332 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-27 20:08:37,333 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6 [2024-11-27 20:08:37,333 INFO L396 AbstractCegarLoop]: === Iteration 8 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-27 20:08:37,333 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-27 20:08:37,333 INFO L85 PathProgramCache]: Analyzing trace with hash 187884130, now seen corresponding path program 1 times [2024-11-27 20:08:37,334 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-27 20:08:37,334 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1485900880] [2024-11-27 20:08:37,334 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-27 20:08:37,334 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-27 20:08:37,437 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-27 20:08:37,777 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-27 20:08:37,777 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-27 20:08:37,777 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1485900880] [2024-11-27 20:08:37,777 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1485900880] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-27 20:08:37,777 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-27 20:08:37,778 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-27 20:08:37,778 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [865307533] [2024-11-27 20:08:37,778 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-27 20:08:37,778 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-27 20:08:37,778 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-27 20:08:37,779 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-27 20:08:37,779 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-27 20:08:37,779 INFO L87 Difference]: Start difference. First operand 393 states and 577 transitions. Second operand has 5 states, 5 states have (on average 22.2) internal successors, (111), 5 states have internal predecessors, (111), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-27 20:08:37,957 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-27 20:08:37,958 INFO L93 Difference]: Finished difference Result 716 states and 1050 transitions. [2024-11-27 20:08:37,958 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-27 20:08:37,958 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 22.2) internal successors, (111), 5 states have internal predecessors, (111), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 123 [2024-11-27 20:08:37,959 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-27 20:08:37,961 INFO L225 Difference]: With dead ends: 716 [2024-11-27 20:08:37,961 INFO L226 Difference]: Without dead ends: 393 [2024-11-27 20:08:37,962 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-11-27 20:08:37,963 INFO L435 NwaCegarLoop]: 534 mSDtfsCounter, 1025 mSDsluCounter, 536 mSDsCounter, 0 mSdLazyCounter, 78 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1028 SdHoareTripleChecker+Valid, 1070 SdHoareTripleChecker+Invalid, 79 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 78 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-27 20:08:37,963 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1028 Valid, 1070 Invalid, 79 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 78 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-27 20:08:37,964 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 393 states. [2024-11-27 20:08:37,975 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 393 to 393. [2024-11-27 20:08:37,976 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 393 states, 388 states have (on average 1.4690721649484537) internal successors, (570), 388 states have internal predecessors, (570), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-27 20:08:37,979 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 393 states to 393 states and 576 transitions. [2024-11-27 20:08:37,980 INFO L78 Accepts]: Start accepts. Automaton has 393 states and 576 transitions. Word has length 123 [2024-11-27 20:08:37,980 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-27 20:08:37,980 INFO L471 AbstractCegarLoop]: Abstraction has 393 states and 576 transitions. [2024-11-27 20:08:37,981 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 22.2) internal successors, (111), 5 states have internal predecessors, (111), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-27 20:08:37,981 INFO L276 IsEmpty]: Start isEmpty. Operand 393 states and 576 transitions. [2024-11-27 20:08:37,982 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 125 [2024-11-27 20:08:37,983 INFO L210 NwaCegarLoop]: Found error trace [2024-11-27 20:08:37,983 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-27 20:08:37,983 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7 [2024-11-27 20:08:37,983 INFO L396 AbstractCegarLoop]: === Iteration 9 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-27 20:08:37,984 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-27 20:08:37,984 INFO L85 PathProgramCache]: Analyzing trace with hash 358061862, now seen corresponding path program 1 times [2024-11-27 20:08:37,985 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-27 20:08:37,985 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [729654917] [2024-11-27 20:08:37,986 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-27 20:08:37,986 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-27 20:08:38,126 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-27 20:08:38,543 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-27 20:08:38,543 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-27 20:08:38,543 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [729654917] [2024-11-27 20:08:38,543 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [729654917] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-27 20:08:38,546 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-27 20:08:38,547 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-27 20:08:38,547 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1322565392] [2024-11-27 20:08:38,547 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-27 20:08:38,548 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-27 20:08:38,548 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-27 20:08:38,548 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-27 20:08:38,548 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-27 20:08:38,549 INFO L87 Difference]: Start difference. First operand 393 states and 576 transitions. Second operand has 4 states, 4 states have (on average 28.0) internal successors, (112), 4 states have internal predecessors, (112), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-27 20:08:38,663 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-27 20:08:38,663 INFO L93 Difference]: Finished difference Result 715 states and 1047 transitions. [2024-11-27 20:08:38,663 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-27 20:08:38,664 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 28.0) internal successors, (112), 4 states have internal predecessors, (112), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 124 [2024-11-27 20:08:38,664 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-27 20:08:38,666 INFO L225 Difference]: With dead ends: 715 [2024-11-27 20:08:38,666 INFO L226 Difference]: Without dead ends: 392 [2024-11-27 20:08:38,667 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-11-27 20:08:38,668 INFO L435 NwaCegarLoop]: 550 mSDtfsCounter, 479 mSDsluCounter, 552 mSDsCounter, 0 mSdLazyCounter, 41 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 479 SdHoareTripleChecker+Valid, 1102 SdHoareTripleChecker+Invalid, 42 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 41 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-27 20:08:38,668 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [479 Valid, 1102 Invalid, 42 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 41 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-27 20:08:38,669 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 392 states. [2024-11-27 20:08:38,680 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 392 to 392. [2024-11-27 20:08:38,681 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 392 states, 387 states have (on average 1.4651162790697674) internal successors, (567), 387 states have internal predecessors, (567), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-27 20:08:38,684 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 392 states to 392 states and 573 transitions. [2024-11-27 20:08:38,684 INFO L78 Accepts]: Start accepts. Automaton has 392 states and 573 transitions. Word has length 124 [2024-11-27 20:08:38,685 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-27 20:08:38,685 INFO L471 AbstractCegarLoop]: Abstraction has 392 states and 573 transitions. [2024-11-27 20:08:38,685 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 28.0) internal successors, (112), 4 states have internal predecessors, (112), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-27 20:08:38,685 INFO L276 IsEmpty]: Start isEmpty. Operand 392 states and 573 transitions. [2024-11-27 20:08:38,687 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 126 [2024-11-27 20:08:38,687 INFO L210 NwaCegarLoop]: Found error trace [2024-11-27 20:08:38,687 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-27 20:08:38,687 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8 [2024-11-27 20:08:38,688 INFO L396 AbstractCegarLoop]: === Iteration 10 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-27 20:08:38,688 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-27 20:08:38,688 INFO L85 PathProgramCache]: Analyzing trace with hash 1647365538, now seen corresponding path program 1 times [2024-11-27 20:08:38,688 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-27 20:08:38,689 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1778235542] [2024-11-27 20:08:38,689 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-27 20:08:38,689 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-27 20:08:38,792 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-27 20:08:39,103 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-27 20:08:39,104 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-27 20:08:39,104 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1778235542] [2024-11-27 20:08:39,104 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1778235542] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-27 20:08:39,104 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-27 20:08:39,104 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-27 20:08:39,104 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [29983786] [2024-11-27 20:08:39,104 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-27 20:08:39,105 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-27 20:08:39,105 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-27 20:08:39,105 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-27 20:08:39,105 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-11-27 20:08:39,106 INFO L87 Difference]: Start difference. First operand 392 states and 573 transitions. Second operand has 5 states, 5 states have (on average 22.6) internal successors, (113), 5 states have internal predecessors, (113), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-27 20:08:39,202 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-27 20:08:39,202 INFO L93 Difference]: Finished difference Result 716 states and 1044 transitions. [2024-11-27 20:08:39,203 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-11-27 20:08:39,203 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 22.6) internal successors, (113), 5 states have internal predecessors, (113), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 125 [2024-11-27 20:08:39,204 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-27 20:08:39,207 INFO L225 Difference]: With dead ends: 716 [2024-11-27 20:08:39,207 INFO L226 Difference]: Without dead ends: 392 [2024-11-27 20:08:39,208 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2024-11-27 20:08:39,209 INFO L435 NwaCegarLoop]: 562 mSDtfsCounter, 483 mSDsluCounter, 1116 mSDsCounter, 0 mSdLazyCounter, 32 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 483 SdHoareTripleChecker+Valid, 1678 SdHoareTripleChecker+Invalid, 32 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 32 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-27 20:08:39,209 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [483 Valid, 1678 Invalid, 32 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 32 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-27 20:08:39,210 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 392 states. [2024-11-27 20:08:39,220 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 392 to 392. [2024-11-27 20:08:39,221 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 392 states, 387 states have (on average 1.4625322997416021) internal successors, (566), 387 states have internal predecessors, (566), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-27 20:08:39,223 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 392 states to 392 states and 572 transitions. [2024-11-27 20:08:39,224 INFO L78 Accepts]: Start accepts. Automaton has 392 states and 572 transitions. Word has length 125 [2024-11-27 20:08:39,224 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-27 20:08:39,224 INFO L471 AbstractCegarLoop]: Abstraction has 392 states and 572 transitions. [2024-11-27 20:08:39,225 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 22.6) internal successors, (113), 5 states have internal predecessors, (113), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-27 20:08:39,225 INFO L276 IsEmpty]: Start isEmpty. Operand 392 states and 572 transitions. [2024-11-27 20:08:39,227 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 127 [2024-11-27 20:08:39,227 INFO L210 NwaCegarLoop]: Found error trace [2024-11-27 20:08:39,227 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-27 20:08:39,227 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable9 [2024-11-27 20:08:39,228 INFO L396 AbstractCegarLoop]: === Iteration 11 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-27 20:08:39,228 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-27 20:08:39,228 INFO L85 PathProgramCache]: Analyzing trace with hash 278777535, now seen corresponding path program 1 times [2024-11-27 20:08:39,228 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-27 20:08:39,228 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1964067887] [2024-11-27 20:08:39,229 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-27 20:08:39,229 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-27 20:08:39,357 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-27 20:08:39,756 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-27 20:08:39,756 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-27 20:08:39,756 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1964067887] [2024-11-27 20:08:39,756 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1964067887] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-27 20:08:39,756 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-27 20:08:39,756 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-27 20:08:39,757 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1663128035] [2024-11-27 20:08:39,757 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-27 20:08:39,757 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-27 20:08:39,757 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-27 20:08:39,758 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-27 20:08:39,758 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-27 20:08:39,758 INFO L87 Difference]: Start difference. First operand 392 states and 572 transitions. Second operand has 4 states, 4 states have (on average 28.5) internal successors, (114), 4 states have internal predecessors, (114), 2 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2024-11-27 20:08:39,857 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-27 20:08:39,857 INFO L93 Difference]: Finished difference Result 714 states and 1040 transitions. [2024-11-27 20:08:39,858 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-27 20:08:39,858 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 28.5) internal successors, (114), 4 states have internal predecessors, (114), 2 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 126 [2024-11-27 20:08:39,858 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-27 20:08:39,860 INFO L225 Difference]: With dead ends: 714 [2024-11-27 20:08:39,860 INFO L226 Difference]: Without dead ends: 392 [2024-11-27 20:08:39,861 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-11-27 20:08:39,861 INFO L435 NwaCegarLoop]: 552 mSDtfsCounter, 517 mSDsluCounter, 554 mSDsCounter, 0 mSdLazyCounter, 32 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 519 SdHoareTripleChecker+Valid, 1106 SdHoareTripleChecker+Invalid, 32 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 32 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-27 20:08:39,862 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [519 Valid, 1106 Invalid, 32 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 32 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-27 20:08:39,863 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 392 states. [2024-11-27 20:08:39,874 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 392 to 392. [2024-11-27 20:08:39,875 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 392 states, 387 states have (on average 1.4599483204134367) internal successors, (565), 387 states have internal predecessors, (565), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-27 20:08:39,877 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 392 states to 392 states and 571 transitions. [2024-11-27 20:08:39,878 INFO L78 Accepts]: Start accepts. Automaton has 392 states and 571 transitions. Word has length 126 [2024-11-27 20:08:39,878 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-27 20:08:39,878 INFO L471 AbstractCegarLoop]: Abstraction has 392 states and 571 transitions. [2024-11-27 20:08:39,878 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 28.5) internal successors, (114), 4 states have internal predecessors, (114), 2 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2024-11-27 20:08:39,878 INFO L276 IsEmpty]: Start isEmpty. Operand 392 states and 571 transitions. [2024-11-27 20:08:39,880 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 128 [2024-11-27 20:08:39,880 INFO L210 NwaCegarLoop]: Found error trace [2024-11-27 20:08:39,880 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-27 20:08:39,880 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable10 [2024-11-27 20:08:39,880 INFO L396 AbstractCegarLoop]: === Iteration 12 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-27 20:08:39,881 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-27 20:08:39,881 INFO L85 PathProgramCache]: Analyzing trace with hash -1200047413, now seen corresponding path program 1 times [2024-11-27 20:08:39,881 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-27 20:08:39,881 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [707143929] [2024-11-27 20:08:39,881 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-27 20:08:39,881 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-27 20:08:40,170 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-27 20:08:40,709 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-27 20:08:40,710 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-27 20:08:40,710 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [707143929] [2024-11-27 20:08:40,710 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [707143929] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-27 20:08:40,710 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-27 20:08:40,710 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-27 20:08:40,710 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2087713182] [2024-11-27 20:08:40,711 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-27 20:08:40,711 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-27 20:08:40,711 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-27 20:08:40,712 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-27 20:08:40,712 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-27 20:08:40,712 INFO L87 Difference]: Start difference. First operand 392 states and 571 transitions. Second operand has 5 states, 5 states have (on average 23.0) internal successors, (115), 5 states have internal predecessors, (115), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-27 20:08:40,878 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-27 20:08:40,878 INFO L93 Difference]: Finished difference Result 714 states and 1038 transitions. [2024-11-27 20:08:40,879 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-27 20:08:40,879 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 23.0) internal successors, (115), 5 states have internal predecessors, (115), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 127 [2024-11-27 20:08:40,879 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-27 20:08:40,881 INFO L225 Difference]: With dead ends: 714 [2024-11-27 20:08:40,881 INFO L226 Difference]: Without dead ends: 392 [2024-11-27 20:08:40,882 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-11-27 20:08:40,883 INFO L435 NwaCegarLoop]: 529 mSDtfsCounter, 473 mSDsluCounter, 531 mSDsCounter, 0 mSdLazyCounter, 76 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 473 SdHoareTripleChecker+Valid, 1060 SdHoareTripleChecker+Invalid, 76 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 76 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-27 20:08:40,883 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [473 Valid, 1060 Invalid, 76 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 76 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-27 20:08:40,884 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 392 states. [2024-11-27 20:08:40,896 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 392 to 392. [2024-11-27 20:08:40,897 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 392 states, 387 states have (on average 1.4573643410852712) internal successors, (564), 387 states have internal predecessors, (564), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-27 20:08:40,900 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 392 states to 392 states and 570 transitions. [2024-11-27 20:08:40,900 INFO L78 Accepts]: Start accepts. Automaton has 392 states and 570 transitions. Word has length 127 [2024-11-27 20:08:40,901 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-27 20:08:40,901 INFO L471 AbstractCegarLoop]: Abstraction has 392 states and 570 transitions. [2024-11-27 20:08:40,901 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 23.0) internal successors, (115), 5 states have internal predecessors, (115), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-27 20:08:40,901 INFO L276 IsEmpty]: Start isEmpty. Operand 392 states and 570 transitions. [2024-11-27 20:08:40,903 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 129 [2024-11-27 20:08:40,903 INFO L210 NwaCegarLoop]: Found error trace [2024-11-27 20:08:40,903 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-27 20:08:40,904 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable11 [2024-11-27 20:08:40,904 INFO L396 AbstractCegarLoop]: === Iteration 13 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-27 20:08:40,904 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-27 20:08:40,904 INFO L85 PathProgramCache]: Analyzing trace with hash 425636825, now seen corresponding path program 1 times [2024-11-27 20:08:40,904 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-27 20:08:40,905 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [661937504] [2024-11-27 20:08:40,905 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-27 20:08:40,905 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-27 20:08:41,109 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-27 20:08:41,807 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-27 20:08:41,807 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-27 20:08:41,807 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [661937504] [2024-11-27 20:08:41,808 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [661937504] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-27 20:08:41,808 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-27 20:08:41,808 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-27 20:08:41,808 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2044783252] [2024-11-27 20:08:41,808 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-27 20:08:41,808 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-27 20:08:41,808 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-27 20:08:41,809 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-27 20:08:41,809 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-11-27 20:08:41,809 INFO L87 Difference]: Start difference. First operand 392 states and 570 transitions. Second operand has 5 states, 5 states have (on average 23.2) internal successors, (116), 5 states have internal predecessors, (116), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-27 20:08:42,142 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-27 20:08:42,142 INFO L93 Difference]: Finished difference Result 720 states and 1044 transitions. [2024-11-27 20:08:42,144 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-11-27 20:08:42,144 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 23.2) internal successors, (116), 5 states have internal predecessors, (116), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 128 [2024-11-27 20:08:42,145 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-27 20:08:42,147 INFO L225 Difference]: With dead ends: 720 [2024-11-27 20:08:42,147 INFO L226 Difference]: Without dead ends: 396 [2024-11-27 20:08:42,148 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-11-27 20:08:42,149 INFO L435 NwaCegarLoop]: 560 mSDtfsCounter, 2 mSDsluCounter, 1527 mSDsCounter, 0 mSdLazyCounter, 176 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2 SdHoareTripleChecker+Valid, 2087 SdHoareTripleChecker+Invalid, 176 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 176 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2024-11-27 20:08:42,149 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2 Valid, 2087 Invalid, 176 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 176 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2024-11-27 20:08:42,150 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 396 states. [2024-11-27 20:08:42,164 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 396 to 394. [2024-11-27 20:08:42,166 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 394 states, 389 states have (on average 1.455012853470437) internal successors, (566), 389 states have internal predecessors, (566), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-27 20:08:42,168 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 394 states to 394 states and 572 transitions. [2024-11-27 20:08:42,169 INFO L78 Accepts]: Start accepts. Automaton has 394 states and 572 transitions. Word has length 128 [2024-11-27 20:08:42,170 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-27 20:08:42,170 INFO L471 AbstractCegarLoop]: Abstraction has 394 states and 572 transitions. [2024-11-27 20:08:42,170 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 23.2) internal successors, (116), 5 states have internal predecessors, (116), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-27 20:08:42,170 INFO L276 IsEmpty]: Start isEmpty. Operand 394 states and 572 transitions. [2024-11-27 20:08:42,172 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 130 [2024-11-27 20:08:42,172 INFO L210 NwaCegarLoop]: Found error trace [2024-11-27 20:08:42,173 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-27 20:08:42,173 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable12 [2024-11-27 20:08:42,174 INFO L396 AbstractCegarLoop]: === Iteration 14 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-27 20:08:42,174 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-27 20:08:42,175 INFO L85 PathProgramCache]: Analyzing trace with hash 1268912814, now seen corresponding path program 1 times [2024-11-27 20:08:42,175 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-27 20:08:42,175 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [389367567] [2024-11-27 20:08:42,175 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-27 20:08:42,176 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-27 20:08:42,351 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-27 20:08:42,817 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-27 20:08:42,817 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-27 20:08:42,818 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [389367567] [2024-11-27 20:08:42,818 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [389367567] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-27 20:08:42,818 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-27 20:08:42,818 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-27 20:08:42,818 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [937677803] [2024-11-27 20:08:42,818 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-27 20:08:42,818 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-27 20:08:42,820 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-27 20:08:42,821 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-27 20:08:42,821 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-27 20:08:42,822 INFO L87 Difference]: Start difference. First operand 394 states and 572 transitions. Second operand has 5 states, 5 states have (on average 23.4) internal successors, (117), 5 states have internal predecessors, (117), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-27 20:08:43,030 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-27 20:08:43,031 INFO L93 Difference]: Finished difference Result 718 states and 1040 transitions. [2024-11-27 20:08:43,032 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-27 20:08:43,032 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 23.4) internal successors, (117), 5 states have internal predecessors, (117), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 129 [2024-11-27 20:08:43,033 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-27 20:08:43,035 INFO L225 Difference]: With dead ends: 718 [2024-11-27 20:08:43,035 INFO L226 Difference]: Without dead ends: 394 [2024-11-27 20:08:43,036 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-11-27 20:08:43,036 INFO L435 NwaCegarLoop]: 529 mSDtfsCounter, 468 mSDsluCounter, 538 mSDsCounter, 0 mSdLazyCounter, 74 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 468 SdHoareTripleChecker+Valid, 1067 SdHoareTripleChecker+Invalid, 74 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 74 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-27 20:08:43,037 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [468 Valid, 1067 Invalid, 74 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 74 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-27 20:08:43,038 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 394 states. [2024-11-27 20:08:43,051 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 394 to 394. [2024-11-27 20:08:43,052 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 394 states, 389 states have (on average 1.4524421593830334) internal successors, (565), 389 states have internal predecessors, (565), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-27 20:08:43,055 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 394 states to 394 states and 571 transitions. [2024-11-27 20:08:43,055 INFO L78 Accepts]: Start accepts. Automaton has 394 states and 571 transitions. Word has length 129 [2024-11-27 20:08:43,055 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-27 20:08:43,055 INFO L471 AbstractCegarLoop]: Abstraction has 394 states and 571 transitions. [2024-11-27 20:08:43,055 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 23.4) internal successors, (117), 5 states have internal predecessors, (117), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-27 20:08:43,056 INFO L276 IsEmpty]: Start isEmpty. Operand 394 states and 571 transitions. [2024-11-27 20:08:43,059 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 131 [2024-11-27 20:08:43,059 INFO L210 NwaCegarLoop]: Found error trace [2024-11-27 20:08:43,059 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-27 20:08:43,059 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable13 [2024-11-27 20:08:43,059 INFO L396 AbstractCegarLoop]: === Iteration 15 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-27 20:08:43,060 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-27 20:08:43,060 INFO L85 PathProgramCache]: Analyzing trace with hash 507470039, now seen corresponding path program 1 times [2024-11-27 20:08:43,060 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-27 20:08:43,060 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [411960297] [2024-11-27 20:08:43,060 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-27 20:08:43,060 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-27 20:08:43,247 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-27 20:08:43,679 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-27 20:08:43,679 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-27 20:08:43,680 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [411960297] [2024-11-27 20:08:43,680 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [411960297] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-27 20:08:43,680 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-27 20:08:43,680 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-27 20:08:43,680 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2101708655] [2024-11-27 20:08:43,680 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-27 20:08:43,681 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-27 20:08:43,681 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-27 20:08:43,681 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-27 20:08:43,681 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-27 20:08:43,682 INFO L87 Difference]: Start difference. First operand 394 states and 571 transitions. Second operand has 5 states, 5 states have (on average 23.6) internal successors, (118), 5 states have internal predecessors, (118), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-27 20:08:43,880 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-27 20:08:43,880 INFO L93 Difference]: Finished difference Result 718 states and 1038 transitions. [2024-11-27 20:08:43,881 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-27 20:08:43,881 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 23.6) internal successors, (118), 5 states have internal predecessors, (118), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 130 [2024-11-27 20:08:43,881 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-27 20:08:43,883 INFO L225 Difference]: With dead ends: 718 [2024-11-27 20:08:43,883 INFO L226 Difference]: Without dead ends: 394 [2024-11-27 20:08:43,884 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-11-27 20:08:43,885 INFO L435 NwaCegarLoop]: 529 mSDtfsCounter, 926 mSDsluCounter, 531 mSDsCounter, 0 mSdLazyCounter, 72 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 926 SdHoareTripleChecker+Valid, 1060 SdHoareTripleChecker+Invalid, 72 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 72 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-27 20:08:43,885 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [926 Valid, 1060 Invalid, 72 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 72 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-27 20:08:43,886 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 394 states. [2024-11-27 20:08:43,899 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 394 to 394. [2024-11-27 20:08:43,900 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 394 states, 389 states have (on average 1.4498714652956297) internal successors, (564), 389 states have internal predecessors, (564), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-27 20:08:43,903 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 394 states to 394 states and 570 transitions. [2024-11-27 20:08:43,903 INFO L78 Accepts]: Start accepts. Automaton has 394 states and 570 transitions. Word has length 130 [2024-11-27 20:08:43,904 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-27 20:08:43,904 INFO L471 AbstractCegarLoop]: Abstraction has 394 states and 570 transitions. [2024-11-27 20:08:43,904 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 23.6) internal successors, (118), 5 states have internal predecessors, (118), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-27 20:08:43,904 INFO L276 IsEmpty]: Start isEmpty. Operand 394 states and 570 transitions. [2024-11-27 20:08:43,906 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 132 [2024-11-27 20:08:43,906 INFO L210 NwaCegarLoop]: Found error trace [2024-11-27 20:08:43,906 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-27 20:08:43,906 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable14 [2024-11-27 20:08:43,907 INFO L396 AbstractCegarLoop]: === Iteration 16 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-27 20:08:43,907 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-27 20:08:43,907 INFO L85 PathProgramCache]: Analyzing trace with hash 579372781, now seen corresponding path program 1 times [2024-11-27 20:08:43,907 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-27 20:08:43,907 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2106939509] [2024-11-27 20:08:43,908 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-27 20:08:43,908 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-27 20:08:44,137 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-27 20:08:44,400 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-27 20:08:44,401 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-27 20:08:44,401 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2106939509] [2024-11-27 20:08:44,401 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2106939509] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-27 20:08:44,401 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-27 20:08:44,401 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-27 20:08:44,401 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1115906524] [2024-11-27 20:08:44,402 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-27 20:08:44,402 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-27 20:08:44,402 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-27 20:08:44,403 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-27 20:08:44,403 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-27 20:08:44,404 INFO L87 Difference]: Start difference. First operand 394 states and 570 transitions. Second operand has 4 states, 4 states have (on average 29.75) internal successors, (119), 4 states have internal predecessors, (119), 2 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2024-11-27 20:08:44,513 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-27 20:08:44,513 INFO L93 Difference]: Finished difference Result 718 states and 1036 transitions. [2024-11-27 20:08:44,514 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-27 20:08:44,514 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 29.75) internal successors, (119), 4 states have internal predecessors, (119), 2 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 131 [2024-11-27 20:08:44,514 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-27 20:08:44,516 INFO L225 Difference]: With dead ends: 718 [2024-11-27 20:08:44,517 INFO L226 Difference]: Without dead ends: 394 [2024-11-27 20:08:44,518 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-11-27 20:08:44,521 INFO L435 NwaCegarLoop]: 549 mSDtfsCounter, 512 mSDsluCounter, 551 mSDsCounter, 0 mSdLazyCounter, 30 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 514 SdHoareTripleChecker+Valid, 1100 SdHoareTripleChecker+Invalid, 30 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 30 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-27 20:08:44,521 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [514 Valid, 1100 Invalid, 30 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 30 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-27 20:08:44,522 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 394 states. [2024-11-27 20:08:44,536 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 394 to 394. [2024-11-27 20:08:44,538 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 394 states, 389 states have (on average 1.4473007712082262) internal successors, (563), 389 states have internal predecessors, (563), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-27 20:08:44,540 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 394 states to 394 states and 569 transitions. [2024-11-27 20:08:44,541 INFO L78 Accepts]: Start accepts. Automaton has 394 states and 569 transitions. Word has length 131 [2024-11-27 20:08:44,541 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-27 20:08:44,541 INFO L471 AbstractCegarLoop]: Abstraction has 394 states and 569 transitions. [2024-11-27 20:08:44,541 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 29.75) internal successors, (119), 4 states have internal predecessors, (119), 2 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2024-11-27 20:08:44,542 INFO L276 IsEmpty]: Start isEmpty. Operand 394 states and 569 transitions. [2024-11-27 20:08:44,544 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 133 [2024-11-27 20:08:44,544 INFO L210 NwaCegarLoop]: Found error trace [2024-11-27 20:08:44,544 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-27 20:08:44,544 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable15 [2024-11-27 20:08:44,545 INFO L396 AbstractCegarLoop]: === Iteration 17 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-27 20:08:44,545 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-27 20:08:44,546 INFO L85 PathProgramCache]: Analyzing trace with hash -1064876956, now seen corresponding path program 1 times [2024-11-27 20:08:44,546 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-27 20:08:44,546 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1047441680] [2024-11-27 20:08:44,546 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-27 20:08:44,546 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-27 20:08:44,766 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-27 20:08:45,497 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-27 20:08:45,498 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-27 20:08:45,498 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1047441680] [2024-11-27 20:08:45,498 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1047441680] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-27 20:08:45,498 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-27 20:08:45,498 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2024-11-27 20:08:45,499 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1609116926] [2024-11-27 20:08:45,499 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-27 20:08:45,499 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2024-11-27 20:08:45,499 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-27 20:08:45,500 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-11-27 20:08:45,500 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2024-11-27 20:08:45,501 INFO L87 Difference]: Start difference. First operand 394 states and 569 transitions. Second operand has 7 states, 7 states have (on average 17.142857142857142) internal successors, (120), 7 states have internal predecessors, (120), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-27 20:08:46,079 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-27 20:08:46,079 INFO L93 Difference]: Finished difference Result 786 states and 1132 transitions. [2024-11-27 20:08:46,079 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2024-11-27 20:08:46,080 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 17.142857142857142) internal successors, (120), 7 states have internal predecessors, (120), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 132 [2024-11-27 20:08:46,080 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-27 20:08:46,083 INFO L225 Difference]: With dead ends: 786 [2024-11-27 20:08:46,083 INFO L226 Difference]: Without dead ends: 398 [2024-11-27 20:08:46,084 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=27, Invalid=83, Unknown=0, NotChecked=0, Total=110 [2024-11-27 20:08:46,086 INFO L435 NwaCegarLoop]: 539 mSDtfsCounter, 645 mSDsluCounter, 2018 mSDsCounter, 0 mSdLazyCounter, 256 mSolverCounterSat, 9 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 648 SdHoareTripleChecker+Valid, 2557 SdHoareTripleChecker+Invalid, 265 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 9 IncrementalHoareTripleChecker+Valid, 256 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2024-11-27 20:08:46,086 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [648 Valid, 2557 Invalid, 265 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [9 Valid, 256 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2024-11-27 20:08:46,088 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 398 states. [2024-11-27 20:08:46,109 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 398 to 396. [2024-11-27 20:08:46,110 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 396 states, 391 states have (on average 1.4424552429667519) internal successors, (564), 391 states have internal predecessors, (564), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-27 20:08:46,115 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 396 states to 396 states and 570 transitions. [2024-11-27 20:08:46,116 INFO L78 Accepts]: Start accepts. Automaton has 396 states and 570 transitions. Word has length 132 [2024-11-27 20:08:46,116 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-27 20:08:46,117 INFO L471 AbstractCegarLoop]: Abstraction has 396 states and 570 transitions. [2024-11-27 20:08:46,118 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 17.142857142857142) internal successors, (120), 7 states have internal predecessors, (120), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-27 20:08:46,118 INFO L276 IsEmpty]: Start isEmpty. Operand 396 states and 570 transitions. [2024-11-27 20:08:46,120 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 134 [2024-11-27 20:08:46,120 INFO L210 NwaCegarLoop]: Found error trace [2024-11-27 20:08:46,121 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-27 20:08:46,121 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable16 [2024-11-27 20:08:46,121 INFO L396 AbstractCegarLoop]: === Iteration 18 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-27 20:08:46,122 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-27 20:08:46,122 INFO L85 PathProgramCache]: Analyzing trace with hash 1940307707, now seen corresponding path program 1 times [2024-11-27 20:08:46,122 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-27 20:08:46,122 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [616202600] [2024-11-27 20:08:46,122 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-27 20:08:46,122 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-27 20:08:46,405 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-27 20:08:46,689 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-27 20:08:46,691 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-27 20:08:46,691 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [616202600] [2024-11-27 20:08:46,691 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [616202600] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-27 20:08:46,691 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-27 20:08:46,691 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-27 20:08:46,691 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [425922467] [2024-11-27 20:08:46,691 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-27 20:08:46,692 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-27 20:08:46,692 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-27 20:08:46,693 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-27 20:08:46,694 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-27 20:08:46,694 INFO L87 Difference]: Start difference. First operand 396 states and 570 transitions. Second operand has 4 states, 4 states have (on average 30.25) internal successors, (121), 4 states have internal predecessors, (121), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-27 20:08:46,787 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-27 20:08:46,787 INFO L93 Difference]: Finished difference Result 722 states and 1036 transitions. [2024-11-27 20:08:46,788 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-27 20:08:46,788 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 30.25) internal successors, (121), 4 states have internal predecessors, (121), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 133 [2024-11-27 20:08:46,789 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-27 20:08:46,790 INFO L225 Difference]: With dead ends: 722 [2024-11-27 20:08:46,791 INFO L226 Difference]: Without dead ends: 396 [2024-11-27 20:08:46,792 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-11-27 20:08:46,792 INFO L435 NwaCegarLoop]: 544 mSDtfsCounter, 469 mSDsluCounter, 546 mSDsCounter, 0 mSdLazyCounter, 36 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 469 SdHoareTripleChecker+Valid, 1090 SdHoareTripleChecker+Invalid, 36 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 36 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-27 20:08:46,793 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [469 Valid, 1090 Invalid, 36 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 36 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-27 20:08:46,794 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 396 states. [2024-11-27 20:08:46,807 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 396 to 396. [2024-11-27 20:08:46,808 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 396 states, 391 states have (on average 1.4398976982097187) internal successors, (563), 391 states have internal predecessors, (563), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-27 20:08:46,810 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 396 states to 396 states and 569 transitions. [2024-11-27 20:08:46,811 INFO L78 Accepts]: Start accepts. Automaton has 396 states and 569 transitions. Word has length 133 [2024-11-27 20:08:46,811 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-27 20:08:46,811 INFO L471 AbstractCegarLoop]: Abstraction has 396 states and 569 transitions. [2024-11-27 20:08:46,812 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 30.25) internal successors, (121), 4 states have internal predecessors, (121), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-27 20:08:46,812 INFO L276 IsEmpty]: Start isEmpty. Operand 396 states and 569 transitions. [2024-11-27 20:08:46,813 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 135 [2024-11-27 20:08:46,813 INFO L210 NwaCegarLoop]: Found error trace [2024-11-27 20:08:46,814 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-27 20:08:46,814 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable17 [2024-11-27 20:08:46,814 INFO L396 AbstractCegarLoop]: === Iteration 19 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-27 20:08:46,815 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-27 20:08:46,815 INFO L85 PathProgramCache]: Analyzing trace with hash 2020339687, now seen corresponding path program 1 times [2024-11-27 20:08:46,816 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-27 20:08:46,816 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [27826029] [2024-11-27 20:08:46,816 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-27 20:08:46,816 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-27 20:08:47,043 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-27 20:08:47,860 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-27 20:08:47,861 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-27 20:08:47,861 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [27826029] [2024-11-27 20:08:47,861 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [27826029] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-27 20:08:47,861 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-27 20:08:47,861 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-27 20:08:47,861 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [216514887] [2024-11-27 20:08:47,861 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-27 20:08:47,862 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-27 20:08:47,862 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-27 20:08:47,863 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-27 20:08:47,863 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-11-27 20:08:47,863 INFO L87 Difference]: Start difference. First operand 396 states and 569 transitions. Second operand has 5 states, 5 states have (on average 24.4) internal successors, (122), 5 states have internal predecessors, (122), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-27 20:08:47,938 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-27 20:08:47,939 INFO L93 Difference]: Finished difference Result 767 states and 1089 transitions. [2024-11-27 20:08:47,939 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-11-27 20:08:47,940 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 24.4) internal successors, (122), 5 states have internal predecessors, (122), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 134 [2024-11-27 20:08:47,940 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-27 20:08:47,942 INFO L225 Difference]: With dead ends: 767 [2024-11-27 20:08:47,942 INFO L226 Difference]: Without dead ends: 441 [2024-11-27 20:08:47,943 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-11-27 20:08:47,943 INFO L435 NwaCegarLoop]: 555 mSDtfsCounter, 17 mSDsluCounter, 1656 mSDsCounter, 0 mSdLazyCounter, 32 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 17 SdHoareTripleChecker+Valid, 2211 SdHoareTripleChecker+Invalid, 32 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 32 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-27 20:08:47,944 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [17 Valid, 2211 Invalid, 32 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 32 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-27 20:08:47,945 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 441 states. [2024-11-27 20:08:47,958 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 441 to 439. [2024-11-27 20:08:47,959 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 439 states, 434 states have (on average 1.4147465437788018) internal successors, (614), 434 states have internal predecessors, (614), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-27 20:08:47,962 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 439 states to 439 states and 620 transitions. [2024-11-27 20:08:47,962 INFO L78 Accepts]: Start accepts. Automaton has 439 states and 620 transitions. Word has length 134 [2024-11-27 20:08:47,962 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-27 20:08:47,963 INFO L471 AbstractCegarLoop]: Abstraction has 439 states and 620 transitions. [2024-11-27 20:08:47,963 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 24.4) internal successors, (122), 5 states have internal predecessors, (122), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-27 20:08:47,963 INFO L276 IsEmpty]: Start isEmpty. Operand 439 states and 620 transitions. [2024-11-27 20:08:47,965 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 136 [2024-11-27 20:08:47,965 INFO L210 NwaCegarLoop]: Found error trace [2024-11-27 20:08:47,965 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-27 20:08:47,965 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable18 [2024-11-27 20:08:47,965 INFO L396 AbstractCegarLoop]: === Iteration 20 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-27 20:08:47,966 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-27 20:08:47,966 INFO L85 PathProgramCache]: Analyzing trace with hash -885091725, now seen corresponding path program 1 times [2024-11-27 20:08:47,966 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-27 20:08:47,966 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [30876544] [2024-11-27 20:08:47,966 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-27 20:08:47,967 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-27 20:08:48,138 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-27 20:08:48,932 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-27 20:08:48,932 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-27 20:08:48,932 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [30876544] [2024-11-27 20:08:48,932 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [30876544] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-27 20:08:48,932 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-27 20:08:48,932 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-11-27 20:08:48,933 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2080184806] [2024-11-27 20:08:48,933 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-27 20:08:48,933 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-11-27 20:08:48,933 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-27 20:08:48,934 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-11-27 20:08:48,934 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2024-11-27 20:08:48,934 INFO L87 Difference]: Start difference. First operand 439 states and 620 transitions. Second operand has 6 states, 6 states have (on average 20.5) internal successors, (123), 6 states have internal predecessors, (123), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-27 20:08:49,129 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-27 20:08:49,129 INFO L93 Difference]: Finished difference Result 974 states and 1355 transitions. [2024-11-27 20:08:49,130 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-27 20:08:49,130 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 20.5) internal successors, (123), 6 states have internal predecessors, (123), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 135 [2024-11-27 20:08:49,130 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-27 20:08:49,133 INFO L225 Difference]: With dead ends: 974 [2024-11-27 20:08:49,133 INFO L226 Difference]: Without dead ends: 605 [2024-11-27 20:08:49,134 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=23, Invalid=49, Unknown=0, NotChecked=0, Total=72 [2024-11-27 20:08:49,135 INFO L435 NwaCegarLoop]: 549 mSDtfsCounter, 849 mSDsluCounter, 1641 mSDsCounter, 0 mSdLazyCounter, 60 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 852 SdHoareTripleChecker+Valid, 2190 SdHoareTripleChecker+Invalid, 63 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 60 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-27 20:08:49,135 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [852 Valid, 2190 Invalid, 63 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 60 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-27 20:08:49,137 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 605 states. [2024-11-27 20:08:49,160 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 605 to 605. [2024-11-27 20:08:49,162 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 605 states, 597 states have (on average 1.3835845896147403) internal successors, (826), 597 states have internal predecessors, (826), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-11-27 20:08:49,166 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 605 states to 605 states and 838 transitions. [2024-11-27 20:08:49,166 INFO L78 Accepts]: Start accepts. Automaton has 605 states and 838 transitions. Word has length 135 [2024-11-27 20:08:49,167 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-27 20:08:49,167 INFO L471 AbstractCegarLoop]: Abstraction has 605 states and 838 transitions. [2024-11-27 20:08:49,167 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 20.5) internal successors, (123), 6 states have internal predecessors, (123), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-27 20:08:49,168 INFO L276 IsEmpty]: Start isEmpty. Operand 605 states and 838 transitions. [2024-11-27 20:08:49,173 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 325 [2024-11-27 20:08:49,174 INFO L210 NwaCegarLoop]: Found error trace [2024-11-27 20:08:49,174 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-27 20:08:49,174 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable19 [2024-11-27 20:08:49,174 INFO L396 AbstractCegarLoop]: === Iteration 21 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-27 20:08:49,175 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-27 20:08:49,175 INFO L85 PathProgramCache]: Analyzing trace with hash 1773776762, now seen corresponding path program 1 times [2024-11-27 20:08:49,175 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-27 20:08:49,176 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [259321116] [2024-11-27 20:08:49,176 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-27 20:08:49,176 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-27 20:08:49,528 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-27 20:08:50,278 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 84 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-27 20:08:50,278 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-27 20:08:50,278 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [259321116] [2024-11-27 20:08:50,278 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [259321116] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-27 20:08:50,278 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-27 20:08:50,279 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-27 20:08:50,279 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1058584552] [2024-11-27 20:08:50,279 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-27 20:08:50,280 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-27 20:08:50,280 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-27 20:08:50,281 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-27 20:08:50,282 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-27 20:08:50,283 INFO L87 Difference]: Start difference. First operand 605 states and 838 transitions. Second operand has 5 states, 5 states have (on average 59.4) internal successors, (297), 5 states have internal predecessors, (297), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-27 20:08:50,453 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-27 20:08:50,453 INFO L93 Difference]: Finished difference Result 974 states and 1354 transitions. [2024-11-27 20:08:50,454 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-27 20:08:50,454 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 59.4) internal successors, (297), 5 states have internal predecessors, (297), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 324 [2024-11-27 20:08:50,455 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-27 20:08:50,457 INFO L225 Difference]: With dead ends: 974 [2024-11-27 20:08:50,457 INFO L226 Difference]: Without dead ends: 605 [2024-11-27 20:08:50,458 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-11-27 20:08:50,459 INFO L435 NwaCegarLoop]: 526 mSDtfsCounter, 512 mSDsluCounter, 535 mSDsCounter, 0 mSdLazyCounter, 70 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 515 SdHoareTripleChecker+Valid, 1061 SdHoareTripleChecker+Invalid, 71 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 70 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-27 20:08:50,460 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [515 Valid, 1061 Invalid, 71 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 70 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-27 20:08:50,461 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 605 states. [2024-11-27 20:08:50,484 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 605 to 605. [2024-11-27 20:08:50,486 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 605 states, 597 states have (on average 1.3819095477386936) internal successors, (825), 597 states have internal predecessors, (825), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-11-27 20:08:50,490 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 605 states to 605 states and 837 transitions. [2024-11-27 20:08:50,491 INFO L78 Accepts]: Start accepts. Automaton has 605 states and 837 transitions. Word has length 324 [2024-11-27 20:08:50,491 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-27 20:08:50,492 INFO L471 AbstractCegarLoop]: Abstraction has 605 states and 837 transitions. [2024-11-27 20:08:50,492 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 59.4) internal successors, (297), 5 states have internal predecessors, (297), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-27 20:08:50,492 INFO L276 IsEmpty]: Start isEmpty. Operand 605 states and 837 transitions. [2024-11-27 20:08:50,499 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 326 [2024-11-27 20:08:50,499 INFO L210 NwaCegarLoop]: Found error trace [2024-11-27 20:08:50,500 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-27 20:08:50,500 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable20 [2024-11-27 20:08:50,500 INFO L396 AbstractCegarLoop]: === Iteration 22 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-27 20:08:50,501 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-27 20:08:50,501 INFO L85 PathProgramCache]: Analyzing trace with hash -430837626, now seen corresponding path program 1 times [2024-11-27 20:08:50,501 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-27 20:08:50,501 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1087366723] [2024-11-27 20:08:50,501 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-27 20:08:50,502 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-27 20:08:50,822 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-27 20:08:51,534 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 84 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-27 20:08:51,534 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-27 20:08:51,534 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1087366723] [2024-11-27 20:08:51,534 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1087366723] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-27 20:08:51,535 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-27 20:08:51,535 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-27 20:08:51,535 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1796084396] [2024-11-27 20:08:51,535 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-27 20:08:51,536 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-27 20:08:51,536 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-27 20:08:51,537 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-27 20:08:51,537 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-27 20:08:51,538 INFO L87 Difference]: Start difference. First operand 605 states and 837 transitions. Second operand has 5 states, 5 states have (on average 59.6) internal successors, (298), 5 states have internal predecessors, (298), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-27 20:08:51,712 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-27 20:08:51,714 INFO L93 Difference]: Finished difference Result 974 states and 1352 transitions. [2024-11-27 20:08:51,715 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-27 20:08:51,716 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 59.6) internal successors, (298), 5 states have internal predecessors, (298), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 325 [2024-11-27 20:08:51,717 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-27 20:08:51,720 INFO L225 Difference]: With dead ends: 974 [2024-11-27 20:08:51,721 INFO L226 Difference]: Without dead ends: 605 [2024-11-27 20:08:51,722 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-11-27 20:08:51,726 INFO L435 NwaCegarLoop]: 526 mSDtfsCounter, 504 mSDsluCounter, 535 mSDsCounter, 0 mSdLazyCounter, 68 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 507 SdHoareTripleChecker+Valid, 1061 SdHoareTripleChecker+Invalid, 69 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 68 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-27 20:08:51,728 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [507 Valid, 1061 Invalid, 69 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 68 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-27 20:08:51,730 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 605 states. [2024-11-27 20:08:51,760 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 605 to 605. [2024-11-27 20:08:51,762 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 605 states, 597 states have (on average 1.3802345058626466) internal successors, (824), 597 states have internal predecessors, (824), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-11-27 20:08:51,766 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 605 states to 605 states and 836 transitions. [2024-11-27 20:08:51,766 INFO L78 Accepts]: Start accepts. Automaton has 605 states and 836 transitions. Word has length 325 [2024-11-27 20:08:51,767 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-27 20:08:51,767 INFO L471 AbstractCegarLoop]: Abstraction has 605 states and 836 transitions. [2024-11-27 20:08:51,767 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 59.6) internal successors, (298), 5 states have internal predecessors, (298), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-27 20:08:51,768 INFO L276 IsEmpty]: Start isEmpty. Operand 605 states and 836 transitions. [2024-11-27 20:08:51,776 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 327 [2024-11-27 20:08:51,776 INFO L210 NwaCegarLoop]: Found error trace [2024-11-27 20:08:51,778 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-27 20:08:51,779 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable21 [2024-11-27 20:08:51,779 INFO L396 AbstractCegarLoop]: === Iteration 23 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-27 20:08:51,780 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-27 20:08:51,780 INFO L85 PathProgramCache]: Analyzing trace with hash 64689519, now seen corresponding path program 1 times [2024-11-27 20:08:51,780 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-27 20:08:51,781 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [944690213] [2024-11-27 20:08:51,781 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-27 20:08:51,781 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-27 20:08:52,256 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-27 20:08:52,952 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 84 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-27 20:08:52,952 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-27 20:08:52,953 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [944690213] [2024-11-27 20:08:52,953 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [944690213] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-27 20:08:52,953 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-27 20:08:52,953 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-27 20:08:52,953 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [676333199] [2024-11-27 20:08:52,953 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-27 20:08:52,953 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-27 20:08:52,954 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-27 20:08:52,954 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-27 20:08:52,956 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-27 20:08:52,956 INFO L87 Difference]: Start difference. First operand 605 states and 836 transitions. Second operand has 5 states, 5 states have (on average 59.8) internal successors, (299), 5 states have internal predecessors, (299), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-27 20:08:53,119 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-27 20:08:53,119 INFO L93 Difference]: Finished difference Result 974 states and 1350 transitions. [2024-11-27 20:08:53,120 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-27 20:08:53,120 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 59.8) internal successors, (299), 5 states have internal predecessors, (299), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 326 [2024-11-27 20:08:53,121 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-27 20:08:53,123 INFO L225 Difference]: With dead ends: 974 [2024-11-27 20:08:53,124 INFO L226 Difference]: Without dead ends: 605 [2024-11-27 20:08:53,124 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-11-27 20:08:53,125 INFO L435 NwaCegarLoop]: 526 mSDtfsCounter, 900 mSDsluCounter, 528 mSDsCounter, 0 mSdLazyCounter, 66 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 903 SdHoareTripleChecker+Valid, 1054 SdHoareTripleChecker+Invalid, 67 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 66 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-27 20:08:53,125 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [903 Valid, 1054 Invalid, 67 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 66 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-27 20:08:53,128 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 605 states. [2024-11-27 20:08:53,152 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 605 to 605. [2024-11-27 20:08:53,153 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 605 states, 597 states have (on average 1.3785594639865997) internal successors, (823), 597 states have internal predecessors, (823), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-11-27 20:08:53,158 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 605 states to 605 states and 835 transitions. [2024-11-27 20:08:53,158 INFO L78 Accepts]: Start accepts. Automaton has 605 states and 835 transitions. Word has length 326 [2024-11-27 20:08:53,159 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-27 20:08:53,159 INFO L471 AbstractCegarLoop]: Abstraction has 605 states and 835 transitions. [2024-11-27 20:08:53,160 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 59.8) internal successors, (299), 5 states have internal predecessors, (299), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-27 20:08:53,160 INFO L276 IsEmpty]: Start isEmpty. Operand 605 states and 835 transitions. [2024-11-27 20:08:53,166 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 328 [2024-11-27 20:08:53,166 INFO L210 NwaCegarLoop]: Found error trace [2024-11-27 20:08:53,166 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-27 20:08:53,167 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable22 [2024-11-27 20:08:53,167 INFO L396 AbstractCegarLoop]: === Iteration 24 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-27 20:08:53,167 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-27 20:08:53,168 INFO L85 PathProgramCache]: Analyzing trace with hash -1440379429, now seen corresponding path program 1 times [2024-11-27 20:08:53,168 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-27 20:08:53,168 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1094734954] [2024-11-27 20:08:53,168 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-27 20:08:53,168 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-27 20:08:53,482 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-27 20:08:54,147 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 84 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-27 20:08:54,148 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-27 20:08:54,148 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1094734954] [2024-11-27 20:08:54,148 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1094734954] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-27 20:08:54,148 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-27 20:08:54,148 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-27 20:08:54,148 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1523731792] [2024-11-27 20:08:54,148 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-27 20:08:54,149 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-27 20:08:54,149 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-27 20:08:54,150 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-27 20:08:54,151 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-27 20:08:54,151 INFO L87 Difference]: Start difference. First operand 605 states and 835 transitions. Second operand has 5 states, 5 states have (on average 60.0) internal successors, (300), 5 states have internal predecessors, (300), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-27 20:08:54,320 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-27 20:08:54,321 INFO L93 Difference]: Finished difference Result 974 states and 1348 transitions. [2024-11-27 20:08:54,321 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-27 20:08:54,321 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 60.0) internal successors, (300), 5 states have internal predecessors, (300), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 327 [2024-11-27 20:08:54,322 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-27 20:08:54,325 INFO L225 Difference]: With dead ends: 974 [2024-11-27 20:08:54,325 INFO L226 Difference]: Without dead ends: 605 [2024-11-27 20:08:54,326 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-11-27 20:08:54,327 INFO L435 NwaCegarLoop]: 526 mSDtfsCounter, 884 mSDsluCounter, 528 mSDsCounter, 0 mSdLazyCounter, 64 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 887 SdHoareTripleChecker+Valid, 1054 SdHoareTripleChecker+Invalid, 65 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 64 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-27 20:08:54,328 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [887 Valid, 1054 Invalid, 65 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 64 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-27 20:08:54,329 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 605 states. [2024-11-27 20:08:54,353 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 605 to 605. [2024-11-27 20:08:54,354 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 605 states, 597 states have (on average 1.3768844221105527) internal successors, (822), 597 states have internal predecessors, (822), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-11-27 20:08:54,358 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 605 states to 605 states and 834 transitions. [2024-11-27 20:08:54,358 INFO L78 Accepts]: Start accepts. Automaton has 605 states and 834 transitions. Word has length 327 [2024-11-27 20:08:54,359 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-27 20:08:54,360 INFO L471 AbstractCegarLoop]: Abstraction has 605 states and 834 transitions. [2024-11-27 20:08:54,360 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 60.0) internal successors, (300), 5 states have internal predecessors, (300), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-27 20:08:54,360 INFO L276 IsEmpty]: Start isEmpty. Operand 605 states and 834 transitions. [2024-11-27 20:08:54,366 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 329 [2024-11-27 20:08:54,366 INFO L210 NwaCegarLoop]: Found error trace [2024-11-27 20:08:54,367 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-27 20:08:54,367 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable23 [2024-11-27 20:08:54,367 INFO L396 AbstractCegarLoop]: === Iteration 25 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-27 20:08:54,367 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-27 20:08:54,368 INFO L85 PathProgramCache]: Analyzing trace with hash -833179932, now seen corresponding path program 1 times [2024-11-27 20:08:54,368 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-27 20:08:54,368 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [913588788] [2024-11-27 20:08:54,368 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-27 20:08:54,368 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-27 20:08:54,698 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-27 20:08:55,476 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 84 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-27 20:08:55,476 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-27 20:08:55,476 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [913588788] [2024-11-27 20:08:55,477 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [913588788] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-27 20:08:55,477 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-27 20:08:55,477 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-27 20:08:55,477 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [665535202] [2024-11-27 20:08:55,477 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-27 20:08:55,478 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-27 20:08:55,478 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-27 20:08:55,479 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-27 20:08:55,479 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-27 20:08:55,479 INFO L87 Difference]: Start difference. First operand 605 states and 834 transitions. Second operand has 5 states, 5 states have (on average 60.2) internal successors, (301), 5 states have internal predecessors, (301), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-27 20:08:55,592 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-27 20:08:55,593 INFO L93 Difference]: Finished difference Result 974 states and 1346 transitions. [2024-11-27 20:08:55,593 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-27 20:08:55,594 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 60.2) internal successors, (301), 5 states have internal predecessors, (301), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 328 [2024-11-27 20:08:55,594 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-27 20:08:55,597 INFO L225 Difference]: With dead ends: 974 [2024-11-27 20:08:55,597 INFO L226 Difference]: Without dead ends: 605 [2024-11-27 20:08:55,598 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-11-27 20:08:55,599 INFO L435 NwaCegarLoop]: 540 mSDtfsCounter, 473 mSDsluCounter, 549 mSDsCounter, 0 mSdLazyCounter, 34 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 476 SdHoareTripleChecker+Valid, 1089 SdHoareTripleChecker+Invalid, 35 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 34 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-27 20:08:55,599 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [476 Valid, 1089 Invalid, 35 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 34 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-27 20:08:55,601 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 605 states. [2024-11-27 20:08:55,622 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 605 to 605. [2024-11-27 20:08:55,624 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 605 states, 597 states have (on average 1.3752093802345058) internal successors, (821), 597 states have internal predecessors, (821), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-11-27 20:08:55,628 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 605 states to 605 states and 833 transitions. [2024-11-27 20:08:55,628 INFO L78 Accepts]: Start accepts. Automaton has 605 states and 833 transitions. Word has length 328 [2024-11-27 20:08:55,629 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-27 20:08:55,629 INFO L471 AbstractCegarLoop]: Abstraction has 605 states and 833 transitions. [2024-11-27 20:08:55,630 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 60.2) internal successors, (301), 5 states have internal predecessors, (301), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-27 20:08:55,630 INFO L276 IsEmpty]: Start isEmpty. Operand 605 states and 833 transitions. [2024-11-27 20:08:55,636 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 330 [2024-11-27 20:08:55,636 INFO L210 NwaCegarLoop]: Found error trace [2024-11-27 20:08:55,636 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-27 20:08:55,636 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable24 [2024-11-27 20:08:55,637 INFO L396 AbstractCegarLoop]: === Iteration 26 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-27 20:08:55,637 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-27 20:08:55,637 INFO L85 PathProgramCache]: Analyzing trace with hash 16225968, now seen corresponding path program 1 times [2024-11-27 20:08:55,638 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-27 20:08:55,638 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1180424849] [2024-11-27 20:08:55,638 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-27 20:08:55,638 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-27 20:08:55,967 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-27 20:08:56,727 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 84 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-27 20:08:56,727 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-27 20:08:56,727 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1180424849] [2024-11-27 20:08:56,727 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1180424849] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-27 20:08:56,728 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-27 20:08:56,728 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-27 20:08:56,728 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1256497961] [2024-11-27 20:08:56,728 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-27 20:08:56,729 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-27 20:08:56,729 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-27 20:08:56,730 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-27 20:08:56,730 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-27 20:08:56,731 INFO L87 Difference]: Start difference. First operand 605 states and 833 transitions. Second operand has 5 states, 5 states have (on average 60.4) internal successors, (302), 5 states have internal predecessors, (302), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-27 20:08:56,842 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-27 20:08:56,843 INFO L93 Difference]: Finished difference Result 974 states and 1344 transitions. [2024-11-27 20:08:56,843 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-27 20:08:56,844 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 60.4) internal successors, (302), 5 states have internal predecessors, (302), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 329 [2024-11-27 20:08:56,844 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-27 20:08:56,847 INFO L225 Difference]: With dead ends: 974 [2024-11-27 20:08:56,847 INFO L226 Difference]: Without dead ends: 605 [2024-11-27 20:08:56,848 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-11-27 20:08:56,849 INFO L435 NwaCegarLoop]: 540 mSDtfsCounter, 465 mSDsluCounter, 549 mSDsCounter, 0 mSdLazyCounter, 32 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 468 SdHoareTripleChecker+Valid, 1089 SdHoareTripleChecker+Invalid, 33 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 32 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-27 20:08:56,849 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [468 Valid, 1089 Invalid, 33 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 32 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-27 20:08:56,851 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 605 states. [2024-11-27 20:08:56,873 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 605 to 605. [2024-11-27 20:08:56,875 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 605 states, 597 states have (on average 1.373534338358459) internal successors, (820), 597 states have internal predecessors, (820), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-11-27 20:08:56,878 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 605 states to 605 states and 832 transitions. [2024-11-27 20:08:56,878 INFO L78 Accepts]: Start accepts. Automaton has 605 states and 832 transitions. Word has length 329 [2024-11-27 20:08:56,879 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-27 20:08:56,879 INFO L471 AbstractCegarLoop]: Abstraction has 605 states and 832 transitions. [2024-11-27 20:08:56,879 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 60.4) internal successors, (302), 5 states have internal predecessors, (302), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-27 20:08:56,880 INFO L276 IsEmpty]: Start isEmpty. Operand 605 states and 832 transitions. [2024-11-27 20:08:56,885 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 331 [2024-11-27 20:08:56,886 INFO L210 NwaCegarLoop]: Found error trace [2024-11-27 20:08:56,886 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-27 20:08:56,886 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable25 [2024-11-27 20:08:56,887 INFO L396 AbstractCegarLoop]: === Iteration 27 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-27 20:08:56,887 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-27 20:08:56,887 INFO L85 PathProgramCache]: Analyzing trace with hash 1724038105, now seen corresponding path program 1 times [2024-11-27 20:08:56,887 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-27 20:08:56,888 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [267953688] [2024-11-27 20:08:56,888 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-27 20:08:56,888 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-27 20:08:57,217 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-27 20:08:57,914 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 84 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-27 20:08:57,915 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-27 20:08:57,915 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [267953688] [2024-11-27 20:08:57,915 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [267953688] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-27 20:08:57,915 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-27 20:08:57,915 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-27 20:08:57,916 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1523798416] [2024-11-27 20:08:57,916 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-27 20:08:57,917 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-27 20:08:57,917 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-27 20:08:57,918 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-27 20:08:57,918 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-27 20:08:57,918 INFO L87 Difference]: Start difference. First operand 605 states and 832 transitions. Second operand has 5 states, 5 states have (on average 60.6) internal successors, (303), 5 states have internal predecessors, (303), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-27 20:08:58,447 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-27 20:08:58,448 INFO L93 Difference]: Finished difference Result 974 states and 1342 transitions. [2024-11-27 20:08:58,448 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-27 20:08:58,448 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 60.6) internal successors, (303), 5 states have internal predecessors, (303), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 330 [2024-11-27 20:08:58,449 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-27 20:08:58,451 INFO L225 Difference]: With dead ends: 974 [2024-11-27 20:08:58,452 INFO L226 Difference]: Without dead ends: 605 [2024-11-27 20:08:58,453 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-11-27 20:08:58,453 INFO L435 NwaCegarLoop]: 398 mSDtfsCounter, 785 mSDsluCounter, 400 mSDsCounter, 0 mSdLazyCounter, 314 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 785 SdHoareTripleChecker+Valid, 798 SdHoareTripleChecker+Invalid, 315 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 314 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2024-11-27 20:08:58,454 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [785 Valid, 798 Invalid, 315 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 314 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2024-11-27 20:08:58,455 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 605 states. [2024-11-27 20:08:58,479 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 605 to 605. [2024-11-27 20:08:58,480 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 605 states, 597 states have (on average 1.3718592964824121) internal successors, (819), 597 states have internal predecessors, (819), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-11-27 20:08:58,483 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 605 states to 605 states and 831 transitions. [2024-11-27 20:08:58,483 INFO L78 Accepts]: Start accepts. Automaton has 605 states and 831 transitions. Word has length 330 [2024-11-27 20:08:58,484 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-27 20:08:58,484 INFO L471 AbstractCegarLoop]: Abstraction has 605 states and 831 transitions. [2024-11-27 20:08:58,484 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 60.6) internal successors, (303), 5 states have internal predecessors, (303), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-27 20:08:58,484 INFO L276 IsEmpty]: Start isEmpty. Operand 605 states and 831 transitions. [2024-11-27 20:08:58,490 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 332 [2024-11-27 20:08:58,490 INFO L210 NwaCegarLoop]: Found error trace [2024-11-27 20:08:58,491 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-27 20:08:58,491 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable26 [2024-11-27 20:08:58,491 INFO L396 AbstractCegarLoop]: === Iteration 28 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-27 20:08:58,492 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-27 20:08:58,492 INFO L85 PathProgramCache]: Analyzing trace with hash 1585990405, now seen corresponding path program 1 times [2024-11-27 20:08:58,492 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-27 20:08:58,492 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [414594033] [2024-11-27 20:08:58,493 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-27 20:08:58,493 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-27 20:08:59,627 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-27 20:09:00,687 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 84 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-27 20:09:00,687 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-27 20:09:00,687 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [414594033] [2024-11-27 20:09:00,688 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [414594033] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-27 20:09:00,688 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-27 20:09:00,688 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-27 20:09:00,688 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [313795358] [2024-11-27 20:09:00,688 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-27 20:09:00,689 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-27 20:09:00,689 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-27 20:09:00,690 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-27 20:09:00,691 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-27 20:09:00,691 INFO L87 Difference]: Start difference. First operand 605 states and 831 transitions. Second operand has 4 states, 4 states have (on average 76.0) internal successors, (304), 4 states have internal predecessors, (304), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-27 20:09:00,788 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-27 20:09:00,788 INFO L93 Difference]: Finished difference Result 974 states and 1340 transitions. [2024-11-27 20:09:00,789 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-27 20:09:00,789 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 76.0) internal successors, (304), 4 states have internal predecessors, (304), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 331 [2024-11-27 20:09:00,790 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-27 20:09:00,793 INFO L225 Difference]: With dead ends: 974 [2024-11-27 20:09:00,793 INFO L226 Difference]: Without dead ends: 605 [2024-11-27 20:09:00,794 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-11-27 20:09:00,795 INFO L435 NwaCegarLoop]: 539 mSDtfsCounter, 379 mSDsluCounter, 541 mSDsCounter, 0 mSdLazyCounter, 30 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 379 SdHoareTripleChecker+Valid, 1080 SdHoareTripleChecker+Invalid, 30 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 30 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-27 20:09:00,796 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [379 Valid, 1080 Invalid, 30 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 30 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-27 20:09:00,800 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 605 states. [2024-11-27 20:09:00,822 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 605 to 605. [2024-11-27 20:09:00,823 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 605 states, 597 states have (on average 1.3701842546063652) internal successors, (818), 597 states have internal predecessors, (818), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-11-27 20:09:00,827 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 605 states to 605 states and 830 transitions. [2024-11-27 20:09:00,828 INFO L78 Accepts]: Start accepts. Automaton has 605 states and 830 transitions. Word has length 331 [2024-11-27 20:09:00,829 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-27 20:09:00,829 INFO L471 AbstractCegarLoop]: Abstraction has 605 states and 830 transitions. [2024-11-27 20:09:00,829 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 76.0) internal successors, (304), 4 states have internal predecessors, (304), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-27 20:09:00,829 INFO L276 IsEmpty]: Start isEmpty. Operand 605 states and 830 transitions. [2024-11-27 20:09:00,835 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 333 [2024-11-27 20:09:00,835 INFO L210 NwaCegarLoop]: Found error trace [2024-11-27 20:09:00,836 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-27 20:09:00,836 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable27 [2024-11-27 20:09:00,836 INFO L396 AbstractCegarLoop]: === Iteration 29 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-27 20:09:00,837 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-27 20:09:00,837 INFO L85 PathProgramCache]: Analyzing trace with hash 1718975755, now seen corresponding path program 1 times [2024-11-27 20:09:00,837 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-27 20:09:00,837 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [52911254] [2024-11-27 20:09:00,838 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-27 20:09:00,838 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-27 20:09:01,738 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-27 20:09:02,571 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 84 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-27 20:09:02,571 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-27 20:09:02,571 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [52911254] [2024-11-27 20:09:02,572 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [52911254] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-27 20:09:02,572 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-27 20:09:02,572 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-27 20:09:02,572 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [428550720] [2024-11-27 20:09:02,572 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-27 20:09:02,573 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-27 20:09:02,573 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-27 20:09:02,574 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-27 20:09:02,575 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-27 20:09:02,575 INFO L87 Difference]: Start difference. First operand 605 states and 830 transitions. Second operand has 5 states, 5 states have (on average 61.0) internal successors, (305), 5 states have internal predecessors, (305), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-27 20:09:02,753 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-27 20:09:02,753 INFO L93 Difference]: Finished difference Result 974 states and 1338 transitions. [2024-11-27 20:09:02,754 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-27 20:09:02,758 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 61.0) internal successors, (305), 5 states have internal predecessors, (305), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 332 [2024-11-27 20:09:02,759 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-27 20:09:02,762 INFO L225 Difference]: With dead ends: 974 [2024-11-27 20:09:02,762 INFO L226 Difference]: Without dead ends: 605 [2024-11-27 20:09:02,763 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-11-27 20:09:02,763 INFO L435 NwaCegarLoop]: 522 mSDtfsCounter, 857 mSDsluCounter, 524 mSDsCounter, 0 mSdLazyCounter, 62 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 857 SdHoareTripleChecker+Valid, 1046 SdHoareTripleChecker+Invalid, 62 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 62 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-27 20:09:02,764 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [857 Valid, 1046 Invalid, 62 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 62 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-27 20:09:02,765 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 605 states. [2024-11-27 20:09:02,786 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 605 to 605. [2024-11-27 20:09:02,787 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 605 states, 597 states have (on average 1.3685092127303182) internal successors, (817), 597 states have internal predecessors, (817), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-11-27 20:09:02,790 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 605 states to 605 states and 829 transitions. [2024-11-27 20:09:02,791 INFO L78 Accepts]: Start accepts. Automaton has 605 states and 829 transitions. Word has length 332 [2024-11-27 20:09:02,791 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-27 20:09:02,791 INFO L471 AbstractCegarLoop]: Abstraction has 605 states and 829 transitions. [2024-11-27 20:09:02,792 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 61.0) internal successors, (305), 5 states have internal predecessors, (305), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-27 20:09:02,792 INFO L276 IsEmpty]: Start isEmpty. Operand 605 states and 829 transitions. [2024-11-27 20:09:02,798 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 334 [2024-11-27 20:09:02,799 INFO L210 NwaCegarLoop]: Found error trace [2024-11-27 20:09:02,799 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-27 20:09:02,799 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable28 [2024-11-27 20:09:02,799 INFO L396 AbstractCegarLoop]: === Iteration 30 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-27 20:09:02,800 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-27 20:09:02,800 INFO L85 PathProgramCache]: Analyzing trace with hash 1913081349, now seen corresponding path program 1 times [2024-11-27 20:09:02,800 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-27 20:09:02,800 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1868827130] [2024-11-27 20:09:02,801 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-27 20:09:02,801 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-27 20:09:03,636 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-27 20:09:04,458 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 84 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-27 20:09:04,458 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-27 20:09:04,458 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1868827130] [2024-11-27 20:09:04,458 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1868827130] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-27 20:09:04,458 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-27 20:09:04,459 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-27 20:09:04,459 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [404272277] [2024-11-27 20:09:04,459 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-27 20:09:04,460 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-27 20:09:04,460 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-27 20:09:04,461 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-27 20:09:04,461 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-27 20:09:04,461 INFO L87 Difference]: Start difference. First operand 605 states and 829 transitions. Second operand has 5 states, 5 states have (on average 61.2) internal successors, (306), 5 states have internal predecessors, (306), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-27 20:09:04,637 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-27 20:09:04,638 INFO L93 Difference]: Finished difference Result 974 states and 1336 transitions. [2024-11-27 20:09:04,638 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-27 20:09:04,639 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 61.2) internal successors, (306), 5 states have internal predecessors, (306), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 333 [2024-11-27 20:09:04,639 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-27 20:09:04,642 INFO L225 Difference]: With dead ends: 974 [2024-11-27 20:09:04,642 INFO L226 Difference]: Without dead ends: 605 [2024-11-27 20:09:04,643 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-11-27 20:09:04,647 INFO L435 NwaCegarLoop]: 522 mSDtfsCounter, 451 mSDsluCounter, 531 mSDsCounter, 0 mSdLazyCounter, 60 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 451 SdHoareTripleChecker+Valid, 1053 SdHoareTripleChecker+Invalid, 60 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 60 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-27 20:09:04,647 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [451 Valid, 1053 Invalid, 60 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 60 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-27 20:09:04,649 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 605 states. [2024-11-27 20:09:04,671 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 605 to 605. [2024-11-27 20:09:04,672 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 605 states, 597 states have (on average 1.3668341708542713) internal successors, (816), 597 states have internal predecessors, (816), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-11-27 20:09:04,676 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 605 states to 605 states and 828 transitions. [2024-11-27 20:09:04,676 INFO L78 Accepts]: Start accepts. Automaton has 605 states and 828 transitions. Word has length 333 [2024-11-27 20:09:04,677 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-27 20:09:04,677 INFO L471 AbstractCegarLoop]: Abstraction has 605 states and 828 transitions. [2024-11-27 20:09:04,677 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 61.2) internal successors, (306), 5 states have internal predecessors, (306), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-27 20:09:04,677 INFO L276 IsEmpty]: Start isEmpty. Operand 605 states and 828 transitions. [2024-11-27 20:09:04,680 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 335 [2024-11-27 20:09:04,680 INFO L210 NwaCegarLoop]: Found error trace [2024-11-27 20:09:04,681 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-27 20:09:04,681 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable29 [2024-11-27 20:09:04,681 INFO L396 AbstractCegarLoop]: === Iteration 31 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-27 20:09:04,682 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-27 20:09:04,682 INFO L85 PathProgramCache]: Analyzing trace with hash -898887142, now seen corresponding path program 1 times [2024-11-27 20:09:04,682 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-27 20:09:04,682 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1675691962] [2024-11-27 20:09:04,682 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-27 20:09:04,683 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-27 20:09:05,456 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-27 20:09:06,266 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 84 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-27 20:09:06,266 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-27 20:09:06,267 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1675691962] [2024-11-27 20:09:06,267 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1675691962] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-27 20:09:06,267 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-27 20:09:06,267 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-27 20:09:06,267 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [272298852] [2024-11-27 20:09:06,267 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-27 20:09:06,268 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-27 20:09:06,269 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-27 20:09:06,271 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-27 20:09:06,271 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-27 20:09:06,271 INFO L87 Difference]: Start difference. First operand 605 states and 828 transitions. Second operand has 5 states, 5 states have (on average 61.4) internal successors, (307), 5 states have internal predecessors, (307), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-27 20:09:06,440 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-27 20:09:06,441 INFO L93 Difference]: Finished difference Result 974 states and 1334 transitions. [2024-11-27 20:09:06,441 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-27 20:09:06,442 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 61.4) internal successors, (307), 5 states have internal predecessors, (307), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 334 [2024-11-27 20:09:06,442 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-27 20:09:06,445 INFO L225 Difference]: With dead ends: 974 [2024-11-27 20:09:06,445 INFO L226 Difference]: Without dead ends: 605 [2024-11-27 20:09:06,446 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-11-27 20:09:06,450 INFO L435 NwaCegarLoop]: 522 mSDtfsCounter, 837 mSDsluCounter, 524 mSDsCounter, 0 mSdLazyCounter, 58 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 837 SdHoareTripleChecker+Valid, 1046 SdHoareTripleChecker+Invalid, 58 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 58 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-27 20:09:06,451 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [837 Valid, 1046 Invalid, 58 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 58 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-27 20:09:06,452 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 605 states. [2024-11-27 20:09:06,475 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 605 to 605. [2024-11-27 20:09:06,476 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 605 states, 597 states have (on average 1.3651591289782246) internal successors, (815), 597 states have internal predecessors, (815), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-11-27 20:09:06,479 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 605 states to 605 states and 827 transitions. [2024-11-27 20:09:06,480 INFO L78 Accepts]: Start accepts. Automaton has 605 states and 827 transitions. Word has length 334 [2024-11-27 20:09:06,480 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-27 20:09:06,481 INFO L471 AbstractCegarLoop]: Abstraction has 605 states and 827 transitions. [2024-11-27 20:09:06,482 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 61.4) internal successors, (307), 5 states have internal predecessors, (307), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-27 20:09:06,482 INFO L276 IsEmpty]: Start isEmpty. Operand 605 states and 827 transitions. [2024-11-27 20:09:06,485 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 336 [2024-11-27 20:09:06,486 INFO L210 NwaCegarLoop]: Found error trace [2024-11-27 20:09:06,487 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-27 20:09:06,487 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable30 [2024-11-27 20:09:06,487 INFO L396 AbstractCegarLoop]: === Iteration 32 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-27 20:09:06,488 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-27 20:09:06,488 INFO L85 PathProgramCache]: Analyzing trace with hash -543443530, now seen corresponding path program 1 times [2024-11-27 20:09:06,488 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-27 20:09:06,488 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1328683602] [2024-11-27 20:09:06,488 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-27 20:09:06,489 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-27 20:09:07,824 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-27 20:09:08,564 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 84 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-27 20:09:08,565 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-27 20:09:08,565 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1328683602] [2024-11-27 20:09:08,565 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1328683602] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-27 20:09:08,565 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-27 20:09:08,565 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-11-27 20:09:08,566 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1634867133] [2024-11-27 20:09:08,566 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-27 20:09:08,566 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-11-27 20:09:08,566 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-27 20:09:08,567 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-11-27 20:09:08,568 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2024-11-27 20:09:08,568 INFO L87 Difference]: Start difference. First operand 605 states and 827 transitions. Second operand has 6 states, 6 states have (on average 51.333333333333336) internal successors, (308), 6 states have internal predecessors, (308), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-27 20:09:09,424 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-27 20:09:09,425 INFO L93 Difference]: Finished difference Result 1421 states and 1949 transitions. [2024-11-27 20:09:09,425 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-27 20:09:09,426 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 51.333333333333336) internal successors, (308), 6 states have internal predecessors, (308), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 335 [2024-11-27 20:09:09,426 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-27 20:09:09,431 INFO L225 Difference]: With dead ends: 1421 [2024-11-27 20:09:09,431 INFO L226 Difference]: Without dead ends: 1052 [2024-11-27 20:09:09,432 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2024-11-27 20:09:09,433 INFO L435 NwaCegarLoop]: 455 mSDtfsCounter, 352 mSDsluCounter, 1855 mSDsCounter, 0 mSdLazyCounter, 602 mSolverCounterSat, 9 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 355 SdHoareTripleChecker+Valid, 2310 SdHoareTripleChecker+Invalid, 611 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 9 IncrementalHoareTripleChecker+Valid, 602 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.8s IncrementalHoareTripleChecker+Time [2024-11-27 20:09:09,434 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [355 Valid, 2310 Invalid, 611 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [9 Valid, 602 Invalid, 0 Unknown, 0 Unchecked, 0.8s Time] [2024-11-27 20:09:09,438 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1052 states. [2024-11-27 20:09:09,473 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1052 to 930. [2024-11-27 20:09:09,474 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 930 states, 919 states have (on average 1.3612622415669207) internal successors, (1251), 919 states have internal predecessors, (1251), 9 states have call successors, (9), 1 states have call predecessors, (9), 1 states have return successors, (9), 9 states have call predecessors, (9), 9 states have call successors, (9) [2024-11-27 20:09:09,480 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 930 states to 930 states and 1269 transitions. [2024-11-27 20:09:09,481 INFO L78 Accepts]: Start accepts. Automaton has 930 states and 1269 transitions. Word has length 335 [2024-11-27 20:09:09,482 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-27 20:09:09,482 INFO L471 AbstractCegarLoop]: Abstraction has 930 states and 1269 transitions. [2024-11-27 20:09:09,482 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 51.333333333333336) internal successors, (308), 6 states have internal predecessors, (308), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-27 20:09:09,482 INFO L276 IsEmpty]: Start isEmpty. Operand 930 states and 1269 transitions. [2024-11-27 20:09:09,486 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 337 [2024-11-27 20:09:09,486 INFO L210 NwaCegarLoop]: Found error trace [2024-11-27 20:09:09,487 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-27 20:09:09,487 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable31 [2024-11-27 20:09:09,487 INFO L396 AbstractCegarLoop]: === Iteration 33 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-27 20:09:09,488 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-27 20:09:09,488 INFO L85 PathProgramCache]: Analyzing trace with hash 1268661504, now seen corresponding path program 1 times [2024-11-27 20:09:09,488 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-27 20:09:09,489 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [485131483] [2024-11-27 20:09:09,489 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-27 20:09:09,489 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-27 20:09:10,829 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-27 20:09:11,821 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 84 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-27 20:09:11,821 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-27 20:09:11,821 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [485131483] [2024-11-27 20:09:11,822 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [485131483] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-27 20:09:11,822 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-27 20:09:11,822 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-11-27 20:09:11,822 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [307581150] [2024-11-27 20:09:11,822 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-27 20:09:11,824 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-11-27 20:09:11,824 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-27 20:09:11,825 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-11-27 20:09:11,825 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2024-11-27 20:09:11,825 INFO L87 Difference]: Start difference. First operand 930 states and 1269 transitions. Second operand has 6 states, 6 states have (on average 51.5) internal successors, (309), 6 states have internal predecessors, (309), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-27 20:09:12,705 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-27 20:09:12,705 INFO L93 Difference]: Finished difference Result 1322 states and 1808 transitions. [2024-11-27 20:09:12,706 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-27 20:09:12,706 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 51.5) internal successors, (309), 6 states have internal predecessors, (309), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 336 [2024-11-27 20:09:12,707 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-27 20:09:12,710 INFO L225 Difference]: With dead ends: 1322 [2024-11-27 20:09:12,711 INFO L226 Difference]: Without dead ends: 953 [2024-11-27 20:09:12,712 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2024-11-27 20:09:12,712 INFO L435 NwaCegarLoop]: 395 mSDtfsCounter, 1004 mSDsluCounter, 1155 mSDsCounter, 0 mSdLazyCounter, 635 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.7s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1007 SdHoareTripleChecker+Valid, 1550 SdHoareTripleChecker+Invalid, 635 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 635 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.8s IncrementalHoareTripleChecker+Time [2024-11-27 20:09:12,713 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1007 Valid, 1550 Invalid, 635 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 635 Invalid, 0 Unknown, 0 Unchecked, 0.8s Time] [2024-11-27 20:09:12,715 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 953 states. [2024-11-27 20:09:12,747 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 953 to 931. [2024-11-27 20:09:12,749 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 931 states, 920 states have (on average 1.3608695652173912) internal successors, (1252), 920 states have internal predecessors, (1252), 9 states have call successors, (9), 1 states have call predecessors, (9), 1 states have return successors, (9), 9 states have call predecessors, (9), 9 states have call successors, (9) [2024-11-27 20:09:12,752 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 931 states to 931 states and 1270 transitions. [2024-11-27 20:09:12,752 INFO L78 Accepts]: Start accepts. Automaton has 931 states and 1270 transitions. Word has length 336 [2024-11-27 20:09:12,753 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-27 20:09:12,753 INFO L471 AbstractCegarLoop]: Abstraction has 931 states and 1270 transitions. [2024-11-27 20:09:12,753 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 51.5) internal successors, (309), 6 states have internal predecessors, (309), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-27 20:09:12,754 INFO L276 IsEmpty]: Start isEmpty. Operand 931 states and 1270 transitions. [2024-11-27 20:09:12,757 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 337 [2024-11-27 20:09:12,757 INFO L210 NwaCegarLoop]: Found error trace [2024-11-27 20:09:12,757 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-27 20:09:12,758 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable32 [2024-11-27 20:09:12,758 INFO L396 AbstractCegarLoop]: === Iteration 34 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-27 20:09:12,758 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-27 20:09:12,758 INFO L85 PathProgramCache]: Analyzing trace with hash 1769560103, now seen corresponding path program 1 times [2024-11-27 20:09:12,759 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-27 20:09:12,759 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [160501510] [2024-11-27 20:09:12,759 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-27 20:09:12,759 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-27 20:09:13,746 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-27 20:09:15,022 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 31 proven. 0 refuted. 0 times theorem prover too weak. 113 trivial. 0 not checked. [2024-11-27 20:09:15,023 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-27 20:09:15,023 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [160501510] [2024-11-27 20:09:15,023 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [160501510] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-27 20:09:15,023 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-27 20:09:15,023 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2024-11-27 20:09:15,023 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [834574674] [2024-11-27 20:09:15,023 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-27 20:09:15,025 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2024-11-27 20:09:15,025 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-27 20:09:15,026 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2024-11-27 20:09:15,026 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=36, Unknown=0, NotChecked=0, Total=56 [2024-11-27 20:09:15,027 INFO L87 Difference]: Start difference. First operand 931 states and 1270 transitions. Second operand has 8 states, 8 states have (on average 32.375) internal successors, (259), 8 states have internal predecessors, (259), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-27 20:09:17,033 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-27 20:09:17,033 INFO L93 Difference]: Finished difference Result 2098 states and 2855 transitions. [2024-11-27 20:09:17,033 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2024-11-27 20:09:17,034 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 32.375) internal successors, (259), 8 states have internal predecessors, (259), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 336 [2024-11-27 20:09:17,034 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-27 20:09:17,040 INFO L225 Difference]: With dead ends: 2098 [2024-11-27 20:09:17,040 INFO L226 Difference]: Without dead ends: 1615 [2024-11-27 20:09:17,041 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=26, Invalid=46, Unknown=0, NotChecked=0, Total=72 [2024-11-27 20:09:17,042 INFO L435 NwaCegarLoop]: 901 mSDtfsCounter, 1365 mSDsluCounter, 3323 mSDsCounter, 0 mSdLazyCounter, 1866 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1371 SdHoareTripleChecker+Valid, 4224 SdHoareTripleChecker+Invalid, 1867 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 1866 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.9s IncrementalHoareTripleChecker+Time [2024-11-27 20:09:17,042 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1371 Valid, 4224 Invalid, 1867 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 1866 Invalid, 0 Unknown, 0 Unchecked, 1.9s Time] [2024-11-27 20:09:17,044 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1615 states. [2024-11-27 20:09:17,083 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1615 to 1000. [2024-11-27 20:09:17,085 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1000 states, 986 states have (on average 1.3630831643002028) internal successors, (1344), 986 states have internal predecessors, (1344), 12 states have call successors, (12), 1 states have call predecessors, (12), 1 states have return successors, (12), 12 states have call predecessors, (12), 12 states have call successors, (12) [2024-11-27 20:09:17,087 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1000 states to 1000 states and 1368 transitions. [2024-11-27 20:09:17,088 INFO L78 Accepts]: Start accepts. Automaton has 1000 states and 1368 transitions. Word has length 336 [2024-11-27 20:09:17,088 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-27 20:09:17,088 INFO L471 AbstractCegarLoop]: Abstraction has 1000 states and 1368 transitions. [2024-11-27 20:09:17,088 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 32.375) internal successors, (259), 8 states have internal predecessors, (259), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-27 20:09:17,089 INFO L276 IsEmpty]: Start isEmpty. Operand 1000 states and 1368 transitions. [2024-11-27 20:09:17,092 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 338 [2024-11-27 20:09:17,092 INFO L210 NwaCegarLoop]: Found error trace [2024-11-27 20:09:17,092 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-27 20:09:17,093 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable33 [2024-11-27 20:09:17,093 INFO L396 AbstractCegarLoop]: === Iteration 35 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-27 20:09:17,093 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-27 20:09:17,093 INFO L85 PathProgramCache]: Analyzing trace with hash -1598035847, now seen corresponding path program 1 times [2024-11-27 20:09:17,094 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-27 20:09:17,094 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1802203671] [2024-11-27 20:09:17,094 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-27 20:09:17,094 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-27 20:09:18,328 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-27 20:09:19,478 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 39 proven. 0 refuted. 0 times theorem prover too weak. 105 trivial. 0 not checked. [2024-11-27 20:09:19,478 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-27 20:09:19,479 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1802203671] [2024-11-27 20:09:19,479 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1802203671] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-27 20:09:19,479 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-27 20:09:19,479 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-27 20:09:19,479 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1343024754] [2024-11-27 20:09:19,479 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-27 20:09:19,480 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-27 20:09:19,480 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-27 20:09:19,480 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-27 20:09:19,481 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-11-27 20:09:19,482 INFO L87 Difference]: Start difference. First operand 1000 states and 1368 transitions. Second operand has 5 states, 5 states have (on average 53.8) internal successors, (269), 5 states have internal predecessors, (269), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-27 20:09:20,004 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-27 20:09:20,004 INFO L93 Difference]: Finished difference Result 1660 states and 2245 transitions. [2024-11-27 20:09:20,005 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-11-27 20:09:20,005 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 53.8) internal successors, (269), 5 states have internal predecessors, (269), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 337 [2024-11-27 20:09:20,006 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-27 20:09:20,010 INFO L225 Difference]: With dead ends: 1660 [2024-11-27 20:09:20,010 INFO L226 Difference]: Without dead ends: 1012 [2024-11-27 20:09:20,012 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-11-27 20:09:20,012 INFO L435 NwaCegarLoop]: 401 mSDtfsCounter, 321 mSDsluCounter, 781 mSDsCounter, 0 mSdLazyCounter, 460 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 321 SdHoareTripleChecker+Valid, 1182 SdHoareTripleChecker+Invalid, 460 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 460 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2024-11-27 20:09:20,012 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [321 Valid, 1182 Invalid, 460 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 460 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2024-11-27 20:09:20,015 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1012 states. [2024-11-27 20:09:20,046 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1012 to 1006. [2024-11-27 20:09:20,048 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1006 states, 992 states have (on average 1.3608870967741935) internal successors, (1350), 992 states have internal predecessors, (1350), 12 states have call successors, (12), 1 states have call predecessors, (12), 1 states have return successors, (12), 12 states have call predecessors, (12), 12 states have call successors, (12) [2024-11-27 20:09:20,051 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1006 states to 1006 states and 1374 transitions. [2024-11-27 20:09:20,051 INFO L78 Accepts]: Start accepts. Automaton has 1006 states and 1374 transitions. Word has length 337 [2024-11-27 20:09:20,052 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-27 20:09:20,052 INFO L471 AbstractCegarLoop]: Abstraction has 1006 states and 1374 transitions. [2024-11-27 20:09:20,052 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 53.8) internal successors, (269), 5 states have internal predecessors, (269), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-27 20:09:20,052 INFO L276 IsEmpty]: Start isEmpty. Operand 1006 states and 1374 transitions. [2024-11-27 20:09:20,056 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 338 [2024-11-27 20:09:20,056 INFO L210 NwaCegarLoop]: Found error trace [2024-11-27 20:09:20,056 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-27 20:09:20,056 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable34 [2024-11-27 20:09:20,057 INFO L396 AbstractCegarLoop]: === Iteration 36 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-27 20:09:20,057 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-27 20:09:20,057 INFO L85 PathProgramCache]: Analyzing trace with hash 1040159943, now seen corresponding path program 1 times [2024-11-27 20:09:20,058 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-27 20:09:20,058 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2004085915] [2024-11-27 20:09:20,058 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-27 20:09:20,058 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-27 20:09:20,840 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-27 20:09:21,408 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 48 proven. 0 refuted. 0 times theorem prover too weak. 96 trivial. 0 not checked. [2024-11-27 20:09:21,408 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-27 20:09:21,409 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2004085915] [2024-11-27 20:09:21,409 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2004085915] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-27 20:09:21,409 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-27 20:09:21,409 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-27 20:09:21,409 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [294288634] [2024-11-27 20:09:21,409 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-27 20:09:21,410 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-27 20:09:21,410 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-27 20:09:21,410 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-27 20:09:21,410 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2024-11-27 20:09:21,411 INFO L87 Difference]: Start difference. First operand 1006 states and 1374 transitions. Second operand has 4 states, 4 states have (on average 69.25) internal successors, (277), 4 states have internal predecessors, (277), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-27 20:09:21,784 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-27 20:09:21,785 INFO L93 Difference]: Finished difference Result 1656 states and 2235 transitions. [2024-11-27 20:09:21,785 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-27 20:09:21,785 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 69.25) internal successors, (277), 4 states have internal predecessors, (277), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 337 [2024-11-27 20:09:21,786 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-27 20:09:21,789 INFO L225 Difference]: With dead ends: 1656 [2024-11-27 20:09:21,789 INFO L226 Difference]: Without dead ends: 1006 [2024-11-27 20:09:21,790 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2024-11-27 20:09:21,791 INFO L435 NwaCegarLoop]: 402 mSDtfsCounter, 499 mSDsluCounter, 401 mSDsCounter, 0 mSdLazyCounter, 299 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 499 SdHoareTripleChecker+Valid, 803 SdHoareTripleChecker+Invalid, 300 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 299 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2024-11-27 20:09:21,791 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [499 Valid, 803 Invalid, 300 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 299 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2024-11-27 20:09:21,793 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1006 states. [2024-11-27 20:09:21,820 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1006 to 1006. [2024-11-27 20:09:21,822 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1006 states, 992 states have (on average 1.3548387096774193) internal successors, (1344), 992 states have internal predecessors, (1344), 12 states have call successors, (12), 1 states have call predecessors, (12), 1 states have return successors, (12), 12 states have call predecessors, (12), 12 states have call successors, (12) [2024-11-27 20:09:21,824 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1006 states to 1006 states and 1368 transitions. [2024-11-27 20:09:21,825 INFO L78 Accepts]: Start accepts. Automaton has 1006 states and 1368 transitions. Word has length 337 [2024-11-27 20:09:21,825 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-27 20:09:21,825 INFO L471 AbstractCegarLoop]: Abstraction has 1006 states and 1368 transitions. [2024-11-27 20:09:21,825 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 69.25) internal successors, (277), 4 states have internal predecessors, (277), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-27 20:09:21,826 INFO L276 IsEmpty]: Start isEmpty. Operand 1006 states and 1368 transitions. [2024-11-27 20:09:21,829 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 340 [2024-11-27 20:09:21,829 INFO L210 NwaCegarLoop]: Found error trace [2024-11-27 20:09:21,830 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-27 20:09:21,830 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable35 [2024-11-27 20:09:21,831 INFO L396 AbstractCegarLoop]: === Iteration 37 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-27 20:09:21,831 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-27 20:09:21,832 INFO L85 PathProgramCache]: Analyzing trace with hash 2025188781, now seen corresponding path program 1 times [2024-11-27 20:09:21,832 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-27 20:09:21,833 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [646523211] [2024-11-27 20:09:21,833 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-27 20:09:21,833 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-27 20:09:23,072 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-27 20:09:23,996 INFO L134 CoverageAnalysis]: Checked inductivity of 145 backedges. 7 proven. 0 refuted. 0 times theorem prover too weak. 138 trivial. 0 not checked. [2024-11-27 20:09:23,996 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-27 20:09:23,996 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [646523211] [2024-11-27 20:09:23,996 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [646523211] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-27 20:09:23,996 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-27 20:09:23,997 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-11-27 20:09:23,997 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1561806216] [2024-11-27 20:09:23,997 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-27 20:09:23,997 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-11-27 20:09:23,998 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-27 20:09:23,998 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-11-27 20:09:23,998 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2024-11-27 20:09:23,999 INFO L87 Difference]: Start difference. First operand 1006 states and 1368 transitions. Second operand has 6 states, 6 states have (on average 40.0) internal successors, (240), 6 states have internal predecessors, (240), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-27 20:09:24,630 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-27 20:09:24,630 INFO L93 Difference]: Finished difference Result 1868 states and 2528 transitions. [2024-11-27 20:09:24,631 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-27 20:09:24,631 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 40.0) internal successors, (240), 6 states have internal predecessors, (240), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 339 [2024-11-27 20:09:24,632 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-27 20:09:24,635 INFO L225 Difference]: With dead ends: 1868 [2024-11-27 20:09:24,635 INFO L226 Difference]: Without dead ends: 1014 [2024-11-27 20:09:24,637 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=21, Invalid=51, Unknown=0, NotChecked=0, Total=72 [2024-11-27 20:09:24,637 INFO L435 NwaCegarLoop]: 389 mSDtfsCounter, 509 mSDsluCounter, 1160 mSDsCounter, 0 mSdLazyCounter, 650 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 512 SdHoareTripleChecker+Valid, 1549 SdHoareTripleChecker+Invalid, 650 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 650 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2024-11-27 20:09:24,638 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [512 Valid, 1549 Invalid, 650 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 650 Invalid, 0 Unknown, 0 Unchecked, 0.6s Time] [2024-11-27 20:09:24,639 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1014 states. [2024-11-27 20:09:24,669 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1014 to 1010. [2024-11-27 20:09:24,671 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1010 states, 996 states have (on average 1.3534136546184738) internal successors, (1348), 996 states have internal predecessors, (1348), 12 states have call successors, (12), 1 states have call predecessors, (12), 1 states have return successors, (12), 12 states have call predecessors, (12), 12 states have call successors, (12) [2024-11-27 20:09:24,673 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1010 states to 1010 states and 1372 transitions. [2024-11-27 20:09:24,674 INFO L78 Accepts]: Start accepts. Automaton has 1010 states and 1372 transitions. Word has length 339 [2024-11-27 20:09:24,674 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-27 20:09:24,674 INFO L471 AbstractCegarLoop]: Abstraction has 1010 states and 1372 transitions. [2024-11-27 20:09:24,675 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 40.0) internal successors, (240), 6 states have internal predecessors, (240), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-27 20:09:24,675 INFO L276 IsEmpty]: Start isEmpty. Operand 1010 states and 1372 transitions. [2024-11-27 20:09:24,678 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 342 [2024-11-27 20:09:24,679 INFO L210 NwaCegarLoop]: Found error trace [2024-11-27 20:09:24,679 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-27 20:09:24,679 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable36 [2024-11-27 20:09:24,679 INFO L396 AbstractCegarLoop]: === Iteration 38 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-27 20:09:24,680 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-27 20:09:24,683 INFO L85 PathProgramCache]: Analyzing trace with hash 615740921, now seen corresponding path program 1 times [2024-11-27 20:09:24,684 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-27 20:09:24,684 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [340290884] [2024-11-27 20:09:24,684 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-27 20:09:24,684 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-27 20:09:26,314 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-27 20:09:28,308 INFO L134 CoverageAnalysis]: Checked inductivity of 146 backedges. 4 proven. 82 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-27 20:09:28,309 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-27 20:09:28,309 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [340290884] [2024-11-27 20:09:28,309 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [340290884] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-27 20:09:28,309 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1319565017] [2024-11-27 20:09:28,310 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-27 20:09:28,310 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-27 20:09:28,310 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25b25d56-1da7-44e1-806b-92cb0bdd2bbb/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-27 20:09:28,313 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25b25d56-1da7-44e1-806b-92cb0bdd2bbb/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-27 20:09:28,320 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25b25d56-1da7-44e1-806b-92cb0bdd2bbb/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2024-11-27 20:09:29,733 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-27 20:09:29,743 INFO L256 TraceCheckSpWp]: Trace formula consists of 2047 conjuncts, 35 conjuncts are in the unsatisfiable core [2024-11-27 20:09:29,757 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-27 20:09:30,284 INFO L134 CoverageAnalysis]: Checked inductivity of 146 backedges. 60 proven. 0 refuted. 0 times theorem prover too weak. 86 trivial. 0 not checked. [2024-11-27 20:09:30,284 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-11-27 20:09:30,284 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1319565017] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-27 20:09:30,284 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-11-27 20:09:30,284 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [11] total 19 [2024-11-27 20:09:30,289 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [722384684] [2024-11-27 20:09:30,289 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-27 20:09:30,290 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 10 states [2024-11-27 20:09:30,290 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-27 20:09:30,291 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2024-11-27 20:09:30,292 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=43, Invalid=299, Unknown=0, NotChecked=0, Total=342 [2024-11-27 20:09:30,292 INFO L87 Difference]: Start difference. First operand 1010 states and 1372 transitions. Second operand has 10 states, 10 states have (on average 26.3) internal successors, (263), 10 states have internal predecessors, (263), 2 states have call successors, (5), 2 states have call predecessors, (5), 2 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) [2024-11-27 20:09:31,369 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-27 20:09:31,369 INFO L93 Difference]: Finished difference Result 1843 states and 2492 transitions. [2024-11-27 20:09:31,369 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2024-11-27 20:09:31,370 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 10 states have (on average 26.3) internal successors, (263), 10 states have internal predecessors, (263), 2 states have call successors, (5), 2 states have call predecessors, (5), 2 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) Word has length 341 [2024-11-27 20:09:31,370 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-27 20:09:31,373 INFO L225 Difference]: With dead ends: 1843 [2024-11-27 20:09:31,374 INFO L226 Difference]: Without dead ends: 1030 [2024-11-27 20:09:31,375 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 354 GetRequests, 334 SyntacticMatches, 0 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 67 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=55, Invalid=407, Unknown=0, NotChecked=0, Total=462 [2024-11-27 20:09:31,376 INFO L435 NwaCegarLoop]: 378 mSDtfsCounter, 496 mSDsluCounter, 2592 mSDsCounter, 0 mSdLazyCounter, 1374 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.8s Time, 0 mProtectedPredicate, 0 mProtectedAction, 497 SdHoareTripleChecker+Valid, 2970 SdHoareTripleChecker+Invalid, 1377 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 1374 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.0s IncrementalHoareTripleChecker+Time [2024-11-27 20:09:31,376 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [497 Valid, 2970 Invalid, 1377 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 1374 Invalid, 0 Unknown, 0 Unchecked, 1.0s Time] [2024-11-27 20:09:31,377 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1030 states. [2024-11-27 20:09:31,403 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1030 to 1022. [2024-11-27 20:09:31,405 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1022 states, 1008 states have (on average 1.3412698412698412) internal successors, (1352), 1008 states have internal predecessors, (1352), 12 states have call successors, (12), 1 states have call predecessors, (12), 1 states have return successors, (12), 12 states have call predecessors, (12), 12 states have call successors, (12) [2024-11-27 20:09:31,407 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1022 states to 1022 states and 1376 transitions. [2024-11-27 20:09:31,408 INFO L78 Accepts]: Start accepts. Automaton has 1022 states and 1376 transitions. Word has length 341 [2024-11-27 20:09:31,408 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-27 20:09:31,408 INFO L471 AbstractCegarLoop]: Abstraction has 1022 states and 1376 transitions. [2024-11-27 20:09:31,408 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 10 states, 10 states have (on average 26.3) internal successors, (263), 10 states have internal predecessors, (263), 2 states have call successors, (5), 2 states have call predecessors, (5), 2 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) [2024-11-27 20:09:31,409 INFO L276 IsEmpty]: Start isEmpty. Operand 1022 states and 1376 transitions. [2024-11-27 20:09:31,412 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 346 [2024-11-27 20:09:31,412 INFO L210 NwaCegarLoop]: Found error trace [2024-11-27 20:09:31,413 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-27 20:09:31,432 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25b25d56-1da7-44e1-806b-92cb0bdd2bbb/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Ended with exit code 0 [2024-11-27 20:09:31,613 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25b25d56-1da7-44e1-806b-92cb0bdd2bbb/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable37 [2024-11-27 20:09:31,614 INFO L396 AbstractCegarLoop]: === Iteration 39 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-27 20:09:31,614 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-27 20:09:31,615 INFO L85 PathProgramCache]: Analyzing trace with hash 545994611, now seen corresponding path program 1 times [2024-11-27 20:09:31,615 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-27 20:09:31,615 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1618343436] [2024-11-27 20:09:31,615 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-27 20:09:31,615 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-27 20:09:32,952 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-27 20:09:34,656 INFO L134 CoverageAnalysis]: Checked inductivity of 148 backedges. 4 proven. 84 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-27 20:09:34,656 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-27 20:09:34,656 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1618343436] [2024-11-27 20:09:34,657 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1618343436] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-27 20:09:34,657 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [299890578] [2024-11-27 20:09:34,657 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-27 20:09:34,657 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-27 20:09:34,657 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25b25d56-1da7-44e1-806b-92cb0bdd2bbb/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-27 20:09:34,664 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25b25d56-1da7-44e1-806b-92cb0bdd2bbb/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-27 20:09:34,669 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25b25d56-1da7-44e1-806b-92cb0bdd2bbb/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2024-11-27 20:09:36,142 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-27 20:09:36,152 INFO L256 TraceCheckSpWp]: Trace formula consists of 2055 conjuncts, 33 conjuncts are in the unsatisfiable core [2024-11-27 20:09:36,164 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-27 20:09:36,515 INFO L134 CoverageAnalysis]: Checked inductivity of 148 backedges. 40 proven. 0 refuted. 0 times theorem prover too weak. 108 trivial. 0 not checked. [2024-11-27 20:09:36,515 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-11-27 20:09:36,516 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [299890578] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-27 20:09:36,516 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-11-27 20:09:36,516 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [11] total 15 [2024-11-27 20:09:36,516 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [311703604] [2024-11-27 20:09:36,516 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-27 20:09:36,517 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-11-27 20:09:36,517 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-27 20:09:36,519 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-11-27 20:09:36,519 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=34, Invalid=176, Unknown=0, NotChecked=0, Total=210 [2024-11-27 20:09:36,519 INFO L87 Difference]: Start difference. First operand 1022 states and 1376 transitions. Second operand has 6 states, 6 states have (on average 43.0) internal successors, (258), 6 states have internal predecessors, (258), 2 states have call successors, (4), 2 states have call predecessors, (4), 2 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) [2024-11-27 20:09:37,020 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-27 20:09:37,021 INFO L93 Difference]: Finished difference Result 1851 states and 2481 transitions. [2024-11-27 20:09:37,021 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-27 20:09:37,021 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 43.0) internal successors, (258), 6 states have internal predecessors, (258), 2 states have call successors, (4), 2 states have call predecessors, (4), 2 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) Word has length 345 [2024-11-27 20:09:37,021 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-27 20:09:37,024 INFO L225 Difference]: With dead ends: 1851 [2024-11-27 20:09:37,024 INFO L226 Difference]: Without dead ends: 1038 [2024-11-27 20:09:37,024 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 355 GetRequests, 342 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 24 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=34, Invalid=176, Unknown=0, NotChecked=0, Total=210 [2024-11-27 20:09:37,025 INFO L435 NwaCegarLoop]: 387 mSDtfsCounter, 488 mSDsluCounter, 1154 mSDsCounter, 0 mSdLazyCounter, 650 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 490 SdHoareTripleChecker+Valid, 1541 SdHoareTripleChecker+Invalid, 651 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 650 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2024-11-27 20:09:37,025 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [490 Valid, 1541 Invalid, 651 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 650 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2024-11-27 20:09:37,026 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1038 states. [2024-11-27 20:09:37,048 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1038 to 1034. [2024-11-27 20:09:37,050 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1034 states, 1020 states have (on average 1.3372549019607842) internal successors, (1364), 1020 states have internal predecessors, (1364), 12 states have call successors, (12), 1 states have call predecessors, (12), 1 states have return successors, (12), 12 states have call predecessors, (12), 12 states have call successors, (12) [2024-11-27 20:09:37,051 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1034 states to 1034 states and 1388 transitions. [2024-11-27 20:09:37,052 INFO L78 Accepts]: Start accepts. Automaton has 1034 states and 1388 transitions. Word has length 345 [2024-11-27 20:09:37,052 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-27 20:09:37,052 INFO L471 AbstractCegarLoop]: Abstraction has 1034 states and 1388 transitions. [2024-11-27 20:09:37,053 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 43.0) internal successors, (258), 6 states have internal predecessors, (258), 2 states have call successors, (4), 2 states have call predecessors, (4), 2 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) [2024-11-27 20:09:37,053 INFO L276 IsEmpty]: Start isEmpty. Operand 1034 states and 1388 transitions. [2024-11-27 20:09:37,056 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 350 [2024-11-27 20:09:37,056 INFO L210 NwaCegarLoop]: Found error trace [2024-11-27 20:09:37,056 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-27 20:09:37,072 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25b25d56-1da7-44e1-806b-92cb0bdd2bbb/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Forceful destruction successful, exit code 0 [2024-11-27 20:09:37,257 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 4 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25b25d56-1da7-44e1-806b-92cb0bdd2bbb/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable38 [2024-11-27 20:09:37,257 INFO L396 AbstractCegarLoop]: === Iteration 40 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-27 20:09:37,258 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-27 20:09:37,258 INFO L85 PathProgramCache]: Analyzing trace with hash 568587949, now seen corresponding path program 1 times [2024-11-27 20:09:37,258 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-27 20:09:37,259 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [221721636] [2024-11-27 20:09:37,259 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-27 20:09:37,259 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-27 20:09:38,380 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-27 20:09:40,298 INFO L134 CoverageAnalysis]: Checked inductivity of 150 backedges. 4 proven. 86 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-27 20:09:40,298 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-27 20:09:40,298 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [221721636] [2024-11-27 20:09:40,298 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [221721636] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-27 20:09:40,298 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1784659978] [2024-11-27 20:09:40,298 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-27 20:09:40,299 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-27 20:09:40,299 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25b25d56-1da7-44e1-806b-92cb0bdd2bbb/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-27 20:09:40,300 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25b25d56-1da7-44e1-806b-92cb0bdd2bbb/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-27 20:09:40,303 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25b25d56-1da7-44e1-806b-92cb0bdd2bbb/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2024-11-27 20:09:42,545 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-27 20:09:42,556 INFO L256 TraceCheckSpWp]: Trace formula consists of 2063 conjuncts, 26 conjuncts are in the unsatisfiable core [2024-11-27 20:09:42,565 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-27 20:09:43,319 INFO L134 CoverageAnalysis]: Checked inductivity of 150 backedges. 120 proven. 0 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2024-11-27 20:09:43,319 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-11-27 20:09:43,320 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1784659978] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-27 20:09:43,320 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-11-27 20:09:43,320 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [11] total 18 [2024-11-27 20:09:43,320 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1901282846] [2024-11-27 20:09:43,320 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-27 20:09:43,321 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 9 states [2024-11-27 20:09:43,321 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-27 20:09:43,322 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2024-11-27 20:09:43,322 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=42, Invalid=264, Unknown=0, NotChecked=0, Total=306 [2024-11-27 20:09:43,322 INFO L87 Difference]: Start difference. First operand 1034 states and 1388 transitions. Second operand has 9 states, 9 states have (on average 35.77777777777778) internal successors, (322), 9 states have internal predecessors, (322), 2 states have call successors, (6), 2 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-27 20:09:44,201 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-27 20:09:44,202 INFO L93 Difference]: Finished difference Result 2441 states and 3260 transitions. [2024-11-27 20:09:44,202 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2024-11-27 20:09:44,202 INFO L78 Accepts]: Start accepts. Automaton has has 9 states, 9 states have (on average 35.77777777777778) internal successors, (322), 9 states have internal predecessors, (322), 2 states have call successors, (6), 2 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 349 [2024-11-27 20:09:44,202 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-27 20:09:44,208 INFO L225 Difference]: With dead ends: 2441 [2024-11-27 20:09:44,208 INFO L226 Difference]: Without dead ends: 1796 [2024-11-27 20:09:44,210 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 362 GetRequests, 343 SyntacticMatches, 0 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 62 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=60, Invalid=360, Unknown=0, NotChecked=0, Total=420 [2024-11-27 20:09:44,210 INFO L435 NwaCegarLoop]: 385 mSDtfsCounter, 1595 mSDsluCounter, 1708 mSDsCounter, 0 mSdLazyCounter, 941 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1598 SdHoareTripleChecker+Valid, 2093 SdHoareTripleChecker+Invalid, 942 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 941 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.8s IncrementalHoareTripleChecker+Time [2024-11-27 20:09:44,210 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1598 Valid, 2093 Invalid, 942 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 941 Invalid, 0 Unknown, 0 Unchecked, 0.8s Time] [2024-11-27 20:09:44,214 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1796 states. [2024-11-27 20:09:44,257 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1796 to 1450. [2024-11-27 20:09:44,259 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1450 states, 1427 states have (on average 1.3160476524176594) internal successors, (1878), 1427 states have internal predecessors, (1878), 21 states have call successors, (21), 1 states have call predecessors, (21), 1 states have return successors, (21), 21 states have call predecessors, (21), 21 states have call successors, (21) [2024-11-27 20:09:44,262 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1450 states to 1450 states and 1920 transitions. [2024-11-27 20:09:44,262 INFO L78 Accepts]: Start accepts. Automaton has 1450 states and 1920 transitions. Word has length 349 [2024-11-27 20:09:44,263 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-27 20:09:44,263 INFO L471 AbstractCegarLoop]: Abstraction has 1450 states and 1920 transitions. [2024-11-27 20:09:44,263 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 9 states, 9 states have (on average 35.77777777777778) internal successors, (322), 9 states have internal predecessors, (322), 2 states have call successors, (6), 2 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-27 20:09:44,263 INFO L276 IsEmpty]: Start isEmpty. Operand 1450 states and 1920 transitions. [2024-11-27 20:09:44,267 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 350 [2024-11-27 20:09:44,267 INFO L210 NwaCegarLoop]: Found error trace [2024-11-27 20:09:44,268 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-27 20:09:44,287 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25b25d56-1da7-44e1-806b-92cb0bdd2bbb/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Ended with exit code 0 [2024-11-27 20:09:44,468 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 5 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25b25d56-1da7-44e1-806b-92cb0bdd2bbb/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable39 [2024-11-27 20:09:44,469 INFO L396 AbstractCegarLoop]: === Iteration 41 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-27 20:09:44,469 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-27 20:09:44,469 INFO L85 PathProgramCache]: Analyzing trace with hash -96894230, now seen corresponding path program 1 times [2024-11-27 20:09:44,470 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-27 20:09:44,470 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [953302807] [2024-11-27 20:09:44,470 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-27 20:09:44,470 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-27 20:09:44,723 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-27 20:09:45,202 INFO L134 CoverageAnalysis]: Checked inductivity of 149 backedges. 48 proven. 0 refuted. 0 times theorem prover too weak. 101 trivial. 0 not checked. [2024-11-27 20:09:45,203 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-27 20:09:45,203 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [953302807] [2024-11-27 20:09:45,203 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [953302807] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-27 20:09:45,203 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-27 20:09:45,203 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-27 20:09:45,203 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1206338201] [2024-11-27 20:09:45,204 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-27 20:09:45,204 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-27 20:09:45,205 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-27 20:09:45,205 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-27 20:09:45,205 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-11-27 20:09:45,206 INFO L87 Difference]: Start difference. First operand 1450 states and 1920 transitions. Second operand has 5 states, 5 states have (on average 57.0) internal successors, (285), 5 states have internal predecessors, (285), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-27 20:09:45,278 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-27 20:09:45,278 INFO L93 Difference]: Finished difference Result 2245 states and 2981 transitions. [2024-11-27 20:09:45,278 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-11-27 20:09:45,279 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 57.0) internal successors, (285), 5 states have internal predecessors, (285), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 349 [2024-11-27 20:09:45,279 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-27 20:09:45,284 INFO L225 Difference]: With dead ends: 2245 [2024-11-27 20:09:45,285 INFO L226 Difference]: Without dead ends: 1540 [2024-11-27 20:09:45,286 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-11-27 20:09:45,286 INFO L435 NwaCegarLoop]: 544 mSDtfsCounter, 16 mSDsluCounter, 1620 mSDsCounter, 0 mSdLazyCounter, 23 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 16 SdHoareTripleChecker+Valid, 2164 SdHoareTripleChecker+Invalid, 23 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 23 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-27 20:09:45,287 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [16 Valid, 2164 Invalid, 23 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 23 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-27 20:09:45,289 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1540 states. [2024-11-27 20:09:45,330 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1540 to 1540. [2024-11-27 20:09:45,332 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1540 states, 1517 states have (on average 1.3236651285431773) internal successors, (2008), 1517 states have internal predecessors, (2008), 21 states have call successors, (21), 1 states have call predecessors, (21), 1 states have return successors, (21), 21 states have call predecessors, (21), 21 states have call successors, (21) [2024-11-27 20:09:45,335 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1540 states to 1540 states and 2050 transitions. [2024-11-27 20:09:45,335 INFO L78 Accepts]: Start accepts. Automaton has 1540 states and 2050 transitions. Word has length 349 [2024-11-27 20:09:45,336 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-27 20:09:45,336 INFO L471 AbstractCegarLoop]: Abstraction has 1540 states and 2050 transitions. [2024-11-27 20:09:45,336 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 57.0) internal successors, (285), 5 states have internal predecessors, (285), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-27 20:09:45,336 INFO L276 IsEmpty]: Start isEmpty. Operand 1540 states and 2050 transitions. [2024-11-27 20:09:45,341 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 351 [2024-11-27 20:09:45,341 INFO L210 NwaCegarLoop]: Found error trace [2024-11-27 20:09:45,342 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-27 20:09:45,342 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable40 [2024-11-27 20:09:45,342 INFO L396 AbstractCegarLoop]: === Iteration 42 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-27 20:09:45,343 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-27 20:09:45,343 INFO L85 PathProgramCache]: Analyzing trace with hash -1377398202, now seen corresponding path program 1 times [2024-11-27 20:09:45,343 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-27 20:09:45,343 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [65897006] [2024-11-27 20:09:45,343 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-27 20:09:45,344 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-27 20:09:46,533 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-27 20:09:48,402 INFO L134 CoverageAnalysis]: Checked inductivity of 150 backedges. 4 proven. 86 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-27 20:09:48,402 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-27 20:09:48,402 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [65897006] [2024-11-27 20:09:48,402 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [65897006] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-27 20:09:48,402 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1409773200] [2024-11-27 20:09:48,403 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-27 20:09:48,403 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-27 20:09:48,403 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25b25d56-1da7-44e1-806b-92cb0bdd2bbb/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-27 20:09:48,404 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25b25d56-1da7-44e1-806b-92cb0bdd2bbb/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-27 20:09:48,406 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25b25d56-1da7-44e1-806b-92cb0bdd2bbb/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2024-11-27 20:09:50,607 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-27 20:09:50,617 INFO L256 TraceCheckSpWp]: Trace formula consists of 2066 conjuncts, 24 conjuncts are in the unsatisfiable core [2024-11-27 20:09:50,626 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-27 20:09:50,976 INFO L134 CoverageAnalysis]: Checked inductivity of 150 backedges. 84 proven. 6 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-27 20:09:50,976 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-27 20:09:51,497 INFO L134 CoverageAnalysis]: Checked inductivity of 150 backedges. 90 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-27 20:09:51,498 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1409773200] provided 1 perfect and 1 imperfect interpolant sequences [2024-11-27 20:09:51,498 INFO L185 FreeRefinementEngine]: Found 1 perfect and 2 imperfect interpolant sequences. [2024-11-27 20:09:51,498 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [11, 8] total 22 [2024-11-27 20:09:51,498 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1754022061] [2024-11-27 20:09:51,498 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-27 20:09:51,499 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2024-11-27 20:09:51,499 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-27 20:09:51,500 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-11-27 20:09:51,500 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=52, Invalid=410, Unknown=0, NotChecked=0, Total=462 [2024-11-27 20:09:51,500 INFO L87 Difference]: Start difference. First operand 1540 states and 2050 transitions. Second operand has 7 states, 7 states have (on average 46.142857142857146) internal successors, (323), 7 states have internal predecessors, (323), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-27 20:09:51,751 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-27 20:09:51,751 INFO L93 Difference]: Finished difference Result 2330 states and 3121 transitions. [2024-11-27 20:09:51,752 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2024-11-27 20:09:51,752 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 46.142857142857146) internal successors, (323), 7 states have internal predecessors, (323), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 350 [2024-11-27 20:09:51,753 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-27 20:09:51,764 INFO L225 Difference]: With dead ends: 2330 [2024-11-27 20:09:51,767 INFO L226 Difference]: Without dead ends: 1934 [2024-11-27 20:09:51,769 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 712 GetRequests, 690 SyntacticMatches, 0 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 79 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=61, Invalid=491, Unknown=0, NotChecked=0, Total=552 [2024-11-27 20:09:51,769 INFO L435 NwaCegarLoop]: 966 mSDtfsCounter, 352 mSDsluCounter, 4382 mSDsCounter, 0 mSdLazyCounter, 74 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 352 SdHoareTripleChecker+Valid, 5348 SdHoareTripleChecker+Invalid, 75 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 74 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-27 20:09:51,774 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [352 Valid, 5348 Invalid, 75 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 74 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-27 20:09:51,776 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1934 states. [2024-11-27 20:09:51,824 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1934 to 1731. [2024-11-27 20:09:51,826 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1731 states, 1705 states have (on average 1.3184750733137829) internal successors, (2248), 1705 states have internal predecessors, (2248), 24 states have call successors, (24), 1 states have call predecessors, (24), 1 states have return successors, (24), 24 states have call predecessors, (24), 24 states have call successors, (24) [2024-11-27 20:09:51,830 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1731 states to 1731 states and 2296 transitions. [2024-11-27 20:09:51,830 INFO L78 Accepts]: Start accepts. Automaton has 1731 states and 2296 transitions. Word has length 350 [2024-11-27 20:09:51,831 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-27 20:09:51,831 INFO L471 AbstractCegarLoop]: Abstraction has 1731 states and 2296 transitions. [2024-11-27 20:09:51,832 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 46.142857142857146) internal successors, (323), 7 states have internal predecessors, (323), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-27 20:09:51,832 INFO L276 IsEmpty]: Start isEmpty. Operand 1731 states and 2296 transitions. [2024-11-27 20:09:51,837 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 352 [2024-11-27 20:09:51,837 INFO L210 NwaCegarLoop]: Found error trace [2024-11-27 20:09:51,837 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-27 20:09:51,863 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25b25d56-1da7-44e1-806b-92cb0bdd2bbb/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Ended with exit code 0 [2024-11-27 20:09:52,041 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable41,6 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25b25d56-1da7-44e1-806b-92cb0bdd2bbb/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-27 20:09:52,041 INFO L396 AbstractCegarLoop]: === Iteration 43 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-27 20:09:52,042 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-27 20:09:52,042 INFO L85 PathProgramCache]: Analyzing trace with hash 1364522509, now seen corresponding path program 1 times [2024-11-27 20:09:52,042 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-27 20:09:52,042 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1414819117] [2024-11-27 20:09:52,043 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-27 20:09:52,043 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-27 20:09:53,362 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-27 20:09:54,969 INFO L134 CoverageAnalysis]: Checked inductivity of 151 backedges. 44 proven. 0 refuted. 0 times theorem prover too weak. 107 trivial. 0 not checked. [2024-11-27 20:09:54,969 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-27 20:09:54,970 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1414819117] [2024-11-27 20:09:54,970 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1414819117] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-27 20:09:54,970 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-27 20:09:54,970 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2024-11-27 20:09:54,970 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1797339753] [2024-11-27 20:09:54,970 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-27 20:09:54,970 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 9 states [2024-11-27 20:09:54,970 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-27 20:09:54,971 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2024-11-27 20:09:54,971 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=52, Unknown=0, NotChecked=0, Total=72 [2024-11-27 20:09:54,972 INFO L87 Difference]: Start difference. First operand 1731 states and 2296 transitions. Second operand has 9 states, 9 states have (on average 31.11111111111111) internal successors, (280), 9 states have internal predecessors, (280), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) [2024-11-27 20:09:56,721 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-27 20:09:56,722 INFO L93 Difference]: Finished difference Result 4108 states and 5378 transitions. [2024-11-27 20:09:56,722 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2024-11-27 20:09:56,723 INFO L78 Accepts]: Start accepts. Automaton has has 9 states, 9 states have (on average 31.11111111111111) internal successors, (280), 9 states have internal predecessors, (280), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) Word has length 351 [2024-11-27 20:09:56,723 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-27 20:09:56,736 INFO L225 Difference]: With dead ends: 4108 [2024-11-27 20:09:56,736 INFO L226 Difference]: Without dead ends: 2976 [2024-11-27 20:09:56,738 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 20 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=61, Invalid=149, Unknown=0, NotChecked=0, Total=210 [2024-11-27 20:09:56,739 INFO L435 NwaCegarLoop]: 601 mSDtfsCounter, 849 mSDsluCounter, 2743 mSDsCounter, 0 mSdLazyCounter, 1576 mSolverCounterSat, 5 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 850 SdHoareTripleChecker+Valid, 3344 SdHoareTripleChecker+Invalid, 1581 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 5 IncrementalHoareTripleChecker+Valid, 1576 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.5s IncrementalHoareTripleChecker+Time [2024-11-27 20:09:56,741 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [850 Valid, 3344 Invalid, 1581 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [5 Valid, 1576 Invalid, 0 Unknown, 0 Unchecked, 1.5s Time] [2024-11-27 20:09:56,744 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2976 states. [2024-11-27 20:09:56,809 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2976 to 2023. [2024-11-27 20:09:56,812 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2023 states, 1989 states have (on average 1.3252890899949723) internal successors, (2636), 1989 states have internal predecessors, (2636), 32 states have call successors, (32), 1 states have call predecessors, (32), 1 states have return successors, (32), 32 states have call predecessors, (32), 32 states have call successors, (32) [2024-11-27 20:09:56,815 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2023 states to 2023 states and 2700 transitions. [2024-11-27 20:09:56,816 INFO L78 Accepts]: Start accepts. Automaton has 2023 states and 2700 transitions. Word has length 351 [2024-11-27 20:09:56,817 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-27 20:09:56,820 INFO L471 AbstractCegarLoop]: Abstraction has 2023 states and 2700 transitions. [2024-11-27 20:09:56,820 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 9 states, 9 states have (on average 31.11111111111111) internal successors, (280), 9 states have internal predecessors, (280), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) [2024-11-27 20:09:56,820 INFO L276 IsEmpty]: Start isEmpty. Operand 2023 states and 2700 transitions. [2024-11-27 20:09:56,825 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 352 [2024-11-27 20:09:56,825 INFO L210 NwaCegarLoop]: Found error trace [2024-11-27 20:09:56,825 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-27 20:09:56,825 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable42 [2024-11-27 20:09:56,826 INFO L396 AbstractCegarLoop]: === Iteration 44 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-27 20:09:56,826 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-27 20:09:56,826 INFO L85 PathProgramCache]: Analyzing trace with hash -1052605939, now seen corresponding path program 1 times [2024-11-27 20:09:56,826 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-27 20:09:56,826 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1943879595] [2024-11-27 20:09:56,826 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-27 20:09:56,827 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-27 20:09:58,981 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-27 20:10:00,864 INFO L134 CoverageAnalysis]: Checked inductivity of 151 backedges. 4 proven. 87 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-27 20:10:00,865 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-27 20:10:00,865 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1943879595] [2024-11-27 20:10:00,865 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1943879595] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-27 20:10:00,865 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [341136007] [2024-11-27 20:10:00,865 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-27 20:10:00,865 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-27 20:10:00,865 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25b25d56-1da7-44e1-806b-92cb0bdd2bbb/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-27 20:10:00,870 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25b25d56-1da7-44e1-806b-92cb0bdd2bbb/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-27 20:10:00,879 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25b25d56-1da7-44e1-806b-92cb0bdd2bbb/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2024-11-27 20:10:03,122 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-27 20:10:03,134 INFO L256 TraceCheckSpWp]: Trace formula consists of 2069 conjuncts, 42 conjuncts are in the unsatisfiable core [2024-11-27 20:10:03,146 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-27 20:10:04,267 INFO L134 CoverageAnalysis]: Checked inductivity of 151 backedges. 123 proven. 4 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2024-11-27 20:10:04,267 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-27 20:10:06,331 INFO L134 CoverageAnalysis]: Checked inductivity of 151 backedges. 87 proven. 4 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-27 20:10:06,331 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [341136007] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-27 20:10:06,331 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-27 20:10:06,331 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 8, 8] total 23 [2024-11-27 20:10:06,331 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1358715455] [2024-11-27 20:10:06,331 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-27 20:10:06,332 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 23 states [2024-11-27 20:10:06,332 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-27 20:10:06,334 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2024-11-27 20:10:06,334 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=64, Invalid=442, Unknown=0, NotChecked=0, Total=506 [2024-11-27 20:10:06,335 INFO L87 Difference]: Start difference. First operand 2023 states and 2700 transitions. Second operand has 23 states, 23 states have (on average 38.0) internal successors, (874), 23 states have internal predecessors, (874), 5 states have call successors, (18), 2 states have call predecessors, (18), 2 states have return successors, (18), 5 states have call predecessors, (18), 5 states have call successors, (18) [2024-11-27 20:10:08,439 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-27 20:10:08,439 INFO L93 Difference]: Finished difference Result 2709 states and 3619 transitions. [2024-11-27 20:10:08,440 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2024-11-27 20:10:08,440 INFO L78 Accepts]: Start accepts. Automaton has has 23 states, 23 states have (on average 38.0) internal successors, (874), 23 states have internal predecessors, (874), 5 states have call successors, (18), 2 states have call predecessors, (18), 2 states have return successors, (18), 5 states have call predecessors, (18), 5 states have call successors, (18) Word has length 351 [2024-11-27 20:10:08,440 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-27 20:10:08,444 INFO L225 Difference]: With dead ends: 2709 [2024-11-27 20:10:08,444 INFO L226 Difference]: Without dead ends: 2036 [2024-11-27 20:10:08,445 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 722 GetRequests, 690 SyntacticMatches, 0 SemanticMatches, 32 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 187 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=189, Invalid=933, Unknown=0, NotChecked=0, Total=1122 [2024-11-27 20:10:08,445 INFO L435 NwaCegarLoop]: 494 mSDtfsCounter, 842 mSDsluCounter, 5889 mSDsCounter, 0 mSdLazyCounter, 2829 mSolverCounterSat, 5 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 845 SdHoareTripleChecker+Valid, 6383 SdHoareTripleChecker+Invalid, 2834 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 5 IncrementalHoareTripleChecker+Valid, 2829 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.8s IncrementalHoareTripleChecker+Time [2024-11-27 20:10:08,446 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [845 Valid, 6383 Invalid, 2834 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [5 Valid, 2829 Invalid, 0 Unknown, 0 Unchecked, 1.8s Time] [2024-11-27 20:10:08,447 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2036 states. [2024-11-27 20:10:08,477 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2036 to 2028. [2024-11-27 20:10:08,480 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2028 states, 1994 states have (on average 1.324974924774323) internal successors, (2642), 1994 states have internal predecessors, (2642), 32 states have call successors, (32), 1 states have call predecessors, (32), 1 states have return successors, (32), 32 states have call predecessors, (32), 32 states have call successors, (32) [2024-11-27 20:10:08,483 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2028 states to 2028 states and 2706 transitions. [2024-11-27 20:10:08,483 INFO L78 Accepts]: Start accepts. Automaton has 2028 states and 2706 transitions. Word has length 351 [2024-11-27 20:10:08,484 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-27 20:10:08,484 INFO L471 AbstractCegarLoop]: Abstraction has 2028 states and 2706 transitions. [2024-11-27 20:10:08,484 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 23 states, 23 states have (on average 38.0) internal successors, (874), 23 states have internal predecessors, (874), 5 states have call successors, (18), 2 states have call predecessors, (18), 2 states have return successors, (18), 5 states have call predecessors, (18), 5 states have call successors, (18) [2024-11-27 20:10:08,484 INFO L276 IsEmpty]: Start isEmpty. Operand 2028 states and 2706 transitions. [2024-11-27 20:10:08,489 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 352 [2024-11-27 20:10:08,489 INFO L210 NwaCegarLoop]: Found error trace [2024-11-27 20:10:08,489 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-27 20:10:08,509 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25b25d56-1da7-44e1-806b-92cb0bdd2bbb/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Ended with exit code 0 [2024-11-27 20:10:08,690 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable43,7 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25b25d56-1da7-44e1-806b-92cb0bdd2bbb/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-27 20:10:08,690 INFO L396 AbstractCegarLoop]: === Iteration 45 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-27 20:10:08,691 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-27 20:10:08,691 INFO L85 PathProgramCache]: Analyzing trace with hash 619985329, now seen corresponding path program 1 times [2024-11-27 20:10:08,691 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-27 20:10:08,691 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [788825397] [2024-11-27 20:10:08,691 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-27 20:10:08,692 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-27 20:10:11,051 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-27 20:10:13,083 INFO L134 CoverageAnalysis]: Checked inductivity of 148 backedges. 38 proven. 0 refuted. 0 times theorem prover too weak. 110 trivial. 0 not checked. [2024-11-27 20:10:13,083 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-27 20:10:13,084 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [788825397] [2024-11-27 20:10:13,084 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [788825397] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-27 20:10:13,084 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-27 20:10:13,084 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2024-11-27 20:10:13,084 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1355985697] [2024-11-27 20:10:13,084 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-27 20:10:13,084 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 10 states [2024-11-27 20:10:13,085 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-27 20:10:13,085 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2024-11-27 20:10:13,085 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=69, Unknown=0, NotChecked=0, Total=90 [2024-11-27 20:10:13,086 INFO L87 Difference]: Start difference. First operand 2028 states and 2706 transitions. Second operand has 10 states, 10 states have (on average 27.9) internal successors, (279), 10 states have internal predecessors, (279), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) [2024-11-27 20:10:13,652 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-27 20:10:13,652 INFO L93 Difference]: Finished difference Result 3696 states and 4918 transitions. [2024-11-27 20:10:13,653 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2024-11-27 20:10:13,653 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 10 states have (on average 27.9) internal successors, (279), 10 states have internal predecessors, (279), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) Word has length 351 [2024-11-27 20:10:13,653 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-27 20:10:13,660 INFO L225 Difference]: With dead ends: 3696 [2024-11-27 20:10:13,660 INFO L226 Difference]: Without dead ends: 2618 [2024-11-27 20:10:13,663 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 19 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=56, Invalid=154, Unknown=0, NotChecked=0, Total=210 [2024-11-27 20:10:13,663 INFO L435 NwaCegarLoop]: 821 mSDtfsCounter, 1998 mSDsluCounter, 3957 mSDsCounter, 0 mSdLazyCounter, 332 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2003 SdHoareTripleChecker+Valid, 4778 SdHoareTripleChecker+Invalid, 336 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 332 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2024-11-27 20:10:13,664 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2003 Valid, 4778 Invalid, 336 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 332 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2024-11-27 20:10:13,666 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2618 states. [2024-11-27 20:10:13,730 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2618 to 2156. [2024-11-27 20:10:13,733 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2156 states, 2116 states have (on average 1.3232514177693762) internal successors, (2800), 2116 states have internal predecessors, (2800), 38 states have call successors, (38), 1 states have call predecessors, (38), 1 states have return successors, (38), 38 states have call predecessors, (38), 38 states have call successors, (38) [2024-11-27 20:10:13,736 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2156 states to 2156 states and 2876 transitions. [2024-11-27 20:10:13,737 INFO L78 Accepts]: Start accepts. Automaton has 2156 states and 2876 transitions. Word has length 351 [2024-11-27 20:10:13,737 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-27 20:10:13,737 INFO L471 AbstractCegarLoop]: Abstraction has 2156 states and 2876 transitions. [2024-11-27 20:10:13,738 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 10 states, 10 states have (on average 27.9) internal successors, (279), 10 states have internal predecessors, (279), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) [2024-11-27 20:10:13,738 INFO L276 IsEmpty]: Start isEmpty. Operand 2156 states and 2876 transitions. [2024-11-27 20:10:13,742 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 352 [2024-11-27 20:10:13,743 INFO L210 NwaCegarLoop]: Found error trace [2024-11-27 20:10:13,743 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-27 20:10:13,743 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable44 [2024-11-27 20:10:13,743 INFO L396 AbstractCegarLoop]: === Iteration 46 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-27 20:10:13,744 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-27 20:10:13,744 INFO L85 PathProgramCache]: Analyzing trace with hash -2088906927, now seen corresponding path program 1 times [2024-11-27 20:10:13,744 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-27 20:10:13,744 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1272973008] [2024-11-27 20:10:13,745 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-27 20:10:13,745 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-27 20:10:16,071 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-27 20:10:17,149 INFO L134 CoverageAnalysis]: Checked inductivity of 146 backedges. 83 proven. 3 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-27 20:10:17,149 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-27 20:10:17,149 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1272973008] [2024-11-27 20:10:17,149 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1272973008] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-27 20:10:17,149 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1973104799] [2024-11-27 20:10:17,150 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-27 20:10:17,150 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-27 20:10:17,150 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25b25d56-1da7-44e1-806b-92cb0bdd2bbb/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-27 20:10:17,152 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25b25d56-1da7-44e1-806b-92cb0bdd2bbb/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-27 20:10:17,154 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25b25d56-1da7-44e1-806b-92cb0bdd2bbb/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2024-11-27 20:10:18,992 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-27 20:10:19,003 INFO L256 TraceCheckSpWp]: Trace formula consists of 2067 conjuncts, 11 conjuncts are in the unsatisfiable core [2024-11-27 20:10:19,010 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-27 20:10:19,084 INFO L134 CoverageAnalysis]: Checked inductivity of 146 backedges. 55 proven. 0 refuted. 0 times theorem prover too weak. 91 trivial. 0 not checked. [2024-11-27 20:10:19,086 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-11-27 20:10:19,086 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1973104799] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-27 20:10:19,086 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-11-27 20:10:19,087 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [7] total 11 [2024-11-27 20:10:19,087 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [736393740] [2024-11-27 20:10:19,087 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-27 20:10:19,087 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-11-27 20:10:19,088 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-27 20:10:19,088 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-11-27 20:10:19,088 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=90, Unknown=0, NotChecked=0, Total=110 [2024-11-27 20:10:19,089 INFO L87 Difference]: Start difference. First operand 2156 states and 2876 transitions. Second operand has 6 states, 5 states have (on average 54.0) internal successors, (270), 6 states have internal predecessors, (270), 3 states have call successors, (5), 2 states have call predecessors, (5), 3 states have return successors, (5), 2 states have call predecessors, (5), 3 states have call successors, (5) [2024-11-27 20:10:19,200 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-27 20:10:19,201 INFO L93 Difference]: Finished difference Result 3835 states and 5104 transitions. [2024-11-27 20:10:19,201 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-27 20:10:19,202 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 5 states have (on average 54.0) internal successors, (270), 6 states have internal predecessors, (270), 3 states have call successors, (5), 2 states have call predecessors, (5), 3 states have return successors, (5), 2 states have call predecessors, (5), 3 states have call successors, (5) Word has length 351 [2024-11-27 20:10:19,202 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-27 20:10:19,207 INFO L225 Difference]: With dead ends: 3835 [2024-11-27 20:10:19,208 INFO L226 Difference]: Without dead ends: 2156 [2024-11-27 20:10:19,210 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 358 GetRequests, 349 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=20, Invalid=90, Unknown=0, NotChecked=0, Total=110 [2024-11-27 20:10:19,214 INFO L435 NwaCegarLoop]: 544 mSDtfsCounter, 0 mSDsluCounter, 2157 mSDsCounter, 0 mSdLazyCounter, 39 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 2701 SdHoareTripleChecker+Invalid, 39 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 39 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-27 20:10:19,215 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 2701 Invalid, 39 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 39 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-27 20:10:19,217 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2156 states. [2024-11-27 20:10:19,280 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2156 to 2156. [2024-11-27 20:10:19,283 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2156 states, 2116 states have (on average 1.3194706994328922) internal successors, (2792), 2116 states have internal predecessors, (2792), 38 states have call successors, (38), 1 states have call predecessors, (38), 1 states have return successors, (38), 38 states have call predecessors, (38), 38 states have call successors, (38) [2024-11-27 20:10:19,288 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2156 states to 2156 states and 2868 transitions. [2024-11-27 20:10:19,289 INFO L78 Accepts]: Start accepts. Automaton has 2156 states and 2868 transitions. Word has length 351 [2024-11-27 20:10:19,289 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-27 20:10:19,289 INFO L471 AbstractCegarLoop]: Abstraction has 2156 states and 2868 transitions. [2024-11-27 20:10:19,289 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 5 states have (on average 54.0) internal successors, (270), 6 states have internal predecessors, (270), 3 states have call successors, (5), 2 states have call predecessors, (5), 3 states have return successors, (5), 2 states have call predecessors, (5), 3 states have call successors, (5) [2024-11-27 20:10:19,290 INFO L276 IsEmpty]: Start isEmpty. Operand 2156 states and 2868 transitions. [2024-11-27 20:10:19,296 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 352 [2024-11-27 20:10:19,297 INFO L210 NwaCegarLoop]: Found error trace [2024-11-27 20:10:19,297 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-27 20:10:19,318 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25b25d56-1da7-44e1-806b-92cb0bdd2bbb/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Forceful destruction successful, exit code 0 [2024-11-27 20:10:19,498 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 8 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25b25d56-1da7-44e1-806b-92cb0bdd2bbb/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable45 [2024-11-27 20:10:19,498 INFO L396 AbstractCegarLoop]: === Iteration 47 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-27 20:10:19,499 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-27 20:10:19,499 INFO L85 PathProgramCache]: Analyzing trace with hash -2004305008, now seen corresponding path program 1 times [2024-11-27 20:10:19,499 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-27 20:10:19,499 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2105850482] [2024-11-27 20:10:19,499 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-27 20:10:19,499 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-27 20:10:20,443 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-27 20:10:21,014 INFO L134 CoverageAnalysis]: Checked inductivity of 148 backedges. 88 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-27 20:10:21,014 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-27 20:10:21,014 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2105850482] [2024-11-27 20:10:21,014 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2105850482] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-27 20:10:21,014 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-27 20:10:21,014 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-11-27 20:10:21,014 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1507193347] [2024-11-27 20:10:21,014 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-27 20:10:21,015 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-11-27 20:10:21,015 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-27 20:10:21,016 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-11-27 20:10:21,016 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2024-11-27 20:10:21,016 INFO L87 Difference]: Start difference. First operand 2156 states and 2868 transitions. Second operand has 6 states, 6 states have (on average 54.0) internal successors, (324), 6 states have internal predecessors, (324), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-27 20:10:21,908 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-27 20:10:21,909 INFO L93 Difference]: Finished difference Result 3488 states and 4647 transitions. [2024-11-27 20:10:21,909 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-27 20:10:21,909 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 54.0) internal successors, (324), 6 states have internal predecessors, (324), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 351 [2024-11-27 20:10:21,910 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-27 20:10:21,915 INFO L225 Difference]: With dead ends: 3488 [2024-11-27 20:10:21,915 INFO L226 Difference]: Without dead ends: 2808 [2024-11-27 20:10:21,916 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2024-11-27 20:10:21,917 INFO L435 NwaCegarLoop]: 689 mSDtfsCounter, 745 mSDsluCounter, 1758 mSDsCounter, 0 mSdLazyCounter, 989 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.7s Time, 0 mProtectedPredicate, 0 mProtectedAction, 748 SdHoareTripleChecker+Valid, 2447 SdHoareTripleChecker+Invalid, 990 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 989 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.8s IncrementalHoareTripleChecker+Time [2024-11-27 20:10:21,917 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [748 Valid, 2447 Invalid, 990 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 989 Invalid, 0 Unknown, 0 Unchecked, 0.8s Time] [2024-11-27 20:10:21,919 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2808 states. [2024-11-27 20:10:21,958 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2808 to 2230. [2024-11-27 20:10:21,960 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2230 states, 2188 states have (on average 1.320383912248629) internal successors, (2889), 2188 states have internal predecessors, (2889), 40 states have call successors, (40), 1 states have call predecessors, (40), 1 states have return successors, (40), 40 states have call predecessors, (40), 40 states have call successors, (40) [2024-11-27 20:10:21,962 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2230 states to 2230 states and 2969 transitions. [2024-11-27 20:10:21,963 INFO L78 Accepts]: Start accepts. Automaton has 2230 states and 2969 transitions. Word has length 351 [2024-11-27 20:10:21,963 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-27 20:10:21,963 INFO L471 AbstractCegarLoop]: Abstraction has 2230 states and 2969 transitions. [2024-11-27 20:10:21,964 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 54.0) internal successors, (324), 6 states have internal predecessors, (324), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-27 20:10:21,964 INFO L276 IsEmpty]: Start isEmpty. Operand 2230 states and 2969 transitions. [2024-11-27 20:10:21,967 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 352 [2024-11-27 20:10:21,967 INFO L210 NwaCegarLoop]: Found error trace [2024-11-27 20:10:21,967 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-27 20:10:21,968 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable46 [2024-11-27 20:10:21,968 INFO L396 AbstractCegarLoop]: === Iteration 48 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-27 20:10:21,968 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-27 20:10:21,968 INFO L85 PathProgramCache]: Analyzing trace with hash 1321779639, now seen corresponding path program 1 times [2024-11-27 20:10:21,968 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-27 20:10:21,968 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1672978728] [2024-11-27 20:10:21,969 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-27 20:10:21,969 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-27 20:10:23,151 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-27 20:10:25,729 INFO L134 CoverageAnalysis]: Checked inductivity of 148 backedges. 2 proven. 86 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-27 20:10:25,729 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-27 20:10:25,729 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1672978728] [2024-11-27 20:10:25,729 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1672978728] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-27 20:10:25,729 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1173106712] [2024-11-27 20:10:25,729 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-27 20:10:25,729 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-27 20:10:25,729 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25b25d56-1da7-44e1-806b-92cb0bdd2bbb/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-27 20:10:25,731 INFO L229 MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25b25d56-1da7-44e1-806b-92cb0bdd2bbb/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-27 20:10:25,733 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25b25d56-1da7-44e1-806b-92cb0bdd2bbb/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2024-11-27 20:10:27,691 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-27 20:10:27,700 INFO L256 TraceCheckSpWp]: Trace formula consists of 2067 conjuncts, 11 conjuncts are in the unsatisfiable core [2024-11-27 20:10:27,705 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-27 20:10:27,800 INFO L134 CoverageAnalysis]: Checked inductivity of 148 backedges. 123 proven. 0 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-11-27 20:10:27,800 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-11-27 20:10:27,800 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1173106712] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-27 20:10:27,800 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-11-27 20:10:27,800 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [13] total 17 [2024-11-27 20:10:27,800 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1233102831] [2024-11-27 20:10:27,800 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-27 20:10:27,801 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-11-27 20:10:27,801 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-27 20:10:27,802 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-11-27 20:10:27,802 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=36, Invalid=236, Unknown=0, NotChecked=0, Total=272 [2024-11-27 20:10:27,802 INFO L87 Difference]: Start difference. First operand 2230 states and 2969 transitions. Second operand has 6 states, 5 states have (on average 65.2) internal successors, (326), 6 states have internal predecessors, (326), 3 states have call successors, (6), 2 states have call predecessors, (6), 3 states have return successors, (6), 2 states have call predecessors, (6), 3 states have call successors, (6) [2024-11-27 20:10:27,912 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-27 20:10:27,912 INFO L93 Difference]: Finished difference Result 4179 states and 5541 transitions. [2024-11-27 20:10:27,913 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-27 20:10:27,913 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 5 states have (on average 65.2) internal successors, (326), 6 states have internal predecessors, (326), 3 states have call successors, (6), 2 states have call predecessors, (6), 3 states have return successors, (6), 2 states have call predecessors, (6), 3 states have call successors, (6) Word has length 351 [2024-11-27 20:10:27,918 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-27 20:10:27,924 INFO L225 Difference]: With dead ends: 4179 [2024-11-27 20:10:27,924 INFO L226 Difference]: Without dead ends: 2230 [2024-11-27 20:10:27,927 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 366 GetRequests, 349 SyntacticMatches, 2 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 43 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=36, Invalid=236, Unknown=0, NotChecked=0, Total=272 [2024-11-27 20:10:27,928 INFO L435 NwaCegarLoop]: 543 mSDtfsCounter, 0 mSDsluCounter, 2153 mSDsCounter, 0 mSdLazyCounter, 39 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 2696 SdHoareTripleChecker+Invalid, 39 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 39 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-27 20:10:27,928 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 2696 Invalid, 39 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 39 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-27 20:10:27,930 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2230 states. [2024-11-27 20:10:27,981 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2230 to 2230. [2024-11-27 20:10:27,983 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2230 states, 2188 states have (on average 1.3158135283363803) internal successors, (2879), 2188 states have internal predecessors, (2879), 40 states have call successors, (40), 1 states have call predecessors, (40), 1 states have return successors, (40), 40 states have call predecessors, (40), 40 states have call successors, (40) [2024-11-27 20:10:27,987 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2230 states to 2230 states and 2959 transitions. [2024-11-27 20:10:27,988 INFO L78 Accepts]: Start accepts. Automaton has 2230 states and 2959 transitions. Word has length 351 [2024-11-27 20:10:27,988 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-27 20:10:27,989 INFO L471 AbstractCegarLoop]: Abstraction has 2230 states and 2959 transitions. [2024-11-27 20:10:27,989 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 5 states have (on average 65.2) internal successors, (326), 6 states have internal predecessors, (326), 3 states have call successors, (6), 2 states have call predecessors, (6), 3 states have return successors, (6), 2 states have call predecessors, (6), 3 states have call successors, (6) [2024-11-27 20:10:27,989 INFO L276 IsEmpty]: Start isEmpty. Operand 2230 states and 2959 transitions. [2024-11-27 20:10:27,994 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 353 [2024-11-27 20:10:27,994 INFO L210 NwaCegarLoop]: Found error trace [2024-11-27 20:10:27,994 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-27 20:10:28,016 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25b25d56-1da7-44e1-806b-92cb0bdd2bbb/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Ended with exit code 0 [2024-11-27 20:10:28,195 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 9 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25b25d56-1da7-44e1-806b-92cb0bdd2bbb/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable47 [2024-11-27 20:10:28,195 INFO L396 AbstractCegarLoop]: === Iteration 49 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-27 20:10:28,196 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-27 20:10:28,196 INFO L85 PathProgramCache]: Analyzing trace with hash -1202829906, now seen corresponding path program 1 times [2024-11-27 20:10:28,196 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-27 20:10:28,196 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1600377120] [2024-11-27 20:10:28,196 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-27 20:10:28,197 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-27 20:10:29,333 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-27 20:10:31,384 INFO L134 CoverageAnalysis]: Checked inductivity of 149 backedges. 89 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-27 20:10:31,384 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-27 20:10:31,384 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1600377120] [2024-11-27 20:10:31,384 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1600377120] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-27 20:10:31,384 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-27 20:10:31,384 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2024-11-27 20:10:31,384 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1660168650] [2024-11-27 20:10:31,384 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-27 20:10:31,385 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 12 states [2024-11-27 20:10:31,385 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-27 20:10:31,385 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2024-11-27 20:10:31,386 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=107, Unknown=0, NotChecked=0, Total=132 [2024-11-27 20:10:31,386 INFO L87 Difference]: Start difference. First operand 2230 states and 2959 transitions. Second operand has 12 states, 12 states have (on average 27.083333333333332) internal successors, (325), 12 states have internal predecessors, (325), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) [2024-11-27 20:10:32,304 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-27 20:10:32,304 INFO L93 Difference]: Finished difference Result 6690 states and 8854 transitions. [2024-11-27 20:10:32,305 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2024-11-27 20:10:32,305 INFO L78 Accepts]: Start accepts. Automaton has has 12 states, 12 states have (on average 27.083333333333332) internal successors, (325), 12 states have internal predecessors, (325), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) Word has length 352 [2024-11-27 20:10:32,305 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-27 20:10:32,318 INFO L225 Difference]: With dead ends: 6690 [2024-11-27 20:10:32,318 INFO L226 Difference]: Without dead ends: 5894 [2024-11-27 20:10:32,321 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 30 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=82, Invalid=260, Unknown=0, NotChecked=0, Total=342 [2024-11-27 20:10:32,322 INFO L435 NwaCegarLoop]: 862 mSDtfsCounter, 2308 mSDsluCounter, 5752 mSDsCounter, 0 mSdLazyCounter, 648 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2313 SdHoareTripleChecker+Valid, 6614 SdHoareTripleChecker+Invalid, 652 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 648 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2024-11-27 20:10:32,322 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2313 Valid, 6614 Invalid, 652 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 648 Invalid, 0 Unknown, 0 Unchecked, 0.6s Time] [2024-11-27 20:10:32,326 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5894 states. [2024-11-27 20:10:32,430 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5894 to 3890. [2024-11-27 20:10:32,434 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3890 states, 3808 states have (on average 1.300420168067227) internal successors, (4952), 3808 states have internal predecessors, (4952), 80 states have call successors, (80), 1 states have call predecessors, (80), 1 states have return successors, (80), 80 states have call predecessors, (80), 80 states have call successors, (80) [2024-11-27 20:10:32,440 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3890 states to 3890 states and 5112 transitions. [2024-11-27 20:10:32,441 INFO L78 Accepts]: Start accepts. Automaton has 3890 states and 5112 transitions. Word has length 352 [2024-11-27 20:10:32,441 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-27 20:10:32,441 INFO L471 AbstractCegarLoop]: Abstraction has 3890 states and 5112 transitions. [2024-11-27 20:10:32,442 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 12 states, 12 states have (on average 27.083333333333332) internal successors, (325), 12 states have internal predecessors, (325), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) [2024-11-27 20:10:32,442 INFO L276 IsEmpty]: Start isEmpty. Operand 3890 states and 5112 transitions. [2024-11-27 20:10:32,448 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 354 [2024-11-27 20:10:32,448 INFO L210 NwaCegarLoop]: Found error trace [2024-11-27 20:10:32,448 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-27 20:10:32,448 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable48 [2024-11-27 20:10:32,449 INFO L396 AbstractCegarLoop]: === Iteration 50 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-27 20:10:32,449 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-27 20:10:32,449 INFO L85 PathProgramCache]: Analyzing trace with hash -453824989, now seen corresponding path program 1 times [2024-11-27 20:10:32,449 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-27 20:10:32,449 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [726792640] [2024-11-27 20:10:32,450 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-27 20:10:32,450 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-27 20:10:33,986 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-27 20:10:34,754 INFO L134 CoverageAnalysis]: Checked inductivity of 148 backedges. 81 proven. 4 refuted. 0 times theorem prover too weak. 63 trivial. 0 not checked. [2024-11-27 20:10:34,754 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-27 20:10:34,754 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [726792640] [2024-11-27 20:10:34,755 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [726792640] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-27 20:10:34,755 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [633838199] [2024-11-27 20:10:34,755 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-27 20:10:34,755 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-27 20:10:34,755 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25b25d56-1da7-44e1-806b-92cb0bdd2bbb/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-27 20:10:34,756 INFO L229 MonitoredProcess]: Starting monitored process 10 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25b25d56-1da7-44e1-806b-92cb0bdd2bbb/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-27 20:10:34,758 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25b25d56-1da7-44e1-806b-92cb0bdd2bbb/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process [2024-11-27 20:10:36,845 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-27 20:10:36,855 INFO L256 TraceCheckSpWp]: Trace formula consists of 2073 conjuncts, 11 conjuncts are in the unsatisfiable core [2024-11-27 20:10:36,860 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-27 20:10:36,916 INFO L134 CoverageAnalysis]: Checked inductivity of 148 backedges. 74 proven. 0 refuted. 0 times theorem prover too weak. 74 trivial. 0 not checked. [2024-11-27 20:10:36,916 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-11-27 20:10:36,916 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [633838199] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-27 20:10:36,917 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-11-27 20:10:36,917 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [6] total 10 [2024-11-27 20:10:36,917 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1937759368] [2024-11-27 20:10:36,917 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-27 20:10:36,918 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-11-27 20:10:36,918 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-27 20:10:36,918 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-11-27 20:10:36,919 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=73, Unknown=0, NotChecked=0, Total=90 [2024-11-27 20:10:36,919 INFO L87 Difference]: Start difference. First operand 3890 states and 5112 transitions. Second operand has 6 states, 5 states have (on average 56.2) internal successors, (281), 6 states have internal predecessors, (281), 3 states have call successors, (6), 2 states have call predecessors, (6), 3 states have return successors, (6), 2 states have call predecessors, (6), 3 states have call successors, (6) [2024-11-27 20:10:37,050 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-27 20:10:37,050 INFO L93 Difference]: Finished difference Result 6677 states and 8783 transitions. [2024-11-27 20:10:37,050 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-27 20:10:37,051 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 5 states have (on average 56.2) internal successors, (281), 6 states have internal predecessors, (281), 3 states have call successors, (6), 2 states have call predecessors, (6), 3 states have return successors, (6), 2 states have call predecessors, (6), 3 states have call successors, (6) Word has length 353 [2024-11-27 20:10:37,051 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-27 20:10:37,059 INFO L225 Difference]: With dead ends: 6677 [2024-11-27 20:10:37,059 INFO L226 Difference]: Without dead ends: 3890 [2024-11-27 20:10:37,063 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 360 GetRequests, 352 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=17, Invalid=73, Unknown=0, NotChecked=0, Total=90 [2024-11-27 20:10:37,063 INFO L435 NwaCegarLoop]: 542 mSDtfsCounter, 0 mSDsluCounter, 2149 mSDsCounter, 0 mSdLazyCounter, 39 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 2691 SdHoareTripleChecker+Invalid, 39 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 39 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-27 20:10:37,064 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 2691 Invalid, 39 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 39 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-27 20:10:37,066 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3890 states. [2024-11-27 20:10:37,163 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3890 to 3890. [2024-11-27 20:10:37,167 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3890 states, 3808 states have (on average 1.2899159663865547) internal successors, (4912), 3808 states have internal predecessors, (4912), 80 states have call successors, (80), 1 states have call predecessors, (80), 1 states have return successors, (80), 80 states have call predecessors, (80), 80 states have call successors, (80) [2024-11-27 20:10:37,172 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3890 states to 3890 states and 5072 transitions. [2024-11-27 20:10:37,173 INFO L78 Accepts]: Start accepts. Automaton has 3890 states and 5072 transitions. Word has length 353 [2024-11-27 20:10:37,174 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-27 20:10:37,174 INFO L471 AbstractCegarLoop]: Abstraction has 3890 states and 5072 transitions. [2024-11-27 20:10:37,174 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 5 states have (on average 56.2) internal successors, (281), 6 states have internal predecessors, (281), 3 states have call successors, (6), 2 states have call predecessors, (6), 3 states have return successors, (6), 2 states have call predecessors, (6), 3 states have call successors, (6) [2024-11-27 20:10:37,174 INFO L276 IsEmpty]: Start isEmpty. Operand 3890 states and 5072 transitions. [2024-11-27 20:10:37,180 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 356 [2024-11-27 20:10:37,181 INFO L210 NwaCegarLoop]: Found error trace [2024-11-27 20:10:37,181 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-27 20:10:37,201 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25b25d56-1da7-44e1-806b-92cb0bdd2bbb/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Ended with exit code 0 [2024-11-27 20:10:37,381 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable49,10 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25b25d56-1da7-44e1-806b-92cb0bdd2bbb/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-27 20:10:37,382 INFO L396 AbstractCegarLoop]: === Iteration 51 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-27 20:10:37,382 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-27 20:10:37,382 INFO L85 PathProgramCache]: Analyzing trace with hash 1011656559, now seen corresponding path program 1 times [2024-11-27 20:10:37,382 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-27 20:10:37,382 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [364481199] [2024-11-27 20:10:37,383 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-27 20:10:37,383 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-27 20:10:38,783 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-27 20:10:40,593 INFO L134 CoverageAnalysis]: Checked inductivity of 149 backedges. 89 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-27 20:10:40,593 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-27 20:10:40,593 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [364481199] [2024-11-27 20:10:40,593 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [364481199] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-27 20:10:40,593 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-27 20:10:40,593 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [14] imperfect sequences [] total 14 [2024-11-27 20:10:40,593 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1116701200] [2024-11-27 20:10:40,593 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-27 20:10:40,594 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 14 states [2024-11-27 20:10:40,594 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-27 20:10:40,594 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2024-11-27 20:10:40,595 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=33, Invalid=149, Unknown=0, NotChecked=0, Total=182 [2024-11-27 20:10:40,595 INFO L87 Difference]: Start difference. First operand 3890 states and 5072 transitions. Second operand has 14 states, 14 states have (on average 23.428571428571427) internal successors, (328), 14 states have internal predecessors, (328), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) [2024-11-27 20:10:43,037 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-27 20:10:43,037 INFO L93 Difference]: Finished difference Result 10103 states and 13021 transitions. [2024-11-27 20:10:43,038 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2024-11-27 20:10:43,038 INFO L78 Accepts]: Start accepts. Automaton has has 14 states, 14 states have (on average 23.428571428571427) internal successors, (328), 14 states have internal predecessors, (328), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) Word has length 355 [2024-11-27 20:10:43,038 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-27 20:10:43,051 INFO L225 Difference]: With dead ends: 10103 [2024-11-27 20:10:43,051 INFO L226 Difference]: Without dead ends: 8835 [2024-11-27 20:10:43,056 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 42 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=92, Invalid=328, Unknown=0, NotChecked=0, Total=420 [2024-11-27 20:10:43,056 INFO L435 NwaCegarLoop]: 579 mSDtfsCounter, 2359 mSDsluCounter, 5174 mSDsCounter, 0 mSdLazyCounter, 3161 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.8s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2363 SdHoareTripleChecker+Valid, 5753 SdHoareTripleChecker+Invalid, 3165 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 3161 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 2.1s IncrementalHoareTripleChecker+Time [2024-11-27 20:10:43,056 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2363 Valid, 5753 Invalid, 3165 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 3161 Invalid, 0 Unknown, 0 Unchecked, 2.1s Time] [2024-11-27 20:10:43,062 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8835 states. [2024-11-27 20:10:43,252 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8835 to 5008. [2024-11-27 20:10:43,256 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5008 states, 4910 states have (on average 1.285743380855397) internal successors, (6313), 4910 states have internal predecessors, (6313), 96 states have call successors, (96), 1 states have call predecessors, (96), 1 states have return successors, (96), 96 states have call predecessors, (96), 96 states have call successors, (96) [2024-11-27 20:10:43,267 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5008 states to 5008 states and 6505 transitions. [2024-11-27 20:10:43,268 INFO L78 Accepts]: Start accepts. Automaton has 5008 states and 6505 transitions. Word has length 355 [2024-11-27 20:10:43,269 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-27 20:10:43,269 INFO L471 AbstractCegarLoop]: Abstraction has 5008 states and 6505 transitions. [2024-11-27 20:10:43,269 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 14 states, 14 states have (on average 23.428571428571427) internal successors, (328), 14 states have internal predecessors, (328), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) [2024-11-27 20:10:43,269 INFO L276 IsEmpty]: Start isEmpty. Operand 5008 states and 6505 transitions. [2024-11-27 20:10:43,281 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 356 [2024-11-27 20:10:43,281 INFO L210 NwaCegarLoop]: Found error trace [2024-11-27 20:10:43,282 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-27 20:10:43,282 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable50 [2024-11-27 20:10:43,282 INFO L396 AbstractCegarLoop]: === Iteration 52 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-27 20:10:43,283 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-27 20:10:43,283 INFO L85 PathProgramCache]: Analyzing trace with hash 591247886, now seen corresponding path program 1 times [2024-11-27 20:10:43,283 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-27 20:10:43,283 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [650851383] [2024-11-27 20:10:43,283 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-27 20:10:43,283 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-27 20:10:45,047 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-27 20:10:45,847 INFO L134 CoverageAnalysis]: Checked inductivity of 147 backedges. 80 proven. 4 refuted. 0 times theorem prover too weak. 63 trivial. 0 not checked. [2024-11-27 20:10:45,847 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-27 20:10:45,847 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [650851383] [2024-11-27 20:10:45,847 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [650851383] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-27 20:10:45,847 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1663869632] [2024-11-27 20:10:45,847 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-27 20:10:45,847 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-27 20:10:45,847 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25b25d56-1da7-44e1-806b-92cb0bdd2bbb/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-27 20:10:45,850 INFO L229 MonitoredProcess]: Starting monitored process 11 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25b25d56-1da7-44e1-806b-92cb0bdd2bbb/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-27 20:10:45,852 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25b25d56-1da7-44e1-806b-92cb0bdd2bbb/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Waiting until timeout for monitored process [2024-11-27 20:10:48,421 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-27 20:10:48,432 INFO L256 TraceCheckSpWp]: Trace formula consists of 2079 conjuncts, 45 conjuncts are in the unsatisfiable core [2024-11-27 20:10:48,440 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-27 20:10:49,415 INFO L134 CoverageAnalysis]: Checked inductivity of 147 backedges. 116 proven. 4 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2024-11-27 20:10:49,417 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-27 20:10:51,659 INFO L134 CoverageAnalysis]: Checked inductivity of 147 backedges. 83 proven. 4 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-27 20:10:51,660 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1663869632] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-27 20:10:51,660 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-27 20:10:51,660 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 9, 11] total 21 [2024-11-27 20:10:51,660 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [936874663] [2024-11-27 20:10:51,660 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-27 20:10:51,661 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 21 states [2024-11-27 20:10:51,661 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-27 20:10:51,662 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2024-11-27 20:10:51,662 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=91, Invalid=329, Unknown=0, NotChecked=0, Total=420 [2024-11-27 20:10:51,662 INFO L87 Difference]: Start difference. First operand 5008 states and 6505 transitions. Second operand has 21 states, 21 states have (on average 27.714285714285715) internal successors, (582), 21 states have internal predecessors, (582), 4 states have call successors, (12), 2 states have call predecessors, (12), 2 states have return successors, (12), 4 states have call predecessors, (12), 4 states have call successors, (12) [2024-11-27 20:10:52,870 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-27 20:10:52,870 INFO L93 Difference]: Finished difference Result 9643 states and 12511 transitions. [2024-11-27 20:10:52,870 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2024-11-27 20:10:52,870 INFO L78 Accepts]: Start accepts. Automaton has has 21 states, 21 states have (on average 27.714285714285715) internal successors, (582), 21 states have internal predecessors, (582), 4 states have call successors, (12), 2 states have call predecessors, (12), 2 states have return successors, (12), 4 states have call predecessors, (12), 4 states have call successors, (12) Word has length 355 [2024-11-27 20:10:52,871 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-27 20:10:52,877 INFO L225 Difference]: With dead ends: 9643 [2024-11-27 20:10:52,877 INFO L226 Difference]: Without dead ends: 5008 [2024-11-27 20:10:52,882 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 720 GetRequests, 697 SyntacticMatches, 0 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 125 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=139, Invalid=461, Unknown=0, NotChecked=0, Total=600 [2024-11-27 20:10:52,883 INFO L435 NwaCegarLoop]: 378 mSDtfsCounter, 605 mSDsluCounter, 3739 mSDsCounter, 0 mSdLazyCounter, 1837 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.9s Time, 0 mProtectedPredicate, 0 mProtectedAction, 605 SdHoareTripleChecker+Valid, 4117 SdHoareTripleChecker+Invalid, 1838 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 1837 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.0s IncrementalHoareTripleChecker+Time [2024-11-27 20:10:52,884 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [605 Valid, 4117 Invalid, 1838 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 1837 Invalid, 0 Unknown, 0 Unchecked, 1.0s Time] [2024-11-27 20:10:52,887 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5008 states. [2024-11-27 20:10:53,003 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5008 to 4954. [2024-11-27 20:10:53,007 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4954 states, 4856 states have (on average 1.2848023064250411) internal successors, (6239), 4856 states have internal predecessors, (6239), 96 states have call successors, (96), 1 states have call predecessors, (96), 1 states have return successors, (96), 96 states have call predecessors, (96), 96 states have call successors, (96) [2024-11-27 20:10:53,014 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4954 states to 4954 states and 6431 transitions. [2024-11-27 20:10:53,015 INFO L78 Accepts]: Start accepts. Automaton has 4954 states and 6431 transitions. Word has length 355 [2024-11-27 20:10:53,016 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-27 20:10:53,016 INFO L471 AbstractCegarLoop]: Abstraction has 4954 states and 6431 transitions. [2024-11-27 20:10:53,016 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 21 states, 21 states have (on average 27.714285714285715) internal successors, (582), 21 states have internal predecessors, (582), 4 states have call successors, (12), 2 states have call predecessors, (12), 2 states have return successors, (12), 4 states have call predecessors, (12), 4 states have call successors, (12) [2024-11-27 20:10:53,016 INFO L276 IsEmpty]: Start isEmpty. Operand 4954 states and 6431 transitions. [2024-11-27 20:10:53,023 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 356 [2024-11-27 20:10:53,023 INFO L210 NwaCegarLoop]: Found error trace [2024-11-27 20:10:53,024 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-27 20:10:53,044 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25b25d56-1da7-44e1-806b-92cb0bdd2bbb/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Ended with exit code 0 [2024-11-27 20:10:53,224 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable51,11 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25b25d56-1da7-44e1-806b-92cb0bdd2bbb/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-27 20:10:53,225 INFO L396 AbstractCegarLoop]: === Iteration 53 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-27 20:10:53,225 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-27 20:10:53,225 INFO L85 PathProgramCache]: Analyzing trace with hash -1535399658, now seen corresponding path program 1 times [2024-11-27 20:10:53,226 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-27 20:10:53,226 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1854456110] [2024-11-27 20:10:53,226 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-27 20:10:53,227 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-27 20:10:55,266 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-27 20:10:59,228 INFO L134 CoverageAnalysis]: Checked inductivity of 148 backedges. 50 proven. 38 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-27 20:10:59,228 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-27 20:10:59,228 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1854456110] [2024-11-27 20:10:59,228 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1854456110] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-27 20:10:59,228 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [467933982] [2024-11-27 20:10:59,228 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-27 20:10:59,229 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-27 20:10:59,229 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25b25d56-1da7-44e1-806b-92cb0bdd2bbb/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-27 20:10:59,234 INFO L229 MonitoredProcess]: Starting monitored process 12 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25b25d56-1da7-44e1-806b-92cb0bdd2bbb/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-27 20:10:59,235 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25b25d56-1da7-44e1-806b-92cb0bdd2bbb/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Waiting until timeout for monitored process [2024-11-27 20:11:01,929 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-27 20:11:01,942 INFO L256 TraceCheckSpWp]: Trace formula consists of 2079 conjuncts, 217 conjuncts are in the unsatisfiable core [2024-11-27 20:11:01,957 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-27 20:11:05,384 INFO L134 CoverageAnalysis]: Checked inductivity of 148 backedges. 50 proven. 38 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-27 20:11:05,385 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-27 20:11:13,917 INFO L134 CoverageAnalysis]: Checked inductivity of 148 backedges. 50 proven. 38 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-27 20:11:13,917 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [467933982] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-27 20:11:13,917 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-27 20:11:13,918 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 37, 31] total 79 [2024-11-27 20:11:13,918 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [22384763] [2024-11-27 20:11:13,918 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-27 20:11:13,919 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 79 states [2024-11-27 20:11:13,919 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-27 20:11:13,920 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 79 interpolants. [2024-11-27 20:11:13,921 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=787, Invalid=5375, Unknown=0, NotChecked=0, Total=6162 [2024-11-27 20:11:13,922 INFO L87 Difference]: Start difference. First operand 4954 states and 6431 transitions. Second operand has 79 states, 79 states have (on average 10.91139240506329) internal successors, (862), 79 states have internal predecessors, (862), 10 states have call successors, (18), 1 states have call predecessors, (18), 1 states have return successors, (18), 10 states have call predecessors, (18), 10 states have call successors, (18) [2024-11-27 20:12:04,652 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-27 20:12:04,652 INFO L93 Difference]: Finished difference Result 65405 states and 84997 transitions. [2024-11-27 20:12:04,652 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 382 states. [2024-11-27 20:12:04,652 INFO L78 Accepts]: Start accepts. Automaton has has 79 states, 79 states have (on average 10.91139240506329) internal successors, (862), 79 states have internal predecessors, (862), 10 states have call successors, (18), 1 states have call predecessors, (18), 1 states have return successors, (18), 10 states have call predecessors, (18), 10 states have call successors, (18) Word has length 355 [2024-11-27 20:12:04,653 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-27 20:12:04,695 INFO L225 Difference]: With dead ends: 65405 [2024-11-27 20:12:04,695 INFO L226 Difference]: Without dead ends: 62220 [2024-11-27 20:12:04,719 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 1090 GetRequests, 647 SyntacticMatches, 2 SemanticMatches, 441 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 75527 ImplicationChecksByTransitivity, 26.3s TimeCoverageRelationStatistics Valid=22820, Invalid=172986, Unknown=0, NotChecked=0, Total=195806 [2024-11-27 20:12:04,720 INFO L435 NwaCegarLoop]: 1069 mSDtfsCounter, 29243 mSDsluCounter, 39910 mSDsCounter, 0 mSdLazyCounter, 29227 mSolverCounterSat, 200 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 18.7s Time, 0 mProtectedPredicate, 0 mProtectedAction, 29249 SdHoareTripleChecker+Valid, 40979 SdHoareTripleChecker+Invalid, 29427 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.2s SdHoareTripleChecker+Time, 200 IncrementalHoareTripleChecker+Valid, 29227 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 21.6s IncrementalHoareTripleChecker+Time [2024-11-27 20:12:04,720 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [29249 Valid, 40979 Invalid, 29427 Unknown, 0 Unchecked, 0.2s Time], IncrementalHoareTripleChecker [200 Valid, 29227 Invalid, 0 Unknown, 0 Unchecked, 21.6s Time] [2024-11-27 20:12:04,758 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 62220 states. [2024-11-27 20:12:05,471 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 62220 to 12493. [2024-11-27 20:12:05,482 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 12493 states, 12243 states have (on average 1.2813852813852813) internal successors, (15688), 12243 states have internal predecessors, (15688), 248 states have call successors, (248), 1 states have call predecessors, (248), 1 states have return successors, (248), 248 states have call predecessors, (248), 248 states have call successors, (248) [2024-11-27 20:12:05,501 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12493 states to 12493 states and 16184 transitions. [2024-11-27 20:12:05,503 INFO L78 Accepts]: Start accepts. Automaton has 12493 states and 16184 transitions. Word has length 355 [2024-11-27 20:12:05,504 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-27 20:12:05,504 INFO L471 AbstractCegarLoop]: Abstraction has 12493 states and 16184 transitions. [2024-11-27 20:12:05,504 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 79 states, 79 states have (on average 10.91139240506329) internal successors, (862), 79 states have internal predecessors, (862), 10 states have call successors, (18), 1 states have call predecessors, (18), 1 states have return successors, (18), 10 states have call predecessors, (18), 10 states have call successors, (18) [2024-11-27 20:12:05,504 INFO L276 IsEmpty]: Start isEmpty. Operand 12493 states and 16184 transitions. [2024-11-27 20:12:05,523 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 357 [2024-11-27 20:12:05,523 INFO L210 NwaCegarLoop]: Found error trace [2024-11-27 20:12:05,523 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-27 20:12:05,545 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25b25d56-1da7-44e1-806b-92cb0bdd2bbb/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Ended with exit code 0 [2024-11-27 20:12:05,724 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable52,12 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25b25d56-1da7-44e1-806b-92cb0bdd2bbb/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-27 20:12:05,724 INFO L396 AbstractCegarLoop]: === Iteration 54 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-27 20:12:05,724 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-27 20:12:05,724 INFO L85 PathProgramCache]: Analyzing trace with hash -132418615, now seen corresponding path program 1 times [2024-11-27 20:12:05,725 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-27 20:12:05,725 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2027210312] [2024-11-27 20:12:05,725 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-27 20:12:05,725 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-27 20:12:07,692 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-27 20:12:10,129 INFO L134 CoverageAnalysis]: Checked inductivity of 148 backedges. 54 proven. 34 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-27 20:12:10,129 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-27 20:12:10,129 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2027210312] [2024-11-27 20:12:10,129 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2027210312] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-27 20:12:10,129 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [242642801] [2024-11-27 20:12:10,129 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-27 20:12:10,129 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-27 20:12:10,130 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25b25d56-1da7-44e1-806b-92cb0bdd2bbb/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-27 20:12:10,132 INFO L229 MonitoredProcess]: Starting monitored process 13 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25b25d56-1da7-44e1-806b-92cb0bdd2bbb/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-27 20:12:10,133 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25b25d56-1da7-44e1-806b-92cb0bdd2bbb/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Waiting until timeout for monitored process [2024-11-27 20:12:12,705 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-27 20:12:12,716 INFO L256 TraceCheckSpWp]: Trace formula consists of 2082 conjuncts, 166 conjuncts are in the unsatisfiable core [2024-11-27 20:12:12,727 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-27 20:12:17,075 INFO L134 CoverageAnalysis]: Checked inductivity of 148 backedges. 50 proven. 38 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-27 20:12:17,075 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-27 20:12:25,053 INFO L134 CoverageAnalysis]: Checked inductivity of 148 backedges. 46 proven. 42 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-27 20:12:25,053 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [242642801] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-27 20:12:25,054 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-27 20:12:25,054 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 32, 29] total 70 [2024-11-27 20:12:25,054 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1219410858] [2024-11-27 20:12:25,054 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-27 20:12:25,054 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 70 states [2024-11-27 20:12:25,055 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-27 20:12:25,056 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 70 interpolants. [2024-11-27 20:12:25,056 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=644, Invalid=4186, Unknown=0, NotChecked=0, Total=4830 [2024-11-27 20:12:25,056 INFO L87 Difference]: Start difference. First operand 12493 states and 16184 transitions. Second operand has 70 states, 70 states have (on average 12.485714285714286) internal successors, (874), 70 states have internal predecessors, (874), 13 states have call successors, (18), 1 states have call predecessors, (18), 1 states have return successors, (18), 13 states have call predecessors, (18), 13 states have call successors, (18) [2024-11-27 20:13:02,779 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-27 20:13:02,779 INFO L93 Difference]: Finished difference Result 88765 states and 114940 transitions. [2024-11-27 20:13:02,779 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 213 states. [2024-11-27 20:13:02,779 INFO L78 Accepts]: Start accepts. Automaton has has 70 states, 70 states have (on average 12.485714285714286) internal successors, (874), 70 states have internal predecessors, (874), 13 states have call successors, (18), 1 states have call predecessors, (18), 1 states have return successors, (18), 13 states have call predecessors, (18), 13 states have call successors, (18) Word has length 356 [2024-11-27 20:13:02,780 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-27 20:13:02,866 INFO L225 Difference]: With dead ends: 88765 [2024-11-27 20:13:02,866 INFO L226 Difference]: Without dead ends: 80197 [2024-11-27 20:13:02,884 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 923 GetRequests, 656 SyntacticMatches, 0 SemanticMatches, 267 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 24925 ImplicationChecksByTransitivity, 13.1s TimeCoverageRelationStatistics Valid=8794, Invalid=63298, Unknown=0, NotChecked=0, Total=72092 [2024-11-27 20:13:02,885 INFO L435 NwaCegarLoop]: 1459 mSDtfsCounter, 34320 mSDsluCounter, 49444 mSDsCounter, 0 mSdLazyCounter, 34679 mSolverCounterSat, 262 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 20.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 34331 SdHoareTripleChecker+Valid, 50903 SdHoareTripleChecker+Invalid, 34941 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.3s SdHoareTripleChecker+Time, 262 IncrementalHoareTripleChecker+Valid, 34679 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 23.4s IncrementalHoareTripleChecker+Time [2024-11-27 20:13:02,885 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [34331 Valid, 50903 Invalid, 34941 Unknown, 0 Unchecked, 0.3s Time], IncrementalHoareTripleChecker [262 Valid, 34679 Invalid, 0 Unknown, 0 Unchecked, 23.4s Time] [2024-11-27 20:13:02,929 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 80197 states. [2024-11-27 20:13:03,617 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 80197 to 31439. [2024-11-27 20:13:03,643 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 31439 states, 30909 states have (on average 1.2838331877446698) internal successors, (39682), 30909 states have internal predecessors, (39682), 528 states have call successors, (528), 1 states have call predecessors, (528), 1 states have return successors, (528), 528 states have call predecessors, (528), 528 states have call successors, (528) [2024-11-27 20:13:03,676 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 31439 states to 31439 states and 40738 transitions. [2024-11-27 20:13:03,679 INFO L78 Accepts]: Start accepts. Automaton has 31439 states and 40738 transitions. Word has length 356 [2024-11-27 20:13:03,679 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-27 20:13:03,679 INFO L471 AbstractCegarLoop]: Abstraction has 31439 states and 40738 transitions. [2024-11-27 20:13:03,679 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 70 states, 70 states have (on average 12.485714285714286) internal successors, (874), 70 states have internal predecessors, (874), 13 states have call successors, (18), 1 states have call predecessors, (18), 1 states have return successors, (18), 13 states have call predecessors, (18), 13 states have call successors, (18) [2024-11-27 20:13:03,679 INFO L276 IsEmpty]: Start isEmpty. Operand 31439 states and 40738 transitions. [2024-11-27 20:13:03,706 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 357 [2024-11-27 20:13:03,706 INFO L210 NwaCegarLoop]: Found error trace [2024-11-27 20:13:03,706 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-27 20:13:03,730 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25b25d56-1da7-44e1-806b-92cb0bdd2bbb/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Ended with exit code 0 [2024-11-27 20:13:03,907 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable53,13 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25b25d56-1da7-44e1-806b-92cb0bdd2bbb/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-27 20:13:03,907 INFO L396 AbstractCegarLoop]: === Iteration 55 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-27 20:13:03,907 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-27 20:13:03,908 INFO L85 PathProgramCache]: Analyzing trace with hash 2041114541, now seen corresponding path program 1 times [2024-11-27 20:13:03,908 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-27 20:13:03,908 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [233468318] [2024-11-27 20:13:03,908 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-27 20:13:03,908 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-27 20:13:05,973 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-27 20:13:08,512 INFO L134 CoverageAnalysis]: Checked inductivity of 150 backedges. 2 proven. 88 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-27 20:13:08,512 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-27 20:13:08,512 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [233468318] [2024-11-27 20:13:08,512 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [233468318] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-27 20:13:08,512 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1182971634] [2024-11-27 20:13:08,512 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-27 20:13:08,512 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-27 20:13:08,512 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25b25d56-1da7-44e1-806b-92cb0bdd2bbb/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-27 20:13:08,514 INFO L229 MonitoredProcess]: Starting monitored process 14 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25b25d56-1da7-44e1-806b-92cb0bdd2bbb/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-27 20:13:08,516 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25b25d56-1da7-44e1-806b-92cb0bdd2bbb/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Waiting until timeout for monitored process [2024-11-27 20:13:11,504 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-27 20:13:11,516 INFO L256 TraceCheckSpWp]: Trace formula consists of 2082 conjuncts, 250 conjuncts are in the unsatisfiable core [2024-11-27 20:13:11,532 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-27 20:13:17,418 INFO L134 CoverageAnalysis]: Checked inductivity of 150 backedges. 14 proven. 76 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-27 20:13:17,418 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-27 20:13:33,768 INFO L134 CoverageAnalysis]: Checked inductivity of 150 backedges. 2 proven. 88 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-27 20:13:33,768 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1182971634] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-27 20:13:33,768 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-27 20:13:33,768 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 42, 43] total 96 [2024-11-27 20:13:33,768 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [877222911] [2024-11-27 20:13:33,769 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-27 20:13:33,769 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 96 states [2024-11-27 20:13:33,770 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-27 20:13:33,771 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 96 interpolants. [2024-11-27 20:13:33,772 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=1293, Invalid=7827, Unknown=0, NotChecked=0, Total=9120 [2024-11-27 20:13:33,772 INFO L87 Difference]: Start difference. First operand 31439 states and 40738 transitions. Second operand has 96 states, 96 states have (on average 10.135416666666666) internal successors, (973), 96 states have internal predecessors, (973), 12 states have call successors, (18), 1 states have call predecessors, (18), 1 states have return successors, (18), 12 states have call predecessors, (18), 12 states have call successors, (18) [2024-11-27 20:13:56,554 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-27 20:13:56,554 INFO L93 Difference]: Finished difference Result 81706 states and 104656 transitions. [2024-11-27 20:13:56,555 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 114 states. [2024-11-27 20:13:56,555 INFO L78 Accepts]: Start accepts. Automaton has has 96 states, 96 states have (on average 10.135416666666666) internal successors, (973), 96 states have internal predecessors, (973), 12 states have call successors, (18), 1 states have call predecessors, (18), 1 states have return successors, (18), 12 states have call predecessors, (18), 12 states have call successors, (18) Word has length 356 [2024-11-27 20:13:56,555 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-27 20:13:56,599 INFO L225 Difference]: With dead ends: 81706 [2024-11-27 20:13:56,599 INFO L226 Difference]: Without dead ends: 60457 [2024-11-27 20:13:56,619 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 823 GetRequests, 632 SyntacticMatches, 1 SemanticMatches, 190 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10833 ImplicationChecksByTransitivity, 13.8s TimeCoverageRelationStatistics Valid=4988, Invalid=31684, Unknown=0, NotChecked=0, Total=36672 [2024-11-27 20:13:56,620 INFO L435 NwaCegarLoop]: 938 mSDtfsCounter, 4838 mSDsluCounter, 28432 mSDsCounter, 0 mSdLazyCounter, 18385 mSolverCounterSat, 47 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 12.7s Time, 0 mProtectedPredicate, 0 mProtectedAction, 4842 SdHoareTripleChecker+Valid, 29370 SdHoareTripleChecker+Invalid, 18432 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.1s SdHoareTripleChecker+Time, 47 IncrementalHoareTripleChecker+Valid, 18385 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 14.3s IncrementalHoareTripleChecker+Time [2024-11-27 20:13:56,620 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [4842 Valid, 29370 Invalid, 18432 Unknown, 0 Unchecked, 0.1s Time], IncrementalHoareTripleChecker [47 Valid, 18385 Invalid, 0 Unknown, 0 Unchecked, 14.3s Time] [2024-11-27 20:13:56,643 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 60457 states. [2024-11-27 20:13:57,337 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 60457 to 33094. [2024-11-27 20:13:57,358 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 33094 states, 32498 states have (on average 1.2793094959689828) internal successors, (41575), 32498 states have internal predecessors, (41575), 594 states have call successors, (594), 1 states have call predecessors, (594), 1 states have return successors, (594), 594 states have call predecessors, (594), 594 states have call successors, (594) [2024-11-27 20:13:57,399 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33094 states to 33094 states and 42763 transitions. [2024-11-27 20:13:57,401 INFO L78 Accepts]: Start accepts. Automaton has 33094 states and 42763 transitions. Word has length 356 [2024-11-27 20:13:57,401 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-27 20:13:57,402 INFO L471 AbstractCegarLoop]: Abstraction has 33094 states and 42763 transitions. [2024-11-27 20:13:57,402 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 96 states, 96 states have (on average 10.135416666666666) internal successors, (973), 96 states have internal predecessors, (973), 12 states have call successors, (18), 1 states have call predecessors, (18), 1 states have return successors, (18), 12 states have call predecessors, (18), 12 states have call successors, (18) [2024-11-27 20:13:57,402 INFO L276 IsEmpty]: Start isEmpty. Operand 33094 states and 42763 transitions. [2024-11-27 20:13:57,440 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 357 [2024-11-27 20:13:57,440 INFO L210 NwaCegarLoop]: Found error trace [2024-11-27 20:13:57,441 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-27 20:13:57,463 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25b25d56-1da7-44e1-806b-92cb0bdd2bbb/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Ended with exit code 0 [2024-11-27 20:13:57,641 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable54,14 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25b25d56-1da7-44e1-806b-92cb0bdd2bbb/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-27 20:13:57,641 INFO L396 AbstractCegarLoop]: === Iteration 56 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-27 20:13:57,642 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-27 20:13:57,642 INFO L85 PathProgramCache]: Analyzing trace with hash -152670903, now seen corresponding path program 1 times [2024-11-27 20:13:57,642 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-27 20:13:57,642 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1513585207] [2024-11-27 20:13:57,642 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-27 20:13:57,642 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-27 20:13:57,826 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-27 20:13:58,753 INFO L134 CoverageAnalysis]: Checked inductivity of 149 backedges. 89 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-27 20:13:58,753 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-27 20:13:58,753 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1513585207] [2024-11-27 20:13:58,753 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1513585207] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-27 20:13:58,753 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-27 20:13:58,753 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-11-27 20:13:58,753 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [457054717] [2024-11-27 20:13:58,753 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-27 20:13:58,754 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-11-27 20:13:58,754 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-27 20:13:58,754 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-11-27 20:13:58,755 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2024-11-27 20:13:58,755 INFO L87 Difference]: Start difference. First operand 33094 states and 42763 transitions. Second operand has 6 states, 6 states have (on average 54.833333333333336) internal successors, (329), 6 states have internal predecessors, (329), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-27 20:13:59,403 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-27 20:13:59,403 INFO L93 Difference]: Finished difference Result 68223 states and 88355 transitions. [2024-11-27 20:13:59,404 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-27 20:13:59,404 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 54.833333333333336) internal successors, (329), 6 states have internal predecessors, (329), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 356 [2024-11-27 20:13:59,404 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-27 20:13:59,447 INFO L225 Difference]: With dead ends: 68223 [2024-11-27 20:13:59,447 INFO L226 Difference]: Without dead ends: 47698 [2024-11-27 20:13:59,466 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2024-11-27 20:13:59,466 INFO L435 NwaCegarLoop]: 930 mSDtfsCounter, 370 mSDsluCounter, 3317 mSDsCounter, 0 mSdLazyCounter, 42 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 370 SdHoareTripleChecker+Valid, 4247 SdHoareTripleChecker+Invalid, 42 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 42 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-27 20:13:59,466 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [370 Valid, 4247 Invalid, 42 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 42 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-27 20:13:59,485 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 47698 states. [2024-11-27 20:14:00,680 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 47698 to 39810. [2024-11-27 20:14:00,707 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 39810 states, 38846 states have (on average 1.270478298923956) internal successors, (49353), 38846 states have internal predecessors, (49353), 962 states have call successors, (962), 1 states have call predecessors, (962), 1 states have return successors, (962), 962 states have call predecessors, (962), 962 states have call successors, (962) [2024-11-27 20:14:00,756 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39810 states to 39810 states and 51277 transitions. [2024-11-27 20:14:00,759 INFO L78 Accepts]: Start accepts. Automaton has 39810 states and 51277 transitions. Word has length 356 [2024-11-27 20:14:00,760 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-27 20:14:00,760 INFO L471 AbstractCegarLoop]: Abstraction has 39810 states and 51277 transitions. [2024-11-27 20:14:00,760 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 54.833333333333336) internal successors, (329), 6 states have internal predecessors, (329), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-27 20:14:00,760 INFO L276 IsEmpty]: Start isEmpty. Operand 39810 states and 51277 transitions. [2024-11-27 20:14:00,796 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 358 [2024-11-27 20:14:00,796 INFO L210 NwaCegarLoop]: Found error trace [2024-11-27 20:14:00,797 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-27 20:14:00,797 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable55 [2024-11-27 20:14:00,797 INFO L396 AbstractCegarLoop]: === Iteration 57 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-27 20:14:00,797 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-27 20:14:00,797 INFO L85 PathProgramCache]: Analyzing trace with hash 414587049, now seen corresponding path program 1 times [2024-11-27 20:14:00,797 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-27 20:14:00,797 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [541740333] [2024-11-27 20:14:00,798 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-27 20:14:00,798 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-27 20:14:04,363 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-27 20:14:04,363 INFO L357 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-27 20:14:07,807 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-27 20:14:08,278 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-27 20:14:08,279 INFO L340 BasicCegarLoop]: Counterexample is feasible [2024-11-27 20:14:08,280 INFO L782 garLoopResultBuilder]: Registering result UNSAFE for location ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION (0 of 1 remaining) [2024-11-27 20:14:08,282 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable56 [2024-11-27 20:14:08,286 INFO L422 BasicCegarLoop]: Path program histogram: [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-27 20:14:08,708 INFO L170 ceAbstractionStarter]: Computing trace abstraction results [2024-11-27 20:14:08,713 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 27.11 08:14:08 BoogieIcfgContainer [2024-11-27 20:14:08,715 INFO L131 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2024-11-27 20:14:08,718 INFO L112 PluginConnector]: ------------------------Witness Printer---------------------------- [2024-11-27 20:14:08,719 INFO L270 PluginConnector]: Initializing Witness Printer... [2024-11-27 20:14:08,719 INFO L274 PluginConnector]: Witness Printer initialized [2024-11-27 20:14:08,720 INFO L184 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 27.11 08:08:29" (3/4) ... [2024-11-27 20:14:08,727 INFO L149 WitnessPrinter]: No result that supports witness generation found [2024-11-27 20:14:08,728 INFO L131 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2024-11-27 20:14:08,729 INFO L158 Benchmark]: Toolchain (without parser) took 344259.14ms. Allocated memory was 117.4MB in the beginning and 3.0GB in the end (delta: 2.9GB). Free memory was 92.8MB in the beginning and 2.6GB in the end (delta: -2.5GB). Peak memory consumption was 387.2MB. Max. memory is 16.1GB. [2024-11-27 20:14:08,729 INFO L158 Benchmark]: CDTParser took 0.53ms. Allocated memory is still 167.8MB. Free memory was 103.1MB in the beginning and 102.9MB in the end (delta: 215.9kB). There was no memory consumed. Max. memory is 16.1GB. [2024-11-27 20:14:08,729 INFO L158 Benchmark]: CACSL2BoogieTranslator took 793.59ms. Allocated memory is still 117.4MB. Free memory was 92.8MB in the beginning and 62.6MB in the end (delta: 30.1MB). Peak memory consumption was 25.2MB. Max. memory is 16.1GB. [2024-11-27 20:14:08,729 INFO L158 Benchmark]: Boogie Procedure Inliner took 378.12ms. Allocated memory is still 117.4MB. Free memory was 62.6MB in the beginning and 72.3MB in the end (delta: -9.6MB). Peak memory consumption was 50.5MB. Max. memory is 16.1GB. [2024-11-27 20:14:08,729 INFO L158 Benchmark]: Boogie Preprocessor took 253.63ms. Allocated memory is still 117.4MB. Free memory was 72.3MB in the beginning and 55.0MB in the end (delta: 17.3MB). Peak memory consumption was 16.8MB. Max. memory is 16.1GB. [2024-11-27 20:14:08,729 INFO L158 Benchmark]: RCFGBuilder took 3189.84ms. Allocated memory was 117.4MB in the beginning and 352.3MB in the end (delta: 234.9MB). Free memory was 55.0MB in the beginning and 131.7MB in the end (delta: -76.7MB). Peak memory consumption was 159.1MB. Max. memory is 16.1GB. [2024-11-27 20:14:08,730 INFO L158 Benchmark]: TraceAbstraction took 339622.90ms. Allocated memory was 352.3MB in the beginning and 3.0GB in the end (delta: 2.6GB). Free memory was 130.9MB in the beginning and 2.6GB in the end (delta: -2.5GB). Peak memory consumption was 1.6GB. Max. memory is 16.1GB. [2024-11-27 20:14:08,730 INFO L158 Benchmark]: Witness Printer took 9.38ms. Allocated memory is still 3.0GB. Free memory was 2.6GB in the beginning and 2.6GB in the end (delta: 4.2MB). There was no memory consumed. Max. memory is 16.1GB. [2024-11-27 20:14:08,731 INFO L338 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.53ms. Allocated memory is still 167.8MB. Free memory was 103.1MB in the beginning and 102.9MB in the end (delta: 215.9kB). There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 793.59ms. Allocated memory is still 117.4MB. Free memory was 92.8MB in the beginning and 62.6MB in the end (delta: 30.1MB). Peak memory consumption was 25.2MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 378.12ms. Allocated memory is still 117.4MB. Free memory was 62.6MB in the beginning and 72.3MB in the end (delta: -9.6MB). Peak memory consumption was 50.5MB. Max. memory is 16.1GB. * Boogie Preprocessor took 253.63ms. Allocated memory is still 117.4MB. Free memory was 72.3MB in the beginning and 55.0MB in the end (delta: 17.3MB). Peak memory consumption was 16.8MB. Max. memory is 16.1GB. * RCFGBuilder took 3189.84ms. Allocated memory was 117.4MB in the beginning and 352.3MB in the end (delta: 234.9MB). Free memory was 55.0MB in the beginning and 131.7MB in the end (delta: -76.7MB). Peak memory consumption was 159.1MB. Max. memory is 16.1GB. * TraceAbstraction took 339622.90ms. Allocated memory was 352.3MB in the beginning and 3.0GB in the end (delta: 2.6GB). Free memory was 130.9MB in the beginning and 2.6GB in the end (delta: -2.5GB). Peak memory consumption was 1.6GB. Max. memory is 16.1GB. * Witness Printer took 9.38ms. Allocated memory is still 3.0GB. Free memory was 2.6GB in the beginning and 2.6GB in the end (delta: 4.2MB). There was no memory consumed. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: ErrorAutomatonStatistics NumberErrorTraces: 0, NumberStatementsAllTraces: 0, NumberRelevantStatements: 0, 0.0s ErrorAutomatonConstructionTimeTotal, 0.0s FaulLocalizationTime, NumberStatementsFirstTrace: -1, TraceLengthAvg: 0, 0.0s ErrorAutomatonConstructionTimeAvg, 0.0s ErrorAutomatonDifferenceTimeAvg, 0.0s ErrorAutomatonDifferenceTimeTotal, NumberOfNoEnhancement: 0, NumberOfFiniteEnhancement: 0, NumberOfInfiniteEnhancement: 0 - UnprovableResult [Line: 21]: Unable to prove that a call to reach_error is unreachable Unable to prove that a call to reach_error is unreachable Reason: overapproximation of bitwiseOr at line 145, overapproximation of bitwiseOr at line 290, overapproximation of bitwiseOr at line 126, overapproximation of bitwiseAnd at line 403, overapproximation of bitwiseAnd at line 441, overapproximation of bitwiseAnd at line 106, overapproximation of bitwiseAnd at line 299, overapproximation of bitwiseAnd at line 202, overapproximation of bitwiseAnd at line 365, overapproximation of bitwiseAnd at line 110, overapproximation of bitwiseAnd at line 146, overapproximation of bitwiseAnd at line 234, overapproximation of bitwiseAnd at line 515, overapproximation of bitwiseAnd at line 384, overapproximation of bitwiseAnd at line 222, overapproximation of bitwiseAnd at line 228, overapproximation of bitwiseAnd at line 210. Possible FailurePath: [L26] const SORT_1 mask_SORT_1 = (SORT_1)-1 >> (sizeof(SORT_1) * 8 - 1); [L27] const SORT_1 msb_SORT_1 = (SORT_1)1 << (1 - 1); [L29] const SORT_3 mask_SORT_3 = (SORT_3)-1 >> (sizeof(SORT_3) * 8 - 8); [L30] const SORT_3 msb_SORT_3 = (SORT_3)1 << (8 - 1); [L32] const SORT_11 mask_SORT_11 = (SORT_11)-1 >> (sizeof(SORT_11) * 8 - 5); [L33] const SORT_11 msb_SORT_11 = (SORT_11)1 << (5 - 1); [L35] const SORT_13 mask_SORT_13 = (SORT_13)-1 >> (sizeof(SORT_13) * 8 - 4); [L36] const SORT_13 msb_SORT_13 = (SORT_13)1 << (4 - 1); [L38] const SORT_19 mask_SORT_19 = (SORT_19)-1 >> (sizeof(SORT_19) * 8 - 3); [L39] const SORT_19 msb_SORT_19 = (SORT_19)1 << (3 - 1); [L41] const SORT_40 mask_SORT_40 = (SORT_40)-1 >> (sizeof(SORT_40) * 8 - 2); [L42] const SORT_40 msb_SORT_40 = (SORT_40)1 << (2 - 1); [L44] const SORT_13 var_15 = 8; [L45] const SORT_19 var_20 = 7; [L46] const SORT_19 var_25 = 6; [L47] const SORT_19 var_30 = 5; [L48] const SORT_19 var_35 = 4; [L49] const SORT_40 var_41 = 3; [L50] const SORT_40 var_46 = 2; [L51] const SORT_1 var_51 = 1; [L52] const SORT_13 var_64 = 9; [L53] const SORT_11 var_81 = 0; [L54] const SORT_1 var_111 = 0; [L55] const SORT_3 var_268 = 0; [L57] SORT_1 input_2; [L58] SORT_3 input_4; [L59] SORT_1 input_5; [L60] SORT_1 input_6; [L61] SORT_1 input_7; [L62] SORT_1 input_8; [L63] SORT_3 input_9; [L64] SORT_1 input_109; [L66] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L66] SORT_3 state_10 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L67] EXPR __VERIFIER_nondet_uchar() & mask_SORT_11 VAL [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L67] SORT_11 state_12 = __VERIFIER_nondet_uchar() & mask_SORT_11; [L68] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L68] SORT_3 state_18 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L69] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_18=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L69] SORT_3 state_24 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L70] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_18=0, state_24=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L70] SORT_3 state_29 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L71] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L71] SORT_3 state_34 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L72] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L72] SORT_3 state_39 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L73] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L73] SORT_3 state_45 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L74] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L74] SORT_3 state_50 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L75] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L75] SORT_3 state_55 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L76] EXPR __VERIFIER_nondet_uchar() & mask_SORT_11 VAL [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L76] SORT_11 state_60 = __VERIFIER_nondet_uchar() & mask_SORT_11; [L77] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L77] SORT_1 state_68 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L78] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L78] SORT_1 state_69 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L79] EXPR __VERIFIER_nondet_uchar() & mask_SORT_11 VAL [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L79] SORT_11 state_72 = __VERIFIER_nondet_uchar() & mask_SORT_11; [L80] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L80] SORT_3 state_87 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L81] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L81] SORT_1 state_91 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L82] EXPR __VERIFIER_nondet_uchar() & mask_SORT_11 VAL [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L82] SORT_11 state_136 = __VERIFIER_nondet_uchar() & mask_SORT_11; [L84] SORT_1 init_92_arg_1 = var_51; [L85] state_91 = init_92_arg_1 VAL [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L88] input_2 = __VERIFIER_nondet_uchar() [L89] input_4 = __VERIFIER_nondet_uchar() [L90] input_5 = __VERIFIER_nondet_uchar() [L91] input_6 = __VERIFIER_nondet_uchar() [L92] input_7 = __VERIFIER_nondet_uchar() [L93] EXPR input_7 & mask_SORT_1 VAL [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L93] input_7 = input_7 & mask_SORT_1 [L94] input_8 = __VERIFIER_nondet_uchar() [L95] input_9 = __VERIFIER_nondet_uchar() [L96] input_109 = __VERIFIER_nondet_uchar() [L98] SORT_1 var_93_arg_0 = input_7; [L99] SORT_1 var_93_arg_1 = state_91; [L100] SORT_1 var_93 = var_93_arg_0 == var_93_arg_1; [L101] SORT_1 var_94_arg_0 = var_51; [L102] SORT_1 var_94 = ~var_94_arg_0; [L103] SORT_1 var_95_arg_0 = var_93; [L104] SORT_1 var_95_arg_1 = var_94; VAL [input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_95_arg_0=0, var_95_arg_1=-2] [L105] EXPR var_95_arg_0 | var_95_arg_1 VAL [input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L105] SORT_1 var_95 = var_95_arg_0 | var_95_arg_1; [L106] EXPR var_95 & mask_SORT_1 VAL [input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L106] var_95 = var_95 & mask_SORT_1 [L107] SORT_1 constr_96_arg_0 = var_95; VAL [constr_96_arg_0=1, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L108] CALL assume_abort_if_not(constr_96_arg_0) VAL [\old(cond)=1] [L22] COND FALSE !(!cond) VAL [\old(cond)=1] [L108] RET assume_abort_if_not(constr_96_arg_0) VAL [constr_96_arg_0=1, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L109] SORT_13 var_65_arg_0 = var_64; VAL [constr_96_arg_0=1, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_65_arg_0=9, var_81=0] [L110] EXPR var_65_arg_0 & mask_SORT_13 VAL [constr_96_arg_0=1, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L110] var_65_arg_0 = var_65_arg_0 & mask_SORT_13 [L111] SORT_11 var_65 = var_65_arg_0; [L112] SORT_11 var_66_arg_0 = state_60; [L113] SORT_11 var_66_arg_1 = var_65; [L114] SORT_1 var_66 = var_66_arg_0 == var_66_arg_1; [L115] SORT_1 var_97_arg_0 = var_66; [L116] SORT_1 var_97 = ~var_97_arg_0; [L117] SORT_1 var_98_arg_0 = input_6; [L118] SORT_1 var_98 = ~var_98_arg_0; [L119] SORT_1 var_99_arg_0 = var_97; [L120] SORT_1 var_99_arg_1 = var_98; VAL [constr_96_arg_0=1, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_99_arg_0=-1, var_99_arg_1=-1] [L121] EXPR var_99_arg_0 | var_99_arg_1 VAL [constr_96_arg_0=1, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L121] SORT_1 var_99 = var_99_arg_0 | var_99_arg_1; [L122] SORT_1 var_100_arg_0 = var_51; [L123] SORT_1 var_100 = ~var_100_arg_0; [L124] SORT_1 var_101_arg_0 = var_99; [L125] SORT_1 var_101_arg_1 = var_100; VAL [constr_96_arg_0=1, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_101_arg_0=255, var_101_arg_1=-2, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L126] EXPR var_101_arg_0 | var_101_arg_1 VAL [constr_96_arg_0=1, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L126] SORT_1 var_101 = var_101_arg_0 | var_101_arg_1; [L127] EXPR var_101 & mask_SORT_1 VAL [constr_96_arg_0=1, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L127] var_101 = var_101 & mask_SORT_1 [L128] SORT_1 constr_102_arg_0 = var_101; VAL [constr_102_arg_0=1, constr_96_arg_0=1, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L129] CALL assume_abort_if_not(constr_102_arg_0) VAL [\old(cond)=1] [L22] COND FALSE !(!cond) VAL [\old(cond)=1] [L129] RET assume_abort_if_not(constr_102_arg_0) VAL [constr_102_arg_0=1, constr_96_arg_0=1, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L130] SORT_11 var_61_arg_0 = state_60; [L131] SORT_1 var_61 = var_61_arg_0 != 0; [L132] SORT_1 var_62_arg_0 = var_61; [L133] SORT_1 var_62 = ~var_62_arg_0; [L134] SORT_1 var_103_arg_0 = var_62; [L135] SORT_1 var_103 = ~var_103_arg_0; [L136] SORT_1 var_104_arg_0 = input_5; [L137] SORT_1 var_104 = ~var_104_arg_0; [L138] SORT_1 var_105_arg_0 = var_103; [L139] SORT_1 var_105_arg_1 = var_104; VAL [constr_102_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_105_arg_0=-256, var_105_arg_1=-1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L140] EXPR var_105_arg_0 | var_105_arg_1 VAL [constr_102_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L140] SORT_1 var_105 = var_105_arg_0 | var_105_arg_1; [L141] SORT_1 var_106_arg_0 = var_51; [L142] SORT_1 var_106 = ~var_106_arg_0; [L143] SORT_1 var_107_arg_0 = var_105; [L144] SORT_1 var_107_arg_1 = var_106; VAL [constr_102_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_107_arg_0=255, var_107_arg_1=-2, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L145] EXPR var_107_arg_0 | var_107_arg_1 VAL [constr_102_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L145] SORT_1 var_107 = var_107_arg_0 | var_107_arg_1; [L146] EXPR var_107 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L146] var_107 = var_107 & mask_SORT_1 [L147] SORT_1 constr_108_arg_0 = var_107; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L148] CALL assume_abort_if_not(constr_108_arg_0) VAL [\old(cond)=1] [L22] COND FALSE !(!cond) VAL [\old(cond)=1] [L148] RET assume_abort_if_not(constr_108_arg_0) VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L150] SORT_1 var_112_arg_0 = state_91; [L151] SORT_1 var_112_arg_1 = var_111; [L152] SORT_1 var_112_arg_2 = var_51; [L153] SORT_1 var_112 = var_112_arg_0 ? var_112_arg_1 : var_112_arg_2; [L154] SORT_1 var_70_arg_0 = state_69; [L155] SORT_1 var_70 = ~var_70_arg_0; [L156] SORT_1 var_71_arg_0 = state_68; [L157] SORT_1 var_71_arg_1 = var_70; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_71_arg_0=0, var_71_arg_1=-1, var_81=0] [L158] EXPR var_71_arg_0 & var_71_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L158] SORT_1 var_71 = var_71_arg_0 & var_71_arg_1; [L159] SORT_11 var_73_arg_0 = state_72; [L160] SORT_1 var_73 = var_73_arg_0 != 0; [L161] SORT_1 var_74_arg_0 = var_71; [L162] SORT_1 var_74_arg_1 = var_73; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_74_arg_0=0, var_74_arg_1=0, var_81=0] [L163] EXPR var_74_arg_0 & var_74_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L163] SORT_1 var_74 = var_74_arg_0 & var_74_arg_1; [L164] SORT_1 var_75_arg_0 = state_68; [L165] SORT_1 var_75 = ~var_75_arg_0; [L166] SORT_1 var_76_arg_0 = input_6; [L167] SORT_1 var_76_arg_1 = var_75; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_74=0, var_76_arg_0=0, var_76_arg_1=-1, var_81=0] [L168] EXPR var_76_arg_0 & var_76_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_74=0, var_81=0] [L168] SORT_1 var_76 = var_76_arg_0 & var_76_arg_1; [L169] SORT_1 var_77_arg_0 = var_76; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_74=0, var_77_arg_0=0, var_81=0] [L170] EXPR var_77_arg_0 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_74=0, var_81=0] [L170] var_77_arg_0 = var_77_arg_0 & mask_SORT_1 [L171] SORT_11 var_77 = var_77_arg_0; [L172] SORT_11 var_78_arg_0 = state_72; [L173] SORT_11 var_78_arg_1 = var_77; [L174] SORT_11 var_78 = var_78_arg_0 + var_78_arg_1; [L175] SORT_1 var_79_arg_0 = input_5; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_74=0, var_78=0, var_79_arg_0=0, var_81=0] [L176] EXPR var_79_arg_0 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_74=0, var_78=0, var_81=0] [L176] var_79_arg_0 = var_79_arg_0 & mask_SORT_1 [L177] SORT_11 var_79 = var_79_arg_0; [L178] SORT_11 var_80_arg_0 = var_78; [L179] SORT_11 var_80_arg_1 = var_79; [L180] SORT_11 var_80 = var_80_arg_0 - var_80_arg_1; [L181] SORT_1 var_82_arg_0 = input_7; [L182] SORT_11 var_82_arg_1 = var_81; [L183] SORT_11 var_82_arg_2 = var_80; [L184] SORT_11 var_82 = var_82_arg_0 ? var_82_arg_1 : var_82_arg_2; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_74=0, var_81=0, var_82=0] [L185] EXPR var_82 & mask_SORT_11 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_74=0, var_81=0] [L185] var_82 = var_82 & mask_SORT_11 [L186] SORT_11 var_83_arg_0 = var_82; [L187] SORT_1 var_83 = var_83_arg_0 != 0; [L188] SORT_1 var_84_arg_0 = var_83; [L189] SORT_1 var_84 = ~var_84_arg_0; [L190] SORT_1 var_85_arg_0 = var_74; [L191] SORT_1 var_85_arg_1 = var_84; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85_arg_0=0, var_85_arg_1=-1] [L192] EXPR var_85_arg_0 & var_85_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0] [L192] SORT_1 var_85 = var_85_arg_0 & var_85_arg_1; [L193] SORT_1 var_86_arg_0 = var_85; [L194] SORT_1 var_86 = ~var_86_arg_0; [L195] SORT_11 var_14_arg_0 = state_12; [L196] SORT_13 var_14 = var_14_arg_0 >> 0; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L197] EXPR var_14 & mask_SORT_13 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L197] var_14 = var_14 & mask_SORT_13 [L198] SORT_13 var_56_arg_0 = var_14; [L199] SORT_1 var_56 = var_56_arg_0 != 0; [L200] SORT_1 var_57_arg_0 = var_56; [L201] SORT_1 var_57 = ~var_57_arg_0; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_57=-1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L202] EXPR var_57 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L202] var_57 = var_57 & mask_SORT_1 [L203] SORT_1 var_52_arg_0 = var_51; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_52_arg_0=1, var_57=0, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L204] EXPR var_52_arg_0 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_57=0, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L204] var_52_arg_0 = var_52_arg_0 & mask_SORT_1 [L205] SORT_13 var_52 = var_52_arg_0; [L206] SORT_13 var_53_arg_0 = var_14; [L207] SORT_13 var_53_arg_1 = var_52; [L208] SORT_1 var_53 = var_53_arg_0 == var_53_arg_1; [L209] SORT_40 var_47_arg_0 = var_46; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_47_arg_0=2, var_51=1, var_53=0, var_57=0, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L210] EXPR var_47_arg_0 & mask_SORT_40 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_53=0, var_57=0, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L210] var_47_arg_0 = var_47_arg_0 & mask_SORT_40 [L211] SORT_13 var_47 = var_47_arg_0; [L212] SORT_13 var_48_arg_0 = var_14; [L213] SORT_13 var_48_arg_1 = var_47; [L214] SORT_1 var_48 = var_48_arg_0 == var_48_arg_1; [L215] SORT_40 var_42_arg_0 = var_41; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_42_arg_0=3, var_46=2, var_48=0, var_51=1, var_53=0, var_57=0, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L216] EXPR var_42_arg_0 & mask_SORT_40 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_48=0, var_51=1, var_53=0, var_57=0, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L216] var_42_arg_0 = var_42_arg_0 & mask_SORT_40 [L217] SORT_13 var_42 = var_42_arg_0; [L218] SORT_13 var_43_arg_0 = var_14; [L219] SORT_13 var_43_arg_1 = var_42; [L220] SORT_1 var_43 = var_43_arg_0 == var_43_arg_1; [L221] SORT_19 var_36_arg_0 = var_35; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_36_arg_0=4, var_41=3, var_43=0, var_46=2, var_48=0, var_51=1, var_53=0, var_57=0, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L222] EXPR var_36_arg_0 & mask_SORT_19 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_43=0, var_46=2, var_48=0, var_51=1, var_53=0, var_57=0, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L222] var_36_arg_0 = var_36_arg_0 & mask_SORT_19 [L223] SORT_13 var_36 = var_36_arg_0; [L224] SORT_13 var_37_arg_0 = var_14; [L225] SORT_13 var_37_arg_1 = var_36; [L226] SORT_1 var_37 = var_37_arg_0 == var_37_arg_1; [L227] SORT_19 var_31_arg_0 = var_30; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_31_arg_0=5, var_35=4, var_37=0, var_41=3, var_43=0, var_46=2, var_48=0, var_51=1, var_53=0, var_57=0, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L228] EXPR var_31_arg_0 & mask_SORT_19 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_37=0, var_41=3, var_43=0, var_46=2, var_48=0, var_51=1, var_53=0, var_57=0, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L228] var_31_arg_0 = var_31_arg_0 & mask_SORT_19 [L229] SORT_13 var_31 = var_31_arg_0; [L230] SORT_13 var_32_arg_0 = var_14; [L231] SORT_13 var_32_arg_1 = var_31; [L232] SORT_1 var_32 = var_32_arg_0 == var_32_arg_1; [L233] SORT_19 var_26_arg_0 = var_25; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_26_arg_0=6, var_30=5, var_32=0, var_35=4, var_37=0, var_41=3, var_43=0, var_46=2, var_48=0, var_51=1, var_53=0, var_57=0, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L234] EXPR var_26_arg_0 & mask_SORT_19 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_32=0, var_35=4, var_37=0, var_41=3, var_43=0, var_46=2, var_48=0, var_51=1, var_53=0, var_57=0, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L234] var_26_arg_0 = var_26_arg_0 & mask_SORT_19 [L235] SORT_13 var_26 = var_26_arg_0; [L236] SORT_13 var_27_arg_0 = var_14; [L237] SORT_13 var_27_arg_1 = var_26; [L238] SORT_1 var_27 = var_27_arg_0 == var_27_arg_1; [L239] SORT_19 var_21_arg_0 = var_20; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_14=0, var_15=8, var_20=7, var_21_arg_0=7, var_25=6, var_268=0, var_27=0, var_30=5, var_32=0, var_35=4, var_37=0, var_41=3, var_43=0, var_46=2, var_48=0, var_51=1, var_53=0, var_57=0, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L240] EXPR var_21_arg_0 & mask_SORT_19 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_27=0, var_30=5, var_32=0, var_35=4, var_37=0, var_41=3, var_43=0, var_46=2, var_48=0, var_51=1, var_53=0, var_57=0, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L240] var_21_arg_0 = var_21_arg_0 & mask_SORT_19 [L241] SORT_13 var_21 = var_21_arg_0; [L242] SORT_13 var_22_arg_0 = var_14; [L243] SORT_13 var_22_arg_1 = var_21; [L244] SORT_1 var_22 = var_22_arg_0 == var_22_arg_1; [L245] SORT_13 var_16_arg_0 = var_14; [L246] SORT_13 var_16_arg_1 = var_15; [L247] SORT_1 var_16 = var_16_arg_0 == var_16_arg_1; [L248] SORT_1 var_17_arg_0 = var_16; [L249] SORT_3 var_17_arg_1 = state_10; [L250] SORT_3 var_17_arg_2 = input_9; [L251] SORT_3 var_17 = var_17_arg_0 ? var_17_arg_1 : var_17_arg_2; [L252] SORT_1 var_23_arg_0 = var_22; [L253] SORT_3 var_23_arg_1 = state_18; [L254] SORT_3 var_23_arg_2 = var_17; [L255] SORT_3 var_23 = var_23_arg_0 ? var_23_arg_1 : var_23_arg_2; [L256] SORT_1 var_28_arg_0 = var_27; [L257] SORT_3 var_28_arg_1 = state_24; [L258] SORT_3 var_28_arg_2 = var_23; [L259] SORT_3 var_28 = var_28_arg_0 ? var_28_arg_1 : var_28_arg_2; [L260] SORT_1 var_33_arg_0 = var_32; [L261] SORT_3 var_33_arg_1 = state_29; [L262] SORT_3 var_33_arg_2 = var_28; [L263] SORT_3 var_33 = var_33_arg_0 ? var_33_arg_1 : var_33_arg_2; [L264] SORT_1 var_38_arg_0 = var_37; [L265] SORT_3 var_38_arg_1 = state_34; [L266] SORT_3 var_38_arg_2 = var_33; [L267] SORT_3 var_38 = var_38_arg_0 ? var_38_arg_1 : var_38_arg_2; [L268] SORT_1 var_44_arg_0 = var_43; [L269] SORT_3 var_44_arg_1 = state_39; [L270] SORT_3 var_44_arg_2 = var_38; [L271] SORT_3 var_44 = var_44_arg_0 ? var_44_arg_1 : var_44_arg_2; [L272] SORT_1 var_49_arg_0 = var_48; [L273] SORT_3 var_49_arg_1 = state_45; [L274] SORT_3 var_49_arg_2 = var_44; [L275] SORT_3 var_49 = var_49_arg_0 ? var_49_arg_1 : var_49_arg_2; [L276] SORT_1 var_54_arg_0 = var_53; [L277] SORT_3 var_54_arg_1 = state_50; [L278] SORT_3 var_54_arg_2 = var_49; [L279] SORT_3 var_54 = var_54_arg_0 ? var_54_arg_1 : var_54_arg_2; [L280] SORT_1 var_58_arg_0 = var_57; [L281] SORT_3 var_58_arg_1 = state_55; [L282] SORT_3 var_58_arg_2 = var_54; [L283] SORT_3 var_58 = var_58_arg_0 ? var_58_arg_1 : var_58_arg_2; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_58=255, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L284] EXPR var_58 & mask_SORT_3 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L284] var_58 = var_58 & mask_SORT_3 [L285] SORT_3 var_88_arg_0 = state_87; [L286] SORT_3 var_88_arg_1 = var_58; [L287] SORT_1 var_88 = var_88_arg_0 == var_88_arg_1; [L288] SORT_1 var_89_arg_0 = var_86; [L289] SORT_1 var_89_arg_1 = var_88; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0, var_89_arg_0=-1, var_89_arg_1=0] [L290] EXPR var_89_arg_0 | var_89_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L290] SORT_1 var_89 = var_89_arg_0 | var_89_arg_1; [L291] SORT_1 var_110_arg_0 = state_91; [L292] SORT_1 var_110_arg_1 = input_109; [L293] SORT_1 var_110_arg_2 = var_89; [L294] SORT_1 var_110 = var_110_arg_0 ? var_110_arg_1 : var_110_arg_2; [L295] SORT_1 var_113_arg_0 = var_110; [L296] SORT_1 var_113 = ~var_113_arg_0; [L297] SORT_1 var_114_arg_0 = var_112; [L298] SORT_1 var_114_arg_1 = var_113; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_114_arg_0=0, var_114_arg_1=-256, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L299] EXPR var_114_arg_0 & var_114_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L299] SORT_1 var_114 = var_114_arg_0 & var_114_arg_1; [L300] EXPR var_114 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L300] var_114 = var_114 & mask_SORT_1 [L301] SORT_1 bad_115_arg_0 = var_114; [L302] CALL __VERIFIER_assert(!(bad_115_arg_0)) [L21] COND FALSE !(!(cond)) [L302] RET __VERIFIER_assert(!(bad_115_arg_0)) [L304] SORT_11 var_137_arg_0 = state_136; [L305] SORT_13 var_137 = var_137_arg_0 >> 0; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L306] EXPR var_137 & mask_SORT_13 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L306] var_137 = var_137 & mask_SORT_13 [L307] SORT_13 var_194_arg_0 = var_137; [L308] SORT_13 var_194_arg_1 = var_15; [L309] SORT_1 var_194 = var_194_arg_0 == var_194_arg_1; [L310] SORT_1 var_195_arg_0 = input_6; [L311] SORT_1 var_195_arg_1 = var_194; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_137=0, var_15=8, var_195_arg_0=0, var_195_arg_1=0, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L312] EXPR var_195_arg_0 & var_195_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L312] SORT_1 var_195 = var_195_arg_0 & var_195_arg_1; [L313] EXPR var_195 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L313] var_195 = var_195 & mask_SORT_1 [L314] SORT_1 var_267_arg_0 = var_195; [L315] SORT_3 var_267_arg_1 = input_4; [L316] SORT_3 var_267_arg_2 = state_10; [L317] SORT_3 var_267 = var_267_arg_0 ? var_267_arg_1 : var_267_arg_2; [L318] SORT_1 var_269_arg_0 = input_7; [L319] SORT_3 var_269_arg_1 = var_268; [L320] SORT_3 var_269_arg_2 = var_267; [L321] SORT_3 var_269 = var_269_arg_0 ? var_269_arg_1 : var_269_arg_2; [L322] SORT_3 next_270_arg_1 = var_269; [L323] SORT_1 var_119_arg_0 = input_6; [L324] SORT_1 var_119_arg_1 = input_5; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, next_270_arg_1=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_119_arg_0=0, var_119_arg_1=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L325] EXPR var_119_arg_0 | var_119_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, next_270_arg_1=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L325] SORT_1 var_119 = var_119_arg_0 | var_119_arg_1; [L326] SORT_1 var_120_arg_0 = var_119; [L327] SORT_1 var_120_arg_1 = input_7; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, next_270_arg_1=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120_arg_0=0, var_120_arg_1=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L328] EXPR var_120_arg_0 | var_120_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, next_270_arg_1=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L328] SORT_1 var_120 = var_120_arg_0 | var_120_arg_1; [L329] EXPR var_120 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, next_270_arg_1=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L329] var_120 = var_120 & mask_SORT_1 [L330] SORT_1 var_198_arg_0 = input_5; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, next_270_arg_1=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_198_arg_0=0, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L331] EXPR var_198_arg_0 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, next_270_arg_1=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L331] var_198_arg_0 = var_198_arg_0 & mask_SORT_1 [L332] SORT_11 var_198 = var_198_arg_0; [L333] SORT_11 var_199_arg_0 = state_12; [L334] SORT_11 var_199_arg_1 = var_198; [L335] SORT_11 var_199 = var_199_arg_0 + var_199_arg_1; [L336] SORT_1 var_271_arg_0 = var_120; [L337] SORT_11 var_271_arg_1 = var_199; [L338] SORT_11 var_271_arg_2 = state_12; [L339] SORT_11 var_271 = var_271_arg_0 ? var_271_arg_1 : var_271_arg_2; [L340] SORT_1 var_272_arg_0 = input_7; [L341] SORT_11 var_272_arg_1 = var_81; [L342] SORT_11 var_272_arg_2 = var_271; [L343] SORT_11 var_272 = var_272_arg_0 ? var_272_arg_1 : var_272_arg_2; [L344] SORT_11 next_273_arg_1 = var_272; [L345] SORT_19 var_187_arg_0 = var_20; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_187_arg_0=7, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L346] EXPR var_187_arg_0 & mask_SORT_19 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L346] var_187_arg_0 = var_187_arg_0 & mask_SORT_19 [L347] SORT_13 var_187 = var_187_arg_0; [L348] SORT_13 var_188_arg_0 = var_137; [L349] SORT_13 var_188_arg_1 = var_187; [L350] SORT_1 var_188 = var_188_arg_0 == var_188_arg_1; [L351] SORT_1 var_189_arg_0 = input_6; [L352] SORT_1 var_189_arg_1 = var_188; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_189_arg_0=0, var_189_arg_1=0, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L353] EXPR var_189_arg_0 & var_189_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L353] SORT_1 var_189 = var_189_arg_0 & var_189_arg_1; [L354] EXPR var_189 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L354] var_189 = var_189 & mask_SORT_1 [L355] SORT_1 var_274_arg_0 = var_189; [L356] SORT_3 var_274_arg_1 = input_4; [L357] SORT_3 var_274_arg_2 = state_18; [L358] SORT_3 var_274 = var_274_arg_0 ? var_274_arg_1 : var_274_arg_2; [L359] SORT_1 var_275_arg_0 = input_7; [L360] SORT_3 var_275_arg_1 = var_268; [L361] SORT_3 var_275_arg_2 = var_274; [L362] SORT_3 var_275 = var_275_arg_0 ? var_275_arg_1 : var_275_arg_2; [L363] SORT_3 next_276_arg_1 = var_275; [L364] SORT_19 var_180_arg_0 = var_25; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, state_136=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_180_arg_0=6, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L365] EXPR var_180_arg_0 & mask_SORT_19 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, state_136=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L365] var_180_arg_0 = var_180_arg_0 & mask_SORT_19 [L366] SORT_13 var_180 = var_180_arg_0; [L367] SORT_13 var_181_arg_0 = var_137; [L368] SORT_13 var_181_arg_1 = var_180; [L369] SORT_1 var_181 = var_181_arg_0 == var_181_arg_1; [L370] SORT_1 var_182_arg_0 = input_6; [L371] SORT_1 var_182_arg_1 = var_181; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, state_136=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_182_arg_0=0, var_182_arg_1=1, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L372] EXPR var_182_arg_0 & var_182_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, state_136=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L372] SORT_1 var_182 = var_182_arg_0 & var_182_arg_1; [L373] EXPR var_182 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, state_136=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L373] var_182 = var_182 & mask_SORT_1 [L374] SORT_1 var_277_arg_0 = var_182; [L375] SORT_3 var_277_arg_1 = input_4; [L376] SORT_3 var_277_arg_2 = state_24; [L377] SORT_3 var_277 = var_277_arg_0 ? var_277_arg_1 : var_277_arg_2; [L378] SORT_1 var_278_arg_0 = input_7; [L379] SORT_3 var_278_arg_1 = var_268; [L380] SORT_3 var_278_arg_2 = var_277; [L381] SORT_3 var_278 = var_278_arg_0 ? var_278_arg_1 : var_278_arg_2; [L382] SORT_3 next_279_arg_1 = var_278; [L383] SORT_19 var_173_arg_0 = var_30; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, state_136=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_173_arg_0=5, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L384] EXPR var_173_arg_0 & mask_SORT_19 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, state_136=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L384] var_173_arg_0 = var_173_arg_0 & mask_SORT_19 [L385] SORT_13 var_173 = var_173_arg_0; [L386] SORT_13 var_174_arg_0 = var_137; [L387] SORT_13 var_174_arg_1 = var_173; [L388] SORT_1 var_174 = var_174_arg_0 == var_174_arg_1; [L389] SORT_1 var_175_arg_0 = input_6; [L390] SORT_1 var_175_arg_1 = var_174; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, state_136=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_175_arg_0=0, var_175_arg_1=0, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L391] EXPR var_175_arg_0 & var_175_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, state_136=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L391] SORT_1 var_175 = var_175_arg_0 & var_175_arg_1; [L392] EXPR var_175 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, state_136=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L392] var_175 = var_175 & mask_SORT_1 [L393] SORT_1 var_280_arg_0 = var_175; [L394] SORT_3 var_280_arg_1 = input_4; [L395] SORT_3 var_280_arg_2 = state_29; [L396] SORT_3 var_280 = var_280_arg_0 ? var_280_arg_1 : var_280_arg_2; [L397] SORT_1 var_281_arg_0 = input_7; [L398] SORT_3 var_281_arg_1 = var_268; [L399] SORT_3 var_281_arg_2 = var_280; [L400] SORT_3 var_281 = var_281_arg_0 ? var_281_arg_1 : var_281_arg_2; [L401] SORT_3 next_282_arg_1 = var_281; [L402] SORT_19 var_166_arg_0 = var_35; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, state_136=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_166_arg_0=4, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L403] EXPR var_166_arg_0 & mask_SORT_19 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, state_136=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L403] var_166_arg_0 = var_166_arg_0 & mask_SORT_19 [L404] SORT_13 var_166 = var_166_arg_0; [L405] SORT_13 var_167_arg_0 = var_137; [L406] SORT_13 var_167_arg_1 = var_166; [L407] SORT_1 var_167 = var_167_arg_0 == var_167_arg_1; [L408] SORT_1 var_168_arg_0 = input_6; [L409] SORT_1 var_168_arg_1 = var_167; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, state_136=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_168_arg_0=0, var_168_arg_1=0, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L410] EXPR var_168_arg_0 & var_168_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, state_136=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L410] SORT_1 var_168 = var_168_arg_0 & var_168_arg_1; [L411] EXPR var_168 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, state_136=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L411] var_168 = var_168 & mask_SORT_1 [L412] SORT_1 var_283_arg_0 = var_168; [L413] SORT_3 var_283_arg_1 = input_4; [L414] SORT_3 var_283_arg_2 = state_34; [L415] SORT_3 var_283 = var_283_arg_0 ? var_283_arg_1 : var_283_arg_2; [L416] SORT_1 var_284_arg_0 = input_7; [L417] SORT_3 var_284_arg_1 = var_268; [L418] SORT_3 var_284_arg_2 = var_283; [L419] SORT_3 var_284 = var_284_arg_0 ? var_284_arg_1 : var_284_arg_2; [L420] SORT_3 next_285_arg_1 = var_284; [L421] SORT_40 var_159_arg_0 = var_41; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, state_136=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_159_arg_0=3, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L422] EXPR var_159_arg_0 & mask_SORT_40 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, state_136=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L422] var_159_arg_0 = var_159_arg_0 & mask_SORT_40 [L423] SORT_13 var_159 = var_159_arg_0; [L424] SORT_13 var_160_arg_0 = var_137; [L425] SORT_13 var_160_arg_1 = var_159; [L426] SORT_1 var_160 = var_160_arg_0 == var_160_arg_1; [L427] SORT_1 var_161_arg_0 = input_6; [L428] SORT_1 var_161_arg_1 = var_160; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, state_136=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_161_arg_0=0, var_161_arg_1=0, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L429] EXPR var_161_arg_0 & var_161_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, state_136=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L429] SORT_1 var_161 = var_161_arg_0 & var_161_arg_1; [L430] EXPR var_161 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, state_136=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L430] var_161 = var_161 & mask_SORT_1 [L431] SORT_1 var_286_arg_0 = var_161; [L432] SORT_3 var_286_arg_1 = input_4; [L433] SORT_3 var_286_arg_2 = state_39; [L434] SORT_3 var_286 = var_286_arg_0 ? var_286_arg_1 : var_286_arg_2; [L435] SORT_1 var_287_arg_0 = input_7; [L436] SORT_3 var_287_arg_1 = var_268; [L437] SORT_3 var_287_arg_2 = var_286; [L438] SORT_3 var_287 = var_287_arg_0 ? var_287_arg_1 : var_287_arg_2; [L439] SORT_3 next_288_arg_1 = var_287; [L440] SORT_40 var_152_arg_0 = var_46; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, state_136=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_152_arg_0=2, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L441] EXPR var_152_arg_0 & mask_SORT_40 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, state_136=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L441] var_152_arg_0 = var_152_arg_0 & mask_SORT_40 [L442] SORT_13 var_152 = var_152_arg_0; [L443] SORT_13 var_153_arg_0 = var_137; [L444] SORT_13 var_153_arg_1 = var_152; [L445] SORT_1 var_153 = var_153_arg_0 == var_153_arg_1; [L446] SORT_1 var_154_arg_0 = input_6; [L447] SORT_1 var_154_arg_1 = var_153; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, state_136=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_154_arg_0=0, var_154_arg_1=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L448] EXPR var_154_arg_0 & var_154_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, state_136=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L448] SORT_1 var_154 = var_154_arg_0 & var_154_arg_1; [L449] EXPR var_154 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, state_136=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L449] var_154 = var_154 & mask_SORT_1 [L450] SORT_1 var_289_arg_0 = var_154; [L451] SORT_3 var_289_arg_1 = input_4; [L452] SORT_3 var_289_arg_2 = state_45; [L453] SORT_3 var_289 = var_289_arg_0 ? var_289_arg_1 : var_289_arg_2; [L454] SORT_1 var_290_arg_0 = input_7; [L455] SORT_3 var_290_arg_1 = var_268; [L456] SORT_3 var_290_arg_2 = var_289; [L457] SORT_3 var_290 = var_290_arg_0 ? var_290_arg_1 : var_290_arg_2; [L458] SORT_3 next_291_arg_1 = var_290; [L459] SORT_1 var_145_arg_0 = var_51; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, state_136=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_145_arg_0=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L460] EXPR var_145_arg_0 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, state_136=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L460] var_145_arg_0 = var_145_arg_0 & mask_SORT_1 [L461] SORT_13 var_145 = var_145_arg_0; [L462] SORT_13 var_146_arg_0 = var_137; [L463] SORT_13 var_146_arg_1 = var_145; [L464] SORT_1 var_146 = var_146_arg_0 == var_146_arg_1; [L465] SORT_1 var_147_arg_0 = input_6; [L466] SORT_1 var_147_arg_1 = var_146; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, state_136=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_147_arg_0=0, var_147_arg_1=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L467] EXPR var_147_arg_0 & var_147_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, state_136=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L467] SORT_1 var_147 = var_147_arg_0 & var_147_arg_1; [L468] EXPR var_147 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, state_136=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L468] var_147 = var_147 & mask_SORT_1 [L469] SORT_1 var_292_arg_0 = var_147; [L470] SORT_3 var_292_arg_1 = input_4; [L471] SORT_3 var_292_arg_2 = state_50; [L472] SORT_3 var_292 = var_292_arg_0 ? var_292_arg_1 : var_292_arg_2; [L473] SORT_1 var_293_arg_0 = input_7; [L474] SORT_3 var_293_arg_1 = var_268; [L475] SORT_3 var_293_arg_2 = var_292; [L476] SORT_3 var_293 = var_293_arg_0 ? var_293_arg_1 : var_293_arg_2; [L477] SORT_3 next_294_arg_1 = var_293; [L478] SORT_13 var_138_arg_0 = var_137; [L479] SORT_1 var_138 = var_138_arg_0 != 0; [L480] SORT_1 var_139_arg_0 = var_138; [L481] SORT_1 var_139 = ~var_139_arg_0; [L482] SORT_1 var_140_arg_0 = input_6; [L483] SORT_1 var_140_arg_1 = var_139; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, state_136=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_140_arg_0=0, var_140_arg_1=-1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L484] EXPR var_140_arg_0 & var_140_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, state_136=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L484] SORT_1 var_140 = var_140_arg_0 & var_140_arg_1; [L485] EXPR var_140 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, state_136=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L485] var_140 = var_140 & mask_SORT_1 [L486] SORT_1 var_295_arg_0 = var_140; [L487] SORT_3 var_295_arg_1 = input_4; [L488] SORT_3 var_295_arg_2 = state_55; [L489] SORT_3 var_295 = var_295_arg_0 ? var_295_arg_1 : var_295_arg_2; [L490] SORT_1 var_296_arg_0 = input_7; [L491] SORT_3 var_296_arg_1 = var_268; [L492] SORT_3 var_296_arg_2 = var_295; [L493] SORT_3 var_296 = var_296_arg_0 ? var_296_arg_1 : var_296_arg_2; [L494] SORT_3 next_297_arg_1 = var_296; [L495] SORT_1 var_298_arg_0 = input_6; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, state_136=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_25=6, var_268=0, var_298_arg_0=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L496] EXPR var_298_arg_0 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, state_136=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L496] var_298_arg_0 = var_298_arg_0 & mask_SORT_1 [L497] SORT_11 var_298 = var_298_arg_0; [L498] SORT_11 var_299_arg_0 = state_60; [L499] SORT_11 var_299_arg_1 = var_298; [L500] SORT_11 var_299 = var_299_arg_0 + var_299_arg_1; [L501] SORT_1 var_300_arg_0 = input_5; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, state_136=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_25=6, var_268=0, var_299=0, var_300_arg_0=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L502] EXPR var_300_arg_0 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, state_136=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_25=6, var_268=0, var_299=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L502] var_300_arg_0 = var_300_arg_0 & mask_SORT_1 [L503] SORT_11 var_300 = var_300_arg_0; [L504] SORT_11 var_301_arg_0 = var_299; [L505] SORT_11 var_301_arg_1 = var_300; [L506] SORT_11 var_301 = var_301_arg_0 - var_301_arg_1; [L507] SORT_1 var_302_arg_0 = input_7; [L508] SORT_11 var_302_arg_1 = var_81; [L509] SORT_11 var_302_arg_2 = var_301; [L510] SORT_11 var_302 = var_302_arg_0 ? var_302_arg_1 : var_302_arg_2; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, state_136=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_25=6, var_268=0, var_302=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L511] EXPR var_302 & mask_SORT_11 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, state_136=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L511] var_302 = var_302 & mask_SORT_11 [L512] SORT_11 next_303_arg_1 = var_302; [L513] SORT_1 var_228_arg_0 = state_68; [L514] SORT_1 var_228 = ~var_228_arg_0; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, state_136=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_228=-1, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L515] EXPR var_228 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, state_136=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L515] var_228 = var_228 & mask_SORT_1 [L516] SORT_1 var_224_arg_0 = input_8; [L517] SORT_1 var_224_arg_1 = input_6; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, state_136=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_224_arg_0=0, var_224_arg_1=0, var_228=0, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L518] EXPR var_224_arg_0 & var_224_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, state_136=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_228=0, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L518] SORT_1 var_224 = var_224_arg_0 & var_224_arg_1; [L519] SORT_1 var_225_arg_0 = state_68; [L520] SORT_1 var_225_arg_1 = var_224; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, state_136=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_224=0, var_225_arg_0=0, var_225_arg_1=0, var_228=0, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L521] EXPR var_225_arg_0 | var_225_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, state_136=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_224=0, var_228=0, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L521] SORT_1 var_225 = var_225_arg_0 | var_225_arg_1; [L522] SORT_1 var_304_arg_0 = var_228; [L523] SORT_1 var_304_arg_1 = var_225; [L524] SORT_1 var_304_arg_2 = state_68; [L525] SORT_1 var_304 = var_304_arg_0 ? var_304_arg_1 : var_304_arg_2; [L526] SORT_1 var_305_arg_0 = input_7; [L527] SORT_1 var_305_arg_1 = var_111; [L528] SORT_1 var_305_arg_2 = var_304; [L529] SORT_1 var_305 = var_305_arg_0 ? var_305_arg_1 : var_305_arg_2; [L530] SORT_1 next_306_arg_1 = var_305; [L531] SORT_1 var_236_arg_0 = var_85; [L532] SORT_1 var_236_arg_1 = state_69; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, next_306_arg_1=0, state_136=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_224=0, var_228=0, var_236_arg_0=0, var_236_arg_1=0, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0] [L533] EXPR var_236_arg_0 | var_236_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, next_306_arg_1=0, state_136=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_224=0, var_228=0, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0] [L533] SORT_1 var_236 = var_236_arg_0 | var_236_arg_1; [L534] SORT_1 var_307_arg_0 = var_51; [L535] SORT_1 var_307_arg_1 = var_236; [L536] SORT_1 var_307_arg_2 = state_69; [L537] SORT_1 var_307 = var_307_arg_0 ? var_307_arg_1 : var_307_arg_2; [L538] SORT_1 var_308_arg_0 = input_7; [L539] SORT_1 var_308_arg_1 = var_111; [L540] SORT_1 var_308_arg_2 = var_307; [L541] SORT_1 var_308 = var_308_arg_0 ? var_308_arg_1 : var_308_arg_2; [L542] SORT_1 next_309_arg_1 = var_308; [L543] SORT_1 var_248_arg_0 = input_6; [L544] SORT_1 var_248_arg_1 = input_5; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, next_306_arg_1=0, next_309_arg_1=0, state_136=0, state_68=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_224=0, var_228=0, var_248_arg_0=0, var_248_arg_1=0, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0] [L545] EXPR var_248_arg_0 | var_248_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, next_306_arg_1=0, next_309_arg_1=0, state_136=0, state_68=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_224=0, var_228=0, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0] [L545] SORT_1 var_248 = var_248_arg_0 | var_248_arg_1; [L546] SORT_1 var_249_arg_0 = var_248; [L547] SORT_1 var_249_arg_1 = input_7; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, next_306_arg_1=0, next_309_arg_1=0, state_136=0, state_68=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_224=0, var_228=0, var_249_arg_0=0, var_249_arg_1=0, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0] [L548] EXPR var_249_arg_0 | var_249_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, next_306_arg_1=0, next_309_arg_1=0, state_136=0, state_68=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_224=0, var_228=0, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0] [L548] SORT_1 var_249 = var_249_arg_0 | var_249_arg_1; [L549] SORT_1 var_250_arg_0 = var_249; [L550] SORT_1 var_250_arg_1 = state_68; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, next_306_arg_1=0, next_309_arg_1=0, state_136=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_224=0, var_228=0, var_250_arg_0=0, var_250_arg_1=0, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0] [L551] EXPR var_250_arg_0 | var_250_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, next_306_arg_1=0, next_309_arg_1=0, state_136=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_224=0, var_228=0, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0] [L551] SORT_1 var_250 = var_250_arg_0 | var_250_arg_1; [L552] EXPR var_250 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, next_306_arg_1=0, next_309_arg_1=0, state_136=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_224=0, var_228=0, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0] [L552] var_250 = var_250 & mask_SORT_1 [L553] SORT_1 var_310_arg_0 = var_250; [L554] SORT_11 var_310_arg_1 = var_82; [L555] SORT_11 var_310_arg_2 = state_72; [L556] SORT_11 var_310 = var_310_arg_0 ? var_310_arg_1 : var_310_arg_2; [L557] SORT_1 var_311_arg_0 = input_7; [L558] SORT_11 var_311_arg_1 = var_81; [L559] SORT_11 var_311_arg_2 = var_310; [L560] SORT_11 var_311 = var_311_arg_0 ? var_311_arg_1 : var_311_arg_2; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, next_306_arg_1=0, next_309_arg_1=0, state_136=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_224=0, var_228=0, var_25=6, var_268=0, var_30=5, var_311=0, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L561] EXPR var_311 & mask_SORT_11 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, next_306_arg_1=0, next_309_arg_1=0, state_136=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_224=0, var_228=0, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L561] var_311 = var_311 & mask_SORT_11 [L562] SORT_11 next_312_arg_1 = var_311; [L563] SORT_1 var_233_arg_0 = var_224; [L564] SORT_1 var_233_arg_1 = var_228; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, next_306_arg_1=0, next_309_arg_1=0, next_312_arg_1=0, state_136=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_233_arg_0=0, var_233_arg_1=0, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L565] EXPR var_233_arg_0 & var_233_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, next_306_arg_1=0, next_309_arg_1=0, next_312_arg_1=0, state_136=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L565] SORT_1 var_233 = var_233_arg_0 & var_233_arg_1; [L566] EXPR var_233 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, next_306_arg_1=0, next_309_arg_1=0, next_312_arg_1=0, state_136=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L566] var_233 = var_233 & mask_SORT_1 [L567] SORT_1 var_313_arg_0 = var_233; [L568] SORT_3 var_313_arg_1 = input_4; [L569] SORT_3 var_313_arg_2 = state_87; [L570] SORT_3 var_313 = var_313_arg_0 ? var_313_arg_1 : var_313_arg_2; [L571] SORT_1 var_314_arg_0 = input_7; [L572] SORT_3 var_314_arg_1 = var_268; [L573] SORT_3 var_314_arg_2 = var_313; [L574] SORT_3 var_314 = var_314_arg_0 ? var_314_arg_1 : var_314_arg_2; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, next_306_arg_1=0, next_309_arg_1=0, next_312_arg_1=0, state_136=0, var_111=0, var_120=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_314=0, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L575] EXPR var_314 & mask_SORT_3 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, next_306_arg_1=0, next_309_arg_1=0, next_312_arg_1=0, state_136=0, var_111=0, var_120=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L575] var_314 = var_314 & mask_SORT_3 [L576] SORT_3 next_315_arg_1 = var_314; [L577] SORT_1 next_316_arg_1 = var_111; [L578] SORT_1 var_204_arg_0 = input_6; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, next_306_arg_1=0, next_309_arg_1=0, next_312_arg_1=0, next_315_arg_1=0, next_316_arg_1=0, state_136=0, var_111=0, var_120=0, var_15=8, var_204_arg_0=0, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L579] EXPR var_204_arg_0 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, next_306_arg_1=0, next_309_arg_1=0, next_312_arg_1=0, next_315_arg_1=0, next_316_arg_1=0, state_136=0, var_111=0, var_120=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L579] var_204_arg_0 = var_204_arg_0 & mask_SORT_1 [L580] SORT_11 var_204 = var_204_arg_0; [L581] SORT_11 var_205_arg_0 = state_136; [L582] SORT_11 var_205_arg_1 = var_204; [L583] SORT_11 var_205 = var_205_arg_0 + var_205_arg_1; [L584] SORT_1 var_317_arg_0 = var_120; [L585] SORT_11 var_317_arg_1 = var_205; [L586] SORT_11 var_317_arg_2 = state_136; [L587] SORT_11 var_317 = var_317_arg_0 ? var_317_arg_1 : var_317_arg_2; [L588] SORT_1 var_318_arg_0 = input_7; [L589] SORT_11 var_318_arg_1 = var_81; [L590] SORT_11 var_318_arg_2 = var_317; [L591] SORT_11 var_318 = var_318_arg_0 ? var_318_arg_1 : var_318_arg_2; [L592] SORT_11 next_319_arg_1 = var_318; [L594] state_10 = next_270_arg_1 [L595] state_12 = next_273_arg_1 [L596] state_18 = next_276_arg_1 [L597] state_24 = next_279_arg_1 [L598] state_29 = next_282_arg_1 [L599] state_34 = next_285_arg_1 [L600] state_39 = next_288_arg_1 [L601] state_45 = next_291_arg_1 [L602] state_50 = next_294_arg_1 [L603] state_55 = next_297_arg_1 [L604] state_60 = next_303_arg_1 [L605] state_68 = next_306_arg_1 [L606] state_69 = next_309_arg_1 [L607] state_72 = next_312_arg_1 [L608] state_87 = next_315_arg_1 [L609] state_91 = next_316_arg_1 [L610] state_136 = next_319_arg_1 [L88] input_2 = __VERIFIER_nondet_uchar() [L89] input_4 = __VERIFIER_nondet_uchar() [L90] input_5 = __VERIFIER_nondet_uchar() [L91] input_6 = __VERIFIER_nondet_uchar() [L92] input_7 = __VERIFIER_nondet_uchar() [L93] EXPR input_7 & mask_SORT_1 VAL [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L93] input_7 = input_7 & mask_SORT_1 [L94] input_8 = __VERIFIER_nondet_uchar() [L95] input_9 = __VERIFIER_nondet_uchar() [L96] input_109 = __VERIFIER_nondet_uchar() [L98] SORT_1 var_93_arg_0 = input_7; [L99] SORT_1 var_93_arg_1 = state_91; [L100] SORT_1 var_93 = var_93_arg_0 == var_93_arg_1; [L101] SORT_1 var_94_arg_0 = var_51; [L102] SORT_1 var_94 = ~var_94_arg_0; [L103] SORT_1 var_95_arg_0 = var_93; [L104] SORT_1 var_95_arg_1 = var_94; VAL [input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_95_arg_0=0, var_95_arg_1=-2] [L105] EXPR var_95_arg_0 | var_95_arg_1 VAL [input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L105] SORT_1 var_95 = var_95_arg_0 | var_95_arg_1; [L106] EXPR var_95 & mask_SORT_1 VAL [input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L106] var_95 = var_95 & mask_SORT_1 [L107] SORT_1 constr_96_arg_0 = var_95; VAL [constr_96_arg_0=1, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L108] CALL assume_abort_if_not(constr_96_arg_0) VAL [\old(cond)=1] [L22] COND FALSE !(!cond) VAL [\old(cond)=1] [L108] RET assume_abort_if_not(constr_96_arg_0) VAL [constr_96_arg_0=1, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L109] SORT_13 var_65_arg_0 = var_64; VAL [constr_96_arg_0=1, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_65_arg_0=9, var_81=0] [L110] EXPR var_65_arg_0 & mask_SORT_13 VAL [constr_96_arg_0=1, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L110] var_65_arg_0 = var_65_arg_0 & mask_SORT_13 [L111] SORT_11 var_65 = var_65_arg_0; [L112] SORT_11 var_66_arg_0 = state_60; [L113] SORT_11 var_66_arg_1 = var_65; [L114] SORT_1 var_66 = var_66_arg_0 == var_66_arg_1; [L115] SORT_1 var_97_arg_0 = var_66; [L116] SORT_1 var_97 = ~var_97_arg_0; [L117] SORT_1 var_98_arg_0 = input_6; [L118] SORT_1 var_98 = ~var_98_arg_0; [L119] SORT_1 var_99_arg_0 = var_97; [L120] SORT_1 var_99_arg_1 = var_98; VAL [constr_96_arg_0=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_99_arg_0=-1, var_99_arg_1=-1] [L121] EXPR var_99_arg_0 | var_99_arg_1 VAL [constr_96_arg_0=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L121] SORT_1 var_99 = var_99_arg_0 | var_99_arg_1; [L122] SORT_1 var_100_arg_0 = var_51; [L123] SORT_1 var_100 = ~var_100_arg_0; [L124] SORT_1 var_101_arg_0 = var_99; [L125] SORT_1 var_101_arg_1 = var_100; VAL [constr_96_arg_0=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_101_arg_0=255, var_101_arg_1=-2, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L126] EXPR var_101_arg_0 | var_101_arg_1 VAL [constr_96_arg_0=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L126] SORT_1 var_101 = var_101_arg_0 | var_101_arg_1; [L127] EXPR var_101 & mask_SORT_1 VAL [constr_96_arg_0=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L127] var_101 = var_101 & mask_SORT_1 [L128] SORT_1 constr_102_arg_0 = var_101; VAL [constr_102_arg_0=1, constr_96_arg_0=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L129] CALL assume_abort_if_not(constr_102_arg_0) VAL [\old(cond)=1] [L22] COND FALSE !(!cond) VAL [\old(cond)=1] [L129] RET assume_abort_if_not(constr_102_arg_0) VAL [constr_102_arg_0=1, constr_96_arg_0=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L130] SORT_11 var_61_arg_0 = state_60; [L131] SORT_1 var_61 = var_61_arg_0 != 0; [L132] SORT_1 var_62_arg_0 = var_61; [L133] SORT_1 var_62 = ~var_62_arg_0; [L134] SORT_1 var_103_arg_0 = var_62; [L135] SORT_1 var_103 = ~var_103_arg_0; [L136] SORT_1 var_104_arg_0 = input_5; [L137] SORT_1 var_104 = ~var_104_arg_0; [L138] SORT_1 var_105_arg_0 = var_103; [L139] SORT_1 var_105_arg_1 = var_104; VAL [constr_102_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_105_arg_0=-256, var_105_arg_1=-2, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L140] EXPR var_105_arg_0 | var_105_arg_1 VAL [constr_102_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L140] SORT_1 var_105 = var_105_arg_0 | var_105_arg_1; [L141] SORT_1 var_106_arg_0 = var_51; [L142] SORT_1 var_106 = ~var_106_arg_0; [L143] SORT_1 var_107_arg_0 = var_105; [L144] SORT_1 var_107_arg_1 = var_106; VAL [constr_102_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_107_arg_0=254, var_107_arg_1=-2, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L145] EXPR var_107_arg_0 | var_107_arg_1 VAL [constr_102_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L145] SORT_1 var_107 = var_107_arg_0 | var_107_arg_1; [L146] EXPR var_107 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L146] var_107 = var_107 & mask_SORT_1 [L147] SORT_1 constr_108_arg_0 = var_107; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L148] CALL assume_abort_if_not(constr_108_arg_0) VAL [\old(cond)=1] [L22] COND FALSE !(!cond) VAL [\old(cond)=1] [L148] RET assume_abort_if_not(constr_108_arg_0) VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L150] SORT_1 var_112_arg_0 = state_91; [L151] SORT_1 var_112_arg_1 = var_111; [L152] SORT_1 var_112_arg_2 = var_51; [L153] SORT_1 var_112 = var_112_arg_0 ? var_112_arg_1 : var_112_arg_2; [L154] SORT_1 var_70_arg_0 = state_69; [L155] SORT_1 var_70 = ~var_70_arg_0; [L156] SORT_1 var_71_arg_0 = state_68; [L157] SORT_1 var_71_arg_1 = var_70; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_71_arg_0=0, var_71_arg_1=-1, var_81=0] [L158] EXPR var_71_arg_0 & var_71_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L158] SORT_1 var_71 = var_71_arg_0 & var_71_arg_1; [L159] SORT_11 var_73_arg_0 = state_72; [L160] SORT_1 var_73 = var_73_arg_0 != 0; [L161] SORT_1 var_74_arg_0 = var_71; [L162] SORT_1 var_74_arg_1 = var_73; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_74_arg_0=0, var_74_arg_1=0, var_81=0] [L163] EXPR var_74_arg_0 & var_74_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L163] SORT_1 var_74 = var_74_arg_0 & var_74_arg_1; [L164] SORT_1 var_75_arg_0 = state_68; [L165] SORT_1 var_75 = ~var_75_arg_0; [L166] SORT_1 var_76_arg_0 = input_6; [L167] SORT_1 var_76_arg_1 = var_75; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_74=0, var_76_arg_0=0, var_76_arg_1=-1, var_81=0] [L168] EXPR var_76_arg_0 & var_76_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_74=0, var_81=0] [L168] SORT_1 var_76 = var_76_arg_0 & var_76_arg_1; [L169] SORT_1 var_77_arg_0 = var_76; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_74=0, var_77_arg_0=0, var_81=0] [L170] EXPR var_77_arg_0 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_74=0, var_81=0] [L170] var_77_arg_0 = var_77_arg_0 & mask_SORT_1 [L171] SORT_11 var_77 = var_77_arg_0; [L172] SORT_11 var_78_arg_0 = state_72; [L173] SORT_11 var_78_arg_1 = var_77; [L174] SORT_11 var_78 = var_78_arg_0 + var_78_arg_1; [L175] SORT_1 var_79_arg_0 = input_5; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_74=0, var_78=0, var_79_arg_0=1, var_81=0] [L176] EXPR var_79_arg_0 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_74=0, var_78=0, var_81=0] [L176] var_79_arg_0 = var_79_arg_0 & mask_SORT_1 [L177] SORT_11 var_79 = var_79_arg_0; [L178] SORT_11 var_80_arg_0 = var_78; [L179] SORT_11 var_80_arg_1 = var_79; [L180] SORT_11 var_80 = var_80_arg_0 - var_80_arg_1; [L181] SORT_1 var_82_arg_0 = input_7; [L182] SORT_11 var_82_arg_1 = var_81; [L183] SORT_11 var_82_arg_2 = var_80; [L184] SORT_11 var_82 = var_82_arg_0 ? var_82_arg_1 : var_82_arg_2; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_74=0, var_81=0, var_82=0] [L185] EXPR var_82 & mask_SORT_11 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_74=0, var_81=0] [L185] var_82 = var_82 & mask_SORT_11 [L186] SORT_11 var_83_arg_0 = var_82; [L187] SORT_1 var_83 = var_83_arg_0 != 0; [L188] SORT_1 var_84_arg_0 = var_83; [L189] SORT_1 var_84 = ~var_84_arg_0; [L190] SORT_1 var_85_arg_0 = var_74; [L191] SORT_1 var_85_arg_1 = var_84; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85_arg_0=0, var_85_arg_1=-1] [L192] EXPR var_85_arg_0 & var_85_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0] [L192] SORT_1 var_85 = var_85_arg_0 & var_85_arg_1; [L193] SORT_1 var_86_arg_0 = var_85; [L194] SORT_1 var_86 = ~var_86_arg_0; [L195] SORT_11 var_14_arg_0 = state_12; [L196] SORT_13 var_14 = var_14_arg_0 >> 0; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L197] EXPR var_14 & mask_SORT_13 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L197] var_14 = var_14 & mask_SORT_13 [L198] SORT_13 var_56_arg_0 = var_14; [L199] SORT_1 var_56 = var_56_arg_0 != 0; [L200] SORT_1 var_57_arg_0 = var_56; [L201] SORT_1 var_57 = ~var_57_arg_0; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_57=-1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L202] EXPR var_57 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L202] var_57 = var_57 & mask_SORT_1 [L203] SORT_1 var_52_arg_0 = var_51; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_52_arg_0=1, var_57=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L204] EXPR var_52_arg_0 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_57=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L204] var_52_arg_0 = var_52_arg_0 & mask_SORT_1 [L205] SORT_13 var_52 = var_52_arg_0; [L206] SORT_13 var_53_arg_0 = var_14; [L207] SORT_13 var_53_arg_1 = var_52; [L208] SORT_1 var_53 = var_53_arg_0 == var_53_arg_1; [L209] SORT_40 var_47_arg_0 = var_46; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_47_arg_0=2, var_51=1, var_53=0, var_57=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L210] EXPR var_47_arg_0 & mask_SORT_40 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_53=0, var_57=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L210] var_47_arg_0 = var_47_arg_0 & mask_SORT_40 [L211] SORT_13 var_47 = var_47_arg_0; [L212] SORT_13 var_48_arg_0 = var_14; [L213] SORT_13 var_48_arg_1 = var_47; [L214] SORT_1 var_48 = var_48_arg_0 == var_48_arg_1; [L215] SORT_40 var_42_arg_0 = var_41; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_42_arg_0=3, var_46=2, var_48=0, var_51=1, var_53=0, var_57=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L216] EXPR var_42_arg_0 & mask_SORT_40 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_48=0, var_51=1, var_53=0, var_57=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L216] var_42_arg_0 = var_42_arg_0 & mask_SORT_40 [L217] SORT_13 var_42 = var_42_arg_0; [L218] SORT_13 var_43_arg_0 = var_14; [L219] SORT_13 var_43_arg_1 = var_42; [L220] SORT_1 var_43 = var_43_arg_0 == var_43_arg_1; [L221] SORT_19 var_36_arg_0 = var_35; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_36_arg_0=4, var_41=3, var_43=0, var_46=2, var_48=0, var_51=1, var_53=0, var_57=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L222] EXPR var_36_arg_0 & mask_SORT_19 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_43=0, var_46=2, var_48=0, var_51=1, var_53=0, var_57=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L222] var_36_arg_0 = var_36_arg_0 & mask_SORT_19 [L223] SORT_13 var_36 = var_36_arg_0; [L224] SORT_13 var_37_arg_0 = var_14; [L225] SORT_13 var_37_arg_1 = var_36; [L226] SORT_1 var_37 = var_37_arg_0 == var_37_arg_1; [L227] SORT_19 var_31_arg_0 = var_30; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_31_arg_0=5, var_35=4, var_37=0, var_41=3, var_43=0, var_46=2, var_48=0, var_51=1, var_53=0, var_57=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L228] EXPR var_31_arg_0 & mask_SORT_19 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_37=0, var_41=3, var_43=0, var_46=2, var_48=0, var_51=1, var_53=0, var_57=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L228] var_31_arg_0 = var_31_arg_0 & mask_SORT_19 [L229] SORT_13 var_31 = var_31_arg_0; [L230] SORT_13 var_32_arg_0 = var_14; [L231] SORT_13 var_32_arg_1 = var_31; [L232] SORT_1 var_32 = var_32_arg_0 == var_32_arg_1; [L233] SORT_19 var_26_arg_0 = var_25; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_26_arg_0=6, var_30=5, var_32=0, var_35=4, var_37=0, var_41=3, var_43=0, var_46=2, var_48=0, var_51=1, var_53=0, var_57=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L234] EXPR var_26_arg_0 & mask_SORT_19 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_32=0, var_35=4, var_37=0, var_41=3, var_43=0, var_46=2, var_48=0, var_51=1, var_53=0, var_57=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L234] var_26_arg_0 = var_26_arg_0 & mask_SORT_19 [L235] SORT_13 var_26 = var_26_arg_0; [L236] SORT_13 var_27_arg_0 = var_14; [L237] SORT_13 var_27_arg_1 = var_26; [L238] SORT_1 var_27 = var_27_arg_0 == var_27_arg_1; [L239] SORT_19 var_21_arg_0 = var_20; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_14=0, var_15=8, var_20=7, var_21_arg_0=7, var_25=6, var_268=0, var_27=1, var_30=5, var_32=0, var_35=4, var_37=0, var_41=3, var_43=0, var_46=2, var_48=0, var_51=1, var_53=0, var_57=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L240] EXPR var_21_arg_0 & mask_SORT_19 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_27=1, var_30=5, var_32=0, var_35=4, var_37=0, var_41=3, var_43=0, var_46=2, var_48=0, var_51=1, var_53=0, var_57=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L240] var_21_arg_0 = var_21_arg_0 & mask_SORT_19 [L241] SORT_13 var_21 = var_21_arg_0; [L242] SORT_13 var_22_arg_0 = var_14; [L243] SORT_13 var_22_arg_1 = var_21; [L244] SORT_1 var_22 = var_22_arg_0 == var_22_arg_1; [L245] SORT_13 var_16_arg_0 = var_14; [L246] SORT_13 var_16_arg_1 = var_15; [L247] SORT_1 var_16 = var_16_arg_0 == var_16_arg_1; [L248] SORT_1 var_17_arg_0 = var_16; [L249] SORT_3 var_17_arg_1 = state_10; [L250] SORT_3 var_17_arg_2 = input_9; [L251] SORT_3 var_17 = var_17_arg_0 ? var_17_arg_1 : var_17_arg_2; [L252] SORT_1 var_23_arg_0 = var_22; [L253] SORT_3 var_23_arg_1 = state_18; [L254] SORT_3 var_23_arg_2 = var_17; [L255] SORT_3 var_23 = var_23_arg_0 ? var_23_arg_1 : var_23_arg_2; [L256] SORT_1 var_28_arg_0 = var_27; [L257] SORT_3 var_28_arg_1 = state_24; [L258] SORT_3 var_28_arg_2 = var_23; [L259] SORT_3 var_28 = var_28_arg_0 ? var_28_arg_1 : var_28_arg_2; [L260] SORT_1 var_33_arg_0 = var_32; [L261] SORT_3 var_33_arg_1 = state_29; [L262] SORT_3 var_33_arg_2 = var_28; [L263] SORT_3 var_33 = var_33_arg_0 ? var_33_arg_1 : var_33_arg_2; [L264] SORT_1 var_38_arg_0 = var_37; [L265] SORT_3 var_38_arg_1 = state_34; [L266] SORT_3 var_38_arg_2 = var_33; [L267] SORT_3 var_38 = var_38_arg_0 ? var_38_arg_1 : var_38_arg_2; [L268] SORT_1 var_44_arg_0 = var_43; [L269] SORT_3 var_44_arg_1 = state_39; [L270] SORT_3 var_44_arg_2 = var_38; [L271] SORT_3 var_44 = var_44_arg_0 ? var_44_arg_1 : var_44_arg_2; [L272] SORT_1 var_49_arg_0 = var_48; [L273] SORT_3 var_49_arg_1 = state_45; [L274] SORT_3 var_49_arg_2 = var_44; [L275] SORT_3 var_49 = var_49_arg_0 ? var_49_arg_1 : var_49_arg_2; [L276] SORT_1 var_54_arg_0 = var_53; [L277] SORT_3 var_54_arg_1 = state_50; [L278] SORT_3 var_54_arg_2 = var_49; [L279] SORT_3 var_54 = var_54_arg_0 ? var_54_arg_1 : var_54_arg_2; [L280] SORT_1 var_58_arg_0 = var_57; [L281] SORT_3 var_58_arg_1 = state_55; [L282] SORT_3 var_58_arg_2 = var_54; [L283] SORT_3 var_58 = var_58_arg_0 ? var_58_arg_1 : var_58_arg_2; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_58=0, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L284] EXPR var_58 & mask_SORT_3 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L284] var_58 = var_58 & mask_SORT_3 [L285] SORT_3 var_88_arg_0 = state_87; [L286] SORT_3 var_88_arg_1 = var_58; [L287] SORT_1 var_88 = var_88_arg_0 == var_88_arg_1; [L288] SORT_1 var_89_arg_0 = var_86; [L289] SORT_1 var_89_arg_1 = var_88; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0, var_89_arg_0=-1, var_89_arg_1=1] [L290] EXPR var_89_arg_0 | var_89_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L290] SORT_1 var_89 = var_89_arg_0 | var_89_arg_1; [L291] SORT_1 var_110_arg_0 = state_91; [L292] SORT_1 var_110_arg_1 = input_109; [L293] SORT_1 var_110_arg_2 = var_89; [L294] SORT_1 var_110 = var_110_arg_0 ? var_110_arg_1 : var_110_arg_2; [L295] SORT_1 var_113_arg_0 = var_110; [L296] SORT_1 var_113 = ~var_113_arg_0; [L297] SORT_1 var_114_arg_0 = var_112; [L298] SORT_1 var_114_arg_1 = var_113; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_114_arg_0=1, var_114_arg_1=-1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L299] EXPR var_114_arg_0 & var_114_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L299] SORT_1 var_114 = var_114_arg_0 & var_114_arg_1; [L300] EXPR var_114 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=255, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L300] var_114 = var_114 & mask_SORT_1 [L301] SORT_1 bad_115_arg_0 = var_114; [L302] CALL __VERIFIER_assert(!(bad_115_arg_0)) [L21] COND TRUE !(cond) [L21] reach_error() - StatisticsResult: Ultimate Automizer benchmark data CFG has 2 procedures, 392 locations, 1 error locations. Started 1 CEGAR loops. OverallTime: 339.1s, OverallIterations: 57, TraceHistogramMax: 6, PathProgramHistogramMax: 1, EmptinessCheckTime: 0.4s, AutomataDifference: 137.1s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, HoareTripleCheckerStatistics: 0 mSolverCounterUnknown, 102660 SdHoareTripleChecker+Valid, 79.1s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 102560 mSDsluCounter, 232478 SdHoareTripleChecker+Invalid, 68.4s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 0 IncrementalHoareTripleChecker+Unchecked, 199701 mSDsCounter, 602 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 103767 IncrementalHoareTripleChecker+Invalid, 104369 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 602 mSolverCounterUnsat, 32777 mSDtfsCounter, 103767 mSolverCounterSat, 1.2s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Unknown, PredicateUnifierStatistics: 0 DeclaredPredicates, 7598 GetRequests, 6311 SyntacticMatches, 5 SemanticMatches, 1282 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 112021 ImplicationChecksByTransitivity, 58.5s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=39810occurred in iteration=56, InterpolantAutomatonStates: 1013, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 5.8s AutomataMinimizationTime, 56 MinimizatonAttempts, 142958 StatesRemovedByMinimization, 23 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 3.1s SsaConstructionTime, 53.0s SatisfiabilityAnalysisTime, 113.6s InterpolantComputationTime, 19515 NumberOfCodeBlocks, 19515 NumberOfCodeBlocksAsserted, 70 NumberOfCheckSat, 21206 ConstructedInterpolants, 1 QuantifiedInterpolants, 152170 SizeOfPredicates, 89 NumberOfNonLiveVariables, 25514 ConjunctsInSsa, 872 ConjunctsInUnsatCore, 75 InterpolantComputations, 51 PerfectInterpolantSequences, 7170/8198 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available, ConComCheckerStatistics: No data available RESULT: Ultimate could not prove your program: unable to determine feasibility of some traces [2024-11-27 20:14:08,789 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25b25d56-1da7-44e1-806b-92cb0bdd2bbb/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Forceful destruction successful, exit code 0 Received shutdown request... --- End real Ultimate output --- Execution finished normally Using bit-precise analysis Retrying with bit-precise analysis ### Bit-precise run ### Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25b25d56-1da7-44e1-806b-92cb0bdd2bbb/bin/uautomizer-verify-aQ6SnzHsRB/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25b25d56-1da7-44e1-806b-92cb0bdd2bbb/bin/uautomizer-verify-aQ6SnzHsRB/plugins/org.eclipse.equinox.launcher_1.6.800.v20240513-1750.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25b25d56-1da7-44e1-806b-92cb0bdd2bbb/bin/uautomizer-verify-aQ6SnzHsRB/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25b25d56-1da7-44e1-806b-92cb0bdd2bbb/bin/uautomizer-verify-aQ6SnzHsRB/config/AutomizerReach.xml -i ../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w8_d8_e0.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25b25d56-1da7-44e1-806b-92cb0bdd2bbb/bin/uautomizer-verify-aQ6SnzHsRB/config/svcomp-Reach-64bit-Automizer_Bitvector.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25b25d56-1da7-44e1-806b-92cb0bdd2bbb/bin/uautomizer-verify-aQ6SnzHsRB --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash 892a8506f942e825df8a32caf9cdaec45fd7cb5b4dbda5bc8acf67b64cc58b84 --- Real Ultimate output --- This is Ultimate 0.3.0-dev-d790fec [2024-11-27 20:14:12,039 INFO L188 SettingsManager]: Resetting all preferences to default values... [2024-11-27 20:14:12,199 INFO L114 SettingsManager]: Loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25b25d56-1da7-44e1-806b-92cb0bdd2bbb/bin/uautomizer-verify-aQ6SnzHsRB/config/svcomp-Reach-64bit-Automizer_Bitvector.epf [2024-11-27 20:14:12,211 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2024-11-27 20:14:12,212 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2024-11-27 20:14:12,263 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2024-11-27 20:14:12,265 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2024-11-27 20:14:12,265 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2024-11-27 20:14:12,266 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2024-11-27 20:14:12,266 INFO L153 SettingsManager]: * Use memory slicer=true [2024-11-27 20:14:12,267 INFO L151 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2024-11-27 20:14:12,268 INFO L153 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2024-11-27 20:14:12,268 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2024-11-27 20:14:12,268 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2024-11-27 20:14:12,269 INFO L153 SettingsManager]: * Use SBE=true [2024-11-27 20:14:12,270 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2024-11-27 20:14:12,270 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2024-11-27 20:14:12,270 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2024-11-27 20:14:12,270 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2024-11-27 20:14:12,270 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2024-11-27 20:14:12,271 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2024-11-27 20:14:12,271 INFO L153 SettingsManager]: * Adapt memory model on pointer casts if necessary=true [2024-11-27 20:14:12,271 INFO L153 SettingsManager]: * Use bitvectors instead of ints=true [2024-11-27 20:14:12,271 INFO L153 SettingsManager]: * Memory model=HoenickeLindenmann_4ByteResolution [2024-11-27 20:14:12,271 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2024-11-27 20:14:12,271 INFO L153 SettingsManager]: * Behaviour of calls to undefined functions=OVERAPPROXIMATE_BEHAVIOUR [2024-11-27 20:14:12,272 INFO L153 SettingsManager]: * Use constant arrays=true [2024-11-27 20:14:12,272 INFO L151 SettingsManager]: Preferences of IcfgBuilder differ from their defaults: [2024-11-27 20:14:12,272 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-11-27 20:14:12,272 INFO L153 SettingsManager]: * Only consider context switches at boundaries of atomic blocks=true [2024-11-27 20:14:12,272 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2024-11-27 20:14:12,273 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2024-11-27 20:14:12,274 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2024-11-27 20:14:12,274 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-11-27 20:14:12,274 INFO L153 SettingsManager]: * Only consider context switches at boundaries of atomic blocks=true [2024-11-27 20:14:12,274 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2024-11-27 20:14:12,274 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2024-11-27 20:14:12,274 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2024-11-27 20:14:12,274 INFO L153 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2024-11-27 20:14:12,275 INFO L153 SettingsManager]: * Compute procedure contracts=false [2024-11-27 20:14:12,275 INFO L153 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopHeads [2024-11-27 20:14:12,275 INFO L153 SettingsManager]: * Trace refinement strategy=FOX [2024-11-27 20:14:12,275 INFO L153 SettingsManager]: * Command for external solver=cvc4 --incremental --print-success --lang smt [2024-11-27 20:14:12,275 INFO L153 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false [2024-11-27 20:14:12,275 INFO L153 SettingsManager]: * Automaton type used in concurrency analysis=PETRI_NET [2024-11-27 20:14:12,276 INFO L153 SettingsManager]: * Order on configurations for Petri net unfoldings=DBO [2024-11-27 20:14:12,276 INFO L153 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2024-11-27 20:14:12,276 INFO L153 SettingsManager]: * Looper check in Petri net analysis=SEMANTIC Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25b25d56-1da7-44e1-806b-92cb0bdd2bbb/bin/uautomizer-verify-aQ6SnzHsRB Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 892a8506f942e825df8a32caf9cdaec45fd7cb5b4dbda5bc8acf67b64cc58b84 [2024-11-27 20:14:12,684 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2024-11-27 20:14:12,695 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2024-11-27 20:14:12,698 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2024-11-27 20:14:12,700 INFO L270 PluginConnector]: Initializing CDTParser... [2024-11-27 20:14:12,700 INFO L274 PluginConnector]: CDTParser initialized [2024-11-27 20:14:12,702 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25b25d56-1da7-44e1-806b-92cb0bdd2bbb/bin/uautomizer-verify-aQ6SnzHsRB/../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w8_d8_e0.c [2024-11-27 20:14:16,099 INFO L533 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25b25d56-1da7-44e1-806b-92cb0bdd2bbb/bin/uautomizer-verify-aQ6SnzHsRB/data/bc0130c4d/ea3046006a8842b9b915d5bf7dbf0457/FLAG86dba68b4 [2024-11-27 20:14:16,475 INFO L384 CDTParser]: Found 1 translation units. [2024-11-27 20:14:16,476 INFO L180 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25b25d56-1da7-44e1-806b-92cb0bdd2bbb/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w8_d8_e0.c [2024-11-27 20:14:16,490 INFO L427 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25b25d56-1da7-44e1-806b-92cb0bdd2bbb/bin/uautomizer-verify-aQ6SnzHsRB/data/bc0130c4d/ea3046006a8842b9b915d5bf7dbf0457/FLAG86dba68b4 [2024-11-27 20:14:16,508 INFO L435 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25b25d56-1da7-44e1-806b-92cb0bdd2bbb/bin/uautomizer-verify-aQ6SnzHsRB/data/bc0130c4d/ea3046006a8842b9b915d5bf7dbf0457 [2024-11-27 20:14:16,511 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2024-11-27 20:14:16,512 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2024-11-27 20:14:16,514 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2024-11-27 20:14:16,514 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2024-11-27 20:14:16,518 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2024-11-27 20:14:16,519 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 27.11 08:14:16" (1/1) ... [2024-11-27 20:14:16,520 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@10cfc38f and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.11 08:14:16, skipping insertion in model container [2024-11-27 20:14:16,520 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 27.11 08:14:16" (1/1) ... [2024-11-27 20:14:16,558 INFO L175 MainTranslator]: Built tables and reachable declarations [2024-11-27 20:14:16,744 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25b25d56-1da7-44e1-806b-92cb0bdd2bbb/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w8_d8_e0.c[1278,1291] [2024-11-27 20:14:16,937 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-11-27 20:14:16,953 INFO L200 MainTranslator]: Completed pre-run [2024-11-27 20:14:16,963 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25b25d56-1da7-44e1-806b-92cb0bdd2bbb/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w8_d8_e0.c[1278,1291] [2024-11-27 20:14:17,058 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-11-27 20:14:17,083 INFO L204 MainTranslator]: Completed translation [2024-11-27 20:14:17,087 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.11 08:14:17 WrapperNode [2024-11-27 20:14:17,087 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2024-11-27 20:14:17,088 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2024-11-27 20:14:17,088 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2024-11-27 20:14:17,088 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2024-11-27 20:14:17,099 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.11 08:14:17" (1/1) ... [2024-11-27 20:14:17,122 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.11 08:14:17" (1/1) ... [2024-11-27 20:14:17,189 INFO L138 Inliner]: procedures = 17, calls = 11, calls flagged for inlining = 3, calls inlined = 3, statements flattened = 638 [2024-11-27 20:14:17,190 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2024-11-27 20:14:17,190 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2024-11-27 20:14:17,190 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2024-11-27 20:14:17,190 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2024-11-27 20:14:17,199 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.11 08:14:17" (1/1) ... [2024-11-27 20:14:17,199 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.11 08:14:17" (1/1) ... [2024-11-27 20:14:17,209 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.11 08:14:17" (1/1) ... [2024-11-27 20:14:17,231 INFO L175 MemorySlicer]: Split 2 memory accesses to 1 slices as follows [2]. 100 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2]. The 0 writes are split as follows [0]. [2024-11-27 20:14:17,232 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.11 08:14:17" (1/1) ... [2024-11-27 20:14:17,232 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.11 08:14:17" (1/1) ... [2024-11-27 20:14:17,255 INFO L184 PluginConnector]: Executing the observer ReplaceArrayAssignments from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.11 08:14:17" (1/1) ... [2024-11-27 20:14:17,260 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.11 08:14:17" (1/1) ... [2024-11-27 20:14:17,267 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.11 08:14:17" (1/1) ... [2024-11-27 20:14:17,273 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.11 08:14:17" (1/1) ... [2024-11-27 20:14:17,275 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.11 08:14:17" (1/1) ... [2024-11-27 20:14:17,285 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2024-11-27 20:14:17,286 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2024-11-27 20:14:17,287 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2024-11-27 20:14:17,287 INFO L274 PluginConnector]: RCFGBuilder initialized [2024-11-27 20:14:17,288 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.11 08:14:17" (1/1) ... [2024-11-27 20:14:17,296 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2024-11-27 20:14:17,310 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25b25d56-1da7-44e1-806b-92cb0bdd2bbb/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-27 20:14:17,325 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25b25d56-1da7-44e1-806b-92cb0bdd2bbb/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (exit command is (exit), workingDir is null) [2024-11-27 20:14:17,331 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25b25d56-1da7-44e1-806b-92cb0bdd2bbb/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Waiting until timeout for monitored process [2024-11-27 20:14:17,358 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2024-11-27 20:14:17,358 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~intINTTYPE1#0 [2024-11-27 20:14:17,358 INFO L130 BoogieDeclarations]: Found specification of procedure assume_abort_if_not [2024-11-27 20:14:17,359 INFO L138 BoogieDeclarations]: Found implementation of procedure assume_abort_if_not [2024-11-27 20:14:17,359 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2024-11-27 20:14:17,359 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2024-11-27 20:14:17,598 INFO L234 CfgBuilder]: Building ICFG [2024-11-27 20:14:17,600 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2024-11-27 20:14:18,261 INFO L? ?]: Removed 198 outVars from TransFormulas that were not future-live. [2024-11-27 20:14:18,262 INFO L283 CfgBuilder]: Performing block encoding [2024-11-27 20:14:18,273 INFO L307 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2024-11-27 20:14:18,274 INFO L312 CfgBuilder]: Removed 1 assume(true) statements. [2024-11-27 20:14:18,274 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 27.11 08:14:18 BoogieIcfgContainer [2024-11-27 20:14:18,275 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2024-11-27 20:14:18,279 INFO L112 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2024-11-27 20:14:18,279 INFO L270 PluginConnector]: Initializing TraceAbstraction... [2024-11-27 20:14:18,287 INFO L274 PluginConnector]: TraceAbstraction initialized [2024-11-27 20:14:18,287 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 27.11 08:14:16" (1/3) ... [2024-11-27 20:14:18,288 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@29ed780b and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 27.11 08:14:18, skipping insertion in model container [2024-11-27 20:14:18,289 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.11 08:14:17" (2/3) ... [2024-11-27 20:14:18,289 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@29ed780b and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 27.11 08:14:18, skipping insertion in model container [2024-11-27 20:14:18,292 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 27.11 08:14:18" (3/3) ... [2024-11-27 20:14:18,293 INFO L128 eAbstractionObserver]: Analyzing ICFG btor2c-lazyMod.circular_pointer_top_w8_d8_e0.c [2024-11-27 20:14:18,313 INFO L216 ceAbstractionStarter]: Automizer settings: Hoare:LoopHeads NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2024-11-27 20:14:18,317 INFO L151 ceAbstractionStarter]: Applying trace abstraction to ICFG btor2c-lazyMod.circular_pointer_top_w8_d8_e0.c that has 2 procedures, 20 locations, 1 initial locations, 1 loop locations, and 1 error locations. [2024-11-27 20:14:18,382 INFO L332 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2024-11-27 20:14:18,399 INFO L333 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mAutomataTypeConcurrency=PETRI_NET, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopHeads, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@14c9fddc, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2024-11-27 20:14:18,400 INFO L334 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2024-11-27 20:14:18,405 INFO L276 IsEmpty]: Start isEmpty. Operand has 20 states, 14 states have (on average 1.2857142857142858) internal successors, (18), 15 states have internal predecessors, (18), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-27 20:14:18,412 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2024-11-27 20:14:18,412 INFO L210 NwaCegarLoop]: Found error trace [2024-11-27 20:14:18,413 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-27 20:14:18,414 INFO L396 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-27 20:14:18,419 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-27 20:14:18,420 INFO L85 PathProgramCache]: Analyzing trace with hash 1676994902, now seen corresponding path program 1 times [2024-11-27 20:14:18,437 INFO L118 FreeRefinementEngine]: Executing refinement strategy FOX [2024-11-27 20:14:18,439 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1805114292] [2024-11-27 20:14:18,439 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-27 20:14:18,440 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-27 20:14:18,440 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25b25d56-1da7-44e1-806b-92cb0bdd2bbb/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-27 20:14:18,444 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25b25d56-1da7-44e1-806b-92cb0bdd2bbb/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-27 20:14:18,446 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25b25d56-1da7-44e1-806b-92cb0bdd2bbb/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2024-11-27 20:14:18,885 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-27 20:14:18,894 INFO L256 TraceCheckSpWp]: Trace formula consists of 262 conjuncts, 19 conjuncts are in the unsatisfiable core [2024-11-27 20:14:18,909 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-27 20:14:19,418 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-11-27 20:14:19,418 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-27 20:14:19,717 INFO L136 FreeRefinementEngine]: Strategy FOX found an infeasible trace [2024-11-27 20:14:19,717 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1805114292] [2024-11-27 20:14:19,718 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1805114292] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-27 20:14:19,720 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [850951805] [2024-11-27 20:14:19,720 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-27 20:14:19,720 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2024-11-27 20:14:19,720 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25b25d56-1da7-44e1-806b-92cb0bdd2bbb/bin/uautomizer-verify-aQ6SnzHsRB/cvc4 [2024-11-27 20:14:19,730 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25b25d56-1da7-44e1-806b-92cb0bdd2bbb/bin/uautomizer-verify-aQ6SnzHsRB/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2024-11-27 20:14:19,732 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25b25d56-1da7-44e1-806b-92cb0bdd2bbb/bin/uautomizer-verify-aQ6SnzHsRB/cvc4 --incremental --print-success --lang smt (3)] Waiting until timeout for monitored process [2024-11-27 20:14:20,359 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-27 20:14:20,366 INFO L256 TraceCheckSpWp]: Trace formula consists of 262 conjuncts, 15 conjuncts are in the unsatisfiable core [2024-11-27 20:14:20,377 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-27 20:14:20,588 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-27 20:14:20,588 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-11-27 20:14:20,589 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [850951805] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-27 20:14:20,589 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-11-27 20:14:20,589 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [7] total 7 [2024-11-27 20:14:20,592 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1086026763] [2024-11-27 20:14:20,593 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-27 20:14:20,598 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-27 20:14:20,599 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy FOX [2024-11-27 20:14:20,623 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-27 20:14:20,625 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=53, Unknown=0, NotChecked=0, Total=72 [2024-11-27 20:14:20,628 INFO L87 Difference]: Start difference. First operand has 20 states, 14 states have (on average 1.2857142857142858) internal successors, (18), 15 states have internal predecessors, (18), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Second operand has 4 states, 4 states have (on average 2.75) internal successors, (11), 4 states have internal predecessors, (11), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-27 20:14:20,775 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-27 20:14:20,776 INFO L93 Difference]: Finished difference Result 43 states and 63 transitions. [2024-11-27 20:14:20,778 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-27 20:14:20,779 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 2.75) internal successors, (11), 4 states have internal predecessors, (11), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 23 [2024-11-27 20:14:20,780 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-27 20:14:20,789 INFO L225 Difference]: With dead ends: 43 [2024-11-27 20:14:20,789 INFO L226 Difference]: Without dead ends: 25 [2024-11-27 20:14:20,795 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 48 GetRequests, 41 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=19, Invalid=53, Unknown=0, NotChecked=0, Total=72 [2024-11-27 20:14:20,801 INFO L435 NwaCegarLoop]: 14 mSDtfsCounter, 0 mSDsluCounter, 24 mSDsCounter, 0 mSdLazyCounter, 18 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 38 SdHoareTripleChecker+Invalid, 18 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 18 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-27 20:14:20,803 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 38 Invalid, 18 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 18 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-27 20:14:20,824 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25 states. [2024-11-27 20:14:20,852 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25 to 25. [2024-11-27 20:14:20,854 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 25 states, 17 states have (on average 1.0588235294117647) internal successors, (18), 17 states have internal predecessors, (18), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-11-27 20:14:20,859 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25 states to 25 states and 30 transitions. [2024-11-27 20:14:20,863 INFO L78 Accepts]: Start accepts. Automaton has 25 states and 30 transitions. Word has length 23 [2024-11-27 20:14:20,865 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-27 20:14:20,865 INFO L471 AbstractCegarLoop]: Abstraction has 25 states and 30 transitions. [2024-11-27 20:14:20,865 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 2.75) internal successors, (11), 4 states have internal predecessors, (11), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-27 20:14:20,866 INFO L276 IsEmpty]: Start isEmpty. Operand 25 states and 30 transitions. [2024-11-27 20:14:20,868 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2024-11-27 20:14:20,868 INFO L210 NwaCegarLoop]: Found error trace [2024-11-27 20:14:20,868 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1] [2024-11-27 20:14:20,883 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25b25d56-1da7-44e1-806b-92cb0bdd2bbb/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Ended with exit code 0 [2024-11-27 20:14:21,075 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25b25d56-1da7-44e1-806b-92cb0bdd2bbb/bin/uautomizer-verify-aQ6SnzHsRB/cvc4 --incremental --print-success --lang smt (3)] Ended with exit code 0 [2024-11-27 20:14:21,269 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 2 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25b25d56-1da7-44e1-806b-92cb0bdd2bbb/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true,3 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25b25d56-1da7-44e1-806b-92cb0bdd2bbb/bin/uautomizer-verify-aQ6SnzHsRB/cvc4 --incremental --print-success --lang smt [2024-11-27 20:14:21,270 INFO L396 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-27 20:14:21,271 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-27 20:14:21,271 INFO L85 PathProgramCache]: Analyzing trace with hash -1294995197, now seen corresponding path program 1 times [2024-11-27 20:14:21,272 INFO L118 FreeRefinementEngine]: Executing refinement strategy FOX [2024-11-27 20:14:21,272 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [173995347] [2024-11-27 20:14:21,272 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-27 20:14:21,272 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-27 20:14:21,272 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25b25d56-1da7-44e1-806b-92cb0bdd2bbb/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-27 20:14:21,275 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25b25d56-1da7-44e1-806b-92cb0bdd2bbb/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-27 20:14:21,279 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25b25d56-1da7-44e1-806b-92cb0bdd2bbb/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2024-11-27 20:14:21,859 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-27 20:14:21,872 INFO L256 TraceCheckSpWp]: Trace formula consists of 486 conjuncts, 43 conjuncts are in the unsatisfiable core [2024-11-27 20:14:21,891 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-27 20:14:22,837 INFO L134 CoverageAnalysis]: Checked inductivity of 68 backedges. 0 proven. 23 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2024-11-27 20:14:22,838 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-27 20:14:23,151 INFO L136 FreeRefinementEngine]: Strategy FOX found an infeasible trace [2024-11-27 20:14:23,152 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [173995347] [2024-11-27 20:14:23,152 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [173995347] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-27 20:14:23,152 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [2029744978] [2024-11-27 20:14:23,153 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-27 20:14:23,153 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2024-11-27 20:14:23,153 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25b25d56-1da7-44e1-806b-92cb0bdd2bbb/bin/uautomizer-verify-aQ6SnzHsRB/cvc4 [2024-11-27 20:14:23,156 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25b25d56-1da7-44e1-806b-92cb0bdd2bbb/bin/uautomizer-verify-aQ6SnzHsRB/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2024-11-27 20:14:23,159 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25b25d56-1da7-44e1-806b-92cb0bdd2bbb/bin/uautomizer-verify-aQ6SnzHsRB/cvc4 --incremental --print-success --lang smt (5)] Waiting until timeout for monitored process [2024-11-27 20:14:24,171 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-27 20:14:24,199 INFO L256 TraceCheckSpWp]: Trace formula consists of 486 conjuncts, 40 conjuncts are in the unsatisfiable core [2024-11-27 20:14:24,210 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-27 20:14:24,625 INFO L134 CoverageAnalysis]: Checked inductivity of 68 backedges. 0 proven. 23 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2024-11-27 20:14:24,625 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-27 20:14:24,841 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [2029744978] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-27 20:14:24,842 INFO L185 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2024-11-27 20:14:24,842 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 9] total 10 [2024-11-27 20:14:24,843 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [386983410] [2024-11-27 20:14:24,843 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2024-11-27 20:14:24,844 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 10 states [2024-11-27 20:14:24,844 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy FOX [2024-11-27 20:14:24,845 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2024-11-27 20:14:24,846 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=108, Unknown=0, NotChecked=0, Total=132 [2024-11-27 20:14:24,846 INFO L87 Difference]: Start difference. First operand 25 states and 30 transitions. Second operand has 10 states, 9 states have (on average 2.4444444444444446) internal successors, (22), 10 states have internal predecessors, (22), 3 states have call successors, (6), 1 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 3 states have call successors, (6) [2024-11-27 20:14:25,338 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-27 20:14:25,338 INFO L93 Difference]: Finished difference Result 36 states and 44 transitions. [2024-11-27 20:14:25,339 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2024-11-27 20:14:25,339 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 9 states have (on average 2.4444444444444446) internal successors, (22), 10 states have internal predecessors, (22), 3 states have call successors, (6), 1 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 3 states have call successors, (6) Word has length 44 [2024-11-27 20:14:25,340 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-27 20:14:25,340 INFO L225 Difference]: With dead ends: 36 [2024-11-27 20:14:25,340 INFO L226 Difference]: Without dead ends: 34 [2024-11-27 20:14:25,341 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 98 GetRequests, 83 SyntacticMatches, 1 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 13 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=47, Invalid=193, Unknown=0, NotChecked=0, Total=240 [2024-11-27 20:14:25,342 INFO L435 NwaCegarLoop]: 12 mSDtfsCounter, 7 mSDsluCounter, 64 mSDsCounter, 0 mSdLazyCounter, 132 mSolverCounterSat, 7 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 7 SdHoareTripleChecker+Valid, 76 SdHoareTripleChecker+Invalid, 139 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 7 IncrementalHoareTripleChecker+Valid, 132 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2024-11-27 20:14:25,342 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [7 Valid, 76 Invalid, 139 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [7 Valid, 132 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2024-11-27 20:14:25,343 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34 states. [2024-11-27 20:14:25,354 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34 to 34. [2024-11-27 20:14:25,355 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 34 states, 23 states have (on average 1.0434782608695652) internal successors, (24), 23 states have internal predecessors, (24), 9 states have call successors, (9), 1 states have call predecessors, (9), 1 states have return successors, (9), 9 states have call predecessors, (9), 9 states have call successors, (9) [2024-11-27 20:14:25,358 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34 states to 34 states and 42 transitions. [2024-11-27 20:14:25,359 INFO L78 Accepts]: Start accepts. Automaton has 34 states and 42 transitions. Word has length 44 [2024-11-27 20:14:25,360 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-27 20:14:25,361 INFO L471 AbstractCegarLoop]: Abstraction has 34 states and 42 transitions. [2024-11-27 20:14:25,361 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 10 states, 9 states have (on average 2.4444444444444446) internal successors, (22), 10 states have internal predecessors, (22), 3 states have call successors, (6), 1 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 3 states have call successors, (6) [2024-11-27 20:14:25,361 INFO L276 IsEmpty]: Start isEmpty. Operand 34 states and 42 transitions. [2024-11-27 20:14:25,363 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2024-11-27 20:14:25,365 INFO L210 NwaCegarLoop]: Found error trace [2024-11-27 20:14:25,365 INFO L218 NwaCegarLoop]: trace histogram [9, 9, 9, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 1, 1, 1, 1] [2024-11-27 20:14:25,377 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25b25d56-1da7-44e1-806b-92cb0bdd2bbb/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Ended with exit code 0 [2024-11-27 20:14:25,574 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25b25d56-1da7-44e1-806b-92cb0bdd2bbb/bin/uautomizer-verify-aQ6SnzHsRB/cvc4 --incremental --print-success --lang smt (5)] Ended with exit code 0 [2024-11-27 20:14:25,770 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 4 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25b25d56-1da7-44e1-806b-92cb0bdd2bbb/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true,5 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25b25d56-1da7-44e1-806b-92cb0bdd2bbb/bin/uautomizer-verify-aQ6SnzHsRB/cvc4 --incremental --print-success --lang smt [2024-11-27 20:14:25,770 INFO L396 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-27 20:14:25,771 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-27 20:14:25,771 INFO L85 PathProgramCache]: Analyzing trace with hash 1531864950, now seen corresponding path program 2 times [2024-11-27 20:14:25,772 INFO L118 FreeRefinementEngine]: Executing refinement strategy FOX [2024-11-27 20:14:25,773 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1218180091] [2024-11-27 20:14:25,773 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2024-11-27 20:14:25,773 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-27 20:14:25,773 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25b25d56-1da7-44e1-806b-92cb0bdd2bbb/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-27 20:14:25,775 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25b25d56-1da7-44e1-806b-92cb0bdd2bbb/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-27 20:14:25,776 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25b25d56-1da7-44e1-806b-92cb0bdd2bbb/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2024-11-27 20:14:26,399 INFO L229 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2024-11-27 20:14:26,400 INFO L230 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-27 20:14:26,410 INFO L256 TraceCheckSpWp]: Trace formula consists of 710 conjuncts, 88 conjuncts are in the unsatisfiable core [2024-11-27 20:14:26,432 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-27 20:14:32,369 INFO L134 CoverageAnalysis]: Checked inductivity of 169 backedges. 12 proven. 55 refuted. 0 times theorem prover too weak. 102 trivial. 0 not checked. [2024-11-27 20:14:32,370 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-27 20:14:37,178 WARN L851 $PredicateComparison]: unable to prove that (let ((.cse0 ((_ zero_extend 24) |c_ULTIMATE.start_main_~mask_SORT_1~0#1|))) (let ((.cse7 (forall ((|v_ULTIMATE.start_main_~var_114_arg_0~0#1_19| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_110_arg_1~0#1_17| (_ BitVec 8))) (= ((_ extract 7 0) (bvand .cse0 ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_114_arg_0~0#1_19|) ((_ zero_extend 24) ((_ extract 7 0) (bvnot ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_110_arg_1~0#1_17|))))))))))) (_ bv0 8)))) (.cse8 (= |c_ULTIMATE.start_main_~state_91~0#1| (_ bv0 8)))) (let ((.cse10 (or .cse7 .cse8)) (.cse12 ((_ zero_extend 24) |c_ULTIMATE.start_main_~state_68~0#1|)) (.cse11 (not .cse8))) (let ((.cse4 (and .cse10 (or (forall ((|v_ULTIMATE.start_main_~var_85_arg_1~0#1_17| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_114_arg_0~0#1_19| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_74_arg_1~0#1_17| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_71_arg_1~0#1_17| (_ BitVec 8))) (= ((_ extract 7 0) (bvand .cse0 ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) (bvnot ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) ((_ extract 7 0) (bvor (_ bv0 32) ((_ zero_extend 24) ((_ extract 7 0) (bvnot ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_74_arg_1~0#1_17|) ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_71_arg_1~0#1_17|) .cse12)))))) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_85_arg_1~0#1_17|))))))))))))))) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_114_arg_0~0#1_19|)))))) (_ bv0 8))) .cse11))) (.cse5 ((_ zero_extend 24) |c_ULTIMATE.start_main_~mask_SORT_3~0#1|)) (.cse6 ((_ zero_extend 24) |c_ULTIMATE.start_main_~state_87~0#1|))) (let ((.cse1 (let ((.cse9 (= ((_ zero_extend 24) ((_ extract 7 0) (bvand .cse5 ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) |c_ULTIMATE.start_main_~state_55~0#1|)))))) .cse6))) (and (or .cse4 .cse9) (or (and .cse10 (or .cse11 (forall ((|v_ULTIMATE.start_main_~var_85_arg_1~0#1_17| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_114_arg_0~0#1_19| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_74_arg_1~0#1_17| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_71_arg_1~0#1_17| (_ BitVec 8))) (= (_ bv0 8) ((_ extract 7 0) (bvand .cse0 ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) (bvnot ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) ((_ extract 7 0) (bvor (_ bv1 32) ((_ zero_extend 24) ((_ extract 7 0) (bvnot ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_74_arg_1~0#1_17|) ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_71_arg_1~0#1_17|) .cse12)))))) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_85_arg_1~0#1_17|))))))))))))))) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_114_arg_0~0#1_19|)))))))))) (not .cse9))))) (.cse2 (= (_ bv0 32) ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |c_ULTIMATE.start_main_~mask_SORT_13~0#1|) ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) |c_ULTIMATE.start_main_~state_12~0#1|))))))))) (and (or (= (_ bv0 8) ((_ extract 7 0) (bvand .cse0 (_ bv255 32)))) .cse1 (not .cse2)) (or (let ((.cse3 (= ((_ extract 7 0) (bvand .cse0 (_ bv254 32))) (_ bv0 8)))) (and (or .cse3 .cse1) (or (not .cse3) (and (or .cse4 (forall ((|v_ULTIMATE.start_main_~var_58_arg_2~0#1_15| (_ BitVec 8))) (= ((_ zero_extend 24) ((_ extract 7 0) (bvand .cse5 ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_58_arg_2~0#1_15|)))))) .cse6))) (or (forall ((|v_ULTIMATE.start_main_~var_58_arg_2~0#1_15| (_ BitVec 8))) (not (= ((_ zero_extend 24) ((_ extract 7 0) (bvand .cse5 ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_58_arg_2~0#1_15|)))))) .cse6))) .cse7 .cse8))))) .cse2))))))) is different from false [2024-11-27 20:14:37,461 INFO L136 FreeRefinementEngine]: Strategy FOX found an infeasible trace [2024-11-27 20:14:37,461 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1218180091] [2024-11-27 20:14:37,461 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1218180091] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-27 20:14:37,461 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [749658529] [2024-11-27 20:14:37,461 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2024-11-27 20:14:37,462 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2024-11-27 20:14:37,462 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25b25d56-1da7-44e1-806b-92cb0bdd2bbb/bin/uautomizer-verify-aQ6SnzHsRB/cvc4 [2024-11-27 20:14:37,466 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25b25d56-1da7-44e1-806b-92cb0bdd2bbb/bin/uautomizer-verify-aQ6SnzHsRB/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2024-11-27 20:14:37,470 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25b25d56-1da7-44e1-806b-92cb0bdd2bbb/bin/uautomizer-verify-aQ6SnzHsRB/cvc4 --incremental --print-success --lang smt (7)] Waiting until timeout for monitored process [2024-11-27 20:14:38,776 INFO L229 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2024-11-27 20:14:38,777 INFO L230 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-27 20:14:38,817 INFO L256 TraceCheckSpWp]: Trace formula consists of 710 conjuncts, 87 conjuncts are in the unsatisfiable core [2024-11-27 20:14:38,833 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-27 20:14:56,199 INFO L134 CoverageAnalysis]: Checked inductivity of 169 backedges. 12 proven. 55 refuted. 0 times theorem prover too weak. 102 trivial. 0 not checked. [2024-11-27 20:14:56,200 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-27 20:15:02,912 WARN L851 $PredicateComparison]: unable to prove that (let ((.cse0 ((_ zero_extend 24) |c_ULTIMATE.start_main_~mask_SORT_1~0#1|))) (let ((.cse8 ((_ zero_extend 24) |c_ULTIMATE.start_main_~state_68~0#1|)) (.cse4 (forall ((|v_ULTIMATE.start_main_~var_110_arg_1~0#1_21| (_ BitVec 8))) (= (_ bv0 8) ((_ extract 7 0) (bvand .cse0 ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) |c_ULTIMATE.start_main_~var_111~0#1|))) ((_ zero_extend 24) ((_ extract 7 0) (bvnot ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_110_arg_1~0#1_21|))))))))))))))) (let ((.cse7 (and (forall ((|v_ULTIMATE.start_main_~var_74_arg_1~0#1_21| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_112_arg_2~0#1_21| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_71_arg_1~0#1_21| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_85_arg_1~0#1_21| (_ BitVec 8))) (= ((_ extract 7 0) (bvand .cse0 ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) (bvnot ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) ((_ extract 7 0) (bvor (_ bv0 32) ((_ zero_extend 24) ((_ extract 7 0) (bvnot ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_74_arg_1~0#1_21|) ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_71_arg_1~0#1_21|) .cse8)))))) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_85_arg_1~0#1_21|))))))))))))))) ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_112_arg_2~0#1_21|)))))))) (_ bv0 8))) .cse4)) (.cse5 ((_ zero_extend 24) |c_ULTIMATE.start_main_~mask_SORT_3~0#1|)) (.cse6 ((_ zero_extend 24) |c_ULTIMATE.start_main_~state_87~0#1|))) (let ((.cse2 (let ((.cse9 (= ((_ zero_extend 24) ((_ extract 7 0) (bvand .cse5 ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) |c_ULTIMATE.start_main_~state_55~0#1|)))))) .cse6))) (and (or (and .cse4 (forall ((|v_ULTIMATE.start_main_~var_74_arg_1~0#1_21| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_112_arg_2~0#1_21| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_71_arg_1~0#1_21| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_85_arg_1~0#1_21| (_ BitVec 8))) (= (_ bv0 8) ((_ extract 7 0) (bvand .cse0 ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) (bvnot ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) ((_ extract 7 0) (bvor (_ bv1 32) ((_ zero_extend 24) ((_ extract 7 0) (bvnot ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_74_arg_1~0#1_21|) ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_71_arg_1~0#1_21|) .cse8)))))) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_85_arg_1~0#1_21|))))))))))))))) ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_112_arg_2~0#1_21|))))))))))) (not .cse9)) (or .cse9 .cse7)))) (.cse1 (= (_ bv0 32) ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |c_ULTIMATE.start_main_~mask_SORT_13~0#1|) ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) |c_ULTIMATE.start_main_~state_12~0#1|))))))))) (and (or (= (_ bv0 8) ((_ extract 7 0) (bvand .cse0 (_ bv255 32)))) (not .cse1) .cse2) (or (let ((.cse3 (= ((_ extract 7 0) (bvand .cse0 (_ bv254 32))) (_ bv0 8)))) (and (or .cse3 .cse2) (or (and (or .cse4 (forall ((|v_ULTIMATE.start_main_~var_58_arg_2~0#1_19| (_ BitVec 8))) (not (= ((_ zero_extend 24) ((_ extract 7 0) (bvand .cse5 ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_58_arg_2~0#1_19|)))))) .cse6)))) (or (forall ((|v_ULTIMATE.start_main_~var_58_arg_2~0#1_19| (_ BitVec 8))) (= ((_ zero_extend 24) ((_ extract 7 0) (bvand .cse5 ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_58_arg_2~0#1_19|)))))) .cse6)) .cse7)) (not .cse3)))) .cse1)))))) is different from false [2024-11-27 20:15:03,796 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [749658529] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-27 20:15:03,796 INFO L185 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2024-11-27 20:15:03,796 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12] total 15 [2024-11-27 20:15:03,796 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1655004329] [2024-11-27 20:15:03,797 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2024-11-27 20:15:03,798 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 15 states [2024-11-27 20:15:03,799 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy FOX [2024-11-27 20:15:03,800 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2024-11-27 20:15:03,801 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=41, Invalid=204, Unknown=3, NotChecked=58, Total=306 [2024-11-27 20:15:03,801 INFO L87 Difference]: Start difference. First operand 34 states and 42 transitions. Second operand has 15 states, 12 states have (on average 2.8333333333333335) internal successors, (34), 15 states have internal predecessors, (34), 7 states have call successors, (13), 1 states have call predecessors, (13), 2 states have return successors, (13), 6 states have call predecessors, (13), 7 states have call successors, (13) [2024-11-27 20:15:07,932 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25b25d56-1da7-44e1-806b-92cb0bdd2bbb/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Ended with exit code 101 [2024-11-27 20:15:07,932 WARN L249 Executor]: External (MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25b25d56-1da7-44e1-806b-92cb0bdd2bbb/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1) with exit command (exit)) stderr output: (error "out of memory") [2024-11-27 20:15:07,934 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 136 GetRequests, 120 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 2 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 15.2s TimeCoverageRelationStatistics Valid=41, Invalid=204, Unknown=3, NotChecked=58, Total=306 [2024-11-27 20:15:07,934 INFO L435 NwaCegarLoop]: 2 mSDtfsCounter, 0 mSDsluCounter, 9 mSDsCounter, 0 mSdLazyCounter, 0 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 11 SdHoareTripleChecker+Invalid, 1 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 0 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-27 20:15:07,935 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 11 Invalid, 1 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 0 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-27 20:15:07,945 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25b25d56-1da7-44e1-806b-92cb0bdd2bbb/bin/uautomizer-verify-aQ6SnzHsRB/cvc4 --incremental --print-success --lang smt (7)] Ended with exit code 0 [2024-11-27 20:15:08,145 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25b25d56-1da7-44e1-806b-92cb0bdd2bbb/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Ended with exit code 0 [2024-11-27 20:15:08,336 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 7 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25b25d56-1da7-44e1-806b-92cb0bdd2bbb/bin/uautomizer-verify-aQ6SnzHsRB/cvc4 --incremental --print-success --lang smt,6 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25b25d56-1da7-44e1-806b-92cb0bdd2bbb/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-27 20:15:08,337 FATAL L? ?]: An unrecoverable error occured during an interaction with an SMT solver: de.uni_freiburg.informatik.ultimate.logic.SMTLIBException: External (MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25b25d56-1da7-44e1-806b-92cb0bdd2bbb/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1) with exit command (exit)) Connection to SMT solver broken at de.uni_freiburg.informatik.ultimate.smtsolver.external.Executor.convertIOException(Executor.java:337) at de.uni_freiburg.informatik.ultimate.smtsolver.external.Executor.input(Executor.java:177) at de.uni_freiburg.informatik.ultimate.smtsolver.external.Scriptor.pop(Scriptor.java:139) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.arrays.DiffWrapperScript.pop(DiffWrapperScript.java:99) at de.uni_freiburg.informatik.ultimate.logic.WrapperScript.pop(WrapperScript.java:153) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.scripttransfer.HistoryRecordingScript.pop(HistoryRecordingScript.java:117) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.ManagedScript.pop(ManagedScript.java:138) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.hoaretriple.IncrementalHoareTripleChecker.unAssertPostcondition(IncrementalHoareTripleChecker.java:665) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.hoaretriple.IncrementalHoareTripleChecker.clearAssertionStack(IncrementalHoareTripleChecker.java:269) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.hoaretriple.IncrementalHoareTripleChecker.releaseLock(IncrementalHoareTripleChecker.java:284) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.hoaretriple.ChainingHoareTripleChecker$ProtectedHtc.releaseLock(ChainingHoareTripleChecker.java:449) at java.base/java.util.ArrayList$ArrayListSpliterator.forEachRemaining(ArrayList.java:1708) at java.base/java.util.stream.ReferencePipeline$Head.forEach(ReferencePipeline.java:762) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.hoaretriple.ChainingHoareTripleChecker.releaseLock(ChainingHoareTripleChecker.java:98) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.hoaretriple.CachingHoareTripleChecker.releaseLock(CachingHoareTripleChecker.java:159) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.interpolantautomata.transitionappender.AbstractInterpolantAutomaton.switchToReadonlyMode(AbstractInterpolantAutomaton.java:140) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.NwaCegarLoop.computeAutomataDifference(NwaCegarLoop.java:388) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.NwaCegarLoop.refineAbstraction(NwaCegarLoop.java:348) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.refineAbstractionInternal(AbstractCegarLoop.java:463) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.iterate(AbstractCegarLoop.java:414) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.startCegar(AbstractCegarLoop.java:342) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.runCegar(AbstractCegarLoop.java:324) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.executeCegarLoop(TraceAbstractionStarter.java:428) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.analyseProgram(TraceAbstractionStarter.java:314) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.analyseSequentialProgram(TraceAbstractionStarter.java:275) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.runCegarLoops(TraceAbstractionStarter.java:167) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.(TraceAbstractionStarter.java:140) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver.finish(TraceAbstractionObserver.java:132) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runObserver(PluginConnector.java:167) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runTool(PluginConnector.java:150) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.run(PluginConnector.java:127) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.executePluginConnector(ToolchainWalker.java:233) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.processPlugin(ToolchainWalker.java:227) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walkUnprotected(ToolchainWalker.java:144) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walk(ToolchainWalker.java:106) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainManager$Toolchain.processToolchain(ToolchainManager.java:319) at de.uni_freiburg.informatik.ultimate.core.coreplugin.toolchain.DefaultToolchainJob.run(DefaultToolchainJob.java:145) at org.eclipse.core.internal.jobs.Worker.run(Worker.java:63) Caused by: java.io.IOException: Stream closed at java.base/java.lang.ProcessBuilder$NullOutputStream.write(ProcessBuilder.java:447) at java.base/java.io.OutputStream.write(OutputStream.java:167) at java.base/java.io.BufferedOutputStream.flushBuffer(BufferedOutputStream.java:125) at java.base/java.io.BufferedOutputStream.implFlush(BufferedOutputStream.java:252) at java.base/java.io.BufferedOutputStream.flush(BufferedOutputStream.java:246) at java.base/sun.nio.cs.StreamEncoder.implFlush(StreamEncoder.java:412) at java.base/sun.nio.cs.StreamEncoder.lockedFlush(StreamEncoder.java:214) at java.base/sun.nio.cs.StreamEncoder.flush(StreamEncoder.java:201) at java.base/java.io.OutputStreamWriter.flush(OutputStreamWriter.java:262) at java.base/java.io.BufferedWriter.implFlush(BufferedWriter.java:372) at java.base/java.io.BufferedWriter.flush(BufferedWriter.java:359) at de.uni_freiburg.informatik.ultimate.smtsolver.external.Executor.input(Executor.java:175) ... 36 more [2024-11-27 20:15:08,344 INFO L158 Benchmark]: Toolchain (without parser) took 51831.79ms. Allocated memory was 83.9MB in the beginning and 604.0MB in the end (delta: 520.1MB). Free memory was 60.6MB in the beginning and 229.7MB in the end (delta: -169.1MB). Peak memory consumption was 346.0MB. Max. memory is 16.1GB. [2024-11-27 20:15:08,347 INFO L158 Benchmark]: CDTParser took 0.59ms. Allocated memory is still 83.9MB. Free memory is still 48.9MB. There was no memory consumed. Max. memory is 16.1GB. [2024-11-27 20:15:08,347 INFO L158 Benchmark]: CACSL2BoogieTranslator took 573.91ms. Allocated memory is still 83.9MB. Free memory was 60.4MB in the beginning and 33.9MB in the end (delta: 26.5MB). Peak memory consumption was 25.2MB. Max. memory is 16.1GB. [2024-11-27 20:15:08,348 INFO L158 Benchmark]: Boogie Procedure Inliner took 101.57ms. Allocated memory is still 83.9MB. Free memory was 33.9MB in the beginning and 57.8MB in the end (delta: -23.9MB). Peak memory consumption was 13.1MB. Max. memory is 16.1GB. [2024-11-27 20:15:08,349 INFO L158 Benchmark]: Boogie Preprocessor took 95.21ms. Allocated memory is still 83.9MB. Free memory was 57.8MB in the beginning and 51.9MB in the end (delta: 5.9MB). There was no memory consumed. Max. memory is 16.1GB. [2024-11-27 20:15:08,351 INFO L158 Benchmark]: RCFGBuilder took 989.80ms. Allocated memory was 83.9MB in the beginning and 176.2MB in the end (delta: 92.3MB). Free memory was 51.9MB in the beginning and 108.9MB in the end (delta: -57.0MB). Peak memory consumption was 38.9MB. Max. memory is 16.1GB. [2024-11-27 20:15:08,352 INFO L158 Benchmark]: TraceAbstraction took 50064.04ms. Allocated memory was 176.2MB in the beginning and 604.0MB in the end (delta: 427.8MB). Free memory was 108.5MB in the beginning and 229.7MB in the end (delta: -121.3MB). Peak memory consumption was 304.4MB. Max. memory is 16.1GB. [2024-11-27 20:15:08,357 INFO L338 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.59ms. Allocated memory is still 83.9MB. Free memory is still 48.9MB. There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 573.91ms. Allocated memory is still 83.9MB. Free memory was 60.4MB in the beginning and 33.9MB in the end (delta: 26.5MB). Peak memory consumption was 25.2MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 101.57ms. Allocated memory is still 83.9MB. Free memory was 33.9MB in the beginning and 57.8MB in the end (delta: -23.9MB). Peak memory consumption was 13.1MB. Max. memory is 16.1GB. * Boogie Preprocessor took 95.21ms. Allocated memory is still 83.9MB. Free memory was 57.8MB in the beginning and 51.9MB in the end (delta: 5.9MB). There was no memory consumed. Max. memory is 16.1GB. * RCFGBuilder took 989.80ms. Allocated memory was 83.9MB in the beginning and 176.2MB in the end (delta: 92.3MB). Free memory was 51.9MB in the beginning and 108.9MB in the end (delta: -57.0MB). Peak memory consumption was 38.9MB. Max. memory is 16.1GB. * TraceAbstraction took 50064.04ms. Allocated memory was 176.2MB in the beginning and 604.0MB in the end (delta: 427.8MB). Free memory was 108.5MB in the beginning and 229.7MB in the end (delta: -121.3MB). Peak memory consumption was 304.4MB. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - ExceptionOrErrorResult: SMTLIBException: External (MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25b25d56-1da7-44e1-806b-92cb0bdd2bbb/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1) with exit command (exit)) Connection to SMT solver broken de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: SMTLIBException: External (MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25b25d56-1da7-44e1-806b-92cb0bdd2bbb/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1) with exit command (exit)) Connection to SMT solver broken: de.uni_freiburg.informatik.ultimate.smtsolver.external.Executor.convertIOException(Executor.java:337) RESULT: Ultimate could not prove your program: Toolchain returned no result. Received shutdown request... --- End real Ultimate output --- Execution finished normally Writing output log to file Ultimate.log Result: ERROR: ExceptionOrErrorResult: SMTLIBException: External (MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25b25d56-1da7-44e1-806b-92cb0bdd2bbb/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1) with exit command (exit)) Connection to SMT solver broken