./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.itc99_b13.c --full-output --architecture 64bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version d790fecc Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_74a6bcf8-eac0-40c8-b753-179f212b9ad1/bin/uautomizer-verify-aQ6SnzHsRB/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_74a6bcf8-eac0-40c8-b753-179f212b9ad1/bin/uautomizer-verify-aQ6SnzHsRB/plugins/org.eclipse.equinox.launcher_1.6.800.v20240513-1750.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_74a6bcf8-eac0-40c8-b753-179f212b9ad1/bin/uautomizer-verify-aQ6SnzHsRB/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_74a6bcf8-eac0-40c8-b753-179f212b9ad1/bin/uautomizer-verify-aQ6SnzHsRB/config/AutomizerReach.xml -i ../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.itc99_b13.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_74a6bcf8-eac0-40c8-b753-179f212b9ad1/bin/uautomizer-verify-aQ6SnzHsRB/config/svcomp-Reach-64bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_74a6bcf8-eac0-40c8-b753-179f212b9ad1/bin/uautomizer-verify-aQ6SnzHsRB --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash 133ed02e483160842227ba05a50e01319ae2d6425d72670eb79dfefca9c5ec50 --- Real Ultimate output --- This is Ultimate 0.3.0-dev-d790fec [2024-11-28 03:01:55,740 INFO L188 SettingsManager]: Resetting all preferences to default values... [2024-11-28 03:01:55,859 INFO L114 SettingsManager]: Loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_74a6bcf8-eac0-40c8-b753-179f212b9ad1/bin/uautomizer-verify-aQ6SnzHsRB/config/svcomp-Reach-64bit-Automizer_Default.epf [2024-11-28 03:01:55,873 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2024-11-28 03:01:55,877 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2024-11-28 03:01:55,914 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2024-11-28 03:01:55,914 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2024-11-28 03:01:55,914 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2024-11-28 03:01:55,915 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2024-11-28 03:01:55,915 INFO L153 SettingsManager]: * Use memory slicer=true [2024-11-28 03:01:55,915 INFO L151 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2024-11-28 03:01:55,915 INFO L153 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2024-11-28 03:01:55,916 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2024-11-28 03:01:55,916 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2024-11-28 03:01:55,916 INFO L153 SettingsManager]: * Use SBE=true [2024-11-28 03:01:55,916 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2024-11-28 03:01:55,916 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2024-11-28 03:01:55,916 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2024-11-28 03:01:55,916 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2024-11-28 03:01:55,917 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2024-11-28 03:01:55,917 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2024-11-28 03:01:55,917 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2024-11-28 03:01:55,917 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2024-11-28 03:01:55,917 INFO L153 SettingsManager]: * Behaviour of calls to undefined functions=OVERAPPROXIMATE_BEHAVIOUR [2024-11-28 03:01:55,917 INFO L153 SettingsManager]: * Use constant arrays=true [2024-11-28 03:01:55,918 INFO L151 SettingsManager]: Preferences of IcfgBuilder differ from their defaults: [2024-11-28 03:01:55,918 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-11-28 03:01:55,918 INFO L153 SettingsManager]: * Only consider context switches at boundaries of atomic blocks=true [2024-11-28 03:01:55,919 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2024-11-28 03:01:55,919 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2024-11-28 03:01:55,919 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2024-11-28 03:01:55,919 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-11-28 03:01:55,919 INFO L153 SettingsManager]: * Only consider context switches at boundaries of atomic blocks=true [2024-11-28 03:01:55,920 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2024-11-28 03:01:55,920 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2024-11-28 03:01:55,920 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2024-11-28 03:01:55,920 INFO L153 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2024-11-28 03:01:55,920 INFO L153 SettingsManager]: * Compute procedure contracts=false [2024-11-28 03:01:55,921 INFO L153 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopHeads [2024-11-28 03:01:55,921 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2024-11-28 03:01:55,921 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2024-11-28 03:01:55,921 INFO L153 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false [2024-11-28 03:01:55,921 INFO L153 SettingsManager]: * Automaton type used in concurrency analysis=PETRI_NET [2024-11-28 03:01:55,921 INFO L153 SettingsManager]: * Order on configurations for Petri net unfoldings=DBO [2024-11-28 03:01:55,922 INFO L153 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2024-11-28 03:01:55,922 INFO L153 SettingsManager]: * Looper check in Petri net analysis=SEMANTIC Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_74a6bcf8-eac0-40c8-b753-179f212b9ad1/bin/uautomizer-verify-aQ6SnzHsRB Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 133ed02e483160842227ba05a50e01319ae2d6425d72670eb79dfefca9c5ec50 [2024-11-28 03:01:56,307 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2024-11-28 03:01:56,320 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2024-11-28 03:01:56,324 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2024-11-28 03:01:56,325 INFO L270 PluginConnector]: Initializing CDTParser... [2024-11-28 03:01:56,326 INFO L274 PluginConnector]: CDTParser initialized [2024-11-28 03:01:56,329 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_74a6bcf8-eac0-40c8-b753-179f212b9ad1/bin/uautomizer-verify-aQ6SnzHsRB/../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.itc99_b13.c [2024-11-28 03:01:59,897 INFO L533 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_74a6bcf8-eac0-40c8-b753-179f212b9ad1/bin/uautomizer-verify-aQ6SnzHsRB/data/c40046baf/66366eddb8ce4fac9df4a95cf2aa2a49/FLAG3bef2fcc4 [2024-11-28 03:02:00,402 INFO L384 CDTParser]: Found 1 translation units. [2024-11-28 03:02:00,403 INFO L180 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_74a6bcf8-eac0-40c8-b753-179f212b9ad1/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.itc99_b13.c [2024-11-28 03:02:00,429 INFO L427 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_74a6bcf8-eac0-40c8-b753-179f212b9ad1/bin/uautomizer-verify-aQ6SnzHsRB/data/c40046baf/66366eddb8ce4fac9df4a95cf2aa2a49/FLAG3bef2fcc4 [2024-11-28 03:02:00,458 INFO L435 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_74a6bcf8-eac0-40c8-b753-179f212b9ad1/bin/uautomizer-verify-aQ6SnzHsRB/data/c40046baf/66366eddb8ce4fac9df4a95cf2aa2a49 [2024-11-28 03:02:00,463 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2024-11-28 03:02:00,467 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2024-11-28 03:02:00,469 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2024-11-28 03:02:00,470 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2024-11-28 03:02:00,476 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2024-11-28 03:02:00,477 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.11 03:02:00" (1/1) ... [2024-11-28 03:02:00,478 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@7490d79a and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 03:02:00, skipping insertion in model container [2024-11-28 03:02:00,480 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.11 03:02:00" (1/1) ... [2024-11-28 03:02:00,555 INFO L175 MainTranslator]: Built tables and reachable declarations [2024-11-28 03:02:00,816 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_74a6bcf8-eac0-40c8-b753-179f212b9ad1/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.itc99_b13.c[1249,1262] [2024-11-28 03:02:01,137 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-11-28 03:02:01,153 INFO L200 MainTranslator]: Completed pre-run [2024-11-28 03:02:01,164 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_74a6bcf8-eac0-40c8-b753-179f212b9ad1/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.itc99_b13.c[1249,1262] [2024-11-28 03:02:01,331 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-11-28 03:02:01,353 INFO L204 MainTranslator]: Completed translation [2024-11-28 03:02:01,354 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 03:02:01 WrapperNode [2024-11-28 03:02:01,355 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2024-11-28 03:02:01,356 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2024-11-28 03:02:01,356 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2024-11-28 03:02:01,357 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2024-11-28 03:02:01,366 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 03:02:01" (1/1) ... [2024-11-28 03:02:01,421 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 03:02:01" (1/1) ... [2024-11-28 03:02:01,702 INFO L138 Inliner]: procedures = 17, calls = 8, calls flagged for inlining = 3, calls inlined = 3, statements flattened = 1945 [2024-11-28 03:02:01,705 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2024-11-28 03:02:01,706 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2024-11-28 03:02:01,706 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2024-11-28 03:02:01,706 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2024-11-28 03:02:01,719 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 03:02:01" (1/1) ... [2024-11-28 03:02:01,720 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 03:02:01" (1/1) ... [2024-11-28 03:02:01,773 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 03:02:01" (1/1) ... [2024-11-28 03:02:01,863 INFO L175 MemorySlicer]: Split 2 memory accesses to 1 slices as follows [2]. 100 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2]. The 0 writes are split as follows [0]. [2024-11-28 03:02:01,866 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 03:02:01" (1/1) ... [2024-11-28 03:02:01,867 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 03:02:01" (1/1) ... [2024-11-28 03:02:01,938 INFO L184 PluginConnector]: Executing the observer ReplaceArrayAssignments from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 03:02:01" (1/1) ... [2024-11-28 03:02:01,947 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 03:02:01" (1/1) ... [2024-11-28 03:02:01,973 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 03:02:01" (1/1) ... [2024-11-28 03:02:02,002 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 03:02:01" (1/1) ... [2024-11-28 03:02:02,025 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 03:02:01" (1/1) ... [2024-11-28 03:02:02,084 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2024-11-28 03:02:02,087 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2024-11-28 03:02:02,087 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2024-11-28 03:02:02,087 INFO L274 PluginConnector]: RCFGBuilder initialized [2024-11-28 03:02:02,089 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 03:02:01" (1/1) ... [2024-11-28 03:02:02,099 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2024-11-28 03:02:02,118 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_74a6bcf8-eac0-40c8-b753-179f212b9ad1/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 03:02:02,136 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_74a6bcf8-eac0-40c8-b753-179f212b9ad1/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (exit command is (exit), workingDir is null) [2024-11-28 03:02:02,141 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_74a6bcf8-eac0-40c8-b753-179f212b9ad1/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Waiting until timeout for monitored process [2024-11-28 03:02:02,179 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2024-11-28 03:02:02,180 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#0 [2024-11-28 03:02:02,180 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2024-11-28 03:02:02,180 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2024-11-28 03:02:02,589 INFO L234 CfgBuilder]: Building ICFG [2024-11-28 03:02:02,592 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2024-11-28 03:02:06,054 INFO L? ?]: Removed 1134 outVars from TransFormulas that were not future-live. [2024-11-28 03:02:06,055 INFO L283 CfgBuilder]: Performing block encoding [2024-11-28 03:02:06,100 INFO L307 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2024-11-28 03:02:06,100 INFO L312 CfgBuilder]: Removed 1 assume(true) statements. [2024-11-28 03:02:06,100 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.11 03:02:06 BoogieIcfgContainer [2024-11-28 03:02:06,105 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2024-11-28 03:02:06,108 INFO L112 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2024-11-28 03:02:06,108 INFO L270 PluginConnector]: Initializing TraceAbstraction... [2024-11-28 03:02:06,115 INFO L274 PluginConnector]: TraceAbstraction initialized [2024-11-28 03:02:06,117 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 28.11 03:02:00" (1/3) ... [2024-11-28 03:02:06,118 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@5bffe061 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.11 03:02:06, skipping insertion in model container [2024-11-28 03:02:06,119 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 03:02:01" (2/3) ... [2024-11-28 03:02:06,120 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@5bffe061 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.11 03:02:06, skipping insertion in model container [2024-11-28 03:02:06,121 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.11 03:02:06" (3/3) ... [2024-11-28 03:02:06,122 INFO L128 eAbstractionObserver]: Analyzing ICFG btor2c-lazyMod.itc99_b13.c [2024-11-28 03:02:06,143 INFO L216 ceAbstractionStarter]: Automizer settings: Hoare:LoopHeads NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2024-11-28 03:02:06,146 INFO L151 ceAbstractionStarter]: Applying trace abstraction to ICFG btor2c-lazyMod.itc99_b13.c that has 1 procedures, 498 locations, 1 initial locations, 1 loop locations, and 1 error locations. [2024-11-28 03:02:06,247 INFO L332 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2024-11-28 03:02:06,268 INFO L333 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mAutomataTypeConcurrency=PETRI_NET, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopHeads, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@5a84a988, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2024-11-28 03:02:06,269 INFO L334 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2024-11-28 03:02:06,279 INFO L276 IsEmpty]: Start isEmpty. Operand has 498 states, 496 states have (on average 1.497983870967742) internal successors, (743), 497 states have internal predecessors, (743), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 03:02:06,312 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 216 [2024-11-28 03:02:06,313 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 03:02:06,313 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 03:02:06,315 INFO L396 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 03:02:06,322 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 03:02:06,323 INFO L85 PathProgramCache]: Analyzing trace with hash 1124175102, now seen corresponding path program 1 times [2024-11-28 03:02:06,333 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 03:02:06,334 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1088039252] [2024-11-28 03:02:06,334 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 03:02:06,335 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 03:02:07,179 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 03:02:09,737 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-28 03:02:09,738 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 03:02:09,741 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1088039252] [2024-11-28 03:02:09,742 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1088039252] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 03:02:09,742 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 03:02:09,743 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-28 03:02:09,744 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [794056507] [2024-11-28 03:02:09,745 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 03:02:09,752 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-28 03:02:09,753 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 03:02:09,781 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-28 03:02:09,782 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-28 03:02:09,785 INFO L87 Difference]: Start difference. First operand has 498 states, 496 states have (on average 1.497983870967742) internal successors, (743), 497 states have internal predecessors, (743), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 4 states, 4 states have (on average 53.75) internal successors, (215), 4 states have internal predecessors, (215), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 03:02:09,960 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 03:02:09,960 INFO L93 Difference]: Finished difference Result 901 states and 1347 transitions. [2024-11-28 03:02:09,964 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-28 03:02:09,966 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 53.75) internal successors, (215), 4 states have internal predecessors, (215), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 215 [2024-11-28 03:02:09,968 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 03:02:09,983 INFO L225 Difference]: With dead ends: 901 [2024-11-28 03:02:09,983 INFO L226 Difference]: Without dead ends: 497 [2024-11-28 03:02:09,988 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-28 03:02:09,992 INFO L435 NwaCegarLoop]: 737 mSDtfsCounter, 0 mSDsluCounter, 1468 mSDsCounter, 0 mSdLazyCounter, 11 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 2205 SdHoareTripleChecker+Invalid, 11 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 11 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-28 03:02:09,993 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 2205 Invalid, 11 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 11 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-28 03:02:10,012 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 497 states. [2024-11-28 03:02:10,077 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 497 to 497. [2024-11-28 03:02:10,083 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 497 states, 496 states have (on average 1.4939516129032258) internal successors, (741), 496 states have internal predecessors, (741), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 03:02:10,095 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 497 states to 497 states and 741 transitions. [2024-11-28 03:02:10,098 INFO L78 Accepts]: Start accepts. Automaton has 497 states and 741 transitions. Word has length 215 [2024-11-28 03:02:10,099 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 03:02:10,101 INFO L471 AbstractCegarLoop]: Abstraction has 497 states and 741 transitions. [2024-11-28 03:02:10,101 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 53.75) internal successors, (215), 4 states have internal predecessors, (215), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 03:02:10,104 INFO L276 IsEmpty]: Start isEmpty. Operand 497 states and 741 transitions. [2024-11-28 03:02:10,108 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 217 [2024-11-28 03:02:10,108 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 03:02:10,112 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 03:02:10,113 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2024-11-28 03:02:10,113 INFO L396 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 03:02:10,114 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 03:02:10,114 INFO L85 PathProgramCache]: Analyzing trace with hash 491386312, now seen corresponding path program 1 times [2024-11-28 03:02:10,114 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 03:02:10,114 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1815649110] [2024-11-28 03:02:10,114 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 03:02:10,114 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 03:02:10,455 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 03:02:11,789 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-28 03:02:11,791 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 03:02:11,792 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1815649110] [2024-11-28 03:02:11,792 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1815649110] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 03:02:11,792 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 03:02:11,792 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-11-28 03:02:11,792 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1547258725] [2024-11-28 03:02:11,793 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 03:02:11,795 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-11-28 03:02:11,797 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 03:02:11,799 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-11-28 03:02:11,799 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2024-11-28 03:02:11,800 INFO L87 Difference]: Start difference. First operand 497 states and 741 transitions. Second operand has 6 states, 6 states have (on average 36.0) internal successors, (216), 6 states have internal predecessors, (216), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 03:02:13,414 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 03:02:13,414 INFO L93 Difference]: Finished difference Result 1711 states and 2552 transitions. [2024-11-28 03:02:13,415 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2024-11-28 03:02:13,416 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 36.0) internal successors, (216), 6 states have internal predecessors, (216), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 216 [2024-11-28 03:02:13,417 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 03:02:13,421 INFO L225 Difference]: With dead ends: 1711 [2024-11-28 03:02:13,421 INFO L226 Difference]: Without dead ends: 876 [2024-11-28 03:02:13,424 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=30, Invalid=60, Unknown=0, NotChecked=0, Total=90 [2024-11-28 03:02:13,425 INFO L435 NwaCegarLoop]: 867 mSDtfsCounter, 2923 mSDsluCounter, 1907 mSDsCounter, 0 mSdLazyCounter, 581 mSolverCounterSat, 69 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2923 SdHoareTripleChecker+Valid, 2774 SdHoareTripleChecker+Invalid, 650 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.1s SdHoareTripleChecker+Time, 69 IncrementalHoareTripleChecker+Valid, 581 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.4s IncrementalHoareTripleChecker+Time [2024-11-28 03:02:13,426 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2923 Valid, 2774 Invalid, 650 Unknown, 0 Unchecked, 0.1s Time], IncrementalHoareTripleChecker [69 Valid, 581 Invalid, 0 Unknown, 0 Unchecked, 1.4s Time] [2024-11-28 03:02:13,429 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 876 states. [2024-11-28 03:02:13,458 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 876 to 695. [2024-11-28 03:02:13,460 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 695 states, 694 states have (on average 1.494236311239193) internal successors, (1037), 694 states have internal predecessors, (1037), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 03:02:13,464 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 695 states to 695 states and 1037 transitions. [2024-11-28 03:02:13,464 INFO L78 Accepts]: Start accepts. Automaton has 695 states and 1037 transitions. Word has length 216 [2024-11-28 03:02:13,465 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 03:02:13,465 INFO L471 AbstractCegarLoop]: Abstraction has 695 states and 1037 transitions. [2024-11-28 03:02:13,465 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 36.0) internal successors, (216), 6 states have internal predecessors, (216), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 03:02:13,465 INFO L276 IsEmpty]: Start isEmpty. Operand 695 states and 1037 transitions. [2024-11-28 03:02:13,468 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 218 [2024-11-28 03:02:13,469 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 03:02:13,469 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 03:02:13,469 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2024-11-28 03:02:13,469 INFO L396 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 03:02:13,470 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 03:02:13,470 INFO L85 PathProgramCache]: Analyzing trace with hash -907188898, now seen corresponding path program 1 times [2024-11-28 03:02:13,471 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 03:02:13,471 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1645204374] [2024-11-28 03:02:13,471 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 03:02:13,471 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 03:02:13,700 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 03:02:14,553 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-28 03:02:14,554 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 03:02:14,554 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1645204374] [2024-11-28 03:02:14,554 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1645204374] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 03:02:14,554 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 03:02:14,554 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-28 03:02:14,554 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1964418809] [2024-11-28 03:02:14,555 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 03:02:14,555 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-28 03:02:14,556 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 03:02:14,556 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-28 03:02:14,557 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-28 03:02:14,557 INFO L87 Difference]: Start difference. First operand 695 states and 1037 transitions. Second operand has 4 states, 4 states have (on average 54.25) internal successors, (217), 4 states have internal predecessors, (217), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 03:02:14,622 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 03:02:14,623 INFO L93 Difference]: Finished difference Result 1100 states and 1641 transitions. [2024-11-28 03:02:14,624 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-28 03:02:14,624 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 54.25) internal successors, (217), 4 states have internal predecessors, (217), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 217 [2024-11-28 03:02:14,625 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 03:02:14,628 INFO L225 Difference]: With dead ends: 1100 [2024-11-28 03:02:14,628 INFO L226 Difference]: Without dead ends: 697 [2024-11-28 03:02:14,629 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-28 03:02:14,630 INFO L435 NwaCegarLoop]: 737 mSDtfsCounter, 0 mSDsluCounter, 1464 mSDsCounter, 0 mSdLazyCounter, 15 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 2201 SdHoareTripleChecker+Invalid, 15 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 15 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-28 03:02:14,631 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 2201 Invalid, 15 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 15 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-28 03:02:14,633 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 697 states. [2024-11-28 03:02:14,651 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 697 to 697. [2024-11-28 03:02:14,653 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 697 states, 696 states have (on average 1.492816091954023) internal successors, (1039), 696 states have internal predecessors, (1039), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 03:02:14,657 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 697 states to 697 states and 1039 transitions. [2024-11-28 03:02:14,657 INFO L78 Accepts]: Start accepts. Automaton has 697 states and 1039 transitions. Word has length 217 [2024-11-28 03:02:14,658 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 03:02:14,658 INFO L471 AbstractCegarLoop]: Abstraction has 697 states and 1039 transitions. [2024-11-28 03:02:14,659 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 54.25) internal successors, (217), 4 states have internal predecessors, (217), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 03:02:14,659 INFO L276 IsEmpty]: Start isEmpty. Operand 697 states and 1039 transitions. [2024-11-28 03:02:14,666 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 219 [2024-11-28 03:02:14,666 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 03:02:14,667 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 03:02:14,667 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2024-11-28 03:02:14,667 INFO L396 AbstractCegarLoop]: === Iteration 4 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 03:02:14,668 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 03:02:14,668 INFO L85 PathProgramCache]: Analyzing trace with hash 843950657, now seen corresponding path program 1 times [2024-11-28 03:02:14,668 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 03:02:14,668 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1763910025] [2024-11-28 03:02:14,669 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 03:02:14,669 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 03:02:15,599 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 03:02:16,865 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-28 03:02:16,865 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 03:02:16,865 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1763910025] [2024-11-28 03:02:16,865 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1763910025] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 03:02:16,865 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 03:02:16,865 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-28 03:02:16,866 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [551337760] [2024-11-28 03:02:16,866 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 03:02:16,866 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-28 03:02:16,866 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 03:02:16,867 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-28 03:02:16,870 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-28 03:02:16,870 INFO L87 Difference]: Start difference. First operand 697 states and 1039 transitions. Second operand has 5 states, 5 states have (on average 43.6) internal successors, (218), 5 states have internal predecessors, (218), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 03:02:17,056 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 03:02:17,056 INFO L93 Difference]: Finished difference Result 1106 states and 1648 transitions. [2024-11-28 03:02:17,057 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-11-28 03:02:17,057 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 43.6) internal successors, (218), 5 states have internal predecessors, (218), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 218 [2024-11-28 03:02:17,058 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 03:02:17,062 INFO L225 Difference]: With dead ends: 1106 [2024-11-28 03:02:17,062 INFO L226 Difference]: Without dead ends: 701 [2024-11-28 03:02:17,063 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2024-11-28 03:02:17,064 INFO L435 NwaCegarLoop]: 722 mSDtfsCounter, 535 mSDsluCounter, 1436 mSDsCounter, 0 mSdLazyCounter, 58 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 535 SdHoareTripleChecker+Valid, 2158 SdHoareTripleChecker+Invalid, 59 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 58 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-28 03:02:17,064 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [535 Valid, 2158 Invalid, 59 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 58 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-28 03:02:17,066 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 701 states. [2024-11-28 03:02:17,085 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 701 to 700. [2024-11-28 03:02:17,086 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 700 states, 699 states have (on average 1.4907010014306152) internal successors, (1042), 699 states have internal predecessors, (1042), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 03:02:17,090 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 700 states to 700 states and 1042 transitions. [2024-11-28 03:02:17,090 INFO L78 Accepts]: Start accepts. Automaton has 700 states and 1042 transitions. Word has length 218 [2024-11-28 03:02:17,091 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 03:02:17,091 INFO L471 AbstractCegarLoop]: Abstraction has 700 states and 1042 transitions. [2024-11-28 03:02:17,091 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 43.6) internal successors, (218), 5 states have internal predecessors, (218), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 03:02:17,092 INFO L276 IsEmpty]: Start isEmpty. Operand 700 states and 1042 transitions. [2024-11-28 03:02:17,095 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 220 [2024-11-28 03:02:17,095 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 03:02:17,095 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 03:02:17,095 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3 [2024-11-28 03:02:17,096 INFO L396 AbstractCegarLoop]: === Iteration 5 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 03:02:17,096 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 03:02:17,096 INFO L85 PathProgramCache]: Analyzing trace with hash 1957213057, now seen corresponding path program 1 times [2024-11-28 03:02:17,097 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 03:02:17,097 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2007713229] [2024-11-28 03:02:17,097 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 03:02:17,097 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 03:02:17,840 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 03:02:19,533 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-28 03:02:19,534 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 03:02:19,534 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2007713229] [2024-11-28 03:02:19,534 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2007713229] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 03:02:19,534 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 03:02:19,536 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-28 03:02:19,536 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [333858156] [2024-11-28 03:02:19,536 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 03:02:19,537 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-28 03:02:19,538 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 03:02:19,539 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-28 03:02:19,539 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-28 03:02:19,540 INFO L87 Difference]: Start difference. First operand 700 states and 1042 transitions. Second operand has 4 states, 4 states have (on average 54.75) internal successors, (219), 4 states have internal predecessors, (219), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 03:02:19,622 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 03:02:19,622 INFO L93 Difference]: Finished difference Result 1118 states and 1662 transitions. [2024-11-28 03:02:19,623 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-28 03:02:19,624 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 54.75) internal successors, (219), 4 states have internal predecessors, (219), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 219 [2024-11-28 03:02:19,624 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 03:02:19,628 INFO L225 Difference]: With dead ends: 1118 [2024-11-28 03:02:19,628 INFO L226 Difference]: Without dead ends: 700 [2024-11-28 03:02:19,631 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-28 03:02:19,635 INFO L435 NwaCegarLoop]: 733 mSDtfsCounter, 6 mSDsluCounter, 1456 mSDsCounter, 0 mSdLazyCounter, 16 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 6 SdHoareTripleChecker+Valid, 2189 SdHoareTripleChecker+Invalid, 16 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 16 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-28 03:02:19,635 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [6 Valid, 2189 Invalid, 16 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 16 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-28 03:02:19,641 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 700 states. [2024-11-28 03:02:19,666 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 700 to 700. [2024-11-28 03:02:19,669 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 700 states, 699 states have (on average 1.4878397711015736) internal successors, (1040), 699 states have internal predecessors, (1040), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 03:02:19,673 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 700 states to 700 states and 1040 transitions. [2024-11-28 03:02:19,674 INFO L78 Accepts]: Start accepts. Automaton has 700 states and 1040 transitions. Word has length 219 [2024-11-28 03:02:19,674 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 03:02:19,675 INFO L471 AbstractCegarLoop]: Abstraction has 700 states and 1040 transitions. [2024-11-28 03:02:19,675 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 54.75) internal successors, (219), 4 states have internal predecessors, (219), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 03:02:19,675 INFO L276 IsEmpty]: Start isEmpty. Operand 700 states and 1040 transitions. [2024-11-28 03:02:19,681 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 221 [2024-11-28 03:02:19,682 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 03:02:19,682 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 03:02:19,682 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4 [2024-11-28 03:02:19,683 INFO L396 AbstractCegarLoop]: === Iteration 6 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 03:02:19,683 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 03:02:19,684 INFO L85 PathProgramCache]: Analyzing trace with hash 2075244672, now seen corresponding path program 1 times [2024-11-28 03:02:19,685 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 03:02:19,685 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1174799217] [2024-11-28 03:02:19,685 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 03:02:19,686 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 03:02:20,094 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 03:02:21,587 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-28 03:02:21,588 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 03:02:21,588 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1174799217] [2024-11-28 03:02:21,588 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1174799217] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 03:02:21,588 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 03:02:21,589 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-28 03:02:21,589 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1125046455] [2024-11-28 03:02:21,589 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 03:02:21,590 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-28 03:02:21,590 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 03:02:21,591 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-28 03:02:21,591 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-28 03:02:21,591 INFO L87 Difference]: Start difference. First operand 700 states and 1040 transitions. Second operand has 4 states, 4 states have (on average 55.0) internal successors, (220), 4 states have internal predecessors, (220), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 03:02:21,664 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 03:02:21,664 INFO L93 Difference]: Finished difference Result 1266 states and 1880 transitions. [2024-11-28 03:02:21,668 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-28 03:02:21,668 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 55.0) internal successors, (220), 4 states have internal predecessors, (220), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 220 [2024-11-28 03:02:21,668 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 03:02:21,671 INFO L225 Difference]: With dead ends: 1266 [2024-11-28 03:02:21,672 INFO L226 Difference]: Without dead ends: 700 [2024-11-28 03:02:21,673 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-28 03:02:21,674 INFO L435 NwaCegarLoop]: 732 mSDtfsCounter, 6 mSDsluCounter, 1454 mSDsCounter, 0 mSdLazyCounter, 16 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 6 SdHoareTripleChecker+Valid, 2186 SdHoareTripleChecker+Invalid, 16 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 16 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-28 03:02:21,676 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [6 Valid, 2186 Invalid, 16 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 16 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-28 03:02:21,678 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 700 states. [2024-11-28 03:02:21,697 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 700 to 700. [2024-11-28 03:02:21,699 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 700 states, 699 states have (on average 1.4849785407725322) internal successors, (1038), 699 states have internal predecessors, (1038), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 03:02:21,704 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 700 states to 700 states and 1038 transitions. [2024-11-28 03:02:21,704 INFO L78 Accepts]: Start accepts. Automaton has 700 states and 1038 transitions. Word has length 220 [2024-11-28 03:02:21,704 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 03:02:21,705 INFO L471 AbstractCegarLoop]: Abstraction has 700 states and 1038 transitions. [2024-11-28 03:02:21,705 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 55.0) internal successors, (220), 4 states have internal predecessors, (220), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 03:02:21,705 INFO L276 IsEmpty]: Start isEmpty. Operand 700 states and 1038 transitions. [2024-11-28 03:02:21,708 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 222 [2024-11-28 03:02:21,709 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 03:02:21,709 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 03:02:21,709 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5 [2024-11-28 03:02:21,710 INFO L396 AbstractCegarLoop]: === Iteration 7 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 03:02:21,710 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 03:02:21,710 INFO L85 PathProgramCache]: Analyzing trace with hash -1460174850, now seen corresponding path program 1 times [2024-11-28 03:02:21,711 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 03:02:21,711 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [213430683] [2024-11-28 03:02:21,711 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 03:02:21,711 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 03:02:22,508 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 03:02:24,054 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-28 03:02:24,054 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 03:02:24,054 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [213430683] [2024-11-28 03:02:24,055 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [213430683] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 03:02:24,055 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 03:02:24,055 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-28 03:02:24,055 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [160498069] [2024-11-28 03:02:24,055 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 03:02:24,056 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-28 03:02:24,056 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 03:02:24,057 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-28 03:02:24,057 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-28 03:02:24,057 INFO L87 Difference]: Start difference. First operand 700 states and 1038 transitions. Second operand has 4 states, 4 states have (on average 55.25) internal successors, (221), 4 states have internal predecessors, (221), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 03:02:24,125 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 03:02:24,125 INFO L93 Difference]: Finished difference Result 1108 states and 1642 transitions. [2024-11-28 03:02:24,126 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-28 03:02:24,126 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 55.25) internal successors, (221), 4 states have internal predecessors, (221), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 221 [2024-11-28 03:02:24,127 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 03:02:24,131 INFO L225 Difference]: With dead ends: 1108 [2024-11-28 03:02:24,131 INFO L226 Difference]: Without dead ends: 700 [2024-11-28 03:02:24,132 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-28 03:02:24,133 INFO L435 NwaCegarLoop]: 731 mSDtfsCounter, 6 mSDsluCounter, 1452 mSDsCounter, 0 mSdLazyCounter, 16 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 6 SdHoareTripleChecker+Valid, 2183 SdHoareTripleChecker+Invalid, 16 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 16 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-28 03:02:24,133 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [6 Valid, 2183 Invalid, 16 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 16 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-28 03:02:24,135 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 700 states. [2024-11-28 03:02:24,154 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 700 to 700. [2024-11-28 03:02:24,156 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 700 states, 699 states have (on average 1.4835479256080115) internal successors, (1037), 699 states have internal predecessors, (1037), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 03:02:24,160 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 700 states to 700 states and 1037 transitions. [2024-11-28 03:02:24,160 INFO L78 Accepts]: Start accepts. Automaton has 700 states and 1037 transitions. Word has length 221 [2024-11-28 03:02:24,160 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 03:02:24,161 INFO L471 AbstractCegarLoop]: Abstraction has 700 states and 1037 transitions. [2024-11-28 03:02:24,161 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 55.25) internal successors, (221), 4 states have internal predecessors, (221), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 03:02:24,161 INFO L276 IsEmpty]: Start isEmpty. Operand 700 states and 1037 transitions. [2024-11-28 03:02:24,164 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 223 [2024-11-28 03:02:24,165 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 03:02:24,165 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 03:02:24,165 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6 [2024-11-28 03:02:24,166 INFO L396 AbstractCegarLoop]: === Iteration 8 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 03:02:24,166 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 03:02:24,166 INFO L85 PathProgramCache]: Analyzing trace with hash -523909459, now seen corresponding path program 1 times [2024-11-28 03:02:24,166 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 03:02:24,167 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [609405111] [2024-11-28 03:02:24,167 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 03:02:24,167 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 03:02:24,672 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 03:02:26,154 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-28 03:02:26,154 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 03:02:26,155 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [609405111] [2024-11-28 03:02:26,155 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [609405111] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 03:02:26,155 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 03:02:26,155 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-28 03:02:26,155 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [864927159] [2024-11-28 03:02:26,156 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 03:02:26,156 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-28 03:02:26,156 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 03:02:26,157 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-28 03:02:26,158 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-28 03:02:26,158 INFO L87 Difference]: Start difference. First operand 700 states and 1037 transitions. Second operand has 4 states, 4 states have (on average 55.5) internal successors, (222), 4 states have internal predecessors, (222), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 03:02:26,234 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 03:02:26,234 INFO L93 Difference]: Finished difference Result 1108 states and 1640 transitions. [2024-11-28 03:02:26,235 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-28 03:02:26,235 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 55.5) internal successors, (222), 4 states have internal predecessors, (222), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 222 [2024-11-28 03:02:26,236 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 03:02:26,240 INFO L225 Difference]: With dead ends: 1108 [2024-11-28 03:02:26,240 INFO L226 Difference]: Without dead ends: 700 [2024-11-28 03:02:26,241 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-28 03:02:26,242 INFO L435 NwaCegarLoop]: 730 mSDtfsCounter, 5 mSDsluCounter, 1450 mSDsCounter, 0 mSdLazyCounter, 16 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 5 SdHoareTripleChecker+Valid, 2180 SdHoareTripleChecker+Invalid, 16 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 16 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-28 03:02:26,242 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [5 Valid, 2180 Invalid, 16 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 16 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-28 03:02:26,244 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 700 states. [2024-11-28 03:02:26,267 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 700 to 700. [2024-11-28 03:02:26,269 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 700 states, 699 states have (on average 1.4821173104434906) internal successors, (1036), 699 states have internal predecessors, (1036), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 03:02:26,273 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 700 states to 700 states and 1036 transitions. [2024-11-28 03:02:26,274 INFO L78 Accepts]: Start accepts. Automaton has 700 states and 1036 transitions. Word has length 222 [2024-11-28 03:02:26,274 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 03:02:26,275 INFO L471 AbstractCegarLoop]: Abstraction has 700 states and 1036 transitions. [2024-11-28 03:02:26,275 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 55.5) internal successors, (222), 4 states have internal predecessors, (222), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 03:02:26,275 INFO L276 IsEmpty]: Start isEmpty. Operand 700 states and 1036 transitions. [2024-11-28 03:02:26,279 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 224 [2024-11-28 03:02:26,280 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 03:02:26,280 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 03:02:26,280 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7 [2024-11-28 03:02:26,280 INFO L396 AbstractCegarLoop]: === Iteration 9 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 03:02:26,281 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 03:02:26,281 INFO L85 PathProgramCache]: Analyzing trace with hash 943224598, now seen corresponding path program 1 times [2024-11-28 03:02:26,281 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 03:02:26,282 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1049453254] [2024-11-28 03:02:26,282 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 03:02:26,282 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 03:02:26,704 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 03:02:28,041 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-28 03:02:28,042 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 03:02:28,042 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1049453254] [2024-11-28 03:02:28,042 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1049453254] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 03:02:28,042 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 03:02:28,043 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-28 03:02:28,044 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1157154917] [2024-11-28 03:02:28,044 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 03:02:28,044 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-28 03:02:28,045 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 03:02:28,045 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-28 03:02:28,046 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-28 03:02:28,046 INFO L87 Difference]: Start difference. First operand 700 states and 1036 transitions. Second operand has 4 states, 4 states have (on average 55.75) internal successors, (223), 4 states have internal predecessors, (223), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 03:02:28,114 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 03:02:28,114 INFO L93 Difference]: Finished difference Result 1246 states and 1843 transitions. [2024-11-28 03:02:28,115 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-28 03:02:28,115 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 55.75) internal successors, (223), 4 states have internal predecessors, (223), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 223 [2024-11-28 03:02:28,115 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 03:02:28,120 INFO L225 Difference]: With dead ends: 1246 [2024-11-28 03:02:28,120 INFO L226 Difference]: Without dead ends: 700 [2024-11-28 03:02:28,121 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-28 03:02:28,124 INFO L435 NwaCegarLoop]: 729 mSDtfsCounter, 6 mSDsluCounter, 1448 mSDsCounter, 0 mSdLazyCounter, 16 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 6 SdHoareTripleChecker+Valid, 2177 SdHoareTripleChecker+Invalid, 16 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 16 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-28 03:02:28,124 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [6 Valid, 2177 Invalid, 16 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 16 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-28 03:02:28,127 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 700 states. [2024-11-28 03:02:28,145 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 700 to 700. [2024-11-28 03:02:28,147 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 700 states, 699 states have (on average 1.4792560801144492) internal successors, (1034), 699 states have internal predecessors, (1034), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 03:02:28,150 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 700 states to 700 states and 1034 transitions. [2024-11-28 03:02:28,151 INFO L78 Accepts]: Start accepts. Automaton has 700 states and 1034 transitions. Word has length 223 [2024-11-28 03:02:28,151 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 03:02:28,151 INFO L471 AbstractCegarLoop]: Abstraction has 700 states and 1034 transitions. [2024-11-28 03:02:28,152 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 55.75) internal successors, (223), 4 states have internal predecessors, (223), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 03:02:28,152 INFO L276 IsEmpty]: Start isEmpty. Operand 700 states and 1034 transitions. [2024-11-28 03:02:28,155 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 225 [2024-11-28 03:02:28,156 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 03:02:28,157 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 03:02:28,157 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8 [2024-11-28 03:02:28,157 INFO L396 AbstractCegarLoop]: === Iteration 10 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 03:02:28,159 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 03:02:28,162 INFO L85 PathProgramCache]: Analyzing trace with hash -29545317, now seen corresponding path program 1 times [2024-11-28 03:02:28,163 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 03:02:28,163 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [10897959] [2024-11-28 03:02:28,163 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 03:02:28,163 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 03:02:28,659 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 03:02:29,805 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-28 03:02:29,807 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 03:02:29,807 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [10897959] [2024-11-28 03:02:29,807 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [10897959] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 03:02:29,807 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 03:02:29,808 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-28 03:02:29,808 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [343273016] [2024-11-28 03:02:29,808 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 03:02:29,808 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-28 03:02:29,809 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 03:02:29,809 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-28 03:02:29,809 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-28 03:02:29,810 INFO L87 Difference]: Start difference. First operand 700 states and 1034 transitions. Second operand has 4 states, 4 states have (on average 56.0) internal successors, (224), 4 states have internal predecessors, (224), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 03:02:29,877 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 03:02:29,877 INFO L93 Difference]: Finished difference Result 1294 states and 1910 transitions. [2024-11-28 03:02:29,878 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-28 03:02:29,878 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 56.0) internal successors, (224), 4 states have internal predecessors, (224), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 224 [2024-11-28 03:02:29,879 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 03:02:29,882 INFO L225 Difference]: With dead ends: 1294 [2024-11-28 03:02:29,882 INFO L226 Difference]: Without dead ends: 700 [2024-11-28 03:02:29,883 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-28 03:02:29,884 INFO L435 NwaCegarLoop]: 728 mSDtfsCounter, 6 mSDsluCounter, 1446 mSDsCounter, 0 mSdLazyCounter, 16 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 6 SdHoareTripleChecker+Valid, 2174 SdHoareTripleChecker+Invalid, 16 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 16 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-28 03:02:29,884 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [6 Valid, 2174 Invalid, 16 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 16 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-28 03:02:29,886 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 700 states. [2024-11-28 03:02:29,902 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 700 to 700. [2024-11-28 03:02:29,904 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 700 states, 699 states have (on average 1.4763948497854078) internal successors, (1032), 699 states have internal predecessors, (1032), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 03:02:29,908 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 700 states to 700 states and 1032 transitions. [2024-11-28 03:02:29,908 INFO L78 Accepts]: Start accepts. Automaton has 700 states and 1032 transitions. Word has length 224 [2024-11-28 03:02:29,908 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 03:02:29,908 INFO L471 AbstractCegarLoop]: Abstraction has 700 states and 1032 transitions. [2024-11-28 03:02:29,909 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 56.0) internal successors, (224), 4 states have internal predecessors, (224), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 03:02:29,909 INFO L276 IsEmpty]: Start isEmpty. Operand 700 states and 1032 transitions. [2024-11-28 03:02:29,912 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 226 [2024-11-28 03:02:29,913 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 03:02:29,913 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 03:02:29,913 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable9 [2024-11-28 03:02:29,914 INFO L396 AbstractCegarLoop]: === Iteration 11 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 03:02:29,916 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 03:02:29,917 INFO L85 PathProgramCache]: Analyzing trace with hash 1774890696, now seen corresponding path program 1 times [2024-11-28 03:02:29,917 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 03:02:29,917 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [229107724] [2024-11-28 03:02:29,917 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 03:02:29,918 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 03:02:30,312 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 03:02:31,476 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-28 03:02:31,476 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 03:02:31,476 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [229107724] [2024-11-28 03:02:31,477 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [229107724] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 03:02:31,477 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 03:02:31,477 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-28 03:02:31,477 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1731484585] [2024-11-28 03:02:31,477 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 03:02:31,477 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-28 03:02:31,478 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 03:02:31,479 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-28 03:02:31,480 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-28 03:02:31,480 INFO L87 Difference]: Start difference. First operand 700 states and 1032 transitions. Second operand has 4 states, 4 states have (on average 56.25) internal successors, (225), 4 states have internal predecessors, (225), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 03:02:31,548 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 03:02:31,549 INFO L93 Difference]: Finished difference Result 1108 states and 1632 transitions. [2024-11-28 03:02:31,549 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-28 03:02:31,550 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 56.25) internal successors, (225), 4 states have internal predecessors, (225), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 225 [2024-11-28 03:02:31,550 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 03:02:31,553 INFO L225 Difference]: With dead ends: 1108 [2024-11-28 03:02:31,553 INFO L226 Difference]: Without dead ends: 700 [2024-11-28 03:02:31,554 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-28 03:02:31,556 INFO L435 NwaCegarLoop]: 727 mSDtfsCounter, 6 mSDsluCounter, 1444 mSDsCounter, 0 mSdLazyCounter, 16 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 6 SdHoareTripleChecker+Valid, 2171 SdHoareTripleChecker+Invalid, 16 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 16 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-28 03:02:31,556 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [6 Valid, 2171 Invalid, 16 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 16 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-28 03:02:31,559 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 700 states. [2024-11-28 03:02:31,577 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 700 to 700. [2024-11-28 03:02:31,579 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 700 states, 699 states have (on average 1.4749642346208869) internal successors, (1031), 699 states have internal predecessors, (1031), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 03:02:31,583 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 700 states to 700 states and 1031 transitions. [2024-11-28 03:02:31,583 INFO L78 Accepts]: Start accepts. Automaton has 700 states and 1031 transitions. Word has length 225 [2024-11-28 03:02:31,583 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 03:02:31,584 INFO L471 AbstractCegarLoop]: Abstraction has 700 states and 1031 transitions. [2024-11-28 03:02:31,584 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 56.25) internal successors, (225), 4 states have internal predecessors, (225), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 03:02:31,584 INFO L276 IsEmpty]: Start isEmpty. Operand 700 states and 1031 transitions. [2024-11-28 03:02:31,587 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 227 [2024-11-28 03:02:31,588 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 03:02:31,588 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 03:02:31,588 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable10 [2024-11-28 03:02:31,588 INFO L396 AbstractCegarLoop]: === Iteration 12 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 03:02:31,589 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 03:02:31,589 INFO L85 PathProgramCache]: Analyzing trace with hash -1371812033, now seen corresponding path program 1 times [2024-11-28 03:02:31,589 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 03:02:31,589 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1618367813] [2024-11-28 03:02:31,589 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 03:02:31,590 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 03:02:32,112 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 03:02:33,392 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-28 03:02:33,393 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 03:02:33,393 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1618367813] [2024-11-28 03:02:33,393 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1618367813] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 03:02:33,393 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 03:02:33,394 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-28 03:02:33,394 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1294998379] [2024-11-28 03:02:33,394 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 03:02:33,395 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-28 03:02:33,395 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 03:02:33,396 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-28 03:02:33,397 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-28 03:02:33,397 INFO L87 Difference]: Start difference. First operand 700 states and 1031 transitions. Second operand has 4 states, 4 states have (on average 56.5) internal successors, (226), 4 states have internal predecessors, (226), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 03:02:33,471 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 03:02:33,472 INFO L93 Difference]: Finished difference Result 1108 states and 1630 transitions. [2024-11-28 03:02:33,472 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-28 03:02:33,473 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 56.5) internal successors, (226), 4 states have internal predecessors, (226), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 226 [2024-11-28 03:02:33,474 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 03:02:33,477 INFO L225 Difference]: With dead ends: 1108 [2024-11-28 03:02:33,477 INFO L226 Difference]: Without dead ends: 700 [2024-11-28 03:02:33,478 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-28 03:02:33,479 INFO L435 NwaCegarLoop]: 726 mSDtfsCounter, 6 mSDsluCounter, 1442 mSDsCounter, 0 mSdLazyCounter, 16 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 6 SdHoareTripleChecker+Valid, 2168 SdHoareTripleChecker+Invalid, 16 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 16 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-28 03:02:33,480 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [6 Valid, 2168 Invalid, 16 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 16 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-28 03:02:33,481 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 700 states. [2024-11-28 03:02:33,506 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 700 to 700. [2024-11-28 03:02:33,508 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 700 states, 699 states have (on average 1.4735336194563662) internal successors, (1030), 699 states have internal predecessors, (1030), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 03:02:33,512 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 700 states to 700 states and 1030 transitions. [2024-11-28 03:02:33,513 INFO L78 Accepts]: Start accepts. Automaton has 700 states and 1030 transitions. Word has length 226 [2024-11-28 03:02:33,513 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 03:02:33,513 INFO L471 AbstractCegarLoop]: Abstraction has 700 states and 1030 transitions. [2024-11-28 03:02:33,514 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 56.5) internal successors, (226), 4 states have internal predecessors, (226), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 03:02:33,514 INFO L276 IsEmpty]: Start isEmpty. Operand 700 states and 1030 transitions. [2024-11-28 03:02:33,520 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 228 [2024-11-28 03:02:33,520 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 03:02:33,520 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 03:02:33,521 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable11 [2024-11-28 03:02:33,521 INFO L396 AbstractCegarLoop]: === Iteration 13 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 03:02:33,521 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 03:02:33,522 INFO L85 PathProgramCache]: Analyzing trace with hash -2077231164, now seen corresponding path program 1 times [2024-11-28 03:02:33,522 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 03:02:33,522 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1801815733] [2024-11-28 03:02:33,522 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 03:02:33,522 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 03:02:34,047 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 03:02:35,139 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-28 03:02:35,140 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 03:02:35,140 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1801815733] [2024-11-28 03:02:35,140 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1801815733] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 03:02:35,140 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 03:02:35,140 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-28 03:02:35,141 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2018867895] [2024-11-28 03:02:35,141 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 03:02:35,141 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-28 03:02:35,141 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 03:02:35,143 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-28 03:02:35,143 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-28 03:02:35,143 INFO L87 Difference]: Start difference. First operand 700 states and 1030 transitions. Second operand has 4 states, 4 states have (on average 56.75) internal successors, (227), 4 states have internal predecessors, (227), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 03:02:35,198 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 03:02:35,199 INFO L93 Difference]: Finished difference Result 1108 states and 1628 transitions. [2024-11-28 03:02:35,199 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-28 03:02:35,200 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 56.75) internal successors, (227), 4 states have internal predecessors, (227), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 227 [2024-11-28 03:02:35,200 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 03:02:35,203 INFO L225 Difference]: With dead ends: 1108 [2024-11-28 03:02:35,203 INFO L226 Difference]: Without dead ends: 700 [2024-11-28 03:02:35,204 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-28 03:02:35,207 INFO L435 NwaCegarLoop]: 725 mSDtfsCounter, 6 mSDsluCounter, 1440 mSDsCounter, 0 mSdLazyCounter, 16 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 6 SdHoareTripleChecker+Valid, 2165 SdHoareTripleChecker+Invalid, 16 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 16 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-28 03:02:35,207 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [6 Valid, 2165 Invalid, 16 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 16 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-28 03:02:35,209 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 700 states. [2024-11-28 03:02:35,225 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 700 to 700. [2024-11-28 03:02:35,228 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 700 states, 699 states have (on average 1.4721030042918455) internal successors, (1029), 699 states have internal predecessors, (1029), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 03:02:35,231 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 700 states to 700 states and 1029 transitions. [2024-11-28 03:02:35,232 INFO L78 Accepts]: Start accepts. Automaton has 700 states and 1029 transitions. Word has length 227 [2024-11-28 03:02:35,232 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 03:02:35,232 INFO L471 AbstractCegarLoop]: Abstraction has 700 states and 1029 transitions. [2024-11-28 03:02:35,233 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 56.75) internal successors, (227), 4 states have internal predecessors, (227), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 03:02:35,233 INFO L276 IsEmpty]: Start isEmpty. Operand 700 states and 1029 transitions. [2024-11-28 03:02:35,236 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 229 [2024-11-28 03:02:35,236 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 03:02:35,236 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 03:02:35,237 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable12 [2024-11-28 03:02:35,237 INFO L396 AbstractCegarLoop]: === Iteration 14 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 03:02:35,238 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 03:02:35,238 INFO L85 PathProgramCache]: Analyzing trace with hash 99784443, now seen corresponding path program 1 times [2024-11-28 03:02:35,238 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 03:02:35,239 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1327871105] [2024-11-28 03:02:35,239 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 03:02:35,239 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 03:02:35,599 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 03:02:36,568 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-28 03:02:36,568 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 03:02:36,568 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1327871105] [2024-11-28 03:02:36,568 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1327871105] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 03:02:36,568 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 03:02:36,569 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-28 03:02:36,569 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1123683280] [2024-11-28 03:02:36,569 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 03:02:36,569 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-28 03:02:36,569 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 03:02:36,570 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-28 03:02:36,570 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-28 03:02:36,571 INFO L87 Difference]: Start difference. First operand 700 states and 1029 transitions. Second operand has 4 states, 4 states have (on average 57.0) internal successors, (228), 4 states have internal predecessors, (228), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 03:02:36,618 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 03:02:36,619 INFO L93 Difference]: Finished difference Result 1108 states and 1626 transitions. [2024-11-28 03:02:36,619 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-28 03:02:36,620 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 57.0) internal successors, (228), 4 states have internal predecessors, (228), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 228 [2024-11-28 03:02:36,622 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 03:02:36,625 INFO L225 Difference]: With dead ends: 1108 [2024-11-28 03:02:36,625 INFO L226 Difference]: Without dead ends: 700 [2024-11-28 03:02:36,626 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-28 03:02:36,626 INFO L435 NwaCegarLoop]: 724 mSDtfsCounter, 6 mSDsluCounter, 1438 mSDsCounter, 0 mSdLazyCounter, 16 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 6 SdHoareTripleChecker+Valid, 2162 SdHoareTripleChecker+Invalid, 16 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 16 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-28 03:02:36,627 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [6 Valid, 2162 Invalid, 16 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 16 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-28 03:02:36,629 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 700 states. [2024-11-28 03:02:36,648 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 700 to 700. [2024-11-28 03:02:36,651 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 700 states, 699 states have (on average 1.4706723891273248) internal successors, (1028), 699 states have internal predecessors, (1028), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 03:02:36,655 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 700 states to 700 states and 1028 transitions. [2024-11-28 03:02:36,655 INFO L78 Accepts]: Start accepts. Automaton has 700 states and 1028 transitions. Word has length 228 [2024-11-28 03:02:36,657 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 03:02:36,657 INFO L471 AbstractCegarLoop]: Abstraction has 700 states and 1028 transitions. [2024-11-28 03:02:36,658 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 57.0) internal successors, (228), 4 states have internal predecessors, (228), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 03:02:36,658 INFO L276 IsEmpty]: Start isEmpty. Operand 700 states and 1028 transitions. [2024-11-28 03:02:36,661 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 230 [2024-11-28 03:02:36,661 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 03:02:36,661 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 03:02:36,661 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable13 [2024-11-28 03:02:36,662 INFO L396 AbstractCegarLoop]: === Iteration 15 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 03:02:36,662 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 03:02:36,662 INFO L85 PathProgramCache]: Analyzing trace with hash 26033572, now seen corresponding path program 1 times [2024-11-28 03:02:36,663 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 03:02:36,663 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1114276405] [2024-11-28 03:02:36,663 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 03:02:36,663 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 03:02:37,482 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 03:02:39,616 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-28 03:02:39,616 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 03:02:39,617 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1114276405] [2024-11-28 03:02:39,617 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1114276405] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 03:02:39,617 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 03:02:39,617 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2024-11-28 03:02:39,617 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1283289418] [2024-11-28 03:02:39,617 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 03:02:39,618 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2024-11-28 03:02:39,618 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 03:02:39,619 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2024-11-28 03:02:39,619 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=38, Unknown=0, NotChecked=0, Total=56 [2024-11-28 03:02:39,619 INFO L87 Difference]: Start difference. First operand 700 states and 1028 transitions. Second operand has 8 states, 8 states have (on average 28.625) internal successors, (229), 8 states have internal predecessors, (229), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 03:02:39,905 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 03:02:39,906 INFO L93 Difference]: Finished difference Result 1304 states and 1913 transitions. [2024-11-28 03:02:39,906 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2024-11-28 03:02:39,907 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 28.625) internal successors, (229), 8 states have internal predecessors, (229), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 229 [2024-11-28 03:02:39,907 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 03:02:39,911 INFO L225 Difference]: With dead ends: 1304 [2024-11-28 03:02:39,911 INFO L226 Difference]: Without dead ends: 718 [2024-11-28 03:02:39,914 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=22, Invalid=50, Unknown=0, NotChecked=0, Total=72 [2024-11-28 03:02:39,914 INFO L435 NwaCegarLoop]: 699 mSDtfsCounter, 691 mSDsluCounter, 3476 mSDsCounter, 0 mSdLazyCounter, 193 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 691 SdHoareTripleChecker+Valid, 4175 SdHoareTripleChecker+Invalid, 193 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 193 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-11-28 03:02:39,915 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [691 Valid, 4175 Invalid, 193 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 193 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-11-28 03:02:39,916 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 718 states. [2024-11-28 03:02:39,933 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 718 to 708. [2024-11-28 03:02:39,935 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 708 states, 707 states have (on average 1.4681753889674682) internal successors, (1038), 707 states have internal predecessors, (1038), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 03:02:39,938 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 708 states to 708 states and 1038 transitions. [2024-11-28 03:02:39,939 INFO L78 Accepts]: Start accepts. Automaton has 708 states and 1038 transitions. Word has length 229 [2024-11-28 03:02:39,939 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 03:02:39,939 INFO L471 AbstractCegarLoop]: Abstraction has 708 states and 1038 transitions. [2024-11-28 03:02:39,939 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 28.625) internal successors, (229), 8 states have internal predecessors, (229), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 03:02:39,940 INFO L276 IsEmpty]: Start isEmpty. Operand 708 states and 1038 transitions. [2024-11-28 03:02:39,943 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 231 [2024-11-28 03:02:39,943 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 03:02:39,943 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 03:02:39,943 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable14 [2024-11-28 03:02:39,944 INFO L396 AbstractCegarLoop]: === Iteration 16 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 03:02:39,944 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 03:02:39,944 INFO L85 PathProgramCache]: Analyzing trace with hash 794633637, now seen corresponding path program 1 times [2024-11-28 03:02:39,944 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 03:02:39,945 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [604721304] [2024-11-28 03:02:39,945 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 03:02:39,945 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 03:02:40,365 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 03:02:42,044 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-28 03:02:42,045 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 03:02:42,045 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [604721304] [2024-11-28 03:02:42,045 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [604721304] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 03:02:42,045 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 03:02:42,045 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2024-11-28 03:02:42,045 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [381991502] [2024-11-28 03:02:42,046 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 03:02:42,046 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2024-11-28 03:02:42,046 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 03:02:42,047 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2024-11-28 03:02:42,047 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=42, Unknown=0, NotChecked=0, Total=56 [2024-11-28 03:02:42,048 INFO L87 Difference]: Start difference. First operand 708 states and 1038 transitions. Second operand has 8 states, 8 states have (on average 28.75) internal successors, (230), 8 states have internal predecessors, (230), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 03:02:42,199 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 03:02:42,200 INFO L93 Difference]: Finished difference Result 1310 states and 1920 transitions. [2024-11-28 03:02:42,200 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2024-11-28 03:02:42,201 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 28.75) internal successors, (230), 8 states have internal predecessors, (230), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 230 [2024-11-28 03:02:42,201 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 03:02:42,204 INFO L225 Difference]: With dead ends: 1310 [2024-11-28 03:02:42,204 INFO L226 Difference]: Without dead ends: 720 [2024-11-28 03:02:42,205 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=14, Invalid=42, Unknown=0, NotChecked=0, Total=56 [2024-11-28 03:02:42,208 INFO L435 NwaCegarLoop]: 719 mSDtfsCounter, 11 mSDsluCounter, 4294 mSDsCounter, 0 mSdLazyCounter, 80 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 11 SdHoareTripleChecker+Valid, 5013 SdHoareTripleChecker+Invalid, 80 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 80 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-28 03:02:42,209 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [11 Valid, 5013 Invalid, 80 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 80 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-28 03:02:42,211 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 720 states. [2024-11-28 03:02:42,229 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 720 to 718. [2024-11-28 03:02:42,231 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 718 states, 717 states have (on average 1.4672245467224547) internal successors, (1052), 717 states have internal predecessors, (1052), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 03:02:42,235 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 718 states to 718 states and 1052 transitions. [2024-11-28 03:02:42,236 INFO L78 Accepts]: Start accepts. Automaton has 718 states and 1052 transitions. Word has length 230 [2024-11-28 03:02:42,236 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 03:02:42,236 INFO L471 AbstractCegarLoop]: Abstraction has 718 states and 1052 transitions. [2024-11-28 03:02:42,236 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 28.75) internal successors, (230), 8 states have internal predecessors, (230), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 03:02:42,237 INFO L276 IsEmpty]: Start isEmpty. Operand 718 states and 1052 transitions. [2024-11-28 03:02:42,240 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 231 [2024-11-28 03:02:42,240 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 03:02:42,241 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 03:02:42,241 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable15 [2024-11-28 03:02:42,241 INFO L396 AbstractCegarLoop]: === Iteration 17 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 03:02:42,243 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 03:02:42,243 INFO L85 PathProgramCache]: Analyzing trace with hash -1702319170, now seen corresponding path program 1 times [2024-11-28 03:02:42,244 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 03:02:42,244 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [971769169] [2024-11-28 03:02:42,244 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 03:02:42,244 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 03:02:42,733 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 03:02:43,966 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-28 03:02:43,967 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 03:02:43,967 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [971769169] [2024-11-28 03:02:43,967 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [971769169] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 03:02:43,967 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 03:02:43,967 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-11-28 03:02:43,967 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [405385071] [2024-11-28 03:02:43,968 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 03:02:43,968 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-11-28 03:02:43,968 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 03:02:43,969 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-11-28 03:02:43,970 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2024-11-28 03:02:43,971 INFO L87 Difference]: Start difference. First operand 718 states and 1052 transitions. Second operand has 6 states, 6 states have (on average 38.333333333333336) internal successors, (230), 6 states have internal predecessors, (230), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 03:02:44,942 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 03:02:44,943 INFO L93 Difference]: Finished difference Result 1474 states and 2152 transitions. [2024-11-28 03:02:44,943 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-28 03:02:44,944 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 38.333333333333336) internal successors, (230), 6 states have internal predecessors, (230), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 230 [2024-11-28 03:02:44,944 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 03:02:44,948 INFO L225 Difference]: With dead ends: 1474 [2024-11-28 03:02:44,948 INFO L226 Difference]: Without dead ends: 872 [2024-11-28 03:02:44,950 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=20, Invalid=36, Unknown=0, NotChecked=0, Total=56 [2024-11-28 03:02:44,950 INFO L435 NwaCegarLoop]: 721 mSDtfsCounter, 589 mSDsluCounter, 1679 mSDsCounter, 0 mSdLazyCounter, 378 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.7s Time, 0 mProtectedPredicate, 0 mProtectedAction, 589 SdHoareTripleChecker+Valid, 2400 SdHoareTripleChecker+Invalid, 378 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 378 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.9s IncrementalHoareTripleChecker+Time [2024-11-28 03:02:44,951 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [589 Valid, 2400 Invalid, 378 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 378 Invalid, 0 Unknown, 0 Unchecked, 0.9s Time] [2024-11-28 03:02:44,954 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 872 states. [2024-11-28 03:02:44,973 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 872 to 718. [2024-11-28 03:02:44,975 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 718 states, 717 states have (on average 1.4644351464435146) internal successors, (1050), 717 states have internal predecessors, (1050), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 03:02:44,979 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 718 states to 718 states and 1050 transitions. [2024-11-28 03:02:44,979 INFO L78 Accepts]: Start accepts. Automaton has 718 states and 1050 transitions. Word has length 230 [2024-11-28 03:02:44,979 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 03:02:44,980 INFO L471 AbstractCegarLoop]: Abstraction has 718 states and 1050 transitions. [2024-11-28 03:02:44,980 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 38.333333333333336) internal successors, (230), 6 states have internal predecessors, (230), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 03:02:44,980 INFO L276 IsEmpty]: Start isEmpty. Operand 718 states and 1050 transitions. [2024-11-28 03:02:44,984 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 231 [2024-11-28 03:02:44,984 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 03:02:44,984 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 03:02:44,985 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable16 [2024-11-28 03:02:44,985 INFO L396 AbstractCegarLoop]: === Iteration 18 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 03:02:44,985 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 03:02:44,986 INFO L85 PathProgramCache]: Analyzing trace with hash -357936550, now seen corresponding path program 1 times [2024-11-28 03:02:44,986 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 03:02:44,986 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1456998894] [2024-11-28 03:02:44,986 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 03:02:44,986 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 03:02:45,605 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 03:02:46,930 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-28 03:02:46,930 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 03:02:46,930 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1456998894] [2024-11-28 03:02:46,930 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1456998894] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 03:02:46,930 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 03:02:46,931 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-28 03:02:46,931 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2033032535] [2024-11-28 03:02:46,931 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 03:02:46,932 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-28 03:02:46,932 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 03:02:46,933 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-28 03:02:46,933 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-28 03:02:46,934 INFO L87 Difference]: Start difference. First operand 718 states and 1050 transitions. Second operand has 5 states, 5 states have (on average 46.0) internal successors, (230), 5 states have internal predecessors, (230), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 03:02:47,094 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 03:02:47,094 INFO L93 Difference]: Finished difference Result 1328 states and 1941 transitions. [2024-11-28 03:02:47,095 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-11-28 03:02:47,095 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 46.0) internal successors, (230), 5 states have internal predecessors, (230), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 230 [2024-11-28 03:02:47,096 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 03:02:47,099 INFO L225 Difference]: With dead ends: 1328 [2024-11-28 03:02:47,099 INFO L226 Difference]: Without dead ends: 724 [2024-11-28 03:02:47,100 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2024-11-28 03:02:47,101 INFO L435 NwaCegarLoop]: 710 mSDtfsCounter, 680 mSDsluCounter, 1413 mSDsCounter, 0 mSdLazyCounter, 64 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 680 SdHoareTripleChecker+Valid, 2123 SdHoareTripleChecker+Invalid, 64 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 64 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-28 03:02:47,101 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [680 Valid, 2123 Invalid, 64 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 64 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-28 03:02:47,103 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 724 states. [2024-11-28 03:02:47,118 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 724 to 724. [2024-11-28 03:02:47,120 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 724 states, 723 states have (on average 1.4605809128630705) internal successors, (1056), 723 states have internal predecessors, (1056), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 03:02:47,124 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 724 states to 724 states and 1056 transitions. [2024-11-28 03:02:47,124 INFO L78 Accepts]: Start accepts. Automaton has 724 states and 1056 transitions. Word has length 230 [2024-11-28 03:02:47,124 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 03:02:47,124 INFO L471 AbstractCegarLoop]: Abstraction has 724 states and 1056 transitions. [2024-11-28 03:02:47,125 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 46.0) internal successors, (230), 5 states have internal predecessors, (230), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 03:02:47,125 INFO L276 IsEmpty]: Start isEmpty. Operand 724 states and 1056 transitions. [2024-11-28 03:02:47,128 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 232 [2024-11-28 03:02:47,128 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 03:02:47,129 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 03:02:47,129 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable17 [2024-11-28 03:02:47,129 INFO L396 AbstractCegarLoop]: === Iteration 19 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 03:02:47,130 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 03:02:47,130 INFO L85 PathProgramCache]: Analyzing trace with hash 1971804679, now seen corresponding path program 1 times [2024-11-28 03:02:47,130 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 03:02:47,130 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2014920701] [2024-11-28 03:02:47,130 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 03:02:47,131 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 03:02:47,825 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 03:02:49,434 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-28 03:02:49,435 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 03:02:49,435 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2014920701] [2024-11-28 03:02:49,435 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2014920701] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 03:02:49,435 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 03:02:49,435 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2024-11-28 03:02:49,435 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [275140987] [2024-11-28 03:02:49,435 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 03:02:49,436 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2024-11-28 03:02:49,436 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 03:02:49,438 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-11-28 03:02:49,438 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2024-11-28 03:02:49,438 INFO L87 Difference]: Start difference. First operand 724 states and 1056 transitions. Second operand has 7 states, 7 states have (on average 33.0) internal successors, (231), 7 states have internal predecessors, (231), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 03:02:49,793 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 03:02:49,794 INFO L93 Difference]: Finished difference Result 1334 states and 1939 transitions. [2024-11-28 03:02:49,794 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2024-11-28 03:02:49,795 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 33.0) internal successors, (231), 7 states have internal predecessors, (231), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 231 [2024-11-28 03:02:49,796 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 03:02:49,799 INFO L225 Difference]: With dead ends: 1334 [2024-11-28 03:02:49,800 INFO L226 Difference]: Without dead ends: 914 [2024-11-28 03:02:49,801 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=33, Invalid=77, Unknown=0, NotChecked=0, Total=110 [2024-11-28 03:02:49,801 INFO L435 NwaCegarLoop]: 705 mSDtfsCounter, 1689 mSDsluCounter, 2818 mSDsCounter, 0 mSdLazyCounter, 122 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1689 SdHoareTripleChecker+Valid, 3523 SdHoareTripleChecker+Invalid, 122 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 122 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-11-28 03:02:49,802 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1689 Valid, 3523 Invalid, 122 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 122 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-11-28 03:02:49,803 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 914 states. [2024-11-28 03:02:49,821 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 914 to 728. [2024-11-28 03:02:49,822 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 728 states, 727 states have (on average 1.4594222833562587) internal successors, (1061), 727 states have internal predecessors, (1061), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 03:02:49,826 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 728 states to 728 states and 1061 transitions. [2024-11-28 03:02:49,826 INFO L78 Accepts]: Start accepts. Automaton has 728 states and 1061 transitions. Word has length 231 [2024-11-28 03:02:49,827 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 03:02:49,827 INFO L471 AbstractCegarLoop]: Abstraction has 728 states and 1061 transitions. [2024-11-28 03:02:49,827 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 33.0) internal successors, (231), 7 states have internal predecessors, (231), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 03:02:49,827 INFO L276 IsEmpty]: Start isEmpty. Operand 728 states and 1061 transitions. [2024-11-28 03:02:49,831 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 233 [2024-11-28 03:02:49,831 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 03:02:49,831 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 03:02:49,832 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable18 [2024-11-28 03:02:49,832 INFO L396 AbstractCegarLoop]: === Iteration 20 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 03:02:49,832 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 03:02:49,833 INFO L85 PathProgramCache]: Analyzing trace with hash -1096975599, now seen corresponding path program 1 times [2024-11-28 03:02:49,834 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 03:02:49,834 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [686426042] [2024-11-28 03:02:49,834 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 03:02:49,834 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 03:02:50,988 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 03:02:52,289 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-28 03:02:52,290 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 03:02:52,290 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [686426042] [2024-11-28 03:02:52,290 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [686426042] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 03:02:52,290 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 03:02:52,290 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-28 03:02:52,290 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [341976960] [2024-11-28 03:02:52,290 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 03:02:52,291 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-28 03:02:52,291 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 03:02:52,292 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-28 03:02:52,292 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-28 03:02:52,293 INFO L87 Difference]: Start difference. First operand 728 states and 1061 transitions. Second operand has 5 states, 5 states have (on average 46.4) internal successors, (232), 5 states have internal predecessors, (232), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 03:02:52,460 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 03:02:52,460 INFO L93 Difference]: Finished difference Result 1170 states and 1701 transitions. [2024-11-28 03:02:52,461 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-11-28 03:02:52,461 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 46.4) internal successors, (232), 5 states have internal predecessors, (232), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 232 [2024-11-28 03:02:52,462 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 03:02:52,465 INFO L225 Difference]: With dead ends: 1170 [2024-11-28 03:02:52,466 INFO L226 Difference]: Without dead ends: 736 [2024-11-28 03:02:52,467 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2024-11-28 03:02:52,469 INFO L435 NwaCegarLoop]: 703 mSDtfsCounter, 589 mSDsluCounter, 1400 mSDsCounter, 0 mSdLazyCounter, 84 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 589 SdHoareTripleChecker+Valid, 2103 SdHoareTripleChecker+Invalid, 84 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 84 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-28 03:02:52,472 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [589 Valid, 2103 Invalid, 84 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 84 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-28 03:02:52,474 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 736 states. [2024-11-28 03:02:52,495 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 736 to 734. [2024-11-28 03:02:52,497 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 734 states, 733 states have (on average 1.455661664392906) internal successors, (1067), 733 states have internal predecessors, (1067), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 03:02:52,501 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 734 states to 734 states and 1067 transitions. [2024-11-28 03:02:52,502 INFO L78 Accepts]: Start accepts. Automaton has 734 states and 1067 transitions. Word has length 232 [2024-11-28 03:02:52,503 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 03:02:52,504 INFO L471 AbstractCegarLoop]: Abstraction has 734 states and 1067 transitions. [2024-11-28 03:02:52,504 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 46.4) internal successors, (232), 5 states have internal predecessors, (232), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 03:02:52,504 INFO L276 IsEmpty]: Start isEmpty. Operand 734 states and 1067 transitions. [2024-11-28 03:02:52,506 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 234 [2024-11-28 03:02:52,506 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 03:02:52,507 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 03:02:52,507 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable19 [2024-11-28 03:02:52,507 INFO L396 AbstractCegarLoop]: === Iteration 21 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 03:02:52,508 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 03:02:52,508 INFO L85 PathProgramCache]: Analyzing trace with hash 776328857, now seen corresponding path program 1 times [2024-11-28 03:02:52,508 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 03:02:52,508 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1096105248] [2024-11-28 03:02:52,508 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 03:02:52,509 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 03:02:53,870 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 03:02:55,280 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-28 03:02:55,281 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 03:02:55,281 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1096105248] [2024-11-28 03:02:55,281 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1096105248] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 03:02:55,282 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 03:02:55,282 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-28 03:02:55,282 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1031940769] [2024-11-28 03:02:55,282 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 03:02:55,282 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-28 03:02:55,282 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 03:02:55,283 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-28 03:02:55,283 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-28 03:02:55,285 INFO L87 Difference]: Start difference. First operand 734 states and 1067 transitions. Second operand has 5 states, 5 states have (on average 46.6) internal successors, (233), 5 states have internal predecessors, (233), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 03:02:55,449 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 03:02:55,449 INFO L93 Difference]: Finished difference Result 1161 states and 1686 transitions. [2024-11-28 03:02:55,450 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-11-28 03:02:55,450 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 46.6) internal successors, (233), 5 states have internal predecessors, (233), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 233 [2024-11-28 03:02:55,451 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 03:02:55,454 INFO L225 Difference]: With dead ends: 1161 [2024-11-28 03:02:55,455 INFO L226 Difference]: Without dead ends: 738 [2024-11-28 03:02:55,456 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2024-11-28 03:02:55,458 INFO L435 NwaCegarLoop]: 703 mSDtfsCounter, 559 mSDsluCounter, 1399 mSDsCounter, 0 mSdLazyCounter, 84 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 559 SdHoareTripleChecker+Valid, 2102 SdHoareTripleChecker+Invalid, 84 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 84 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-28 03:02:55,458 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [559 Valid, 2102 Invalid, 84 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 84 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-28 03:02:55,461 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 738 states. [2024-11-28 03:02:55,476 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 738 to 737. [2024-11-28 03:02:55,478 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 737 states, 736 states have (on average 1.453804347826087) internal successors, (1070), 736 states have internal predecessors, (1070), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 03:02:55,482 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 737 states to 737 states and 1070 transitions. [2024-11-28 03:02:55,483 INFO L78 Accepts]: Start accepts. Automaton has 737 states and 1070 transitions. Word has length 233 [2024-11-28 03:02:55,484 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 03:02:55,484 INFO L471 AbstractCegarLoop]: Abstraction has 737 states and 1070 transitions. [2024-11-28 03:02:55,484 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 46.6) internal successors, (233), 5 states have internal predecessors, (233), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 03:02:55,484 INFO L276 IsEmpty]: Start isEmpty. Operand 737 states and 1070 transitions. [2024-11-28 03:02:55,486 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 235 [2024-11-28 03:02:55,486 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 03:02:55,487 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 03:02:55,487 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable20 [2024-11-28 03:02:55,487 INFO L396 AbstractCegarLoop]: === Iteration 22 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 03:02:55,489 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 03:02:55,489 INFO L85 PathProgramCache]: Analyzing trace with hash 1966964095, now seen corresponding path program 1 times [2024-11-28 03:02:55,490 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 03:02:55,491 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [890516362] [2024-11-28 03:02:55,491 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 03:02:55,491 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 03:02:56,762 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 03:02:59,316 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-28 03:02:59,316 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 03:02:59,316 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [890516362] [2024-11-28 03:02:59,316 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [890516362] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 03:02:59,316 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 03:02:59,316 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2024-11-28 03:02:59,316 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1246585869] [2024-11-28 03:02:59,316 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 03:02:59,317 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2024-11-28 03:02:59,317 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 03:02:59,319 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-11-28 03:02:59,319 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2024-11-28 03:02:59,320 INFO L87 Difference]: Start difference. First operand 737 states and 1070 transitions. Second operand has 7 states, 7 states have (on average 33.42857142857143) internal successors, (234), 7 states have internal predecessors, (234), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 03:02:59,657 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 03:02:59,659 INFO L93 Difference]: Finished difference Result 1172 states and 1700 transitions. [2024-11-28 03:02:59,659 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2024-11-28 03:02:59,660 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 33.42857142857143) internal successors, (234), 7 states have internal predecessors, (234), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 234 [2024-11-28 03:02:59,660 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 03:02:59,664 INFO L225 Difference]: With dead ends: 1172 [2024-11-28 03:02:59,664 INFO L226 Difference]: Without dead ends: 746 [2024-11-28 03:02:59,666 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=27, Invalid=63, Unknown=0, NotChecked=0, Total=90 [2024-11-28 03:02:59,669 INFO L435 NwaCegarLoop]: 685 mSDtfsCounter, 529 mSDsluCounter, 2049 mSDsCounter, 0 mSdLazyCounter, 187 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 529 SdHoareTripleChecker+Valid, 2734 SdHoareTripleChecker+Invalid, 187 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 187 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2024-11-28 03:02:59,670 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [529 Valid, 2734 Invalid, 187 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 187 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2024-11-28 03:02:59,671 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 746 states. [2024-11-28 03:02:59,688 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 746 to 741. [2024-11-28 03:02:59,691 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 741 states, 740 states have (on average 1.4527027027027026) internal successors, (1075), 740 states have internal predecessors, (1075), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 03:02:59,695 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 741 states to 741 states and 1075 transitions. [2024-11-28 03:02:59,695 INFO L78 Accepts]: Start accepts. Automaton has 741 states and 1075 transitions. Word has length 234 [2024-11-28 03:02:59,695 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 03:02:59,696 INFO L471 AbstractCegarLoop]: Abstraction has 741 states and 1075 transitions. [2024-11-28 03:02:59,696 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 33.42857142857143) internal successors, (234), 7 states have internal predecessors, (234), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 03:02:59,696 INFO L276 IsEmpty]: Start isEmpty. Operand 741 states and 1075 transitions. [2024-11-28 03:02:59,698 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 236 [2024-11-28 03:02:59,698 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 03:02:59,698 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 03:02:59,699 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable21 [2024-11-28 03:02:59,699 INFO L396 AbstractCegarLoop]: === Iteration 23 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 03:02:59,699 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 03:02:59,699 INFO L85 PathProgramCache]: Analyzing trace with hash -529340456, now seen corresponding path program 1 times [2024-11-28 03:02:59,700 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 03:02:59,700 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [501480312] [2024-11-28 03:02:59,700 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 03:02:59,700 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 03:03:01,284 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-28 03:03:01,284 INFO L357 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-28 03:03:02,527 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-28 03:03:02,751 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-28 03:03:02,751 INFO L340 BasicCegarLoop]: Counterexample is feasible [2024-11-28 03:03:02,752 INFO L782 garLoopResultBuilder]: Registering result UNSAFE for location ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION (0 of 1 remaining) [2024-11-28 03:03:02,755 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable22 [2024-11-28 03:03:02,759 INFO L422 BasicCegarLoop]: Path program histogram: [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 03:03:03,028 INFO L170 ceAbstractionStarter]: Computing trace abstraction results [2024-11-28 03:03:03,031 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 28.11 03:03:03 BoogieIcfgContainer [2024-11-28 03:03:03,032 INFO L131 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2024-11-28 03:03:03,033 INFO L112 PluginConnector]: ------------------------Witness Printer---------------------------- [2024-11-28 03:03:03,033 INFO L270 PluginConnector]: Initializing Witness Printer... [2024-11-28 03:03:03,033 INFO L274 PluginConnector]: Witness Printer initialized [2024-11-28 03:03:03,034 INFO L184 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.11 03:02:06" (3/4) ... [2024-11-28 03:03:03,037 INFO L149 WitnessPrinter]: No result that supports witness generation found [2024-11-28 03:03:03,038 INFO L131 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2024-11-28 03:03:03,039 INFO L158 Benchmark]: Toolchain (without parser) took 62574.00ms. Allocated memory was 142.6MB in the beginning and 310.4MB in the end (delta: 167.8MB). Free memory was 116.7MB in the beginning and 116.1MB in the end (delta: 602.4kB). Peak memory consumption was 165.3MB. Max. memory is 16.1GB. [2024-11-28 03:03:03,039 INFO L158 Benchmark]: CDTParser took 0.51ms. Allocated memory is still 142.6MB. Free memory is still 78.7MB. There was no memory consumed. Max. memory is 16.1GB. [2024-11-28 03:03:03,040 INFO L158 Benchmark]: CACSL2BoogieTranslator took 886.77ms. Allocated memory is still 142.6MB. Free memory was 116.7MB in the beginning and 79.5MB in the end (delta: 37.2MB). Peak memory consumption was 33.6MB. Max. memory is 16.1GB. [2024-11-28 03:03:03,040 INFO L158 Benchmark]: Boogie Procedure Inliner took 348.82ms. Allocated memory is still 142.6MB. Free memory was 79.3MB in the beginning and 81.3MB in the end (delta: -2.1MB). Peak memory consumption was 39.8MB. Max. memory is 16.1GB. [2024-11-28 03:03:03,040 INFO L158 Benchmark]: Boogie Preprocessor took 378.89ms. Allocated memory is still 142.6MB. Free memory was 81.3MB in the beginning and 58.3MB in the end (delta: 23.0MB). Peak memory consumption was 25.2MB. Max. memory is 16.1GB. [2024-11-28 03:03:03,041 INFO L158 Benchmark]: RCFGBuilder took 4017.70ms. Allocated memory was 142.6MB in the beginning and 411.0MB in the end (delta: 268.4MB). Free memory was 58.3MB in the beginning and 289.9MB in the end (delta: -231.5MB). Peak memory consumption was 157.2MB. Max. memory is 16.1GB. [2024-11-28 03:03:03,041 INFO L158 Benchmark]: TraceAbstraction took 56924.28ms. Allocated memory was 411.0MB in the beginning and 310.4MB in the end (delta: -100.7MB). Free memory was 289.9MB in the beginning and 116.2MB in the end (delta: 173.7MB). Peak memory consumption was 127.7MB. Max. memory is 16.1GB. [2024-11-28 03:03:03,041 INFO L158 Benchmark]: Witness Printer took 5.59ms. Allocated memory is still 310.4MB. Free memory was 116.2MB in the beginning and 116.1MB in the end (delta: 25.4kB). There was no memory consumed. Max. memory is 16.1GB. [2024-11-28 03:03:03,047 INFO L338 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.51ms. Allocated memory is still 142.6MB. Free memory is still 78.7MB. There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 886.77ms. Allocated memory is still 142.6MB. Free memory was 116.7MB in the beginning and 79.5MB in the end (delta: 37.2MB). Peak memory consumption was 33.6MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 348.82ms. Allocated memory is still 142.6MB. Free memory was 79.3MB in the beginning and 81.3MB in the end (delta: -2.1MB). Peak memory consumption was 39.8MB. Max. memory is 16.1GB. * Boogie Preprocessor took 378.89ms. Allocated memory is still 142.6MB. Free memory was 81.3MB in the beginning and 58.3MB in the end (delta: 23.0MB). Peak memory consumption was 25.2MB. Max. memory is 16.1GB. * RCFGBuilder took 4017.70ms. Allocated memory was 142.6MB in the beginning and 411.0MB in the end (delta: 268.4MB). Free memory was 58.3MB in the beginning and 289.9MB in the end (delta: -231.5MB). Peak memory consumption was 157.2MB. Max. memory is 16.1GB. * TraceAbstraction took 56924.28ms. Allocated memory was 411.0MB in the beginning and 310.4MB in the end (delta: -100.7MB). Free memory was 289.9MB in the beginning and 116.2MB in the end (delta: 173.7MB). Peak memory consumption was 127.7MB. Max. memory is 16.1GB. * Witness Printer took 5.59ms. Allocated memory is still 310.4MB. Free memory was 116.2MB in the beginning and 116.1MB in the end (delta: 25.4kB). There was no memory consumed. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: ErrorAutomatonStatistics NumberErrorTraces: 0, NumberStatementsAllTraces: 0, NumberRelevantStatements: 0, 0.0s ErrorAutomatonConstructionTimeTotal, 0.0s FaulLocalizationTime, NumberStatementsFirstTrace: -1, TraceLengthAvg: 0, 0.0s ErrorAutomatonConstructionTimeAvg, 0.0s ErrorAutomatonDifferenceTimeAvg, 0.0s ErrorAutomatonDifferenceTimeTotal, NumberOfNoEnhancement: 0, NumberOfFiniteEnhancement: 0, NumberOfInfiniteEnhancement: 0 - UnprovableResult [Line: 21]: Unable to prove that a call to reach_error is unreachable Unable to prove that a call to reach_error is unreachable Reason: overapproximation of bitwiseOr at line 400, overapproximation of bitwiseOr at line 420, overapproximation of bitwiseOr at line 460, overapproximation of bitwiseAnd at line 200, overapproximation of bitwiseAnd at line 564. Possible FailurePath: [L26] const SORT_1 mask_SORT_1 = (SORT_1)-1 >> (sizeof(SORT_1) * 8 - 1); [L27] const SORT_1 msb_SORT_1 = (SORT_1)1 << (1 - 1); [L29] const SORT_3 mask_SORT_3 = (SORT_3)-1 >> (sizeof(SORT_3) * 8 - 8); [L30] const SORT_3 msb_SORT_3 = (SORT_3)1 << (8 - 1); [L32] const SORT_10 mask_SORT_10 = (SORT_10)-1 >> (sizeof(SORT_10) * 8 - 32); [L33] const SORT_10 msb_SORT_10 = (SORT_10)1 << (32 - 1); [L35] const SORT_20 mask_SORT_20 = (SORT_20)-1 >> (sizeof(SORT_20) * 8 - 4); [L36] const SORT_20 msb_SORT_20 = (SORT_20)1 << (4 - 1); [L38] const SORT_29 mask_SORT_29 = (SORT_29)-1 >> (sizeof(SORT_29) * 8 - 10); [L39] const SORT_29 msb_SORT_29 = (SORT_29)1 << (10 - 1); [L41] const SORT_33 mask_SORT_33 = (SORT_33)-1 >> (sizeof(SORT_33) * 8 - 2); [L42] const SORT_33 msb_SORT_33 = (SORT_33)1 << (2 - 1); [L44] const SORT_1 var_7 = 0; [L45] const SORT_10 var_12 = 1; [L46] const SORT_20 var_21 = 0; [L47] const SORT_10 var_26 = 0; [L48] const SORT_29 var_30 = 0; [L49] const SORT_1 var_122 = 1; [L50] const SORT_20 var_126 = 1; [L51] const SORT_3 var_183 = 0; [L52] const SORT_10 var_254 = 104; [L54] SORT_1 input_2; [L55] SORT_3 input_4; [L56] SORT_1 input_5; [L57] SORT_1 input_6; [L58] SORT_1 input_201; [L59] SORT_1 input_228; [L60] SORT_1 input_234; [L61] SORT_1 input_235; [L62] SORT_29 input_249; [L63] SORT_1 input_262; [L64] SORT_1 input_270; [L65] SORT_1 input_278; [L66] SORT_1 input_284; [L67] SORT_1 input_289; [L68] SORT_1 input_290; [L69] SORT_1 input_291; [L70] SORT_1 input_300; [L71] SORT_1 input_301; [L72] SORT_1 input_302; [L73] SORT_3 input_323; [L74] SORT_1 input_330; [L75] SORT_1 input_336; [L77] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, var_122=1, var_126=1, var_12=1, var_183=0, var_21=0, var_254=104, var_26=0, var_30=0, var_7=0] [L77] SORT_1 state_8 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L78] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, var_122=1, var_126=1, var_12=1, var_183=0, var_21=0, var_254=104, var_26=0, var_30=0, var_7=0] [L78] SORT_1 state_15 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L79] EXPR __VERIFIER_nondet_uchar() & mask_SORT_20 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, var_122=1, var_126=1, var_12=1, var_183=0, var_21=0, var_254=104, var_26=0, var_30=0, var_7=0] [L79] SORT_20 state_22 = __VERIFIER_nondet_uchar() & mask_SORT_20; [L80] EXPR __VERIFIER_nondet_ushort() & mask_SORT_29 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, var_122=1, var_126=1, var_12=1, var_183=0, var_21=0, var_254=104, var_26=0, var_30=0, var_7=0] [L80] SORT_29 state_31 = __VERIFIER_nondet_ushort() & mask_SORT_29; [L81] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, var_122=1, var_126=1, var_12=1, var_183=0, var_21=0, var_254=104, var_26=0, var_30=0, var_7=0] [L81] SORT_1 state_38 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L82] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, var_122=1, var_126=1, var_12=1, var_183=0, var_21=0, var_254=104, var_26=0, var_30=0, var_7=0] [L82] SORT_1 state_43 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L83] EXPR __VERIFIER_nondet_uchar() & mask_SORT_20 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, var_122=1, var_126=1, var_12=1, var_183=0, var_21=0, var_254=104, var_26=0, var_30=0, var_7=0] [L83] SORT_20 state_49 = __VERIFIER_nondet_uchar() & mask_SORT_20; [L84] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, var_122=1, var_126=1, var_12=1, var_183=0, var_21=0, var_254=104, var_26=0, var_30=0, var_7=0] [L84] SORT_1 state_60 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L85] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, var_122=1, var_126=1, var_12=1, var_183=0, var_21=0, var_254=104, var_26=0, var_30=0, var_7=0] [L85] SORT_1 state_64 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L86] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, var_122=1, var_126=1, var_12=1, var_183=0, var_21=0, var_254=104, var_26=0, var_30=0, var_7=0] [L86] SORT_1 state_72 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L87] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, var_122=1, var_126=1, var_12=1, var_183=0, var_21=0, var_254=104, var_26=0, var_30=0, var_7=0] [L87] SORT_1 state_86 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L88] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, var_122=1, var_126=1, var_12=1, var_183=0, var_21=0, var_254=104, var_26=0, var_30=0, var_7=0] [L88] SORT_1 state_100 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L89] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, var_122=1, var_126=1, var_12=1, var_183=0, var_21=0, var_254=104, var_26=0, var_30=0, var_7=0] [L89] SORT_1 state_123 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L90] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, var_122=1, var_126=1, var_12=1, var_183=0, var_21=0, var_254=104, var_26=0, var_30=0, var_7=0] [L90] SORT_1 state_130 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L91] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, var_122=1, var_126=1, var_12=1, var_183=0, var_21=0, var_254=104, var_26=0, var_30=0, var_7=0] [L91] SORT_1 state_135 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L92] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, var_122=1, var_126=1, var_12=1, var_183=0, var_21=0, var_254=104, var_26=0, var_30=0, var_7=0] [L92] SORT_1 state_141 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L93] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, var_122=1, var_126=1, var_12=1, var_183=0, var_21=0, var_254=104, var_26=0, var_30=0, var_7=0] [L93] SORT_1 state_153 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L94] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, var_122=1, var_126=1, var_12=1, var_183=0, var_21=0, var_254=104, var_26=0, var_30=0, var_7=0] [L94] SORT_1 state_166 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L95] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, var_122=1, var_126=1, var_12=1, var_183=0, var_21=0, var_254=104, var_26=0, var_30=0, var_7=0] [L95] SORT_1 state_177 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L96] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, var_122=1, var_126=1, var_12=1, var_183=0, var_21=0, var_254=104, var_26=0, var_30=0, var_7=0] [L96] SORT_3 state_184 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L97] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, var_122=1, var_126=1, var_12=1, var_183=0, var_21=0, var_254=104, var_26=0, var_30=0, var_7=0] [L97] SORT_1 state_197 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L98] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, var_122=1, var_126=1, var_12=1, var_183=0, var_21=0, var_254=104, var_26=0, var_30=0, var_7=0] [L98] SORT_1 state_199 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L99] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, var_122=1, var_126=1, var_12=1, var_183=0, var_21=0, var_254=104, var_26=0, var_30=0, var_7=0] [L99] SORT_1 state_203 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L101] SORT_1 init_9_arg_1 = var_7; [L102] state_8 = init_9_arg_1 [L103] SORT_1 init_16_arg_1 = var_7; [L104] state_15 = init_16_arg_1 [L105] SORT_20 init_23_arg_1 = var_21; [L106] state_22 = init_23_arg_1 [L107] SORT_29 init_32_arg_1 = var_30; [L108] state_31 = init_32_arg_1 [L109] SORT_1 init_39_arg_1 = var_7; [L110] state_38 = init_39_arg_1 [L111] SORT_1 init_44_arg_1 = var_7; [L112] state_43 = init_44_arg_1 [L113] SORT_20 init_50_arg_1 = var_21; [L114] state_49 = init_50_arg_1 [L115] SORT_1 init_61_arg_1 = var_7; [L116] state_60 = init_61_arg_1 [L117] SORT_1 init_65_arg_1 = var_7; [L118] state_64 = init_65_arg_1 [L119] SORT_1 init_73_arg_1 = var_7; [L120] state_72 = init_73_arg_1 [L121] SORT_1 init_87_arg_1 = var_7; [L122] state_86 = init_87_arg_1 [L123] SORT_1 init_101_arg_1 = var_7; [L124] state_100 = init_101_arg_1 [L125] SORT_1 init_124_arg_1 = var_122; [L126] state_123 = init_124_arg_1 [L127] SORT_1 init_131_arg_1 = var_7; [L128] state_130 = init_131_arg_1 [L129] SORT_1 init_136_arg_1 = var_7; [L130] state_135 = init_136_arg_1 [L131] SORT_1 init_142_arg_1 = var_7; [L132] state_141 = init_142_arg_1 [L133] SORT_1 init_154_arg_1 = var_7; [L134] state_153 = init_154_arg_1 [L135] SORT_1 init_167_arg_1 = var_7; [L136] state_166 = init_167_arg_1 [L137] SORT_1 init_178_arg_1 = var_7; [L138] state_177 = init_178_arg_1 [L139] SORT_3 init_185_arg_1 = var_183; [L140] state_184 = init_185_arg_1 [L141] SORT_1 init_198_arg_1 = var_7; [L142] state_197 = init_198_arg_1 [L143] SORT_1 init_200_arg_1 = var_7; [L144] state_199 = init_200_arg_1 [L145] SORT_1 init_204_arg_1 = var_7; [L146] state_203 = init_204_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L149] input_2 = __VERIFIER_nondet_uchar() [L150] input_4 = __VERIFIER_nondet_uchar() [L151] input_5 = __VERIFIER_nondet_uchar() [L152] input_6 = __VERIFIER_nondet_uchar() [L153] input_201 = __VERIFIER_nondet_uchar() [L154] input_228 = __VERIFIER_nondet_uchar() [L155] input_234 = __VERIFIER_nondet_uchar() [L156] input_235 = __VERIFIER_nondet_uchar() [L157] input_249 = __VERIFIER_nondet_ushort() [L158] input_262 = __VERIFIER_nondet_uchar() [L159] input_270 = __VERIFIER_nondet_uchar() [L160] input_278 = __VERIFIER_nondet_uchar() [L161] input_284 = __VERIFIER_nondet_uchar() [L162] input_289 = __VERIFIER_nondet_uchar() [L163] input_290 = __VERIFIER_nondet_uchar() [L164] input_291 = __VERIFIER_nondet_uchar() [L165] input_300 = __VERIFIER_nondet_uchar() [L166] input_301 = __VERIFIER_nondet_uchar() [L167] input_302 = __VERIFIER_nondet_uchar() [L168] input_323 = __VERIFIER_nondet_uchar() [L169] input_330 = __VERIFIER_nondet_uchar() [L170] input_336 = __VERIFIER_nondet_uchar() [L173] SORT_1 var_11_arg_0 = state_8; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_11_arg_0=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L174] EXPR var_11_arg_0 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L174] var_11_arg_0 = var_11_arg_0 & mask_SORT_1 [L175] SORT_10 var_11 = var_11_arg_0; [L176] SORT_10 var_13_arg_0 = var_11; [L177] SORT_10 var_13_arg_1 = var_12; [L178] SORT_1 var_13 = var_13_arg_0 == var_13_arg_1; [L179] SORT_1 var_14_arg_0 = var_13; [L180] SORT_1 var_14 = ~var_14_arg_0; [L181] SORT_1 var_17_arg_0 = state_15; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_14=-1, var_17_arg_0=0, var_254=104, var_26=0, var_30=0, var_7=0] [L182] EXPR var_17_arg_0 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_14=-1, var_254=104, var_26=0, var_30=0, var_7=0] [L182] var_17_arg_0 = var_17_arg_0 & mask_SORT_1 [L183] SORT_10 var_17 = var_17_arg_0; [L184] SORT_10 var_18_arg_0 = var_17; [L185] SORT_10 var_18_arg_1 = var_12; [L186] SORT_1 var_18 = var_18_arg_0 == var_18_arg_1; [L187] SORT_1 var_19_arg_0 = var_14; [L188] SORT_1 var_19_arg_1 = var_18; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_19_arg_0=-1, var_19_arg_1=0, var_254=104, var_26=0, var_30=0, var_7=0] [L189] EXPR var_19_arg_0 | var_19_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L189] SORT_1 var_19 = var_19_arg_0 | var_19_arg_1; [L190] SORT_20 var_24_arg_0 = state_22; [L191] SORT_1 var_24 = var_24_arg_0 >> 3; [L192] SORT_1 var_25_arg_0 = var_24; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_19=255, var_254=104, var_25_arg_0=0, var_26=0, var_30=0, var_7=0] [L193] EXPR var_25_arg_0 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_19=255, var_254=104, var_26=0, var_30=0, var_7=0] [L193] var_25_arg_0 = var_25_arg_0 & mask_SORT_1 [L194] SORT_10 var_25 = var_25_arg_0; [L195] SORT_10 var_27_arg_0 = var_25; [L196] SORT_10 var_27_arg_1 = var_26; [L197] SORT_1 var_27 = var_27_arg_0 == var_27_arg_1; [L198] SORT_1 var_28_arg_0 = var_19; [L199] SORT_1 var_28_arg_1 = var_27; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_28_arg_0=255, var_28_arg_1=1, var_30=0, var_7=0] [L200] EXPR var_28_arg_0 & var_28_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L200] SORT_1 var_28 = var_28_arg_0 & var_28_arg_1; [L201] SORT_29 var_34_arg_0 = state_31; [L202] SORT_33 var_34 = var_34_arg_0 >> 8; [L203] SORT_33 var_35_arg_0 = var_34; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_28=0, var_30=0, var_35_arg_0=0, var_7=0] [L204] EXPR var_35_arg_0 & mask_SORT_33 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_28=0, var_30=0, var_7=0] [L204] var_35_arg_0 = var_35_arg_0 & mask_SORT_33 [L205] SORT_10 var_35 = var_35_arg_0; [L206] SORT_10 var_36_arg_0 = var_35; [L207] SORT_10 var_36_arg_1 = var_26; [L208] SORT_1 var_36 = var_36_arg_0 == var_36_arg_1; [L209] SORT_1 var_37_arg_0 = var_28; [L210] SORT_1 var_37_arg_1 = var_36; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_37_arg_0=0, var_37_arg_1=1, var_7=0] [L211] EXPR var_37_arg_0 & var_37_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L211] SORT_1 var_37 = var_37_arg_0 & var_37_arg_1; [L212] SORT_1 var_40_arg_0 = state_38; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_37=0, var_40_arg_0=0, var_7=0] [L213] EXPR var_40_arg_0 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_37=0, var_7=0] [L213] var_40_arg_0 = var_40_arg_0 & mask_SORT_1 [L214] SORT_10 var_40 = var_40_arg_0; [L215] SORT_10 var_41_arg_0 = var_40; [L216] SORT_10 var_41_arg_1 = var_12; [L217] SORT_1 var_41 = var_41_arg_0 == var_41_arg_1; [L218] SORT_1 var_42_arg_0 = var_41; [L219] SORT_1 var_42 = ~var_42_arg_0; [L220] SORT_1 var_45_arg_0 = state_43; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_37=0, var_42=-1, var_45_arg_0=0, var_7=0] [L221] EXPR var_45_arg_0 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_37=0, var_42=-1, var_7=0] [L221] var_45_arg_0 = var_45_arg_0 & mask_SORT_1 [L222] SORT_10 var_45 = var_45_arg_0; [L223] SORT_10 var_46_arg_0 = var_45; [L224] SORT_10 var_46_arg_1 = var_12; [L225] SORT_1 var_46 = var_46_arg_0 == var_46_arg_1; [L226] SORT_1 var_47_arg_0 = var_42; [L227] SORT_1 var_47_arg_1 = var_46; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_37=0, var_47_arg_0=-1, var_47_arg_1=0, var_7=0] [L228] EXPR var_47_arg_0 | var_47_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_37=0, var_7=0] [L228] SORT_1 var_47 = var_47_arg_0 | var_47_arg_1; [L229] SORT_1 var_48_arg_0 = var_37; [L230] SORT_1 var_48_arg_1 = var_47; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_48_arg_0=0, var_48_arg_1=255, var_7=0] [L231] EXPR var_48_arg_0 & var_48_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L231] SORT_1 var_48 = var_48_arg_0 & var_48_arg_1; [L232] SORT_20 var_51_arg_0 = state_22; [L233] SORT_20 var_51_arg_1 = state_49; [L234] SORT_1 var_51 = var_51_arg_0 == var_51_arg_1; [L235] SORT_1 var_52_arg_0 = var_48; [L236] SORT_1 var_52_arg_1 = var_51; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_52_arg_0=0, var_52_arg_1=1, var_7=0] [L237] EXPR var_52_arg_0 & var_52_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L237] SORT_1 var_52 = var_52_arg_0 & var_52_arg_1; [L238] SORT_1 var_53_arg_0 = state_15; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_52=0, var_53_arg_0=0, var_7=0] [L239] EXPR var_53_arg_0 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_52=0, var_7=0] [L239] var_53_arg_0 = var_53_arg_0 & mask_SORT_1 [L240] SORT_10 var_53 = var_53_arg_0; [L241] SORT_10 var_54_arg_0 = var_53; [L242] SORT_10 var_54_arg_1 = var_12; [L243] SORT_1 var_54 = var_54_arg_0 == var_54_arg_1; [L244] SORT_1 var_55_arg_0 = var_54; [L245] SORT_1 var_55 = ~var_55_arg_0; [L246] SORT_1 var_56_arg_0 = state_8; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_52=0, var_55=-1, var_56_arg_0=0, var_7=0] [L247] EXPR var_56_arg_0 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_52=0, var_55=-1, var_7=0] [L247] var_56_arg_0 = var_56_arg_0 & mask_SORT_1 [L248] SORT_10 var_56 = var_56_arg_0; [L249] SORT_10 var_57_arg_0 = var_56; [L250] SORT_10 var_57_arg_1 = var_12; [L251] SORT_1 var_57 = var_57_arg_0 == var_57_arg_1; [L252] SORT_1 var_58_arg_0 = var_55; [L253] SORT_1 var_58_arg_1 = var_57; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_52=0, var_58_arg_0=-1, var_58_arg_1=0, var_7=0] [L254] EXPR var_58_arg_0 | var_58_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_52=0, var_7=0] [L254] SORT_1 var_58 = var_58_arg_0 | var_58_arg_1; [L255] SORT_1 var_59_arg_0 = var_52; [L256] SORT_1 var_59_arg_1 = var_58; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_59_arg_0=0, var_59_arg_1=255, var_7=0] [L257] EXPR var_59_arg_0 & var_59_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L257] SORT_1 var_59 = var_59_arg_0 & var_59_arg_1; [L258] SORT_1 var_62_arg_0 = state_60; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_59=0, var_62_arg_0=0, var_7=0] [L259] EXPR var_62_arg_0 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_59=0, var_7=0] [L259] var_62_arg_0 = var_62_arg_0 & mask_SORT_1 [L260] SORT_10 var_62 = var_62_arg_0; [L261] SORT_10 var_63_arg_0 = var_62; [L262] SORT_10 var_63_arg_1 = var_26; [L263] SORT_1 var_63 = var_63_arg_0 == var_63_arg_1; [L264] SORT_1 var_66_arg_0 = state_64; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_59=0, var_63=1, var_66_arg_0=0, var_7=0] [L265] EXPR var_66_arg_0 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_59=0, var_63=1, var_7=0] [L265] var_66_arg_0 = var_66_arg_0 & mask_SORT_1 [L266] SORT_10 var_66 = var_66_arg_0; [L267] SORT_10 var_67_arg_0 = var_66; [L268] SORT_10 var_67_arg_1 = var_26; [L269] SORT_1 var_67 = var_67_arg_0 == var_67_arg_1; [L270] SORT_1 var_68_arg_0 = var_63; [L271] SORT_1 var_68_arg_1 = var_67; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_59=0, var_68_arg_0=1, var_68_arg_1=1, var_7=0] [L272] EXPR var_68_arg_0 | var_68_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_59=0, var_7=0] [L272] SORT_1 var_68 = var_68_arg_0 | var_68_arg_1; [L273] SORT_1 var_69_arg_0 = var_59; [L274] SORT_1 var_69_arg_1 = var_68; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_69_arg_0=0, var_69_arg_1=1, var_7=0] [L275] EXPR var_69_arg_0 & var_69_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L275] SORT_1 var_69 = var_69_arg_0 & var_69_arg_1; [L276] SORT_1 var_70_arg_0 = state_60; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_69=0, var_70_arg_0=0, var_7=0] [L277] EXPR var_70_arg_0 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_69=0, var_7=0] [L277] var_70_arg_0 = var_70_arg_0 & mask_SORT_1 [L278] SORT_10 var_70 = var_70_arg_0; [L279] SORT_10 var_71_arg_0 = var_70; [L280] SORT_10 var_71_arg_1 = var_26; [L281] SORT_1 var_71 = var_71_arg_0 == var_71_arg_1; [L282] SORT_1 var_74_arg_0 = state_72; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_69=0, var_71=1, var_74_arg_0=0, var_7=0] [L283] EXPR var_74_arg_0 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_69=0, var_71=1, var_7=0] [L283] var_74_arg_0 = var_74_arg_0 & mask_SORT_1 [L284] SORT_10 var_74 = var_74_arg_0; [L285] SORT_10 var_75_arg_0 = var_74; [L286] SORT_10 var_75_arg_1 = var_26; [L287] SORT_1 var_75 = var_75_arg_0 == var_75_arg_1; [L288] SORT_1 var_76_arg_0 = var_71; [L289] SORT_1 var_76_arg_1 = var_75; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_69=0, var_76_arg_0=1, var_76_arg_1=1, var_7=0] [L290] EXPR var_76_arg_0 | var_76_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_69=0, var_7=0] [L290] SORT_1 var_76 = var_76_arg_0 | var_76_arg_1; [L291] SORT_1 var_77_arg_0 = var_69; [L292] SORT_1 var_77_arg_1 = var_76; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_77_arg_0=0, var_77_arg_1=1, var_7=0] [L293] EXPR var_77_arg_0 & var_77_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L293] SORT_1 var_77 = var_77_arg_0 & var_77_arg_1; [L294] SORT_1 var_78_arg_0 = state_64; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_77=0, var_78_arg_0=0, var_7=0] [L295] EXPR var_78_arg_0 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_77=0, var_7=0] [L295] var_78_arg_0 = var_78_arg_0 & mask_SORT_1 [L296] SORT_10 var_78 = var_78_arg_0; [L297] SORT_10 var_79_arg_0 = var_78; [L298] SORT_10 var_79_arg_1 = var_26; [L299] SORT_1 var_79 = var_79_arg_0 == var_79_arg_1; [L300] SORT_1 var_80_arg_0 = state_72; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_77=0, var_79=1, var_7=0, var_80_arg_0=0] [L301] EXPR var_80_arg_0 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_77=0, var_79=1, var_7=0] [L301] var_80_arg_0 = var_80_arg_0 & mask_SORT_1 [L302] SORT_10 var_80 = var_80_arg_0; [L303] SORT_10 var_81_arg_0 = var_80; [L304] SORT_10 var_81_arg_1 = var_26; [L305] SORT_1 var_81 = var_81_arg_0 == var_81_arg_1; [L306] SORT_1 var_82_arg_0 = var_79; [L307] SORT_1 var_82_arg_1 = var_81; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_77=0, var_7=0, var_82_arg_0=1, var_82_arg_1=1] [L308] EXPR var_82_arg_0 | var_82_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_77=0, var_7=0] [L308] SORT_1 var_82 = var_82_arg_0 | var_82_arg_1; [L309] SORT_1 var_83_arg_0 = var_77; [L310] SORT_1 var_83_arg_1 = var_82; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0, var_83_arg_0=0, var_83_arg_1=1] [L311] EXPR var_83_arg_0 & var_83_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L311] SORT_1 var_83 = var_83_arg_0 & var_83_arg_1; [L312] SORT_1 var_84_arg_0 = state_8; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0, var_83=0, var_84_arg_0=0] [L313] EXPR var_84_arg_0 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0, var_83=0] [L313] var_84_arg_0 = var_84_arg_0 & mask_SORT_1 [L314] SORT_10 var_84 = var_84_arg_0; [L315] SORT_10 var_85_arg_0 = var_84; [L316] SORT_10 var_85_arg_1 = var_26; [L317] SORT_1 var_85 = var_85_arg_0 == var_85_arg_1; [L318] SORT_1 var_88_arg_0 = state_86; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0, var_83=0, var_85=1, var_88_arg_0=0] [L319] EXPR var_88_arg_0 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0, var_83=0, var_85=1] [L319] var_88_arg_0 = var_88_arg_0 & mask_SORT_1 [L320] SORT_10 var_88 = var_88_arg_0; [L321] SORT_10 var_89_arg_0 = var_88; [L322] SORT_10 var_89_arg_1 = var_26; [L323] SORT_1 var_89 = var_89_arg_0 == var_89_arg_1; [L324] SORT_1 var_90_arg_0 = var_85; [L325] SORT_1 var_90_arg_1 = var_89; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0, var_83=0, var_90_arg_0=1, var_90_arg_1=1] [L326] EXPR var_90_arg_0 | var_90_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0, var_83=0] [L326] SORT_1 var_90 = var_90_arg_0 | var_90_arg_1; [L327] SORT_1 var_91_arg_0 = var_83; [L328] SORT_1 var_91_arg_1 = var_90; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0, var_91_arg_0=0, var_91_arg_1=1] [L329] EXPR var_91_arg_0 & var_91_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L329] SORT_1 var_91 = var_91_arg_0 & var_91_arg_1; [L330] SORT_1 var_92_arg_0 = state_8; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0, var_91=0, var_92_arg_0=0] [L331] EXPR var_92_arg_0 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0, var_91=0] [L331] var_92_arg_0 = var_92_arg_0 & mask_SORT_1 [L332] SORT_10 var_92 = var_92_arg_0; [L333] SORT_10 var_93_arg_0 = var_92; [L334] SORT_10 var_93_arg_1 = var_26; [L335] SORT_1 var_93 = var_93_arg_0 == var_93_arg_1; [L336] SORT_1 var_94_arg_0 = state_72; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0, var_91=0, var_93=1, var_94_arg_0=0] [L337] EXPR var_94_arg_0 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0, var_91=0, var_93=1] [L337] var_94_arg_0 = var_94_arg_0 & mask_SORT_1 [L338] SORT_10 var_94 = var_94_arg_0; [L339] SORT_10 var_95_arg_0 = var_94; [L340] SORT_10 var_95_arg_1 = var_26; [L341] SORT_1 var_95 = var_95_arg_0 == var_95_arg_1; [L342] SORT_1 var_96_arg_0 = var_93; [L343] SORT_1 var_96_arg_1 = var_95; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0, var_91=0, var_96_arg_0=1, var_96_arg_1=1] [L344] EXPR var_96_arg_0 | var_96_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0, var_91=0] [L344] SORT_1 var_96 = var_96_arg_0 | var_96_arg_1; [L345] SORT_1 var_97_arg_0 = var_91; [L346] SORT_1 var_97_arg_1 = var_96; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0, var_97_arg_0=0, var_97_arg_1=1] [L347] EXPR var_97_arg_0 & var_97_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L347] SORT_1 var_97 = var_97_arg_0 & var_97_arg_1; [L348] SORT_1 var_98_arg_0 = state_8; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0, var_97=0, var_98_arg_0=0] [L349] EXPR var_98_arg_0 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0, var_97=0] [L349] var_98_arg_0 = var_98_arg_0 & mask_SORT_1 [L350] SORT_10 var_98 = var_98_arg_0; [L351] SORT_10 var_99_arg_0 = var_98; [L352] SORT_10 var_99_arg_1 = var_26; [L353] SORT_1 var_99 = var_99_arg_0 == var_99_arg_1; [L354] SORT_1 var_102_arg_0 = state_100; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_102_arg_0=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0, var_97=0, var_99=1] [L355] EXPR var_102_arg_0 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0, var_97=0, var_99=1] [L355] var_102_arg_0 = var_102_arg_0 & mask_SORT_1 [L356] SORT_10 var_102 = var_102_arg_0; [L357] SORT_10 var_103_arg_0 = var_102; [L358] SORT_10 var_103_arg_1 = var_26; [L359] SORT_1 var_103 = var_103_arg_0 == var_103_arg_1; [L360] SORT_1 var_104_arg_0 = var_99; [L361] SORT_1 var_104_arg_1 = var_103; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_104_arg_0=1, var_104_arg_1=1, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0, var_97=0] [L362] EXPR var_104_arg_0 | var_104_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0, var_97=0] [L362] SORT_1 var_104 = var_104_arg_0 | var_104_arg_1; [L363] SORT_1 var_105_arg_0 = var_97; [L364] SORT_1 var_105_arg_1 = var_104; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_105_arg_0=0, var_105_arg_1=1, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L365] EXPR var_105_arg_0 & var_105_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L365] SORT_1 var_105 = var_105_arg_0 & var_105_arg_1; [L366] SORT_1 var_106_arg_0 = state_72; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_105=0, var_106_arg_0=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L367] EXPR var_106_arg_0 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_105=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L367] var_106_arg_0 = var_106_arg_0 & mask_SORT_1 [L368] SORT_10 var_106 = var_106_arg_0; [L369] SORT_10 var_107_arg_0 = var_106; [L370] SORT_10 var_107_arg_1 = var_26; [L371] SORT_1 var_107 = var_107_arg_0 == var_107_arg_1; [L372] SORT_1 var_108_arg_0 = state_86; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_105=0, var_107=1, var_108_arg_0=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L373] EXPR var_108_arg_0 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_105=0, var_107=1, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L373] var_108_arg_0 = var_108_arg_0 & mask_SORT_1 [L374] SORT_10 var_108 = var_108_arg_0; [L375] SORT_10 var_109_arg_0 = var_108; [L376] SORT_10 var_109_arg_1 = var_26; [L377] SORT_1 var_109 = var_109_arg_0 == var_109_arg_1; [L378] SORT_1 var_110_arg_0 = var_107; [L379] SORT_1 var_110_arg_1 = var_109; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_105=0, var_110_arg_0=1, var_110_arg_1=1, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L380] EXPR var_110_arg_0 | var_110_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_105=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L380] SORT_1 var_110 = var_110_arg_0 | var_110_arg_1; [L381] SORT_1 var_111_arg_0 = var_105; [L382] SORT_1 var_111_arg_1 = var_110; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_111_arg_0=0, var_111_arg_1=1, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L383] EXPR var_111_arg_0 & var_111_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L383] SORT_1 var_111 = var_111_arg_0 & var_111_arg_1; [L384] SORT_1 var_112_arg_0 = state_86; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_111=0, var_112_arg_0=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L385] EXPR var_112_arg_0 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_111=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L385] var_112_arg_0 = var_112_arg_0 & mask_SORT_1 [L386] SORT_10 var_112 = var_112_arg_0; [L387] SORT_10 var_113_arg_0 = var_112; [L388] SORT_10 var_113_arg_1 = var_26; [L389] SORT_1 var_113 = var_113_arg_0 == var_113_arg_1; [L390] SORT_1 var_114_arg_0 = var_113; [L391] SORT_1 var_114 = ~var_114_arg_0; [L392] SORT_1 var_115_arg_0 = state_100; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_111=0, var_114=-2, var_115_arg_0=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L393] EXPR var_115_arg_0 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_111=0, var_114=-2, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L393] var_115_arg_0 = var_115_arg_0 & mask_SORT_1 [L394] SORT_10 var_115 = var_115_arg_0; [L395] SORT_10 var_116_arg_0 = var_115; [L396] SORT_10 var_116_arg_1 = var_26; [L397] SORT_1 var_116 = var_116_arg_0 == var_116_arg_1; [L398] SORT_1 var_117_arg_0 = var_114; [L399] SORT_1 var_117_arg_1 = var_116; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_111=0, var_117_arg_0=-2, var_117_arg_1=1, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L400] EXPR var_117_arg_0 | var_117_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_111=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L400] SORT_1 var_117 = var_117_arg_0 | var_117_arg_1; [L401] SORT_1 var_118_arg_0 = var_111; [L402] SORT_1 var_118_arg_1 = var_117; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_118_arg_0=0, var_118_arg_1=254, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L403] EXPR var_118_arg_0 & var_118_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L403] SORT_1 var_118 = var_118_arg_0 & var_118_arg_1; [L404] SORT_1 var_119_arg_0 = state_100; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_118=0, var_119_arg_0=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L405] EXPR var_119_arg_0 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_118=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L405] var_119_arg_0 = var_119_arg_0 & mask_SORT_1 [L406] SORT_10 var_119 = var_119_arg_0; [L407] SORT_10 var_120_arg_0 = var_119; [L408] SORT_10 var_120_arg_1 = var_12; [L409] SORT_1 var_120 = var_120_arg_0 == var_120_arg_1; [L410] SORT_1 var_121_arg_0 = var_120; [L411] SORT_1 var_121 = ~var_121_arg_0; [L412] SORT_1 var_125_arg_0 = state_123; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_118=0, var_121=-1, var_122=1, var_125_arg_0=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L413] EXPR var_125_arg_0 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_118=0, var_121=-1, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L413] var_125_arg_0 = var_125_arg_0 & mask_SORT_1 [L414] SORT_20 var_125 = var_125_arg_0; [L415] SORT_20 var_127_arg_0 = var_125; [L416] SORT_20 var_127_arg_1 = var_126; [L417] SORT_1 var_127 = var_127_arg_0 == var_127_arg_1; [L418] SORT_1 var_128_arg_0 = var_121; [L419] SORT_1 var_128_arg_1 = var_127; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_118=0, var_122=1, var_126=1, var_128_arg_0=-1, var_128_arg_1=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L420] EXPR var_128_arg_0 | var_128_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_118=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L420] SORT_1 var_128 = var_128_arg_0 | var_128_arg_1; [L421] SORT_1 var_129_arg_0 = var_118; [L422] SORT_1 var_129_arg_1 = var_128; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_129_arg_0=0, var_129_arg_1=256, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L423] EXPR var_129_arg_0 & var_129_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L423] SORT_1 var_129 = var_129_arg_0 & var_129_arg_1; [L424] SORT_1 var_132_arg_0 = state_130; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_129=0, var_12=1, var_132_arg_0=0, var_254=104, var_26=0, var_30=0, var_7=0] [L425] EXPR var_132_arg_0 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_129=0, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L425] var_132_arg_0 = var_132_arg_0 & mask_SORT_1 [L426] SORT_10 var_132 = var_132_arg_0; [L427] SORT_10 var_133_arg_0 = var_132; [L428] SORT_10 var_133_arg_1 = var_12; [L429] SORT_1 var_133 = var_133_arg_0 == var_133_arg_1; [L430] SORT_1 var_134_arg_0 = var_133; [L431] SORT_1 var_134 = ~var_134_arg_0; [L432] SORT_1 var_137_arg_0 = state_135; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_129=0, var_12=1, var_134=-1, var_137_arg_0=0, var_254=104, var_26=0, var_30=0, var_7=0] [L433] EXPR var_137_arg_0 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_129=0, var_12=1, var_134=-1, var_254=104, var_26=0, var_30=0, var_7=0] [L433] var_137_arg_0 = var_137_arg_0 & mask_SORT_1 [L434] SORT_10 var_137 = var_137_arg_0; [L435] SORT_10 var_138_arg_0 = var_137; [L436] SORT_10 var_138_arg_1 = var_12; [L437] SORT_1 var_138 = var_138_arg_0 == var_138_arg_1; [L438] SORT_1 var_139_arg_0 = var_134; [L439] SORT_1 var_139_arg_1 = var_138; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_129=0, var_12=1, var_139_arg_0=-1, var_139_arg_1=0, var_254=104, var_26=0, var_30=0, var_7=0] [L440] EXPR var_139_arg_0 | var_139_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_129=0, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L440] SORT_1 var_139 = var_139_arg_0 | var_139_arg_1; [L441] SORT_1 var_140_arg_0 = var_129; [L442] SORT_1 var_140_arg_1 = var_139; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_140_arg_0=0, var_140_arg_1=255, var_254=104, var_26=0, var_30=0, var_7=0] [L443] EXPR var_140_arg_0 & var_140_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L443] SORT_1 var_140 = var_140_arg_0 & var_140_arg_1; [L444] SORT_1 var_143_arg_0 = state_141; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_140=0, var_143_arg_0=0, var_254=104, var_26=0, var_30=0, var_7=0] [L445] EXPR var_143_arg_0 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_140=0, var_254=104, var_26=0, var_30=0, var_7=0] [L445] var_143_arg_0 = var_143_arg_0 & mask_SORT_1 [L446] SORT_10 var_143 = var_143_arg_0; [L447] SORT_10 var_144_arg_0 = var_143; [L448] SORT_10 var_144_arg_1 = var_26; [L449] SORT_1 var_144 = var_144_arg_0 == var_144_arg_1; [L450] SORT_1 var_145_arg_0 = var_144; [L451] SORT_1 var_145 = ~var_145_arg_0; [L452] SORT_1 var_146_arg_0 = state_135; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_140=0, var_145=-2, var_146_arg_0=0, var_254=104, var_26=0, var_30=0, var_7=0] [L453] EXPR var_146_arg_0 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_140=0, var_145=-2, var_254=104, var_26=0, var_30=0, var_7=0] [L453] var_146_arg_0 = var_146_arg_0 & mask_SORT_1 [L454] SORT_10 var_146 = var_146_arg_0; [L455] SORT_10 var_147_arg_0 = var_146; [L456] SORT_10 var_147_arg_1 = var_26; [L457] SORT_1 var_147 = var_147_arg_0 == var_147_arg_1; [L458] SORT_1 var_148_arg_0 = var_145; [L459] SORT_1 var_148_arg_1 = var_147; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_140=0, var_148_arg_0=-2, var_148_arg_1=1, var_254=104, var_26=0, var_30=0, var_7=0] [L460] EXPR var_148_arg_0 | var_148_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_140=0, var_254=104, var_26=0, var_30=0, var_7=0] [L460] SORT_1 var_148 = var_148_arg_0 | var_148_arg_1; [L461] SORT_1 var_149_arg_0 = var_140; [L462] SORT_1 var_149_arg_1 = var_148; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_149_arg_0=0, var_149_arg_1=254, var_254=104, var_26=0, var_30=0, var_7=0] [L463] EXPR var_149_arg_0 & var_149_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L463] SORT_1 var_149 = var_149_arg_0 & var_149_arg_1; [L464] SORT_1 var_150_arg_0 = state_38; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_149=0, var_150_arg_0=0, var_254=104, var_26=0, var_30=0, var_7=0] [L465] EXPR var_150_arg_0 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_149=0, var_254=104, var_26=0, var_30=0, var_7=0] [L465] var_150_arg_0 = var_150_arg_0 & mask_SORT_1 [L466] SORT_10 var_150 = var_150_arg_0; [L467] SORT_10 var_151_arg_0 = var_150; [L468] SORT_10 var_151_arg_1 = var_12; [L469] SORT_1 var_151 = var_151_arg_0 == var_151_arg_1; [L470] SORT_1 var_152_arg_0 = var_151; [L471] SORT_1 var_152 = ~var_152_arg_0; [L472] SORT_1 var_155_arg_0 = state_153; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_149=0, var_152=-1, var_155_arg_0=0, var_254=104, var_26=0, var_30=0, var_7=0] [L473] EXPR var_155_arg_0 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_149=0, var_152=-1, var_254=104, var_26=0, var_30=0, var_7=0] [L473] var_155_arg_0 = var_155_arg_0 & mask_SORT_1 [L474] SORT_10 var_155 = var_155_arg_0; [L475] SORT_10 var_156_arg_0 = var_155; [L476] SORT_10 var_156_arg_1 = var_12; [L477] SORT_1 var_156 = var_156_arg_0 == var_156_arg_1; [L478] SORT_1 var_157_arg_0 = var_152; [L479] SORT_1 var_157_arg_1 = var_156; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_149=0, var_157_arg_0=-1, var_157_arg_1=0, var_254=104, var_26=0, var_30=0, var_7=0] [L480] EXPR var_157_arg_0 | var_157_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_149=0, var_254=104, var_26=0, var_30=0, var_7=0] [L480] SORT_1 var_157 = var_157_arg_0 | var_157_arg_1; [L481] SORT_1 var_158_arg_0 = var_149; [L482] SORT_1 var_158_arg_1 = var_157; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_158_arg_0=0, var_158_arg_1=255, var_254=104, var_26=0, var_30=0, var_7=0] [L483] EXPR var_158_arg_0 & var_158_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L483] SORT_1 var_158 = var_158_arg_0 & var_158_arg_1; [L484] SORT_1 var_159_arg_0 = state_153; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_158=0, var_159_arg_0=0, var_254=104, var_26=0, var_30=0, var_7=0] [L485] EXPR var_159_arg_0 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_158=0, var_254=104, var_26=0, var_30=0, var_7=0] [L485] var_159_arg_0 = var_159_arg_0 & mask_SORT_1 [L486] SORT_10 var_159 = var_159_arg_0; [L487] SORT_10 var_160_arg_0 = var_159; [L488] SORT_10 var_160_arg_1 = var_12; [L489] SORT_1 var_160 = var_160_arg_0 == var_160_arg_1; [L490] SORT_1 var_161_arg_0 = var_160; [L491] SORT_1 var_161 = ~var_161_arg_0; [L492] SORT_1 var_162_arg_0 = state_15; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_158=0, var_161=-1, var_162_arg_0=0, var_254=104, var_26=0, var_30=0, var_7=0] [L493] EXPR var_162_arg_0 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_158=0, var_161=-1, var_254=104, var_26=0, var_30=0, var_7=0] [L493] var_162_arg_0 = var_162_arg_0 & mask_SORT_1 [L494] SORT_10 var_162 = var_162_arg_0; [L495] SORT_10 var_163_arg_0 = var_162; [L496] SORT_10 var_163_arg_1 = var_12; [L497] SORT_1 var_163 = var_163_arg_0 == var_163_arg_1; [L498] SORT_1 var_164_arg_0 = var_161; [L499] SORT_1 var_164_arg_1 = var_163; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_158=0, var_164_arg_0=-1, var_164_arg_1=0, var_254=104, var_26=0, var_30=0, var_7=0] [L500] EXPR var_164_arg_0 | var_164_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_158=0, var_254=104, var_26=0, var_30=0, var_7=0] [L500] SORT_1 var_164 = var_164_arg_0 | var_164_arg_1; [L501] SORT_1 var_165_arg_0 = var_158; [L502] SORT_1 var_165_arg_1 = var_164; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_165_arg_0=0, var_165_arg_1=255, var_254=104, var_26=0, var_30=0, var_7=0] [L503] EXPR var_165_arg_0 & var_165_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L503] SORT_1 var_165 = var_165_arg_0 & var_165_arg_1; [L504] SORT_1 var_168_arg_0 = state_166; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_165=0, var_168_arg_0=0, var_254=104, var_26=0, var_30=0, var_7=0] [L505] EXPR var_168_arg_0 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_165=0, var_254=104, var_26=0, var_30=0, var_7=0] [L505] var_168_arg_0 = var_168_arg_0 & mask_SORT_1 [L506] SORT_10 var_168 = var_168_arg_0; [L507] SORT_10 var_169_arg_0 = var_168; [L508] SORT_10 var_169_arg_1 = var_12; [L509] SORT_1 var_169 = var_169_arg_0 == var_169_arg_1; [L510] SORT_1 var_170_arg_0 = var_169; [L511] SORT_1 var_170 = ~var_170_arg_0; [L512] SORT_1 var_171_arg_0 = state_43; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_165=0, var_170=-1, var_171_arg_0=0, var_254=104, var_26=0, var_30=0, var_7=0] [L513] EXPR var_171_arg_0 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_165=0, var_170=-1, var_254=104, var_26=0, var_30=0, var_7=0] [L513] var_171_arg_0 = var_171_arg_0 & mask_SORT_1 [L514] SORT_10 var_171 = var_171_arg_0; [L515] SORT_10 var_172_arg_0 = var_171; [L516] SORT_10 var_172_arg_1 = var_12; [L517] SORT_1 var_172 = var_172_arg_0 == var_172_arg_1; [L518] SORT_1 var_173_arg_0 = var_170; [L519] SORT_1 var_173_arg_1 = var_172; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_165=0, var_173_arg_0=-1, var_173_arg_1=0, var_254=104, var_26=0, var_30=0, var_7=0] [L520] EXPR var_173_arg_0 | var_173_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_165=0, var_254=104, var_26=0, var_30=0, var_7=0] [L520] SORT_1 var_173 = var_173_arg_0 | var_173_arg_1; [L521] SORT_1 var_174_arg_0 = var_165; [L522] SORT_1 var_174_arg_1 = var_173; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_174_arg_0=0, var_174_arg_1=255, var_254=104, var_26=0, var_30=0, var_7=0] [L523] EXPR var_174_arg_0 & var_174_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L523] SORT_1 var_174 = var_174_arg_0 & var_174_arg_1; [L524] SORT_1 var_175_arg_0 = state_130; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_174=0, var_175_arg_0=0, var_254=104, var_26=0, var_30=0, var_7=0] [L525] EXPR var_175_arg_0 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_174=0, var_254=104, var_26=0, var_30=0, var_7=0] [L525] var_175_arg_0 = var_175_arg_0 & mask_SORT_1 [L526] SORT_10 var_175 = var_175_arg_0; [L527] SORT_10 var_176_arg_0 = var_175; [L528] SORT_10 var_176_arg_1 = var_26; [L529] SORT_1 var_176 = var_176_arg_0 == var_176_arg_1; [L530] SORT_1 var_179_arg_0 = state_177; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_174=0, var_176=1, var_179_arg_0=0, var_254=104, var_26=0, var_30=0, var_7=0] [L531] EXPR var_179_arg_0 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_174=0, var_176=1, var_254=104, var_26=0, var_30=0, var_7=0] [L531] var_179_arg_0 = var_179_arg_0 & mask_SORT_1 [L532] SORT_10 var_179 = var_179_arg_0; [L533] SORT_10 var_180_arg_0 = var_179; [L534] SORT_10 var_180_arg_1 = var_26; [L535] SORT_1 var_180 = var_180_arg_0 == var_180_arg_1; [L536] SORT_1 var_181_arg_0 = var_176; [L537] SORT_1 var_181_arg_1 = var_180; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_174=0, var_181_arg_0=1, var_181_arg_1=1, var_254=104, var_26=0, var_30=0, var_7=0] [L538] EXPR var_181_arg_0 | var_181_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_174=0, var_254=104, var_26=0, var_30=0, var_7=0] [L538] SORT_1 var_181 = var_181_arg_0 | var_181_arg_1; [L539] SORT_1 var_182_arg_0 = var_174; [L540] SORT_1 var_182_arg_1 = var_181; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_182_arg_0=0, var_182_arg_1=1, var_254=104, var_26=0, var_30=0, var_7=0] [L541] EXPR var_182_arg_0 & var_182_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L541] SORT_1 var_182 = var_182_arg_0 & var_182_arg_1; [L542] SORT_3 var_186_arg_0 = state_184; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_182=0, var_186_arg_0=0, var_254=104, var_26=0, var_30=0, var_7=0] [L543] EXPR var_186_arg_0 & mask_SORT_3 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_182=0, var_254=104, var_26=0, var_30=0, var_7=0] [L543] var_186_arg_0 = var_186_arg_0 & mask_SORT_3 [L544] SORT_10 var_186 = var_186_arg_0; [L545] SORT_10 var_187_arg_0 = var_186; [L546] SORT_10 var_187_arg_1 = var_26; [L547] SORT_1 var_187 = var_187_arg_0 == var_187_arg_1; [L548] SORT_1 var_188_arg_0 = state_15; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_182=0, var_187=1, var_188_arg_0=0, var_254=104, var_26=0, var_30=0, var_7=0] [L549] EXPR var_188_arg_0 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_182=0, var_187=1, var_254=104, var_26=0, var_30=0, var_7=0] [L549] var_188_arg_0 = var_188_arg_0 & mask_SORT_1 [L550] SORT_10 var_188 = var_188_arg_0; [L551] SORT_10 var_189_arg_0 = var_188; [L552] SORT_10 var_189_arg_1 = var_12; [L553] SORT_1 var_189 = var_189_arg_0 == var_189_arg_1; [L554] SORT_1 var_190_arg_0 = var_187; [L555] SORT_1 var_190_arg_1 = var_189; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_182=0, var_190_arg_0=1, var_190_arg_1=0, var_254=104, var_26=0, var_30=0, var_7=0] [L556] EXPR var_190_arg_0 | var_190_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_182=0, var_254=104, var_26=0, var_30=0, var_7=0] [L556] SORT_1 var_190 = var_190_arg_0 | var_190_arg_1; [L557] SORT_1 var_191_arg_0 = var_182; [L558] SORT_1 var_191_arg_1 = var_190; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_191_arg_0=0, var_191_arg_1=1, var_254=104, var_26=0, var_30=0, var_7=0] [L559] EXPR var_191_arg_0 & var_191_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L559] SORT_1 var_191 = var_191_arg_0 & var_191_arg_1; [L560] SORT_1 var_194_arg_0 = var_191; [L561] SORT_1 var_194 = ~var_194_arg_0; [L562] SORT_1 var_195_arg_0 = var_122; [L563] SORT_1 var_195_arg_1 = var_194; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_195_arg_0=1, var_195_arg_1=-1, var_254=104, var_26=0, var_30=0, var_7=0] [L564] EXPR var_195_arg_0 & var_195_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L564] SORT_1 var_195 = var_195_arg_0 & var_195_arg_1; [L565] EXPR var_195 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L565] var_195 = var_195 & mask_SORT_1 [L566] SORT_1 bad_196_arg_0 = var_195; [L567] CALL __VERIFIER_assert(!(bad_196_arg_0)) [L21] COND TRUE !(cond) [L21] reach_error() - StatisticsResult: Ultimate Automizer benchmark data CFG has 1 procedures, 498 locations, 1 error locations. Started 1 CEGAR loops. OverallTime: 56.6s, OverallIterations: 23, TraceHistogramMax: 1, PathProgramHistogramMax: 1, EmptinessCheckTime: 0.1s, AutomataDifference: 5.6s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, HoareTripleCheckerStatistics: 0 mSolverCounterUnknown, 8854 SdHoareTripleChecker+Valid, 3.9s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 8854 mSDsluCounter, 55266 SdHoareTripleChecker+Invalid, 3.3s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 0 IncrementalHoareTripleChecker+Unchecked, 39273 mSDsCounter, 70 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 2017 IncrementalHoareTripleChecker+Invalid, 2087 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 70 mSolverCounterUnsat, 15993 mSDtfsCounter, 2017 mSolverCounterSat, 0.3s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Unknown, PredicateUnifierStatistics: 0 DeclaredPredicates, 138 GetRequests, 53 SyntacticMatches, 1 SemanticMatches, 84 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 23 ImplicationChecksByTransitivity, 1.1s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=741occurred in iteration=22, InterpolantAutomatonStates: 110, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 0.7s AutomataMinimizationTime, 22 MinimizatonAttempts, 542 StatesRemovedByMinimization, 9 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.6s SsaConstructionTime, 13.4s SatisfiabilityAnalysisTime, 32.4s InterpolantComputationTime, 5185 NumberOfCodeBlocks, 5185 NumberOfCodeBlocksAsserted, 23 NumberOfCheckSat, 4928 ConstructedInterpolants, 0 QuantifiedInterpolants, 9902 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 22 InterpolantComputations, 22 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available, ConComCheckerStatistics: No data available RESULT: Ultimate could not prove your program: unable to determine feasibility of some traces [2024-11-28 03:03:03,094 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_74a6bcf8-eac0-40c8-b753-179f212b9ad1/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Ended with exit code 0 Received shutdown request... --- End real Ultimate output --- Execution finished normally Using bit-precise analysis Retrying with bit-precise analysis ### Bit-precise run ### Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_74a6bcf8-eac0-40c8-b753-179f212b9ad1/bin/uautomizer-verify-aQ6SnzHsRB/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_74a6bcf8-eac0-40c8-b753-179f212b9ad1/bin/uautomizer-verify-aQ6SnzHsRB/plugins/org.eclipse.equinox.launcher_1.6.800.v20240513-1750.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_74a6bcf8-eac0-40c8-b753-179f212b9ad1/bin/uautomizer-verify-aQ6SnzHsRB/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_74a6bcf8-eac0-40c8-b753-179f212b9ad1/bin/uautomizer-verify-aQ6SnzHsRB/config/AutomizerReach.xml -i ../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.itc99_b13.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_74a6bcf8-eac0-40c8-b753-179f212b9ad1/bin/uautomizer-verify-aQ6SnzHsRB/config/svcomp-Reach-64bit-Automizer_Bitvector.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_74a6bcf8-eac0-40c8-b753-179f212b9ad1/bin/uautomizer-verify-aQ6SnzHsRB --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash 133ed02e483160842227ba05a50e01319ae2d6425d72670eb79dfefca9c5ec50 --- Real Ultimate output --- This is Ultimate 0.3.0-dev-d790fec [2024-11-28 03:03:06,230 INFO L188 SettingsManager]: Resetting all preferences to default values... [2024-11-28 03:03:06,352 INFO L114 SettingsManager]: Loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_74a6bcf8-eac0-40c8-b753-179f212b9ad1/bin/uautomizer-verify-aQ6SnzHsRB/config/svcomp-Reach-64bit-Automizer_Bitvector.epf [2024-11-28 03:03:06,360 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2024-11-28 03:03:06,361 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2024-11-28 03:03:06,405 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2024-11-28 03:03:06,406 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2024-11-28 03:03:06,406 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2024-11-28 03:03:06,409 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2024-11-28 03:03:06,409 INFO L153 SettingsManager]: * Use memory slicer=true [2024-11-28 03:03:06,410 INFO L151 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2024-11-28 03:03:06,410 INFO L153 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2024-11-28 03:03:06,411 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2024-11-28 03:03:06,411 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2024-11-28 03:03:06,412 INFO L153 SettingsManager]: * Use SBE=true [2024-11-28 03:03:06,412 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2024-11-28 03:03:06,412 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2024-11-28 03:03:06,413 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2024-11-28 03:03:06,413 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2024-11-28 03:03:06,413 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2024-11-28 03:03:06,413 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2024-11-28 03:03:06,413 INFO L153 SettingsManager]: * Adapt memory model on pointer casts if necessary=true [2024-11-28 03:03:06,413 INFO L153 SettingsManager]: * Use bitvectors instead of ints=true [2024-11-28 03:03:06,413 INFO L153 SettingsManager]: * Memory model=HoenickeLindenmann_4ByteResolution [2024-11-28 03:03:06,415 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2024-11-28 03:03:06,415 INFO L153 SettingsManager]: * Behaviour of calls to undefined functions=OVERAPPROXIMATE_BEHAVIOUR [2024-11-28 03:03:06,415 INFO L153 SettingsManager]: * Use constant arrays=true [2024-11-28 03:03:06,415 INFO L151 SettingsManager]: Preferences of IcfgBuilder differ from their defaults: [2024-11-28 03:03:06,415 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-11-28 03:03:06,416 INFO L153 SettingsManager]: * Only consider context switches at boundaries of atomic blocks=true [2024-11-28 03:03:06,416 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2024-11-28 03:03:06,417 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2024-11-28 03:03:06,417 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2024-11-28 03:03:06,417 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-11-28 03:03:06,417 INFO L153 SettingsManager]: * Only consider context switches at boundaries of atomic blocks=true [2024-11-28 03:03:06,417 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2024-11-28 03:03:06,417 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2024-11-28 03:03:06,418 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2024-11-28 03:03:06,418 INFO L153 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2024-11-28 03:03:06,418 INFO L153 SettingsManager]: * Compute procedure contracts=false [2024-11-28 03:03:06,418 INFO L153 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopHeads [2024-11-28 03:03:06,418 INFO L153 SettingsManager]: * Trace refinement strategy=FOX [2024-11-28 03:03:06,418 INFO L153 SettingsManager]: * Command for external solver=cvc4 --incremental --print-success --lang smt [2024-11-28 03:03:06,418 INFO L153 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false [2024-11-28 03:03:06,418 INFO L153 SettingsManager]: * Automaton type used in concurrency analysis=PETRI_NET [2024-11-28 03:03:06,418 INFO L153 SettingsManager]: * Order on configurations for Petri net unfoldings=DBO [2024-11-28 03:03:06,418 INFO L153 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2024-11-28 03:03:06,418 INFO L153 SettingsManager]: * Looper check in Petri net analysis=SEMANTIC Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_74a6bcf8-eac0-40c8-b753-179f212b9ad1/bin/uautomizer-verify-aQ6SnzHsRB Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 133ed02e483160842227ba05a50e01319ae2d6425d72670eb79dfefca9c5ec50 [2024-11-28 03:03:06,793 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2024-11-28 03:03:06,808 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2024-11-28 03:03:06,812 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2024-11-28 03:03:06,815 INFO L270 PluginConnector]: Initializing CDTParser... [2024-11-28 03:03:06,816 INFO L274 PluginConnector]: CDTParser initialized [2024-11-28 03:03:06,820 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_74a6bcf8-eac0-40c8-b753-179f212b9ad1/bin/uautomizer-verify-aQ6SnzHsRB/../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.itc99_b13.c [2024-11-28 03:03:10,628 INFO L533 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_74a6bcf8-eac0-40c8-b753-179f212b9ad1/bin/uautomizer-verify-aQ6SnzHsRB/data/7cdedecfd/49fa7e4adab74ab894fca262a523ae4a/FLAG2e294c516 [2024-11-28 03:03:11,105 INFO L384 CDTParser]: Found 1 translation units. [2024-11-28 03:03:11,110 INFO L180 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_74a6bcf8-eac0-40c8-b753-179f212b9ad1/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.itc99_b13.c [2024-11-28 03:03:11,135 INFO L427 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_74a6bcf8-eac0-40c8-b753-179f212b9ad1/bin/uautomizer-verify-aQ6SnzHsRB/data/7cdedecfd/49fa7e4adab74ab894fca262a523ae4a/FLAG2e294c516 [2024-11-28 03:03:11,164 INFO L435 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_74a6bcf8-eac0-40c8-b753-179f212b9ad1/bin/uautomizer-verify-aQ6SnzHsRB/data/7cdedecfd/49fa7e4adab74ab894fca262a523ae4a [2024-11-28 03:03:11,167 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2024-11-28 03:03:11,169 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2024-11-28 03:03:11,171 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2024-11-28 03:03:11,171 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2024-11-28 03:03:11,178 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2024-11-28 03:03:11,179 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.11 03:03:11" (1/1) ... [2024-11-28 03:03:11,180 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@59dc0d2c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 03:03:11, skipping insertion in model container [2024-11-28 03:03:11,183 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.11 03:03:11" (1/1) ... [2024-11-28 03:03:11,235 INFO L175 MainTranslator]: Built tables and reachable declarations [2024-11-28 03:03:11,494 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_74a6bcf8-eac0-40c8-b753-179f212b9ad1/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.itc99_b13.c[1249,1262] [2024-11-28 03:03:11,772 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-11-28 03:03:11,786 INFO L200 MainTranslator]: Completed pre-run [2024-11-28 03:03:11,800 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_74a6bcf8-eac0-40c8-b753-179f212b9ad1/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.itc99_b13.c[1249,1262] [2024-11-28 03:03:11,950 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-11-28 03:03:11,969 INFO L204 MainTranslator]: Completed translation [2024-11-28 03:03:11,970 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 03:03:11 WrapperNode [2024-11-28 03:03:11,970 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2024-11-28 03:03:11,971 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2024-11-28 03:03:11,972 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2024-11-28 03:03:11,972 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2024-11-28 03:03:11,981 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 03:03:11" (1/1) ... [2024-11-28 03:03:12,008 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 03:03:11" (1/1) ... [2024-11-28 03:03:12,132 INFO L138 Inliner]: procedures = 17, calls = 8, calls flagged for inlining = 3, calls inlined = 3, statements flattened = 969 [2024-11-28 03:03:12,133 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2024-11-28 03:03:12,134 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2024-11-28 03:03:12,134 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2024-11-28 03:03:12,134 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2024-11-28 03:03:12,146 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 03:03:11" (1/1) ... [2024-11-28 03:03:12,147 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 03:03:11" (1/1) ... [2024-11-28 03:03:12,167 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 03:03:11" (1/1) ... [2024-11-28 03:03:12,194 INFO L175 MemorySlicer]: Split 2 memory accesses to 1 slices as follows [2]. 100 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2]. The 0 writes are split as follows [0]. [2024-11-28 03:03:12,194 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 03:03:11" (1/1) ... [2024-11-28 03:03:12,195 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 03:03:11" (1/1) ... [2024-11-28 03:03:12,220 INFO L184 PluginConnector]: Executing the observer ReplaceArrayAssignments from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 03:03:11" (1/1) ... [2024-11-28 03:03:12,222 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 03:03:11" (1/1) ... [2024-11-28 03:03:12,227 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 03:03:11" (1/1) ... [2024-11-28 03:03:12,231 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 03:03:11" (1/1) ... [2024-11-28 03:03:12,236 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 03:03:11" (1/1) ... [2024-11-28 03:03:12,246 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2024-11-28 03:03:12,247 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2024-11-28 03:03:12,247 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2024-11-28 03:03:12,247 INFO L274 PluginConnector]: RCFGBuilder initialized [2024-11-28 03:03:12,248 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 03:03:11" (1/1) ... [2024-11-28 03:03:12,256 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2024-11-28 03:03:12,292 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_74a6bcf8-eac0-40c8-b753-179f212b9ad1/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 03:03:12,310 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_74a6bcf8-eac0-40c8-b753-179f212b9ad1/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (exit command is (exit), workingDir is null) [2024-11-28 03:03:12,315 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_74a6bcf8-eac0-40c8-b753-179f212b9ad1/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Waiting until timeout for monitored process [2024-11-28 03:03:12,357 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2024-11-28 03:03:12,357 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~intINTTYPE1#0 [2024-11-28 03:03:12,358 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2024-11-28 03:03:12,358 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2024-11-28 03:03:12,705 INFO L234 CfgBuilder]: Building ICFG [2024-11-28 03:03:12,708 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2024-11-28 03:03:14,061 INFO L? ?]: Removed 409 outVars from TransFormulas that were not future-live. [2024-11-28 03:03:14,061 INFO L283 CfgBuilder]: Performing block encoding [2024-11-28 03:03:14,072 INFO L307 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2024-11-28 03:03:14,072 INFO L312 CfgBuilder]: Removed 1 assume(true) statements. [2024-11-28 03:03:14,073 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.11 03:03:14 BoogieIcfgContainer [2024-11-28 03:03:14,073 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2024-11-28 03:03:14,075 INFO L112 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2024-11-28 03:03:14,076 INFO L270 PluginConnector]: Initializing TraceAbstraction... [2024-11-28 03:03:14,083 INFO L274 PluginConnector]: TraceAbstraction initialized [2024-11-28 03:03:14,083 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 28.11 03:03:11" (1/3) ... [2024-11-28 03:03:14,084 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@5317a8f9 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.11 03:03:14, skipping insertion in model container [2024-11-28 03:03:14,085 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 03:03:11" (2/3) ... [2024-11-28 03:03:14,085 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@5317a8f9 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.11 03:03:14, skipping insertion in model container [2024-11-28 03:03:14,087 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.11 03:03:14" (3/3) ... [2024-11-28 03:03:14,088 INFO L128 eAbstractionObserver]: Analyzing ICFG btor2c-lazyMod.itc99_b13.c [2024-11-28 03:03:14,108 INFO L216 ceAbstractionStarter]: Automizer settings: Hoare:LoopHeads NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2024-11-28 03:03:14,111 INFO L151 ceAbstractionStarter]: Applying trace abstraction to ICFG btor2c-lazyMod.itc99_b13.c that has 1 procedures, 10 locations, 1 initial locations, 1 loop locations, and 1 error locations. [2024-11-28 03:03:14,185 INFO L332 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2024-11-28 03:03:14,207 INFO L333 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mAutomataTypeConcurrency=PETRI_NET, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopHeads, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@41c2d05, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2024-11-28 03:03:14,208 INFO L334 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2024-11-28 03:03:14,213 INFO L276 IsEmpty]: Start isEmpty. Operand has 10 states, 8 states have (on average 1.375) internal successors, (11), 9 states have internal predecessors, (11), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 03:03:14,219 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 6 [2024-11-28 03:03:14,219 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 03:03:14,220 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1] [2024-11-28 03:03:14,221 INFO L396 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 03:03:14,228 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 03:03:14,230 INFO L85 PathProgramCache]: Analyzing trace with hash 28694789, now seen corresponding path program 1 times [2024-11-28 03:03:14,248 INFO L118 FreeRefinementEngine]: Executing refinement strategy FOX [2024-11-28 03:03:14,249 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [633088367] [2024-11-28 03:03:14,249 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 03:03:14,249 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-28 03:03:14,250 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_74a6bcf8-eac0-40c8-b753-179f212b9ad1/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 03:03:14,252 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_74a6bcf8-eac0-40c8-b753-179f212b9ad1/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-28 03:03:14,257 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_74a6bcf8-eac0-40c8-b753-179f212b9ad1/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2024-11-28 03:03:14,951 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 03:03:14,977 WARN L254 TraceCheckSpWp]: Trace formula consists of 436 conjuncts, 285 conjuncts are in the unsatisfiable core [2024-11-28 03:03:15,060 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-28 03:03:21,165 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-28 03:03:21,165 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-11-28 03:03:21,170 INFO L136 FreeRefinementEngine]: Strategy FOX found an infeasible trace [2024-11-28 03:03:21,170 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [633088367] [2024-11-28 03:03:21,174 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [633088367] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 03:03:21,174 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 03:03:21,175 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-28 03:03:21,177 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1534909826] [2024-11-28 03:03:21,178 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 03:03:21,182 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-28 03:03:21,183 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy FOX [2024-11-28 03:03:21,211 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-28 03:03:21,212 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-28 03:03:21,215 INFO L87 Difference]: Start difference. First operand has 10 states, 8 states have (on average 1.375) internal successors, (11), 9 states have internal predecessors, (11), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 4 states, 4 states have (on average 1.25) internal successors, (5), 4 states have internal predecessors, (5), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 03:03:21,569 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 03:03:21,570 INFO L93 Difference]: Finished difference Result 18 states and 23 transitions. [2024-11-28 03:03:21,572 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-28 03:03:21,575 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 1.25) internal successors, (5), 4 states have internal predecessors, (5), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 5 [2024-11-28 03:03:21,575 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 03:03:21,584 INFO L225 Difference]: With dead ends: 18 [2024-11-28 03:03:21,584 INFO L226 Difference]: Without dead ends: 10 [2024-11-28 03:03:21,587 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-11-28 03:03:21,593 INFO L435 NwaCegarLoop]: 4 mSDtfsCounter, 2 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 9 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2 SdHoareTripleChecker+Valid, 11 SdHoareTripleChecker+Invalid, 9 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 9 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-28 03:03:21,597 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2 Valid, 11 Invalid, 9 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 9 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-28 03:03:21,614 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10 states. [2024-11-28 03:03:21,628 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10 to 9. [2024-11-28 03:03:21,630 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 9 states, 8 states have (on average 1.125) internal successors, (9), 8 states have internal predecessors, (9), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 03:03:21,636 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 9 transitions. [2024-11-28 03:03:21,642 INFO L78 Accepts]: Start accepts. Automaton has 9 states and 9 transitions. Word has length 5 [2024-11-28 03:03:21,643 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 03:03:21,643 INFO L471 AbstractCegarLoop]: Abstraction has 9 states and 9 transitions. [2024-11-28 03:03:21,644 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 1.25) internal successors, (5), 4 states have internal predecessors, (5), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 03:03:21,644 INFO L276 IsEmpty]: Start isEmpty. Operand 9 states and 9 transitions. [2024-11-28 03:03:21,644 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 9 [2024-11-28 03:03:21,644 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 03:03:21,645 INFO L218 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1] [2024-11-28 03:03:21,661 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_74a6bcf8-eac0-40c8-b753-179f212b9ad1/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Ended with exit code 0 [2024-11-28 03:03:21,850 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 2 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_74a6bcf8-eac0-40c8-b753-179f212b9ad1/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-28 03:03:21,850 INFO L396 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 03:03:21,851 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 03:03:21,851 INFO L85 PathProgramCache]: Analyzing trace with hash 152739811, now seen corresponding path program 1 times [2024-11-28 03:03:21,853 INFO L118 FreeRefinementEngine]: Executing refinement strategy FOX [2024-11-28 03:03:21,853 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1133589702] [2024-11-28 03:03:21,853 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 03:03:21,853 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-28 03:03:21,854 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_74a6bcf8-eac0-40c8-b753-179f212b9ad1/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 03:03:21,856 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_74a6bcf8-eac0-40c8-b753-179f212b9ad1/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-28 03:03:21,861 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_74a6bcf8-eac0-40c8-b753-179f212b9ad1/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2024-11-28 03:03:22,754 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 03:03:22,776 INFO L256 TraceCheckSpWp]: Trace formula consists of 815 conjuncts, 300 conjuncts are in the unsatisfiable core [2024-11-28 03:03:22,837 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-28 03:03:28,081 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-28 03:03:28,082 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-28 03:05:58,471 WARN L286 SmtUtils]: Spent 5.00s on a formula simplification. DAG size of input: 7711 DAG size of output: 15119 (called from [L 728] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher.simplify) [2024-11-28 03:07:45,284 WARN L286 SmtUtils]: Spent 11.49s on a formula simplification. DAG size of input: 15123 DAG size of output: 29682 (called from [L 728] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher.simplify) [2024-11-28 03:11:24,781 WARN L286 SmtUtils]: Spent 24.46s on a formula simplification. DAG size of input: 29691 DAG size of output: 55543 (called from [L 728] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher.simplify)