./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.miim.c --full-output --architecture 64bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version d790fecc Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_222ce6d4-5b40-4d76-abe1-0d226bb9524c/bin/uautomizer-verify-aQ6SnzHsRB/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_222ce6d4-5b40-4d76-abe1-0d226bb9524c/bin/uautomizer-verify-aQ6SnzHsRB/plugins/org.eclipse.equinox.launcher_1.6.800.v20240513-1750.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_222ce6d4-5b40-4d76-abe1-0d226bb9524c/bin/uautomizer-verify-aQ6SnzHsRB/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_222ce6d4-5b40-4d76-abe1-0d226bb9524c/bin/uautomizer-verify-aQ6SnzHsRB/config/AutomizerReach.xml -i ../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.miim.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_222ce6d4-5b40-4d76-abe1-0d226bb9524c/bin/uautomizer-verify-aQ6SnzHsRB/config/svcomp-Reach-64bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_222ce6d4-5b40-4d76-abe1-0d226bb9524c/bin/uautomizer-verify-aQ6SnzHsRB --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash 8c8574ead59a3d6c844f4988721fe479d7d5d492b1ea6dd2e875c5c9834b070c --- Real Ultimate output --- This is Ultimate 0.3.0-dev-d790fec [2024-11-28 02:08:46,453 INFO L188 SettingsManager]: Resetting all preferences to default values... [2024-11-28 02:08:46,538 INFO L114 SettingsManager]: Loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_222ce6d4-5b40-4d76-abe1-0d226bb9524c/bin/uautomizer-verify-aQ6SnzHsRB/config/svcomp-Reach-64bit-Automizer_Default.epf [2024-11-28 02:08:46,549 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2024-11-28 02:08:46,549 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2024-11-28 02:08:46,582 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2024-11-28 02:08:46,582 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2024-11-28 02:08:46,583 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2024-11-28 02:08:46,583 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2024-11-28 02:08:46,583 INFO L153 SettingsManager]: * Use memory slicer=true [2024-11-28 02:08:46,583 INFO L151 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2024-11-28 02:08:46,583 INFO L153 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2024-11-28 02:08:46,583 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2024-11-28 02:08:46,584 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2024-11-28 02:08:46,584 INFO L153 SettingsManager]: * Use SBE=true [2024-11-28 02:08:46,584 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2024-11-28 02:08:46,584 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2024-11-28 02:08:46,584 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2024-11-28 02:08:46,584 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2024-11-28 02:08:46,584 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2024-11-28 02:08:46,584 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2024-11-28 02:08:46,584 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2024-11-28 02:08:46,584 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2024-11-28 02:08:46,585 INFO L153 SettingsManager]: * Behaviour of calls to undefined functions=OVERAPPROXIMATE_BEHAVIOUR [2024-11-28 02:08:46,585 INFO L153 SettingsManager]: * Use constant arrays=true [2024-11-28 02:08:46,585 INFO L151 SettingsManager]: Preferences of IcfgBuilder differ from their defaults: [2024-11-28 02:08:46,585 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-11-28 02:08:46,585 INFO L153 SettingsManager]: * Only consider context switches at boundaries of atomic blocks=true [2024-11-28 02:08:46,585 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2024-11-28 02:08:46,585 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2024-11-28 02:08:46,585 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2024-11-28 02:08:46,585 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-11-28 02:08:46,585 INFO L153 SettingsManager]: * Only consider context switches at boundaries of atomic blocks=true [2024-11-28 02:08:46,586 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2024-11-28 02:08:46,586 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2024-11-28 02:08:46,586 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2024-11-28 02:08:46,586 INFO L153 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2024-11-28 02:08:46,586 INFO L153 SettingsManager]: * Compute procedure contracts=false [2024-11-28 02:08:46,586 INFO L153 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopHeads [2024-11-28 02:08:46,586 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2024-11-28 02:08:46,586 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2024-11-28 02:08:46,586 INFO L153 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false [2024-11-28 02:08:46,587 INFO L153 SettingsManager]: * Automaton type used in concurrency analysis=PETRI_NET [2024-11-28 02:08:46,587 INFO L153 SettingsManager]: * Order on configurations for Petri net unfoldings=DBO [2024-11-28 02:08:46,587 INFO L153 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2024-11-28 02:08:46,587 INFO L153 SettingsManager]: * Looper check in Petri net analysis=SEMANTIC Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_222ce6d4-5b40-4d76-abe1-0d226bb9524c/bin/uautomizer-verify-aQ6SnzHsRB Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 8c8574ead59a3d6c844f4988721fe479d7d5d492b1ea6dd2e875c5c9834b070c [2024-11-28 02:08:46,922 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2024-11-28 02:08:46,931 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2024-11-28 02:08:46,933 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2024-11-28 02:08:46,934 INFO L270 PluginConnector]: Initializing CDTParser... [2024-11-28 02:08:46,935 INFO L274 PluginConnector]: CDTParser initialized [2024-11-28 02:08:46,936 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_222ce6d4-5b40-4d76-abe1-0d226bb9524c/bin/uautomizer-verify-aQ6SnzHsRB/../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.miim.c [2024-11-28 02:08:49,918 INFO L533 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_222ce6d4-5b40-4d76-abe1-0d226bb9524c/bin/uautomizer-verify-aQ6SnzHsRB/data/e360ce93b/b93a1ff6b7984004b195c3141c3333cd/FLAG07ea9a1bc [2024-11-28 02:08:50,271 INFO L384 CDTParser]: Found 1 translation units. [2024-11-28 02:08:50,272 INFO L180 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_222ce6d4-5b40-4d76-abe1-0d226bb9524c/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.miim.c [2024-11-28 02:08:50,286 INFO L427 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_222ce6d4-5b40-4d76-abe1-0d226bb9524c/bin/uautomizer-verify-aQ6SnzHsRB/data/e360ce93b/b93a1ff6b7984004b195c3141c3333cd/FLAG07ea9a1bc [2024-11-28 02:08:50,313 INFO L435 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_222ce6d4-5b40-4d76-abe1-0d226bb9524c/bin/uautomizer-verify-aQ6SnzHsRB/data/e360ce93b/b93a1ff6b7984004b195c3141c3333cd [2024-11-28 02:08:50,319 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2024-11-28 02:08:50,321 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2024-11-28 02:08:50,323 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2024-11-28 02:08:50,324 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2024-11-28 02:08:50,329 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2024-11-28 02:08:50,330 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.11 02:08:50" (1/1) ... [2024-11-28 02:08:50,332 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@cbdd664 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 02:08:50, skipping insertion in model container [2024-11-28 02:08:50,332 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.11 02:08:50" (1/1) ... [2024-11-28 02:08:50,395 INFO L175 MainTranslator]: Built tables and reachable declarations [2024-11-28 02:08:50,617 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_222ce6d4-5b40-4d76-abe1-0d226bb9524c/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.miim.c[1244,1257] [2024-11-28 02:08:51,004 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-11-28 02:08:51,016 INFO L200 MainTranslator]: Completed pre-run [2024-11-28 02:08:51,028 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_222ce6d4-5b40-4d76-abe1-0d226bb9524c/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.miim.c[1244,1257] [2024-11-28 02:08:51,147 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-11-28 02:08:51,161 INFO L204 MainTranslator]: Completed translation [2024-11-28 02:08:51,162 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 02:08:51 WrapperNode [2024-11-28 02:08:51,162 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2024-11-28 02:08:51,163 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2024-11-28 02:08:51,164 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2024-11-28 02:08:51,164 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2024-11-28 02:08:51,171 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 02:08:51" (1/1) ... [2024-11-28 02:08:51,212 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 02:08:51" (1/1) ... [2024-11-28 02:08:51,387 INFO L138 Inliner]: procedures = 17, calls = 15, calls flagged for inlining = 3, calls inlined = 3, statements flattened = 1717 [2024-11-28 02:08:51,390 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2024-11-28 02:08:51,390 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2024-11-28 02:08:51,391 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2024-11-28 02:08:51,391 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2024-11-28 02:08:51,402 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 02:08:51" (1/1) ... [2024-11-28 02:08:51,403 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 02:08:51" (1/1) ... [2024-11-28 02:08:51,427 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 02:08:51" (1/1) ... [2024-11-28 02:08:51,547 INFO L175 MemorySlicer]: Split 9 memory accesses to 2 slices as follows [2, 7]. 78 percent of accesses are in the largest equivalence class. The 9 initializations are split as follows [2, 7]. The 0 writes are split as follows [0, 0]. [2024-11-28 02:08:51,548 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 02:08:51" (1/1) ... [2024-11-28 02:08:51,548 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 02:08:51" (1/1) ... [2024-11-28 02:08:51,648 INFO L184 PluginConnector]: Executing the observer ReplaceArrayAssignments from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 02:08:51" (1/1) ... [2024-11-28 02:08:51,655 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 02:08:51" (1/1) ... [2024-11-28 02:08:51,675 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 02:08:51" (1/1) ... [2024-11-28 02:08:51,683 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 02:08:51" (1/1) ... [2024-11-28 02:08:51,695 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 02:08:51" (1/1) ... [2024-11-28 02:08:51,732 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2024-11-28 02:08:51,733 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2024-11-28 02:08:51,734 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2024-11-28 02:08:51,734 INFO L274 PluginConnector]: RCFGBuilder initialized [2024-11-28 02:08:51,735 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 02:08:51" (1/1) ... [2024-11-28 02:08:51,741 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2024-11-28 02:08:51,755 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_222ce6d4-5b40-4d76-abe1-0d226bb9524c/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 02:08:51,773 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_222ce6d4-5b40-4d76-abe1-0d226bb9524c/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (exit command is (exit), workingDir is null) [2024-11-28 02:08:51,793 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_222ce6d4-5b40-4d76-abe1-0d226bb9524c/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Waiting until timeout for monitored process [2024-11-28 02:08:51,821 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2024-11-28 02:08:51,822 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#0 [2024-11-28 02:08:51,822 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#1 [2024-11-28 02:08:51,822 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2024-11-28 02:08:51,822 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2024-11-28 02:08:52,190 INFO L234 CfgBuilder]: Building ICFG [2024-11-28 02:08:52,194 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2024-11-28 02:08:54,455 INFO L? ?]: Removed 833 outVars from TransFormulas that were not future-live. [2024-11-28 02:08:54,455 INFO L283 CfgBuilder]: Performing block encoding [2024-11-28 02:08:54,473 INFO L307 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2024-11-28 02:08:54,474 INFO L312 CfgBuilder]: Removed 1 assume(true) statements. [2024-11-28 02:08:54,474 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.11 02:08:54 BoogieIcfgContainer [2024-11-28 02:08:54,474 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2024-11-28 02:08:54,477 INFO L112 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2024-11-28 02:08:54,477 INFO L270 PluginConnector]: Initializing TraceAbstraction... [2024-11-28 02:08:54,483 INFO L274 PluginConnector]: TraceAbstraction initialized [2024-11-28 02:08:54,483 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 28.11 02:08:50" (1/3) ... [2024-11-28 02:08:54,484 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@4dff90ee and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.11 02:08:54, skipping insertion in model container [2024-11-28 02:08:54,484 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 02:08:51" (2/3) ... [2024-11-28 02:08:54,485 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@4dff90ee and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.11 02:08:54, skipping insertion in model container [2024-11-28 02:08:54,485 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.11 02:08:54" (3/3) ... [2024-11-28 02:08:54,486 INFO L128 eAbstractionObserver]: Analyzing ICFG btor2c-lazyMod.miim.c [2024-11-28 02:08:54,504 INFO L216 ceAbstractionStarter]: Automizer settings: Hoare:LoopHeads NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2024-11-28 02:08:54,505 INFO L151 ceAbstractionStarter]: Applying trace abstraction to ICFG btor2c-lazyMod.miim.c that has 1 procedures, 326 locations, 1 initial locations, 1 loop locations, and 1 error locations. [2024-11-28 02:08:54,584 INFO L332 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2024-11-28 02:08:54,598 INFO L333 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mAutomataTypeConcurrency=PETRI_NET, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopHeads, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@16d4614c, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2024-11-28 02:08:54,599 INFO L334 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2024-11-28 02:08:54,605 INFO L276 IsEmpty]: Start isEmpty. Operand has 326 states, 324 states have (on average 1.4969135802469136) internal successors, (485), 325 states have internal predecessors, (485), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 02:08:54,614 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 76 [2024-11-28 02:08:54,615 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 02:08:54,615 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 02:08:54,616 INFO L396 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 02:08:54,622 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 02:08:54,622 INFO L85 PathProgramCache]: Analyzing trace with hash -1540223333, now seen corresponding path program 1 times [2024-11-28 02:08:54,631 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 02:08:54,632 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [448829051] [2024-11-28 02:08:54,632 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:08:54,633 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 02:08:55,037 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 02:08:56,314 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-28 02:08:56,314 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 02:08:56,315 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [448829051] [2024-11-28 02:08:56,316 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [448829051] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 02:08:56,320 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 02:08:56,320 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-28 02:08:56,322 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [350162846] [2024-11-28 02:08:56,323 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 02:08:56,329 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-28 02:08:56,330 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 02:08:56,361 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-28 02:08:56,362 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-28 02:08:56,367 INFO L87 Difference]: Start difference. First operand has 326 states, 324 states have (on average 1.4969135802469136) internal successors, (485), 325 states have internal predecessors, (485), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 4 states, 4 states have (on average 18.75) internal successors, (75), 4 states have internal predecessors, (75), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 02:08:56,533 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 02:08:56,534 INFO L93 Difference]: Finished difference Result 551 states and 822 transitions. [2024-11-28 02:08:56,538 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-28 02:08:56,540 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 18.75) internal successors, (75), 4 states have internal predecessors, (75), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 75 [2024-11-28 02:08:56,540 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 02:08:56,554 INFO L225 Difference]: With dead ends: 551 [2024-11-28 02:08:56,556 INFO L226 Difference]: Without dead ends: 323 [2024-11-28 02:08:56,561 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-28 02:08:56,565 INFO L435 NwaCegarLoop]: 475 mSDtfsCounter, 26 mSDsluCounter, 910 mSDsCounter, 0 mSdLazyCounter, 16 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 26 SdHoareTripleChecker+Valid, 1385 SdHoareTripleChecker+Invalid, 16 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 16 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-28 02:08:56,569 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [26 Valid, 1385 Invalid, 16 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 16 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-28 02:08:56,587 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 323 states. [2024-11-28 02:08:56,623 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 323 to 323. [2024-11-28 02:08:56,628 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 323 states, 322 states have (on average 1.4906832298136645) internal successors, (480), 322 states have internal predecessors, (480), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 02:08:56,638 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 323 states to 323 states and 480 transitions. [2024-11-28 02:08:56,643 INFO L78 Accepts]: Start accepts. Automaton has 323 states and 480 transitions. Word has length 75 [2024-11-28 02:08:56,643 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 02:08:56,645 INFO L471 AbstractCegarLoop]: Abstraction has 323 states and 480 transitions. [2024-11-28 02:08:56,645 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 18.75) internal successors, (75), 4 states have internal predecessors, (75), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 02:08:56,645 INFO L276 IsEmpty]: Start isEmpty. Operand 323 states and 480 transitions. [2024-11-28 02:08:56,647 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 77 [2024-11-28 02:08:56,649 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 02:08:56,649 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 02:08:56,650 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2024-11-28 02:08:56,650 INFO L396 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 02:08:56,651 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 02:08:56,651 INFO L85 PathProgramCache]: Analyzing trace with hash 1396752011, now seen corresponding path program 1 times [2024-11-28 02:08:56,651 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 02:08:56,651 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [588480024] [2024-11-28 02:08:56,652 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:08:56,652 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 02:08:56,800 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 02:08:57,246 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-28 02:08:57,246 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 02:08:57,247 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [588480024] [2024-11-28 02:08:57,247 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [588480024] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 02:08:57,248 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 02:08:57,248 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-28 02:08:57,248 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1787448454] [2024-11-28 02:08:57,248 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 02:08:57,249 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-28 02:08:57,251 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 02:08:57,252 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-28 02:08:57,252 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-28 02:08:57,252 INFO L87 Difference]: Start difference. First operand 323 states and 480 transitions. Second operand has 4 states, 4 states have (on average 19.0) internal successors, (76), 4 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 02:08:57,299 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 02:08:57,299 INFO L93 Difference]: Finished difference Result 327 states and 484 transitions. [2024-11-28 02:08:57,300 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-28 02:08:57,300 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 19.0) internal successors, (76), 4 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 76 [2024-11-28 02:08:57,300 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 02:08:57,302 INFO L225 Difference]: With dead ends: 327 [2024-11-28 02:08:57,302 INFO L226 Difference]: Without dead ends: 325 [2024-11-28 02:08:57,302 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-28 02:08:57,303 INFO L435 NwaCegarLoop]: 478 mSDtfsCounter, 0 mSDsluCounter, 950 mSDsCounter, 0 mSdLazyCounter, 11 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 1428 SdHoareTripleChecker+Invalid, 11 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 11 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-28 02:08:57,304 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 1428 Invalid, 11 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 11 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-28 02:08:57,305 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 325 states. [2024-11-28 02:08:57,323 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 325 to 325. [2024-11-28 02:08:57,327 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 325 states, 324 states have (on average 1.4876543209876543) internal successors, (482), 324 states have internal predecessors, (482), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 02:08:57,328 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 325 states to 325 states and 482 transitions. [2024-11-28 02:08:57,328 INFO L78 Accepts]: Start accepts. Automaton has 325 states and 482 transitions. Word has length 76 [2024-11-28 02:08:57,329 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 02:08:57,329 INFO L471 AbstractCegarLoop]: Abstraction has 325 states and 482 transitions. [2024-11-28 02:08:57,329 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 19.0) internal successors, (76), 4 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 02:08:57,329 INFO L276 IsEmpty]: Start isEmpty. Operand 325 states and 482 transitions. [2024-11-28 02:08:57,331 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 78 [2024-11-28 02:08:57,331 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 02:08:57,331 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 02:08:57,331 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2024-11-28 02:08:57,331 INFO L396 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 02:08:57,331 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 02:08:57,332 INFO L85 PathProgramCache]: Analyzing trace with hash 351334989, now seen corresponding path program 1 times [2024-11-28 02:08:57,334 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 02:08:57,334 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2077627487] [2024-11-28 02:08:57,335 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:08:57,335 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 02:08:57,411 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 02:08:57,686 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-28 02:08:57,687 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 02:08:57,688 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2077627487] [2024-11-28 02:08:57,688 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2077627487] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 02:08:57,688 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 02:08:57,688 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-28 02:08:57,688 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1816280789] [2024-11-28 02:08:57,688 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 02:08:57,689 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-28 02:08:57,689 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 02:08:57,690 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-28 02:08:57,690 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-28 02:08:57,690 INFO L87 Difference]: Start difference. First operand 325 states and 482 transitions. Second operand has 4 states, 4 states have (on average 19.25) internal successors, (77), 4 states have internal predecessors, (77), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 02:08:57,757 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 02:08:57,760 INFO L93 Difference]: Finished difference Result 554 states and 821 transitions. [2024-11-28 02:08:57,761 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-28 02:08:57,761 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 19.25) internal successors, (77), 4 states have internal predecessors, (77), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 77 [2024-11-28 02:08:57,761 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 02:08:57,763 INFO L225 Difference]: With dead ends: 554 [2024-11-28 02:08:57,763 INFO L226 Difference]: Without dead ends: 327 [2024-11-28 02:08:57,764 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-28 02:08:57,767 INFO L435 NwaCegarLoop]: 478 mSDtfsCounter, 0 mSDsluCounter, 946 mSDsCounter, 0 mSdLazyCounter, 15 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 1424 SdHoareTripleChecker+Invalid, 15 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 15 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-28 02:08:57,767 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 1424 Invalid, 15 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 15 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-28 02:08:57,773 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 327 states. [2024-11-28 02:08:57,788 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 327 to 327. [2024-11-28 02:08:57,790 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 327 states, 326 states have (on average 1.4846625766871167) internal successors, (484), 326 states have internal predecessors, (484), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 02:08:57,791 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 327 states to 327 states and 484 transitions. [2024-11-28 02:08:57,796 INFO L78 Accepts]: Start accepts. Automaton has 327 states and 484 transitions. Word has length 77 [2024-11-28 02:08:57,796 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 02:08:57,796 INFO L471 AbstractCegarLoop]: Abstraction has 327 states and 484 transitions. [2024-11-28 02:08:57,796 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 19.25) internal successors, (77), 4 states have internal predecessors, (77), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 02:08:57,797 INFO L276 IsEmpty]: Start isEmpty. Operand 327 states and 484 transitions. [2024-11-28 02:08:57,798 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 79 [2024-11-28 02:08:57,798 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 02:08:57,799 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 02:08:57,799 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2024-11-28 02:08:57,799 INFO L396 AbstractCegarLoop]: === Iteration 4 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 02:08:57,799 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 02:08:57,803 INFO L85 PathProgramCache]: Analyzing trace with hash 1203484580, now seen corresponding path program 1 times [2024-11-28 02:08:57,803 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 02:08:57,803 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1656681182] [2024-11-28 02:08:57,803 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:08:57,804 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 02:08:57,911 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 02:08:58,768 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-28 02:08:58,769 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 02:08:58,769 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1656681182] [2024-11-28 02:08:58,769 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1656681182] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 02:08:58,769 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 02:08:58,769 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2024-11-28 02:08:58,770 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1102136562] [2024-11-28 02:08:58,770 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 02:08:58,770 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2024-11-28 02:08:58,772 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 02:08:58,773 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2024-11-28 02:08:58,773 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=42, Unknown=0, NotChecked=0, Total=56 [2024-11-28 02:08:58,774 INFO L87 Difference]: Start difference. First operand 327 states and 484 transitions. Second operand has 8 states, 8 states have (on average 9.75) internal successors, (78), 8 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 02:08:58,985 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 02:08:58,985 INFO L93 Difference]: Finished difference Result 586 states and 866 transitions. [2024-11-28 02:08:58,986 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2024-11-28 02:08:58,986 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 9.75) internal successors, (78), 8 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 78 [2024-11-28 02:08:58,986 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 02:08:58,988 INFO L225 Difference]: With dead ends: 586 [2024-11-28 02:08:58,988 INFO L226 Difference]: Without dead ends: 357 [2024-11-28 02:08:58,989 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=30, Invalid=102, Unknown=0, NotChecked=0, Total=132 [2024-11-28 02:08:58,990 INFO L435 NwaCegarLoop]: 472 mSDtfsCounter, 494 mSDsluCounter, 2345 mSDsCounter, 0 mSdLazyCounter, 62 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 494 SdHoareTripleChecker+Valid, 2817 SdHoareTripleChecker+Invalid, 62 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 62 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-28 02:08:58,991 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [494 Valid, 2817 Invalid, 62 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 62 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-28 02:08:58,995 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 357 states. [2024-11-28 02:08:59,015 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 357 to 356. [2024-11-28 02:08:59,016 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 356 states, 355 states have (on average 1.4816901408450704) internal successors, (526), 355 states have internal predecessors, (526), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 02:08:59,020 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 356 states to 356 states and 526 transitions. [2024-11-28 02:08:59,024 INFO L78 Accepts]: Start accepts. Automaton has 356 states and 526 transitions. Word has length 78 [2024-11-28 02:08:59,024 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 02:08:59,024 INFO L471 AbstractCegarLoop]: Abstraction has 356 states and 526 transitions. [2024-11-28 02:08:59,025 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 9.75) internal successors, (78), 8 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 02:08:59,025 INFO L276 IsEmpty]: Start isEmpty. Operand 356 states and 526 transitions. [2024-11-28 02:08:59,027 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 80 [2024-11-28 02:08:59,031 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 02:08:59,031 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 02:08:59,031 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3 [2024-11-28 02:08:59,031 INFO L396 AbstractCegarLoop]: === Iteration 5 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 02:08:59,032 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 02:08:59,032 INFO L85 PathProgramCache]: Analyzing trace with hash 139770147, now seen corresponding path program 1 times [2024-11-28 02:08:59,032 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 02:08:59,032 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [735186448] [2024-11-28 02:08:59,032 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:08:59,032 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 02:08:59,088 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 02:08:59,461 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-28 02:08:59,462 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 02:08:59,462 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [735186448] [2024-11-28 02:08:59,464 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [735186448] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 02:08:59,464 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 02:08:59,464 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-11-28 02:08:59,464 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1141043446] [2024-11-28 02:08:59,465 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 02:08:59,465 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-11-28 02:08:59,465 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 02:08:59,465 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-11-28 02:08:59,466 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2024-11-28 02:08:59,466 INFO L87 Difference]: Start difference. First operand 356 states and 526 transitions. Second operand has 6 states, 6 states have (on average 13.166666666666666) internal successors, (79), 6 states have internal predecessors, (79), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 02:09:00,001 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 02:09:00,002 INFO L93 Difference]: Finished difference Result 620 states and 915 transitions. [2024-11-28 02:09:00,002 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-11-28 02:09:00,003 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 13.166666666666666) internal successors, (79), 6 states have internal predecessors, (79), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 79 [2024-11-28 02:09:00,003 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 02:09:00,005 INFO L225 Difference]: With dead ends: 620 [2024-11-28 02:09:00,008 INFO L226 Difference]: Without dead ends: 362 [2024-11-28 02:09:00,009 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=38, Unknown=0, NotChecked=0, Total=56 [2024-11-28 02:09:00,009 INFO L435 NwaCegarLoop]: 468 mSDtfsCounter, 443 mSDsluCounter, 1219 mSDsCounter, 0 mSdLazyCounter, 233 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 443 SdHoareTripleChecker+Valid, 1687 SdHoareTripleChecker+Invalid, 234 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 233 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2024-11-28 02:09:00,010 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [443 Valid, 1687 Invalid, 234 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 233 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2024-11-28 02:09:00,011 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 362 states. [2024-11-28 02:09:00,021 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 362 to 362. [2024-11-28 02:09:00,022 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 362 states, 361 states have (on average 1.479224376731302) internal successors, (534), 361 states have internal predecessors, (534), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 02:09:00,028 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 362 states to 362 states and 534 transitions. [2024-11-28 02:09:00,032 INFO L78 Accepts]: Start accepts. Automaton has 362 states and 534 transitions. Word has length 79 [2024-11-28 02:09:00,032 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 02:09:00,032 INFO L471 AbstractCegarLoop]: Abstraction has 362 states and 534 transitions. [2024-11-28 02:09:00,033 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 13.166666666666666) internal successors, (79), 6 states have internal predecessors, (79), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 02:09:00,033 INFO L276 IsEmpty]: Start isEmpty. Operand 362 states and 534 transitions. [2024-11-28 02:09:00,034 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 80 [2024-11-28 02:09:00,038 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 02:09:00,038 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 02:09:00,038 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4 [2024-11-28 02:09:00,038 INFO L396 AbstractCegarLoop]: === Iteration 6 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 02:09:00,039 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 02:09:00,039 INFO L85 PathProgramCache]: Analyzing trace with hash -1027336943, now seen corresponding path program 1 times [2024-11-28 02:09:00,039 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 02:09:00,039 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2005059805] [2024-11-28 02:09:00,039 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:09:00,039 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 02:09:00,125 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 02:09:00,623 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-28 02:09:00,624 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 02:09:00,624 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2005059805] [2024-11-28 02:09:00,625 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2005059805] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 02:09:00,625 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 02:09:00,625 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-28 02:09:00,625 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1335264089] [2024-11-28 02:09:00,625 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 02:09:00,626 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-28 02:09:00,626 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 02:09:00,627 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-28 02:09:00,627 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-28 02:09:00,627 INFO L87 Difference]: Start difference. First operand 362 states and 534 transitions. Second operand has 5 states, 5 states have (on average 15.8) internal successors, (79), 5 states have internal predecessors, (79), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 02:09:00,702 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 02:09:00,702 INFO L93 Difference]: Finished difference Result 626 states and 922 transitions. [2024-11-28 02:09:00,703 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-11-28 02:09:00,704 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 15.8) internal successors, (79), 5 states have internal predecessors, (79), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 79 [2024-11-28 02:09:00,705 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 02:09:00,707 INFO L225 Difference]: With dead ends: 626 [2024-11-28 02:09:00,707 INFO L226 Difference]: Without dead ends: 368 [2024-11-28 02:09:00,708 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2024-11-28 02:09:00,710 INFO L435 NwaCegarLoop]: 475 mSDtfsCounter, 417 mSDsluCounter, 943 mSDsCounter, 0 mSdLazyCounter, 22 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 417 SdHoareTripleChecker+Valid, 1418 SdHoareTripleChecker+Invalid, 22 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 22 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-28 02:09:00,711 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [417 Valid, 1418 Invalid, 22 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 22 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-28 02:09:00,716 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 368 states. [2024-11-28 02:09:00,727 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 368 to 368. [2024-11-28 02:09:00,728 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 368 states, 367 states have (on average 1.4713896457765667) internal successors, (540), 367 states have internal predecessors, (540), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 02:09:00,734 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 368 states to 368 states and 540 transitions. [2024-11-28 02:09:00,734 INFO L78 Accepts]: Start accepts. Automaton has 368 states and 540 transitions. Word has length 79 [2024-11-28 02:09:00,734 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 02:09:00,734 INFO L471 AbstractCegarLoop]: Abstraction has 368 states and 540 transitions. [2024-11-28 02:09:00,735 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 15.8) internal successors, (79), 5 states have internal predecessors, (79), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 02:09:00,735 INFO L276 IsEmpty]: Start isEmpty. Operand 368 states and 540 transitions. [2024-11-28 02:09:00,735 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2024-11-28 02:09:00,735 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 02:09:00,736 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 02:09:00,736 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5 [2024-11-28 02:09:00,736 INFO L396 AbstractCegarLoop]: === Iteration 7 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 02:09:00,736 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 02:09:00,736 INFO L85 PathProgramCache]: Analyzing trace with hash 1702090248, now seen corresponding path program 1 times [2024-11-28 02:09:00,736 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 02:09:00,736 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1251762510] [2024-11-28 02:09:00,737 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:09:00,737 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 02:09:00,820 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 02:09:01,261 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-28 02:09:01,261 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 02:09:01,261 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1251762510] [2024-11-28 02:09:01,263 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1251762510] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 02:09:01,263 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 02:09:01,264 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2024-11-28 02:09:01,264 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [616892257] [2024-11-28 02:09:01,264 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 02:09:01,264 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2024-11-28 02:09:01,264 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 02:09:01,265 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-11-28 02:09:01,265 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2024-11-28 02:09:01,266 INFO L87 Difference]: Start difference. First operand 368 states and 540 transitions. Second operand has 7 states, 7 states have (on average 11.428571428571429) internal successors, (80), 7 states have internal predecessors, (80), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 02:09:02,372 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 02:09:02,372 INFO L93 Difference]: Finished difference Result 747 states and 1091 transitions. [2024-11-28 02:09:02,373 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2024-11-28 02:09:02,373 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 11.428571428571429) internal successors, (80), 7 states have internal predecessors, (80), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 80 [2024-11-28 02:09:02,373 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 02:09:02,375 INFO L225 Difference]: With dead ends: 747 [2024-11-28 02:09:02,375 INFO L226 Difference]: Without dead ends: 483 [2024-11-28 02:09:02,376 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=33, Invalid=77, Unknown=0, NotChecked=0, Total=110 [2024-11-28 02:09:02,377 INFO L435 NwaCegarLoop]: 285 mSDtfsCounter, 743 mSDsluCounter, 1138 mSDsCounter, 0 mSdLazyCounter, 977 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.8s Time, 0 mProtectedPredicate, 0 mProtectedAction, 743 SdHoareTripleChecker+Valid, 1423 SdHoareTripleChecker+Invalid, 979 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 977 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.0s IncrementalHoareTripleChecker+Time [2024-11-28 02:09:02,377 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [743 Valid, 1423 Invalid, 979 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 977 Invalid, 0 Unknown, 0 Unchecked, 1.0s Time] [2024-11-28 02:09:02,379 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 483 states. [2024-11-28 02:09:02,388 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 483 to 389. [2024-11-28 02:09:02,389 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 389 states, 388 states have (on average 1.4690721649484537) internal successors, (570), 388 states have internal predecessors, (570), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 02:09:02,391 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 389 states to 389 states and 570 transitions. [2024-11-28 02:09:02,392 INFO L78 Accepts]: Start accepts. Automaton has 389 states and 570 transitions. Word has length 80 [2024-11-28 02:09:02,392 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 02:09:02,392 INFO L471 AbstractCegarLoop]: Abstraction has 389 states and 570 transitions. [2024-11-28 02:09:02,393 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 11.428571428571429) internal successors, (80), 7 states have internal predecessors, (80), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 02:09:02,393 INFO L276 IsEmpty]: Start isEmpty. Operand 389 states and 570 transitions. [2024-11-28 02:09:02,393 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 82 [2024-11-28 02:09:02,394 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 02:09:02,394 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 02:09:02,394 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6 [2024-11-28 02:09:02,394 INFO L396 AbstractCegarLoop]: === Iteration 8 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 02:09:02,395 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 02:09:02,395 INFO L85 PathProgramCache]: Analyzing trace with hash -445892214, now seen corresponding path program 1 times [2024-11-28 02:09:02,395 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 02:09:02,395 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [610359379] [2024-11-28 02:09:02,395 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:09:02,395 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 02:09:02,455 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 02:09:02,889 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-28 02:09:02,889 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 02:09:02,889 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [610359379] [2024-11-28 02:09:02,889 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [610359379] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 02:09:02,889 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 02:09:02,889 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2024-11-28 02:09:02,890 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [18290507] [2024-11-28 02:09:02,890 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 02:09:02,890 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 9 states [2024-11-28 02:09:02,890 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 02:09:02,891 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2024-11-28 02:09:02,891 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=57, Unknown=0, NotChecked=0, Total=72 [2024-11-28 02:09:02,891 INFO L87 Difference]: Start difference. First operand 389 states and 570 transitions. Second operand has 9 states, 9 states have (on average 9.0) internal successors, (81), 9 states have internal predecessors, (81), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 02:09:04,394 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 02:09:04,394 INFO L93 Difference]: Finished difference Result 862 states and 1260 transitions. [2024-11-28 02:09:04,395 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2024-11-28 02:09:04,395 INFO L78 Accepts]: Start accepts. Automaton has has 9 states, 9 states have (on average 9.0) internal successors, (81), 9 states have internal predecessors, (81), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 81 [2024-11-28 02:09:04,395 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 02:09:04,399 INFO L225 Difference]: With dead ends: 862 [2024-11-28 02:09:04,399 INFO L226 Difference]: Without dead ends: 592 [2024-11-28 02:09:04,400 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=37, Invalid=119, Unknown=0, NotChecked=0, Total=156 [2024-11-28 02:09:04,401 INFO L435 NwaCegarLoop]: 281 mSDtfsCounter, 1065 mSDsluCounter, 1676 mSDsCounter, 0 mSdLazyCounter, 1403 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1065 SdHoareTripleChecker+Valid, 1957 SdHoareTripleChecker+Invalid, 1405 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 1403 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.4s IncrementalHoareTripleChecker+Time [2024-11-28 02:09:04,401 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1065 Valid, 1957 Invalid, 1405 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 1403 Invalid, 0 Unknown, 0 Unchecked, 1.4s Time] [2024-11-28 02:09:04,404 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 592 states. [2024-11-28 02:09:04,417 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 592 to 390. [2024-11-28 02:09:04,418 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 390 states, 389 states have (on average 1.4652956298200515) internal successors, (570), 389 states have internal predecessors, (570), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 02:09:04,420 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 390 states to 390 states and 570 transitions. [2024-11-28 02:09:04,421 INFO L78 Accepts]: Start accepts. Automaton has 390 states and 570 transitions. Word has length 81 [2024-11-28 02:09:04,422 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 02:09:04,422 INFO L471 AbstractCegarLoop]: Abstraction has 390 states and 570 transitions. [2024-11-28 02:09:04,422 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 9 states, 9 states have (on average 9.0) internal successors, (81), 9 states have internal predecessors, (81), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 02:09:04,423 INFO L276 IsEmpty]: Start isEmpty. Operand 390 states and 570 transitions. [2024-11-28 02:09:04,424 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 83 [2024-11-28 02:09:04,424 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 02:09:04,425 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 02:09:04,425 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7 [2024-11-28 02:09:04,425 INFO L396 AbstractCegarLoop]: === Iteration 9 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 02:09:04,425 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 02:09:04,426 INFO L85 PathProgramCache]: Analyzing trace with hash 475770383, now seen corresponding path program 1 times [2024-11-28 02:09:04,426 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 02:09:04,427 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [641072250] [2024-11-28 02:09:04,427 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:09:04,427 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 02:09:04,492 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 02:09:04,841 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-28 02:09:04,842 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 02:09:04,842 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [641072250] [2024-11-28 02:09:04,842 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [641072250] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 02:09:04,842 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 02:09:04,842 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2024-11-28 02:09:04,842 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [74157170] [2024-11-28 02:09:04,842 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 02:09:04,844 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2024-11-28 02:09:04,844 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 02:09:04,847 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-11-28 02:09:04,848 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2024-11-28 02:09:04,848 INFO L87 Difference]: Start difference. First operand 390 states and 570 transitions. Second operand has 7 states, 7 states have (on average 11.714285714285714) internal successors, (82), 7 states have internal predecessors, (82), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 02:09:05,062 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 02:09:05,062 INFO L93 Difference]: Finished difference Result 712 states and 1032 transitions. [2024-11-28 02:09:05,063 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2024-11-28 02:09:05,063 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 11.714285714285714) internal successors, (82), 7 states have internal predecessors, (82), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 82 [2024-11-28 02:09:05,064 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 02:09:05,065 INFO L225 Difference]: With dead ends: 712 [2024-11-28 02:09:05,065 INFO L226 Difference]: Without dead ends: 437 [2024-11-28 02:09:05,066 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=33, Invalid=77, Unknown=0, NotChecked=0, Total=110 [2024-11-28 02:09:05,066 INFO L435 NwaCegarLoop]: 464 mSDtfsCounter, 595 mSDsluCounter, 1852 mSDsCounter, 0 mSdLazyCounter, 84 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 595 SdHoareTripleChecker+Valid, 2316 SdHoareTripleChecker+Invalid, 85 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 84 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-28 02:09:05,071 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [595 Valid, 2316 Invalid, 85 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 84 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-28 02:09:05,072 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 437 states. [2024-11-28 02:09:05,080 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 437 to 391. [2024-11-28 02:09:05,081 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 391 states, 390 states have (on average 1.4615384615384615) internal successors, (570), 390 states have internal predecessors, (570), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 02:09:05,083 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 391 states to 391 states and 570 transitions. [2024-11-28 02:09:05,084 INFO L78 Accepts]: Start accepts. Automaton has 391 states and 570 transitions. Word has length 82 [2024-11-28 02:09:05,084 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 02:09:05,085 INFO L471 AbstractCegarLoop]: Abstraction has 391 states and 570 transitions. [2024-11-28 02:09:05,085 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 11.714285714285714) internal successors, (82), 7 states have internal predecessors, (82), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 02:09:05,085 INFO L276 IsEmpty]: Start isEmpty. Operand 391 states and 570 transitions. [2024-11-28 02:09:05,085 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 84 [2024-11-28 02:09:05,086 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 02:09:05,086 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 02:09:05,086 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8 [2024-11-28 02:09:05,086 INFO L396 AbstractCegarLoop]: === Iteration 10 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 02:09:05,087 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 02:09:05,088 INFO L85 PathProgramCache]: Analyzing trace with hash 1758230787, now seen corresponding path program 1 times [2024-11-28 02:09:05,088 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 02:09:05,088 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1900308983] [2024-11-28 02:09:05,088 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:09:05,088 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 02:09:05,153 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 02:09:05,419 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-28 02:09:05,419 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 02:09:05,420 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1900308983] [2024-11-28 02:09:05,420 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1900308983] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 02:09:05,420 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 02:09:05,420 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2024-11-28 02:09:05,420 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2071765405] [2024-11-28 02:09:05,420 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 02:09:05,420 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2024-11-28 02:09:05,420 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 02:09:05,421 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-11-28 02:09:05,421 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2024-11-28 02:09:05,421 INFO L87 Difference]: Start difference. First operand 391 states and 570 transitions. Second operand has 7 states, 7 states have (on average 11.857142857142858) internal successors, (83), 7 states have internal predecessors, (83), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 02:09:05,633 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 02:09:05,633 INFO L93 Difference]: Finished difference Result 746 states and 1080 transitions. [2024-11-28 02:09:05,634 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2024-11-28 02:09:05,634 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 11.857142857142858) internal successors, (83), 7 states have internal predecessors, (83), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 83 [2024-11-28 02:09:05,634 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 02:09:05,636 INFO L225 Difference]: With dead ends: 746 [2024-11-28 02:09:05,636 INFO L226 Difference]: Without dead ends: 466 [2024-11-28 02:09:05,636 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=33, Invalid=77, Unknown=0, NotChecked=0, Total=110 [2024-11-28 02:09:05,640 INFO L435 NwaCegarLoop]: 463 mSDtfsCounter, 677 mSDsluCounter, 1848 mSDsCounter, 0 mSdLazyCounter, 89 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 677 SdHoareTripleChecker+Valid, 2311 SdHoareTripleChecker+Invalid, 90 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 89 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-28 02:09:05,641 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [677 Valid, 2311 Invalid, 90 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 89 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-28 02:09:05,642 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 466 states. [2024-11-28 02:09:05,654 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 466 to 392. [2024-11-28 02:09:05,655 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 392 states, 391 states have (on average 1.4578005115089514) internal successors, (570), 391 states have internal predecessors, (570), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 02:09:05,657 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 392 states to 392 states and 570 transitions. [2024-11-28 02:09:05,657 INFO L78 Accepts]: Start accepts. Automaton has 392 states and 570 transitions. Word has length 83 [2024-11-28 02:09:05,657 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 02:09:05,658 INFO L471 AbstractCegarLoop]: Abstraction has 392 states and 570 transitions. [2024-11-28 02:09:05,658 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 11.857142857142858) internal successors, (83), 7 states have internal predecessors, (83), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 02:09:05,658 INFO L276 IsEmpty]: Start isEmpty. Operand 392 states and 570 transitions. [2024-11-28 02:09:05,660 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 85 [2024-11-28 02:09:05,660 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 02:09:05,660 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 02:09:05,660 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable9 [2024-11-28 02:09:05,661 INFO L396 AbstractCegarLoop]: === Iteration 11 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 02:09:05,661 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 02:09:05,661 INFO L85 PathProgramCache]: Analyzing trace with hash -1830862058, now seen corresponding path program 1 times [2024-11-28 02:09:05,662 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 02:09:05,662 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2031438550] [2024-11-28 02:09:05,662 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:09:05,662 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 02:09:05,767 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 02:09:06,042 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-28 02:09:06,042 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 02:09:06,042 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2031438550] [2024-11-28 02:09:06,043 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2031438550] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 02:09:06,043 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 02:09:06,043 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2024-11-28 02:09:06,043 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [613333953] [2024-11-28 02:09:06,043 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 02:09:06,043 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2024-11-28 02:09:06,044 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 02:09:06,044 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-11-28 02:09:06,044 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2024-11-28 02:09:06,045 INFO L87 Difference]: Start difference. First operand 392 states and 570 transitions. Second operand has 7 states, 7 states have (on average 12.0) internal successors, (84), 7 states have internal predecessors, (84), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 02:09:06,306 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 02:09:06,306 INFO L93 Difference]: Finished difference Result 884 states and 1284 transitions. [2024-11-28 02:09:06,307 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2024-11-28 02:09:06,307 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 12.0) internal successors, (84), 7 states have internal predecessors, (84), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 84 [2024-11-28 02:09:06,307 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 02:09:06,310 INFO L225 Difference]: With dead ends: 884 [2024-11-28 02:09:06,310 INFO L226 Difference]: Without dead ends: 599 [2024-11-28 02:09:06,311 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=33, Invalid=77, Unknown=0, NotChecked=0, Total=110 [2024-11-28 02:09:06,312 INFO L435 NwaCegarLoop]: 464 mSDtfsCounter, 1071 mSDsluCounter, 1852 mSDsCounter, 0 mSdLazyCounter, 84 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1071 SdHoareTripleChecker+Valid, 2316 SdHoareTripleChecker+Invalid, 85 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 84 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-11-28 02:09:06,312 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1071 Valid, 2316 Invalid, 85 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 84 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-11-28 02:09:06,313 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 599 states. [2024-11-28 02:09:06,323 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 599 to 393. [2024-11-28 02:09:06,324 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 393 states, 392 states have (on average 1.4540816326530612) internal successors, (570), 392 states have internal predecessors, (570), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 02:09:06,327 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 393 states to 393 states and 570 transitions. [2024-11-28 02:09:06,327 INFO L78 Accepts]: Start accepts. Automaton has 393 states and 570 transitions. Word has length 84 [2024-11-28 02:09:06,327 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 02:09:06,327 INFO L471 AbstractCegarLoop]: Abstraction has 393 states and 570 transitions. [2024-11-28 02:09:06,327 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 12.0) internal successors, (84), 7 states have internal predecessors, (84), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 02:09:06,328 INFO L276 IsEmpty]: Start isEmpty. Operand 393 states and 570 transitions. [2024-11-28 02:09:06,328 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 86 [2024-11-28 02:09:06,329 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 02:09:06,329 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 02:09:06,329 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable10 [2024-11-28 02:09:06,329 INFO L396 AbstractCegarLoop]: === Iteration 12 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 02:09:06,330 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 02:09:06,330 INFO L85 PathProgramCache]: Analyzing trace with hash 189080444, now seen corresponding path program 1 times [2024-11-28 02:09:06,330 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 02:09:06,330 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1224930528] [2024-11-28 02:09:06,330 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:09:06,330 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 02:09:06,383 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 02:09:06,578 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-28 02:09:06,579 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 02:09:06,579 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1224930528] [2024-11-28 02:09:06,579 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1224930528] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 02:09:06,579 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 02:09:06,579 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-28 02:09:06,579 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1347318723] [2024-11-28 02:09:06,579 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 02:09:06,580 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-28 02:09:06,580 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 02:09:06,580 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-28 02:09:06,580 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-11-28 02:09:06,581 INFO L87 Difference]: Start difference. First operand 393 states and 570 transitions. Second operand has 5 states, 5 states have (on average 17.0) internal successors, (85), 5 states have internal predecessors, (85), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 02:09:06,733 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 02:09:06,733 INFO L93 Difference]: Finished difference Result 851 states and 1238 transitions. [2024-11-28 02:09:06,734 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-11-28 02:09:06,735 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 17.0) internal successors, (85), 5 states have internal predecessors, (85), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 85 [2024-11-28 02:09:06,735 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 02:09:06,737 INFO L225 Difference]: With dead ends: 851 [2024-11-28 02:09:06,737 INFO L226 Difference]: Without dead ends: 566 [2024-11-28 02:09:06,739 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2024-11-28 02:09:06,739 INFO L435 NwaCegarLoop]: 468 mSDtfsCounter, 1014 mSDsluCounter, 933 mSDsCounter, 0 mSdLazyCounter, 39 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1014 SdHoareTripleChecker+Valid, 1401 SdHoareTripleChecker+Invalid, 39 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 39 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-28 02:09:06,740 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1014 Valid, 1401 Invalid, 39 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 39 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-28 02:09:06,741 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 566 states. [2024-11-28 02:09:06,751 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 566 to 380. [2024-11-28 02:09:06,752 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 380 states, 379 states have (on average 1.4564643799472297) internal successors, (552), 379 states have internal predecessors, (552), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 02:09:06,754 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 380 states to 380 states and 552 transitions. [2024-11-28 02:09:06,755 INFO L78 Accepts]: Start accepts. Automaton has 380 states and 552 transitions. Word has length 85 [2024-11-28 02:09:06,755 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 02:09:06,755 INFO L471 AbstractCegarLoop]: Abstraction has 380 states and 552 transitions. [2024-11-28 02:09:06,755 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 17.0) internal successors, (85), 5 states have internal predecessors, (85), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 02:09:06,755 INFO L276 IsEmpty]: Start isEmpty. Operand 380 states and 552 transitions. [2024-11-28 02:09:06,759 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 194 [2024-11-28 02:09:06,759 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 02:09:06,760 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 02:09:06,760 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable11 [2024-11-28 02:09:06,760 INFO L396 AbstractCegarLoop]: === Iteration 13 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 02:09:06,760 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 02:09:06,760 INFO L85 PathProgramCache]: Analyzing trace with hash -1615793101, now seen corresponding path program 1 times [2024-11-28 02:09:06,761 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 02:09:06,761 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [220209331] [2024-11-28 02:09:06,761 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:09:06,761 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 02:09:07,114 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 02:09:07,905 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 21 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-28 02:09:07,905 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 02:09:07,906 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [220209331] [2024-11-28 02:09:07,907 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [220209331] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-28 02:09:07,907 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [559678406] [2024-11-28 02:09:07,908 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:09:07,908 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-28 02:09:07,908 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_222ce6d4-5b40-4d76-abe1-0d226bb9524c/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 02:09:07,911 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_222ce6d4-5b40-4d76-abe1-0d226bb9524c/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-28 02:09:07,917 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_222ce6d4-5b40-4d76-abe1-0d226bb9524c/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2024-11-28 02:09:08,824 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 02:09:08,838 INFO L256 TraceCheckSpWp]: Trace formula consists of 1606 conjuncts, 8 conjuncts are in the unsatisfiable core [2024-11-28 02:09:08,854 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-28 02:09:09,545 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 25 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-28 02:09:09,545 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-11-28 02:09:09,546 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [559678406] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 02:09:09,546 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-11-28 02:09:09,546 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [5] total 7 [2024-11-28 02:09:09,546 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [247586544] [2024-11-28 02:09:09,546 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 02:09:09,547 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-28 02:09:09,547 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 02:09:09,548 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-28 02:09:09,548 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2024-11-28 02:09:09,548 INFO L87 Difference]: Start difference. First operand 380 states and 552 transitions. Second operand has 4 states, 4 states have (on average 48.25) internal successors, (193), 4 states have internal predecessors, (193), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 02:09:10,107 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 02:09:10,108 INFO L93 Difference]: Finished difference Result 643 states and 937 transitions. [2024-11-28 02:09:10,108 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-28 02:09:10,108 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 48.25) internal successors, (193), 4 states have internal predecessors, (193), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 193 [2024-11-28 02:09:10,109 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 02:09:10,110 INFO L225 Difference]: With dead ends: 643 [2024-11-28 02:09:10,111 INFO L226 Difference]: Without dead ends: 379 [2024-11-28 02:09:10,111 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 198 GetRequests, 192 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2024-11-28 02:09:10,114 INFO L435 NwaCegarLoop]: 295 mSDtfsCounter, 365 mSDsluCounter, 294 mSDsCounter, 0 mSdLazyCounter, 364 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 365 SdHoareTripleChecker+Valid, 589 SdHoareTripleChecker+Invalid, 365 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 364 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2024-11-28 02:09:10,114 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [365 Valid, 589 Invalid, 365 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 364 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2024-11-28 02:09:10,115 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 379 states. [2024-11-28 02:09:10,124 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 379 to 379. [2024-11-28 02:09:10,125 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 379 states, 378 states have (on average 1.4523809523809523) internal successors, (549), 378 states have internal predecessors, (549), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 02:09:10,127 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 379 states to 379 states and 549 transitions. [2024-11-28 02:09:10,127 INFO L78 Accepts]: Start accepts. Automaton has 379 states and 549 transitions. Word has length 193 [2024-11-28 02:09:10,128 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 02:09:10,128 INFO L471 AbstractCegarLoop]: Abstraction has 379 states and 549 transitions. [2024-11-28 02:09:10,128 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 48.25) internal successors, (193), 4 states have internal predecessors, (193), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 02:09:10,129 INFO L276 IsEmpty]: Start isEmpty. Operand 379 states and 549 transitions. [2024-11-28 02:09:10,131 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 195 [2024-11-28 02:09:10,131 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 02:09:10,132 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 02:09:10,150 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_222ce6d4-5b40-4d76-abe1-0d226bb9524c/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Ended with exit code 0 [2024-11-28 02:09:10,333 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable12,2 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_222ce6d4-5b40-4d76-abe1-0d226bb9524c/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-28 02:09:10,333 INFO L396 AbstractCegarLoop]: === Iteration 14 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 02:09:10,335 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 02:09:10,335 INFO L85 PathProgramCache]: Analyzing trace with hash -249123593, now seen corresponding path program 1 times [2024-11-28 02:09:10,335 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 02:09:10,335 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [670375478] [2024-11-28 02:09:10,335 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:09:10,335 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 02:09:12,090 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 02:09:12,973 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 25 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-28 02:09:12,973 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 02:09:12,973 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [670375478] [2024-11-28 02:09:12,974 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [670375478] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 02:09:12,974 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 02:09:12,974 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-11-28 02:09:12,974 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [962289273] [2024-11-28 02:09:12,974 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 02:09:12,976 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-11-28 02:09:12,976 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 02:09:12,977 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-11-28 02:09:12,977 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2024-11-28 02:09:12,977 INFO L87 Difference]: Start difference. First operand 379 states and 549 transitions. Second operand has 6 states, 6 states have (on average 32.333333333333336) internal successors, (194), 6 states have internal predecessors, (194), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 02:09:13,605 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 02:09:13,605 INFO L93 Difference]: Finished difference Result 767 states and 1112 transitions. [2024-11-28 02:09:13,605 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-28 02:09:13,606 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 32.333333333333336) internal successors, (194), 6 states have internal predecessors, (194), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 194 [2024-11-28 02:09:13,608 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 02:09:13,610 INFO L225 Difference]: With dead ends: 767 [2024-11-28 02:09:13,610 INFO L226 Difference]: Without dead ends: 496 [2024-11-28 02:09:13,611 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=25, Invalid=47, Unknown=0, NotChecked=0, Total=72 [2024-11-28 02:09:13,612 INFO L435 NwaCegarLoop]: 460 mSDtfsCounter, 772 mSDsluCounter, 1211 mSDsCounter, 0 mSdLazyCounter, 237 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 772 SdHoareTripleChecker+Valid, 1671 SdHoareTripleChecker+Invalid, 238 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 237 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2024-11-28 02:09:13,612 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [772 Valid, 1671 Invalid, 238 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 237 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2024-11-28 02:09:13,613 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 496 states. [2024-11-28 02:09:13,622 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 496 to 454. [2024-11-28 02:09:13,623 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 454 states, 453 states have (on average 1.4481236203090508) internal successors, (656), 453 states have internal predecessors, (656), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 02:09:13,626 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 454 states to 454 states and 656 transitions. [2024-11-28 02:09:13,626 INFO L78 Accepts]: Start accepts. Automaton has 454 states and 656 transitions. Word has length 194 [2024-11-28 02:09:13,627 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 02:09:13,627 INFO L471 AbstractCegarLoop]: Abstraction has 454 states and 656 transitions. [2024-11-28 02:09:13,627 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 32.333333333333336) internal successors, (194), 6 states have internal predecessors, (194), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 02:09:13,627 INFO L276 IsEmpty]: Start isEmpty. Operand 454 states and 656 transitions. [2024-11-28 02:09:13,629 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 196 [2024-11-28 02:09:13,630 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 02:09:13,630 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 02:09:13,630 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable13 [2024-11-28 02:09:13,630 INFO L396 AbstractCegarLoop]: === Iteration 15 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 02:09:13,631 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 02:09:13,631 INFO L85 PathProgramCache]: Analyzing trace with hash -703624184, now seen corresponding path program 1 times [2024-11-28 02:09:13,631 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 02:09:13,631 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1919129779] [2024-11-28 02:09:13,631 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:09:13,631 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 02:09:15,316 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 02:09:16,080 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 25 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-28 02:09:16,080 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 02:09:16,080 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1919129779] [2024-11-28 02:09:16,081 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1919129779] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 02:09:16,081 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 02:09:16,081 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-11-28 02:09:16,082 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2085300497] [2024-11-28 02:09:16,083 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 02:09:16,083 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-11-28 02:09:16,083 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 02:09:16,084 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-11-28 02:09:16,087 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2024-11-28 02:09:16,087 INFO L87 Difference]: Start difference. First operand 454 states and 656 transitions. Second operand has 6 states, 6 states have (on average 32.5) internal successors, (195), 6 states have internal predecessors, (195), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 02:09:16,713 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 02:09:16,713 INFO L93 Difference]: Finished difference Result 905 states and 1307 transitions. [2024-11-28 02:09:16,714 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-28 02:09:16,714 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 32.5) internal successors, (195), 6 states have internal predecessors, (195), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 195 [2024-11-28 02:09:16,714 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 02:09:16,718 INFO L225 Difference]: With dead ends: 905 [2024-11-28 02:09:16,718 INFO L226 Difference]: Without dead ends: 642 [2024-11-28 02:09:16,719 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=24, Invalid=48, Unknown=0, NotChecked=0, Total=72 [2024-11-28 02:09:16,721 INFO L435 NwaCegarLoop]: 510 mSDtfsCounter, 1108 mSDsluCounter, 913 mSDsCounter, 0 mSdLazyCounter, 323 mSolverCounterSat, 6 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1108 SdHoareTripleChecker+Valid, 1423 SdHoareTripleChecker+Invalid, 329 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 6 IncrementalHoareTripleChecker+Valid, 323 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2024-11-28 02:09:16,721 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1108 Valid, 1423 Invalid, 329 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [6 Valid, 323 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2024-11-28 02:09:16,722 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 642 states. [2024-11-28 02:09:16,735 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 642 to 561. [2024-11-28 02:09:16,737 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 561 states, 560 states have (on average 1.4535714285714285) internal successors, (814), 560 states have internal predecessors, (814), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 02:09:16,740 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 561 states to 561 states and 814 transitions. [2024-11-28 02:09:16,740 INFO L78 Accepts]: Start accepts. Automaton has 561 states and 814 transitions. Word has length 195 [2024-11-28 02:09:16,740 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 02:09:16,741 INFO L471 AbstractCegarLoop]: Abstraction has 561 states and 814 transitions. [2024-11-28 02:09:16,741 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 32.5) internal successors, (195), 6 states have internal predecessors, (195), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 02:09:16,741 INFO L276 IsEmpty]: Start isEmpty. Operand 561 states and 814 transitions. [2024-11-28 02:09:16,743 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 197 [2024-11-28 02:09:16,743 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 02:09:16,744 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 02:09:16,744 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable14 [2024-11-28 02:09:16,744 INFO L396 AbstractCegarLoop]: === Iteration 16 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 02:09:16,745 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 02:09:16,745 INFO L85 PathProgramCache]: Analyzing trace with hash -916183446, now seen corresponding path program 1 times [2024-11-28 02:09:16,745 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 02:09:16,745 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [409602588] [2024-11-28 02:09:16,745 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:09:16,745 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 02:09:17,686 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 02:09:19,506 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 21 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-28 02:09:19,506 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 02:09:19,506 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [409602588] [2024-11-28 02:09:19,506 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [409602588] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-28 02:09:19,506 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2081656548] [2024-11-28 02:09:19,507 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:09:19,507 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-28 02:09:19,507 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_222ce6d4-5b40-4d76-abe1-0d226bb9524c/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 02:09:19,509 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_222ce6d4-5b40-4d76-abe1-0d226bb9524c/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-28 02:09:19,513 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_222ce6d4-5b40-4d76-abe1-0d226bb9524c/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2024-11-28 02:09:20,752 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 02:09:20,764 INFO L256 TraceCheckSpWp]: Trace formula consists of 1615 conjuncts, 36 conjuncts are in the unsatisfiable core [2024-11-28 02:09:20,782 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-28 02:09:22,041 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 25 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-28 02:09:22,042 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-11-28 02:09:22,042 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2081656548] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 02:09:22,042 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-11-28 02:09:22,042 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [9] total 12 [2024-11-28 02:09:22,042 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [431944740] [2024-11-28 02:09:22,042 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 02:09:22,043 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-28 02:09:22,043 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 02:09:22,043 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-28 02:09:22,044 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=108, Unknown=0, NotChecked=0, Total=132 [2024-11-28 02:09:22,044 INFO L87 Difference]: Start difference. First operand 561 states and 814 transitions. Second operand has 5 states, 5 states have (on average 39.2) internal successors, (196), 5 states have internal predecessors, (196), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 02:09:22,823 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 02:09:22,823 INFO L93 Difference]: Finished difference Result 929 states and 1352 transitions. [2024-11-28 02:09:22,823 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-11-28 02:09:22,824 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 39.2) internal successors, (196), 5 states have internal predecessors, (196), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 196 [2024-11-28 02:09:22,824 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 02:09:22,826 INFO L225 Difference]: With dead ends: 929 [2024-11-28 02:09:22,827 INFO L226 Difference]: Without dead ends: 561 [2024-11-28 02:09:22,827 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 207 GetRequests, 195 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 18 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=36, Invalid=146, Unknown=0, NotChecked=0, Total=182 [2024-11-28 02:09:22,828 INFO L435 NwaCegarLoop]: 282 mSDtfsCounter, 745 mSDsluCounter, 561 mSDsCounter, 0 mSdLazyCounter, 588 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 745 SdHoareTripleChecker+Valid, 843 SdHoareTripleChecker+Invalid, 588 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 588 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.7s IncrementalHoareTripleChecker+Time [2024-11-28 02:09:22,829 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [745 Valid, 843 Invalid, 588 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 588 Invalid, 0 Unknown, 0 Unchecked, 0.7s Time] [2024-11-28 02:09:22,830 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 561 states. [2024-11-28 02:09:22,843 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 561 to 561. [2024-11-28 02:09:22,844 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 561 states, 560 states have (on average 1.4517857142857142) internal successors, (813), 560 states have internal predecessors, (813), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 02:09:22,847 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 561 states to 561 states and 813 transitions. [2024-11-28 02:09:22,847 INFO L78 Accepts]: Start accepts. Automaton has 561 states and 813 transitions. Word has length 196 [2024-11-28 02:09:22,847 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 02:09:22,848 INFO L471 AbstractCegarLoop]: Abstraction has 561 states and 813 transitions. [2024-11-28 02:09:22,848 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 39.2) internal successors, (196), 5 states have internal predecessors, (196), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 02:09:22,848 INFO L276 IsEmpty]: Start isEmpty. Operand 561 states and 813 transitions. [2024-11-28 02:09:22,850 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 198 [2024-11-28 02:09:22,851 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 02:09:22,851 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 02:09:22,867 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_222ce6d4-5b40-4d76-abe1-0d226bb9524c/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Ended with exit code 0 [2024-11-28 02:09:23,055 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_222ce6d4-5b40-4d76-abe1-0d226bb9524c/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable15 [2024-11-28 02:09:23,056 INFO L396 AbstractCegarLoop]: === Iteration 17 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 02:09:23,056 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 02:09:23,057 INFO L85 PathProgramCache]: Analyzing trace with hash 1663482110, now seen corresponding path program 1 times [2024-11-28 02:09:23,057 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 02:09:23,057 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1197752510] [2024-11-28 02:09:23,057 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:09:23,057 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 02:09:23,980 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 02:09:25,654 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 21 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-28 02:09:25,654 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 02:09:25,655 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1197752510] [2024-11-28 02:09:25,655 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1197752510] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-28 02:09:25,655 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [561691826] [2024-11-28 02:09:25,655 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:09:25,655 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-28 02:09:25,655 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_222ce6d4-5b40-4d76-abe1-0d226bb9524c/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 02:09:25,659 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_222ce6d4-5b40-4d76-abe1-0d226bb9524c/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-28 02:09:25,661 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_222ce6d4-5b40-4d76-abe1-0d226bb9524c/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2024-11-28 02:09:26,834 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 02:09:26,845 INFO L256 TraceCheckSpWp]: Trace formula consists of 1616 conjuncts, 20 conjuncts are in the unsatisfiable core [2024-11-28 02:09:26,854 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-28 02:09:27,821 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 25 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-28 02:09:27,821 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-11-28 02:09:27,821 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [561691826] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 02:09:27,821 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-11-28 02:09:27,821 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [9] total 13 [2024-11-28 02:09:27,822 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [235963506] [2024-11-28 02:09:27,822 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 02:09:27,822 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-11-28 02:09:27,823 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 02:09:27,824 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-11-28 02:09:27,825 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=27, Invalid=129, Unknown=0, NotChecked=0, Total=156 [2024-11-28 02:09:27,825 INFO L87 Difference]: Start difference. First operand 561 states and 813 transitions. Second operand has 6 states, 6 states have (on average 32.833333333333336) internal successors, (197), 6 states have internal predecessors, (197), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 02:09:28,690 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 02:09:28,691 INFO L93 Difference]: Finished difference Result 826 states and 1199 transitions. [2024-11-28 02:09:28,691 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-11-28 02:09:28,692 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 32.833333333333336) internal successors, (197), 6 states have internal predecessors, (197), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 197 [2024-11-28 02:09:28,692 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 02:09:28,694 INFO L225 Difference]: With dead ends: 826 [2024-11-28 02:09:28,695 INFO L226 Difference]: Without dead ends: 563 [2024-11-28 02:09:28,695 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 208 GetRequests, 195 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 23 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=38, Invalid=172, Unknown=0, NotChecked=0, Total=210 [2024-11-28 02:09:28,696 INFO L435 NwaCegarLoop]: 284 mSDtfsCounter, 964 mSDsluCounter, 850 mSDsCounter, 0 mSdLazyCounter, 773 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.7s Time, 0 mProtectedPredicate, 0 mProtectedAction, 964 SdHoareTripleChecker+Valid, 1134 SdHoareTripleChecker+Invalid, 773 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 773 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.8s IncrementalHoareTripleChecker+Time [2024-11-28 02:09:28,697 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [964 Valid, 1134 Invalid, 773 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 773 Invalid, 0 Unknown, 0 Unchecked, 0.8s Time] [2024-11-28 02:09:28,699 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 563 states. [2024-11-28 02:09:28,710 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 563 to 562. [2024-11-28 02:09:28,711 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 562 states, 561 states have (on average 1.4509803921568627) internal successors, (814), 561 states have internal predecessors, (814), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 02:09:28,714 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 562 states to 562 states and 814 transitions. [2024-11-28 02:09:28,714 INFO L78 Accepts]: Start accepts. Automaton has 562 states and 814 transitions. Word has length 197 [2024-11-28 02:09:28,715 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 02:09:28,715 INFO L471 AbstractCegarLoop]: Abstraction has 562 states and 814 transitions. [2024-11-28 02:09:28,715 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 32.833333333333336) internal successors, (197), 6 states have internal predecessors, (197), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 02:09:28,716 INFO L276 IsEmpty]: Start isEmpty. Operand 562 states and 814 transitions. [2024-11-28 02:09:28,718 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 199 [2024-11-28 02:09:28,719 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 02:09:28,719 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 02:09:28,737 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_222ce6d4-5b40-4d76-abe1-0d226bb9524c/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Forceful destruction successful, exit code 0 [2024-11-28 02:09:28,923 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 4 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_222ce6d4-5b40-4d76-abe1-0d226bb9524c/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable16 [2024-11-28 02:09:28,923 INFO L396 AbstractCegarLoop]: === Iteration 18 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 02:09:28,924 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 02:09:28,925 INFO L85 PathProgramCache]: Analyzing trace with hash 502067447, now seen corresponding path program 1 times [2024-11-28 02:09:28,925 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 02:09:28,925 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [368757215] [2024-11-28 02:09:28,925 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:09:28,925 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 02:09:29,841 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 02:09:31,612 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 21 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-28 02:09:31,613 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 02:09:31,613 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [368757215] [2024-11-28 02:09:31,613 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [368757215] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-28 02:09:31,613 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [354264725] [2024-11-28 02:09:31,613 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:09:31,613 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-28 02:09:31,613 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_222ce6d4-5b40-4d76-abe1-0d226bb9524c/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 02:09:31,618 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_222ce6d4-5b40-4d76-abe1-0d226bb9524c/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-28 02:09:31,620 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_222ce6d4-5b40-4d76-abe1-0d226bb9524c/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2024-11-28 02:09:33,118 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 02:09:33,127 INFO L256 TraceCheckSpWp]: Trace formula consists of 1617 conjuncts, 58 conjuncts are in the unsatisfiable core [2024-11-28 02:09:33,139 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-28 02:09:34,122 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 25 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-28 02:09:34,124 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-11-28 02:09:34,125 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [354264725] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 02:09:34,125 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-11-28 02:09:34,125 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [9] total 12 [2024-11-28 02:09:34,125 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [653665464] [2024-11-28 02:09:34,125 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 02:09:34,126 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-28 02:09:34,126 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 02:09:34,126 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-28 02:09:34,126 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=108, Unknown=0, NotChecked=0, Total=132 [2024-11-28 02:09:34,127 INFO L87 Difference]: Start difference. First operand 562 states and 814 transitions. Second operand has 5 states, 5 states have (on average 39.6) internal successors, (198), 5 states have internal predecessors, (198), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 02:09:34,890 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 02:09:34,890 INFO L93 Difference]: Finished difference Result 979 states and 1423 transitions. [2024-11-28 02:09:34,891 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-11-28 02:09:34,891 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 39.6) internal successors, (198), 5 states have internal predecessors, (198), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 198 [2024-11-28 02:09:34,892 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 02:09:34,894 INFO L225 Difference]: With dead ends: 979 [2024-11-28 02:09:34,894 INFO L226 Difference]: Without dead ends: 562 [2024-11-28 02:09:34,895 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 209 GetRequests, 197 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 18 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=36, Invalid=146, Unknown=0, NotChecked=0, Total=182 [2024-11-28 02:09:34,896 INFO L435 NwaCegarLoop]: 284 mSDtfsCounter, 730 mSDsluCounter, 568 mSDsCounter, 0 mSdLazyCounter, 579 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 730 SdHoareTripleChecker+Valid, 852 SdHoareTripleChecker+Invalid, 580 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 579 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.7s IncrementalHoareTripleChecker+Time [2024-11-28 02:09:34,896 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [730 Valid, 852 Invalid, 580 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 579 Invalid, 0 Unknown, 0 Unchecked, 0.7s Time] [2024-11-28 02:09:34,897 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 562 states. [2024-11-28 02:09:34,909 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 562 to 562. [2024-11-28 02:09:34,910 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 562 states, 561 states have (on average 1.447415329768271) internal successors, (812), 561 states have internal predecessors, (812), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 02:09:34,913 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 562 states to 562 states and 812 transitions. [2024-11-28 02:09:34,913 INFO L78 Accepts]: Start accepts. Automaton has 562 states and 812 transitions. Word has length 198 [2024-11-28 02:09:34,913 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 02:09:34,913 INFO L471 AbstractCegarLoop]: Abstraction has 562 states and 812 transitions. [2024-11-28 02:09:34,914 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 39.6) internal successors, (198), 5 states have internal predecessors, (198), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 02:09:34,914 INFO L276 IsEmpty]: Start isEmpty. Operand 562 states and 812 transitions. [2024-11-28 02:09:34,916 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 201 [2024-11-28 02:09:34,916 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 02:09:34,917 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 02:09:34,932 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_222ce6d4-5b40-4d76-abe1-0d226bb9524c/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Forceful destruction successful, exit code 0 [2024-11-28 02:09:35,117 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 5 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_222ce6d4-5b40-4d76-abe1-0d226bb9524c/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable17 [2024-11-28 02:09:35,117 INFO L396 AbstractCegarLoop]: === Iteration 19 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 02:09:35,120 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 02:09:35,120 INFO L85 PathProgramCache]: Analyzing trace with hash 261097460, now seen corresponding path program 1 times [2024-11-28 02:09:35,120 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 02:09:35,121 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1130742543] [2024-11-28 02:09:35,121 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:09:35,121 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 02:09:36,060 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 02:09:37,607 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 21 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-28 02:09:37,607 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 02:09:37,607 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1130742543] [2024-11-28 02:09:37,607 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1130742543] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-28 02:09:37,607 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1660601640] [2024-11-28 02:09:37,607 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:09:37,607 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-28 02:09:37,607 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_222ce6d4-5b40-4d76-abe1-0d226bb9524c/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 02:09:37,613 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_222ce6d4-5b40-4d76-abe1-0d226bb9524c/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-28 02:09:37,616 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_222ce6d4-5b40-4d76-abe1-0d226bb9524c/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2024-11-28 02:09:38,763 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 02:09:38,771 INFO L256 TraceCheckSpWp]: Trace formula consists of 1621 conjuncts, 35 conjuncts are in the unsatisfiable core [2024-11-28 02:09:38,781 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-28 02:09:39,746 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 21 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-28 02:09:39,746 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-28 02:09:41,376 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 19 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-28 02:09:41,377 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1660601640] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-28 02:09:41,377 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-28 02:09:41,377 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 10] total 24 [2024-11-28 02:09:41,378 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [447803515] [2024-11-28 02:09:41,378 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-28 02:09:41,379 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 24 states [2024-11-28 02:09:41,379 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 02:09:41,380 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2024-11-28 02:09:41,381 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=79, Invalid=473, Unknown=0, NotChecked=0, Total=552 [2024-11-28 02:09:41,381 INFO L87 Difference]: Start difference. First operand 562 states and 812 transitions. Second operand has 24 states, 24 states have (on average 23.041666666666668) internal successors, (553), 24 states have internal predecessors, (553), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 02:09:43,847 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 02:09:43,848 INFO L93 Difference]: Finished difference Result 1028 states and 1481 transitions. [2024-11-28 02:09:43,848 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2024-11-28 02:09:43,848 INFO L78 Accepts]: Start accepts. Automaton has has 24 states, 24 states have (on average 23.041666666666668) internal successors, (553), 24 states have internal predecessors, (553), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 200 [2024-11-28 02:09:43,849 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 02:09:43,852 INFO L225 Difference]: With dead ends: 1028 [2024-11-28 02:09:43,852 INFO L226 Difference]: Without dead ends: 765 [2024-11-28 02:09:43,854 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 426 GetRequests, 386 SyntacticMatches, 0 SemanticMatches, 40 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 354 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=329, Invalid=1393, Unknown=0, NotChecked=0, Total=1722 [2024-11-28 02:09:43,856 INFO L435 NwaCegarLoop]: 282 mSDtfsCounter, 3722 mSDsluCounter, 3498 mSDsCounter, 0 mSdLazyCounter, 2553 mSolverCounterSat, 5 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.7s Time, 0 mProtectedPredicate, 0 mProtectedAction, 3722 SdHoareTripleChecker+Valid, 3780 SdHoareTripleChecker+Invalid, 2558 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 5 IncrementalHoareTripleChecker+Valid, 2553 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 2.1s IncrementalHoareTripleChecker+Time [2024-11-28 02:09:43,856 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [3722 Valid, 3780 Invalid, 2558 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [5 Valid, 2553 Invalid, 0 Unknown, 0 Unchecked, 2.1s Time] [2024-11-28 02:09:43,857 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 765 states. [2024-11-28 02:09:43,871 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 765 to 570. [2024-11-28 02:09:43,872 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 570 states, 569 states have (on average 1.444639718804921) internal successors, (822), 569 states have internal predecessors, (822), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 02:09:43,875 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 570 states to 570 states and 822 transitions. [2024-11-28 02:09:43,876 INFO L78 Accepts]: Start accepts. Automaton has 570 states and 822 transitions. Word has length 200 [2024-11-28 02:09:43,876 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 02:09:43,877 INFO L471 AbstractCegarLoop]: Abstraction has 570 states and 822 transitions. [2024-11-28 02:09:43,877 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 24 states, 24 states have (on average 23.041666666666668) internal successors, (553), 24 states have internal predecessors, (553), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 02:09:43,877 INFO L276 IsEmpty]: Start isEmpty. Operand 570 states and 822 transitions. [2024-11-28 02:09:43,879 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 202 [2024-11-28 02:09:43,880 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 02:09:43,881 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 02:09:43,898 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_222ce6d4-5b40-4d76-abe1-0d226bb9524c/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Ended with exit code 0 [2024-11-28 02:09:44,081 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable18,6 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_222ce6d4-5b40-4d76-abe1-0d226bb9524c/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-28 02:09:44,081 INFO L396 AbstractCegarLoop]: === Iteration 20 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 02:09:44,082 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 02:09:44,082 INFO L85 PathProgramCache]: Analyzing trace with hash 1168269655, now seen corresponding path program 1 times [2024-11-28 02:09:44,082 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 02:09:44,082 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [101707814] [2024-11-28 02:09:44,082 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:09:44,083 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 02:09:45,568 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 02:09:47,701 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 5 proven. 16 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-11-28 02:09:47,701 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 02:09:47,701 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [101707814] [2024-11-28 02:09:47,701 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [101707814] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-28 02:09:47,701 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1749135026] [2024-11-28 02:09:47,702 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:09:47,702 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-28 02:09:47,702 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_222ce6d4-5b40-4d76-abe1-0d226bb9524c/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 02:09:47,704 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_222ce6d4-5b40-4d76-abe1-0d226bb9524c/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-28 02:09:47,707 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_222ce6d4-5b40-4d76-abe1-0d226bb9524c/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2024-11-28 02:09:49,350 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 02:09:49,358 INFO L256 TraceCheckSpWp]: Trace formula consists of 1622 conjuncts, 89 conjuncts are in the unsatisfiable core [2024-11-28 02:09:49,370 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-28 02:09:51,250 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 25 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-28 02:09:51,250 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-11-28 02:09:51,251 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1749135026] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 02:09:51,251 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-11-28 02:09:51,251 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [13] imperfect sequences [8] total 19 [2024-11-28 02:09:51,251 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [293563800] [2024-11-28 02:09:51,251 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 02:09:51,252 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 13 states [2024-11-28 02:09:51,252 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 02:09:51,252 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2024-11-28 02:09:51,253 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=46, Invalid=296, Unknown=0, NotChecked=0, Total=342 [2024-11-28 02:09:51,253 INFO L87 Difference]: Start difference. First operand 570 states and 822 transitions. Second operand has 13 states, 13 states have (on average 15.461538461538462) internal successors, (201), 13 states have internal predecessors, (201), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 02:09:52,990 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 02:09:52,990 INFO L93 Difference]: Finished difference Result 1472 states and 2127 transitions. [2024-11-28 02:09:52,991 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2024-11-28 02:09:52,991 INFO L78 Accepts]: Start accepts. Automaton has has 13 states, 13 states have (on average 15.461538461538462) internal successors, (201), 13 states have internal predecessors, (201), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 201 [2024-11-28 02:09:52,991 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 02:09:52,995 INFO L225 Difference]: With dead ends: 1472 [2024-11-28 02:09:52,995 INFO L226 Difference]: Without dead ends: 1120 [2024-11-28 02:09:52,996 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 214 GetRequests, 191 SyntacticMatches, 1 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 63 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=81, Invalid=471, Unknown=0, NotChecked=0, Total=552 [2024-11-28 02:09:52,996 INFO L435 NwaCegarLoop]: 253 mSDtfsCounter, 1001 mSDsluCounter, 2313 mSDsCounter, 0 mSdLazyCounter, 2180 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1001 SdHoareTripleChecker+Valid, 2566 SdHoareTripleChecker+Invalid, 2182 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 2180 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.5s IncrementalHoareTripleChecker+Time [2024-11-28 02:09:52,997 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1001 Valid, 2566 Invalid, 2182 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 2180 Invalid, 0 Unknown, 0 Unchecked, 1.5s Time] [2024-11-28 02:09:52,999 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1120 states. [2024-11-28 02:09:53,021 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1120 to 864. [2024-11-28 02:09:53,023 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 864 states, 863 states have (on average 1.4264194669756662) internal successors, (1231), 863 states have internal predecessors, (1231), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 02:09:53,026 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 864 states to 864 states and 1231 transitions. [2024-11-28 02:09:53,026 INFO L78 Accepts]: Start accepts. Automaton has 864 states and 1231 transitions. Word has length 201 [2024-11-28 02:09:53,026 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 02:09:53,027 INFO L471 AbstractCegarLoop]: Abstraction has 864 states and 1231 transitions. [2024-11-28 02:09:53,027 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 13 states, 13 states have (on average 15.461538461538462) internal successors, (201), 13 states have internal predecessors, (201), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 02:09:53,027 INFO L276 IsEmpty]: Start isEmpty. Operand 864 states and 1231 transitions. [2024-11-28 02:09:53,030 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 203 [2024-11-28 02:09:53,030 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 02:09:53,030 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 02:09:53,046 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_222ce6d4-5b40-4d76-abe1-0d226bb9524c/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Forceful destruction successful, exit code 0 [2024-11-28 02:09:53,231 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable19,7 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_222ce6d4-5b40-4d76-abe1-0d226bb9524c/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-28 02:09:53,231 INFO L396 AbstractCegarLoop]: === Iteration 21 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 02:09:53,231 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 02:09:53,232 INFO L85 PathProgramCache]: Analyzing trace with hash 2050425004, now seen corresponding path program 1 times [2024-11-28 02:09:53,232 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 02:09:53,232 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1393120799] [2024-11-28 02:09:53,232 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:09:53,232 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 02:09:54,692 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 02:09:56,631 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 5 proven. 16 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-11-28 02:09:56,631 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 02:09:56,631 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1393120799] [2024-11-28 02:09:56,631 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1393120799] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-28 02:09:56,632 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1062434658] [2024-11-28 02:09:56,632 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:09:56,632 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-28 02:09:56,632 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_222ce6d4-5b40-4d76-abe1-0d226bb9524c/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 02:09:56,634 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_222ce6d4-5b40-4d76-abe1-0d226bb9524c/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-28 02:09:56,639 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_222ce6d4-5b40-4d76-abe1-0d226bb9524c/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2024-11-28 02:09:57,946 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 02:09:57,954 INFO L256 TraceCheckSpWp]: Trace formula consists of 1625 conjuncts, 60 conjuncts are in the unsatisfiable core [2024-11-28 02:09:57,961 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-28 02:09:59,202 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 25 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-28 02:09:59,203 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-11-28 02:09:59,203 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1062434658] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 02:09:59,203 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-11-28 02:09:59,203 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [9] total 13 [2024-11-28 02:09:59,203 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1774856556] [2024-11-28 02:09:59,203 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 02:09:59,204 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-11-28 02:09:59,204 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 02:09:59,204 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-11-28 02:09:59,204 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=27, Invalid=129, Unknown=0, NotChecked=0, Total=156 [2024-11-28 02:09:59,204 INFO L87 Difference]: Start difference. First operand 864 states and 1231 transitions. Second operand has 6 states, 6 states have (on average 33.666666666666664) internal successors, (202), 6 states have internal predecessors, (202), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 02:09:59,742 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 02:09:59,742 INFO L93 Difference]: Finished difference Result 1412 states and 2023 transitions. [2024-11-28 02:09:59,742 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-28 02:09:59,742 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 33.666666666666664) internal successors, (202), 6 states have internal predecessors, (202), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 202 [2024-11-28 02:09:59,743 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 02:09:59,745 INFO L225 Difference]: With dead ends: 1412 [2024-11-28 02:09:59,746 INFO L226 Difference]: Without dead ends: 876 [2024-11-28 02:09:59,747 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 212 GetRequests, 199 SyntacticMatches, 1 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 18 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=31, Invalid=151, Unknown=0, NotChecked=0, Total=182 [2024-11-28 02:09:59,748 INFO L435 NwaCegarLoop]: 288 mSDtfsCounter, 359 mSDsluCounter, 858 mSDsCounter, 0 mSdLazyCounter, 761 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 359 SdHoareTripleChecker+Valid, 1146 SdHoareTripleChecker+Invalid, 762 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 761 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2024-11-28 02:09:59,748 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [359 Valid, 1146 Invalid, 762 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 761 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2024-11-28 02:09:59,750 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 876 states. [2024-11-28 02:09:59,766 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 876 to 870. [2024-11-28 02:09:59,768 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 870 states, 869 states have (on average 1.4234752589182968) internal successors, (1237), 869 states have internal predecessors, (1237), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 02:09:59,770 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 870 states to 870 states and 1237 transitions. [2024-11-28 02:09:59,770 INFO L78 Accepts]: Start accepts. Automaton has 870 states and 1237 transitions. Word has length 202 [2024-11-28 02:09:59,771 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 02:09:59,771 INFO L471 AbstractCegarLoop]: Abstraction has 870 states and 1237 transitions. [2024-11-28 02:09:59,771 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 33.666666666666664) internal successors, (202), 6 states have internal predecessors, (202), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 02:09:59,771 INFO L276 IsEmpty]: Start isEmpty. Operand 870 states and 1237 transitions. [2024-11-28 02:09:59,774 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 204 [2024-11-28 02:09:59,774 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 02:09:59,774 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 02:09:59,791 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_222ce6d4-5b40-4d76-abe1-0d226bb9524c/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Forceful destruction successful, exit code 0 [2024-11-28 02:09:59,975 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 8 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_222ce6d4-5b40-4d76-abe1-0d226bb9524c/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable20 [2024-11-28 02:09:59,975 INFO L396 AbstractCegarLoop]: === Iteration 22 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 02:09:59,976 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 02:09:59,976 INFO L85 PathProgramCache]: Analyzing trace with hash 1056325076, now seen corresponding path program 1 times [2024-11-28 02:09:59,976 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 02:09:59,976 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [140428265] [2024-11-28 02:09:59,976 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:09:59,977 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 02:10:01,139 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 02:10:03,306 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 5 proven. 16 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-11-28 02:10:03,306 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 02:10:03,306 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [140428265] [2024-11-28 02:10:03,307 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [140428265] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-28 02:10:03,307 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1769989050] [2024-11-28 02:10:03,307 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:10:03,307 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-28 02:10:03,307 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_222ce6d4-5b40-4d76-abe1-0d226bb9524c/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 02:10:03,309 INFO L229 MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_222ce6d4-5b40-4d76-abe1-0d226bb9524c/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-28 02:10:03,313 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_222ce6d4-5b40-4d76-abe1-0d226bb9524c/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2024-11-28 02:10:04,981 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 02:10:04,991 INFO L256 TraceCheckSpWp]: Trace formula consists of 1626 conjuncts, 58 conjuncts are in the unsatisfiable core [2024-11-28 02:10:04,999 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-28 02:10:06,296 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 9 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-28 02:10:06,296 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-28 02:10:08,399 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 9 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-28 02:10:08,400 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1769989050] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-28 02:10:08,400 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-28 02:10:08,400 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 15, 15] total 34 [2024-11-28 02:10:08,400 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1820230869] [2024-11-28 02:10:08,400 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-28 02:10:08,401 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 34 states [2024-11-28 02:10:08,401 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 02:10:08,401 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 34 interpolants. [2024-11-28 02:10:08,401 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=141, Invalid=981, Unknown=0, NotChecked=0, Total=1122 [2024-11-28 02:10:08,402 INFO L87 Difference]: Start difference. First operand 870 states and 1237 transitions. Second operand has 34 states, 34 states have (on average 17.205882352941178) internal successors, (585), 34 states have internal predecessors, (585), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 02:10:12,389 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 02:10:12,389 INFO L93 Difference]: Finished difference Result 2073 states and 2977 transitions. [2024-11-28 02:10:12,389 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 47 states. [2024-11-28 02:10:12,389 INFO L78 Accepts]: Start accepts. Automaton has has 34 states, 34 states have (on average 17.205882352941178) internal successors, (585), 34 states have internal predecessors, (585), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 203 [2024-11-28 02:10:12,390 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 02:10:12,394 INFO L225 Difference]: With dead ends: 2073 [2024-11-28 02:10:12,395 INFO L226 Difference]: Without dead ends: 1632 [2024-11-28 02:10:12,397 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 459 GetRequests, 381 SyntacticMatches, 1 SemanticMatches, 77 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1294 ImplicationChecksByTransitivity, 2.2s TimeCoverageRelationStatistics Valid=857, Invalid=5305, Unknown=0, NotChecked=0, Total=6162 [2024-11-28 02:10:12,399 INFO L435 NwaCegarLoop]: 273 mSDtfsCounter, 4158 mSDsluCounter, 4303 mSDsCounter, 0 mSdLazyCounter, 3582 mSolverCounterSat, 19 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 2.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 4158 SdHoareTripleChecker+Valid, 4576 SdHoareTripleChecker+Invalid, 3601 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 19 IncrementalHoareTripleChecker+Valid, 3582 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 2.4s IncrementalHoareTripleChecker+Time [2024-11-28 02:10:12,399 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [4158 Valid, 4576 Invalid, 3601 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [19 Valid, 3582 Invalid, 0 Unknown, 0 Unchecked, 2.4s Time] [2024-11-28 02:10:12,402 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1632 states. [2024-11-28 02:10:12,429 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1632 to 1432. [2024-11-28 02:10:12,431 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1432 states, 1431 states have (on average 1.4283717679944095) internal successors, (2044), 1431 states have internal predecessors, (2044), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 02:10:12,435 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1432 states to 1432 states and 2044 transitions. [2024-11-28 02:10:12,435 INFO L78 Accepts]: Start accepts. Automaton has 1432 states and 2044 transitions. Word has length 203 [2024-11-28 02:10:12,436 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 02:10:12,436 INFO L471 AbstractCegarLoop]: Abstraction has 1432 states and 2044 transitions. [2024-11-28 02:10:12,437 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 34 states, 34 states have (on average 17.205882352941178) internal successors, (585), 34 states have internal predecessors, (585), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 02:10:12,437 INFO L276 IsEmpty]: Start isEmpty. Operand 1432 states and 2044 transitions. [2024-11-28 02:10:12,440 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 205 [2024-11-28 02:10:12,441 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 02:10:12,441 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 02:10:12,458 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_222ce6d4-5b40-4d76-abe1-0d226bb9524c/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Forceful destruction successful, exit code 0 [2024-11-28 02:10:12,641 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 9 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_222ce6d4-5b40-4d76-abe1-0d226bb9524c/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable21 [2024-11-28 02:10:12,642 INFO L396 AbstractCegarLoop]: === Iteration 23 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 02:10:12,642 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 02:10:12,642 INFO L85 PathProgramCache]: Analyzing trace with hash 372064347, now seen corresponding path program 1 times [2024-11-28 02:10:12,642 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 02:10:12,642 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1908253683] [2024-11-28 02:10:12,642 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:10:12,642 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 02:10:13,356 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 02:10:14,368 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 25 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-28 02:10:14,368 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 02:10:14,369 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1908253683] [2024-11-28 02:10:14,369 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1908253683] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 02:10:14,369 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 02:10:14,369 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2024-11-28 02:10:14,369 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [964978664] [2024-11-28 02:10:14,369 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 02:10:14,369 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2024-11-28 02:10:14,369 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 02:10:14,370 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2024-11-28 02:10:14,370 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=35, Unknown=0, NotChecked=0, Total=56 [2024-11-28 02:10:14,370 INFO L87 Difference]: Start difference. First operand 1432 states and 2044 transitions. Second operand has 8 states, 8 states have (on average 25.5) internal successors, (204), 8 states have internal predecessors, (204), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 02:10:15,327 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 02:10:15,328 INFO L93 Difference]: Finished difference Result 2652 states and 3799 transitions. [2024-11-28 02:10:15,328 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2024-11-28 02:10:15,328 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 25.5) internal successors, (204), 8 states have internal predecessors, (204), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 204 [2024-11-28 02:10:15,329 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 02:10:15,334 INFO L225 Difference]: With dead ends: 2652 [2024-11-28 02:10:15,334 INFO L226 Difference]: Without dead ends: 2118 [2024-11-28 02:10:15,335 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=34, Invalid=56, Unknown=0, NotChecked=0, Total=90 [2024-11-28 02:10:15,336 INFO L435 NwaCegarLoop]: 646 mSDtfsCounter, 1270 mSDsluCounter, 2066 mSDsCounter, 0 mSdLazyCounter, 1318 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.8s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1270 SdHoareTripleChecker+Valid, 2712 SdHoareTripleChecker+Invalid, 1321 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 1318 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.9s IncrementalHoareTripleChecker+Time [2024-11-28 02:10:15,336 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1270 Valid, 2712 Invalid, 1321 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 1318 Invalid, 0 Unknown, 0 Unchecked, 0.9s Time] [2024-11-28 02:10:15,338 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2118 states. [2024-11-28 02:10:15,368 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2118 to 1784. [2024-11-28 02:10:15,371 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1784 states, 1783 states have (on average 1.4234436343241728) internal successors, (2538), 1783 states have internal predecessors, (2538), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 02:10:15,375 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1784 states to 1784 states and 2538 transitions. [2024-11-28 02:10:15,375 INFO L78 Accepts]: Start accepts. Automaton has 1784 states and 2538 transitions. Word has length 204 [2024-11-28 02:10:15,376 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 02:10:15,376 INFO L471 AbstractCegarLoop]: Abstraction has 1784 states and 2538 transitions. [2024-11-28 02:10:15,376 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 25.5) internal successors, (204), 8 states have internal predecessors, (204), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 02:10:15,376 INFO L276 IsEmpty]: Start isEmpty. Operand 1784 states and 2538 transitions. [2024-11-28 02:10:15,378 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 206 [2024-11-28 02:10:15,379 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 02:10:15,379 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 02:10:15,379 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable22 [2024-11-28 02:10:15,379 INFO L396 AbstractCegarLoop]: === Iteration 24 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 02:10:15,380 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 02:10:15,380 INFO L85 PathProgramCache]: Analyzing trace with hash -1478250858, now seen corresponding path program 1 times [2024-11-28 02:10:15,380 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 02:10:15,380 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1875979845] [2024-11-28 02:10:15,380 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:10:15,380 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 02:10:16,503 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 02:10:19,610 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 9 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-28 02:10:19,610 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 02:10:19,610 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1875979845] [2024-11-28 02:10:19,610 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1875979845] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-28 02:10:19,610 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [364462157] [2024-11-28 02:10:19,610 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:10:19,610 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-28 02:10:19,611 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_222ce6d4-5b40-4d76-abe1-0d226bb9524c/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 02:10:19,613 INFO L229 MonitoredProcess]: Starting monitored process 10 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_222ce6d4-5b40-4d76-abe1-0d226bb9524c/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-28 02:10:19,614 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_222ce6d4-5b40-4d76-abe1-0d226bb9524c/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process [2024-11-28 02:10:21,308 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 02:10:21,318 INFO L256 TraceCheckSpWp]: Trace formula consists of 1630 conjuncts, 72 conjuncts are in the unsatisfiable core [2024-11-28 02:10:21,326 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-28 02:10:22,570 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 13 proven. 12 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-28 02:10:22,570 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-28 02:10:26,530 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 9 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-28 02:10:26,530 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [364462157] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-28 02:10:26,530 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-28 02:10:26,530 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [20, 17, 20] total 53 [2024-11-28 02:10:26,530 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [151337764] [2024-11-28 02:10:26,530 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-28 02:10:26,531 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 53 states [2024-11-28 02:10:26,531 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 02:10:26,532 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 53 interpolants. [2024-11-28 02:10:26,533 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=312, Invalid=2444, Unknown=0, NotChecked=0, Total=2756 [2024-11-28 02:10:26,533 INFO L87 Difference]: Start difference. First operand 1784 states and 2538 transitions. Second operand has 53 states, 53 states have (on average 11.037735849056604) internal successors, (585), 53 states have internal predecessors, (585), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 02:10:33,912 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 02:10:33,912 INFO L93 Difference]: Finished difference Result 5561 states and 7961 transitions. [2024-11-28 02:10:33,913 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 60 states. [2024-11-28 02:10:33,913 INFO L78 Accepts]: Start accepts. Automaton has has 53 states, 53 states have (on average 11.037735849056604) internal successors, (585), 53 states have internal predecessors, (585), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 205 [2024-11-28 02:10:33,914 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 02:10:33,921 INFO L225 Difference]: With dead ends: 5561 [2024-11-28 02:10:33,921 INFO L226 Difference]: Without dead ends: 4498 [2024-11-28 02:10:33,925 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 487 GetRequests, 379 SyntacticMatches, 0 SemanticMatches, 108 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3494 ImplicationChecksByTransitivity, 4.3s TimeCoverageRelationStatistics Valid=1483, Invalid=10507, Unknown=0, NotChecked=0, Total=11990 [2024-11-28 02:10:33,926 INFO L435 NwaCegarLoop]: 274 mSDtfsCounter, 7309 mSDsluCounter, 8983 mSDsCounter, 0 mSdLazyCounter, 6534 mSolverCounterSat, 16 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 3.8s Time, 0 mProtectedPredicate, 0 mProtectedAction, 7309 SdHoareTripleChecker+Valid, 9257 SdHoareTripleChecker+Invalid, 6550 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 16 IncrementalHoareTripleChecker+Valid, 6534 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 4.4s IncrementalHoareTripleChecker+Time [2024-11-28 02:10:33,926 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [7309 Valid, 9257 Invalid, 6550 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [16 Valid, 6534 Invalid, 0 Unknown, 0 Unchecked, 4.4s Time] [2024-11-28 02:10:33,930 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4498 states. [2024-11-28 02:10:33,974 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4498 to 2711. [2024-11-28 02:10:33,979 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2711 states, 2710 states have (on average 1.4247232472324722) internal successors, (3861), 2710 states have internal predecessors, (3861), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 02:10:33,986 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2711 states to 2711 states and 3861 transitions. [2024-11-28 02:10:33,986 INFO L78 Accepts]: Start accepts. Automaton has 2711 states and 3861 transitions. Word has length 205 [2024-11-28 02:10:33,987 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 02:10:33,987 INFO L471 AbstractCegarLoop]: Abstraction has 2711 states and 3861 transitions. [2024-11-28 02:10:33,987 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 53 states, 53 states have (on average 11.037735849056604) internal successors, (585), 53 states have internal predecessors, (585), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 02:10:33,987 INFO L276 IsEmpty]: Start isEmpty. Operand 2711 states and 3861 transitions. [2024-11-28 02:10:33,990 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 206 [2024-11-28 02:10:33,990 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 02:10:33,991 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 02:10:34,009 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_222ce6d4-5b40-4d76-abe1-0d226bb9524c/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Forceful destruction successful, exit code 0 [2024-11-28 02:10:34,191 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable23,10 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_222ce6d4-5b40-4d76-abe1-0d226bb9524c/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-28 02:10:34,191 INFO L396 AbstractCegarLoop]: === Iteration 25 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 02:10:34,192 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 02:10:34,192 INFO L85 PathProgramCache]: Analyzing trace with hash 365789508, now seen corresponding path program 1 times [2024-11-28 02:10:34,192 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 02:10:34,192 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [870698267] [2024-11-28 02:10:34,192 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:10:34,192 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 02:10:35,312 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 02:10:37,055 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 9 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-28 02:10:37,055 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 02:10:37,055 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [870698267] [2024-11-28 02:10:37,055 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [870698267] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-28 02:10:37,055 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1923660594] [2024-11-28 02:10:37,055 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:10:37,056 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-28 02:10:37,056 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_222ce6d4-5b40-4d76-abe1-0d226bb9524c/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 02:10:37,057 INFO L229 MonitoredProcess]: Starting monitored process 11 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_222ce6d4-5b40-4d76-abe1-0d226bb9524c/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-28 02:10:37,059 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_222ce6d4-5b40-4d76-abe1-0d226bb9524c/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Waiting until timeout for monitored process [2024-11-28 02:10:38,707 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 02:10:38,715 INFO L256 TraceCheckSpWp]: Trace formula consists of 1630 conjuncts, 78 conjuncts are in the unsatisfiable core [2024-11-28 02:10:38,725 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-28 02:10:40,136 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 9 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-28 02:10:40,136 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-28 02:10:41,760 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 9 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-28 02:10:41,760 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1923660594] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-28 02:10:41,761 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-28 02:10:41,761 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 17, 15] total 41 [2024-11-28 02:10:41,761 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [391066207] [2024-11-28 02:10:41,761 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-28 02:10:41,762 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 41 states [2024-11-28 02:10:41,762 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 02:10:41,763 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 41 interpolants. [2024-11-28 02:10:41,763 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=183, Invalid=1457, Unknown=0, NotChecked=0, Total=1640 [2024-11-28 02:10:41,764 INFO L87 Difference]: Start difference. First operand 2711 states and 3861 transitions. Second operand has 41 states, 41 states have (on average 14.268292682926829) internal successors, (585), 41 states have internal predecessors, (585), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 02:10:45,614 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 02:10:45,615 INFO L93 Difference]: Finished difference Result 4569 states and 6539 transitions. [2024-11-28 02:10:45,615 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 40 states. [2024-11-28 02:10:45,615 INFO L78 Accepts]: Start accepts. Automaton has has 41 states, 41 states have (on average 14.268292682926829) internal successors, (585), 41 states have internal predecessors, (585), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 205 [2024-11-28 02:10:45,616 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 02:10:45,625 INFO L225 Difference]: With dead ends: 4569 [2024-11-28 02:10:45,625 INFO L226 Difference]: Without dead ends: 3938 [2024-11-28 02:10:45,628 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 459 GetRequests, 383 SyntacticMatches, 0 SemanticMatches, 76 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1629 ImplicationChecksByTransitivity, 1.8s TimeCoverageRelationStatistics Valid=863, Invalid=5143, Unknown=0, NotChecked=0, Total=6006 [2024-11-28 02:10:45,628 INFO L435 NwaCegarLoop]: 446 mSDtfsCounter, 6999 mSDsluCounter, 8239 mSDsCounter, 0 mSdLazyCounter, 4214 mSolverCounterSat, 11 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 2.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 6999 SdHoareTripleChecker+Valid, 8685 SdHoareTripleChecker+Invalid, 4225 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 11 IncrementalHoareTripleChecker+Valid, 4214 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 2.7s IncrementalHoareTripleChecker+Time [2024-11-28 02:10:45,629 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [6999 Valid, 8685 Invalid, 4225 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [11 Valid, 4214 Invalid, 0 Unknown, 0 Unchecked, 2.7s Time] [2024-11-28 02:10:45,632 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3938 states. [2024-11-28 02:10:45,674 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3938 to 2732. [2024-11-28 02:10:45,678 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2732 states, 2731 states have (on average 1.4247528377883558) internal successors, (3891), 2731 states have internal predecessors, (3891), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 02:10:45,685 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2732 states to 2732 states and 3891 transitions. [2024-11-28 02:10:45,685 INFO L78 Accepts]: Start accepts. Automaton has 2732 states and 3891 transitions. Word has length 205 [2024-11-28 02:10:45,686 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 02:10:45,686 INFO L471 AbstractCegarLoop]: Abstraction has 2732 states and 3891 transitions. [2024-11-28 02:10:45,686 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 41 states, 41 states have (on average 14.268292682926829) internal successors, (585), 41 states have internal predecessors, (585), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 02:10:45,686 INFO L276 IsEmpty]: Start isEmpty. Operand 2732 states and 3891 transitions. [2024-11-28 02:10:45,689 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 207 [2024-11-28 02:10:45,689 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 02:10:45,689 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 02:10:45,707 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_222ce6d4-5b40-4d76-abe1-0d226bb9524c/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Ended with exit code 0 [2024-11-28 02:10:45,890 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable24,11 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_222ce6d4-5b40-4d76-abe1-0d226bb9524c/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-28 02:10:45,890 INFO L396 AbstractCegarLoop]: === Iteration 26 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 02:10:45,890 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 02:10:45,890 INFO L85 PathProgramCache]: Analyzing trace with hash -1501098862, now seen corresponding path program 1 times [2024-11-28 02:10:45,890 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 02:10:45,891 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1465390267] [2024-11-28 02:10:45,891 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:10:45,891 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 02:10:47,238 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 02:10:51,607 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 11 proven. 14 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-28 02:10:51,607 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 02:10:51,607 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1465390267] [2024-11-28 02:10:51,607 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1465390267] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-28 02:10:51,607 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1057695357] [2024-11-28 02:10:51,607 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:10:51,607 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-28 02:10:51,608 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_222ce6d4-5b40-4d76-abe1-0d226bb9524c/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 02:10:51,609 INFO L229 MonitoredProcess]: Starting monitored process 12 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_222ce6d4-5b40-4d76-abe1-0d226bb9524c/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-28 02:10:51,640 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_222ce6d4-5b40-4d76-abe1-0d226bb9524c/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Waiting until timeout for monitored process [2024-11-28 02:10:53,598 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 02:10:53,619 INFO L256 TraceCheckSpWp]: Trace formula consists of 1633 conjuncts, 139 conjuncts are in the unsatisfiable core [2024-11-28 02:10:53,645 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-28 02:10:56,699 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 9 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-28 02:10:56,699 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-28 02:11:00,661 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 9 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-28 02:11:00,662 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1057695357] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-28 02:11:00,662 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-28 02:11:00,662 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 20, 21] total 51 [2024-11-28 02:11:00,662 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2065711898] [2024-11-28 02:11:00,662 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-28 02:11:00,662 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 51 states [2024-11-28 02:11:00,662 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 02:11:00,663 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 51 interpolants. [2024-11-28 02:11:00,664 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=286, Invalid=2264, Unknown=0, NotChecked=0, Total=2550 [2024-11-28 02:11:00,664 INFO L87 Difference]: Start difference. First operand 2732 states and 3891 transitions. Second operand has 51 states, 51 states have (on average 11.568627450980392) internal successors, (590), 51 states have internal predecessors, (590), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 02:11:06,855 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 02:11:06,856 INFO L93 Difference]: Finished difference Result 4212 states and 6010 transitions. [2024-11-28 02:11:06,856 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2024-11-28 02:11:06,856 INFO L78 Accepts]: Start accepts. Automaton has has 51 states, 51 states have (on average 11.568627450980392) internal successors, (590), 51 states have internal predecessors, (590), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 206 [2024-11-28 02:11:06,857 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 02:11:06,866 INFO L225 Difference]: With dead ends: 4212 [2024-11-28 02:11:06,866 INFO L226 Difference]: Without dead ends: 3563 [2024-11-28 02:11:06,869 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 455 GetRequests, 379 SyntacticMatches, 0 SemanticMatches, 76 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1660 ImplicationChecksByTransitivity, 2.6s TimeCoverageRelationStatistics Valid=788, Invalid=5218, Unknown=0, NotChecked=0, Total=6006 [2024-11-28 02:11:06,870 INFO L435 NwaCegarLoop]: 431 mSDtfsCounter, 4979 mSDsluCounter, 11421 mSDsCounter, 0 mSdLazyCounter, 7896 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 4.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 4979 SdHoareTripleChecker+Valid, 11852 SdHoareTripleChecker+Invalid, 7900 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 7896 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 4.9s IncrementalHoareTripleChecker+Time [2024-11-28 02:11:06,870 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [4979 Valid, 11852 Invalid, 7900 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 7896 Invalid, 0 Unknown, 0 Unchecked, 4.9s Time] [2024-11-28 02:11:06,873 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3563 states. [2024-11-28 02:11:06,910 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3563 to 2947. [2024-11-28 02:11:06,914 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2947 states, 2946 states have (on average 1.4249830278343516) internal successors, (4198), 2946 states have internal predecessors, (4198), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 02:11:06,921 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2947 states to 2947 states and 4198 transitions. [2024-11-28 02:11:06,922 INFO L78 Accepts]: Start accepts. Automaton has 2947 states and 4198 transitions. Word has length 206 [2024-11-28 02:11:06,922 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 02:11:06,922 INFO L471 AbstractCegarLoop]: Abstraction has 2947 states and 4198 transitions. [2024-11-28 02:11:06,923 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 51 states, 51 states have (on average 11.568627450980392) internal successors, (590), 51 states have internal predecessors, (590), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 02:11:06,923 INFO L276 IsEmpty]: Start isEmpty. Operand 2947 states and 4198 transitions. [2024-11-28 02:11:06,926 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 207 [2024-11-28 02:11:06,926 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 02:11:06,926 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 02:11:06,976 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_222ce6d4-5b40-4d76-abe1-0d226bb9524c/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Ended with exit code 0 [2024-11-28 02:11:07,130 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 12 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_222ce6d4-5b40-4d76-abe1-0d226bb9524c/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable25 [2024-11-28 02:11:07,132 INFO L396 AbstractCegarLoop]: === Iteration 27 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 02:11:07,135 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 02:11:07,135 INFO L85 PathProgramCache]: Analyzing trace with hash 371505086, now seen corresponding path program 1 times [2024-11-28 02:11:07,135 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 02:11:07,135 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1451281817] [2024-11-28 02:11:07,136 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:11:07,136 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 02:11:07,604 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 02:11:08,441 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 25 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-28 02:11:08,441 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 02:11:08,441 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1451281817] [2024-11-28 02:11:08,441 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1451281817] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 02:11:08,442 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 02:11:08,442 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2024-11-28 02:11:08,442 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1299736084] [2024-11-28 02:11:08,442 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 02:11:08,442 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2024-11-28 02:11:08,442 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 02:11:08,443 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-11-28 02:11:08,443 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=26, Unknown=0, NotChecked=0, Total=42 [2024-11-28 02:11:08,443 INFO L87 Difference]: Start difference. First operand 2947 states and 4198 transitions. Second operand has 7 states, 7 states have (on average 29.428571428571427) internal successors, (206), 7 states have internal predecessors, (206), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 02:11:09,309 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 02:11:09,309 INFO L93 Difference]: Finished difference Result 3908 states and 5583 transitions. [2024-11-28 02:11:09,310 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2024-11-28 02:11:09,310 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 29.428571428571427) internal successors, (206), 7 states have internal predecessors, (206), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 206 [2024-11-28 02:11:09,310 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 02:11:09,317 INFO L225 Difference]: With dead ends: 3908 [2024-11-28 02:11:09,317 INFO L226 Difference]: Without dead ends: 3127 [2024-11-28 02:11:09,318 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 4 SyntacticMatches, 1 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=28, Invalid=44, Unknown=0, NotChecked=0, Total=72 [2024-11-28 02:11:09,318 INFO L435 NwaCegarLoop]: 525 mSDtfsCounter, 1143 mSDsluCounter, 1318 mSDsCounter, 0 mSdLazyCounter, 1033 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.7s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1143 SdHoareTripleChecker+Valid, 1843 SdHoareTripleChecker+Invalid, 1035 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 1033 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.8s IncrementalHoareTripleChecker+Time [2024-11-28 02:11:09,319 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1143 Valid, 1843 Invalid, 1035 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 1033 Invalid, 0 Unknown, 0 Unchecked, 0.8s Time] [2024-11-28 02:11:09,321 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3127 states. [2024-11-28 02:11:09,350 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3127 to 2953. [2024-11-28 02:11:09,354 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2953 states, 2952 states have (on average 1.424119241192412) internal successors, (4204), 2952 states have internal predecessors, (4204), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 02:11:09,360 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2953 states to 2953 states and 4204 transitions. [2024-11-28 02:11:09,360 INFO L78 Accepts]: Start accepts. Automaton has 2953 states and 4204 transitions. Word has length 206 [2024-11-28 02:11:09,361 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 02:11:09,361 INFO L471 AbstractCegarLoop]: Abstraction has 2953 states and 4204 transitions. [2024-11-28 02:11:09,361 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 29.428571428571427) internal successors, (206), 7 states have internal predecessors, (206), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 02:11:09,361 INFO L276 IsEmpty]: Start isEmpty. Operand 2953 states and 4204 transitions. [2024-11-28 02:11:09,364 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 207 [2024-11-28 02:11:09,364 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 02:11:09,364 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 02:11:09,365 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable26 [2024-11-28 02:11:09,365 INFO L396 AbstractCegarLoop]: === Iteration 28 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 02:11:09,365 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 02:11:09,365 INFO L85 PathProgramCache]: Analyzing trace with hash -650426196, now seen corresponding path program 1 times [2024-11-28 02:11:09,365 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 02:11:09,365 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1589985182] [2024-11-28 02:11:09,366 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:11:09,366 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 02:11:09,836 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 02:11:10,479 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 25 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-28 02:11:10,479 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 02:11:10,479 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1589985182] [2024-11-28 02:11:10,479 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1589985182] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 02:11:10,479 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 02:11:10,480 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2024-11-28 02:11:10,480 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [89654465] [2024-11-28 02:11:10,480 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 02:11:10,480 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2024-11-28 02:11:10,480 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 02:11:10,480 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-11-28 02:11:10,481 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=26, Unknown=0, NotChecked=0, Total=42 [2024-11-28 02:11:10,481 INFO L87 Difference]: Start difference. First operand 2953 states and 4204 transitions. Second operand has 7 states, 7 states have (on average 29.428571428571427) internal successors, (206), 7 states have internal predecessors, (206), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 02:11:11,259 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 02:11:11,259 INFO L93 Difference]: Finished difference Result 3897 states and 5566 transitions. [2024-11-28 02:11:11,260 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-28 02:11:11,260 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 29.428571428571427) internal successors, (206), 7 states have internal predecessors, (206), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 206 [2024-11-28 02:11:11,260 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 02:11:11,267 INFO L225 Difference]: With dead ends: 3897 [2024-11-28 02:11:11,267 INFO L226 Difference]: Without dead ends: 3113 [2024-11-28 02:11:11,269 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2024-11-28 02:11:11,269 INFO L435 NwaCegarLoop]: 525 mSDtfsCounter, 1143 mSDsluCounter, 1316 mSDsCounter, 0 mSdLazyCounter, 1032 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1143 SdHoareTripleChecker+Valid, 1841 SdHoareTripleChecker+Invalid, 1033 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 1032 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.7s IncrementalHoareTripleChecker+Time [2024-11-28 02:11:11,270 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1143 Valid, 1841 Invalid, 1033 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 1032 Invalid, 0 Unknown, 0 Unchecked, 0.7s Time] [2024-11-28 02:11:11,272 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3113 states. [2024-11-28 02:11:11,296 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3113 to 2955. [2024-11-28 02:11:11,298 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2955 states, 2954 states have (on average 1.4238320920785377) internal successors, (4206), 2954 states have internal predecessors, (4206), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 02:11:11,301 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2955 states to 2955 states and 4206 transitions. [2024-11-28 02:11:11,301 INFO L78 Accepts]: Start accepts. Automaton has 2955 states and 4206 transitions. Word has length 206 [2024-11-28 02:11:11,301 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 02:11:11,301 INFO L471 AbstractCegarLoop]: Abstraction has 2955 states and 4206 transitions. [2024-11-28 02:11:11,302 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 29.428571428571427) internal successors, (206), 7 states have internal predecessors, (206), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 02:11:11,302 INFO L276 IsEmpty]: Start isEmpty. Operand 2955 states and 4206 transitions. [2024-11-28 02:11:11,305 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 207 [2024-11-28 02:11:11,305 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 02:11:11,305 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 02:11:11,305 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable27 [2024-11-28 02:11:11,305 INFO L396 AbstractCegarLoop]: === Iteration 29 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 02:11:11,306 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 02:11:11,306 INFO L85 PathProgramCache]: Analyzing trace with hash -1564610426, now seen corresponding path program 1 times [2024-11-28 02:11:11,306 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 02:11:11,306 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [889176769] [2024-11-28 02:11:11,306 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:11:11,306 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 02:11:12,314 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 02:11:14,876 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 25 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-28 02:11:14,877 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 02:11:14,877 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [889176769] [2024-11-28 02:11:14,877 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [889176769] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 02:11:14,877 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 02:11:14,877 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2024-11-28 02:11:14,877 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1979448127] [2024-11-28 02:11:14,877 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 02:11:14,877 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 13 states [2024-11-28 02:11:14,877 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 02:11:14,878 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2024-11-28 02:11:14,878 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=46, Invalid=110, Unknown=0, NotChecked=0, Total=156 [2024-11-28 02:11:14,878 INFO L87 Difference]: Start difference. First operand 2955 states and 4206 transitions. Second operand has 13 states, 13 states have (on average 15.846153846153847) internal successors, (206), 13 states have internal predecessors, (206), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 02:11:15,999 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 02:11:15,999 INFO L93 Difference]: Finished difference Result 4053 states and 5776 transitions. [2024-11-28 02:11:15,999 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2024-11-28 02:11:15,999 INFO L78 Accepts]: Start accepts. Automaton has has 13 states, 13 states have (on average 15.846153846153847) internal successors, (206), 13 states have internal predecessors, (206), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 206 [2024-11-28 02:11:16,000 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 02:11:16,005 INFO L225 Difference]: With dead ends: 4053 [2024-11-28 02:11:16,005 INFO L226 Difference]: Without dead ends: 3259 [2024-11-28 02:11:16,007 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 33 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=65, Invalid=175, Unknown=0, NotChecked=0, Total=240 [2024-11-28 02:11:16,007 INFO L435 NwaCegarLoop]: 279 mSDtfsCounter, 932 mSDsluCounter, 1607 mSDsCounter, 0 mSdLazyCounter, 1409 mSolverCounterSat, 6 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.9s Time, 0 mProtectedPredicate, 0 mProtectedAction, 932 SdHoareTripleChecker+Valid, 1886 SdHoareTripleChecker+Invalid, 1415 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 6 IncrementalHoareTripleChecker+Valid, 1409 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.0s IncrementalHoareTripleChecker+Time [2024-11-28 02:11:16,007 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [932 Valid, 1886 Invalid, 1415 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [6 Valid, 1409 Invalid, 0 Unknown, 0 Unchecked, 1.0s Time] [2024-11-28 02:11:16,010 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3259 states. [2024-11-28 02:11:16,034 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3259 to 3109. [2024-11-28 02:11:16,036 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3109 states, 3108 states have (on average 1.4253539253539254) internal successors, (4430), 3108 states have internal predecessors, (4430), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 02:11:16,042 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3109 states to 3109 states and 4430 transitions. [2024-11-28 02:11:16,042 INFO L78 Accepts]: Start accepts. Automaton has 3109 states and 4430 transitions. Word has length 206 [2024-11-28 02:11:16,043 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 02:11:16,043 INFO L471 AbstractCegarLoop]: Abstraction has 3109 states and 4430 transitions. [2024-11-28 02:11:16,043 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 13 states, 13 states have (on average 15.846153846153847) internal successors, (206), 13 states have internal predecessors, (206), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 02:11:16,043 INFO L276 IsEmpty]: Start isEmpty. Operand 3109 states and 4430 transitions. [2024-11-28 02:11:16,046 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 208 [2024-11-28 02:11:16,047 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 02:11:16,047 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 02:11:16,047 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable28 [2024-11-28 02:11:16,047 INFO L396 AbstractCegarLoop]: === Iteration 30 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 02:11:16,048 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 02:11:16,048 INFO L85 PathProgramCache]: Analyzing trace with hash 233134944, now seen corresponding path program 1 times [2024-11-28 02:11:16,048 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 02:11:16,048 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [6566943] [2024-11-28 02:11:16,048 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:11:16,049 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 02:11:17,017 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 02:11:18,658 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 11 proven. 14 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-28 02:11:18,658 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 02:11:18,658 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [6566943] [2024-11-28 02:11:18,658 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [6566943] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-28 02:11:18,658 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [468048069] [2024-11-28 02:11:18,658 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:11:18,658 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-28 02:11:18,658 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_222ce6d4-5b40-4d76-abe1-0d226bb9524c/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 02:11:18,660 INFO L229 MonitoredProcess]: Starting monitored process 13 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_222ce6d4-5b40-4d76-abe1-0d226bb9524c/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-28 02:11:18,663 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_222ce6d4-5b40-4d76-abe1-0d226bb9524c/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Waiting until timeout for monitored process [2024-11-28 02:11:20,509 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 02:11:20,519 INFO L256 TraceCheckSpWp]: Trace formula consists of 1634 conjuncts, 53 conjuncts are in the unsatisfiable core [2024-11-28 02:11:20,530 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-28 02:11:21,480 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 11 proven. 14 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-28 02:11:21,480 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-28 02:11:59,147 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 11 proven. 14 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-28 02:11:59,147 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [468048069] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-28 02:11:59,147 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-28 02:11:59,148 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 15, 15] total 33 [2024-11-28 02:11:59,148 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [632869954] [2024-11-28 02:11:59,148 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-28 02:11:59,148 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 33 states [2024-11-28 02:11:59,148 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 02:11:59,149 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 33 interpolants. [2024-11-28 02:11:59,150 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=162, Invalid=885, Unknown=9, NotChecked=0, Total=1056 [2024-11-28 02:11:59,150 INFO L87 Difference]: Start difference. First operand 3109 states and 4430 transitions. Second operand has 33 states, 33 states have (on average 15.242424242424242) internal successors, (503), 33 states have internal predecessors, (503), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 02:12:02,178 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 02:12:02,178 INFO L93 Difference]: Finished difference Result 5924 states and 8500 transitions. [2024-11-28 02:12:02,179 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2024-11-28 02:12:02,179 INFO L78 Accepts]: Start accepts. Automaton has has 33 states, 33 states have (on average 15.242424242424242) internal successors, (503), 33 states have internal predecessors, (503), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 207 [2024-11-28 02:12:02,179 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 02:12:02,184 INFO L225 Difference]: With dead ends: 5924 [2024-11-28 02:12:02,185 INFO L226 Difference]: Without dead ends: 3946 [2024-11-28 02:12:02,187 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 436 GetRequests, 390 SyntacticMatches, 5 SemanticMatches, 41 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 547 ImplicationChecksByTransitivity, 34.9s TimeCoverageRelationStatistics Valid=306, Invalid=1491, Unknown=9, NotChecked=0, Total=1806 [2024-11-28 02:12:02,188 INFO L435 NwaCegarLoop]: 274 mSDtfsCounter, 4219 mSDsluCounter, 4725 mSDsCounter, 0 mSdLazyCounter, 3159 mSolverCounterSat, 5 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 2.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 4219 SdHoareTripleChecker+Valid, 4999 SdHoareTripleChecker+Invalid, 3164 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 5 IncrementalHoareTripleChecker+Valid, 3159 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 2.7s IncrementalHoareTripleChecker+Time [2024-11-28 02:12:02,188 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [4219 Valid, 4999 Invalid, 3164 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [5 Valid, 3159 Invalid, 0 Unknown, 0 Unchecked, 2.7s Time] [2024-11-28 02:12:02,191 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3946 states. [2024-11-28 02:12:02,221 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3946 to 2746. [2024-11-28 02:12:02,225 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2746 states, 2745 states have (on average 1.4218579234972677) internal successors, (3903), 2745 states have internal predecessors, (3903), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 02:12:02,229 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2746 states to 2746 states and 3903 transitions. [2024-11-28 02:12:02,229 INFO L78 Accepts]: Start accepts. Automaton has 2746 states and 3903 transitions. Word has length 207 [2024-11-28 02:12:02,229 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 02:12:02,229 INFO L471 AbstractCegarLoop]: Abstraction has 2746 states and 3903 transitions. [2024-11-28 02:12:02,230 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 33 states, 33 states have (on average 15.242424242424242) internal successors, (503), 33 states have internal predecessors, (503), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 02:12:02,230 INFO L276 IsEmpty]: Start isEmpty. Operand 2746 states and 3903 transitions. [2024-11-28 02:12:02,232 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 208 [2024-11-28 02:12:02,232 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 02:12:02,232 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 02:12:02,252 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_222ce6d4-5b40-4d76-abe1-0d226bb9524c/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Forceful destruction successful, exit code 0 [2024-11-28 02:12:02,433 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable29,13 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_222ce6d4-5b40-4d76-abe1-0d226bb9524c/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-28 02:12:02,433 INFO L396 AbstractCegarLoop]: === Iteration 31 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 02:12:02,433 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 02:12:02,434 INFO L85 PathProgramCache]: Analyzing trace with hash 221600573, now seen corresponding path program 1 times [2024-11-28 02:12:02,434 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 02:12:02,434 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [520662845] [2024-11-28 02:12:02,434 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:12:02,434 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 02:12:03,423 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 02:12:04,906 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 15 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-28 02:12:04,907 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 02:12:04,907 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [520662845] [2024-11-28 02:12:04,907 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [520662845] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-28 02:12:04,907 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1927922306] [2024-11-28 02:12:04,907 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:12:04,907 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-28 02:12:04,907 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_222ce6d4-5b40-4d76-abe1-0d226bb9524c/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 02:12:04,909 INFO L229 MonitoredProcess]: Starting monitored process 14 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_222ce6d4-5b40-4d76-abe1-0d226bb9524c/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-28 02:12:04,910 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_222ce6d4-5b40-4d76-abe1-0d226bb9524c/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Waiting until timeout for monitored process [2024-11-28 02:12:06,716 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 02:12:06,725 INFO L256 TraceCheckSpWp]: Trace formula consists of 1636 conjuncts, 80 conjuncts are in the unsatisfiable core [2024-11-28 02:12:06,731 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-28 02:12:07,714 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 11 proven. 14 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-28 02:12:07,715 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-28 02:12:09,599 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 9 proven. 14 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-11-28 02:12:09,599 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1927922306] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-28 02:12:09,599 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-28 02:12:09,600 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 18, 19] total 45 [2024-11-28 02:12:09,600 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2117933830] [2024-11-28 02:12:09,600 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-28 02:12:09,600 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 45 states [2024-11-28 02:12:09,601 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 02:12:09,601 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 45 interpolants. [2024-11-28 02:12:09,602 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=186, Invalid=1794, Unknown=0, NotChecked=0, Total=1980 [2024-11-28 02:12:09,602 INFO L87 Difference]: Start difference. First operand 2746 states and 3903 transitions. Second operand has 45 states, 45 states have (on average 13.022222222222222) internal successors, (586), 45 states have internal predecessors, (586), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 02:12:13,282 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 02:12:13,282 INFO L93 Difference]: Finished difference Result 4735 states and 6757 transitions. [2024-11-28 02:12:13,282 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2024-11-28 02:12:13,283 INFO L78 Accepts]: Start accepts. Automaton has has 45 states, 45 states have (on average 13.022222222222222) internal successors, (586), 45 states have internal predecessors, (586), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 207 [2024-11-28 02:12:13,283 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 02:12:13,289 INFO L225 Difference]: With dead ends: 4735 [2024-11-28 02:12:13,290 INFO L226 Difference]: Without dead ends: 3116 [2024-11-28 02:12:13,293 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 445 GetRequests, 380 SyntacticMatches, 2 SemanticMatches, 63 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1038 ImplicationChecksByTransitivity, 1.6s TimeCoverageRelationStatistics Valid=504, Invalid=3656, Unknown=0, NotChecked=0, Total=4160 [2024-11-28 02:12:13,293 INFO L435 NwaCegarLoop]: 280 mSDtfsCounter, 1789 mSDsluCounter, 6631 mSDsCounter, 0 mSdLazyCounter, 5036 mSolverCounterSat, 12 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 2.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1789 SdHoareTripleChecker+Valid, 6911 SdHoareTripleChecker+Invalid, 5048 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 12 IncrementalHoareTripleChecker+Valid, 5036 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 3.0s IncrementalHoareTripleChecker+Time [2024-11-28 02:12:13,293 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1789 Valid, 6911 Invalid, 5048 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [12 Valid, 5036 Invalid, 0 Unknown, 0 Unchecked, 3.0s Time] [2024-11-28 02:12:13,296 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3116 states. [2024-11-28 02:12:13,340 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3116 to 2780. [2024-11-28 02:12:13,343 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2780 states, 2779 states have (on average 1.415617128463476) internal successors, (3934), 2779 states have internal predecessors, (3934), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 02:12:13,348 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2780 states to 2780 states and 3934 transitions. [2024-11-28 02:12:13,349 INFO L78 Accepts]: Start accepts. Automaton has 2780 states and 3934 transitions. Word has length 207 [2024-11-28 02:12:13,349 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 02:12:13,349 INFO L471 AbstractCegarLoop]: Abstraction has 2780 states and 3934 transitions. [2024-11-28 02:12:13,350 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 45 states, 45 states have (on average 13.022222222222222) internal successors, (586), 45 states have internal predecessors, (586), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 02:12:13,350 INFO L276 IsEmpty]: Start isEmpty. Operand 2780 states and 3934 transitions. [2024-11-28 02:12:13,353 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 208 [2024-11-28 02:12:13,353 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 02:12:13,353 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 02:12:13,370 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_222ce6d4-5b40-4d76-abe1-0d226bb9524c/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Ended with exit code 0 [2024-11-28 02:12:13,554 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 14 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_222ce6d4-5b40-4d76-abe1-0d226bb9524c/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable30 [2024-11-28 02:12:13,554 INFO L396 AbstractCegarLoop]: === Iteration 32 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 02:12:13,555 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 02:12:13,555 INFO L85 PathProgramCache]: Analyzing trace with hash -149640625, now seen corresponding path program 1 times [2024-11-28 02:12:13,555 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 02:12:13,555 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1145673717] [2024-11-28 02:12:13,555 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:12:13,555 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 02:12:14,228 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 02:12:14,855 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 25 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-28 02:12:14,855 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 02:12:14,855 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1145673717] [2024-11-28 02:12:14,855 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1145673717] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 02:12:14,855 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 02:12:14,855 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2024-11-28 02:12:14,855 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1497536286] [2024-11-28 02:12:14,855 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 02:12:14,856 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2024-11-28 02:12:14,856 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 02:12:14,856 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-11-28 02:12:14,856 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=26, Unknown=0, NotChecked=0, Total=42 [2024-11-28 02:12:14,857 INFO L87 Difference]: Start difference. First operand 2780 states and 3934 transitions. Second operand has 7 states, 7 states have (on average 29.571428571428573) internal successors, (207), 7 states have internal predecessors, (207), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 02:12:15,552 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 02:12:15,552 INFO L93 Difference]: Finished difference Result 4850 states and 6900 transitions. [2024-11-28 02:12:15,552 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2024-11-28 02:12:15,553 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 29.571428571428573) internal successors, (207), 7 states have internal predecessors, (207), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 207 [2024-11-28 02:12:15,553 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 02:12:15,558 INFO L225 Difference]: With dead ends: 4850 [2024-11-28 02:12:15,559 INFO L226 Difference]: Without dead ends: 3049 [2024-11-28 02:12:15,561 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=35, Unknown=0, NotChecked=0, Total=56 [2024-11-28 02:12:15,562 INFO L435 NwaCegarLoop]: 288 mSDtfsCounter, 999 mSDsluCounter, 1140 mSDsCounter, 0 mSdLazyCounter, 953 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 999 SdHoareTripleChecker+Valid, 1428 SdHoareTripleChecker+Invalid, 954 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 953 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.7s IncrementalHoareTripleChecker+Time [2024-11-28 02:12:15,562 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [999 Valid, 1428 Invalid, 954 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 953 Invalid, 0 Unknown, 0 Unchecked, 0.7s Time] [2024-11-28 02:12:15,566 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3049 states. [2024-11-28 02:12:15,593 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3049 to 2804. [2024-11-28 02:12:15,597 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2804 states, 2803 states have (on average 1.4131287905815197) internal successors, (3961), 2803 states have internal predecessors, (3961), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 02:12:15,601 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2804 states to 2804 states and 3961 transitions. [2024-11-28 02:12:15,601 INFO L78 Accepts]: Start accepts. Automaton has 2804 states and 3961 transitions. Word has length 207 [2024-11-28 02:12:15,601 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 02:12:15,602 INFO L471 AbstractCegarLoop]: Abstraction has 2804 states and 3961 transitions. [2024-11-28 02:12:15,602 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 29.571428571428573) internal successors, (207), 7 states have internal predecessors, (207), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 02:12:15,602 INFO L276 IsEmpty]: Start isEmpty. Operand 2804 states and 3961 transitions. [2024-11-28 02:12:15,604 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 208 [2024-11-28 02:12:15,604 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 02:12:15,604 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 02:12:15,604 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable31 [2024-11-28 02:12:15,605 INFO L396 AbstractCegarLoop]: === Iteration 33 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 02:12:15,605 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 02:12:15,605 INFO L85 PathProgramCache]: Analyzing trace with hash 1888517149, now seen corresponding path program 1 times [2024-11-28 02:12:15,605 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 02:12:15,605 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1740302266] [2024-11-28 02:12:15,605 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:12:15,606 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 02:12:16,181 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 02:12:16,629 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 25 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-28 02:12:16,630 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 02:12:16,630 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1740302266] [2024-11-28 02:12:16,630 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1740302266] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 02:12:16,630 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 02:12:16,630 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2024-11-28 02:12:16,630 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1232200588] [2024-11-28 02:12:16,630 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 02:12:16,630 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2024-11-28 02:12:16,630 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 02:12:16,631 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2024-11-28 02:12:16,631 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=43, Unknown=0, NotChecked=0, Total=56 [2024-11-28 02:12:16,631 INFO L87 Difference]: Start difference. First operand 2804 states and 3961 transitions. Second operand has 8 states, 8 states have (on average 25.875) internal successors, (207), 8 states have internal predecessors, (207), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 02:12:16,790 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 02:12:16,790 INFO L93 Difference]: Finished difference Result 5760 states and 8176 transitions. [2024-11-28 02:12:16,791 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2024-11-28 02:12:16,791 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 25.875) internal successors, (207), 8 states have internal predecessors, (207), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 207 [2024-11-28 02:12:16,791 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 02:12:16,796 INFO L225 Difference]: With dead ends: 5760 [2024-11-28 02:12:16,796 INFO L226 Difference]: Without dead ends: 4495 [2024-11-28 02:12:16,798 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=25, Invalid=85, Unknown=0, NotChecked=0, Total=110 [2024-11-28 02:12:16,799 INFO L435 NwaCegarLoop]: 521 mSDtfsCounter, 220 mSDsluCounter, 3055 mSDsCounter, 0 mSdLazyCounter, 85 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 220 SdHoareTripleChecker+Valid, 3576 SdHoareTripleChecker+Invalid, 86 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 85 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-28 02:12:16,799 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [220 Valid, 3576 Invalid, 86 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 85 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-28 02:12:16,802 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4495 states. [2024-11-28 02:12:16,839 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4495 to 3721. [2024-11-28 02:12:16,843 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3721 states, 3720 states have (on average 1.4201612903225806) internal successors, (5283), 3720 states have internal predecessors, (5283), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 02:12:16,848 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3721 states to 3721 states and 5283 transitions. [2024-11-28 02:12:16,849 INFO L78 Accepts]: Start accepts. Automaton has 3721 states and 5283 transitions. Word has length 207 [2024-11-28 02:12:16,849 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 02:12:16,849 INFO L471 AbstractCegarLoop]: Abstraction has 3721 states and 5283 transitions. [2024-11-28 02:12:16,849 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 25.875) internal successors, (207), 8 states have internal predecessors, (207), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 02:12:16,849 INFO L276 IsEmpty]: Start isEmpty. Operand 3721 states and 5283 transitions. [2024-11-28 02:12:16,852 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 208 [2024-11-28 02:12:16,852 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 02:12:16,852 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 02:12:16,852 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable32 [2024-11-28 02:12:16,852 INFO L396 AbstractCegarLoop]: === Iteration 34 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 02:12:16,853 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 02:12:16,853 INFO L85 PathProgramCache]: Analyzing trace with hash 1769956828, now seen corresponding path program 1 times [2024-11-28 02:12:16,853 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 02:12:16,853 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [989654646] [2024-11-28 02:12:16,853 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:12:16,853 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 02:12:17,350 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 02:12:17,697 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 25 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-28 02:12:17,697 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 02:12:17,697 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [989654646] [2024-11-28 02:12:17,697 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [989654646] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 02:12:17,698 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 02:12:17,698 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2024-11-28 02:12:17,698 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [973623197] [2024-11-28 02:12:17,698 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 02:12:17,698 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2024-11-28 02:12:17,698 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 02:12:17,699 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-11-28 02:12:17,699 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2024-11-28 02:12:17,699 INFO L87 Difference]: Start difference. First operand 3721 states and 5283 transitions. Second operand has 7 states, 7 states have (on average 29.571428571428573) internal successors, (207), 7 states have internal predecessors, (207), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 02:12:18,256 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 02:12:18,256 INFO L93 Difference]: Finished difference Result 7003 states and 9959 transitions. [2024-11-28 02:12:18,256 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2024-11-28 02:12:18,257 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 29.571428571428573) internal successors, (207), 7 states have internal predecessors, (207), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 207 [2024-11-28 02:12:18,257 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 02:12:18,263 INFO L225 Difference]: With dead ends: 7003 [2024-11-28 02:12:18,263 INFO L226 Difference]: Without dead ends: 3841 [2024-11-28 02:12:18,266 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2024-11-28 02:12:18,266 INFO L435 NwaCegarLoop]: 295 mSDtfsCounter, 374 mSDsluCounter, 1166 mSDsCounter, 0 mSdLazyCounter, 922 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 374 SdHoareTripleChecker+Valid, 1461 SdHoareTripleChecker+Invalid, 924 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 922 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2024-11-28 02:12:18,266 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [374 Valid, 1461 Invalid, 924 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 922 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2024-11-28 02:12:18,269 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3841 states. [2024-11-28 02:12:18,303 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3841 to 3841. [2024-11-28 02:12:18,307 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3841 states, 3840 states have (on average 1.41328125) internal successors, (5427), 3840 states have internal predecessors, (5427), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 02:12:18,312 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3841 states to 3841 states and 5427 transitions. [2024-11-28 02:12:18,313 INFO L78 Accepts]: Start accepts. Automaton has 3841 states and 5427 transitions. Word has length 207 [2024-11-28 02:12:18,313 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 02:12:18,313 INFO L471 AbstractCegarLoop]: Abstraction has 3841 states and 5427 transitions. [2024-11-28 02:12:18,313 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 29.571428571428573) internal successors, (207), 7 states have internal predecessors, (207), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 02:12:18,313 INFO L276 IsEmpty]: Start isEmpty. Operand 3841 states and 5427 transitions. [2024-11-28 02:12:18,315 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 208 [2024-11-28 02:12:18,316 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 02:12:18,316 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 02:12:18,316 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable33 [2024-11-28 02:12:18,316 INFO L396 AbstractCegarLoop]: === Iteration 35 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 02:12:18,316 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 02:12:18,317 INFO L85 PathProgramCache]: Analyzing trace with hash 1650059929, now seen corresponding path program 1 times [2024-11-28 02:12:18,317 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 02:12:18,317 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1120156416] [2024-11-28 02:12:18,317 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:12:18,317 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 02:12:19,720 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 02:12:25,342 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 9 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-28 02:12:25,342 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 02:12:25,342 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1120156416] [2024-11-28 02:12:25,342 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1120156416] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-28 02:12:25,342 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1989230386] [2024-11-28 02:12:25,343 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:12:25,343 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-28 02:12:25,343 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_222ce6d4-5b40-4d76-abe1-0d226bb9524c/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 02:12:25,345 INFO L229 MonitoredProcess]: Starting monitored process 15 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_222ce6d4-5b40-4d76-abe1-0d226bb9524c/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-28 02:12:25,346 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_222ce6d4-5b40-4d76-abe1-0d226bb9524c/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Waiting until timeout for monitored process [2024-11-28 02:12:26,991 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 02:12:26,998 INFO L256 TraceCheckSpWp]: Trace formula consists of 1634 conjuncts, 23 conjuncts are in the unsatisfiable core [2024-11-28 02:12:27,003 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-28 02:12:27,325 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 25 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-28 02:12:27,325 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-11-28 02:12:27,325 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1989230386] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 02:12:27,325 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-11-28 02:12:27,325 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [19] total 26 [2024-11-28 02:12:27,325 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2059055997] [2024-11-28 02:12:27,325 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 02:12:27,326 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 9 states [2024-11-28 02:12:27,326 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 02:12:27,326 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2024-11-28 02:12:27,326 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=77, Invalid=573, Unknown=0, NotChecked=0, Total=650 [2024-11-28 02:12:27,327 INFO L87 Difference]: Start difference. First operand 3841 states and 5427 transitions. Second operand has 9 states, 9 states have (on average 23.0) internal successors, (207), 9 states have internal predecessors, (207), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 02:12:28,023 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 02:12:28,023 INFO L93 Difference]: Finished difference Result 5843 states and 8279 transitions. [2024-11-28 02:12:28,024 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2024-11-28 02:12:28,024 INFO L78 Accepts]: Start accepts. Automaton has has 9 states, 9 states have (on average 23.0) internal successors, (207), 9 states have internal predecessors, (207), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 207 [2024-11-28 02:12:28,024 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 02:12:28,027 INFO L225 Difference]: With dead ends: 5843 [2024-11-28 02:12:28,027 INFO L226 Difference]: Without dead ends: 3755 [2024-11-28 02:12:28,028 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 226 GetRequests, 202 SyntacticMatches, 0 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 108 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=77, Invalid=573, Unknown=0, NotChecked=0, Total=650 [2024-11-28 02:12:28,029 INFO L435 NwaCegarLoop]: 290 mSDtfsCounter, 392 mSDsluCounter, 1422 mSDsCounter, 0 mSdLazyCounter, 1141 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 392 SdHoareTripleChecker+Valid, 1712 SdHoareTripleChecker+Invalid, 1142 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 1141 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.7s IncrementalHoareTripleChecker+Time [2024-11-28 02:12:28,029 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [392 Valid, 1712 Invalid, 1142 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 1141 Invalid, 0 Unknown, 0 Unchecked, 0.7s Time] [2024-11-28 02:12:28,031 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3755 states. [2024-11-28 02:12:28,064 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3755 to 3755. [2024-11-28 02:12:28,068 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3755 states, 3754 states have (on average 1.4115610015982951) internal successors, (5299), 3754 states have internal predecessors, (5299), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 02:12:28,074 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3755 states to 3755 states and 5299 transitions. [2024-11-28 02:12:28,074 INFO L78 Accepts]: Start accepts. Automaton has 3755 states and 5299 transitions. Word has length 207 [2024-11-28 02:12:28,074 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 02:12:28,074 INFO L471 AbstractCegarLoop]: Abstraction has 3755 states and 5299 transitions. [2024-11-28 02:12:28,074 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 9 states, 9 states have (on average 23.0) internal successors, (207), 9 states have internal predecessors, (207), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 02:12:28,074 INFO L276 IsEmpty]: Start isEmpty. Operand 3755 states and 5299 transitions. [2024-11-28 02:12:28,077 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 208 [2024-11-28 02:12:28,077 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 02:12:28,077 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 02:12:28,093 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_222ce6d4-5b40-4d76-abe1-0d226bb9524c/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Forceful destruction successful, exit code 0 [2024-11-28 02:12:28,278 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 15 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_222ce6d4-5b40-4d76-abe1-0d226bb9524c/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable34 [2024-11-28 02:12:28,278 INFO L396 AbstractCegarLoop]: === Iteration 36 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 02:12:28,279 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 02:12:28,279 INFO L85 PathProgramCache]: Analyzing trace with hash -453696040, now seen corresponding path program 1 times [2024-11-28 02:12:28,279 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 02:12:28,279 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1485294043] [2024-11-28 02:12:28,279 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:12:28,279 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 02:12:28,929 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 02:12:29,882 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 11 proven. 14 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-28 02:12:29,882 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 02:12:29,882 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1485294043] [2024-11-28 02:12:29,882 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1485294043] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-28 02:12:29,882 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [264398914] [2024-11-28 02:12:29,882 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:12:29,882 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-28 02:12:29,882 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_222ce6d4-5b40-4d76-abe1-0d226bb9524c/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 02:12:29,884 INFO L229 MonitoredProcess]: Starting monitored process 16 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_222ce6d4-5b40-4d76-abe1-0d226bb9524c/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-28 02:12:29,885 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_222ce6d4-5b40-4d76-abe1-0d226bb9524c/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (16)] Waiting until timeout for monitored process [2024-11-28 02:12:31,609 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 02:12:31,618 INFO L256 TraceCheckSpWp]: Trace formula consists of 1636 conjuncts, 68 conjuncts are in the unsatisfiable core [2024-11-28 02:12:31,626 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-28 02:12:33,373 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 11 proven. 14 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-28 02:12:33,373 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-28 02:12:35,295 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 9 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-28 02:12:35,296 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [264398914] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-28 02:12:35,296 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-28 02:12:35,296 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 16, 16] total 39 [2024-11-28 02:12:35,296 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [158462688] [2024-11-28 02:12:35,296 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-28 02:12:35,296 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 39 states [2024-11-28 02:12:35,296 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 02:12:35,297 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 39 interpolants. [2024-11-28 02:12:35,298 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=173, Invalid=1309, Unknown=0, NotChecked=0, Total=1482 [2024-11-28 02:12:35,298 INFO L87 Difference]: Start difference. First operand 3755 states and 5299 transitions. Second operand has 39 states, 39 states have (on average 15.384615384615385) internal successors, (600), 39 states have internal predecessors, (600), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 02:12:40,359 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 02:12:40,359 INFO L93 Difference]: Finished difference Result 7472 states and 10649 transitions. [2024-11-28 02:12:40,359 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 49 states. [2024-11-28 02:12:40,359 INFO L78 Accepts]: Start accepts. Automaton has has 39 states, 39 states have (on average 15.384615384615385) internal successors, (600), 39 states have internal predecessors, (600), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 207 [2024-11-28 02:12:40,360 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 02:12:40,364 INFO L225 Difference]: With dead ends: 7472 [2024-11-28 02:12:40,364 INFO L226 Difference]: Without dead ends: 5868 [2024-11-28 02:12:40,367 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 472 GetRequests, 389 SyntacticMatches, 0 SemanticMatches, 83 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1919 ImplicationChecksByTransitivity, 1.9s TimeCoverageRelationStatistics Valid=985, Invalid=6155, Unknown=0, NotChecked=0, Total=7140 [2024-11-28 02:12:40,368 INFO L435 NwaCegarLoop]: 566 mSDtfsCounter, 3984 mSDsluCounter, 9988 mSDsCounter, 0 mSdLazyCounter, 6167 mSolverCounterSat, 13 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 3.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 3984 SdHoareTripleChecker+Valid, 10554 SdHoareTripleChecker+Invalid, 6180 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 13 IncrementalHoareTripleChecker+Valid, 6167 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 3.6s IncrementalHoareTripleChecker+Time [2024-11-28 02:12:40,368 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [3984 Valid, 10554 Invalid, 6180 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [13 Valid, 6167 Invalid, 0 Unknown, 0 Unchecked, 3.6s Time] [2024-11-28 02:12:40,373 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5868 states. [2024-11-28 02:12:40,422 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5868 to 4129. [2024-11-28 02:12:40,427 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4129 states, 4128 states have (on average 1.4140019379844961) internal successors, (5837), 4128 states have internal predecessors, (5837), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 02:12:40,432 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4129 states to 4129 states and 5837 transitions. [2024-11-28 02:12:40,433 INFO L78 Accepts]: Start accepts. Automaton has 4129 states and 5837 transitions. Word has length 207 [2024-11-28 02:12:40,433 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 02:12:40,433 INFO L471 AbstractCegarLoop]: Abstraction has 4129 states and 5837 transitions. [2024-11-28 02:12:40,433 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 39 states, 39 states have (on average 15.384615384615385) internal successors, (600), 39 states have internal predecessors, (600), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 02:12:40,433 INFO L276 IsEmpty]: Start isEmpty. Operand 4129 states and 5837 transitions. [2024-11-28 02:12:40,436 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 208 [2024-11-28 02:12:40,436 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 02:12:40,436 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 02:12:40,454 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_222ce6d4-5b40-4d76-abe1-0d226bb9524c/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (16)] Ended with exit code 0 [2024-11-28 02:12:40,637 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable35,16 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_222ce6d4-5b40-4d76-abe1-0d226bb9524c/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-28 02:12:40,637 INFO L396 AbstractCegarLoop]: === Iteration 37 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 02:12:40,638 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 02:12:40,638 INFO L85 PathProgramCache]: Analyzing trace with hash 962460915, now seen corresponding path program 1 times [2024-11-28 02:12:40,638 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 02:12:40,638 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [347017826] [2024-11-28 02:12:40,638 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:12:40,638 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 02:12:42,237 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 02:12:44,763 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 11 proven. 14 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-28 02:12:44,763 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 02:12:44,763 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [347017826] [2024-11-28 02:12:44,763 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [347017826] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-28 02:12:44,763 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [55406083] [2024-11-28 02:12:44,763 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:12:44,763 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-28 02:12:44,763 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_222ce6d4-5b40-4d76-abe1-0d226bb9524c/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 02:12:44,765 INFO L229 MonitoredProcess]: Starting monitored process 17 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_222ce6d4-5b40-4d76-abe1-0d226bb9524c/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-28 02:12:44,767 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_222ce6d4-5b40-4d76-abe1-0d226bb9524c/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (17)] Waiting until timeout for monitored process [2024-11-28 02:12:46,651 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 02:12:46,660 INFO L256 TraceCheckSpWp]: Trace formula consists of 1634 conjuncts, 112 conjuncts are in the unsatisfiable core [2024-11-28 02:12:46,668 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-28 02:12:49,671 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 11 proven. 14 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-28 02:12:49,672 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-28 02:12:54,336 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 9 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-28 02:12:54,336 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [55406083] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-28 02:12:54,336 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-28 02:12:54,337 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 20, 20] total 52 [2024-11-28 02:12:54,337 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [53286293] [2024-11-28 02:12:54,337 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-28 02:12:54,337 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 52 states [2024-11-28 02:12:54,337 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 02:12:54,338 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 52 interpolants. [2024-11-28 02:12:54,339 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=310, Invalid=2342, Unknown=0, NotChecked=0, Total=2652 [2024-11-28 02:12:54,339 INFO L87 Difference]: Start difference. First operand 4129 states and 5837 transitions. Second operand has 52 states, 52 states have (on average 11.538461538461538) internal successors, (600), 52 states have internal predecessors, (600), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 02:12:59,988 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 02:12:59,988 INFO L93 Difference]: Finished difference Result 11051 states and 15761 transitions. [2024-11-28 02:12:59,989 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 45 states. [2024-11-28 02:12:59,989 INFO L78 Accepts]: Start accepts. Automaton has has 52 states, 52 states have (on average 11.538461538461538) internal successors, (600), 52 states have internal predecessors, (600), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 207 [2024-11-28 02:12:59,989 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 02:12:59,995 INFO L225 Difference]: With dead ends: 11051 [2024-11-28 02:12:59,995 INFO L226 Difference]: Without dead ends: 8174 [2024-11-28 02:12:59,999 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 473 GetRequests, 380 SyntacticMatches, 1 SemanticMatches, 92 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2416 ImplicationChecksByTransitivity, 3.9s TimeCoverageRelationStatistics Valid=1249, Invalid=7493, Unknown=0, NotChecked=0, Total=8742 [2024-11-28 02:12:59,999 INFO L435 NwaCegarLoop]: 259 mSDtfsCounter, 7951 mSDsluCounter, 5407 mSDsCounter, 0 mSdLazyCounter, 4147 mSolverCounterSat, 44 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 2.9s Time, 0 mProtectedPredicate, 0 mProtectedAction, 7951 SdHoareTripleChecker+Valid, 5666 SdHoareTripleChecker+Invalid, 4191 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 44 IncrementalHoareTripleChecker+Valid, 4147 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 3.3s IncrementalHoareTripleChecker+Time [2024-11-28 02:13:00,000 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [7951 Valid, 5666 Invalid, 4191 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [44 Valid, 4147 Invalid, 0 Unknown, 0 Unchecked, 3.3s Time] [2024-11-28 02:13:00,003 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8174 states. [2024-11-28 02:13:00,047 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8174 to 6111. [2024-11-28 02:13:00,051 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6111 states, 6110 states have (on average 1.4158756137479542) internal successors, (8651), 6110 states have internal predecessors, (8651), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 02:13:00,058 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6111 states to 6111 states and 8651 transitions. [2024-11-28 02:13:00,058 INFO L78 Accepts]: Start accepts. Automaton has 6111 states and 8651 transitions. Word has length 207 [2024-11-28 02:13:00,058 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 02:13:00,058 INFO L471 AbstractCegarLoop]: Abstraction has 6111 states and 8651 transitions. [2024-11-28 02:13:00,058 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 52 states, 52 states have (on average 11.538461538461538) internal successors, (600), 52 states have internal predecessors, (600), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 02:13:00,058 INFO L276 IsEmpty]: Start isEmpty. Operand 6111 states and 8651 transitions. [2024-11-28 02:13:00,060 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 209 [2024-11-28 02:13:00,061 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 02:13:00,061 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 02:13:00,073 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_222ce6d4-5b40-4d76-abe1-0d226bb9524c/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (17)] Forceful destruction successful, exit code 0 [2024-11-28 02:13:00,261 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 17 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_222ce6d4-5b40-4d76-abe1-0d226bb9524c/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable36 [2024-11-28 02:13:00,261 INFO L396 AbstractCegarLoop]: === Iteration 38 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 02:13:00,262 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 02:13:00,262 INFO L85 PathProgramCache]: Analyzing trace with hash 223136114, now seen corresponding path program 1 times [2024-11-28 02:13:00,262 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 02:13:00,262 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [327889962] [2024-11-28 02:13:00,262 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:13:00,262 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 02:13:01,428 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 02:13:03,916 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 17 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-28 02:13:03,916 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 02:13:03,916 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [327889962] [2024-11-28 02:13:03,917 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [327889962] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-28 02:13:03,917 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [663688736] [2024-11-28 02:13:03,917 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:13:03,917 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-28 02:13:03,917 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_222ce6d4-5b40-4d76-abe1-0d226bb9524c/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 02:13:03,918 INFO L229 MonitoredProcess]: Starting monitored process 18 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_222ce6d4-5b40-4d76-abe1-0d226bb9524c/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-28 02:13:03,920 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_222ce6d4-5b40-4d76-abe1-0d226bb9524c/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (18)] Waiting until timeout for monitored process [2024-11-28 02:13:06,026 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 02:13:06,035 INFO L256 TraceCheckSpWp]: Trace formula consists of 1639 conjuncts, 89 conjuncts are in the unsatisfiable core [2024-11-28 02:13:06,044 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-28 02:13:06,987 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 15 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-28 02:13:06,987 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-28 02:13:29,009 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 15 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-28 02:13:29,009 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [663688736] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-28 02:13:29,010 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-28 02:13:29,010 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 18, 16] total 37 [2024-11-28 02:13:29,010 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [642448849] [2024-11-28 02:13:29,010 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-28 02:13:29,010 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 37 states [2024-11-28 02:13:29,011 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 02:13:29,011 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 37 interpolants. [2024-11-28 02:13:29,011 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=174, Invalid=1148, Unknown=10, NotChecked=0, Total=1332 [2024-11-28 02:13:29,012 INFO L87 Difference]: Start difference. First operand 6111 states and 8651 transitions. Second operand has 37 states, 37 states have (on average 13.64864864864865) internal successors, (505), 37 states have internal predecessors, (505), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 02:13:36,731 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 4.00s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [1] [2024-11-28 02:13:38,624 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 1.27s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [1] [2024-11-28 02:13:40,818 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 1.49s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [1] [2024-11-28 02:13:42,378 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 1.53s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [1] [2024-11-28 02:13:43,723 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 02:13:43,723 INFO L93 Difference]: Finished difference Result 24605 states and 35114 transitions. [2024-11-28 02:13:43,724 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 48 states. [2024-11-28 02:13:43,724 INFO L78 Accepts]: Start accepts. Automaton has has 37 states, 37 states have (on average 13.64864864864865) internal successors, (505), 37 states have internal predecessors, (505), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 208 [2024-11-28 02:13:43,724 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 02:13:43,735 INFO L225 Difference]: With dead ends: 24605 [2024-11-28 02:13:43,735 INFO L226 Difference]: Without dead ends: 20596 [2024-11-28 02:13:43,739 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 468 GetRequests, 388 SyntacticMatches, 5 SemanticMatches, 75 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1973 ImplicationChecksByTransitivity, 20.2s TimeCoverageRelationStatistics Valid=872, Invalid=4970, Unknown=10, NotChecked=0, Total=5852 [2024-11-28 02:13:43,739 INFO L435 NwaCegarLoop]: 311 mSDtfsCounter, 5432 mSDsluCounter, 6687 mSDsCounter, 0 mSdLazyCounter, 4531 mSolverCounterSat, 20 mSolverCounterUnsat, 5 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 12.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 5432 SdHoareTripleChecker+Valid, 6998 SdHoareTripleChecker+Invalid, 4556 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 20 IncrementalHoareTripleChecker+Valid, 4531 IncrementalHoareTripleChecker+Invalid, 5 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 12.6s IncrementalHoareTripleChecker+Time [2024-11-28 02:13:43,739 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [5432 Valid, 6998 Invalid, 4556 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [20 Valid, 4531 Invalid, 5 Unknown, 0 Unchecked, 12.6s Time] [2024-11-28 02:13:43,750 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20596 states. [2024-11-28 02:13:43,854 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20596 to 9163. [2024-11-28 02:13:43,859 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 9163 states, 9162 states have (on average 1.4120279414974897) internal successors, (12937), 9162 states have internal predecessors, (12937), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 02:13:43,867 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9163 states to 9163 states and 12937 transitions. [2024-11-28 02:13:43,867 INFO L78 Accepts]: Start accepts. Automaton has 9163 states and 12937 transitions. Word has length 208 [2024-11-28 02:13:43,868 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 02:13:43,868 INFO L471 AbstractCegarLoop]: Abstraction has 9163 states and 12937 transitions. [2024-11-28 02:13:43,868 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 37 states, 37 states have (on average 13.64864864864865) internal successors, (505), 37 states have internal predecessors, (505), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 02:13:43,868 INFO L276 IsEmpty]: Start isEmpty. Operand 9163 states and 12937 transitions. [2024-11-28 02:13:43,871 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 209 [2024-11-28 02:13:43,871 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 02:13:43,871 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 02:13:43,887 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_222ce6d4-5b40-4d76-abe1-0d226bb9524c/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (18)] Ended with exit code 0 [2024-11-28 02:13:44,072 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 18 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_222ce6d4-5b40-4d76-abe1-0d226bb9524c/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable37 [2024-11-28 02:13:44,072 INFO L396 AbstractCegarLoop]: === Iteration 39 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 02:13:44,072 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 02:13:44,072 INFO L85 PathProgramCache]: Analyzing trace with hash 1229174386, now seen corresponding path program 1 times [2024-11-28 02:13:44,072 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 02:13:44,072 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [298649994] [2024-11-28 02:13:44,072 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:13:44,073 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 02:13:44,198 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 02:13:44,530 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 25 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-28 02:13:44,530 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 02:13:44,530 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [298649994] [2024-11-28 02:13:44,530 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [298649994] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 02:13:44,531 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 02:13:44,531 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-11-28 02:13:44,531 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [9130283] [2024-11-28 02:13:44,531 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 02:13:44,531 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-11-28 02:13:44,531 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 02:13:44,532 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-11-28 02:13:44,532 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2024-11-28 02:13:44,532 INFO L87 Difference]: Start difference. First operand 9163 states and 12937 transitions. Second operand has 6 states, 6 states have (on average 34.666666666666664) internal successors, (208), 6 states have internal predecessors, (208), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 02:13:44,692 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 02:13:44,693 INFO L93 Difference]: Finished difference Result 17396 states and 24599 transitions. [2024-11-28 02:13:44,693 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-11-28 02:13:44,693 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 34.666666666666664) internal successors, (208), 6 states have internal predecessors, (208), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 208 [2024-11-28 02:13:44,693 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 02:13:44,702 INFO L225 Difference]: With dead ends: 17396 [2024-11-28 02:13:44,702 INFO L226 Difference]: Without dead ends: 8526 [2024-11-28 02:13:44,709 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=20, Invalid=36, Unknown=0, NotChecked=0, Total=56 [2024-11-28 02:13:44,710 INFO L435 NwaCegarLoop]: 465 mSDtfsCounter, 624 mSDsluCounter, 926 mSDsCounter, 0 mSdLazyCounter, 41 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 624 SdHoareTripleChecker+Valid, 1391 SdHoareTripleChecker+Invalid, 42 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 41 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-28 02:13:44,710 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [624 Valid, 1391 Invalid, 42 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 41 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-28 02:13:44,716 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8526 states. [2024-11-28 02:13:44,775 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8526 to 8526. [2024-11-28 02:13:44,781 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 8526 states, 8525 states have (on average 1.4117302052785923) internal successors, (12035), 8525 states have internal predecessors, (12035), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 02:13:44,788 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8526 states to 8526 states and 12035 transitions. [2024-11-28 02:13:44,789 INFO L78 Accepts]: Start accepts. Automaton has 8526 states and 12035 transitions. Word has length 208 [2024-11-28 02:13:44,789 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 02:13:44,789 INFO L471 AbstractCegarLoop]: Abstraction has 8526 states and 12035 transitions. [2024-11-28 02:13:44,789 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 34.666666666666664) internal successors, (208), 6 states have internal predecessors, (208), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 02:13:44,789 INFO L276 IsEmpty]: Start isEmpty. Operand 8526 states and 12035 transitions. [2024-11-28 02:13:44,793 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 209 [2024-11-28 02:13:44,793 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 02:13:44,793 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 02:13:44,793 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable38 [2024-11-28 02:13:44,794 INFO L396 AbstractCegarLoop]: === Iteration 40 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 02:13:44,794 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 02:13:44,794 INFO L85 PathProgramCache]: Analyzing trace with hash -260494791, now seen corresponding path program 1 times [2024-11-28 02:13:44,794 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 02:13:44,794 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [885936148] [2024-11-28 02:13:44,794 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:13:44,794 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 02:13:46,616 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-28 02:13:46,616 INFO L357 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-28 02:13:48,319 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-28 02:13:48,568 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-28 02:13:48,569 INFO L340 BasicCegarLoop]: Counterexample is feasible [2024-11-28 02:13:48,571 INFO L782 garLoopResultBuilder]: Registering result UNSAFE for location ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION (0 of 1 remaining) [2024-11-28 02:13:48,573 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable39 [2024-11-28 02:13:48,576 INFO L422 BasicCegarLoop]: Path program histogram: [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 02:13:48,818 INFO L170 ceAbstractionStarter]: Computing trace abstraction results [2024-11-28 02:13:48,823 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 28.11 02:13:48 BoogieIcfgContainer [2024-11-28 02:13:48,823 INFO L131 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2024-11-28 02:13:48,825 INFO L112 PluginConnector]: ------------------------Witness Printer---------------------------- [2024-11-28 02:13:48,825 INFO L270 PluginConnector]: Initializing Witness Printer... [2024-11-28 02:13:48,825 INFO L274 PluginConnector]: Witness Printer initialized [2024-11-28 02:13:48,826 INFO L184 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.11 02:08:54" (3/4) ... [2024-11-28 02:13:48,828 INFO L149 WitnessPrinter]: No result that supports witness generation found [2024-11-28 02:13:48,830 INFO L131 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2024-11-28 02:13:48,831 INFO L158 Benchmark]: Toolchain (without parser) took 298510.09ms. Allocated memory was 142.6MB in the beginning and 2.6GB in the end (delta: 2.4GB). Free memory was 116.1MB in the beginning and 2.4GB in the end (delta: -2.3GB). Peak memory consumption was 123.0MB. Max. memory is 16.1GB. [2024-11-28 02:13:48,831 INFO L158 Benchmark]: CDTParser took 0.39ms. Allocated memory is still 117.4MB. Free memory is still 73.7MB. There was no memory consumed. Max. memory is 16.1GB. [2024-11-28 02:13:48,831 INFO L158 Benchmark]: CACSL2BoogieTranslator took 840.36ms. Allocated memory is still 142.6MB. Free memory was 115.8MB in the beginning and 80.1MB in the end (delta: 35.8MB). Peak memory consumption was 33.6MB. Max. memory is 16.1GB. [2024-11-28 02:13:48,832 INFO L158 Benchmark]: Boogie Procedure Inliner took 226.56ms. Allocated memory is still 142.6MB. Free memory was 80.1MB in the beginning and 49.5MB in the end (delta: 30.6MB). Peak memory consumption was 33.6MB. Max. memory is 16.1GB. [2024-11-28 02:13:48,832 INFO L158 Benchmark]: Boogie Preprocessor took 341.71ms. Allocated memory is still 142.6MB. Free memory was 49.5MB in the beginning and 90.2MB in the end (delta: -40.7MB). Peak memory consumption was 47.0MB. Max. memory is 16.1GB. [2024-11-28 02:13:48,832 INFO L158 Benchmark]: RCFGBuilder took 2741.59ms. Allocated memory was 142.6MB in the beginning and 285.2MB in the end (delta: 142.6MB). Free memory was 90.2MB in the beginning and 126.9MB in the end (delta: -36.7MB). Peak memory consumption was 108.9MB. Max. memory is 16.1GB. [2024-11-28 02:13:48,833 INFO L158 Benchmark]: TraceAbstraction took 294345.89ms. Allocated memory was 285.2MB in the beginning and 2.6GB in the end (delta: 2.3GB). Free memory was 126.3MB in the beginning and 2.4GB in the end (delta: -2.3GB). Peak memory consumption was 1.5GB. Max. memory is 16.1GB. [2024-11-28 02:13:48,833 INFO L158 Benchmark]: Witness Printer took 6.23ms. Allocated memory is still 2.6GB. Free memory was 2.4GB in the beginning and 2.4GB in the end (delta: 230.3kB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. [2024-11-28 02:13:48,835 INFO L338 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.39ms. Allocated memory is still 117.4MB. Free memory is still 73.7MB. There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 840.36ms. Allocated memory is still 142.6MB. Free memory was 115.8MB in the beginning and 80.1MB in the end (delta: 35.8MB). Peak memory consumption was 33.6MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 226.56ms. Allocated memory is still 142.6MB. Free memory was 80.1MB in the beginning and 49.5MB in the end (delta: 30.6MB). Peak memory consumption was 33.6MB. Max. memory is 16.1GB. * Boogie Preprocessor took 341.71ms. Allocated memory is still 142.6MB. Free memory was 49.5MB in the beginning and 90.2MB in the end (delta: -40.7MB). Peak memory consumption was 47.0MB. Max. memory is 16.1GB. * RCFGBuilder took 2741.59ms. Allocated memory was 142.6MB in the beginning and 285.2MB in the end (delta: 142.6MB). Free memory was 90.2MB in the beginning and 126.9MB in the end (delta: -36.7MB). Peak memory consumption was 108.9MB. Max. memory is 16.1GB. * TraceAbstraction took 294345.89ms. Allocated memory was 285.2MB in the beginning and 2.6GB in the end (delta: 2.3GB). Free memory was 126.3MB in the beginning and 2.4GB in the end (delta: -2.3GB). Peak memory consumption was 1.5GB. Max. memory is 16.1GB. * Witness Printer took 6.23ms. Allocated memory is still 2.6GB. Free memory was 2.4GB in the beginning and 2.4GB in the end (delta: 230.3kB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: ErrorAutomatonStatistics NumberErrorTraces: 0, NumberStatementsAllTraces: 0, NumberRelevantStatements: 0, 0.0s ErrorAutomatonConstructionTimeTotal, 0.0s FaulLocalizationTime, NumberStatementsFirstTrace: -1, TraceLengthAvg: 0, 0.0s ErrorAutomatonConstructionTimeAvg, 0.0s ErrorAutomatonDifferenceTimeAvg, 0.0s ErrorAutomatonDifferenceTimeTotal, NumberOfNoEnhancement: 0, NumberOfFiniteEnhancement: 0, NumberOfInfiniteEnhancement: 0 - UnprovableResult [Line: 21]: Unable to prove that a call to reach_error is unreachable Unable to prove that a call to reach_error is unreachable Reason: overapproximation of bitwiseOr at line 320, overapproximation of bitwiseAnd at line 325, overapproximation of bitwiseAnd at line 404, overapproximation of bitwiseAnd at line 520, overapproximation of bitwiseAnd at line 760, overapproximation of bitwiseAnd at line 588. Possible FailurePath: [L26] const SORT_1 mask_SORT_1 = (SORT_1)-1 >> (sizeof(SORT_1) * 8 - 1); [L27] const SORT_1 msb_SORT_1 = (SORT_1)1 << (1 - 1); [L29] const SORT_3 mask_SORT_3 = (SORT_3)-1 >> (sizeof(SORT_3) * 8 - 16); [L30] const SORT_3 msb_SORT_3 = (SORT_3)1 << (16 - 1); [L32] const SORT_5 mask_SORT_5 = (SORT_5)-1 >> (sizeof(SORT_5) * 8 - 8); [L33] const SORT_5 msb_SORT_5 = (SORT_5)1 << (8 - 1); [L35] const SORT_7 mask_SORT_7 = (SORT_7)-1 >> (sizeof(SORT_7) * 8 - 5); [L36] const SORT_7 msb_SORT_7 = (SORT_7)1 << (5 - 1); [L38] const SORT_20 mask_SORT_20 = (SORT_20)-1 >> (sizeof(SORT_20) * 8 - 32); [L39] const SORT_20 msb_SORT_20 = (SORT_20)1 << (32 - 1); [L41] const SORT_51 mask_SORT_51 = (SORT_51)-1 >> (sizeof(SORT_51) * 8 - 6); [L42] const SORT_51 msb_SORT_51 = (SORT_51)1 << (6 - 1); [L44] const SORT_66 mask_SORT_66 = (SORT_66)-1 >> (sizeof(SORT_66) * 8 - 25); [L45] const SORT_66 msb_SORT_66 = (SORT_66)1 << (25 - 1); [L47] const SORT_68 mask_SORT_68 = (SORT_68)-1 >> (sizeof(SORT_68) * 8 - 7); [L48] const SORT_68 msb_SORT_68 = (SORT_68)1 << (7 - 1); [L50] const SORT_88 mask_SORT_88 = (SORT_88)-1 >> (sizeof(SORT_88) * 8 - 2); [L51] const SORT_88 msb_SORT_88 = (SORT_88)1 << (2 - 1); [L53] const SORT_126 mask_SORT_126 = (SORT_126)-1 >> (sizeof(SORT_126) * 8 - 3); [L54] const SORT_126 msb_SORT_126 = (SORT_126)1 << (3 - 1); [L56] const SORT_1 var_17 = 0; [L57] const SORT_20 var_22 = 1; [L58] const SORT_1 var_47 = 1; [L59] const SORT_51 var_52 = 0; [L60] const SORT_5 var_56 = 0; [L61] const SORT_5 var_61 = 2; [L62] const SORT_20 var_63 = 2; [L63] const SORT_66 var_67 = 0; [L64] const SORT_20 var_116 = 0; [L65] const SORT_51 var_254 = 33; [L66] const SORT_5 var_273 = 1; [L68] SORT_1 input_2; [L69] SORT_3 input_4; [L70] SORT_5 input_6; [L71] SORT_7 input_8; [L72] SORT_1 input_9; [L73] SORT_1 input_10; [L74] SORT_1 input_11; [L75] SORT_1 input_12; [L76] SORT_7 input_13; [L77] SORT_1 input_14; [L78] SORT_1 input_15; [L79] SORT_1 input_16; [L80] SORT_1 input_80; [L81] SORT_88 input_89; [L82] SORT_1 input_91; [L83] SORT_1 input_93; [L84] SORT_1 input_95; [L85] SORT_1 input_99; [L86] SORT_1 input_103; [L87] SORT_1 input_105; [L88] SORT_1 input_109; [L89] SORT_1 input_138; [L90] SORT_1 input_144; [L91] SORT_1 input_153; [L92] SORT_1 input_155; [L93] SORT_1 input_157; [L94] SORT_7 input_166; [L95] SORT_1 input_168; [L96] SORT_3 input_170; [L97] SORT_5 input_172; [L98] SORT_1 input_183; [L99] SORT_1 input_185; [L100] SORT_1 input_198; [L101] SORT_1 input_200; [L102] SORT_1 input_203; [L103] SORT_1 input_210; [L104] SORT_1 input_212; [L105] SORT_1 input_215; [L106] SORT_1 input_220; [L107] SORT_1 input_228; [L108] SORT_1 input_229; [L109] SORT_1 input_231; [L110] SORT_1 input_234; [L111] SORT_1 input_238; [L112] SORT_1 input_241; [L113] SORT_1 input_246; [L114] SORT_51 input_250; [L115] SORT_51 input_251; [L116] SORT_51 input_258; [L117] SORT_51 input_262; [L118] SORT_51 input_266; [L119] SORT_51 input_269; [L120] SORT_5 input_276; [L121] SORT_1 input_283; [L122] SORT_1 input_288; [L123] SORT_1 input_293; [L124] SORT_1 input_300; [L125] SORT_1 input_308; [L126] SORT_1 input_312; [L127] SORT_1 input_313; [L128] SORT_1 input_315; [L129] SORT_1 input_318; [L130] SORT_1 input_320; [L131] SORT_1 input_321; [L132] SORT_1 input_326; [L133] SORT_1 input_330; [L134] SORT_1 input_333; [L135] SORT_1 input_338; [L136] SORT_1 input_343; [L137] SORT_1 input_352; [L138] SORT_1 input_357; [L140] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_126=7, mask_SORT_1=1, mask_SORT_51=63, mask_SORT_5=255, mask_SORT_68=127, var_116=0, var_17=0, var_22=1, var_254=33, var_273=1, var_47=1, var_52=0, var_56=0, var_61=2, var_63=2, var_67=0] [L140] SORT_1 state_18 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L141] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_126=7, mask_SORT_1=1, mask_SORT_51=63, mask_SORT_5=255, mask_SORT_68=127, var_116=0, var_17=0, var_22=1, var_254=33, var_273=1, var_47=1, var_52=0, var_56=0, var_61=2, var_63=2, var_67=0] [L141] SORT_1 state_25 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L142] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_126=7, mask_SORT_1=1, mask_SORT_51=63, mask_SORT_5=255, mask_SORT_68=127, var_116=0, var_17=0, var_22=1, var_254=33, var_273=1, var_47=1, var_52=0, var_56=0, var_61=2, var_63=2, var_67=0] [L142] SORT_1 state_27 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L143] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_126=7, mask_SORT_1=1, mask_SORT_51=63, mask_SORT_5=255, mask_SORT_68=127, var_116=0, var_17=0, var_22=1, var_254=33, var_273=1, var_47=1, var_52=0, var_56=0, var_61=2, var_63=2, var_67=0] [L143] SORT_1 state_30 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L144] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_126=7, mask_SORT_1=1, mask_SORT_51=63, mask_SORT_5=255, mask_SORT_68=127, var_116=0, var_17=0, var_22=1, var_254=33, var_273=1, var_47=1, var_52=0, var_56=0, var_61=2, var_63=2, var_67=0] [L144] SORT_1 state_33 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L145] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_126=7, mask_SORT_1=1, mask_SORT_51=63, mask_SORT_5=255, mask_SORT_68=127, var_116=0, var_17=0, var_22=1, var_254=33, var_273=1, var_47=1, var_52=0, var_56=0, var_61=2, var_63=2, var_67=0] [L145] SORT_1 state_36 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L146] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_126=7, mask_SORT_1=1, mask_SORT_51=63, mask_SORT_5=255, mask_SORT_68=127, var_116=0, var_17=0, var_22=1, var_254=33, var_273=1, var_47=1, var_52=0, var_56=0, var_61=2, var_63=2, var_67=0] [L146] SORT_1 state_39 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L147] EXPR __VERIFIER_nondet_uchar() & mask_SORT_51 VAL [mask_SORT_126=7, mask_SORT_1=1, mask_SORT_51=63, mask_SORT_5=255, mask_SORT_68=127, var_116=0, var_17=0, var_22=1, var_254=33, var_273=1, var_47=1, var_52=0, var_56=0, var_61=2, var_63=2, var_67=0] [L147] SORT_51 state_53 = __VERIFIER_nondet_uchar() & mask_SORT_51; [L148] EXPR __VERIFIER_nondet_uchar() & mask_SORT_5 VAL [mask_SORT_126=7, mask_SORT_1=1, mask_SORT_51=63, mask_SORT_5=255, mask_SORT_68=127, var_116=0, var_17=0, var_22=1, var_254=33, var_273=1, var_47=1, var_52=0, var_56=0, var_61=2, var_63=2, var_67=0] [L148] SORT_5 state_57 = __VERIFIER_nondet_uchar() & mask_SORT_5; [L149] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_126=7, mask_SORT_1=1, mask_SORT_51=63, mask_SORT_5=255, mask_SORT_68=127, var_116=0, var_17=0, var_22=1, var_254=33, var_273=1, var_47=1, var_52=0, var_56=0, var_61=2, var_63=2, var_67=0] [L149] SORT_1 state_74 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L150] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_126=7, mask_SORT_1=1, mask_SORT_51=63, mask_SORT_5=255, mask_SORT_68=127, var_116=0, var_17=0, var_22=1, var_254=33, var_273=1, var_47=1, var_52=0, var_56=0, var_61=2, var_63=2, var_67=0] [L150] SORT_1 state_84 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L151] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_126=7, mask_SORT_1=1, mask_SORT_51=63, mask_SORT_5=255, mask_SORT_68=127, var_116=0, var_17=0, var_22=1, var_254=33, var_273=1, var_47=1, var_52=0, var_56=0, var_61=2, var_63=2, var_67=0] [L151] SORT_1 state_86 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L152] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_126=7, mask_SORT_1=1, mask_SORT_51=63, mask_SORT_5=255, mask_SORT_68=127, var_116=0, var_17=0, var_22=1, var_254=33, var_273=1, var_47=1, var_52=0, var_56=0, var_61=2, var_63=2, var_67=0] [L152] SORT_1 state_97 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L153] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_126=7, mask_SORT_1=1, mask_SORT_51=63, mask_SORT_5=255, mask_SORT_68=127, var_116=0, var_17=0, var_22=1, var_254=33, var_273=1, var_47=1, var_52=0, var_56=0, var_61=2, var_63=2, var_67=0] [L153] SORT_1 state_101 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L154] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_126=7, mask_SORT_1=1, mask_SORT_51=63, mask_SORT_5=255, mask_SORT_68=127, var_116=0, var_17=0, var_22=1, var_254=33, var_273=1, var_47=1, var_52=0, var_56=0, var_61=2, var_63=2, var_67=0] [L154] SORT_1 state_107 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L155] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_126=7, mask_SORT_1=1, mask_SORT_51=63, mask_SORT_5=255, mask_SORT_68=127, var_116=0, var_17=0, var_22=1, var_254=33, var_273=1, var_47=1, var_52=0, var_56=0, var_61=2, var_63=2, var_67=0] [L155] SORT_1 state_111 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L156] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_126=7, mask_SORT_1=1, mask_SORT_51=63, mask_SORT_5=255, mask_SORT_68=127, var_116=0, var_17=0, var_22=1, var_254=33, var_273=1, var_47=1, var_52=0, var_56=0, var_61=2, var_63=2, var_67=0] [L156] SORT_1 state_140 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L157] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_126=7, mask_SORT_1=1, mask_SORT_51=63, mask_SORT_5=255, mask_SORT_68=127, var_116=0, var_17=0, var_22=1, var_254=33, var_273=1, var_47=1, var_52=0, var_56=0, var_61=2, var_63=2, var_67=0] [L157] SORT_1 state_142 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L158] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_126=7, mask_SORT_1=1, mask_SORT_51=63, mask_SORT_5=255, mask_SORT_68=127, var_116=0, var_17=0, var_22=1, var_254=33, var_273=1, var_47=1, var_52=0, var_56=0, var_61=2, var_63=2, var_67=0] [L158] SORT_1 state_146 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L159] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_126=7, mask_SORT_1=1, mask_SORT_51=63, mask_SORT_5=255, mask_SORT_68=127, var_116=0, var_17=0, var_22=1, var_254=33, var_273=1, var_47=1, var_52=0, var_56=0, var_61=2, var_63=2, var_67=0] [L159] SORT_1 state_148 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L160] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_126=7, mask_SORT_1=1, mask_SORT_51=63, mask_SORT_5=255, mask_SORT_68=127, var_116=0, var_17=0, var_22=1, var_254=33, var_273=1, var_47=1, var_52=0, var_56=0, var_61=2, var_63=2, var_67=0] [L160] SORT_1 state_174 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L161] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_126=7, mask_SORT_1=1, mask_SORT_51=63, mask_SORT_5=255, mask_SORT_68=127, var_116=0, var_17=0, var_22=1, var_254=33, var_273=1, var_47=1, var_52=0, var_56=0, var_61=2, var_63=2, var_67=0] [L161] SORT_1 state_176 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L162] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_126=7, mask_SORT_1=1, mask_SORT_51=63, mask_SORT_5=255, mask_SORT_68=127, var_116=0, var_17=0, var_22=1, var_254=33, var_273=1, var_47=1, var_52=0, var_56=0, var_61=2, var_63=2, var_67=0] [L162] SORT_1 state_187 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L163] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_126=7, mask_SORT_1=1, mask_SORT_51=63, mask_SORT_5=255, mask_SORT_68=127, var_116=0, var_17=0, var_22=1, var_254=33, var_273=1, var_47=1, var_52=0, var_56=0, var_61=2, var_63=2, var_67=0] [L163] SORT_1 state_189 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L165] SORT_1 init_19_arg_1 = var_17; [L166] state_18 = init_19_arg_1 [L167] SORT_1 init_26_arg_1 = var_17; [L168] state_25 = init_26_arg_1 [L169] SORT_1 init_28_arg_1 = var_17; [L170] state_27 = init_28_arg_1 [L171] SORT_1 init_31_arg_1 = var_17; [L172] state_30 = init_31_arg_1 [L173] SORT_1 init_34_arg_1 = var_17; [L174] state_33 = init_34_arg_1 [L175] SORT_1 init_37_arg_1 = var_17; [L176] state_36 = init_37_arg_1 [L177] SORT_1 init_40_arg_1 = var_17; [L178] state_39 = init_40_arg_1 [L179] SORT_51 init_54_arg_1 = var_52; [L180] state_53 = init_54_arg_1 [L181] SORT_5 init_58_arg_1 = var_56; [L182] state_57 = init_58_arg_1 [L183] SORT_1 init_75_arg_1 = var_17; [L184] state_74 = init_75_arg_1 [L185] SORT_1 init_85_arg_1 = var_17; [L186] state_84 = init_85_arg_1 [L187] SORT_1 init_87_arg_1 = var_17; [L188] state_86 = init_87_arg_1 [L189] SORT_1 init_98_arg_1 = var_17; [L190] state_97 = init_98_arg_1 [L191] SORT_1 init_102_arg_1 = var_17; [L192] state_101 = init_102_arg_1 [L193] SORT_1 init_108_arg_1 = var_17; [L194] state_107 = init_108_arg_1 [L195] SORT_1 init_112_arg_1 = var_17; [L196] state_111 = init_112_arg_1 [L197] SORT_1 init_141_arg_1 = var_17; [L198] state_140 = init_141_arg_1 [L199] SORT_1 init_143_arg_1 = var_17; [L200] state_142 = init_143_arg_1 [L201] SORT_1 init_147_arg_1 = var_17; [L202] state_146 = init_147_arg_1 [L203] SORT_1 init_149_arg_1 = var_17; [L204] state_148 = init_149_arg_1 [L205] SORT_1 init_175_arg_1 = var_17; [L206] state_174 = init_175_arg_1 [L207] SORT_1 init_177_arg_1 = var_17; [L208] state_176 = init_177_arg_1 [L209] SORT_1 init_188_arg_1 = var_17; [L210] state_187 = init_188_arg_1 [L211] SORT_1 init_190_arg_1 = var_17; [L212] state_189 = init_190_arg_1 VAL [mask_SORT_126=7, mask_SORT_1=1, mask_SORT_51=63, mask_SORT_5=255, mask_SORT_68=127, state_101=0, state_107=0, state_111=0, state_140=0, state_142=0, state_146=0, state_148=0, state_174=0, state_176=0, state_187=0, state_189=0, state_18=0, state_25=0, state_27=0, state_30=0, state_33=0, state_36=0, state_39=0, state_53=0, state_57=0, state_74=0, state_84=0, state_86=0, state_97=0, var_116=0, var_17=0, var_22=1, var_254=33, var_273=1, var_47=1, var_52=0, var_56=0, var_61=2, var_63=2, var_67=0] [L215] input_2 = __VERIFIER_nondet_uchar() [L216] input_4 = __VERIFIER_nondet_ushort() [L217] input_6 = __VERIFIER_nondet_uchar() [L218] input_8 = __VERIFIER_nondet_uchar() [L219] input_9 = __VERIFIER_nondet_uchar() [L220] input_10 = __VERIFIER_nondet_uchar() [L221] input_11 = __VERIFIER_nondet_uchar() [L222] input_12 = __VERIFIER_nondet_uchar() [L223] EXPR input_12 & mask_SORT_1 VAL [mask_SORT_126=7, mask_SORT_1=1, mask_SORT_51=63, mask_SORT_5=255, mask_SORT_68=127, state_101=0, state_107=0, state_111=0, state_140=0, state_142=0, state_146=0, state_148=0, state_174=0, state_176=0, state_187=0, state_189=0, state_18=0, state_25=0, state_27=0, state_30=0, state_33=0, state_36=0, state_39=0, state_53=0, state_57=0, state_74=0, state_84=0, state_86=0, state_97=0, var_116=0, var_17=0, var_22=1, var_254=33, var_273=1, var_47=1, var_52=0, var_56=0, var_61=2, var_63=2, var_67=0] [L223] input_12 = input_12 & mask_SORT_1 [L224] input_13 = __VERIFIER_nondet_uchar() [L225] input_14 = __VERIFIER_nondet_uchar() [L226] input_15 = __VERIFIER_nondet_uchar() [L227] input_16 = __VERIFIER_nondet_uchar() [L228] input_80 = __VERIFIER_nondet_uchar() [L229] input_89 = __VERIFIER_nondet_uchar() [L230] input_91 = __VERIFIER_nondet_uchar() [L231] input_93 = __VERIFIER_nondet_uchar() [L232] input_95 = __VERIFIER_nondet_uchar() [L233] input_99 = __VERIFIER_nondet_uchar() [L234] input_103 = __VERIFIER_nondet_uchar() [L235] input_105 = __VERIFIER_nondet_uchar() [L236] input_109 = __VERIFIER_nondet_uchar() [L237] input_138 = __VERIFIER_nondet_uchar() [L238] input_144 = __VERIFIER_nondet_uchar() [L239] input_153 = __VERIFIER_nondet_uchar() [L240] input_155 = __VERIFIER_nondet_uchar() [L241] input_157 = __VERIFIER_nondet_uchar() [L242] input_166 = __VERIFIER_nondet_uchar() [L243] input_168 = __VERIFIER_nondet_uchar() [L244] input_170 = __VERIFIER_nondet_ushort() [L245] input_172 = __VERIFIER_nondet_uchar() [L246] input_183 = __VERIFIER_nondet_uchar() [L247] input_185 = __VERIFIER_nondet_uchar() [L248] input_198 = __VERIFIER_nondet_uchar() [L249] input_200 = __VERIFIER_nondet_uchar() [L250] input_203 = __VERIFIER_nondet_uchar() [L251] input_210 = __VERIFIER_nondet_uchar() [L252] input_212 = __VERIFIER_nondet_uchar() [L253] input_215 = __VERIFIER_nondet_uchar() [L254] input_220 = __VERIFIER_nondet_uchar() [L255] input_228 = __VERIFIER_nondet_uchar() [L256] input_229 = __VERIFIER_nondet_uchar() [L257] input_231 = __VERIFIER_nondet_uchar() [L258] input_234 = __VERIFIER_nondet_uchar() [L259] input_238 = __VERIFIER_nondet_uchar() [L260] input_241 = __VERIFIER_nondet_uchar() [L261] input_246 = __VERIFIER_nondet_uchar() [L262] input_250 = __VERIFIER_nondet_uchar() [L263] input_251 = __VERIFIER_nondet_uchar() [L264] input_258 = __VERIFIER_nondet_uchar() [L265] input_262 = __VERIFIER_nondet_uchar() [L266] input_266 = __VERIFIER_nondet_uchar() [L267] input_269 = __VERIFIER_nondet_uchar() [L268] input_276 = __VERIFIER_nondet_uchar() [L269] input_283 = __VERIFIER_nondet_uchar() [L270] input_288 = __VERIFIER_nondet_uchar() [L271] input_293 = __VERIFIER_nondet_uchar() [L272] input_300 = __VERIFIER_nondet_uchar() [L273] input_308 = __VERIFIER_nondet_uchar() [L274] input_312 = __VERIFIER_nondet_uchar() [L275] input_313 = __VERIFIER_nondet_uchar() [L276] input_315 = __VERIFIER_nondet_uchar() [L277] input_318 = __VERIFIER_nondet_uchar() [L278] input_320 = __VERIFIER_nondet_uchar() [L279] input_321 = __VERIFIER_nondet_uchar() [L280] input_326 = __VERIFIER_nondet_uchar() [L281] input_330 = __VERIFIER_nondet_uchar() [L282] input_333 = __VERIFIER_nondet_uchar() [L283] input_338 = __VERIFIER_nondet_uchar() [L284] input_343 = __VERIFIER_nondet_uchar() [L285] input_352 = __VERIFIER_nondet_uchar() [L286] input_357 = __VERIFIER_nondet_uchar() [L289] SORT_1 var_21_arg_0 = state_18; VAL [input_12=0, mask_SORT_126=7, mask_SORT_1=1, mask_SORT_51=63, mask_SORT_5=255, mask_SORT_68=127, state_101=0, state_107=0, state_111=0, state_140=0, state_142=0, state_146=0, state_148=0, state_174=0, state_176=0, state_187=0, state_189=0, state_25=0, state_27=0, state_30=0, state_33=0, state_36=0, state_39=0, state_53=0, state_57=0, state_74=0, state_84=0, state_86=0, state_97=0, var_116=0, var_17=0, var_21_arg_0=0, var_22=1, var_254=33, var_273=1, var_47=1, var_52=0, var_56=0, var_61=2, var_63=2, var_67=0] [L290] EXPR var_21_arg_0 & mask_SORT_1 VAL [input_12=0, mask_SORT_126=7, mask_SORT_1=1, mask_SORT_51=63, mask_SORT_5=255, mask_SORT_68=127, state_101=0, state_107=0, state_111=0, state_140=0, state_142=0, state_146=0, state_148=0, state_174=0, state_176=0, state_187=0, state_189=0, state_25=0, state_27=0, state_30=0, state_33=0, state_36=0, state_39=0, state_53=0, state_57=0, state_74=0, state_84=0, state_86=0, state_97=0, var_116=0, var_17=0, var_22=1, var_254=33, var_273=1, var_47=1, var_52=0, var_56=0, var_61=2, var_63=2, var_67=0] [L290] var_21_arg_0 = var_21_arg_0 & mask_SORT_1 [L291] SORT_20 var_21 = var_21_arg_0; [L292] SORT_20 var_23_arg_0 = var_21; [L293] SORT_20 var_23_arg_1 = var_22; [L294] SORT_1 var_23 = var_23_arg_0 == var_23_arg_1; [L295] SORT_1 var_24_arg_0 = var_23; [L296] SORT_1 var_24 = ~var_24_arg_0; [L297] SORT_1 var_29_arg_0 = state_25; [L298] SORT_1 var_29_arg_1 = state_27; VAL [input_12=0, mask_SORT_126=7, mask_SORT_1=1, mask_SORT_51=63, mask_SORT_5=255, mask_SORT_68=127, state_101=0, state_107=0, state_111=0, state_140=0, state_142=0, state_146=0, state_148=0, state_174=0, state_176=0, state_187=0, state_189=0, state_25=0, state_27=0, state_30=0, state_33=0, state_36=0, state_39=0, state_53=0, state_57=0, state_74=0, state_84=0, state_86=0, state_97=0, var_116=0, var_17=0, var_22=1, var_24=-1, var_254=33, var_273=1, var_29_arg_0=0, var_29_arg_1=0, var_47=1, var_52=0, var_56=0, var_61=2, var_63=2, var_67=0] [L299] EXPR var_29_arg_0 | var_29_arg_1 VAL [input_12=0, mask_SORT_126=7, mask_SORT_1=1, mask_SORT_51=63, mask_SORT_5=255, mask_SORT_68=127, state_101=0, state_107=0, state_111=0, state_140=0, state_142=0, state_146=0, state_148=0, state_174=0, state_176=0, state_187=0, state_189=0, state_25=0, state_27=0, state_30=0, state_33=0, state_36=0, state_39=0, state_53=0, state_57=0, state_74=0, state_84=0, state_86=0, state_97=0, var_116=0, var_17=0, var_22=1, var_24=-1, var_254=33, var_273=1, var_47=1, var_52=0, var_56=0, var_61=2, var_63=2, var_67=0] [L299] SORT_1 var_29 = var_29_arg_0 | var_29_arg_1; [L300] SORT_1 var_32_arg_0 = var_29; [L301] SORT_1 var_32_arg_1 = state_30; VAL [input_12=0, mask_SORT_126=7, mask_SORT_1=1, mask_SORT_51=63, mask_SORT_5=255, mask_SORT_68=127, state_101=0, state_107=0, state_111=0, state_140=0, state_142=0, state_146=0, state_148=0, state_174=0, state_176=0, state_187=0, state_189=0, state_25=0, state_27=0, state_30=0, state_33=0, state_36=0, state_39=0, state_53=0, state_57=0, state_74=0, state_84=0, state_86=0, state_97=0, var_116=0, var_17=0, var_22=1, var_24=-1, var_254=33, var_273=1, var_32_arg_0=0, var_32_arg_1=0, var_47=1, var_52=0, var_56=0, var_61=2, var_63=2, var_67=0] [L302] EXPR var_32_arg_0 | var_32_arg_1 VAL [input_12=0, mask_SORT_126=7, mask_SORT_1=1, mask_SORT_51=63, mask_SORT_5=255, mask_SORT_68=127, state_101=0, state_107=0, state_111=0, state_140=0, state_142=0, state_146=0, state_148=0, state_174=0, state_176=0, state_187=0, state_189=0, state_25=0, state_27=0, state_30=0, state_33=0, state_36=0, state_39=0, state_53=0, state_57=0, state_74=0, state_84=0, state_86=0, state_97=0, var_116=0, var_17=0, var_22=1, var_24=-1, var_254=33, var_273=1, var_47=1, var_52=0, var_56=0, var_61=2, var_63=2, var_67=0] [L302] SORT_1 var_32 = var_32_arg_0 | var_32_arg_1; [L303] SORT_1 var_35_arg_0 = var_32; [L304] SORT_1 var_35_arg_1 = state_33; VAL [input_12=0, mask_SORT_126=7, mask_SORT_1=1, mask_SORT_51=63, mask_SORT_5=255, mask_SORT_68=127, state_101=0, state_107=0, state_111=0, state_140=0, state_142=0, state_146=0, state_148=0, state_174=0, state_176=0, state_187=0, state_189=0, state_25=0, state_27=0, state_30=0, state_33=0, state_36=0, state_39=0, state_53=0, state_57=0, state_74=0, state_84=0, state_86=0, state_97=0, var_116=0, var_17=0, var_22=1, var_24=-1, var_254=33, var_273=1, var_35_arg_0=0, var_35_arg_1=0, var_47=1, var_52=0, var_56=0, var_61=2, var_63=2, var_67=0] [L305] EXPR var_35_arg_0 | var_35_arg_1 VAL [input_12=0, mask_SORT_126=7, mask_SORT_1=1, mask_SORT_51=63, mask_SORT_5=255, mask_SORT_68=127, state_101=0, state_107=0, state_111=0, state_140=0, state_142=0, state_146=0, state_148=0, state_174=0, state_176=0, state_187=0, state_189=0, state_25=0, state_27=0, state_30=0, state_33=0, state_36=0, state_39=0, state_53=0, state_57=0, state_74=0, state_84=0, state_86=0, state_97=0, var_116=0, var_17=0, var_22=1, var_24=-1, var_254=33, var_273=1, var_47=1, var_52=0, var_56=0, var_61=2, var_63=2, var_67=0] [L305] SORT_1 var_35 = var_35_arg_0 | var_35_arg_1; [L306] SORT_1 var_38_arg_0 = var_35; [L307] SORT_1 var_38_arg_1 = state_36; VAL [input_12=0, mask_SORT_126=7, mask_SORT_1=1, mask_SORT_51=63, mask_SORT_5=255, mask_SORT_68=127, state_101=0, state_107=0, state_111=0, state_140=0, state_142=0, state_146=0, state_148=0, state_174=0, state_176=0, state_187=0, state_189=0, state_25=0, state_27=0, state_30=0, state_33=0, state_36=0, state_39=0, state_53=0, state_57=0, state_74=0, state_84=0, state_86=0, state_97=0, var_116=0, var_17=0, var_22=1, var_24=-1, var_254=33, var_273=1, var_38_arg_0=0, var_38_arg_1=0, var_47=1, var_52=0, var_56=0, var_61=2, var_63=2, var_67=0] [L308] EXPR var_38_arg_0 | var_38_arg_1 VAL [input_12=0, mask_SORT_126=7, mask_SORT_1=1, mask_SORT_51=63, mask_SORT_5=255, mask_SORT_68=127, state_101=0, state_107=0, state_111=0, state_140=0, state_142=0, state_146=0, state_148=0, state_174=0, state_176=0, state_187=0, state_189=0, state_25=0, state_27=0, state_30=0, state_33=0, state_36=0, state_39=0, state_53=0, state_57=0, state_74=0, state_84=0, state_86=0, state_97=0, var_116=0, var_17=0, var_22=1, var_24=-1, var_254=33, var_273=1, var_47=1, var_52=0, var_56=0, var_61=2, var_63=2, var_67=0] [L308] SORT_1 var_38 = var_38_arg_0 | var_38_arg_1; [L309] SORT_1 var_41_arg_0 = var_38; [L310] SORT_1 var_41_arg_1 = state_39; VAL [input_12=0, mask_SORT_126=7, mask_SORT_1=1, mask_SORT_51=63, mask_SORT_5=255, mask_SORT_68=127, state_101=0, state_107=0, state_111=0, state_140=0, state_142=0, state_146=0, state_148=0, state_174=0, state_176=0, state_187=0, state_189=0, state_25=0, state_27=0, state_30=0, state_33=0, state_36=0, state_39=0, state_53=0, state_57=0, state_74=0, state_84=0, state_86=0, state_97=0, var_116=0, var_17=0, var_22=1, var_24=-1, var_254=33, var_273=1, var_41_arg_0=0, var_41_arg_1=0, var_47=1, var_52=0, var_56=0, var_61=2, var_63=2, var_67=0] [L311] EXPR var_41_arg_0 | var_41_arg_1 VAL [input_12=0, mask_SORT_126=7, mask_SORT_1=1, mask_SORT_51=63, mask_SORT_5=255, mask_SORT_68=127, state_101=0, state_107=0, state_111=0, state_140=0, state_142=0, state_146=0, state_148=0, state_174=0, state_176=0, state_187=0, state_189=0, state_25=0, state_27=0, state_30=0, state_33=0, state_36=0, state_39=0, state_53=0, state_57=0, state_74=0, state_84=0, state_86=0, state_97=0, var_116=0, var_17=0, var_22=1, var_24=-1, var_254=33, var_273=1, var_47=1, var_52=0, var_56=0, var_61=2, var_63=2, var_67=0] [L311] SORT_1 var_41 = var_41_arg_0 | var_41_arg_1; [L312] SORT_1 var_42_arg_0 = var_41; VAL [input_12=0, mask_SORT_126=7, mask_SORT_1=1, mask_SORT_51=63, mask_SORT_5=255, mask_SORT_68=127, state_101=0, state_107=0, state_111=0, state_140=0, state_142=0, state_146=0, state_148=0, state_174=0, state_176=0, state_187=0, state_189=0, state_25=0, state_27=0, state_30=0, state_33=0, state_36=0, state_39=0, state_53=0, state_57=0, state_74=0, state_84=0, state_86=0, state_97=0, var_116=0, var_17=0, var_22=1, var_24=-1, var_254=33, var_273=1, var_42_arg_0=0, var_47=1, var_52=0, var_56=0, var_61=2, var_63=2, var_67=0] [L313] EXPR var_42_arg_0 & mask_SORT_1 VAL [input_12=0, mask_SORT_126=7, mask_SORT_1=1, mask_SORT_51=63, mask_SORT_5=255, mask_SORT_68=127, state_101=0, state_107=0, state_111=0, state_140=0, state_142=0, state_146=0, state_148=0, state_174=0, state_176=0, state_187=0, state_189=0, state_25=0, state_27=0, state_30=0, state_33=0, state_36=0, state_39=0, state_53=0, state_57=0, state_74=0, state_84=0, state_86=0, state_97=0, var_116=0, var_17=0, var_22=1, var_24=-1, var_254=33, var_273=1, var_47=1, var_52=0, var_56=0, var_61=2, var_63=2, var_67=0] [L313] var_42_arg_0 = var_42_arg_0 & mask_SORT_1 [L314] SORT_20 var_42 = var_42_arg_0; [L315] SORT_20 var_43_arg_0 = var_42; [L316] SORT_20 var_43_arg_1 = var_22; [L317] SORT_1 var_43 = var_43_arg_0 == var_43_arg_1; [L318] SORT_1 var_44_arg_0 = var_24; [L319] SORT_1 var_44_arg_1 = var_43; VAL [input_12=0, mask_SORT_126=7, mask_SORT_1=1, mask_SORT_51=63, mask_SORT_5=255, mask_SORT_68=127, state_101=0, state_107=0, state_111=0, state_140=0, state_142=0, state_146=0, state_148=0, state_174=0, state_176=0, state_187=0, state_189=0, state_25=0, state_27=0, state_30=0, state_33=0, state_36=0, state_39=0, state_53=0, state_57=0, state_74=0, state_84=0, state_86=0, state_97=0, var_116=0, var_17=0, var_22=1, var_254=33, var_273=1, var_44_arg_0=-1, var_44_arg_1=0, var_47=1, var_52=0, var_56=0, var_61=2, var_63=2, var_67=0] [L320] EXPR var_44_arg_0 | var_44_arg_1 VAL [input_12=0, mask_SORT_126=7, mask_SORT_1=1, mask_SORT_51=63, mask_SORT_5=255, mask_SORT_68=127, state_101=0, state_107=0, state_111=0, state_140=0, state_142=0, state_146=0, state_148=0, state_174=0, state_176=0, state_187=0, state_189=0, state_25=0, state_27=0, state_30=0, state_33=0, state_36=0, state_39=0, state_53=0, state_57=0, state_74=0, state_84=0, state_86=0, state_97=0, var_116=0, var_17=0, var_22=1, var_254=33, var_273=1, var_47=1, var_52=0, var_56=0, var_61=2, var_63=2, var_67=0] [L320] SORT_1 var_44 = var_44_arg_0 | var_44_arg_1; [L321] SORT_1 var_48_arg_0 = var_44; [L322] SORT_1 var_48 = ~var_48_arg_0; [L323] SORT_1 var_49_arg_0 = var_47; [L324] SORT_1 var_49_arg_1 = var_48; VAL [input_12=0, mask_SORT_126=7, mask_SORT_1=1, mask_SORT_51=63, mask_SORT_5=255, mask_SORT_68=127, state_101=0, state_107=0, state_111=0, state_140=0, state_142=0, state_146=0, state_148=0, state_174=0, state_176=0, state_187=0, state_189=0, state_25=0, state_27=0, state_30=0, state_33=0, state_36=0, state_39=0, state_53=0, state_57=0, state_74=0, state_84=0, state_86=0, state_97=0, var_116=0, var_17=0, var_22=1, var_254=33, var_273=1, var_47=1, var_49_arg_0=1, var_49_arg_1=-256, var_52=0, var_56=0, var_61=2, var_63=2, var_67=0] [L325] EXPR var_49_arg_0 & var_49_arg_1 VAL [input_12=0, mask_SORT_126=7, mask_SORT_1=1, mask_SORT_51=63, mask_SORT_5=255, mask_SORT_68=127, state_101=0, state_107=0, state_111=0, state_140=0, state_142=0, state_146=0, state_148=0, state_174=0, state_176=0, state_187=0, state_189=0, state_25=0, state_27=0, state_30=0, state_33=0, state_36=0, state_39=0, state_53=0, state_57=0, state_74=0, state_84=0, state_86=0, state_97=0, var_116=0, var_17=0, var_22=1, var_254=33, var_273=1, var_47=1, var_52=0, var_56=0, var_61=2, var_63=2, var_67=0] [L325] SORT_1 var_49 = var_49_arg_0 & var_49_arg_1; [L326] EXPR var_49 & mask_SORT_1 VAL [input_12=0, mask_SORT_126=7, mask_SORT_1=1, mask_SORT_51=63, mask_SORT_5=255, mask_SORT_68=127, state_101=0, state_107=0, state_111=0, state_140=0, state_142=0, state_146=0, state_148=0, state_174=0, state_176=0, state_187=0, state_189=0, state_25=0, state_27=0, state_30=0, state_33=0, state_36=0, state_39=0, state_53=0, state_57=0, state_74=0, state_84=0, state_86=0, state_97=0, var_116=0, var_17=0, var_22=1, var_254=33, var_273=1, var_47=1, var_52=0, var_56=0, var_61=2, var_63=2, var_67=0] [L326] var_49 = var_49 & mask_SORT_1 [L327] SORT_1 bad_50_arg_0 = var_49; [L328] CALL __VERIFIER_assert(!(bad_50_arg_0)) [L21] COND FALSE !(!(cond)) [L328] RET __VERIFIER_assert(!(bad_50_arg_0)) [L330] SORT_1 var_193_arg_0 = input_12; [L331] SORT_1 var_193_arg_1 = var_17; [L332] SORT_1 var_193_arg_2 = state_107; [L333] SORT_1 var_193 = var_193_arg_0 ? var_193_arg_1 : var_193_arg_2; [L334] SORT_1 next_194_arg_1 = var_193; [L335] SORT_1 var_195_arg_0 = state_189; [L336] SORT_1 var_195 = ~var_195_arg_0; [L337] SORT_1 var_196_arg_0 = state_187; [L338] SORT_1 var_196_arg_1 = var_195; VAL [input_12=0, mask_SORT_126=7, mask_SORT_1=1, mask_SORT_51=63, mask_SORT_5=255, mask_SORT_68=127, next_194_arg_1=0, state_101=0, state_107=0, state_111=0, state_140=0, state_142=0, state_146=0, state_148=0, state_174=0, state_176=0, state_25=0, state_27=0, state_30=0, state_33=0, state_36=0, state_39=0, state_53=0, state_57=0, state_74=0, state_84=0, state_86=0, state_97=0, var_116=0, var_17=0, var_196_arg_0=0, var_196_arg_1=-1, var_22=1, var_254=33, var_273=1, var_47=1, var_52=0, var_56=0, var_61=2, var_63=2, var_67=0] [L339] EXPR var_196_arg_0 & var_196_arg_1 VAL [input_12=0, mask_SORT_126=7, mask_SORT_1=1, mask_SORT_51=63, mask_SORT_5=255, mask_SORT_68=127, next_194_arg_1=0, state_101=0, state_107=0, state_111=0, state_140=0, state_142=0, state_146=0, state_148=0, state_174=0, state_176=0, state_25=0, state_27=0, state_30=0, state_33=0, state_36=0, state_39=0, state_53=0, state_57=0, state_74=0, state_84=0, state_86=0, state_97=0, var_116=0, var_17=0, var_22=1, var_254=33, var_273=1, var_47=1, var_52=0, var_56=0, var_61=2, var_63=2, var_67=0] [L339] SORT_1 var_196 = var_196_arg_0 & var_196_arg_1; [L340] EXPR var_196 & mask_SORT_1 VAL [input_12=0, mask_SORT_126=7, mask_SORT_1=1, mask_SORT_51=63, mask_SORT_5=255, mask_SORT_68=127, next_194_arg_1=0, state_101=0, state_107=0, state_111=0, state_140=0, state_142=0, state_146=0, state_148=0, state_174=0, state_176=0, state_25=0, state_27=0, state_30=0, state_33=0, state_36=0, state_39=0, state_53=0, state_57=0, state_74=0, state_84=0, state_86=0, state_97=0, var_116=0, var_17=0, var_22=1, var_254=33, var_273=1, var_47=1, var_52=0, var_56=0, var_61=2, var_63=2, var_67=0] [L340] var_196 = var_196 & mask_SORT_1 [L341] SORT_1 var_197_arg_0 = var_196; [L342] SORT_1 var_197_arg_1 = var_47; [L343] SORT_1 var_197_arg_2 = state_25; [L344] SORT_1 var_197 = var_197_arg_0 ? var_197_arg_1 : var_197_arg_2; [L345] SORT_1 var_199_arg_0 = state_33; [L346] SORT_1 var_199_arg_1 = input_198; [L347] SORT_1 var_199_arg_2 = var_197; [L348] SORT_1 var_199 = var_199_arg_0 ? var_199_arg_1 : var_199_arg_2; [L349] SORT_1 var_201_arg_0 = input_12; [L350] SORT_1 var_201_arg_1 = input_200; [L351] SORT_1 var_201_arg_2 = var_199; [L352] SORT_1 var_201 = var_201_arg_0 ? var_201_arg_1 : var_201_arg_2; [L353] SORT_1 var_202_arg_0 = state_33; [L354] SORT_1 var_202_arg_1 = var_17; [L355] SORT_1 var_202_arg_2 = var_201; [L356] SORT_1 var_202 = var_202_arg_0 ? var_202_arg_1 : var_202_arg_2; [L357] SORT_1 var_204_arg_0 = input_12; [L358] SORT_1 var_204_arg_1 = input_203; [L359] SORT_1 var_204_arg_2 = var_202; [L360] SORT_1 var_204 = var_204_arg_0 ? var_204_arg_1 : var_204_arg_2; [L361] SORT_1 var_205_arg_0 = input_12; [L362] SORT_1 var_205_arg_1 = var_17; [L363] SORT_1 var_205_arg_2 = var_204; [L364] SORT_1 var_205 = var_205_arg_0 ? var_205_arg_1 : var_205_arg_2; [L365] SORT_1 next_206_arg_1 = var_205; [L366] SORT_1 var_207_arg_0 = state_148; [L367] SORT_1 var_207 = ~var_207_arg_0; [L368] SORT_1 var_208_arg_0 = state_146; [L369] SORT_1 var_208_arg_1 = var_207; VAL [input_12=0, mask_SORT_126=7, mask_SORT_1=1, mask_SORT_51=63, mask_SORT_5=255, mask_SORT_68=127, next_194_arg_1=0, next_206_arg_1=0, state_101=0, state_107=0, state_111=0, state_140=0, state_142=0, state_174=0, state_176=0, state_25=0, state_27=0, state_30=0, state_33=0, state_36=0, state_39=0, state_53=0, state_57=0, state_74=0, state_84=0, state_86=0, state_97=0, var_116=0, var_17=0, var_208_arg_0=0, var_208_arg_1=-1, var_22=1, var_254=33, var_273=1, var_47=1, var_52=0, var_56=0, var_61=2, var_63=2, var_67=0] [L370] EXPR var_208_arg_0 & var_208_arg_1 VAL [input_12=0, mask_SORT_126=7, mask_SORT_1=1, mask_SORT_51=63, mask_SORT_5=255, mask_SORT_68=127, next_194_arg_1=0, next_206_arg_1=0, state_101=0, state_107=0, state_111=0, state_140=0, state_142=0, state_174=0, state_176=0, state_25=0, state_27=0, state_30=0, state_33=0, state_36=0, state_39=0, state_53=0, state_57=0, state_74=0, state_84=0, state_86=0, state_97=0, var_116=0, var_17=0, var_22=1, var_254=33, var_273=1, var_47=1, var_52=0, var_56=0, var_61=2, var_63=2, var_67=0] [L370] SORT_1 var_208 = var_208_arg_0 & var_208_arg_1; [L371] EXPR var_208 & mask_SORT_1 VAL [input_12=0, mask_SORT_126=7, mask_SORT_1=1, mask_SORT_51=63, mask_SORT_5=255, mask_SORT_68=127, next_194_arg_1=0, next_206_arg_1=0, state_101=0, state_107=0, state_111=0, state_140=0, state_142=0, state_174=0, state_176=0, state_25=0, state_27=0, state_30=0, state_33=0, state_36=0, state_39=0, state_53=0, state_57=0, state_74=0, state_84=0, state_86=0, state_97=0, var_116=0, var_17=0, var_22=1, var_254=33, var_273=1, var_47=1, var_52=0, var_56=0, var_61=2, var_63=2, var_67=0] [L371] var_208 = var_208 & mask_SORT_1 [L372] SORT_1 var_209_arg_0 = var_208; [L373] SORT_1 var_209_arg_1 = var_47; [L374] SORT_1 var_209_arg_2 = state_27; [L375] SORT_1 var_209 = var_209_arg_0 ? var_209_arg_1 : var_209_arg_2; [L376] SORT_1 var_211_arg_0 = state_33; [L377] SORT_1 var_211_arg_1 = input_210; [L378] SORT_1 var_211_arg_2 = var_209; [L379] SORT_1 var_211 = var_211_arg_0 ? var_211_arg_1 : var_211_arg_2; [L380] SORT_1 var_213_arg_0 = input_12; [L381] SORT_1 var_213_arg_1 = input_212; [L382] SORT_1 var_213_arg_2 = var_211; [L383] SORT_1 var_213 = var_213_arg_0 ? var_213_arg_1 : var_213_arg_2; [L384] SORT_1 var_214_arg_0 = state_33; [L385] SORT_1 var_214_arg_1 = var_17; [L386] SORT_1 var_214_arg_2 = var_213; [L387] SORT_1 var_214 = var_214_arg_0 ? var_214_arg_1 : var_214_arg_2; [L388] SORT_1 var_216_arg_0 = input_12; [L389] SORT_1 var_216_arg_1 = input_215; [L390] SORT_1 var_216_arg_2 = var_214; [L391] SORT_1 var_216 = var_216_arg_0 ? var_216_arg_1 : var_216_arg_2; [L392] SORT_1 var_217_arg_0 = input_12; [L393] SORT_1 var_217_arg_1 = var_17; [L394] SORT_1 var_217_arg_2 = var_216; [L395] SORT_1 var_217 = var_217_arg_0 ? var_217_arg_1 : var_217_arg_2; [L396] SORT_1 next_218_arg_1 = var_217; [L397] SORT_5 var_59_arg_0 = state_57; [L398] SORT_5 var_59_arg_1 = var_56; [L399] SORT_1 var_59 = var_59_arg_0 == var_59_arg_1; [L400] SORT_1 var_76_arg_0 = state_74; [L401] SORT_1 var_76 = ~var_76_arg_0; [L402] SORT_1 var_77_arg_0 = var_59; [L403] SORT_1 var_77_arg_1 = var_76; VAL [input_12=0, mask_SORT_126=7, mask_SORT_1=1, mask_SORT_51=63, mask_SORT_5=255, mask_SORT_68=127, next_194_arg_1=0, next_206_arg_1=0, next_218_arg_1=0, state_101=0, state_107=0, state_111=0, state_140=0, state_142=0, state_174=0, state_176=0, state_25=0, state_27=0, state_30=0, state_36=0, state_39=0, state_53=0, state_57=0, state_74=0, state_84=0, state_86=0, state_97=0, var_116=0, var_17=0, var_22=1, var_254=33, var_273=1, var_47=1, var_52=0, var_56=0, var_59=1, var_61=2, var_63=2, var_67=0, var_77_arg_0=1, var_77_arg_1=-1] [L404] EXPR var_77_arg_0 & var_77_arg_1 VAL [input_12=0, mask_SORT_126=7, mask_SORT_1=1, mask_SORT_51=63, mask_SORT_5=255, mask_SORT_68=127, next_194_arg_1=0, next_206_arg_1=0, next_218_arg_1=0, state_101=0, state_107=0, state_111=0, state_140=0, state_142=0, state_174=0, state_176=0, state_25=0, state_27=0, state_30=0, state_36=0, state_39=0, state_53=0, state_57=0, state_74=0, state_84=0, state_86=0, state_97=0, var_116=0, var_17=0, var_22=1, var_254=33, var_273=1, var_47=1, var_52=0, var_56=0, var_59=1, var_61=2, var_63=2, var_67=0] [L404] SORT_1 var_77 = var_77_arg_0 & var_77_arg_1; [L405] EXPR var_77 & mask_SORT_1 VAL [input_12=0, mask_SORT_126=7, mask_SORT_1=1, mask_SORT_51=63, mask_SORT_5=255, mask_SORT_68=127, next_194_arg_1=0, next_206_arg_1=0, next_218_arg_1=0, state_101=0, state_107=0, state_111=0, state_140=0, state_142=0, state_174=0, state_176=0, state_25=0, state_27=0, state_30=0, state_36=0, state_39=0, state_53=0, state_57=0, state_74=0, state_84=0, state_86=0, state_97=0, var_116=0, var_17=0, var_22=1, var_254=33, var_273=1, var_47=1, var_52=0, var_56=0, var_59=1, var_61=2, var_63=2, var_67=0] [L405] var_77 = var_77 & mask_SORT_1 [L406] SORT_1 var_219_arg_0 = var_77; [L407] SORT_1 var_219_arg_1 = input_15; [L408] SORT_1 var_219_arg_2 = state_30; [L409] SORT_1 var_219 = var_219_arg_0 ? var_219_arg_1 : var_219_arg_2; [L410] SORT_1 var_221_arg_0 = input_12; [L411] SORT_1 var_221_arg_1 = input_220; [L412] SORT_1 var_221_arg_2 = var_219; [L413] SORT_1 var_221 = var_221_arg_0 ? var_221_arg_1 : var_221_arg_2; [L414] SORT_1 var_222_arg_0 = input_12; [L415] SORT_1 var_222_arg_1 = var_17; [L416] SORT_1 var_222_arg_2 = var_221; [L417] SORT_1 var_222 = var_222_arg_0 ? var_222_arg_1 : var_222_arg_2; [L418] SORT_1 next_223_arg_1 = var_222; [L419] SORT_1 var_224_arg_0 = state_86; [L420] SORT_1 var_224 = ~var_224_arg_0; [L421] SORT_1 var_225_arg_0 = var_224; [L422] SORT_1 var_225_arg_1 = state_39; VAL [input_12=0, mask_SORT_126=7, mask_SORT_1=1, mask_SORT_51=63, mask_SORT_5=255, mask_SORT_68=127, next_194_arg_1=0, next_206_arg_1=0, next_218_arg_1=0, next_223_arg_1=1, state_101=0, state_107=0, state_111=0, state_140=0, state_142=0, state_174=0, state_176=0, state_25=0, state_27=0, state_30=0, state_36=0, state_39=0, state_53=0, state_57=0, state_74=0, state_84=0, state_86=0, state_97=0, var_116=0, var_17=0, var_225_arg_0=-1, var_225_arg_1=0, var_22=1, var_254=33, var_273=1, var_47=1, var_52=0, var_56=0, var_59=1, var_61=2, var_63=2, var_67=0, var_77=1] [L423] EXPR var_225_arg_0 & var_225_arg_1 VAL [input_12=0, mask_SORT_126=7, mask_SORT_1=1, mask_SORT_51=63, mask_SORT_5=255, mask_SORT_68=127, next_194_arg_1=0, next_206_arg_1=0, next_218_arg_1=0, next_223_arg_1=1, state_101=0, state_107=0, state_111=0, state_140=0, state_142=0, state_174=0, state_176=0, state_25=0, state_27=0, state_30=0, state_36=0, state_39=0, state_53=0, state_57=0, state_74=0, state_84=0, state_86=0, state_97=0, var_116=0, var_17=0, var_22=1, var_254=33, var_273=1, var_47=1, var_52=0, var_56=0, var_59=1, var_61=2, var_63=2, var_67=0, var_77=1] [L423] SORT_1 var_225 = var_225_arg_0 & var_225_arg_1; [L424] SORT_1 var_226_arg_0 = input_12; [L425] SORT_1 var_226_arg_1 = var_17; [L426] SORT_1 var_226_arg_2 = var_225; [L427] SORT_1 var_226 = var_226_arg_0 ? var_226_arg_1 : var_226_arg_2; VAL [input_12=0, mask_SORT_126=7, mask_SORT_1=1, mask_SORT_51=63, mask_SORT_5=255, mask_SORT_68=127, next_194_arg_1=0, next_206_arg_1=0, next_218_arg_1=0, next_223_arg_1=1, state_101=0, state_107=0, state_111=0, state_140=0, state_142=0, state_174=0, state_176=0, state_25=0, state_27=0, state_30=0, state_36=0, state_39=0, state_53=0, state_57=0, state_74=0, state_84=0, state_86=0, state_97=0, var_116=0, var_17=0, var_226=0, var_22=1, var_254=33, var_273=1, var_47=1, var_52=0, var_56=0, var_59=1, var_61=2, var_63=2, var_67=0, var_77=1] [L428] EXPR var_226 & mask_SORT_1 VAL [input_12=0, mask_SORT_126=7, mask_SORT_1=1, mask_SORT_51=63, mask_SORT_5=255, mask_SORT_68=127, next_194_arg_1=0, next_206_arg_1=0, next_218_arg_1=0, next_223_arg_1=1, state_101=0, state_107=0, state_111=0, state_140=0, state_142=0, state_174=0, state_176=0, state_25=0, state_27=0, state_30=0, state_36=0, state_39=0, state_53=0, state_57=0, state_74=0, state_84=0, state_86=0, state_97=0, var_116=0, var_17=0, var_22=1, var_254=33, var_273=1, var_47=1, var_52=0, var_56=0, var_59=1, var_61=2, var_63=2, var_67=0, var_77=1] [L428] var_226 = var_226 & mask_SORT_1 [L429] SORT_1 next_227_arg_1 = var_226; [L430] SORT_1 var_178_arg_0 = state_176; [L431] SORT_1 var_178 = ~var_178_arg_0; [L432] SORT_1 var_179_arg_0 = state_174; [L433] SORT_1 var_179_arg_1 = var_178; VAL [input_12=0, mask_SORT_126=7, mask_SORT_1=1, mask_SORT_51=63, mask_SORT_5=255, mask_SORT_68=127, next_194_arg_1=0, next_206_arg_1=0, next_218_arg_1=0, next_223_arg_1=1, next_227_arg_1=0, state_101=0, state_107=0, state_111=0, state_140=0, state_142=0, state_174=0, state_176=0, state_25=0, state_27=0, state_30=0, state_36=0, state_39=0, state_53=0, state_57=0, state_74=0, state_84=0, state_86=0, state_97=0, var_116=0, var_179_arg_0=0, var_179_arg_1=-1, var_17=0, var_22=1, var_254=33, var_273=1, var_47=1, var_52=0, var_56=0, var_59=1, var_61=2, var_63=2, var_67=0, var_77=1] [L434] EXPR var_179_arg_0 & var_179_arg_1 VAL [input_12=0, mask_SORT_126=7, mask_SORT_1=1, mask_SORT_51=63, mask_SORT_5=255, mask_SORT_68=127, next_194_arg_1=0, next_206_arg_1=0, next_218_arg_1=0, next_223_arg_1=1, next_227_arg_1=0, state_101=0, state_107=0, state_111=0, state_140=0, state_142=0, state_174=0, state_176=0, state_25=0, state_27=0, state_30=0, state_36=0, state_39=0, state_53=0, state_57=0, state_74=0, state_84=0, state_86=0, state_97=0, var_116=0, var_17=0, var_22=1, var_254=33, var_273=1, var_47=1, var_52=0, var_56=0, var_59=1, var_61=2, var_63=2, var_67=0, var_77=1] [L434] SORT_1 var_179 = var_179_arg_0 & var_179_arg_1; [L435] SORT_1 var_150_arg_0 = state_142; [L436] SORT_1 var_150 = ~var_150_arg_0; [L437] SORT_1 var_151_arg_0 = state_140; [L438] SORT_1 var_151_arg_1 = var_150; VAL [input_12=0, mask_SORT_126=7, mask_SORT_1=1, mask_SORT_51=63, mask_SORT_5=255, mask_SORT_68=127, next_194_arg_1=0, next_206_arg_1=0, next_218_arg_1=0, next_223_arg_1=1, next_227_arg_1=0, state_101=0, state_107=0, state_111=0, state_140=0, state_142=0, state_174=0, state_176=0, state_25=0, state_27=0, state_30=0, state_36=0, state_39=0, state_53=0, state_57=0, state_74=0, state_84=0, state_86=0, state_97=0, var_116=0, var_151_arg_0=0, var_151_arg_1=-1, var_179=0, var_17=0, var_22=1, var_254=33, var_273=1, var_47=1, var_52=0, var_56=0, var_59=1, var_61=2, var_63=2, var_67=0, var_77=1] [L439] EXPR var_151_arg_0 & var_151_arg_1 VAL [input_12=0, mask_SORT_126=7, mask_SORT_1=1, mask_SORT_51=63, mask_SORT_5=255, mask_SORT_68=127, next_194_arg_1=0, next_206_arg_1=0, next_218_arg_1=0, next_223_arg_1=1, next_227_arg_1=0, state_101=0, state_107=0, state_111=0, state_140=0, state_142=0, state_174=0, state_176=0, state_25=0, state_27=0, state_30=0, state_36=0, state_39=0, state_53=0, state_57=0, state_74=0, state_84=0, state_86=0, state_97=0, var_116=0, var_179=0, var_17=0, var_22=1, var_254=33, var_273=1, var_47=1, var_52=0, var_56=0, var_59=1, var_61=2, var_63=2, var_67=0, var_77=1] [L439] SORT_1 var_151 = var_151_arg_0 & var_151_arg_1; [L440] SORT_1 var_180_arg_0 = var_179; [L441] SORT_1 var_180_arg_1 = var_151; VAL [input_12=0, mask_SORT_126=7, mask_SORT_1=1, mask_SORT_51=63, mask_SORT_5=255, mask_SORT_68=127, next_194_arg_1=0, next_206_arg_1=0, next_218_arg_1=0, next_223_arg_1=1, next_227_arg_1=0, state_101=0, state_107=0, state_111=0, state_140=0, state_142=0, state_174=0, state_176=0, state_25=0, state_27=0, state_30=0, state_36=0, state_39=0, state_53=0, state_57=0, state_74=0, state_84=0, state_86=0, state_97=0, var_116=0, var_179=0, var_17=0, var_180_arg_0=0, var_180_arg_1=0, var_22=1, var_254=33, var_273=1, var_47=1, var_52=0, var_56=0, var_59=1, var_61=2, var_63=2, var_67=0, var_77=1] [L442] EXPR var_180_arg_0 | var_180_arg_1 VAL [input_12=0, mask_SORT_126=7, mask_SORT_1=1, mask_SORT_51=63, mask_SORT_5=255, mask_SORT_68=127, next_194_arg_1=0, next_206_arg_1=0, next_218_arg_1=0, next_223_arg_1=1, next_227_arg_1=0, state_101=0, state_107=0, state_111=0, state_140=0, state_142=0, state_174=0, state_176=0, state_25=0, state_27=0, state_30=0, state_36=0, state_39=0, state_53=0, state_57=0, state_74=0, state_84=0, state_86=0, state_97=0, var_116=0, var_179=0, var_17=0, var_22=1, var_254=33, var_273=1, var_47=1, var_52=0, var_56=0, var_59=1, var_61=2, var_63=2, var_67=0, var_77=1] [L442] SORT_1 var_180 = var_180_arg_0 | var_180_arg_1; [L443] SORT_1 var_159_arg_0 = state_36; [L444] SORT_1 var_159 = ~var_159_arg_0; [L445] SORT_1 var_160_arg_0 = state_30; [L446] SORT_1 var_160_arg_1 = var_159; VAL [input_12=0, mask_SORT_126=7, mask_SORT_1=1, mask_SORT_51=63, mask_SORT_5=255, mask_SORT_68=127, next_194_arg_1=0, next_206_arg_1=0, next_218_arg_1=0, next_223_arg_1=1, next_227_arg_1=0, state_101=0, state_107=0, state_111=0, state_140=0, state_142=0, state_174=0, state_176=0, state_25=0, state_27=0, state_36=0, state_39=0, state_53=0, state_57=0, state_74=0, state_84=0, state_86=0, state_97=0, var_116=0, var_160_arg_0=0, var_160_arg_1=-1, var_179=0, var_17=0, var_180=0, var_22=1, var_254=33, var_273=1, var_47=1, var_52=0, var_56=0, var_59=1, var_61=2, var_63=2, var_67=0, var_77=1] [L447] EXPR var_160_arg_0 & var_160_arg_1 VAL [input_12=0, mask_SORT_126=7, mask_SORT_1=1, mask_SORT_51=63, mask_SORT_5=255, mask_SORT_68=127, next_194_arg_1=0, next_206_arg_1=0, next_218_arg_1=0, next_223_arg_1=1, next_227_arg_1=0, state_101=0, state_107=0, state_111=0, state_140=0, state_142=0, state_174=0, state_176=0, state_25=0, state_27=0, state_36=0, state_39=0, state_53=0, state_57=0, state_74=0, state_84=0, state_86=0, state_97=0, var_116=0, var_179=0, var_17=0, var_180=0, var_22=1, var_254=33, var_273=1, var_47=1, var_52=0, var_56=0, var_59=1, var_61=2, var_63=2, var_67=0, var_77=1] [L447] SORT_1 var_160 = var_160_arg_0 & var_160_arg_1; [L448] SORT_1 var_161_arg_0 = state_84; [L449] SORT_1 var_161 = ~var_161_arg_0; [L450] SORT_1 var_162_arg_0 = var_160; [L451] SORT_1 var_162_arg_1 = var_161; VAL [input_12=0, mask_SORT_126=7, mask_SORT_1=1, mask_SORT_51=63, mask_SORT_5=255, mask_SORT_68=127, next_194_arg_1=0, next_206_arg_1=0, next_218_arg_1=0, next_223_arg_1=1, next_227_arg_1=0, state_101=0, state_107=0, state_111=0, state_140=0, state_142=0, state_174=0, state_176=0, state_25=0, state_27=0, state_36=0, state_39=0, state_53=0, state_57=0, state_74=0, state_84=0, state_86=0, state_97=0, var_116=0, var_162_arg_0=0, var_162_arg_1=-1, var_179=0, var_17=0, var_180=0, var_22=1, var_254=33, var_273=1, var_47=1, var_52=0, var_56=0, var_59=1, var_61=2, var_63=2, var_67=0, var_77=1] [L452] EXPR var_162_arg_0 & var_162_arg_1 VAL [input_12=0, mask_SORT_126=7, mask_SORT_1=1, mask_SORT_51=63, mask_SORT_5=255, mask_SORT_68=127, next_194_arg_1=0, next_206_arg_1=0, next_218_arg_1=0, next_223_arg_1=1, next_227_arg_1=0, state_101=0, state_107=0, state_111=0, state_140=0, state_142=0, state_174=0, state_176=0, state_25=0, state_27=0, state_36=0, state_39=0, state_53=0, state_57=0, state_74=0, state_84=0, state_86=0, state_97=0, var_116=0, var_179=0, var_17=0, var_180=0, var_22=1, var_254=33, var_273=1, var_47=1, var_52=0, var_56=0, var_59=1, var_61=2, var_63=2, var_67=0, var_77=1] [L452] SORT_1 var_162 = var_162_arg_0 & var_162_arg_1; [L453] SORT_1 var_163_arg_0 = state_86; [L454] SORT_1 var_163 = ~var_163_arg_0; [L455] SORT_1 var_164_arg_0 = var_162; [L456] SORT_1 var_164_arg_1 = var_163; VAL [input_12=0, mask_SORT_126=7, mask_SORT_1=1, mask_SORT_51=63, mask_SORT_5=255, mask_SORT_68=127, next_194_arg_1=0, next_206_arg_1=0, next_218_arg_1=0, next_223_arg_1=1, next_227_arg_1=0, state_101=0, state_107=0, state_111=0, state_140=0, state_142=0, state_174=0, state_176=0, state_25=0, state_27=0, state_36=0, state_39=0, state_53=0, state_57=0, state_74=0, state_84=0, state_86=0, state_97=0, var_116=0, var_164_arg_0=0, var_164_arg_1=-1, var_179=0, var_17=0, var_180=0, var_22=1, var_254=33, var_273=1, var_47=1, var_52=0, var_56=0, var_59=1, var_61=2, var_63=2, var_67=0, var_77=1] [L457] EXPR var_164_arg_0 & var_164_arg_1 VAL [input_12=0, mask_SORT_126=7, mask_SORT_1=1, mask_SORT_51=63, mask_SORT_5=255, mask_SORT_68=127, next_194_arg_1=0, next_206_arg_1=0, next_218_arg_1=0, next_223_arg_1=1, next_227_arg_1=0, state_101=0, state_107=0, state_111=0, state_140=0, state_142=0, state_174=0, state_176=0, state_25=0, state_27=0, state_36=0, state_39=0, state_53=0, state_57=0, state_74=0, state_84=0, state_86=0, state_97=0, var_116=0, var_179=0, var_17=0, var_180=0, var_22=1, var_254=33, var_273=1, var_47=1, var_52=0, var_56=0, var_59=1, var_61=2, var_63=2, var_67=0, var_77=1] [L457] SORT_1 var_164 = var_164_arg_0 & var_164_arg_1; [L458] SORT_1 var_181_arg_0 = var_180; [L459] SORT_1 var_181_arg_1 = var_164; VAL [input_12=0, mask_SORT_126=7, mask_SORT_1=1, mask_SORT_51=63, mask_SORT_5=255, mask_SORT_68=127, next_194_arg_1=0, next_206_arg_1=0, next_218_arg_1=0, next_223_arg_1=1, next_227_arg_1=0, state_101=0, state_107=0, state_111=0, state_140=0, state_142=0, state_174=0, state_176=0, state_25=0, state_27=0, state_36=0, state_39=0, state_53=0, state_57=0, state_74=0, state_84=0, state_86=0, state_97=0, var_116=0, var_179=0, var_17=0, var_181_arg_0=0, var_181_arg_1=0, var_22=1, var_254=33, var_273=1, var_47=1, var_52=0, var_56=0, var_59=1, var_61=2, var_63=2, var_67=0, var_77=1] [L460] EXPR var_181_arg_0 | var_181_arg_1 VAL [input_12=0, mask_SORT_126=7, mask_SORT_1=1, mask_SORT_51=63, mask_SORT_5=255, mask_SORT_68=127, next_194_arg_1=0, next_206_arg_1=0, next_218_arg_1=0, next_223_arg_1=1, next_227_arg_1=0, state_101=0, state_107=0, state_111=0, state_140=0, state_142=0, state_174=0, state_176=0, state_25=0, state_27=0, state_36=0, state_39=0, state_53=0, state_57=0, state_74=0, state_84=0, state_86=0, state_97=0, var_116=0, var_179=0, var_17=0, var_22=1, var_254=33, var_273=1, var_47=1, var_52=0, var_56=0, var_59=1, var_61=2, var_63=2, var_67=0, var_77=1] [L460] SORT_1 var_181 = var_181_arg_0 | var_181_arg_1; [L461] EXPR var_181 & mask_SORT_1 VAL [input_12=0, mask_SORT_126=7, mask_SORT_1=1, mask_SORT_51=63, mask_SORT_5=255, mask_SORT_68=127, next_194_arg_1=0, next_206_arg_1=0, next_218_arg_1=0, next_223_arg_1=1, next_227_arg_1=0, state_101=0, state_107=0, state_111=0, state_140=0, state_142=0, state_174=0, state_176=0, state_25=0, state_27=0, state_36=0, state_39=0, state_53=0, state_57=0, state_74=0, state_84=0, state_86=0, state_97=0, var_116=0, var_179=0, var_17=0, var_22=1, var_254=33, var_273=1, var_47=1, var_52=0, var_56=0, var_59=1, var_61=2, var_63=2, var_67=0, var_77=1] [L461] var_181 = var_181 & mask_SORT_1 [L462] SORT_51 var_82_arg_0 = state_53; [L463] SORT_1 var_82 = var_82_arg_0 == mask_SORT_51; [L464] SORT_1 var_230_arg_0 = var_82; [L465] SORT_1 var_230_arg_1 = var_17; [L466] SORT_1 var_230_arg_2 = state_36; [L467] SORT_1 var_230 = var_230_arg_0 ? var_230_arg_1 : var_230_arg_2; [L468] SORT_1 var_232_arg_0 = var_181; [L469] SORT_1 var_232_arg_1 = input_231; [L470] SORT_1 var_232_arg_2 = var_230; [L471] SORT_1 var_232 = var_232_arg_0 ? var_232_arg_1 : var_232_arg_2; [L472] SORT_1 var_233_arg_0 = var_77; [L473] SORT_1 var_233_arg_1 = var_232; [L474] SORT_1 var_233_arg_2 = input_229; [L475] SORT_1 var_233 = var_233_arg_0 ? var_233_arg_1 : var_233_arg_2; [L476] SORT_1 var_235_arg_0 = input_12; [L477] SORT_1 var_235_arg_1 = input_234; [L478] SORT_1 var_235_arg_2 = var_233; [L479] SORT_1 var_235 = var_235_arg_0 ? var_235_arg_1 : var_235_arg_2; [L480] SORT_1 var_236_arg_0 = var_181; [L481] SORT_1 var_236_arg_1 = var_47; [L482] SORT_1 var_236_arg_2 = var_235; [L483] SORT_1 var_236 = var_236_arg_0 ? var_236_arg_1 : var_236_arg_2; [L484] SORT_1 var_237_arg_0 = var_77; [L485] SORT_1 var_237_arg_1 = var_236; [L486] SORT_1 var_237_arg_2 = input_228; [L487] SORT_1 var_237 = var_237_arg_0 ? var_237_arg_1 : var_237_arg_2; [L488] SORT_1 var_239_arg_0 = input_12; [L489] SORT_1 var_239_arg_1 = input_238; [L490] SORT_1 var_239_arg_2 = var_237; [L491] SORT_1 var_239 = var_239_arg_0 ? var_239_arg_1 : var_239_arg_2; [L492] SORT_1 var_240_arg_0 = var_77; [L493] SORT_1 var_240_arg_1 = var_239; [L494] SORT_1 var_240_arg_2 = state_36; [L495] SORT_1 var_240 = var_240_arg_0 ? var_240_arg_1 : var_240_arg_2; [L496] SORT_1 var_242_arg_0 = input_12; [L497] SORT_1 var_242_arg_1 = input_241; [L498] SORT_1 var_242_arg_2 = var_240; [L499] SORT_1 var_242 = var_242_arg_0 ? var_242_arg_1 : var_242_arg_2; [L500] SORT_1 var_243_arg_0 = input_12; [L501] SORT_1 var_243_arg_1 = var_17; [L502] SORT_1 var_243_arg_2 = var_242; [L503] SORT_1 var_243 = var_243_arg_0 ? var_243_arg_1 : var_243_arg_2; [L504] SORT_1 next_244_arg_1 = var_243; [L505] SORT_1 var_245_arg_0 = var_77; [L506] SORT_1 var_245_arg_1 = state_36; [L507] SORT_1 var_245_arg_2 = state_39; [L508] SORT_1 var_245 = var_245_arg_0 ? var_245_arg_1 : var_245_arg_2; [L509] SORT_1 var_247_arg_0 = input_12; [L510] SORT_1 var_247_arg_1 = input_246; [L511] SORT_1 var_247_arg_2 = var_245; [L512] SORT_1 var_247 = var_247_arg_0 ? var_247_arg_1 : var_247_arg_2; [L513] SORT_1 var_248_arg_0 = input_12; [L514] SORT_1 var_248_arg_1 = var_17; [L515] SORT_1 var_248_arg_2 = var_247; [L516] SORT_1 var_248 = var_248_arg_0 ? var_248_arg_1 : var_248_arg_2; [L517] SORT_1 next_249_arg_1 = var_248; [L518] SORT_1 var_259_arg_0 = state_84; [L519] SORT_1 var_259 = ~var_259_arg_0; VAL [input_12=0, mask_SORT_126=7, mask_SORT_1=1, mask_SORT_51=63, mask_SORT_5=255, mask_SORT_68=127, next_194_arg_1=0, next_206_arg_1=0, next_218_arg_1=0, next_223_arg_1=1, next_227_arg_1=0, next_244_arg_1=0, next_249_arg_1=0, state_101=0, state_107=0, state_111=0, state_140=0, state_142=0, state_174=0, state_176=0, state_25=0, state_27=0, state_36=0, state_53=0, state_57=0, state_74=0, state_84=0, state_86=0, state_97=0, var_116=0, var_179=0, var_17=0, var_181=0, var_22=1, var_254=33, var_259=-1, var_273=1, var_47=1, var_52=0, var_56=0, var_59=1, var_61=2, var_63=2, var_67=0, var_77=1, var_82=0] [L520] EXPR var_259 & mask_SORT_1 VAL [input_12=0, mask_SORT_126=7, mask_SORT_1=1, mask_SORT_51=63, mask_SORT_5=255, mask_SORT_68=127, next_194_arg_1=0, next_206_arg_1=0, next_218_arg_1=0, next_223_arg_1=1, next_227_arg_1=0, next_244_arg_1=0, next_249_arg_1=0, state_101=0, state_107=0, state_111=0, state_140=0, state_142=0, state_174=0, state_176=0, state_25=0, state_27=0, state_36=0, state_53=0, state_57=0, state_74=0, state_84=0, state_86=0, state_97=0, var_116=0, var_179=0, var_17=0, var_181=0, var_22=1, var_254=33, var_273=1, var_47=1, var_52=0, var_56=0, var_59=1, var_61=2, var_63=2, var_67=0, var_77=1, var_82=0] [L520] var_259 = var_259 & mask_SORT_1 [L521] SORT_51 var_255_arg_0 = state_53; [L522] SORT_51 var_255_arg_1 = var_52; [L523] SORT_1 var_255 = var_255_arg_0 == var_255_arg_1; [L524] SORT_1 var_256_arg_0 = input_10; [L525] SORT_1 var_256_arg_1 = var_255; VAL [input_10=0, input_12=0, mask_SORT_126=7, mask_SORT_1=1, mask_SORT_51=63, mask_SORT_5=255, mask_SORT_68=127, next_194_arg_1=0, next_206_arg_1=0, next_218_arg_1=0, next_223_arg_1=1, next_227_arg_1=0, next_244_arg_1=0, next_249_arg_1=0, state_101=0, state_107=0, state_111=0, state_140=0, state_142=0, state_174=0, state_176=0, state_25=0, state_27=0, state_36=0, state_53=0, state_57=0, state_74=0, state_84=0, state_86=0, state_97=0, var_116=0, var_179=0, var_17=0, var_181=0, var_22=1, var_254=33, var_256_arg_0=0, var_256_arg_1=1, var_259=1, var_273=1, var_47=1, var_52=0, var_56=0, var_59=1, var_61=2, var_63=2, var_67=0, var_77=1, var_82=0] [L526] EXPR var_256_arg_0 & var_256_arg_1 VAL [input_10=0, input_12=0, mask_SORT_126=7, mask_SORT_1=1, mask_SORT_51=63, mask_SORT_5=255, mask_SORT_68=127, next_194_arg_1=0, next_206_arg_1=0, next_218_arg_1=0, next_223_arg_1=1, next_227_arg_1=0, next_244_arg_1=0, next_249_arg_1=0, state_101=0, state_107=0, state_111=0, state_140=0, state_142=0, state_174=0, state_176=0, state_25=0, state_27=0, state_36=0, state_53=0, state_57=0, state_74=0, state_84=0, state_86=0, state_97=0, var_116=0, var_179=0, var_17=0, var_181=0, var_22=1, var_254=33, var_259=1, var_273=1, var_47=1, var_52=0, var_56=0, var_59=1, var_61=2, var_63=2, var_67=0, var_77=1, var_82=0] [L526] SORT_1 var_256 = var_256_arg_0 & var_256_arg_1; [L527] EXPR var_256 & mask_SORT_1 VAL [input_10=0, input_12=0, mask_SORT_126=7, mask_SORT_1=1, mask_SORT_51=63, mask_SORT_5=255, mask_SORT_68=127, next_194_arg_1=0, next_206_arg_1=0, next_218_arg_1=0, next_223_arg_1=1, next_227_arg_1=0, next_244_arg_1=0, next_249_arg_1=0, state_101=0, state_107=0, state_111=0, state_140=0, state_142=0, state_174=0, state_176=0, state_25=0, state_27=0, state_36=0, state_53=0, state_57=0, state_74=0, state_84=0, state_86=0, state_97=0, var_116=0, var_179=0, var_17=0, var_181=0, var_22=1, var_254=33, var_259=1, var_273=1, var_47=1, var_52=0, var_56=0, var_59=1, var_61=2, var_63=2, var_67=0, var_77=1, var_82=0] [L527] var_256 = var_256 & mask_SORT_1 [L528] SORT_1 var_252_arg_0 = var_47; VAL [input_10=0, input_12=0, mask_SORT_126=7, mask_SORT_1=1, mask_SORT_51=63, mask_SORT_5=255, mask_SORT_68=127, next_194_arg_1=0, next_206_arg_1=0, next_218_arg_1=0, next_223_arg_1=1, next_227_arg_1=0, next_244_arg_1=0, next_249_arg_1=0, state_101=0, state_107=0, state_111=0, state_140=0, state_142=0, state_174=0, state_176=0, state_25=0, state_27=0, state_36=0, state_53=0, state_57=0, state_74=0, state_84=0, state_86=0, state_97=0, var_116=0, var_179=0, var_17=0, var_181=0, var_22=1, var_252_arg_0=1, var_254=33, var_256=0, var_259=1, var_273=1, var_47=1, var_52=0, var_56=0, var_59=1, var_61=2, var_63=2, var_67=0, var_77=1, var_82=0] [L529] EXPR var_252_arg_0 & mask_SORT_1 VAL [input_10=0, input_12=0, mask_SORT_126=7, mask_SORT_1=1, mask_SORT_51=63, mask_SORT_5=255, mask_SORT_68=127, next_194_arg_1=0, next_206_arg_1=0, next_218_arg_1=0, next_223_arg_1=1, next_227_arg_1=0, next_244_arg_1=0, next_249_arg_1=0, state_101=0, state_107=0, state_111=0, state_140=0, state_142=0, state_174=0, state_176=0, state_25=0, state_27=0, state_36=0, state_53=0, state_57=0, state_74=0, state_84=0, state_86=0, state_97=0, var_116=0, var_179=0, var_17=0, var_181=0, var_22=1, var_254=33, var_256=0, var_259=1, var_273=1, var_47=1, var_52=0, var_56=0, var_59=1, var_61=2, var_63=2, var_67=0, var_77=1, var_82=0] [L529] var_252_arg_0 = var_252_arg_0 & mask_SORT_1 [L530] SORT_51 var_252 = var_252_arg_0; [L531] SORT_51 var_253_arg_0 = state_53; [L532] SORT_51 var_253_arg_1 = var_252; [L533] SORT_51 var_253 = var_253_arg_0 + var_253_arg_1; [L534] SORT_1 var_257_arg_0 = var_256; [L535] SORT_51 var_257_arg_1 = var_254; [L536] SORT_51 var_257_arg_2 = var_253; [L537] SORT_51 var_257 = var_257_arg_0 ? var_257_arg_1 : var_257_arg_2; [L538] SORT_1 var_260_arg_0 = var_259; [L539] SORT_51 var_260_arg_1 = input_258; [L540] SORT_51 var_260_arg_2 = var_257; [L541] SORT_51 var_260 = var_260_arg_0 ? var_260_arg_1 : var_260_arg_2; [L542] SORT_1 var_261_arg_0 = var_77; [L543] SORT_51 var_261_arg_1 = var_260; [L544] SORT_51 var_261_arg_2 = input_251; [L545] SORT_51 var_261 = var_261_arg_0 ? var_261_arg_1 : var_261_arg_2; [L546] SORT_1 var_263_arg_0 = input_12; [L547] SORT_51 var_263_arg_1 = input_262; [L548] SORT_51 var_263_arg_2 = var_261; [L549] SORT_51 var_263 = var_263_arg_0 ? var_263_arg_1 : var_263_arg_2; [L550] SORT_1 var_264_arg_0 = var_259; [L551] SORT_51 var_264_arg_1 = var_52; [L552] SORT_51 var_264_arg_2 = var_263; [L553] SORT_51 var_264 = var_264_arg_0 ? var_264_arg_1 : var_264_arg_2; [L554] SORT_1 var_265_arg_0 = var_77; [L555] SORT_51 var_265_arg_1 = var_264; [L556] SORT_51 var_265_arg_2 = input_250; [L557] SORT_51 var_265 = var_265_arg_0 ? var_265_arg_1 : var_265_arg_2; [L558] SORT_1 var_267_arg_0 = input_12; [L559] SORT_51 var_267_arg_1 = input_266; [L560] SORT_51 var_267_arg_2 = var_265; [L561] SORT_51 var_267 = var_267_arg_0 ? var_267_arg_1 : var_267_arg_2; [L562] SORT_1 var_268_arg_0 = var_77; [L563] SORT_51 var_268_arg_1 = var_267; [L564] SORT_51 var_268_arg_2 = state_53; [L565] SORT_51 var_268 = var_268_arg_0 ? var_268_arg_1 : var_268_arg_2; [L566] SORT_1 var_270_arg_0 = input_12; [L567] SORT_51 var_270_arg_1 = input_269; [L568] SORT_51 var_270_arg_2 = var_268; [L569] SORT_51 var_270 = var_270_arg_0 ? var_270_arg_1 : var_270_arg_2; [L570] SORT_1 var_271_arg_0 = input_12; [L571] SORT_51 var_271_arg_1 = var_52; [L572] SORT_51 var_271_arg_2 = var_270; [L573] SORT_51 var_271 = var_271_arg_0 ? var_271_arg_1 : var_271_arg_2; VAL [input_10=0, input_12=0, mask_SORT_126=7, mask_SORT_1=1, mask_SORT_51=63, mask_SORT_5=255, mask_SORT_68=127, next_194_arg_1=0, next_206_arg_1=0, next_218_arg_1=0, next_223_arg_1=1, next_227_arg_1=0, next_244_arg_1=0, next_249_arg_1=0, state_101=0, state_107=0, state_111=0, state_140=0, state_142=0, state_174=0, state_176=0, state_25=0, state_27=0, state_36=0, state_53=0, state_57=0, state_74=0, state_84=0, state_86=0, state_97=0, var_116=0, var_179=0, var_17=0, var_181=0, var_22=1, var_254=33, var_271=0, var_273=1, var_47=1, var_52=0, var_56=0, var_59=1, var_61=2, var_63=2, var_67=0, var_77=1, var_82=0] [L574] EXPR var_271 & mask_SORT_51 VAL [input_10=0, input_12=0, mask_SORT_126=7, mask_SORT_1=1, mask_SORT_51=63, mask_SORT_5=255, mask_SORT_68=127, next_194_arg_1=0, next_206_arg_1=0, next_218_arg_1=0, next_223_arg_1=1, next_227_arg_1=0, next_244_arg_1=0, next_249_arg_1=0, state_101=0, state_107=0, state_111=0, state_140=0, state_142=0, state_174=0, state_176=0, state_25=0, state_27=0, state_36=0, state_53=0, state_57=0, state_74=0, state_84=0, state_86=0, state_97=0, var_116=0, var_179=0, var_17=0, var_181=0, var_22=1, var_254=33, var_273=1, var_47=1, var_52=0, var_56=0, var_59=1, var_61=2, var_63=2, var_67=0, var_77=1, var_82=0] [L574] var_271 = var_271 & mask_SORT_51 [L575] SORT_51 next_272_arg_1 = var_271; [L576] SORT_5 var_62_arg_0 = input_6; VAL [input_10=0, input_12=0, input_6=768, mask_SORT_126=7, mask_SORT_1=1, mask_SORT_51=63, mask_SORT_5=255, mask_SORT_68=127, next_194_arg_1=0, next_206_arg_1=0, next_218_arg_1=0, next_223_arg_1=1, next_227_arg_1=0, next_244_arg_1=0, next_249_arg_1=0, next_272_arg_1=0, state_101=0, state_107=0, state_111=0, state_140=0, state_142=0, state_174=0, state_176=0, state_25=0, state_27=0, state_36=0, state_53=0, state_57=0, state_74=0, state_84=0, state_86=0, state_97=0, var_116=0, var_179=0, var_17=0, var_181=0, var_22=1, var_254=33, var_273=1, var_47=1, var_52=0, var_56=0, var_59=1, var_61=2, var_62_arg_0=768, var_63=2, var_67=0, var_77=1, var_82=0] [L577] EXPR var_62_arg_0 & mask_SORT_5 VAL [input_10=0, input_12=0, input_6=768, mask_SORT_126=7, mask_SORT_1=1, mask_SORT_51=63, mask_SORT_5=255, mask_SORT_68=127, next_194_arg_1=0, next_206_arg_1=0, next_218_arg_1=0, next_223_arg_1=1, next_227_arg_1=0, next_244_arg_1=0, next_249_arg_1=0, next_272_arg_1=0, state_101=0, state_107=0, state_111=0, state_140=0, state_142=0, state_174=0, state_176=0, state_25=0, state_27=0, state_36=0, state_53=0, state_57=0, state_74=0, state_84=0, state_86=0, state_97=0, var_116=0, var_179=0, var_17=0, var_181=0, var_22=1, var_254=33, var_273=1, var_47=1, var_52=0, var_56=0, var_59=1, var_61=2, var_63=2, var_67=0, var_77=1, var_82=0] [L577] var_62_arg_0 = var_62_arg_0 & mask_SORT_5 [L578] SORT_20 var_62 = var_62_arg_0; [L579] SORT_20 var_64_arg_0 = var_62; [L580] SORT_20 var_64_arg_1 = var_63; [L581] SORT_1 var_64 = var_64_arg_0 < var_64_arg_1; [L582] SORT_1 var_65_arg_0 = var_64; [L583] SORT_5 var_65_arg_1 = var_61; [L584] SORT_5 var_65_arg_2 = input_6; [L585] SORT_5 var_65 = var_65_arg_0 ? var_65_arg_1 : var_65_arg_2; [L586] SORT_5 var_69_arg_0 = var_65; [L587] SORT_68 var_69 = var_69_arg_0 >> 1; VAL [input_10=0, input_12=0, mask_SORT_126=7, mask_SORT_1=1, mask_SORT_51=63, mask_SORT_5=255, mask_SORT_68=127, next_194_arg_1=0, next_206_arg_1=0, next_218_arg_1=0, next_223_arg_1=1, next_227_arg_1=0, next_244_arg_1=0, next_249_arg_1=0, next_272_arg_1=0, state_101=0, state_107=0, state_111=0, state_140=0, state_142=0, state_174=0, state_176=0, state_25=0, state_27=0, state_36=0, state_53=0, state_57=0, state_74=0, state_84=0, state_86=0, state_97=0, var_116=0, var_179=0, var_17=0, var_181=0, var_22=1, var_254=33, var_273=1, var_47=1, var_52=0, var_56=0, var_59=1, var_61=2, var_63=2, var_67=0, var_69=1, var_77=1, var_82=0] [L588] EXPR var_69 & mask_SORT_68 VAL [input_10=0, input_12=0, mask_SORT_126=7, mask_SORT_1=1, mask_SORT_51=63, mask_SORT_5=255, mask_SORT_68=127, next_194_arg_1=0, next_206_arg_1=0, next_218_arg_1=0, next_223_arg_1=1, next_227_arg_1=0, next_244_arg_1=0, next_249_arg_1=0, next_272_arg_1=0, state_101=0, state_107=0, state_111=0, state_140=0, state_142=0, state_174=0, state_176=0, state_25=0, state_27=0, state_36=0, state_53=0, state_57=0, state_74=0, state_84=0, state_86=0, state_97=0, var_116=0, var_179=0, var_17=0, var_181=0, var_22=1, var_254=33, var_273=1, var_47=1, var_52=0, var_56=0, var_59=1, var_61=2, var_63=2, var_67=0, var_77=1, var_82=0] [L588] var_69 = var_69 & mask_SORT_68 [L589] SORT_66 var_70_arg_0 = var_67; [L590] SORT_68 var_70_arg_1 = var_69; VAL [input_10=0, input_12=0, mask_SORT_126=7, mask_SORT_1=1, mask_SORT_51=63, mask_SORT_5=255, mask_SORT_68=127, next_194_arg_1=0, next_206_arg_1=0, next_218_arg_1=0, next_223_arg_1=1, next_227_arg_1=0, next_244_arg_1=0, next_249_arg_1=0, next_272_arg_1=0, state_101=0, state_107=0, state_111=0, state_140=0, state_142=0, state_174=0, state_176=0, state_25=0, state_27=0, state_36=0, state_53=0, state_57=0, state_74=0, state_84=0, state_86=0, state_97=0, var_116=0, var_179=0, var_17=0, var_181=0, var_22=1, var_254=33, var_273=1, var_47=1, var_52=0, var_56=0, var_59=1, var_61=2, var_63=2, var_67=0, var_70_arg_0=0, var_70_arg_1=1, var_77=1, var_82=0] [L591] EXPR ((SORT_20)var_70_arg_0 << 7) | var_70_arg_1 VAL [input_10=0, input_12=0, mask_SORT_126=7, mask_SORT_1=1, mask_SORT_51=63, mask_SORT_5=255, mask_SORT_68=127, next_194_arg_1=0, next_206_arg_1=0, next_218_arg_1=0, next_223_arg_1=1, next_227_arg_1=0, next_244_arg_1=0, next_249_arg_1=0, next_272_arg_1=0, state_101=0, state_107=0, state_111=0, state_140=0, state_142=0, state_174=0, state_176=0, state_25=0, state_27=0, state_36=0, state_53=0, state_57=0, state_74=0, state_84=0, state_86=0, state_97=0, var_116=0, var_179=0, var_17=0, var_181=0, var_22=1, var_254=33, var_273=1, var_47=1, var_52=0, var_56=0, var_59=1, var_61=2, var_63=2, var_67=0, var_77=1, var_82=0] [L591] SORT_20 var_70 = ((SORT_20)var_70_arg_0 << 7) | var_70_arg_1; [L592] SORT_20 var_71_arg_0 = var_70; [L593] SORT_20 var_71_arg_1 = var_22; [L594] SORT_20 var_71 = var_71_arg_0 - var_71_arg_1; [L595] SORT_20 var_72_arg_0 = var_71; [L596] SORT_5 var_72 = var_72_arg_0 >> 0; [L597] SORT_5 var_274_arg_0 = state_57; [L598] SORT_5 var_274_arg_1 = var_273; [L599] SORT_5 var_274 = var_274_arg_0 - var_274_arg_1; [L600] SORT_1 var_275_arg_0 = var_59; [L601] SORT_5 var_275_arg_1 = var_72; [L602] SORT_5 var_275_arg_2 = var_274; [L603] SORT_5 var_275 = var_275_arg_0 ? var_275_arg_1 : var_275_arg_2; [L604] SORT_1 var_277_arg_0 = input_12; [L605] SORT_5 var_277_arg_1 = input_276; [L606] SORT_5 var_277_arg_2 = var_275; [L607] SORT_5 var_277 = var_277_arg_0 ? var_277_arg_1 : var_277_arg_2; [L608] SORT_1 var_278_arg_0 = input_12; [L609] SORT_5 var_278_arg_1 = var_273; [L610] SORT_5 var_278_arg_2 = var_277; [L611] SORT_5 var_278 = var_278_arg_0 ? var_278_arg_1 : var_278_arg_2; VAL [input_10=0, input_12=0, mask_SORT_126=7, mask_SORT_1=1, mask_SORT_51=63, mask_SORT_5=255, mask_SORT_68=127, next_194_arg_1=0, next_206_arg_1=0, next_218_arg_1=0, next_223_arg_1=1, next_227_arg_1=0, next_244_arg_1=0, next_249_arg_1=0, next_272_arg_1=0, state_101=0, state_107=0, state_111=0, state_140=0, state_142=0, state_174=0, state_176=0, state_25=0, state_27=0, state_36=0, state_53=0, state_74=0, state_84=0, state_86=0, state_97=0, var_116=0, var_179=0, var_17=0, var_181=0, var_22=1, var_254=33, var_273=1, var_278=0, var_47=1, var_52=0, var_56=0, var_59=1, var_61=2, var_63=2, var_67=0, var_77=1, var_82=0] [L612] EXPR var_278 & mask_SORT_5 VAL [input_10=0, input_12=0, mask_SORT_126=7, mask_SORT_1=1, mask_SORT_51=63, mask_SORT_5=255, mask_SORT_68=127, next_194_arg_1=0, next_206_arg_1=0, next_218_arg_1=0, next_223_arg_1=1, next_227_arg_1=0, next_244_arg_1=0, next_249_arg_1=0, next_272_arg_1=0, state_101=0, state_107=0, state_111=0, state_140=0, state_142=0, state_174=0, state_176=0, state_25=0, state_27=0, state_36=0, state_53=0, state_74=0, state_84=0, state_86=0, state_97=0, var_116=0, var_179=0, var_17=0, var_181=0, var_22=1, var_254=33, var_273=1, var_47=1, var_52=0, var_56=0, var_59=1, var_61=2, var_63=2, var_67=0, var_77=1, var_82=0] [L612] var_278 = var_278 & mask_SORT_5 [L613] SORT_5 next_279_arg_1 = var_278; [L614] SORT_1 var_281_arg_0 = var_59; [L615] SORT_1 var_281_arg_1 = state_97; VAL [input_10=0, input_12=0, mask_SORT_126=7, mask_SORT_1=1, mask_SORT_51=63, mask_SORT_5=255, mask_SORT_68=127, next_194_arg_1=0, next_206_arg_1=0, next_218_arg_1=0, next_223_arg_1=1, next_227_arg_1=0, next_244_arg_1=0, next_249_arg_1=0, next_272_arg_1=0, next_279_arg_1=0, state_101=0, state_107=0, state_111=0, state_140=0, state_142=0, state_174=0, state_176=0, state_25=0, state_27=0, state_36=0, state_53=0, state_74=0, state_84=0, state_86=0, var_116=0, var_179=0, var_17=0, var_181=0, var_22=1, var_254=33, var_273=1, var_281_arg_0=1, var_281_arg_1=0, var_47=1, var_52=0, var_56=0, var_61=2, var_63=2, var_67=0, var_77=1, var_82=0] [L616] EXPR var_281_arg_0 & var_281_arg_1 VAL [input_10=0, input_12=0, mask_SORT_126=7, mask_SORT_1=1, mask_SORT_51=63, mask_SORT_5=255, mask_SORT_68=127, next_194_arg_1=0, next_206_arg_1=0, next_218_arg_1=0, next_223_arg_1=1, next_227_arg_1=0, next_244_arg_1=0, next_249_arg_1=0, next_272_arg_1=0, next_279_arg_1=0, state_101=0, state_107=0, state_111=0, state_140=0, state_142=0, state_174=0, state_176=0, state_25=0, state_27=0, state_36=0, state_53=0, state_74=0, state_84=0, state_86=0, var_116=0, var_179=0, var_17=0, var_181=0, var_22=1, var_254=33, var_273=1, var_47=1, var_52=0, var_56=0, var_61=2, var_63=2, var_67=0, var_77=1, var_82=0] [L616] SORT_1 var_281 = var_281_arg_0 & var_281_arg_1; [L617] EXPR var_281 & mask_SORT_1 VAL [input_10=0, input_12=0, mask_SORT_126=7, mask_SORT_1=1, mask_SORT_51=63, mask_SORT_5=255, mask_SORT_68=127, next_194_arg_1=0, next_206_arg_1=0, next_218_arg_1=0, next_223_arg_1=1, next_227_arg_1=0, next_244_arg_1=0, next_249_arg_1=0, next_272_arg_1=0, next_279_arg_1=0, state_101=0, state_107=0, state_111=0, state_140=0, state_142=0, state_174=0, state_176=0, state_25=0, state_27=0, state_36=0, state_53=0, state_74=0, state_84=0, state_86=0, var_116=0, var_179=0, var_17=0, var_181=0, var_22=1, var_254=33, var_273=1, var_47=1, var_52=0, var_56=0, var_61=2, var_63=2, var_67=0, var_77=1, var_82=0] [L617] var_281 = var_281 & mask_SORT_1 [L618] SORT_1 var_280_arg_0 = state_74; [L619] SORT_1 var_280 = ~var_280_arg_0; [L620] SORT_1 var_282_arg_0 = var_281; [L621] SORT_1 var_282_arg_1 = var_280; [L622] SORT_1 var_282_arg_2 = state_74; [L623] SORT_1 var_282 = var_282_arg_0 ? var_282_arg_1 : var_282_arg_2; [L624] SORT_1 var_284_arg_0 = input_12; [L625] SORT_1 var_284_arg_1 = input_283; [L626] SORT_1 var_284_arg_2 = var_282; [L627] SORT_1 var_284 = var_284_arg_0 ? var_284_arg_1 : var_284_arg_2; [L628] SORT_1 var_285_arg_0 = input_12; [L629] SORT_1 var_285_arg_1 = var_17; [L630] SORT_1 var_285_arg_2 = var_284; [L631] SORT_1 var_285 = var_285_arg_0 ? var_285_arg_1 : var_285_arg_2; [L632] SORT_1 next_286_arg_1 = var_285; [L633] SORT_1 var_287_arg_0 = var_77; [L634] SORT_1 var_287_arg_1 = state_36; [L635] SORT_1 var_287_arg_2 = state_84; [L636] SORT_1 var_287 = var_287_arg_0 ? var_287_arg_1 : var_287_arg_2; [L637] SORT_1 var_289_arg_0 = input_12; [L638] SORT_1 var_289_arg_1 = input_288; [L639] SORT_1 var_289_arg_2 = var_287; [L640] SORT_1 var_289 = var_289_arg_0 ? var_289_arg_1 : var_289_arg_2; [L641] SORT_1 var_290_arg_0 = input_12; [L642] SORT_1 var_290_arg_1 = var_17; [L643] SORT_1 var_290_arg_2 = var_289; [L644] SORT_1 var_290 = var_290_arg_0 ? var_290_arg_1 : var_290_arg_2; [L645] SORT_1 next_291_arg_1 = var_290; [L646] SORT_1 var_292_arg_0 = var_77; [L647] SORT_1 var_292_arg_1 = state_36; [L648] SORT_1 var_292_arg_2 = state_86; [L649] SORT_1 var_292 = var_292_arg_0 ? var_292_arg_1 : var_292_arg_2; [L650] SORT_1 var_294_arg_0 = input_12; [L651] SORT_1 var_294_arg_1 = input_293; [L652] SORT_1 var_294_arg_2 = var_292; [L653] SORT_1 var_294 = var_294_arg_0 ? var_294_arg_1 : var_294_arg_2; [L654] SORT_1 var_295_arg_0 = input_12; [L655] SORT_1 var_295_arg_1 = var_17; [L656] SORT_1 var_295_arg_2 = var_294; [L657] SORT_1 var_295 = var_295_arg_0 ? var_295_arg_1 : var_295_arg_2; [L658] SORT_1 next_296_arg_1 = var_295; [L659] SORT_1 var_297_arg_0 = input_12; [L660] SORT_1 var_297_arg_1 = var_17; [L661] SORT_1 var_297_arg_2 = state_101; [L662] SORT_1 var_297 = var_297_arg_0 ? var_297_arg_1 : var_297_arg_2; [L663] SORT_1 next_298_arg_1 = var_297; [L664] SORT_1 var_299_arg_0 = var_77; [L665] SORT_1 var_299_arg_1 = state_36; [L666] SORT_1 var_299_arg_2 = state_101; [L667] SORT_1 var_299 = var_299_arg_0 ? var_299_arg_1 : var_299_arg_2; [L668] SORT_1 var_301_arg_0 = input_12; [L669] SORT_1 var_301_arg_1 = input_300; [L670] SORT_1 var_301_arg_2 = var_299; [L671] SORT_1 var_301 = var_301_arg_0 ? var_301_arg_1 : var_301_arg_2; [L672] SORT_1 var_302_arg_0 = input_12; [L673] SORT_1 var_302_arg_1 = var_17; [L674] SORT_1 var_302_arg_2 = var_301; [L675] SORT_1 var_302 = var_302_arg_0 ? var_302_arg_1 : var_302_arg_2; [L676] SORT_1 next_303_arg_1 = var_302; [L677] SORT_1 var_113_arg_0 = state_111; [L678] SORT_1 var_113_arg_1 = state_36; VAL [input_10=0, input_12=0, mask_SORT_126=7, mask_SORT_1=1, mask_SORT_51=63, mask_SORT_5=255, mask_SORT_68=127, next_194_arg_1=0, next_206_arg_1=0, next_218_arg_1=0, next_223_arg_1=1, next_227_arg_1=0, next_244_arg_1=0, next_249_arg_1=0, next_272_arg_1=0, next_279_arg_1=0, next_286_arg_1=0, next_291_arg_1=0, next_296_arg_1=0, next_298_arg_1=0, next_303_arg_1=0, state_107=0, state_111=0, state_140=0, state_142=0, state_174=0, state_176=0, state_25=0, state_27=0, state_36=0, state_53=0, var_113_arg_0=0, var_113_arg_1=0, var_116=0, var_179=0, var_17=0, var_181=0, var_22=1, var_254=33, var_273=1, var_47=1, var_52=0, var_56=0, var_61=2, var_63=2, var_67=0, var_77=1, var_82=0] [L679] EXPR var_113_arg_0 & var_113_arg_1 VAL [input_10=0, input_12=0, mask_SORT_126=7, mask_SORT_1=1, mask_SORT_51=63, mask_SORT_5=255, mask_SORT_68=127, next_194_arg_1=0, next_206_arg_1=0, next_218_arg_1=0, next_223_arg_1=1, next_227_arg_1=0, next_244_arg_1=0, next_249_arg_1=0, next_272_arg_1=0, next_279_arg_1=0, next_286_arg_1=0, next_291_arg_1=0, next_296_arg_1=0, next_298_arg_1=0, next_303_arg_1=0, state_107=0, state_111=0, state_140=0, state_142=0, state_174=0, state_176=0, state_25=0, state_27=0, state_36=0, state_53=0, var_116=0, var_179=0, var_17=0, var_181=0, var_22=1, var_254=33, var_273=1, var_47=1, var_52=0, var_56=0, var_61=2, var_63=2, var_67=0, var_77=1, var_82=0] [L679] SORT_1 var_113 = var_113_arg_0 & var_113_arg_1; [L680] SORT_51 var_114_arg_0 = state_53; [L681] SORT_1 var_114 = var_114_arg_0 >> 5; [L682] SORT_51 var_115_arg_0 = state_53; VAL [input_10=0, input_12=0, mask_SORT_126=7, mask_SORT_1=1, mask_SORT_51=63, mask_SORT_5=255, mask_SORT_68=127, next_194_arg_1=0, next_206_arg_1=0, next_218_arg_1=0, next_223_arg_1=1, next_227_arg_1=0, next_244_arg_1=0, next_249_arg_1=0, next_272_arg_1=0, next_279_arg_1=0, next_286_arg_1=0, next_291_arg_1=0, next_296_arg_1=0, next_298_arg_1=0, next_303_arg_1=0, state_107=0, state_111=0, state_140=0, state_142=0, state_174=0, state_176=0, state_25=0, state_27=0, state_36=0, state_53=0, var_113=0, var_114=0, var_115_arg_0=0, var_116=0, var_179=0, var_17=0, var_181=0, var_22=1, var_254=33, var_273=1, var_47=1, var_52=0, var_56=0, var_61=2, var_63=2, var_67=0, var_77=1, var_82=0] [L683] EXPR var_115_arg_0 & mask_SORT_51 VAL [input_10=0, input_12=0, mask_SORT_126=7, mask_SORT_1=1, mask_SORT_51=63, mask_SORT_5=255, mask_SORT_68=127, next_194_arg_1=0, next_206_arg_1=0, next_218_arg_1=0, next_223_arg_1=1, next_227_arg_1=0, next_244_arg_1=0, next_249_arg_1=0, next_272_arg_1=0, next_279_arg_1=0, next_286_arg_1=0, next_291_arg_1=0, next_296_arg_1=0, next_298_arg_1=0, next_303_arg_1=0, state_107=0, state_111=0, state_140=0, state_142=0, state_174=0, state_176=0, state_25=0, state_27=0, state_36=0, state_53=0, var_113=0, var_114=0, var_116=0, var_179=0, var_17=0, var_181=0, var_22=1, var_254=33, var_273=1, var_47=1, var_52=0, var_56=0, var_61=2, var_63=2, var_67=0, var_77=1, var_82=0] [L683] var_115_arg_0 = var_115_arg_0 & mask_SORT_51 [L684] SORT_20 var_115 = var_115_arg_0; [L685] SORT_20 var_117_arg_0 = var_115; [L686] SORT_20 var_117_arg_1 = var_116; [L687] SORT_1 var_117 = var_117_arg_0 == var_117_arg_1; [L688] SORT_1 var_118_arg_0 = var_117; [L689] SORT_1 var_118_arg_1 = input_10; VAL [input_10=0, input_12=0, mask_SORT_126=7, mask_SORT_1=1, mask_SORT_51=63, mask_SORT_5=255, mask_SORT_68=127, next_194_arg_1=0, next_206_arg_1=0, next_218_arg_1=0, next_223_arg_1=1, next_227_arg_1=0, next_244_arg_1=0, next_249_arg_1=0, next_272_arg_1=0, next_279_arg_1=0, next_286_arg_1=0, next_291_arg_1=0, next_296_arg_1=0, next_298_arg_1=0, next_303_arg_1=0, state_107=0, state_111=0, state_140=0, state_142=0, state_174=0, state_176=0, state_25=0, state_27=0, state_36=0, state_53=0, var_113=0, var_114=0, var_116=0, var_118_arg_0=1, var_118_arg_1=0, var_179=0, var_17=0, var_181=0, var_22=1, var_254=33, var_273=1, var_47=1, var_52=0, var_56=0, var_61=2, var_63=2, var_67=0, var_77=1, var_82=0] [L690] EXPR var_118_arg_0 & var_118_arg_1 VAL [input_10=0, input_12=0, mask_SORT_126=7, mask_SORT_1=1, mask_SORT_51=63, mask_SORT_5=255, mask_SORT_68=127, next_194_arg_1=0, next_206_arg_1=0, next_218_arg_1=0, next_223_arg_1=1, next_227_arg_1=0, next_244_arg_1=0, next_249_arg_1=0, next_272_arg_1=0, next_279_arg_1=0, next_286_arg_1=0, next_291_arg_1=0, next_296_arg_1=0, next_298_arg_1=0, next_303_arg_1=0, state_107=0, state_111=0, state_140=0, state_142=0, state_174=0, state_176=0, state_25=0, state_27=0, state_36=0, state_53=0, var_113=0, var_114=0, var_116=0, var_179=0, var_17=0, var_181=0, var_22=1, var_254=33, var_273=1, var_47=1, var_52=0, var_56=0, var_61=2, var_63=2, var_67=0, var_77=1, var_82=0] [L690] SORT_1 var_118 = var_118_arg_0 & var_118_arg_1; [L691] SORT_1 var_119_arg_0 = var_114; [L692] SORT_1 var_119_arg_1 = var_118; VAL [input_10=0, input_12=0, mask_SORT_126=7, mask_SORT_1=1, mask_SORT_51=63, mask_SORT_5=255, mask_SORT_68=127, next_194_arg_1=0, next_206_arg_1=0, next_218_arg_1=0, next_223_arg_1=1, next_227_arg_1=0, next_244_arg_1=0, next_249_arg_1=0, next_272_arg_1=0, next_279_arg_1=0, next_286_arg_1=0, next_291_arg_1=0, next_296_arg_1=0, next_298_arg_1=0, next_303_arg_1=0, state_107=0, state_111=0, state_140=0, state_142=0, state_174=0, state_176=0, state_25=0, state_27=0, state_36=0, state_53=0, var_113=0, var_114=0, var_116=0, var_119_arg_0=0, var_119_arg_1=0, var_179=0, var_17=0, var_181=0, var_22=1, var_254=33, var_273=1, var_47=1, var_52=0, var_56=0, var_61=2, var_63=2, var_67=0, var_77=1, var_82=0] [L693] EXPR var_119_arg_0 | var_119_arg_1 VAL [input_10=0, input_12=0, mask_SORT_126=7, mask_SORT_1=1, mask_SORT_51=63, mask_SORT_5=255, mask_SORT_68=127, next_194_arg_1=0, next_206_arg_1=0, next_218_arg_1=0, next_223_arg_1=1, next_227_arg_1=0, next_244_arg_1=0, next_249_arg_1=0, next_272_arg_1=0, next_279_arg_1=0, next_286_arg_1=0, next_291_arg_1=0, next_296_arg_1=0, next_298_arg_1=0, next_303_arg_1=0, state_107=0, state_111=0, state_140=0, state_142=0, state_174=0, state_176=0, state_25=0, state_27=0, state_36=0, state_53=0, var_113=0, var_114=0, var_116=0, var_179=0, var_17=0, var_181=0, var_22=1, var_254=33, var_273=1, var_47=1, var_52=0, var_56=0, var_61=2, var_63=2, var_67=0, var_77=1, var_82=0] [L693] SORT_1 var_119 = var_119_arg_0 | var_119_arg_1; [L694] SORT_1 var_120_arg_0 = var_113; [L695] SORT_1 var_120_arg_1 = var_119; VAL [input_10=0, input_12=0, mask_SORT_126=7, mask_SORT_1=1, mask_SORT_51=63, mask_SORT_5=255, mask_SORT_68=127, next_194_arg_1=0, next_206_arg_1=0, next_218_arg_1=0, next_223_arg_1=1, next_227_arg_1=0, next_244_arg_1=0, next_249_arg_1=0, next_272_arg_1=0, next_279_arg_1=0, next_286_arg_1=0, next_291_arg_1=0, next_296_arg_1=0, next_298_arg_1=0, next_303_arg_1=0, state_107=0, state_111=0, state_140=0, state_142=0, state_174=0, state_176=0, state_25=0, state_27=0, state_36=0, state_53=0, var_114=0, var_116=0, var_120_arg_0=0, var_120_arg_1=0, var_179=0, var_17=0, var_181=0, var_22=1, var_254=33, var_273=1, var_47=1, var_52=0, var_56=0, var_61=2, var_63=2, var_67=0, var_77=1, var_82=0] [L696] EXPR var_120_arg_0 & var_120_arg_1 VAL [input_10=0, input_12=0, mask_SORT_126=7, mask_SORT_1=1, mask_SORT_51=63, mask_SORT_5=255, mask_SORT_68=127, next_194_arg_1=0, next_206_arg_1=0, next_218_arg_1=0, next_223_arg_1=1, next_227_arg_1=0, next_244_arg_1=0, next_249_arg_1=0, next_272_arg_1=0, next_279_arg_1=0, next_286_arg_1=0, next_291_arg_1=0, next_296_arg_1=0, next_298_arg_1=0, next_303_arg_1=0, state_107=0, state_111=0, state_140=0, state_142=0, state_174=0, state_176=0, state_25=0, state_27=0, state_36=0, state_53=0, var_114=0, var_116=0, var_179=0, var_17=0, var_181=0, var_22=1, var_254=33, var_273=1, var_47=1, var_52=0, var_56=0, var_61=2, var_63=2, var_67=0, var_77=1, var_82=0] [L696] SORT_1 var_120 = var_120_arg_0 & var_120_arg_1; [L697] SORT_1 var_121_arg_0 = state_111; [L698] SORT_1 var_121 = ~var_121_arg_0; [L699] SORT_1 var_122_arg_0 = var_121; [L700] SORT_1 var_122_arg_1 = state_36; VAL [input_10=0, input_12=0, mask_SORT_126=7, mask_SORT_1=1, mask_SORT_51=63, mask_SORT_5=255, mask_SORT_68=127, next_194_arg_1=0, next_206_arg_1=0, next_218_arg_1=0, next_223_arg_1=1, next_227_arg_1=0, next_244_arg_1=0, next_249_arg_1=0, next_272_arg_1=0, next_279_arg_1=0, next_286_arg_1=0, next_291_arg_1=0, next_296_arg_1=0, next_298_arg_1=0, next_303_arg_1=0, state_107=0, state_111=0, state_140=0, state_142=0, state_174=0, state_176=0, state_25=0, state_27=0, state_36=0, state_53=0, var_114=0, var_116=0, var_120=0, var_122_arg_0=-1, var_122_arg_1=0, var_179=0, var_17=0, var_181=0, var_22=1, var_254=33, var_273=1, var_47=1, var_52=0, var_56=0, var_61=2, var_63=2, var_67=0, var_77=1, var_82=0] [L701] EXPR var_122_arg_0 & var_122_arg_1 VAL [input_10=0, input_12=0, mask_SORT_126=7, mask_SORT_1=1, mask_SORT_51=63, mask_SORT_5=255, mask_SORT_68=127, next_194_arg_1=0, next_206_arg_1=0, next_218_arg_1=0, next_223_arg_1=1, next_227_arg_1=0, next_244_arg_1=0, next_249_arg_1=0, next_272_arg_1=0, next_279_arg_1=0, next_286_arg_1=0, next_291_arg_1=0, next_296_arg_1=0, next_298_arg_1=0, next_303_arg_1=0, state_107=0, state_111=0, state_140=0, state_142=0, state_174=0, state_176=0, state_25=0, state_27=0, state_36=0, state_53=0, var_114=0, var_116=0, var_120=0, var_179=0, var_17=0, var_181=0, var_22=1, var_254=33, var_273=1, var_47=1, var_52=0, var_56=0, var_61=2, var_63=2, var_67=0, var_77=1, var_82=0] [L701] SORT_1 var_122 = var_122_arg_0 & var_122_arg_1; [L702] SORT_51 var_123_arg_0 = state_53; [L703] SORT_1 var_123 = var_123_arg_0 >> 4; [L704] SORT_1 var_124_arg_0 = var_123; [L705] SORT_1 var_124 = ~var_124_arg_0; [L706] SORT_1 var_125_arg_0 = var_114; [L707] SORT_1 var_125_arg_1 = var_124; VAL [input_10=0, input_12=0, mask_SORT_126=7, mask_SORT_1=1, mask_SORT_51=63, mask_SORT_5=255, mask_SORT_68=127, next_194_arg_1=0, next_206_arg_1=0, next_218_arg_1=0, next_223_arg_1=1, next_227_arg_1=0, next_244_arg_1=0, next_249_arg_1=0, next_272_arg_1=0, next_279_arg_1=0, next_286_arg_1=0, next_291_arg_1=0, next_296_arg_1=0, next_298_arg_1=0, next_303_arg_1=0, state_107=0, state_111=0, state_140=0, state_142=0, state_174=0, state_176=0, state_25=0, state_27=0, state_36=0, state_53=0, var_114=0, var_116=0, var_120=0, var_122=0, var_125_arg_0=0, var_125_arg_1=-1, var_179=0, var_17=0, var_181=0, var_22=1, var_254=33, var_273=1, var_47=1, var_52=0, var_56=0, var_61=2, var_63=2, var_67=0, var_77=1, var_82=0] [L708] EXPR var_125_arg_0 & var_125_arg_1 VAL [input_10=0, input_12=0, mask_SORT_126=7, mask_SORT_1=1, mask_SORT_51=63, mask_SORT_5=255, mask_SORT_68=127, next_194_arg_1=0, next_206_arg_1=0, next_218_arg_1=0, next_223_arg_1=1, next_227_arg_1=0, next_244_arg_1=0, next_249_arg_1=0, next_272_arg_1=0, next_279_arg_1=0, next_286_arg_1=0, next_291_arg_1=0, next_296_arg_1=0, next_298_arg_1=0, next_303_arg_1=0, state_107=0, state_111=0, state_140=0, state_142=0, state_174=0, state_176=0, state_25=0, state_27=0, state_36=0, state_53=0, var_114=0, var_116=0, var_120=0, var_122=0, var_179=0, var_17=0, var_181=0, var_22=1, var_254=33, var_273=1, var_47=1, var_52=0, var_56=0, var_61=2, var_63=2, var_67=0, var_77=1, var_82=0] [L708] SORT_1 var_125 = var_125_arg_0 & var_125_arg_1; [L709] SORT_51 var_127_arg_0 = state_53; [L710] SORT_126 var_127 = var_127_arg_0 >> 1; VAL [input_10=0, input_12=0, mask_SORT_126=7, mask_SORT_1=1, mask_SORT_51=63, mask_SORT_5=255, mask_SORT_68=127, next_194_arg_1=0, next_206_arg_1=0, next_218_arg_1=0, next_223_arg_1=1, next_227_arg_1=0, next_244_arg_1=0, next_249_arg_1=0, next_272_arg_1=0, next_279_arg_1=0, next_286_arg_1=0, next_291_arg_1=0, next_296_arg_1=0, next_298_arg_1=0, next_303_arg_1=0, state_107=0, state_111=0, state_140=0, state_142=0, state_174=0, state_176=0, state_25=0, state_27=0, state_36=0, state_53=0, var_114=0, var_116=0, var_120=0, var_122=0, var_125=0, var_127=0, var_179=0, var_17=0, var_181=0, var_22=1, var_254=33, var_273=1, var_47=1, var_52=0, var_56=0, var_61=2, var_63=2, var_67=0, var_77=1, var_82=0] [L711] EXPR var_127 & mask_SORT_126 VAL [input_10=0, input_12=0, mask_SORT_126=7, mask_SORT_1=1, mask_SORT_51=63, mask_SORT_5=255, mask_SORT_68=127, next_194_arg_1=0, next_206_arg_1=0, next_218_arg_1=0, next_223_arg_1=1, next_227_arg_1=0, next_244_arg_1=0, next_249_arg_1=0, next_272_arg_1=0, next_279_arg_1=0, next_286_arg_1=0, next_291_arg_1=0, next_296_arg_1=0, next_298_arg_1=0, next_303_arg_1=0, state_107=0, state_111=0, state_140=0, state_142=0, state_174=0, state_176=0, state_25=0, state_27=0, state_36=0, state_53=0, var_114=0, var_116=0, var_120=0, var_122=0, var_125=0, var_179=0, var_17=0, var_181=0, var_22=1, var_254=33, var_273=1, var_47=1, var_52=0, var_56=0, var_61=2, var_63=2, var_67=0, var_77=1, var_82=0] [L711] var_127 = var_127 & mask_SORT_126 [L712] SORT_126 var_128_arg_0 = var_127; [L713] SORT_1 var_128 = var_128_arg_0 == mask_SORT_126; [L714] SORT_1 var_129_arg_0 = var_128; [L715] SORT_1 var_129 = ~var_129_arg_0; [L716] SORT_1 var_130_arg_0 = var_125; [L717] SORT_1 var_130_arg_1 = var_129; VAL [input_10=0, input_12=0, mask_SORT_126=7, mask_SORT_1=1, mask_SORT_51=63, mask_SORT_5=255, mask_SORT_68=127, next_194_arg_1=0, next_206_arg_1=0, next_218_arg_1=0, next_223_arg_1=1, next_227_arg_1=0, next_244_arg_1=0, next_249_arg_1=0, next_272_arg_1=0, next_279_arg_1=0, next_286_arg_1=0, next_291_arg_1=0, next_296_arg_1=0, next_298_arg_1=0, next_303_arg_1=0, state_107=0, state_111=0, state_140=0, state_142=0, state_174=0, state_176=0, state_25=0, state_27=0, state_36=0, state_53=0, var_114=0, var_116=0, var_120=0, var_122=0, var_130_arg_0=0, var_130_arg_1=-1, var_179=0, var_17=0, var_181=0, var_22=1, var_254=33, var_273=1, var_47=1, var_52=0, var_56=0, var_61=2, var_63=2, var_67=0, var_77=1, var_82=0] [L718] EXPR var_130_arg_0 & var_130_arg_1 VAL [input_10=0, input_12=0, mask_SORT_126=7, mask_SORT_1=1, mask_SORT_51=63, mask_SORT_5=255, mask_SORT_68=127, next_194_arg_1=0, next_206_arg_1=0, next_218_arg_1=0, next_223_arg_1=1, next_227_arg_1=0, next_244_arg_1=0, next_249_arg_1=0, next_272_arg_1=0, next_279_arg_1=0, next_286_arg_1=0, next_291_arg_1=0, next_296_arg_1=0, next_298_arg_1=0, next_303_arg_1=0, state_107=0, state_111=0, state_140=0, state_142=0, state_174=0, state_176=0, state_25=0, state_27=0, state_36=0, state_53=0, var_114=0, var_116=0, var_120=0, var_122=0, var_179=0, var_17=0, var_181=0, var_22=1, var_254=33, var_273=1, var_47=1, var_52=0, var_56=0, var_61=2, var_63=2, var_67=0, var_77=1, var_82=0] [L718] SORT_1 var_130 = var_130_arg_0 & var_130_arg_1; [L719] SORT_51 var_131_arg_0 = state_53; VAL [input_10=0, input_12=0, mask_SORT_126=7, mask_SORT_1=1, mask_SORT_51=63, mask_SORT_5=255, mask_SORT_68=127, next_194_arg_1=0, next_206_arg_1=0, next_218_arg_1=0, next_223_arg_1=1, next_227_arg_1=0, next_244_arg_1=0, next_249_arg_1=0, next_272_arg_1=0, next_279_arg_1=0, next_286_arg_1=0, next_291_arg_1=0, next_296_arg_1=0, next_298_arg_1=0, next_303_arg_1=0, state_107=0, state_111=0, state_140=0, state_142=0, state_174=0, state_176=0, state_25=0, state_27=0, state_36=0, var_114=0, var_116=0, var_120=0, var_122=0, var_130=0, var_131_arg_0=0, var_179=0, var_17=0, var_181=0, var_22=1, var_254=33, var_273=1, var_47=1, var_52=0, var_56=0, var_61=2, var_63=2, var_67=0, var_77=1, var_82=0] [L720] EXPR var_131_arg_0 & mask_SORT_51 VAL [input_10=0, input_12=0, mask_SORT_126=7, mask_SORT_1=1, mask_SORT_51=63, mask_SORT_5=255, mask_SORT_68=127, next_194_arg_1=0, next_206_arg_1=0, next_218_arg_1=0, next_223_arg_1=1, next_227_arg_1=0, next_244_arg_1=0, next_249_arg_1=0, next_272_arg_1=0, next_279_arg_1=0, next_286_arg_1=0, next_291_arg_1=0, next_296_arg_1=0, next_298_arg_1=0, next_303_arg_1=0, state_107=0, state_111=0, state_140=0, state_142=0, state_174=0, state_176=0, state_25=0, state_27=0, state_36=0, var_114=0, var_116=0, var_120=0, var_122=0, var_130=0, var_179=0, var_17=0, var_181=0, var_22=1, var_254=33, var_273=1, var_47=1, var_52=0, var_56=0, var_61=2, var_63=2, var_67=0, var_77=1, var_82=0] [L720] var_131_arg_0 = var_131_arg_0 & mask_SORT_51 [L721] SORT_20 var_131 = var_131_arg_0; [L722] SORT_20 var_132_arg_0 = var_131; [L723] SORT_20 var_132_arg_1 = var_116; [L724] SORT_1 var_132 = var_132_arg_0 == var_132_arg_1; [L725] SORT_1 var_133_arg_0 = var_132; [L726] SORT_1 var_133_arg_1 = input_10; VAL [input_12=0, mask_SORT_126=7, mask_SORT_1=1, mask_SORT_51=63, mask_SORT_5=255, mask_SORT_68=127, next_194_arg_1=0, next_206_arg_1=0, next_218_arg_1=0, next_223_arg_1=1, next_227_arg_1=0, next_244_arg_1=0, next_249_arg_1=0, next_272_arg_1=0, next_279_arg_1=0, next_286_arg_1=0, next_291_arg_1=0, next_296_arg_1=0, next_298_arg_1=0, next_303_arg_1=0, state_107=0, state_111=0, state_140=0, state_142=0, state_174=0, state_176=0, state_25=0, state_27=0, state_36=0, var_114=0, var_116=0, var_120=0, var_122=0, var_130=0, var_133_arg_0=1, var_133_arg_1=0, var_179=0, var_17=0, var_181=0, var_22=1, var_254=33, var_273=1, var_47=1, var_52=0, var_56=0, var_61=2, var_63=2, var_67=0, var_77=1, var_82=0] [L727] EXPR var_133_arg_0 & var_133_arg_1 VAL [input_12=0, mask_SORT_126=7, mask_SORT_1=1, mask_SORT_51=63, mask_SORT_5=255, mask_SORT_68=127, next_194_arg_1=0, next_206_arg_1=0, next_218_arg_1=0, next_223_arg_1=1, next_227_arg_1=0, next_244_arg_1=0, next_249_arg_1=0, next_272_arg_1=0, next_279_arg_1=0, next_286_arg_1=0, next_291_arg_1=0, next_296_arg_1=0, next_298_arg_1=0, next_303_arg_1=0, state_107=0, state_111=0, state_140=0, state_142=0, state_174=0, state_176=0, state_25=0, state_27=0, state_36=0, var_114=0, var_116=0, var_120=0, var_122=0, var_130=0, var_179=0, var_17=0, var_181=0, var_22=1, var_254=33, var_273=1, var_47=1, var_52=0, var_56=0, var_61=2, var_63=2, var_67=0, var_77=1, var_82=0] [L727] SORT_1 var_133 = var_133_arg_0 & var_133_arg_1; [L728] SORT_1 var_134_arg_0 = var_130; [L729] SORT_1 var_134_arg_1 = var_133; VAL [input_12=0, mask_SORT_126=7, mask_SORT_1=1, mask_SORT_51=63, mask_SORT_5=255, mask_SORT_68=127, next_194_arg_1=0, next_206_arg_1=0, next_218_arg_1=0, next_223_arg_1=1, next_227_arg_1=0, next_244_arg_1=0, next_249_arg_1=0, next_272_arg_1=0, next_279_arg_1=0, next_286_arg_1=0, next_291_arg_1=0, next_296_arg_1=0, next_298_arg_1=0, next_303_arg_1=0, state_107=0, state_111=0, state_140=0, state_142=0, state_174=0, state_176=0, state_25=0, state_27=0, state_36=0, var_114=0, var_116=0, var_120=0, var_122=0, var_134_arg_0=0, var_134_arg_1=0, var_179=0, var_17=0, var_181=0, var_22=1, var_254=33, var_273=1, var_47=1, var_52=0, var_56=0, var_61=2, var_63=2, var_67=0, var_77=1, var_82=0] [L730] EXPR var_134_arg_0 | var_134_arg_1 VAL [input_12=0, mask_SORT_126=7, mask_SORT_1=1, mask_SORT_51=63, mask_SORT_5=255, mask_SORT_68=127, next_194_arg_1=0, next_206_arg_1=0, next_218_arg_1=0, next_223_arg_1=1, next_227_arg_1=0, next_244_arg_1=0, next_249_arg_1=0, next_272_arg_1=0, next_279_arg_1=0, next_286_arg_1=0, next_291_arg_1=0, next_296_arg_1=0, next_298_arg_1=0, next_303_arg_1=0, state_107=0, state_111=0, state_140=0, state_142=0, state_174=0, state_176=0, state_25=0, state_27=0, state_36=0, var_114=0, var_116=0, var_120=0, var_122=0, var_179=0, var_17=0, var_181=0, var_22=1, var_254=33, var_273=1, var_47=1, var_52=0, var_56=0, var_61=2, var_63=2, var_67=0, var_77=1, var_82=0] [L730] SORT_1 var_134 = var_134_arg_0 | var_134_arg_1; [L731] SORT_1 var_135_arg_0 = var_122; [L732] SORT_1 var_135_arg_1 = var_134; VAL [input_12=0, mask_SORT_126=7, mask_SORT_1=1, mask_SORT_51=63, mask_SORT_5=255, mask_SORT_68=127, next_194_arg_1=0, next_206_arg_1=0, next_218_arg_1=0, next_223_arg_1=1, next_227_arg_1=0, next_244_arg_1=0, next_249_arg_1=0, next_272_arg_1=0, next_279_arg_1=0, next_286_arg_1=0, next_291_arg_1=0, next_296_arg_1=0, next_298_arg_1=0, next_303_arg_1=0, state_107=0, state_111=0, state_140=0, state_142=0, state_174=0, state_176=0, state_25=0, state_27=0, state_36=0, var_114=0, var_116=0, var_120=0, var_135_arg_0=0, var_135_arg_1=0, var_179=0, var_17=0, var_181=0, var_22=1, var_254=33, var_273=1, var_47=1, var_52=0, var_56=0, var_61=2, var_63=2, var_67=0, var_77=1, var_82=0] [L733] EXPR var_135_arg_0 & var_135_arg_1 VAL [input_12=0, mask_SORT_126=7, mask_SORT_1=1, mask_SORT_51=63, mask_SORT_5=255, mask_SORT_68=127, next_194_arg_1=0, next_206_arg_1=0, next_218_arg_1=0, next_223_arg_1=1, next_227_arg_1=0, next_244_arg_1=0, next_249_arg_1=0, next_272_arg_1=0, next_279_arg_1=0, next_286_arg_1=0, next_291_arg_1=0, next_296_arg_1=0, next_298_arg_1=0, next_303_arg_1=0, state_107=0, state_111=0, state_140=0, state_142=0, state_174=0, state_176=0, state_25=0, state_27=0, state_36=0, var_114=0, var_116=0, var_120=0, var_179=0, var_17=0, var_181=0, var_22=1, var_254=33, var_273=1, var_47=1, var_52=0, var_56=0, var_61=2, var_63=2, var_67=0, var_77=1, var_82=0] [L733] SORT_1 var_135 = var_135_arg_0 & var_135_arg_1; [L734] SORT_1 var_136_arg_0 = var_120; [L735] SORT_1 var_136_arg_1 = var_135; VAL [input_12=0, mask_SORT_126=7, mask_SORT_1=1, mask_SORT_51=63, mask_SORT_5=255, mask_SORT_68=127, next_194_arg_1=0, next_206_arg_1=0, next_218_arg_1=0, next_223_arg_1=1, next_227_arg_1=0, next_244_arg_1=0, next_249_arg_1=0, next_272_arg_1=0, next_279_arg_1=0, next_286_arg_1=0, next_291_arg_1=0, next_296_arg_1=0, next_298_arg_1=0, next_303_arg_1=0, state_107=0, state_111=0, state_140=0, state_142=0, state_174=0, state_176=0, state_25=0, state_27=0, state_36=0, var_114=0, var_116=0, var_136_arg_0=0, var_136_arg_1=0, var_179=0, var_17=0, var_181=0, var_22=1, var_254=33, var_273=1, var_47=1, var_52=0, var_56=0, var_61=2, var_63=2, var_67=0, var_77=1, var_82=0] [L736] EXPR var_136_arg_0 | var_136_arg_1 VAL [input_12=0, mask_SORT_126=7, mask_SORT_1=1, mask_SORT_51=63, mask_SORT_5=255, mask_SORT_68=127, next_194_arg_1=0, next_206_arg_1=0, next_218_arg_1=0, next_223_arg_1=1, next_227_arg_1=0, next_244_arg_1=0, next_249_arg_1=0, next_272_arg_1=0, next_279_arg_1=0, next_286_arg_1=0, next_291_arg_1=0, next_296_arg_1=0, next_298_arg_1=0, next_303_arg_1=0, state_107=0, state_111=0, state_140=0, state_142=0, state_174=0, state_176=0, state_25=0, state_27=0, state_36=0, var_114=0, var_116=0, var_179=0, var_17=0, var_181=0, var_22=1, var_254=33, var_273=1, var_47=1, var_52=0, var_56=0, var_61=2, var_63=2, var_67=0, var_77=1, var_82=0] [L736] SORT_1 var_136 = var_136_arg_0 | var_136_arg_1; [L737] SORT_1 var_304_arg_0 = var_114; [L738] SORT_1 var_304 = ~var_304_arg_0; [L739] SORT_1 var_305_arg_0 = state_36; [L740] SORT_1 var_305_arg_1 = var_304; VAL [input_12=0, mask_SORT_126=7, mask_SORT_1=1, mask_SORT_51=63, mask_SORT_5=255, mask_SORT_68=127, next_194_arg_1=0, next_206_arg_1=0, next_218_arg_1=0, next_223_arg_1=1, next_227_arg_1=0, next_244_arg_1=0, next_249_arg_1=0, next_272_arg_1=0, next_279_arg_1=0, next_286_arg_1=0, next_291_arg_1=0, next_296_arg_1=0, next_298_arg_1=0, next_303_arg_1=0, state_107=0, state_111=0, state_140=0, state_142=0, state_174=0, state_176=0, state_25=0, state_27=0, state_36=0, var_116=0, var_136=0, var_179=0, var_17=0, var_181=0, var_22=1, var_254=33, var_273=1, var_305_arg_0=0, var_305_arg_1=-1, var_47=1, var_52=0, var_56=0, var_61=2, var_63=2, var_67=0, var_77=1, var_82=0] [L741] EXPR var_305_arg_0 & var_305_arg_1 VAL [input_12=0, mask_SORT_126=7, mask_SORT_1=1, mask_SORT_51=63, mask_SORT_5=255, mask_SORT_68=127, next_194_arg_1=0, next_206_arg_1=0, next_218_arg_1=0, next_223_arg_1=1, next_227_arg_1=0, next_244_arg_1=0, next_249_arg_1=0, next_272_arg_1=0, next_279_arg_1=0, next_286_arg_1=0, next_291_arg_1=0, next_296_arg_1=0, next_298_arg_1=0, next_303_arg_1=0, state_107=0, state_111=0, state_140=0, state_142=0, state_174=0, state_176=0, state_25=0, state_27=0, state_36=0, var_116=0, var_136=0, var_179=0, var_17=0, var_181=0, var_22=1, var_254=33, var_273=1, var_47=1, var_52=0, var_56=0, var_61=2, var_63=2, var_67=0, var_77=1, var_82=0] [L741] SORT_1 var_305 = var_305_arg_0 & var_305_arg_1; [L742] SORT_1 var_306_arg_0 = var_136; [L743] SORT_1 var_306_arg_1 = var_305; VAL [input_12=0, mask_SORT_126=7, mask_SORT_1=1, mask_SORT_51=63, mask_SORT_5=255, mask_SORT_68=127, next_194_arg_1=0, next_206_arg_1=0, next_218_arg_1=0, next_223_arg_1=1, next_227_arg_1=0, next_244_arg_1=0, next_249_arg_1=0, next_272_arg_1=0, next_279_arg_1=0, next_286_arg_1=0, next_291_arg_1=0, next_296_arg_1=0, next_298_arg_1=0, next_303_arg_1=0, state_107=0, state_111=0, state_140=0, state_142=0, state_174=0, state_176=0, state_25=0, state_27=0, state_36=0, var_116=0, var_179=0, var_17=0, var_181=0, var_22=1, var_254=33, var_273=1, var_306_arg_0=0, var_306_arg_1=0, var_47=1, var_52=0, var_56=0, var_61=2, var_63=2, var_67=0, var_77=1, var_82=0] [L744] EXPR var_306_arg_0 | var_306_arg_1 VAL [input_12=0, mask_SORT_126=7, mask_SORT_1=1, mask_SORT_51=63, mask_SORT_5=255, mask_SORT_68=127, next_194_arg_1=0, next_206_arg_1=0, next_218_arg_1=0, next_223_arg_1=1, next_227_arg_1=0, next_244_arg_1=0, next_249_arg_1=0, next_272_arg_1=0, next_279_arg_1=0, next_286_arg_1=0, next_291_arg_1=0, next_296_arg_1=0, next_298_arg_1=0, next_303_arg_1=0, state_107=0, state_111=0, state_140=0, state_142=0, state_174=0, state_176=0, state_25=0, state_27=0, state_36=0, var_116=0, var_179=0, var_17=0, var_181=0, var_22=1, var_254=33, var_273=1, var_47=1, var_52=0, var_56=0, var_61=2, var_63=2, var_67=0, var_77=1, var_82=0] [L744] SORT_1 var_306 = var_306_arg_0 | var_306_arg_1; [L745] SORT_1 var_307_arg_0 = var_77; [L746] SORT_1 var_307_arg_1 = var_306; [L747] SORT_1 var_307_arg_2 = state_107; [L748] SORT_1 var_307 = var_307_arg_0 ? var_307_arg_1 : var_307_arg_2; [L749] SORT_1 var_309_arg_0 = input_12; [L750] SORT_1 var_309_arg_1 = input_308; [L751] SORT_1 var_309_arg_2 = var_307; [L752] SORT_1 var_309 = var_309_arg_0 ? var_309_arg_1 : var_309_arg_2; [L753] SORT_1 var_310_arg_0 = input_12; [L754] SORT_1 var_310_arg_1 = var_17; [L755] SORT_1 var_310_arg_2 = var_309; [L756] SORT_1 var_310 = var_310_arg_0 ? var_310_arg_1 : var_310_arg_2; [L757] SORT_1 next_311_arg_1 = var_310; [L758] SORT_1 var_322_arg_0 = state_36; [L759] SORT_1 var_322 = ~var_322_arg_0; VAL [input_12=0, mask_SORT_126=7, mask_SORT_1=1, mask_SORT_51=63, mask_SORT_5=255, mask_SORT_68=127, next_194_arg_1=0, next_206_arg_1=0, next_218_arg_1=0, next_223_arg_1=1, next_227_arg_1=0, next_244_arg_1=0, next_249_arg_1=0, next_272_arg_1=0, next_279_arg_1=0, next_286_arg_1=0, next_291_arg_1=0, next_296_arg_1=0, next_298_arg_1=0, next_303_arg_1=0, next_311_arg_1=0, state_111=0, state_140=0, state_142=0, state_174=0, state_176=0, state_25=0, state_27=0, var_116=0, var_179=0, var_17=0, var_181=0, var_22=1, var_254=33, var_273=1, var_322=-1, var_47=1, var_52=0, var_56=0, var_61=2, var_63=2, var_67=0, var_77=1, var_82=0] [L760] EXPR var_322 & mask_SORT_1 VAL [input_12=0, mask_SORT_126=7, mask_SORT_1=1, mask_SORT_51=63, mask_SORT_5=255, mask_SORT_68=127, next_194_arg_1=0, next_206_arg_1=0, next_218_arg_1=0, next_223_arg_1=1, next_227_arg_1=0, next_244_arg_1=0, next_249_arg_1=0, next_272_arg_1=0, next_279_arg_1=0, next_286_arg_1=0, next_291_arg_1=0, next_296_arg_1=0, next_298_arg_1=0, next_303_arg_1=0, next_311_arg_1=0, state_111=0, state_140=0, state_142=0, state_174=0, state_176=0, state_25=0, state_27=0, var_116=0, var_179=0, var_17=0, var_181=0, var_22=1, var_254=33, var_273=1, var_47=1, var_52=0, var_56=0, var_61=2, var_63=2, var_67=0, var_77=1, var_82=0] [L760] var_322 = var_322 & mask_SORT_1 [L761] SORT_1 var_323_arg_0 = var_322; [L762] SORT_1 var_323_arg_1 = var_179; [L763] SORT_1 var_323_arg_2 = state_111; [L764] SORT_1 var_323 = var_323_arg_0 ? var_323_arg_1 : var_323_arg_2; [L765] SORT_1 var_324_arg_0 = var_181; [L766] SORT_1 var_324_arg_1 = var_323; [L767] SORT_1 var_324_arg_2 = input_321; [L768] SORT_1 var_324 = var_324_arg_0 ? var_324_arg_1 : var_324_arg_2; [L769] SORT_1 var_325_arg_0 = var_77; [L770] SORT_1 var_325_arg_1 = var_324; [L771] SORT_1 var_325_arg_2 = input_320; [L772] SORT_1 var_325 = var_325_arg_0 ? var_325_arg_1 : var_325_arg_2; [L773] SORT_1 var_327_arg_0 = input_12; [L774] SORT_1 var_327_arg_1 = input_326; [L775] SORT_1 var_327_arg_2 = var_325; [L776] SORT_1 var_327 = var_327_arg_0 ? var_327_arg_1 : var_327_arg_2; [L777] SORT_1 var_314_arg_0 = var_82; [L778] SORT_1 var_314_arg_1 = var_17; [L779] SORT_1 var_314_arg_2 = state_111; [L780] SORT_1 var_314 = var_314_arg_0 ? var_314_arg_1 : var_314_arg_2; [L781] SORT_1 var_316_arg_0 = var_181; [L782] SORT_1 var_316_arg_1 = input_315; [L783] SORT_1 var_316_arg_2 = var_314; [L784] SORT_1 var_316 = var_316_arg_0 ? var_316_arg_1 : var_316_arg_2; [L785] SORT_1 var_317_arg_0 = var_77; [L786] SORT_1 var_317_arg_1 = var_316; [L787] SORT_1 var_317_arg_2 = input_313; [L788] SORT_1 var_317 = var_317_arg_0 ? var_317_arg_1 : var_317_arg_2; [L789] SORT_1 var_319_arg_0 = input_12; [L790] SORT_1 var_319_arg_1 = input_318; [L791] SORT_1 var_319_arg_2 = var_317; [L792] SORT_1 var_319 = var_319_arg_0 ? var_319_arg_1 : var_319_arg_2; [L793] SORT_1 var_328_arg_0 = var_181; [L794] SORT_1 var_328_arg_1 = var_327; [L795] SORT_1 var_328_arg_2 = var_319; [L796] SORT_1 var_328 = var_328_arg_0 ? var_328_arg_1 : var_328_arg_2; [L797] SORT_1 var_329_arg_0 = var_77; [L798] SORT_1 var_329_arg_1 = var_328; [L799] SORT_1 var_329_arg_2 = input_312; [L800] SORT_1 var_329 = var_329_arg_0 ? var_329_arg_1 : var_329_arg_2; [L801] SORT_1 var_331_arg_0 = input_12; [L802] SORT_1 var_331_arg_1 = input_330; [L803] SORT_1 var_331_arg_2 = var_329; [L804] SORT_1 var_331 = var_331_arg_0 ? var_331_arg_1 : var_331_arg_2; [L805] SORT_1 var_332_arg_0 = var_77; [L806] SORT_1 var_332_arg_1 = var_331; [L807] SORT_1 var_332_arg_2 = state_111; [L808] SORT_1 var_332 = var_332_arg_0 ? var_332_arg_1 : var_332_arg_2; [L809] SORT_1 var_334_arg_0 = input_12; [L810] SORT_1 var_334_arg_1 = input_333; [L811] SORT_1 var_334_arg_2 = var_332; [L812] SORT_1 var_334 = var_334_arg_0 ? var_334_arg_1 : var_334_arg_2; [L813] SORT_1 var_335_arg_0 = input_12; [L814] SORT_1 var_335_arg_1 = var_17; [L815] SORT_1 var_335_arg_2 = var_334; [L816] SORT_1 var_335 = var_335_arg_0 ? var_335_arg_1 : var_335_arg_2; [L817] SORT_1 next_336_arg_1 = var_335; [L818] SORT_1 var_337_arg_0 = var_77; [L819] SORT_1 var_337_arg_1 = state_27; [L820] SORT_1 var_337_arg_2 = state_140; [L821] SORT_1 var_337 = var_337_arg_0 ? var_337_arg_1 : var_337_arg_2; [L822] SORT_1 var_339_arg_0 = input_12; [L823] SORT_1 var_339_arg_1 = input_338; [L824] SORT_1 var_339_arg_2 = var_337; [L825] SORT_1 var_339 = var_339_arg_0 ? var_339_arg_1 : var_339_arg_2; [L826] SORT_1 var_340_arg_0 = input_12; [L827] SORT_1 var_340_arg_1 = var_17; [L828] SORT_1 var_340_arg_2 = var_339; [L829] SORT_1 var_340 = var_340_arg_0 ? var_340_arg_1 : var_340_arg_2; [L830] SORT_1 next_341_arg_1 = var_340; [L831] SORT_1 var_342_arg_0 = var_77; [L832] SORT_1 var_342_arg_1 = state_27; [L833] SORT_1 var_342_arg_2 = state_142; [L834] SORT_1 var_342 = var_342_arg_0 ? var_342_arg_1 : var_342_arg_2; [L835] SORT_1 var_344_arg_0 = input_12; [L836] SORT_1 var_344_arg_1 = input_343; [L837] SORT_1 var_344_arg_2 = var_342; [L838] SORT_1 var_344 = var_344_arg_0 ? var_344_arg_1 : var_344_arg_2; [L839] SORT_1 var_345_arg_0 = input_12; [L840] SORT_1 var_345_arg_1 = var_17; [L841] SORT_1 var_345_arg_2 = var_344; [L842] SORT_1 var_345 = var_345_arg_0 ? var_345_arg_1 : var_345_arg_2; [L843] SORT_1 next_346_arg_1 = var_345; [L844] SORT_1 var_347_arg_0 = input_12; [L845] SORT_1 var_347_arg_1 = var_17; [L846] SORT_1 var_347_arg_2 = input_11; [L847] SORT_1 var_347 = var_347_arg_0 ? var_347_arg_1 : var_347_arg_2; [L848] SORT_1 next_348_arg_1 = var_347; [L849] SORT_1 var_349_arg_0 = input_12; [L850] SORT_1 var_349_arg_1 = var_17; [L851] SORT_1 var_349_arg_2 = input_11; [L852] SORT_1 var_349 = var_349_arg_0 ? var_349_arg_1 : var_349_arg_2; [L853] SORT_1 next_350_arg_1 = var_349; [L854] SORT_1 var_351_arg_0 = var_77; [L855] SORT_1 var_351_arg_1 = state_25; [L856] SORT_1 var_351_arg_2 = state_174; [L857] SORT_1 var_351 = var_351_arg_0 ? var_351_arg_1 : var_351_arg_2; [L858] SORT_1 var_353_arg_0 = input_12; [L859] SORT_1 var_353_arg_1 = input_352; [L860] SORT_1 var_353_arg_2 = var_351; [L861] SORT_1 var_353 = var_353_arg_0 ? var_353_arg_1 : var_353_arg_2; [L862] SORT_1 var_354_arg_0 = input_12; [L863] SORT_1 var_354_arg_1 = var_17; [L864] SORT_1 var_354_arg_2 = var_353; [L865] SORT_1 var_354 = var_354_arg_0 ? var_354_arg_1 : var_354_arg_2; [L866] SORT_1 next_355_arg_1 = var_354; [L867] SORT_1 var_356_arg_0 = var_77; [L868] SORT_1 var_356_arg_1 = state_25; [L869] SORT_1 var_356_arg_2 = state_176; [L870] SORT_1 var_356 = var_356_arg_0 ? var_356_arg_1 : var_356_arg_2; [L871] SORT_1 var_358_arg_0 = input_12; [L872] SORT_1 var_358_arg_1 = input_357; [L873] SORT_1 var_358_arg_2 = var_356; [L874] SORT_1 var_358 = var_358_arg_0 ? var_358_arg_1 : var_358_arg_2; [L875] SORT_1 var_359_arg_0 = input_12; [L876] SORT_1 var_359_arg_1 = var_17; [L877] SORT_1 var_359_arg_2 = var_358; [L878] SORT_1 var_359 = var_359_arg_0 ? var_359_arg_1 : var_359_arg_2; [L879] SORT_1 next_360_arg_1 = var_359; [L880] SORT_1 var_361_arg_0 = input_12; [L881] SORT_1 var_361_arg_1 = var_17; [L882] SORT_1 var_361_arg_2 = input_16; [L883] SORT_1 var_361 = var_361_arg_0 ? var_361_arg_1 : var_361_arg_2; [L884] SORT_1 next_362_arg_1 = var_361; [L885] SORT_1 var_363_arg_0 = input_12; [L886] SORT_1 var_363_arg_1 = var_17; [L887] SORT_1 var_363_arg_2 = input_16; [L888] SORT_1 var_363 = var_363_arg_0 ? var_363_arg_1 : var_363_arg_2; [L889] SORT_1 next_364_arg_1 = var_363; [L891] state_18 = next_194_arg_1 [L892] state_25 = next_206_arg_1 [L893] state_27 = next_218_arg_1 [L894] state_30 = next_223_arg_1 [L895] state_33 = next_227_arg_1 [L896] state_36 = next_244_arg_1 [L897] state_39 = next_249_arg_1 [L898] state_53 = next_272_arg_1 [L899] state_57 = next_279_arg_1 [L900] state_74 = next_286_arg_1 [L901] state_84 = next_291_arg_1 [L902] state_86 = next_296_arg_1 [L903] state_97 = next_298_arg_1 [L904] state_101 = next_303_arg_1 [L905] state_107 = next_311_arg_1 [L906] state_111 = next_336_arg_1 [L907] state_140 = next_341_arg_1 [L908] state_142 = next_346_arg_1 [L909] state_146 = next_348_arg_1 [L910] state_148 = next_350_arg_1 [L911] state_174 = next_355_arg_1 [L912] state_176 = next_360_arg_1 [L913] state_187 = next_362_arg_1 [L914] state_189 = next_364_arg_1 [L215] input_2 = __VERIFIER_nondet_uchar() [L216] input_4 = __VERIFIER_nondet_ushort() [L217] input_6 = __VERIFIER_nondet_uchar() [L218] input_8 = __VERIFIER_nondet_uchar() [L219] input_9 = __VERIFIER_nondet_uchar() [L220] input_10 = __VERIFIER_nondet_uchar() [L221] input_11 = __VERIFIER_nondet_uchar() [L222] input_12 = __VERIFIER_nondet_uchar() [L223] EXPR input_12 & mask_SORT_1 VAL [mask_SORT_126=7, mask_SORT_1=1, mask_SORT_51=63, mask_SORT_5=255, mask_SORT_68=127, state_101=0, state_107=0, state_111=0, state_140=0, state_142=0, state_146=0, state_148=0, state_174=0, state_176=0, state_187=0, state_189=0, state_18=0, state_25=0, state_27=0, state_30=1, state_33=0, state_36=0, state_39=0, state_53=0, state_57=0, state_74=0, state_84=0, state_86=0, state_97=0, var_116=0, var_17=0, var_22=1, var_254=33, var_273=1, var_47=1, var_52=0, var_56=0, var_61=2, var_63=2, var_67=0] [L223] input_12 = input_12 & mask_SORT_1 [L224] input_13 = __VERIFIER_nondet_uchar() [L225] input_14 = __VERIFIER_nondet_uchar() [L226] input_15 = __VERIFIER_nondet_uchar() [L227] input_16 = __VERIFIER_nondet_uchar() [L228] input_80 = __VERIFIER_nondet_uchar() [L229] input_89 = __VERIFIER_nondet_uchar() [L230] input_91 = __VERIFIER_nondet_uchar() [L231] input_93 = __VERIFIER_nondet_uchar() [L232] input_95 = __VERIFIER_nondet_uchar() [L233] input_99 = __VERIFIER_nondet_uchar() [L234] input_103 = __VERIFIER_nondet_uchar() [L235] input_105 = __VERIFIER_nondet_uchar() [L236] input_109 = __VERIFIER_nondet_uchar() [L237] input_138 = __VERIFIER_nondet_uchar() [L238] input_144 = __VERIFIER_nondet_uchar() [L239] input_153 = __VERIFIER_nondet_uchar() [L240] input_155 = __VERIFIER_nondet_uchar() [L241] input_157 = __VERIFIER_nondet_uchar() [L242] input_166 = __VERIFIER_nondet_uchar() [L243] input_168 = __VERIFIER_nondet_uchar() [L244] input_170 = __VERIFIER_nondet_ushort() [L245] input_172 = __VERIFIER_nondet_uchar() [L246] input_183 = __VERIFIER_nondet_uchar() [L247] input_185 = __VERIFIER_nondet_uchar() [L248] input_198 = __VERIFIER_nondet_uchar() [L249] input_200 = __VERIFIER_nondet_uchar() [L250] input_203 = __VERIFIER_nondet_uchar() [L251] input_210 = __VERIFIER_nondet_uchar() [L252] input_212 = __VERIFIER_nondet_uchar() [L253] input_215 = __VERIFIER_nondet_uchar() [L254] input_220 = __VERIFIER_nondet_uchar() [L255] input_228 = __VERIFIER_nondet_uchar() [L256] input_229 = __VERIFIER_nondet_uchar() [L257] input_231 = __VERIFIER_nondet_uchar() [L258] input_234 = __VERIFIER_nondet_uchar() [L259] input_238 = __VERIFIER_nondet_uchar() [L260] input_241 = __VERIFIER_nondet_uchar() [L261] input_246 = __VERIFIER_nondet_uchar() [L262] input_250 = __VERIFIER_nondet_uchar() [L263] input_251 = __VERIFIER_nondet_uchar() [L264] input_258 = __VERIFIER_nondet_uchar() [L265] input_262 = __VERIFIER_nondet_uchar() [L266] input_266 = __VERIFIER_nondet_uchar() [L267] input_269 = __VERIFIER_nondet_uchar() [L268] input_276 = __VERIFIER_nondet_uchar() [L269] input_283 = __VERIFIER_nondet_uchar() [L270] input_288 = __VERIFIER_nondet_uchar() [L271] input_293 = __VERIFIER_nondet_uchar() [L272] input_300 = __VERIFIER_nondet_uchar() [L273] input_308 = __VERIFIER_nondet_uchar() [L274] input_312 = __VERIFIER_nondet_uchar() [L275] input_313 = __VERIFIER_nondet_uchar() [L276] input_315 = __VERIFIER_nondet_uchar() [L277] input_318 = __VERIFIER_nondet_uchar() [L278] input_320 = __VERIFIER_nondet_uchar() [L279] input_321 = __VERIFIER_nondet_uchar() [L280] input_326 = __VERIFIER_nondet_uchar() [L281] input_330 = __VERIFIER_nondet_uchar() [L282] input_333 = __VERIFIER_nondet_uchar() [L283] input_338 = __VERIFIER_nondet_uchar() [L284] input_343 = __VERIFIER_nondet_uchar() [L285] input_352 = __VERIFIER_nondet_uchar() [L286] input_357 = __VERIFIER_nondet_uchar() [L289] SORT_1 var_21_arg_0 = state_18; VAL [input_12=0, mask_SORT_126=7, mask_SORT_1=1, mask_SORT_51=63, mask_SORT_5=255, mask_SORT_68=127, state_101=0, state_107=0, state_111=0, state_140=0, state_142=0, state_146=0, state_148=0, state_174=0, state_176=0, state_187=0, state_189=0, state_25=0, state_27=0, state_30=1, state_33=0, state_36=0, state_39=0, state_53=0, state_57=0, state_74=0, state_84=0, state_86=0, state_97=0, var_116=0, var_17=0, var_21_arg_0=0, var_22=1, var_254=33, var_273=1, var_47=1, var_52=0, var_56=0, var_61=2, var_63=2, var_67=0] [L290] EXPR var_21_arg_0 & mask_SORT_1 VAL [input_12=0, mask_SORT_126=7, mask_SORT_1=1, mask_SORT_51=63, mask_SORT_5=255, mask_SORT_68=127, state_101=0, state_107=0, state_111=0, state_140=0, state_142=0, state_146=0, state_148=0, state_174=0, state_176=0, state_187=0, state_189=0, state_25=0, state_27=0, state_30=1, state_33=0, state_36=0, state_39=0, state_53=0, state_57=0, state_74=0, state_84=0, state_86=0, state_97=0, var_116=0, var_17=0, var_22=1, var_254=33, var_273=1, var_47=1, var_52=0, var_56=0, var_61=2, var_63=2, var_67=0] [L290] var_21_arg_0 = var_21_arg_0 & mask_SORT_1 [L291] SORT_20 var_21 = var_21_arg_0; [L292] SORT_20 var_23_arg_0 = var_21; [L293] SORT_20 var_23_arg_1 = var_22; [L294] SORT_1 var_23 = var_23_arg_0 == var_23_arg_1; [L295] SORT_1 var_24_arg_0 = var_23; [L296] SORT_1 var_24 = ~var_24_arg_0; [L297] SORT_1 var_29_arg_0 = state_25; [L298] SORT_1 var_29_arg_1 = state_27; VAL [input_12=0, mask_SORT_126=7, mask_SORT_1=1, mask_SORT_51=63, mask_SORT_5=255, mask_SORT_68=127, state_101=0, state_107=0, state_111=0, state_140=0, state_142=0, state_146=0, state_148=0, state_174=0, state_176=0, state_187=0, state_189=0, state_25=0, state_27=0, state_30=1, state_33=0, state_36=0, state_39=0, state_53=0, state_57=0, state_74=0, state_84=0, state_86=0, state_97=0, var_116=0, var_17=0, var_22=1, var_24=-1, var_254=33, var_273=1, var_29_arg_0=0, var_29_arg_1=0, var_47=1, var_52=0, var_56=0, var_61=2, var_63=2, var_67=0] [L299] EXPR var_29_arg_0 | var_29_arg_1 VAL [input_12=0, mask_SORT_126=7, mask_SORT_1=1, mask_SORT_51=63, mask_SORT_5=255, mask_SORT_68=127, state_101=0, state_107=0, state_111=0, state_140=0, state_142=0, state_146=0, state_148=0, state_174=0, state_176=0, state_187=0, state_189=0, state_25=0, state_27=0, state_30=1, state_33=0, state_36=0, state_39=0, state_53=0, state_57=0, state_74=0, state_84=0, state_86=0, state_97=0, var_116=0, var_17=0, var_22=1, var_24=-1, var_254=33, var_273=1, var_47=1, var_52=0, var_56=0, var_61=2, var_63=2, var_67=0] [L299] SORT_1 var_29 = var_29_arg_0 | var_29_arg_1; [L300] SORT_1 var_32_arg_0 = var_29; [L301] SORT_1 var_32_arg_1 = state_30; VAL [input_12=0, mask_SORT_126=7, mask_SORT_1=1, mask_SORT_51=63, mask_SORT_5=255, mask_SORT_68=127, state_101=0, state_107=0, state_111=0, state_140=0, state_142=0, state_146=0, state_148=0, state_174=0, state_176=0, state_187=0, state_189=0, state_25=0, state_27=0, state_30=1, state_33=0, state_36=0, state_39=0, state_53=0, state_57=0, state_74=0, state_84=0, state_86=0, state_97=0, var_116=0, var_17=0, var_22=1, var_24=-1, var_254=33, var_273=1, var_32_arg_0=0, var_32_arg_1=1, var_47=1, var_52=0, var_56=0, var_61=2, var_63=2, var_67=0] [L302] EXPR var_32_arg_0 | var_32_arg_1 VAL [input_12=0, mask_SORT_126=7, mask_SORT_1=1, mask_SORT_51=63, mask_SORT_5=255, mask_SORT_68=127, state_101=0, state_107=0, state_111=0, state_140=0, state_142=0, state_146=0, state_148=0, state_174=0, state_176=0, state_187=0, state_189=0, state_25=0, state_27=0, state_30=1, state_33=0, state_36=0, state_39=0, state_53=0, state_57=0, state_74=0, state_84=0, state_86=0, state_97=0, var_116=0, var_17=0, var_22=1, var_24=-1, var_254=33, var_273=1, var_47=1, var_52=0, var_56=0, var_61=2, var_63=2, var_67=0] [L302] SORT_1 var_32 = var_32_arg_0 | var_32_arg_1; [L303] SORT_1 var_35_arg_0 = var_32; [L304] SORT_1 var_35_arg_1 = state_33; VAL [input_12=0, mask_SORT_126=7, mask_SORT_1=1, mask_SORT_51=63, mask_SORT_5=255, mask_SORT_68=127, state_101=0, state_107=0, state_111=0, state_140=0, state_142=0, state_146=0, state_148=0, state_174=0, state_176=0, state_187=0, state_189=0, state_25=0, state_27=0, state_30=1, state_33=0, state_36=0, state_39=0, state_53=0, state_57=0, state_74=0, state_84=0, state_86=0, state_97=0, var_116=0, var_17=0, var_22=1, var_24=-1, var_254=33, var_273=1, var_35_arg_0=1, var_35_arg_1=0, var_47=1, var_52=0, var_56=0, var_61=2, var_63=2, var_67=0] [L305] EXPR var_35_arg_0 | var_35_arg_1 VAL [input_12=0, mask_SORT_126=7, mask_SORT_1=1, mask_SORT_51=63, mask_SORT_5=255, mask_SORT_68=127, state_101=0, state_107=0, state_111=0, state_140=0, state_142=0, state_146=0, state_148=0, state_174=0, state_176=0, state_187=0, state_189=0, state_25=0, state_27=0, state_30=1, state_33=0, state_36=0, state_39=0, state_53=0, state_57=0, state_74=0, state_84=0, state_86=0, state_97=0, var_116=0, var_17=0, var_22=1, var_24=-1, var_254=33, var_273=1, var_47=1, var_52=0, var_56=0, var_61=2, var_63=2, var_67=0] [L305] SORT_1 var_35 = var_35_arg_0 | var_35_arg_1; [L306] SORT_1 var_38_arg_0 = var_35; [L307] SORT_1 var_38_arg_1 = state_36; VAL [input_12=0, mask_SORT_126=7, mask_SORT_1=1, mask_SORT_51=63, mask_SORT_5=255, mask_SORT_68=127, state_101=0, state_107=0, state_111=0, state_140=0, state_142=0, state_146=0, state_148=0, state_174=0, state_176=0, state_187=0, state_189=0, state_25=0, state_27=0, state_30=1, state_33=0, state_36=0, state_39=0, state_53=0, state_57=0, state_74=0, state_84=0, state_86=0, state_97=0, var_116=0, var_17=0, var_22=1, var_24=-1, var_254=33, var_273=1, var_38_arg_0=1, var_38_arg_1=0, var_47=1, var_52=0, var_56=0, var_61=2, var_63=2, var_67=0] [L308] EXPR var_38_arg_0 | var_38_arg_1 VAL [input_12=0, mask_SORT_126=7, mask_SORT_1=1, mask_SORT_51=63, mask_SORT_5=255, mask_SORT_68=127, state_101=0, state_107=0, state_111=0, state_140=0, state_142=0, state_146=0, state_148=0, state_174=0, state_176=0, state_187=0, state_189=0, state_25=0, state_27=0, state_30=1, state_33=0, state_36=0, state_39=0, state_53=0, state_57=0, state_74=0, state_84=0, state_86=0, state_97=0, var_116=0, var_17=0, var_22=1, var_24=-1, var_254=33, var_273=1, var_47=1, var_52=0, var_56=0, var_61=2, var_63=2, var_67=0] [L308] SORT_1 var_38 = var_38_arg_0 | var_38_arg_1; [L309] SORT_1 var_41_arg_0 = var_38; [L310] SORT_1 var_41_arg_1 = state_39; VAL [input_12=0, mask_SORT_126=7, mask_SORT_1=1, mask_SORT_51=63, mask_SORT_5=255, mask_SORT_68=127, state_101=0, state_107=0, state_111=0, state_140=0, state_142=0, state_146=0, state_148=0, state_174=0, state_176=0, state_187=0, state_189=0, state_25=0, state_27=0, state_30=1, state_33=0, state_36=0, state_39=0, state_53=0, state_57=0, state_74=0, state_84=0, state_86=0, state_97=0, var_116=0, var_17=0, var_22=1, var_24=-1, var_254=33, var_273=1, var_41_arg_0=1, var_41_arg_1=0, var_47=1, var_52=0, var_56=0, var_61=2, var_63=2, var_67=0] [L311] EXPR var_41_arg_0 | var_41_arg_1 VAL [input_12=0, mask_SORT_126=7, mask_SORT_1=1, mask_SORT_51=63, mask_SORT_5=255, mask_SORT_68=127, state_101=0, state_107=0, state_111=0, state_140=0, state_142=0, state_146=0, state_148=0, state_174=0, state_176=0, state_187=0, state_189=0, state_25=0, state_27=0, state_30=1, state_33=0, state_36=0, state_39=0, state_53=0, state_57=0, state_74=0, state_84=0, state_86=0, state_97=0, var_116=0, var_17=0, var_22=1, var_24=-1, var_254=33, var_273=1, var_47=1, var_52=0, var_56=0, var_61=2, var_63=2, var_67=0] [L311] SORT_1 var_41 = var_41_arg_0 | var_41_arg_1; [L312] SORT_1 var_42_arg_0 = var_41; VAL [input_12=0, mask_SORT_126=7, mask_SORT_1=1, mask_SORT_51=63, mask_SORT_5=255, mask_SORT_68=127, state_101=0, state_107=0, state_111=0, state_140=0, state_142=0, state_146=0, state_148=0, state_174=0, state_176=0, state_187=0, state_189=0, state_25=0, state_27=0, state_30=1, state_33=0, state_36=0, state_39=0, state_53=0, state_57=0, state_74=0, state_84=0, state_86=0, state_97=0, var_116=0, var_17=0, var_22=1, var_24=-1, var_254=33, var_273=1, var_42_arg_0=1, var_47=1, var_52=0, var_56=0, var_61=2, var_63=2, var_67=0] [L313] EXPR var_42_arg_0 & mask_SORT_1 VAL [input_12=0, mask_SORT_126=7, mask_SORT_1=1, mask_SORT_51=63, mask_SORT_5=255, mask_SORT_68=127, state_101=0, state_107=0, state_111=0, state_140=0, state_142=0, state_146=0, state_148=0, state_174=0, state_176=0, state_187=0, state_189=0, state_25=0, state_27=0, state_30=1, state_33=0, state_36=0, state_39=0, state_53=0, state_57=0, state_74=0, state_84=0, state_86=0, state_97=0, var_116=0, var_17=0, var_22=1, var_24=-1, var_254=33, var_273=1, var_47=1, var_52=0, var_56=0, var_61=2, var_63=2, var_67=0] [L313] var_42_arg_0 = var_42_arg_0 & mask_SORT_1 [L314] SORT_20 var_42 = var_42_arg_0; [L315] SORT_20 var_43_arg_0 = var_42; [L316] SORT_20 var_43_arg_1 = var_22; [L317] SORT_1 var_43 = var_43_arg_0 == var_43_arg_1; [L318] SORT_1 var_44_arg_0 = var_24; [L319] SORT_1 var_44_arg_1 = var_43; VAL [input_12=0, mask_SORT_126=7, mask_SORT_1=1, mask_SORT_51=63, mask_SORT_5=255, mask_SORT_68=127, state_101=0, state_107=0, state_111=0, state_140=0, state_142=0, state_146=0, state_148=0, state_174=0, state_176=0, state_187=0, state_189=0, state_25=0, state_27=0, state_30=1, state_33=0, state_36=0, state_39=0, state_53=0, state_57=0, state_74=0, state_84=0, state_86=0, state_97=0, var_116=0, var_17=0, var_22=1, var_254=33, var_273=1, var_44_arg_0=-1, var_44_arg_1=1, var_47=1, var_52=0, var_56=0, var_61=2, var_63=2, var_67=0] [L320] EXPR var_44_arg_0 | var_44_arg_1 VAL [input_12=0, mask_SORT_126=7, mask_SORT_1=1, mask_SORT_51=63, mask_SORT_5=255, mask_SORT_68=127, state_101=0, state_107=0, state_111=0, state_140=0, state_142=0, state_146=0, state_148=0, state_174=0, state_176=0, state_187=0, state_189=0, state_25=0, state_27=0, state_30=1, state_33=0, state_36=0, state_39=0, state_53=0, state_57=0, state_74=0, state_84=0, state_86=0, state_97=0, var_116=0, var_17=0, var_22=1, var_254=33, var_273=1, var_47=1, var_52=0, var_56=0, var_61=2, var_63=2, var_67=0] [L320] SORT_1 var_44 = var_44_arg_0 | var_44_arg_1; [L321] SORT_1 var_48_arg_0 = var_44; [L322] SORT_1 var_48 = ~var_48_arg_0; [L323] SORT_1 var_49_arg_0 = var_47; [L324] SORT_1 var_49_arg_1 = var_48; VAL [input_12=0, mask_SORT_126=7, mask_SORT_1=1, mask_SORT_51=63, mask_SORT_5=255, mask_SORT_68=127, state_101=0, state_107=0, state_111=0, state_140=0, state_142=0, state_146=0, state_148=0, state_174=0, state_176=0, state_187=0, state_189=0, state_25=0, state_27=0, state_30=1, state_33=0, state_36=0, state_39=0, state_53=0, state_57=0, state_74=0, state_84=0, state_86=0, state_97=0, var_116=0, var_17=0, var_22=1, var_254=33, var_273=1, var_47=1, var_49_arg_0=1, var_49_arg_1=-1, var_52=0, var_56=0, var_61=2, var_63=2, var_67=0] [L325] EXPR var_49_arg_0 & var_49_arg_1 VAL [input_12=0, mask_SORT_126=7, mask_SORT_1=1, mask_SORT_51=63, mask_SORT_5=255, mask_SORT_68=127, state_101=0, state_107=0, state_111=0, state_140=0, state_142=0, state_146=0, state_148=0, state_174=0, state_176=0, state_187=0, state_189=0, state_25=0, state_27=0, state_30=1, state_33=0, state_36=0, state_39=0, state_53=0, state_57=0, state_74=0, state_84=0, state_86=0, state_97=0, var_116=0, var_17=0, var_22=1, var_254=33, var_273=1, var_47=1, var_52=0, var_56=0, var_61=2, var_63=2, var_67=0] [L325] SORT_1 var_49 = var_49_arg_0 & var_49_arg_1; [L326] EXPR var_49 & mask_SORT_1 VAL [input_12=0, mask_SORT_126=7, mask_SORT_1=1, mask_SORT_51=63, mask_SORT_5=255, mask_SORT_68=127, state_101=0, state_107=0, state_111=0, state_140=0, state_142=0, state_146=0, state_148=0, state_174=0, state_176=0, state_187=0, state_189=0, state_25=0, state_27=0, state_30=1, state_33=0, state_36=0, state_39=0, state_53=0, state_57=0, state_74=0, state_84=0, state_86=0, state_97=0, var_116=0, var_17=0, var_22=1, var_254=33, var_273=1, var_47=1, var_52=0, var_56=0, var_61=2, var_63=2, var_67=0] [L326] var_49 = var_49 & mask_SORT_1 [L327] SORT_1 bad_50_arg_0 = var_49; [L328] CALL __VERIFIER_assert(!(bad_50_arg_0)) [L21] COND TRUE !(cond) [L21] reach_error() - StatisticsResult: Ultimate Automizer benchmark data CFG has 1 procedures, 326 locations, 1 error locations. Started 1 CEGAR loops. OverallTime: 294.0s, OverallIterations: 40, TraceHistogramMax: 2, PathProgramHistogramMax: 1, EmptinessCheckTime: 0.1s, AutomataDifference: 73.5s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, HoareTripleCheckerStatistics: 5 mSolverCounterUnknown, 70228 SdHoareTripleChecker+Valid, 56.5s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 70228 mSDsluCounter, 123235 SdHoareTripleChecker+Invalid, 49.9s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 0 IncrementalHoareTripleChecker+Unchecked, 108078 mSDsCounter, 187 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 64593 IncrementalHoareTripleChecker+Invalid, 64785 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 187 mSolverCounterUnsat, 15157 mSDtfsCounter, 64593 mSolverCounterSat, 0.7s SdHoareTripleChecker+Time, 5 IncrementalHoareTripleChecker+Unknown, PredicateUnifierStatistics: 0 DeclaredPredicates, 6276 GetRequests, 5273 SyntacticMatches, 18 SemanticMatches, 985 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 16656 ImplicationChecksByTransitivity, 77.1s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=9163occurred in iteration=38, InterpolantAutomatonStates: 574, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 1.4s AutomataMinimizationTime, 39 MinimizatonAttempts, 23805 StatesRemovedByMinimization, 28 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 3.9s SsaConstructionTime, 38.2s SatisfiabilityAnalysisTime, 156.6s InterpolantComputationTime, 10105 NumberOfCodeBlocks, 10105 NumberOfCodeBlocksAsserted, 57 NumberOfCheckSat, 11886 ConstructedInterpolants, 142 QuantifiedInterpolants, 113254 SizeOfPredicates, 107 NumberOfNonLiveVariables, 27654 ConjunctsInSsa, 1078 ConjunctsInUnsatCore, 66 InterpolantComputations, 29 PerfectInterpolantSequences, 890/1350 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available, ConComCheckerStatistics: No data available RESULT: Ultimate could not prove your program: unable to determine feasibility of some traces [2024-11-28 02:13:48,881 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_222ce6d4-5b40-4d76-abe1-0d226bb9524c/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Ended with exit code 0 Received shutdown request... --- End real Ultimate output --- Execution finished normally Using bit-precise analysis Retrying with bit-precise analysis ### Bit-precise run ### Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_222ce6d4-5b40-4d76-abe1-0d226bb9524c/bin/uautomizer-verify-aQ6SnzHsRB/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_222ce6d4-5b40-4d76-abe1-0d226bb9524c/bin/uautomizer-verify-aQ6SnzHsRB/plugins/org.eclipse.equinox.launcher_1.6.800.v20240513-1750.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_222ce6d4-5b40-4d76-abe1-0d226bb9524c/bin/uautomizer-verify-aQ6SnzHsRB/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_222ce6d4-5b40-4d76-abe1-0d226bb9524c/bin/uautomizer-verify-aQ6SnzHsRB/config/AutomizerReach.xml -i ../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.miim.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_222ce6d4-5b40-4d76-abe1-0d226bb9524c/bin/uautomizer-verify-aQ6SnzHsRB/config/svcomp-Reach-64bit-Automizer_Bitvector.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_222ce6d4-5b40-4d76-abe1-0d226bb9524c/bin/uautomizer-verify-aQ6SnzHsRB --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash 8c8574ead59a3d6c844f4988721fe479d7d5d492b1ea6dd2e875c5c9834b070c --- Real Ultimate output --- This is Ultimate 0.3.0-dev-d790fec [2024-11-28 02:13:51,656 INFO L188 SettingsManager]: Resetting all preferences to default values... [2024-11-28 02:13:51,808 INFO L114 SettingsManager]: Loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_222ce6d4-5b40-4d76-abe1-0d226bb9524c/bin/uautomizer-verify-aQ6SnzHsRB/config/svcomp-Reach-64bit-Automizer_Bitvector.epf [2024-11-28 02:13:51,817 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2024-11-28 02:13:51,819 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2024-11-28 02:13:51,861 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2024-11-28 02:13:51,862 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2024-11-28 02:13:51,862 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2024-11-28 02:13:51,863 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2024-11-28 02:13:51,863 INFO L153 SettingsManager]: * Use memory slicer=true [2024-11-28 02:13:51,865 INFO L151 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2024-11-28 02:13:51,865 INFO L153 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2024-11-28 02:13:51,865 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2024-11-28 02:13:51,866 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2024-11-28 02:13:51,866 INFO L153 SettingsManager]: * Use SBE=true [2024-11-28 02:13:51,866 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2024-11-28 02:13:51,866 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2024-11-28 02:13:51,866 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2024-11-28 02:13:51,866 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2024-11-28 02:13:51,866 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2024-11-28 02:13:51,866 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2024-11-28 02:13:51,866 INFO L153 SettingsManager]: * Adapt memory model on pointer casts if necessary=true [2024-11-28 02:13:51,866 INFO L153 SettingsManager]: * Use bitvectors instead of ints=true [2024-11-28 02:13:51,866 INFO L153 SettingsManager]: * Memory model=HoenickeLindenmann_4ByteResolution [2024-11-28 02:13:51,867 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2024-11-28 02:13:51,867 INFO L153 SettingsManager]: * Behaviour of calls to undefined functions=OVERAPPROXIMATE_BEHAVIOUR [2024-11-28 02:13:51,867 INFO L153 SettingsManager]: * Use constant arrays=true [2024-11-28 02:13:51,867 INFO L151 SettingsManager]: Preferences of IcfgBuilder differ from their defaults: [2024-11-28 02:13:51,867 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-11-28 02:13:51,867 INFO L153 SettingsManager]: * Only consider context switches at boundaries of atomic blocks=true [2024-11-28 02:13:51,867 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2024-11-28 02:13:51,867 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2024-11-28 02:13:51,867 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2024-11-28 02:13:51,867 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-11-28 02:13:51,867 INFO L153 SettingsManager]: * Only consider context switches at boundaries of atomic blocks=true [2024-11-28 02:13:51,867 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2024-11-28 02:13:51,868 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2024-11-28 02:13:51,868 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2024-11-28 02:13:51,868 INFO L153 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2024-11-28 02:13:51,868 INFO L153 SettingsManager]: * Compute procedure contracts=false [2024-11-28 02:13:51,868 INFO L153 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopHeads [2024-11-28 02:13:51,868 INFO L153 SettingsManager]: * Trace refinement strategy=FOX [2024-11-28 02:13:51,868 INFO L153 SettingsManager]: * Command for external solver=cvc4 --incremental --print-success --lang smt [2024-11-28 02:13:51,868 INFO L153 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false [2024-11-28 02:13:51,868 INFO L153 SettingsManager]: * Automaton type used in concurrency analysis=PETRI_NET [2024-11-28 02:13:51,868 INFO L153 SettingsManager]: * Order on configurations for Petri net unfoldings=DBO [2024-11-28 02:13:51,868 INFO L153 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2024-11-28 02:13:51,869 INFO L153 SettingsManager]: * Looper check in Petri net analysis=SEMANTIC Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_222ce6d4-5b40-4d76-abe1-0d226bb9524c/bin/uautomizer-verify-aQ6SnzHsRB Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 8c8574ead59a3d6c844f4988721fe479d7d5d492b1ea6dd2e875c5c9834b070c [2024-11-28 02:13:52,201 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2024-11-28 02:13:52,214 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2024-11-28 02:13:52,219 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2024-11-28 02:13:52,220 INFO L270 PluginConnector]: Initializing CDTParser... [2024-11-28 02:13:52,221 INFO L274 PluginConnector]: CDTParser initialized [2024-11-28 02:13:52,224 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_222ce6d4-5b40-4d76-abe1-0d226bb9524c/bin/uautomizer-verify-aQ6SnzHsRB/../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.miim.c [2024-11-28 02:13:55,321 INFO L533 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_222ce6d4-5b40-4d76-abe1-0d226bb9524c/bin/uautomizer-verify-aQ6SnzHsRB/data/599b6ced6/aec75ad9dace4983b85c655160958e55/FLAG0c0397a9d [2024-11-28 02:13:55,673 INFO L384 CDTParser]: Found 1 translation units. [2024-11-28 02:13:55,674 INFO L180 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_222ce6d4-5b40-4d76-abe1-0d226bb9524c/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.miim.c [2024-11-28 02:13:55,696 INFO L427 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_222ce6d4-5b40-4d76-abe1-0d226bb9524c/bin/uautomizer-verify-aQ6SnzHsRB/data/599b6ced6/aec75ad9dace4983b85c655160958e55/FLAG0c0397a9d [2024-11-28 02:13:55,721 INFO L435 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_222ce6d4-5b40-4d76-abe1-0d226bb9524c/bin/uautomizer-verify-aQ6SnzHsRB/data/599b6ced6/aec75ad9dace4983b85c655160958e55 [2024-11-28 02:13:55,725 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2024-11-28 02:13:55,726 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2024-11-28 02:13:55,729 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2024-11-28 02:13:55,729 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2024-11-28 02:13:55,734 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2024-11-28 02:13:55,735 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.11 02:13:55" (1/1) ... [2024-11-28 02:13:55,738 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@7bad331e and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 02:13:55, skipping insertion in model container [2024-11-28 02:13:55,739 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.11 02:13:55" (1/1) ... [2024-11-28 02:13:55,792 INFO L175 MainTranslator]: Built tables and reachable declarations [2024-11-28 02:13:56,010 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_222ce6d4-5b40-4d76-abe1-0d226bb9524c/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.miim.c[1244,1257] [2024-11-28 02:13:56,275 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-11-28 02:13:56,296 INFO L200 MainTranslator]: Completed pre-run [2024-11-28 02:13:56,309 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_222ce6d4-5b40-4d76-abe1-0d226bb9524c/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.miim.c[1244,1257] [2024-11-28 02:13:56,436 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-11-28 02:13:56,452 INFO L204 MainTranslator]: Completed translation [2024-11-28 02:13:56,452 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 02:13:56 WrapperNode [2024-11-28 02:13:56,453 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2024-11-28 02:13:56,454 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2024-11-28 02:13:56,454 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2024-11-28 02:13:56,454 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2024-11-28 02:13:56,461 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 02:13:56" (1/1) ... [2024-11-28 02:13:56,483 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 02:13:56" (1/1) ... [2024-11-28 02:13:56,572 INFO L138 Inliner]: procedures = 17, calls = 15, calls flagged for inlining = 3, calls inlined = 3, statements flattened = 1085 [2024-11-28 02:13:56,574 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2024-11-28 02:13:56,574 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2024-11-28 02:13:56,575 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2024-11-28 02:13:56,575 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2024-11-28 02:13:56,584 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 02:13:56" (1/1) ... [2024-11-28 02:13:56,584 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 02:13:56" (1/1) ... [2024-11-28 02:13:56,593 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 02:13:56" (1/1) ... [2024-11-28 02:13:56,617 INFO L175 MemorySlicer]: Split 9 memory accesses to 2 slices as follows [2, 7]. 78 percent of accesses are in the largest equivalence class. The 9 initializations are split as follows [2, 7]. The 0 writes are split as follows [0, 0]. [2024-11-28 02:13:56,617 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 02:13:56" (1/1) ... [2024-11-28 02:13:56,617 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 02:13:56" (1/1) ... [2024-11-28 02:13:56,661 INFO L184 PluginConnector]: Executing the observer ReplaceArrayAssignments from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 02:13:56" (1/1) ... [2024-11-28 02:13:56,663 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 02:13:56" (1/1) ... [2024-11-28 02:13:56,671 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 02:13:56" (1/1) ... [2024-11-28 02:13:56,678 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 02:13:56" (1/1) ... [2024-11-28 02:13:56,682 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 02:13:56" (1/1) ... [2024-11-28 02:13:56,690 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2024-11-28 02:13:56,691 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2024-11-28 02:13:56,691 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2024-11-28 02:13:56,691 INFO L274 PluginConnector]: RCFGBuilder initialized [2024-11-28 02:13:56,692 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 02:13:56" (1/1) ... [2024-11-28 02:13:56,698 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2024-11-28 02:13:56,712 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_222ce6d4-5b40-4d76-abe1-0d226bb9524c/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 02:13:56,724 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_222ce6d4-5b40-4d76-abe1-0d226bb9524c/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (exit command is (exit), workingDir is null) [2024-11-28 02:13:56,731 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_222ce6d4-5b40-4d76-abe1-0d226bb9524c/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Waiting until timeout for monitored process [2024-11-28 02:13:56,769 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2024-11-28 02:13:56,769 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~intINTTYPE1#0 [2024-11-28 02:13:56,769 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~intINTTYPE1#1 [2024-11-28 02:13:56,769 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2024-11-28 02:13:56,770 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2024-11-28 02:13:57,037 INFO L234 CfgBuilder]: Building ICFG [2024-11-28 02:13:57,039 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2024-11-28 02:13:57,943 INFO L? ?]: Removed 126 outVars from TransFormulas that were not future-live. [2024-11-28 02:13:57,944 INFO L283 CfgBuilder]: Performing block encoding [2024-11-28 02:13:57,953 INFO L307 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2024-11-28 02:13:57,954 INFO L312 CfgBuilder]: Removed 1 assume(true) statements. [2024-11-28 02:13:57,954 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.11 02:13:57 BoogieIcfgContainer [2024-11-28 02:13:57,954 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2024-11-28 02:13:57,957 INFO L112 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2024-11-28 02:13:57,958 INFO L270 PluginConnector]: Initializing TraceAbstraction... [2024-11-28 02:13:57,962 INFO L274 PluginConnector]: TraceAbstraction initialized [2024-11-28 02:13:57,963 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 28.11 02:13:55" (1/3) ... [2024-11-28 02:13:57,964 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@1aaf622c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.11 02:13:57, skipping insertion in model container [2024-11-28 02:13:57,964 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 02:13:56" (2/3) ... [2024-11-28 02:13:57,965 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@1aaf622c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.11 02:13:57, skipping insertion in model container [2024-11-28 02:13:57,966 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.11 02:13:57" (3/3) ... [2024-11-28 02:13:57,967 INFO L128 eAbstractionObserver]: Analyzing ICFG btor2c-lazyMod.miim.c [2024-11-28 02:13:57,985 INFO L216 ceAbstractionStarter]: Automizer settings: Hoare:LoopHeads NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2024-11-28 02:13:57,986 INFO L151 ceAbstractionStarter]: Applying trace abstraction to ICFG btor2c-lazyMod.miim.c that has 1 procedures, 10 locations, 1 initial locations, 1 loop locations, and 1 error locations. [2024-11-28 02:13:58,037 INFO L332 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2024-11-28 02:13:58,065 INFO L333 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mAutomataTypeConcurrency=PETRI_NET, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopHeads, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@223d4c6c, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2024-11-28 02:13:58,067 INFO L334 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2024-11-28 02:13:58,071 INFO L276 IsEmpty]: Start isEmpty. Operand has 10 states, 8 states have (on average 1.375) internal successors, (11), 9 states have internal predecessors, (11), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 02:13:58,076 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 6 [2024-11-28 02:13:58,076 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 02:13:58,077 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1] [2024-11-28 02:13:58,077 INFO L396 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 02:13:58,083 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 02:13:58,085 INFO L85 PathProgramCache]: Analyzing trace with hash 28694789, now seen corresponding path program 1 times [2024-11-28 02:13:58,098 INFO L118 FreeRefinementEngine]: Executing refinement strategy FOX [2024-11-28 02:13:58,098 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1979336588] [2024-11-28 02:13:58,098 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:13:58,099 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-28 02:13:58,099 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_222ce6d4-5b40-4d76-abe1-0d226bb9524c/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 02:13:58,103 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_222ce6d4-5b40-4d76-abe1-0d226bb9524c/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-28 02:13:58,104 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_222ce6d4-5b40-4d76-abe1-0d226bb9524c/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2024-11-28 02:13:58,491 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 02:13:58,498 INFO L256 TraceCheckSpWp]: Trace formula consists of 139 conjuncts, 22 conjuncts are in the unsatisfiable core [2024-11-28 02:13:58,510 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-28 02:13:58,754 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-28 02:13:58,755 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-11-28 02:13:58,757 INFO L136 FreeRefinementEngine]: Strategy FOX found an infeasible trace [2024-11-28 02:13:58,757 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1979336588] [2024-11-28 02:13:58,758 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1979336588] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 02:13:58,758 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 02:13:58,758 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-28 02:13:58,763 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [673105411] [2024-11-28 02:13:58,763 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 02:13:58,767 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-28 02:13:58,768 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy FOX [2024-11-28 02:13:58,791 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-28 02:13:58,791 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-28 02:13:58,794 INFO L87 Difference]: Start difference. First operand has 10 states, 8 states have (on average 1.375) internal successors, (11), 9 states have internal predecessors, (11), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 4 states, 4 states have (on average 1.25) internal successors, (5), 4 states have internal predecessors, (5), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 02:13:58,865 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 02:13:58,865 INFO L93 Difference]: Finished difference Result 17 states and 22 transitions. [2024-11-28 02:13:58,867 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-28 02:13:58,869 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 1.25) internal successors, (5), 4 states have internal predecessors, (5), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 5 [2024-11-28 02:13:58,869 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 02:13:58,876 INFO L225 Difference]: With dead ends: 17 [2024-11-28 02:13:58,876 INFO L226 Difference]: Without dead ends: 9 [2024-11-28 02:13:58,878 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-28 02:13:58,883 INFO L435 NwaCegarLoop]: 5 mSDtfsCounter, 0 mSDsluCounter, 6 mSDsCounter, 0 mSdLazyCounter, 9 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 11 SdHoareTripleChecker+Invalid, 9 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 9 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-28 02:13:58,887 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 11 Invalid, 9 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 9 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-28 02:13:58,902 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9 states. [2024-11-28 02:13:58,912 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9 to 9. [2024-11-28 02:13:58,913 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 9 states, 8 states have (on average 1.125) internal successors, (9), 8 states have internal predecessors, (9), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 02:13:58,919 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 9 transitions. [2024-11-28 02:13:58,923 INFO L78 Accepts]: Start accepts. Automaton has 9 states and 9 transitions. Word has length 5 [2024-11-28 02:13:58,924 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 02:13:58,924 INFO L471 AbstractCegarLoop]: Abstraction has 9 states and 9 transitions. [2024-11-28 02:13:58,924 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 1.25) internal successors, (5), 4 states have internal predecessors, (5), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 02:13:58,924 INFO L276 IsEmpty]: Start isEmpty. Operand 9 states and 9 transitions. [2024-11-28 02:13:58,924 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 9 [2024-11-28 02:13:58,925 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 02:13:58,925 INFO L218 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1] [2024-11-28 02:13:58,936 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_222ce6d4-5b40-4d76-abe1-0d226bb9524c/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Forceful destruction successful, exit code 0 [2024-11-28 02:13:59,126 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 2 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_222ce6d4-5b40-4d76-abe1-0d226bb9524c/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-28 02:13:59,126 INFO L396 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 02:13:59,127 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 02:13:59,127 INFO L85 PathProgramCache]: Analyzing trace with hash 152739811, now seen corresponding path program 1 times [2024-11-28 02:13:59,128 INFO L118 FreeRefinementEngine]: Executing refinement strategy FOX [2024-11-28 02:13:59,128 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1551043460] [2024-11-28 02:13:59,128 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:13:59,128 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-28 02:13:59,128 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_222ce6d4-5b40-4d76-abe1-0d226bb9524c/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 02:13:59,134 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_222ce6d4-5b40-4d76-abe1-0d226bb9524c/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-28 02:13:59,135 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_222ce6d4-5b40-4d76-abe1-0d226bb9524c/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2024-11-28 02:13:59,593 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 02:13:59,599 INFO L256 TraceCheckSpWp]: Trace formula consists of 203 conjuncts, 26 conjuncts are in the unsatisfiable core [2024-11-28 02:13:59,612 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-28 02:13:59,888 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-28 02:13:59,889 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-28 02:14:00,273 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-28 02:14:00,274 INFO L136 FreeRefinementEngine]: Strategy FOX found an infeasible trace [2024-11-28 02:14:00,274 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1551043460] [2024-11-28 02:14:00,274 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1551043460] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-28 02:14:00,274 INFO L185 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2024-11-28 02:14:00,274 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6] total 10 [2024-11-28 02:14:00,274 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [535168339] [2024-11-28 02:14:00,274 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2024-11-28 02:14:00,276 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 10 states [2024-11-28 02:14:00,276 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy FOX [2024-11-28 02:14:00,277 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2024-11-28 02:14:00,277 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=65, Unknown=0, NotChecked=0, Total=90 [2024-11-28 02:14:00,277 INFO L87 Difference]: Start difference. First operand 9 states and 9 transitions. Second operand has 10 states, 10 states have (on average 1.4) internal successors, (14), 10 states have internal predecessors, (14), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 02:14:00,442 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 02:14:00,442 INFO L93 Difference]: Finished difference Result 14 states and 14 transitions. [2024-11-28 02:14:00,442 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2024-11-28 02:14:00,443 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 10 states have (on average 1.4) internal successors, (14), 10 states have internal predecessors, (14), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 8 [2024-11-28 02:14:00,443 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 02:14:00,443 INFO L225 Difference]: With dead ends: 14 [2024-11-28 02:14:00,443 INFO L226 Difference]: Without dead ends: 12 [2024-11-28 02:14:00,444 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 6 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=40, Invalid=92, Unknown=0, NotChecked=0, Total=132 [2024-11-28 02:14:00,445 INFO L435 NwaCegarLoop]: 4 mSDtfsCounter, 0 mSDsluCounter, 16 mSDsCounter, 0 mSdLazyCounter, 26 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 20 SdHoareTripleChecker+Invalid, 28 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 26 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-28 02:14:00,445 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 20 Invalid, 28 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 26 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-28 02:14:00,446 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12 states. [2024-11-28 02:14:00,447 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12 to 12. [2024-11-28 02:14:00,448 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 12 states, 11 states have (on average 1.0909090909090908) internal successors, (12), 11 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 02:14:00,448 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12 states to 12 states and 12 transitions. [2024-11-28 02:14:00,448 INFO L78 Accepts]: Start accepts. Automaton has 12 states and 12 transitions. Word has length 8 [2024-11-28 02:14:00,449 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 02:14:00,449 INFO L471 AbstractCegarLoop]: Abstraction has 12 states and 12 transitions. [2024-11-28 02:14:00,449 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 10 states, 10 states have (on average 1.4) internal successors, (14), 10 states have internal predecessors, (14), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 02:14:00,449 INFO L276 IsEmpty]: Start isEmpty. Operand 12 states and 12 transitions. [2024-11-28 02:14:00,449 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2024-11-28 02:14:00,450 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 02:14:00,450 INFO L218 NwaCegarLoop]: trace histogram [3, 2, 2, 1, 1, 1, 1] [2024-11-28 02:14:00,460 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_222ce6d4-5b40-4d76-abe1-0d226bb9524c/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Forceful destruction successful, exit code 0 [2024-11-28 02:14:00,650 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_222ce6d4-5b40-4d76-abe1-0d226bb9524c/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-28 02:14:00,650 INFO L396 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 02:14:00,651 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 02:14:00,651 INFO L85 PathProgramCache]: Analyzing trace with hash 1906115653, now seen corresponding path program 2 times [2024-11-28 02:14:00,652 INFO L118 FreeRefinementEngine]: Executing refinement strategy FOX [2024-11-28 02:14:00,652 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [437813041] [2024-11-28 02:14:00,653 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2024-11-28 02:14:00,653 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-28 02:14:00,653 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_222ce6d4-5b40-4d76-abe1-0d226bb9524c/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 02:14:00,656 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_222ce6d4-5b40-4d76-abe1-0d226bb9524c/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-28 02:14:00,658 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_222ce6d4-5b40-4d76-abe1-0d226bb9524c/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2024-11-28 02:14:01,135 INFO L229 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2024-11-28 02:14:01,135 INFO L230 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-28 02:14:01,142 INFO L256 TraceCheckSpWp]: Trace formula consists of 267 conjuncts, 35 conjuncts are in the unsatisfiable core [2024-11-28 02:14:01,154 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-28 02:14:01,788 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-28 02:14:01,788 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-28 02:14:10,802 WARN L249 Executor]: External (MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_222ce6d4-5b40-4d76-abe1-0d226bb9524c/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1) with exit command (exit)) stderr output: (error "out of memory") [2024-11-28 02:14:10,804 INFO L136 FreeRefinementEngine]: Strategy FOX found an infeasible trace [2024-11-28 02:14:10,805 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [437813041] [2024-11-28 02:14:10,805 WARN L320 FreeRefinementEngine]: Global settings require throwing the following exception [2024-11-28 02:14:10,802 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_222ce6d4-5b40-4d76-abe1-0d226bb9524c/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Ended with exit code 101 [2024-11-28 02:14:10,813 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_222ce6d4-5b40-4d76-abe1-0d226bb9524c/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Ended with exit code 0 [2024-11-28 02:14:11,006 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 4 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_222ce6d4-5b40-4d76-abe1-0d226bb9524c/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-28 02:14:11,006 FATAL L? ?]: An unrecoverable error occured during an interaction with an SMT solver: de.uni_freiburg.informatik.ultimate.logic.SMTLIBException: External (MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_222ce6d4-5b40-4d76-abe1-0d226bb9524c/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1) with exit command (exit)) Received EOF on stdin. stderr output: (error "out of memory") at de.uni_freiburg.informatik.ultimate.smtsolver.external.Executor.parse(Executor.java:262) at de.uni_freiburg.informatik.ultimate.smtsolver.external.Executor.parseCheckSatResult(Executor.java:281) at de.uni_freiburg.informatik.ultimate.smtsolver.external.Scriptor.checkSat(Scriptor.java:155) at de.uni_freiburg.informatik.ultimate.logic.WrapperScript.checkSat(WrapperScript.java:163) at de.uni_freiburg.informatik.ultimate.logic.WrapperScript.checkSat(WrapperScript.java:163) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.ManagedScript.checkSat(ManagedScript.java:148) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.MonolithicImplicationChecker.checkImplication(MonolithicImplicationChecker.java:85) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier$PredicateComparison.compare(PredicateUnifier.java:842) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier$PredicateComparison.(PredicateUnifier.java:786) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate(PredicateUnifier.java:374) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate(PredicateUnifier.java:323) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.singletracecheck.TraceCheckSpWp$UnifyPostprocessor.postprocess(TraceCheckSpWp.java:555) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.predicates.IterativePredicateTransformer.applyPostprocessors(IterativePredicateTransformer.java:416) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.predicates.IterativePredicateTransformer.computeBackwardSequence(IterativePredicateTransformer.java:395) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.predicates.IterativePredicateTransformer.computeWeakestPreconditionSequence(IterativePredicateTransformer.java:267) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.singletracecheck.TraceCheckSpWp.computeInterpolantsUsingUnsatCore(TraceCheckSpWp.java:325) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.singletracecheck.TraceCheckSpWp.computeInterpolants(TraceCheckSpWp.java:181) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.singletracecheck.TraceCheckSpWp.(TraceCheckSpWp.java:160) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.IpTcStrategyModuleSpWp.construct(IpTcStrategyModuleSpWp.java:106) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.IpTcStrategyModuleSpWp.construct(IpTcStrategyModuleSpWp.java:1) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.IpTcStrategyModuleBase.getOrConstruct(IpTcStrategyModuleBase.java:101) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.IpTcStrategyModuleBase.isCorrect(IpTcStrategyModuleBase.java:57) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.tracehandling.AutomatonFreeRefinementEngine.checkFeasibility(AutomatonFreeRefinementEngine.java:210) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.tracehandling.AutomatonFreeRefinementEngine.executeStrategy(AutomatonFreeRefinementEngine.java:121) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.tracehandling.AutomatonFreeRefinementEngine.(AutomatonFreeRefinementEngine.java:85) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.TraceAbstractionRefinementEngine.(TraceAbstractionRefinementEngine.java:82) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.BasicCegarLoop.isCounterexampleFeasible(BasicCegarLoop.java:317) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.iterate(AbstractCegarLoop.java:407) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.startCegar(AbstractCegarLoop.java:342) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.runCegar(AbstractCegarLoop.java:324) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.executeCegarLoop(TraceAbstractionStarter.java:428) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.analyseProgram(TraceAbstractionStarter.java:314) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.analyseSequentialProgram(TraceAbstractionStarter.java:275) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.runCegarLoops(TraceAbstractionStarter.java:167) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.(TraceAbstractionStarter.java:140) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver.finish(TraceAbstractionObserver.java:132) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runObserver(PluginConnector.java:167) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runTool(PluginConnector.java:150) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.run(PluginConnector.java:127) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.executePluginConnector(ToolchainWalker.java:233) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.processPlugin(ToolchainWalker.java:227) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walkUnprotected(ToolchainWalker.java:144) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walk(ToolchainWalker.java:106) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainManager$Toolchain.processToolchain(ToolchainManager.java:319) at de.uni_freiburg.informatik.ultimate.core.coreplugin.toolchain.DefaultToolchainJob.run(DefaultToolchainJob.java:145) at org.eclipse.core.internal.jobs.Worker.run(Worker.java:63) Caused by: de.uni_freiburg.informatik.ultimate.logic.SMTLIBException: EOF at de.uni_freiburg.informatik.ultimate.smtsolver.external.Parser$Action$.CUP$do_action(Parser.java:1518) at de.uni_freiburg.informatik.ultimate.smtsolver.external.Parser.do_action(Parser.java:701) at com.github.jhoenicke.javacup.runtime.LRParser.parse(LRParser.java:383) at de.uni_freiburg.informatik.ultimate.smtsolver.external.Executor.parse(Executor.java:258) ... 45 more [2024-11-28 02:14:11,014 INFO L158 Benchmark]: Toolchain (without parser) took 15287.58ms. Allocated memory was 83.9MB in the beginning and 343.9MB in the end (delta: 260.0MB). Free memory was 59.3MB in the beginning and 287.2MB in the end (delta: -228.0MB). Peak memory consumption was 33.5MB. Max. memory is 16.1GB. [2024-11-28 02:14:11,014 INFO L158 Benchmark]: CDTParser took 0.59ms. Allocated memory is still 83.9MB. Free memory is still 64.4MB. There was no memory consumed. Max. memory is 16.1GB. [2024-11-28 02:14:11,014 INFO L158 Benchmark]: CACSL2BoogieTranslator took 724.41ms. Allocated memory is still 83.9MB. Free memory was 59.0MB in the beginning and 27.1MB in the end (delta: 31.9MB). Peak memory consumption was 25.2MB. Max. memory is 16.1GB. [2024-11-28 02:14:11,015 INFO L158 Benchmark]: Boogie Procedure Inliner took 120.34ms. Allocated memory is still 83.9MB. Free memory was 27.1MB in the beginning and 55.9MB in the end (delta: -28.8MB). Peak memory consumption was 14.3MB. Max. memory is 16.1GB. [2024-11-28 02:14:11,019 INFO L158 Benchmark]: Boogie Preprocessor took 115.44ms. Allocated memory is still 83.9MB. Free memory was 55.9MB in the beginning and 48.1MB in the end (delta: 7.8MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. [2024-11-28 02:14:11,020 INFO L158 Benchmark]: RCFGBuilder took 1263.77ms. Allocated memory is still 83.9MB. Free memory was 48.1MB in the beginning and 33.3MB in the end (delta: 14.8MB). Peak memory consumption was 36.6MB. Max. memory is 16.1GB. [2024-11-28 02:14:11,020 INFO L158 Benchmark]: TraceAbstraction took 13056.09ms. Allocated memory was 83.9MB in the beginning and 343.9MB in the end (delta: 260.0MB). Free memory was 32.7MB in the beginning and 287.2MB in the end (delta: -254.6MB). Peak memory consumption was 6.3MB. Max. memory is 16.1GB. [2024-11-28 02:14:11,022 INFO L338 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.59ms. Allocated memory is still 83.9MB. Free memory is still 64.4MB. There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 724.41ms. Allocated memory is still 83.9MB. Free memory was 59.0MB in the beginning and 27.1MB in the end (delta: 31.9MB). Peak memory consumption was 25.2MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 120.34ms. Allocated memory is still 83.9MB. Free memory was 27.1MB in the beginning and 55.9MB in the end (delta: -28.8MB). Peak memory consumption was 14.3MB. Max. memory is 16.1GB. * Boogie Preprocessor took 115.44ms. Allocated memory is still 83.9MB. Free memory was 55.9MB in the beginning and 48.1MB in the end (delta: 7.8MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. * RCFGBuilder took 1263.77ms. Allocated memory is still 83.9MB. Free memory was 48.1MB in the beginning and 33.3MB in the end (delta: 14.8MB). Peak memory consumption was 36.6MB. Max. memory is 16.1GB. * TraceAbstraction took 13056.09ms. Allocated memory was 83.9MB in the beginning and 343.9MB in the end (delta: 260.0MB). Free memory was 32.7MB in the beginning and 287.2MB in the end (delta: -254.6MB). Peak memory consumption was 6.3MB. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - ExceptionOrErrorResult: SMTLIBException: External (MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_222ce6d4-5b40-4d76-abe1-0d226bb9524c/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1) with exit command (exit)) Received EOF on stdin. stderr output: (error "out of memory") de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: SMTLIBException: External (MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_222ce6d4-5b40-4d76-abe1-0d226bb9524c/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1) with exit command (exit)) Received EOF on stdin. stderr output: (error "out of memory") : de.uni_freiburg.informatik.ultimate.smtsolver.external.Executor.parse(Executor.java:262) RESULT: Ultimate could not prove your program: Toolchain returned no result. Received shutdown request... --- End real Ultimate output --- Execution finished normally Writing output log to file Ultimate.log Result: ERROR: ExceptionOrErrorResult: SMTLIBException: External (MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_222ce6d4-5b40-4d76-abe1-0d226bb9524c/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1) with exit command (exit)) Received EOF on stdin. stderr output: (error "out of memory")