./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/nla-digbench-scaling/egcd-ll_unwindbound100.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version d790fecc Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0197b218-9905-4a5e-bb6e-61b58cf45d84/bin/uautomizer-verify-aQ6SnzHsRB/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0197b218-9905-4a5e-bb6e-61b58cf45d84/bin/uautomizer-verify-aQ6SnzHsRB/plugins/org.eclipse.equinox.launcher_1.6.800.v20240513-1750.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0197b218-9905-4a5e-bb6e-61b58cf45d84/bin/uautomizer-verify-aQ6SnzHsRB/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0197b218-9905-4a5e-bb6e-61b58cf45d84/bin/uautomizer-verify-aQ6SnzHsRB/config/AutomizerReach.xml -i ../../sv-benchmarks/c/nla-digbench-scaling/egcd-ll_unwindbound100.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0197b218-9905-4a5e-bb6e-61b58cf45d84/bin/uautomizer-verify-aQ6SnzHsRB/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0197b218-9905-4a5e-bb6e-61b58cf45d84/bin/uautomizer-verify-aQ6SnzHsRB --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash f5161832faa85efa7698287d22f9a23de4fa8b958c1b2d2c225d3d8c999a24ce --- Real Ultimate output --- This is Ultimate 0.3.0-dev-d790fec [2024-11-28 02:48:02,725 INFO L188 SettingsManager]: Resetting all preferences to default values... [2024-11-28 02:48:02,802 INFO L114 SettingsManager]: Loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0197b218-9905-4a5e-bb6e-61b58cf45d84/bin/uautomizer-verify-aQ6SnzHsRB/config/svcomp-Reach-32bit-Automizer_Default.epf [2024-11-28 02:48:02,808 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2024-11-28 02:48:02,809 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2024-11-28 02:48:02,857 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2024-11-28 02:48:02,860 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2024-11-28 02:48:02,860 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2024-11-28 02:48:02,861 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2024-11-28 02:48:02,862 INFO L153 SettingsManager]: * Use memory slicer=true [2024-11-28 02:48:02,863 INFO L151 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2024-11-28 02:48:02,863 INFO L153 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2024-11-28 02:48:02,864 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2024-11-28 02:48:02,864 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2024-11-28 02:48:02,865 INFO L153 SettingsManager]: * Use SBE=true [2024-11-28 02:48:02,865 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2024-11-28 02:48:02,866 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2024-11-28 02:48:02,866 INFO L153 SettingsManager]: * sizeof long=4 [2024-11-28 02:48:02,866 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2024-11-28 02:48:02,866 INFO L153 SettingsManager]: * sizeof POINTER=4 [2024-11-28 02:48:02,866 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2024-11-28 02:48:02,866 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2024-11-28 02:48:02,866 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2024-11-28 02:48:02,867 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2024-11-28 02:48:02,867 INFO L153 SettingsManager]: * sizeof long double=12 [2024-11-28 02:48:02,867 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2024-11-28 02:48:02,867 INFO L153 SettingsManager]: * Behaviour of calls to undefined functions=OVERAPPROXIMATE_BEHAVIOUR [2024-11-28 02:48:02,867 INFO L153 SettingsManager]: * Use constant arrays=true [2024-11-28 02:48:02,867 INFO L151 SettingsManager]: Preferences of IcfgBuilder differ from their defaults: [2024-11-28 02:48:02,868 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-11-28 02:48:02,868 INFO L153 SettingsManager]: * Only consider context switches at boundaries of atomic blocks=true [2024-11-28 02:48:02,868 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2024-11-28 02:48:02,868 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2024-11-28 02:48:02,869 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2024-11-28 02:48:02,869 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-11-28 02:48:02,869 INFO L153 SettingsManager]: * Only consider context switches at boundaries of atomic blocks=true [2024-11-28 02:48:02,870 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2024-11-28 02:48:02,870 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2024-11-28 02:48:02,870 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2024-11-28 02:48:02,870 INFO L153 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2024-11-28 02:48:02,870 INFO L153 SettingsManager]: * Compute procedure contracts=false [2024-11-28 02:48:02,870 INFO L153 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopHeads [2024-11-28 02:48:02,870 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2024-11-28 02:48:02,871 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2024-11-28 02:48:02,871 INFO L153 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false [2024-11-28 02:48:02,871 INFO L153 SettingsManager]: * Automaton type used in concurrency analysis=PETRI_NET [2024-11-28 02:48:02,871 INFO L153 SettingsManager]: * Order on configurations for Petri net unfoldings=DBO [2024-11-28 02:48:02,871 INFO L153 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2024-11-28 02:48:02,871 INFO L153 SettingsManager]: * Looper check in Petri net analysis=SEMANTIC Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0197b218-9905-4a5e-bb6e-61b58cf45d84/bin/uautomizer-verify-aQ6SnzHsRB Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> f5161832faa85efa7698287d22f9a23de4fa8b958c1b2d2c225d3d8c999a24ce [2024-11-28 02:48:03,288 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2024-11-28 02:48:03,302 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2024-11-28 02:48:03,305 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2024-11-28 02:48:03,308 INFO L270 PluginConnector]: Initializing CDTParser... [2024-11-28 02:48:03,309 INFO L274 PluginConnector]: CDTParser initialized [2024-11-28 02:48:03,311 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0197b218-9905-4a5e-bb6e-61b58cf45d84/bin/uautomizer-verify-aQ6SnzHsRB/../../sv-benchmarks/c/nla-digbench-scaling/egcd-ll_unwindbound100.c [2024-11-28 02:48:06,613 INFO L533 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0197b218-9905-4a5e-bb6e-61b58cf45d84/bin/uautomizer-verify-aQ6SnzHsRB/data/a57bdc203/e9d74e78200d40e7ab1c5b97d615296f/FLAG0692b0911 [2024-11-28 02:48:06,934 INFO L384 CDTParser]: Found 1 translation units. [2024-11-28 02:48:06,935 INFO L180 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0197b218-9905-4a5e-bb6e-61b58cf45d84/sv-benchmarks/c/nla-digbench-scaling/egcd-ll_unwindbound100.c [2024-11-28 02:48:06,948 INFO L427 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0197b218-9905-4a5e-bb6e-61b58cf45d84/bin/uautomizer-verify-aQ6SnzHsRB/data/a57bdc203/e9d74e78200d40e7ab1c5b97d615296f/FLAG0692b0911 [2024-11-28 02:48:07,201 INFO L435 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0197b218-9905-4a5e-bb6e-61b58cf45d84/bin/uautomizer-verify-aQ6SnzHsRB/data/a57bdc203/e9d74e78200d40e7ab1c5b97d615296f [2024-11-28 02:48:07,203 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2024-11-28 02:48:07,205 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2024-11-28 02:48:07,207 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2024-11-28 02:48:07,207 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2024-11-28 02:48:07,212 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2024-11-28 02:48:07,216 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.11 02:48:07" (1/1) ... [2024-11-28 02:48:07,217 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@71fe39f8 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 02:48:07, skipping insertion in model container [2024-11-28 02:48:07,217 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.11 02:48:07" (1/1) ... [2024-11-28 02:48:07,238 INFO L175 MainTranslator]: Built tables and reachable declarations [2024-11-28 02:48:07,459 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0197b218-9905-4a5e-bb6e-61b58cf45d84/sv-benchmarks/c/nla-digbench-scaling/egcd-ll_unwindbound100.c[489,502] [2024-11-28 02:48:07,495 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-11-28 02:48:07,505 INFO L200 MainTranslator]: Completed pre-run [2024-11-28 02:48:07,518 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0197b218-9905-4a5e-bb6e-61b58cf45d84/sv-benchmarks/c/nla-digbench-scaling/egcd-ll_unwindbound100.c[489,502] [2024-11-28 02:48:07,533 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-11-28 02:48:07,552 INFO L204 MainTranslator]: Completed translation [2024-11-28 02:48:07,552 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 02:48:07 WrapperNode [2024-11-28 02:48:07,553 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2024-11-28 02:48:07,554 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2024-11-28 02:48:07,555 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2024-11-28 02:48:07,555 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2024-11-28 02:48:07,563 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 02:48:07" (1/1) ... [2024-11-28 02:48:07,572 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 02:48:07" (1/1) ... [2024-11-28 02:48:07,596 INFO L138 Inliner]: procedures = 14, calls = 16, calls flagged for inlining = 2, calls inlined = 2, statements flattened = 59 [2024-11-28 02:48:07,596 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2024-11-28 02:48:07,598 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2024-11-28 02:48:07,598 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2024-11-28 02:48:07,599 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2024-11-28 02:48:07,611 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 02:48:07" (1/1) ... [2024-11-28 02:48:07,612 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 02:48:07" (1/1) ... [2024-11-28 02:48:07,614 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 02:48:07" (1/1) ... [2024-11-28 02:48:07,642 INFO L175 MemorySlicer]: Split 2 memory accesses to 1 slices as follows [2]. 100 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2]. The 0 writes are split as follows [0]. [2024-11-28 02:48:07,642 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 02:48:07" (1/1) ... [2024-11-28 02:48:07,642 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 02:48:07" (1/1) ... [2024-11-28 02:48:07,650 INFO L184 PluginConnector]: Executing the observer ReplaceArrayAssignments from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 02:48:07" (1/1) ... [2024-11-28 02:48:07,651 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 02:48:07" (1/1) ... [2024-11-28 02:48:07,661 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 02:48:07" (1/1) ... [2024-11-28 02:48:07,662 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 02:48:07" (1/1) ... [2024-11-28 02:48:07,663 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 02:48:07" (1/1) ... [2024-11-28 02:48:07,669 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2024-11-28 02:48:07,670 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2024-11-28 02:48:07,670 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2024-11-28 02:48:07,670 INFO L274 PluginConnector]: RCFGBuilder initialized [2024-11-28 02:48:07,672 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 02:48:07" (1/1) ... [2024-11-28 02:48:07,685 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2024-11-28 02:48:07,702 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0197b218-9905-4a5e-bb6e-61b58cf45d84/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 02:48:07,721 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0197b218-9905-4a5e-bb6e-61b58cf45d84/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (exit command is (exit), workingDir is null) [2024-11-28 02:48:07,728 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0197b218-9905-4a5e-bb6e-61b58cf45d84/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Waiting until timeout for monitored process [2024-11-28 02:48:07,763 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2024-11-28 02:48:07,764 INFO L130 BoogieDeclarations]: Found specification of procedure assume_abort_if_not [2024-11-28 02:48:07,764 INFO L138 BoogieDeclarations]: Found implementation of procedure assume_abort_if_not [2024-11-28 02:48:07,764 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#0 [2024-11-28 02:48:07,764 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2024-11-28 02:48:07,764 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2024-11-28 02:48:07,765 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_assert [2024-11-28 02:48:07,765 INFO L138 BoogieDeclarations]: Found implementation of procedure __VERIFIER_assert [2024-11-28 02:48:07,838 INFO L234 CfgBuilder]: Building ICFG [2024-11-28 02:48:07,841 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2024-11-28 02:48:08,128 INFO L? ?]: Removed 5 outVars from TransFormulas that were not future-live. [2024-11-28 02:48:08,129 INFO L283 CfgBuilder]: Performing block encoding [2024-11-28 02:48:08,149 INFO L307 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2024-11-28 02:48:08,150 INFO L312 CfgBuilder]: Removed 1 assume(true) statements. [2024-11-28 02:48:08,150 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.11 02:48:08 BoogieIcfgContainer [2024-11-28 02:48:08,151 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2024-11-28 02:48:08,154 INFO L112 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2024-11-28 02:48:08,154 INFO L270 PluginConnector]: Initializing TraceAbstraction... [2024-11-28 02:48:08,164 INFO L274 PluginConnector]: TraceAbstraction initialized [2024-11-28 02:48:08,164 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 28.11 02:48:07" (1/3) ... [2024-11-28 02:48:08,165 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@549b208a and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.11 02:48:08, skipping insertion in model container [2024-11-28 02:48:08,166 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 02:48:07" (2/3) ... [2024-11-28 02:48:08,166 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@549b208a and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.11 02:48:08, skipping insertion in model container [2024-11-28 02:48:08,166 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.11 02:48:08" (3/3) ... [2024-11-28 02:48:08,169 INFO L128 eAbstractionObserver]: Analyzing ICFG egcd-ll_unwindbound100.c [2024-11-28 02:48:08,195 INFO L216 ceAbstractionStarter]: Automizer settings: Hoare:LoopHeads NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2024-11-28 02:48:08,197 INFO L151 ceAbstractionStarter]: Applying trace abstraction to ICFG egcd-ll_unwindbound100.c that has 3 procedures, 30 locations, 1 initial locations, 1 loop locations, and 1 error locations. [2024-11-28 02:48:08,294 INFO L332 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2024-11-28 02:48:08,315 INFO L333 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mAutomataTypeConcurrency=PETRI_NET, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopHeads, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@2254ca79, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2024-11-28 02:48:08,315 INFO L334 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2024-11-28 02:48:08,322 INFO L276 IsEmpty]: Start isEmpty. Operand has 30 states, 17 states have (on average 1.411764705882353) internal successors, (24), 18 states have internal predecessors, (24), 9 states have call successors, (9), 2 states have call predecessors, (9), 2 states have return successors, (9), 9 states have call predecessors, (9), 9 states have call successors, (9) [2024-11-28 02:48:08,330 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2024-11-28 02:48:08,331 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 02:48:08,331 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 02:48:08,332 INFO L396 AbstractCegarLoop]: === Iteration 1 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 02:48:08,340 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 02:48:08,340 INFO L85 PathProgramCache]: Analyzing trace with hash 1165920622, now seen corresponding path program 1 times [2024-11-28 02:48:08,351 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 02:48:08,352 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1618544912] [2024-11-28 02:48:08,352 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:48:08,353 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 02:48:08,482 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 02:48:08,544 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-11-28 02:48:08,545 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 02:48:08,545 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1618544912] [2024-11-28 02:48:08,547 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1618544912] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-28 02:48:08,548 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [140727320] [2024-11-28 02:48:08,549 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:48:08,550 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-28 02:48:08,550 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0197b218-9905-4a5e-bb6e-61b58cf45d84/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 02:48:08,554 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0197b218-9905-4a5e-bb6e-61b58cf45d84/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-28 02:48:08,558 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0197b218-9905-4a5e-bb6e-61b58cf45d84/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2024-11-28 02:48:08,650 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 02:48:08,652 INFO L256 TraceCheckSpWp]: Trace formula consists of 67 conjuncts, 1 conjuncts are in the unsatisfiable core [2024-11-28 02:48:08,657 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-28 02:48:08,667 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-11-28 02:48:08,668 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-11-28 02:48:08,668 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [140727320] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 02:48:08,668 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-11-28 02:48:08,668 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [2] total 2 [2024-11-28 02:48:08,671 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [354412262] [2024-11-28 02:48:08,672 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 02:48:08,677 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 2 states [2024-11-28 02:48:08,677 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 02:48:08,703 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2024-11-28 02:48:08,703 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2024-11-28 02:48:08,708 INFO L87 Difference]: Start difference. First operand has 30 states, 17 states have (on average 1.411764705882353) internal successors, (24), 18 states have internal predecessors, (24), 9 states have call successors, (9), 2 states have call predecessors, (9), 2 states have return successors, (9), 9 states have call predecessors, (9), 9 states have call successors, (9) Second operand has 2 states, 2 states have (on average 6.0) internal successors, (12), 2 states have internal predecessors, (12), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (2), 1 states have call predecessors, (2), 2 states have call successors, (2) [2024-11-28 02:48:08,735 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 02:48:08,736 INFO L93 Difference]: Finished difference Result 57 states and 89 transitions. [2024-11-28 02:48:08,737 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-11-28 02:48:08,738 INFO L78 Accepts]: Start accepts. Automaton has has 2 states, 2 states have (on average 6.0) internal successors, (12), 2 states have internal predecessors, (12), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (2), 1 states have call predecessors, (2), 2 states have call successors, (2) Word has length 18 [2024-11-28 02:48:08,739 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 02:48:08,746 INFO L225 Difference]: With dead ends: 57 [2024-11-28 02:48:08,747 INFO L226 Difference]: Without dead ends: 26 [2024-11-28 02:48:08,751 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 19 SyntacticMatches, 0 SemanticMatches, 0 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2024-11-28 02:48:08,754 INFO L435 NwaCegarLoop]: 39 mSDtfsCounter, 0 mSDsluCounter, 0 mSDsCounter, 0 mSdLazyCounter, 0 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 39 SdHoareTripleChecker+Invalid, 0 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 0 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-28 02:48:08,755 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 39 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 0 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-28 02:48:08,772 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26 states. [2024-11-28 02:48:08,788 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26 to 26. [2024-11-28 02:48:08,789 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 26 states, 14 states have (on average 1.2857142857142858) internal successors, (18), 15 states have internal predecessors, (18), 9 states have call successors, (9), 2 states have call predecessors, (9), 2 states have return successors, (8), 8 states have call predecessors, (8), 8 states have call successors, (8) [2024-11-28 02:48:08,793 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26 states to 26 states and 35 transitions. [2024-11-28 02:48:08,795 INFO L78 Accepts]: Start accepts. Automaton has 26 states and 35 transitions. Word has length 18 [2024-11-28 02:48:08,795 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 02:48:08,795 INFO L471 AbstractCegarLoop]: Abstraction has 26 states and 35 transitions. [2024-11-28 02:48:08,796 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 2 states, 2 states have (on average 6.0) internal successors, (12), 2 states have internal predecessors, (12), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (2), 1 states have call predecessors, (2), 2 states have call successors, (2) [2024-11-28 02:48:08,796 INFO L276 IsEmpty]: Start isEmpty. Operand 26 states and 35 transitions. [2024-11-28 02:48:08,797 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2024-11-28 02:48:08,798 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 02:48:08,798 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 02:48:08,805 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0197b218-9905-4a5e-bb6e-61b58cf45d84/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Ended with exit code 0 [2024-11-28 02:48:08,998 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 2 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0197b218-9905-4a5e-bb6e-61b58cf45d84/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable0 [2024-11-28 02:48:08,999 INFO L396 AbstractCegarLoop]: === Iteration 2 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 02:48:08,999 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 02:48:08,999 INFO L85 PathProgramCache]: Analyzing trace with hash -572051340, now seen corresponding path program 1 times [2024-11-28 02:48:09,000 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 02:48:09,000 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1145509672] [2024-11-28 02:48:09,000 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:48:09,000 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 02:48:09,062 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unknown [2024-11-28 02:48:09,065 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1731690322] [2024-11-28 02:48:09,065 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:48:09,065 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-28 02:48:09,065 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0197b218-9905-4a5e-bb6e-61b58cf45d84/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 02:48:09,067 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0197b218-9905-4a5e-bb6e-61b58cf45d84/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-28 02:48:09,070 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0197b218-9905-4a5e-bb6e-61b58cf45d84/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2024-11-28 02:48:09,136 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 02:48:09,137 INFO L256 TraceCheckSpWp]: Trace formula consists of 71 conjuncts, 9 conjuncts are in the unsatisfiable core [2024-11-28 02:48:09,140 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-28 02:48:09,337 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-11-28 02:48:09,338 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-11-28 02:48:09,338 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 02:48:09,338 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1145509672] [2024-11-28 02:48:09,339 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2024-11-28 02:48:09,339 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1731690322] [2024-11-28 02:48:09,339 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1731690322] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 02:48:09,339 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 02:48:09,339 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-28 02:48:09,340 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [975548471] [2024-11-28 02:48:09,340 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 02:48:09,340 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-28 02:48:09,341 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 02:48:09,341 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-28 02:48:09,342 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-11-28 02:48:09,342 INFO L87 Difference]: Start difference. First operand 26 states and 35 transitions. Second operand has 5 states, 5 states have (on average 2.2) internal successors, (11), 4 states have internal predecessors, (11), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) [2024-11-28 02:48:09,461 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 02:48:09,462 INFO L93 Difference]: Finished difference Result 43 states and 60 transitions. [2024-11-28 02:48:09,465 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-11-28 02:48:09,465 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 2.2) internal successors, (11), 4 states have internal predecessors, (11), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) Word has length 19 [2024-11-28 02:48:09,465 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 02:48:09,466 INFO L225 Difference]: With dead ends: 43 [2024-11-28 02:48:09,466 INFO L226 Difference]: Without dead ends: 41 [2024-11-28 02:48:09,467 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 15 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2024-11-28 02:48:09,468 INFO L435 NwaCegarLoop]: 29 mSDtfsCounter, 6 mSDsluCounter, 80 mSDsCounter, 0 mSdLazyCounter, 30 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 12 SdHoareTripleChecker+Valid, 109 SdHoareTripleChecker+Invalid, 32 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 30 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-28 02:48:09,470 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [12 Valid, 109 Invalid, 32 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 30 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-28 02:48:09,472 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 41 states. [2024-11-28 02:48:09,490 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 41 to 40. [2024-11-28 02:48:09,493 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 40 states, 21 states have (on average 1.3333333333333333) internal successors, (28), 23 states have internal predecessors, (28), 15 states have call successors, (15), 3 states have call predecessors, (15), 3 states have return successors, (14), 13 states have call predecessors, (14), 14 states have call successors, (14) [2024-11-28 02:48:09,495 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 40 states to 40 states and 57 transitions. [2024-11-28 02:48:09,497 INFO L78 Accepts]: Start accepts. Automaton has 40 states and 57 transitions. Word has length 19 [2024-11-28 02:48:09,497 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 02:48:09,497 INFO L471 AbstractCegarLoop]: Abstraction has 40 states and 57 transitions. [2024-11-28 02:48:09,498 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 2.2) internal successors, (11), 4 states have internal predecessors, (11), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) [2024-11-28 02:48:09,499 INFO L276 IsEmpty]: Start isEmpty. Operand 40 states and 57 transitions. [2024-11-28 02:48:09,499 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2024-11-28 02:48:09,503 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 02:48:09,504 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 02:48:09,519 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0197b218-9905-4a5e-bb6e-61b58cf45d84/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Forceful destruction successful, exit code 0 [2024-11-28 02:48:09,704 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1,3 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0197b218-9905-4a5e-bb6e-61b58cf45d84/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-28 02:48:09,704 INFO L396 AbstractCegarLoop]: === Iteration 3 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 02:48:09,705 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 02:48:09,705 INFO L85 PathProgramCache]: Analyzing trace with hash -570025552, now seen corresponding path program 1 times [2024-11-28 02:48:09,705 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 02:48:09,706 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1711215183] [2024-11-28 02:48:09,706 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:48:09,706 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 02:48:09,734 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 02:48:09,868 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-11-28 02:48:09,868 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 02:48:09,868 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1711215183] [2024-11-28 02:48:09,868 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1711215183] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 02:48:09,868 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 02:48:09,869 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-28 02:48:09,869 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1659420667] [2024-11-28 02:48:09,869 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 02:48:09,869 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-28 02:48:09,870 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 02:48:09,870 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-28 02:48:09,870 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-28 02:48:09,871 INFO L87 Difference]: Start difference. First operand 40 states and 57 transitions. Second operand has 4 states, 4 states have (on average 2.75) internal successors, (11), 4 states have internal predecessors, (11), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) [2024-11-28 02:48:09,911 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 02:48:09,912 INFO L93 Difference]: Finished difference Result 56 states and 75 transitions. [2024-11-28 02:48:09,914 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-28 02:48:09,914 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 2.75) internal successors, (11), 4 states have internal predecessors, (11), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) Word has length 19 [2024-11-28 02:48:09,915 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 02:48:09,917 INFO L225 Difference]: With dead ends: 56 [2024-11-28 02:48:09,917 INFO L226 Difference]: Without dead ends: 42 [2024-11-28 02:48:09,920 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-28 02:48:09,921 INFO L435 NwaCegarLoop]: 33 mSDtfsCounter, 5 mSDsluCounter, 54 mSDsCounter, 0 mSdLazyCounter, 8 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 5 SdHoareTripleChecker+Valid, 87 SdHoareTripleChecker+Invalid, 8 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 8 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-28 02:48:09,922 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [5 Valid, 87 Invalid, 8 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 8 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-28 02:48:09,922 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 42 states. [2024-11-28 02:48:09,938 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 42 to 42. [2024-11-28 02:48:09,938 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 42 states, 23 states have (on average 1.3043478260869565) internal successors, (30), 25 states have internal predecessors, (30), 15 states have call successors, (15), 3 states have call predecessors, (15), 3 states have return successors, (14), 13 states have call predecessors, (14), 14 states have call successors, (14) [2024-11-28 02:48:09,940 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 42 states to 42 states and 59 transitions. [2024-11-28 02:48:09,940 INFO L78 Accepts]: Start accepts. Automaton has 42 states and 59 transitions. Word has length 19 [2024-11-28 02:48:09,941 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 02:48:09,941 INFO L471 AbstractCegarLoop]: Abstraction has 42 states and 59 transitions. [2024-11-28 02:48:09,941 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 2.75) internal successors, (11), 4 states have internal predecessors, (11), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) [2024-11-28 02:48:09,941 INFO L276 IsEmpty]: Start isEmpty. Operand 42 states and 59 transitions. [2024-11-28 02:48:09,942 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-11-28 02:48:09,942 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 02:48:09,943 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 02:48:09,943 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2024-11-28 02:48:09,943 INFO L396 AbstractCegarLoop]: === Iteration 4 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 02:48:09,944 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 02:48:09,944 INFO L85 PathProgramCache]: Analyzing trace with hash 2109936158, now seen corresponding path program 1 times [2024-11-28 02:48:09,944 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 02:48:09,944 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2100193111] [2024-11-28 02:48:09,944 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:48:09,944 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 02:48:10,013 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unknown [2024-11-28 02:48:10,014 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1926240078] [2024-11-28 02:48:10,014 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:48:10,015 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-28 02:48:10,015 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0197b218-9905-4a5e-bb6e-61b58cf45d84/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 02:48:10,021 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0197b218-9905-4a5e-bb6e-61b58cf45d84/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-28 02:48:10,023 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0197b218-9905-4a5e-bb6e-61b58cf45d84/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2024-11-28 02:48:10,100 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 02:48:10,101 INFO L256 TraceCheckSpWp]: Trace formula consists of 80 conjuncts, 9 conjuncts are in the unsatisfiable core [2024-11-28 02:48:10,103 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-28 02:48:10,239 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-11-28 02:48:10,240 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-11-28 02:48:10,240 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 02:48:10,240 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2100193111] [2024-11-28 02:48:10,240 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2024-11-28 02:48:10,240 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1926240078] [2024-11-28 02:48:10,241 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1926240078] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 02:48:10,241 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 02:48:10,241 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-28 02:48:10,241 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1329762729] [2024-11-28 02:48:10,241 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 02:48:10,242 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-28 02:48:10,242 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 02:48:10,243 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-28 02:48:10,243 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-11-28 02:48:10,243 INFO L87 Difference]: Start difference. First operand 42 states and 59 transitions. Second operand has 5 states, 5 states have (on average 2.8) internal successors, (14), 4 states have internal predecessors, (14), 2 states have call successors, (4), 2 states have call predecessors, (4), 1 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2024-11-28 02:48:10,364 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 02:48:10,365 INFO L93 Difference]: Finished difference Result 49 states and 65 transitions. [2024-11-28 02:48:10,365 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-11-28 02:48:10,366 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 2.8) internal successors, (14), 4 states have internal predecessors, (14), 2 states have call successors, (4), 2 states have call predecessors, (4), 1 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 24 [2024-11-28 02:48:10,366 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 02:48:10,367 INFO L225 Difference]: With dead ends: 49 [2024-11-28 02:48:10,367 INFO L226 Difference]: Without dead ends: 47 [2024-11-28 02:48:10,367 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 24 GetRequests, 20 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2024-11-28 02:48:10,369 INFO L435 NwaCegarLoop]: 38 mSDtfsCounter, 7 mSDsluCounter, 94 mSDsCounter, 0 mSdLazyCounter, 39 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 12 SdHoareTripleChecker+Valid, 132 SdHoareTripleChecker+Invalid, 39 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 39 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-28 02:48:10,369 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [12 Valid, 132 Invalid, 39 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 39 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-28 02:48:10,370 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 47 states. [2024-11-28 02:48:10,382 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 47 to 46. [2024-11-28 02:48:10,382 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 46 states, 26 states have (on average 1.2692307692307692) internal successors, (33), 28 states have internal predecessors, (33), 15 states have call successors, (15), 4 states have call predecessors, (15), 4 states have return successors, (14), 13 states have call predecessors, (14), 14 states have call successors, (14) [2024-11-28 02:48:10,383 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 46 states to 46 states and 62 transitions. [2024-11-28 02:48:10,384 INFO L78 Accepts]: Start accepts. Automaton has 46 states and 62 transitions. Word has length 24 [2024-11-28 02:48:10,384 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 02:48:10,384 INFO L471 AbstractCegarLoop]: Abstraction has 46 states and 62 transitions. [2024-11-28 02:48:10,385 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 2.8) internal successors, (14), 4 states have internal predecessors, (14), 2 states have call successors, (4), 2 states have call predecessors, (4), 1 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2024-11-28 02:48:10,385 INFO L276 IsEmpty]: Start isEmpty. Operand 46 states and 62 transitions. [2024-11-28 02:48:10,386 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2024-11-28 02:48:10,386 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 02:48:10,386 INFO L218 NwaCegarLoop]: trace histogram [3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 02:48:10,398 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0197b218-9905-4a5e-bb6e-61b58cf45d84/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Forceful destruction successful, exit code 0 [2024-11-28 02:48:10,590 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3,4 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0197b218-9905-4a5e-bb6e-61b58cf45d84/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-28 02:48:10,591 INFO L396 AbstractCegarLoop]: === Iteration 5 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 02:48:10,591 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 02:48:10,591 INFO L85 PathProgramCache]: Analyzing trace with hash -1553939852, now seen corresponding path program 1 times [2024-11-28 02:48:10,592 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 02:48:10,592 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1661032258] [2024-11-28 02:48:10,592 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:48:10,592 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 02:48:10,640 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unknown [2024-11-28 02:48:10,641 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [694794690] [2024-11-28 02:48:10,641 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:48:10,642 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-28 02:48:10,642 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0197b218-9905-4a5e-bb6e-61b58cf45d84/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 02:48:10,650 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0197b218-9905-4a5e-bb6e-61b58cf45d84/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-28 02:48:10,652 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0197b218-9905-4a5e-bb6e-61b58cf45d84/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2024-11-28 02:48:10,707 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 02:48:10,708 INFO L256 TraceCheckSpWp]: Trace formula consists of 89 conjuncts, 12 conjuncts are in the unsatisfiable core [2024-11-28 02:48:10,710 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-28 02:48:10,829 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-11-28 02:48:10,829 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-11-28 02:48:10,829 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 02:48:10,829 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1661032258] [2024-11-28 02:48:10,829 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2024-11-28 02:48:10,829 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [694794690] [2024-11-28 02:48:10,830 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [694794690] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 02:48:10,830 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 02:48:10,830 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-28 02:48:10,830 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [587507641] [2024-11-28 02:48:10,830 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 02:48:10,830 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-28 02:48:10,834 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 02:48:10,834 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-28 02:48:10,837 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-11-28 02:48:10,838 INFO L87 Difference]: Start difference. First operand 46 states and 62 transitions. Second operand has 5 states, 5 states have (on average 2.8) internal successors, (14), 4 states have internal predecessors, (14), 2 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) [2024-11-28 02:48:10,929 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 02:48:10,929 INFO L93 Difference]: Finished difference Result 71 states and 103 transitions. [2024-11-28 02:48:10,930 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-11-28 02:48:10,930 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 2.8) internal successors, (14), 4 states have internal predecessors, (14), 2 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) Word has length 29 [2024-11-28 02:48:10,930 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 02:48:10,932 INFO L225 Difference]: With dead ends: 71 [2024-11-28 02:48:10,932 INFO L226 Difference]: Without dead ends: 67 [2024-11-28 02:48:10,933 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 29 GetRequests, 25 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2024-11-28 02:48:10,934 INFO L435 NwaCegarLoop]: 31 mSDtfsCounter, 7 mSDsluCounter, 80 mSDsCounter, 0 mSdLazyCounter, 36 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 11 SdHoareTripleChecker+Valid, 111 SdHoareTripleChecker+Invalid, 37 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 36 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-28 02:48:10,934 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [11 Valid, 111 Invalid, 37 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 36 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-28 02:48:10,935 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 67 states. [2024-11-28 02:48:10,950 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 67 to 67. [2024-11-28 02:48:10,951 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 67 states, 35 states have (on average 1.3428571428571427) internal successors, (47), 39 states have internal predecessors, (47), 26 states have call successors, (26), 5 states have call predecessors, (26), 5 states have return successors, (23), 22 states have call predecessors, (23), 23 states have call successors, (23) [2024-11-28 02:48:10,952 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 67 states to 67 states and 96 transitions. [2024-11-28 02:48:10,953 INFO L78 Accepts]: Start accepts. Automaton has 67 states and 96 transitions. Word has length 29 [2024-11-28 02:48:10,953 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 02:48:10,953 INFO L471 AbstractCegarLoop]: Abstraction has 67 states and 96 transitions. [2024-11-28 02:48:10,954 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 2.8) internal successors, (14), 4 states have internal predecessors, (14), 2 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) [2024-11-28 02:48:10,954 INFO L276 IsEmpty]: Start isEmpty. Operand 67 states and 96 transitions. [2024-11-28 02:48:10,955 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2024-11-28 02:48:10,955 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 02:48:10,955 INFO L218 NwaCegarLoop]: trace histogram [4, 3, 3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 02:48:10,967 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0197b218-9905-4a5e-bb6e-61b58cf45d84/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Ended with exit code 0 [2024-11-28 02:48:11,160 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4,5 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0197b218-9905-4a5e-bb6e-61b58cf45d84/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-28 02:48:11,160 INFO L396 AbstractCegarLoop]: === Iteration 6 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 02:48:11,160 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 02:48:11,161 INFO L85 PathProgramCache]: Analyzing trace with hash -1819933455, now seen corresponding path program 1 times [2024-11-28 02:48:11,161 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 02:48:11,161 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2031194883] [2024-11-28 02:48:11,161 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:48:11,161 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 02:48:11,201 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 02:48:11,409 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2024-11-28 02:48:11,409 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 02:48:11,409 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2031194883] [2024-11-28 02:48:11,409 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2031194883] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 02:48:11,409 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 02:48:11,409 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-28 02:48:11,409 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [302800231] [2024-11-28 02:48:11,409 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 02:48:11,410 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-28 02:48:11,410 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 02:48:11,410 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-28 02:48:11,411 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-11-28 02:48:11,411 INFO L87 Difference]: Start difference. First operand 67 states and 96 transitions. Second operand has 5 states, 4 states have (on average 3.75) internal successors, (15), 4 states have internal predecessors, (15), 2 states have call successors, (6), 2 states have call predecessors, (6), 1 states have return successors, (5), 1 states have call predecessors, (5), 1 states have call successors, (5) [2024-11-28 02:48:11,505 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 02:48:11,505 INFO L93 Difference]: Finished difference Result 83 states and 119 transitions. [2024-11-28 02:48:11,506 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-11-28 02:48:11,507 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 4 states have (on average 3.75) internal successors, (15), 4 states have internal predecessors, (15), 2 states have call successors, (6), 2 states have call predecessors, (6), 1 states have return successors, (5), 1 states have call predecessors, (5), 1 states have call successors, (5) Word has length 35 [2024-11-28 02:48:11,507 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 02:48:11,509 INFO L225 Difference]: With dead ends: 83 [2024-11-28 02:48:11,510 INFO L226 Difference]: Without dead ends: 81 [2024-11-28 02:48:11,511 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2024-11-28 02:48:11,512 INFO L435 NwaCegarLoop]: 39 mSDtfsCounter, 3 mSDsluCounter, 96 mSDsCounter, 0 mSdLazyCounter, 26 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 6 SdHoareTripleChecker+Valid, 135 SdHoareTripleChecker+Invalid, 26 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 26 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-28 02:48:11,512 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [6 Valid, 135 Invalid, 26 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 26 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-28 02:48:11,513 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 81 states. [2024-11-28 02:48:11,531 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 81 to 74. [2024-11-28 02:48:11,532 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 74 states, 38 states have (on average 1.3157894736842106) internal successors, (50), 45 states have internal predecessors, (50), 29 states have call successors, (29), 6 states have call predecessors, (29), 6 states have return successors, (26), 22 states have call predecessors, (26), 26 states have call successors, (26) [2024-11-28 02:48:11,534 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 74 states to 74 states and 105 transitions. [2024-11-28 02:48:11,536 INFO L78 Accepts]: Start accepts. Automaton has 74 states and 105 transitions. Word has length 35 [2024-11-28 02:48:11,536 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 02:48:11,536 INFO L471 AbstractCegarLoop]: Abstraction has 74 states and 105 transitions. [2024-11-28 02:48:11,536 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 4 states have (on average 3.75) internal successors, (15), 4 states have internal predecessors, (15), 2 states have call successors, (6), 2 states have call predecessors, (6), 1 states have return successors, (5), 1 states have call predecessors, (5), 1 states have call successors, (5) [2024-11-28 02:48:11,537 INFO L276 IsEmpty]: Start isEmpty. Operand 74 states and 105 transitions. [2024-11-28 02:48:11,537 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2024-11-28 02:48:11,538 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 02:48:11,538 INFO L218 NwaCegarLoop]: trace histogram [4, 3, 3, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 02:48:11,538 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5 [2024-11-28 02:48:11,538 INFO L396 AbstractCegarLoop]: === Iteration 7 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 02:48:11,538 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 02:48:11,539 INFO L85 PathProgramCache]: Analyzing trace with hash -356976342, now seen corresponding path program 1 times [2024-11-28 02:48:11,539 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 02:48:11,539 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2096479883] [2024-11-28 02:48:11,539 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:48:11,539 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 02:48:11,576 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unknown [2024-11-28 02:48:11,577 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1735231557] [2024-11-28 02:48:11,577 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:48:11,577 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-28 02:48:11,581 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0197b218-9905-4a5e-bb6e-61b58cf45d84/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 02:48:11,584 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0197b218-9905-4a5e-bb6e-61b58cf45d84/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-28 02:48:11,589 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0197b218-9905-4a5e-bb6e-61b58cf45d84/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2024-11-28 02:48:11,654 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 02:48:11,655 INFO L256 TraceCheckSpWp]: Trace formula consists of 111 conjuncts, 11 conjuncts are in the unsatisfiable core [2024-11-28 02:48:11,658 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-28 02:48:11,851 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2024-11-28 02:48:11,851 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-11-28 02:48:11,851 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 02:48:11,851 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2096479883] [2024-11-28 02:48:11,851 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2024-11-28 02:48:11,851 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1735231557] [2024-11-28 02:48:11,851 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1735231557] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 02:48:11,851 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 02:48:11,852 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-28 02:48:11,852 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1582990645] [2024-11-28 02:48:11,852 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 02:48:11,852 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-28 02:48:11,852 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 02:48:11,853 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-28 02:48:11,853 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-11-28 02:48:11,855 INFO L87 Difference]: Start difference. First operand 74 states and 105 transitions. Second operand has 5 states, 5 states have (on average 3.2) internal successors, (16), 4 states have internal predecessors, (16), 2 states have call successors, (6), 2 states have call predecessors, (6), 1 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) [2024-11-28 02:48:11,951 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 02:48:11,952 INFO L93 Difference]: Finished difference Result 84 states and 113 transitions. [2024-11-28 02:48:11,952 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-11-28 02:48:11,952 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 3.2) internal successors, (16), 4 states have internal predecessors, (16), 2 states have call successors, (6), 2 states have call predecessors, (6), 1 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) Word has length 38 [2024-11-28 02:48:11,953 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 02:48:11,954 INFO L225 Difference]: With dead ends: 84 [2024-11-28 02:48:11,954 INFO L226 Difference]: Without dead ends: 81 [2024-11-28 02:48:11,954 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 38 GetRequests, 34 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2024-11-28 02:48:11,959 INFO L435 NwaCegarLoop]: 30 mSDtfsCounter, 5 mSDsluCounter, 82 mSDsCounter, 0 mSdLazyCounter, 27 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 7 SdHoareTripleChecker+Valid, 112 SdHoareTripleChecker+Invalid, 28 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 27 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-28 02:48:11,960 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [7 Valid, 112 Invalid, 28 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 27 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-28 02:48:11,961 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 81 states. [2024-11-28 02:48:11,993 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 81 to 79. [2024-11-28 02:48:11,993 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 79 states, 44 states have (on average 1.2727272727272727) internal successors, (56), 50 states have internal predecessors, (56), 26 states have call successors, (26), 8 states have call predecessors, (26), 8 states have return successors, (24), 20 states have call predecessors, (24), 24 states have call successors, (24) [2024-11-28 02:48:11,998 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 79 states to 79 states and 106 transitions. [2024-11-28 02:48:11,998 INFO L78 Accepts]: Start accepts. Automaton has 79 states and 106 transitions. Word has length 38 [2024-11-28 02:48:11,999 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 02:48:11,999 INFO L471 AbstractCegarLoop]: Abstraction has 79 states and 106 transitions. [2024-11-28 02:48:11,999 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 3.2) internal successors, (16), 4 states have internal predecessors, (16), 2 states have call successors, (6), 2 states have call predecessors, (6), 1 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) [2024-11-28 02:48:11,999 INFO L276 IsEmpty]: Start isEmpty. Operand 79 states and 106 transitions. [2024-11-28 02:48:12,000 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2024-11-28 02:48:12,000 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 02:48:12,000 INFO L218 NwaCegarLoop]: trace histogram [4, 3, 3, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 02:48:12,013 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0197b218-9905-4a5e-bb6e-61b58cf45d84/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Forceful destruction successful, exit code 0 [2024-11-28 02:48:12,201 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6,6 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0197b218-9905-4a5e-bb6e-61b58cf45d84/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-28 02:48:12,201 INFO L396 AbstractCegarLoop]: === Iteration 8 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 02:48:12,201 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 02:48:12,202 INFO L85 PathProgramCache]: Analyzing trace with hash -354950554, now seen corresponding path program 1 times [2024-11-28 02:48:12,202 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 02:48:12,202 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [645539577] [2024-11-28 02:48:12,202 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:48:12,202 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 02:48:12,216 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 02:48:12,349 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 6 proven. 2 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2024-11-28 02:48:12,350 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 02:48:12,350 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [645539577] [2024-11-28 02:48:12,350 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [645539577] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-28 02:48:12,350 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1848397375] [2024-11-28 02:48:12,350 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:48:12,350 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-28 02:48:12,351 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0197b218-9905-4a5e-bb6e-61b58cf45d84/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 02:48:12,354 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0197b218-9905-4a5e-bb6e-61b58cf45d84/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-28 02:48:12,358 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0197b218-9905-4a5e-bb6e-61b58cf45d84/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2024-11-28 02:48:12,436 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 02:48:12,438 INFO L256 TraceCheckSpWp]: Trace formula consists of 111 conjuncts, 5 conjuncts are in the unsatisfiable core [2024-11-28 02:48:12,440 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-28 02:48:12,526 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 6 proven. 2 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2024-11-28 02:48:12,528 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-28 02:48:12,647 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 6 proven. 2 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2024-11-28 02:48:12,647 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1848397375] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-28 02:48:12,647 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-28 02:48:12,648 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 4, 5] total 8 [2024-11-28 02:48:12,648 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1080659075] [2024-11-28 02:48:12,648 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-28 02:48:12,648 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2024-11-28 02:48:12,649 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 02:48:12,649 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2024-11-28 02:48:12,649 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=36, Unknown=0, NotChecked=0, Total=56 [2024-11-28 02:48:12,650 INFO L87 Difference]: Start difference. First operand 79 states and 106 transitions. Second operand has 8 states, 8 states have (on average 4.125) internal successors, (33), 8 states have internal predecessors, (33), 5 states have call successors, (16), 4 states have call predecessors, (16), 3 states have return successors, (15), 4 states have call predecessors, (15), 4 states have call successors, (15) [2024-11-28 02:48:12,895 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 02:48:12,895 INFO L93 Difference]: Finished difference Result 226 states and 287 transitions. [2024-11-28 02:48:12,895 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2024-11-28 02:48:12,896 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 4.125) internal successors, (33), 8 states have internal predecessors, (33), 5 states have call successors, (16), 4 states have call predecessors, (16), 3 states have return successors, (15), 4 states have call predecessors, (15), 4 states have call successors, (15) Word has length 38 [2024-11-28 02:48:12,896 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 02:48:12,898 INFO L225 Difference]: With dead ends: 226 [2024-11-28 02:48:12,899 INFO L226 Difference]: Without dead ends: 205 [2024-11-28 02:48:12,902 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 82 GetRequests, 73 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=40, Invalid=70, Unknown=0, NotChecked=0, Total=110 [2024-11-28 02:48:12,903 INFO L435 NwaCegarLoop]: 33 mSDtfsCounter, 58 mSDsluCounter, 112 mSDsCounter, 0 mSdLazyCounter, 53 mSolverCounterSat, 14 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 58 SdHoareTripleChecker+Valid, 145 SdHoareTripleChecker+Invalid, 67 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 14 IncrementalHoareTripleChecker+Valid, 53 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-11-28 02:48:12,903 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [58 Valid, 145 Invalid, 67 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [14 Valid, 53 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-11-28 02:48:12,905 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 205 states. [2024-11-28 02:48:12,967 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 205 to 199. [2024-11-28 02:48:12,968 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 199 states, 117 states have (on average 1.205128205128205) internal successors, (141), 128 states have internal predecessors, (141), 58 states have call successors, (58), 24 states have call predecessors, (58), 23 states have return successors, (51), 46 states have call predecessors, (51), 51 states have call successors, (51) [2024-11-28 02:48:12,974 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 199 states to 199 states and 250 transitions. [2024-11-28 02:48:12,975 INFO L78 Accepts]: Start accepts. Automaton has 199 states and 250 transitions. Word has length 38 [2024-11-28 02:48:12,975 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 02:48:12,975 INFO L471 AbstractCegarLoop]: Abstraction has 199 states and 250 transitions. [2024-11-28 02:48:12,976 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 4.125) internal successors, (33), 8 states have internal predecessors, (33), 5 states have call successors, (16), 4 states have call predecessors, (16), 3 states have return successors, (15), 4 states have call predecessors, (15), 4 states have call successors, (15) [2024-11-28 02:48:12,976 INFO L276 IsEmpty]: Start isEmpty. Operand 199 states and 250 transitions. [2024-11-28 02:48:12,977 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2024-11-28 02:48:12,977 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 02:48:12,977 INFO L218 NwaCegarLoop]: trace histogram [5, 4, 4, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 02:48:12,994 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0197b218-9905-4a5e-bb6e-61b58cf45d84/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Forceful destruction successful, exit code 0 [2024-11-28 02:48:13,185 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7,7 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0197b218-9905-4a5e-bb6e-61b58cf45d84/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-28 02:48:13,185 INFO L396 AbstractCegarLoop]: === Iteration 9 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 02:48:13,186 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 02:48:13,186 INFO L85 PathProgramCache]: Analyzing trace with hash 871222017, now seen corresponding path program 1 times [2024-11-28 02:48:13,186 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 02:48:13,186 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [629970894] [2024-11-28 02:48:13,186 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:48:13,186 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 02:48:13,222 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 02:48:13,649 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 10 proven. 7 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2024-11-28 02:48:13,649 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 02:48:13,650 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [629970894] [2024-11-28 02:48:13,650 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [629970894] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-28 02:48:13,650 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [67054783] [2024-11-28 02:48:13,650 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:48:13,651 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-28 02:48:13,651 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0197b218-9905-4a5e-bb6e-61b58cf45d84/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 02:48:13,653 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0197b218-9905-4a5e-bb6e-61b58cf45d84/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-28 02:48:13,657 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0197b218-9905-4a5e-bb6e-61b58cf45d84/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2024-11-28 02:48:13,720 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 02:48:13,721 INFO L256 TraceCheckSpWp]: Trace formula consists of 109 conjuncts, 11 conjuncts are in the unsatisfiable core [2024-11-28 02:48:13,723 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-28 02:48:13,920 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 8 proven. 0 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-11-28 02:48:13,920 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-11-28 02:48:13,920 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [67054783] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 02:48:13,921 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-11-28 02:48:13,921 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [8] total 12 [2024-11-28 02:48:13,921 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [812723292] [2024-11-28 02:48:13,921 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 02:48:13,921 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-11-28 02:48:13,921 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 02:48:13,922 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-11-28 02:48:13,922 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=27, Invalid=105, Unknown=0, NotChecked=0, Total=132 [2024-11-28 02:48:13,922 INFO L87 Difference]: Start difference. First operand 199 states and 250 transitions. Second operand has 6 states, 5 states have (on average 3.0) internal successors, (15), 5 states have internal predecessors, (15), 3 states have call successors, (7), 2 states have call predecessors, (7), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) [2024-11-28 02:48:14,094 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 02:48:14,095 INFO L93 Difference]: Finished difference Result 230 states and 279 transitions. [2024-11-28 02:48:14,095 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-28 02:48:14,096 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 5 states have (on average 3.0) internal successors, (15), 5 states have internal predecessors, (15), 3 states have call successors, (7), 2 states have call predecessors, (7), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) Word has length 40 [2024-11-28 02:48:14,096 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 02:48:14,098 INFO L225 Difference]: With dead ends: 230 [2024-11-28 02:48:14,098 INFO L226 Difference]: Without dead ends: 220 [2024-11-28 02:48:14,099 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 51 GetRequests, 39 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 22 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=40, Invalid=142, Unknown=0, NotChecked=0, Total=182 [2024-11-28 02:48:14,103 INFO L435 NwaCegarLoop]: 30 mSDtfsCounter, 7 mSDsluCounter, 106 mSDsCounter, 0 mSdLazyCounter, 58 mSolverCounterSat, 7 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 10 SdHoareTripleChecker+Valid, 136 SdHoareTripleChecker+Invalid, 65 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 7 IncrementalHoareTripleChecker+Valid, 58 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-28 02:48:14,103 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [10 Valid, 136 Invalid, 65 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [7 Valid, 58 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-28 02:48:14,105 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 220 states. [2024-11-28 02:48:14,149 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 220 to 216. [2024-11-28 02:48:14,150 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 216 states, 130 states have (on average 1.176923076923077) internal successors, (153), 141 states have internal predecessors, (153), 57 states have call successors, (57), 28 states have call predecessors, (57), 28 states have return successors, (51), 46 states have call predecessors, (51), 51 states have call successors, (51) [2024-11-28 02:48:14,154 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 216 states to 216 states and 261 transitions. [2024-11-28 02:48:14,156 INFO L78 Accepts]: Start accepts. Automaton has 216 states and 261 transitions. Word has length 40 [2024-11-28 02:48:14,157 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 02:48:14,157 INFO L471 AbstractCegarLoop]: Abstraction has 216 states and 261 transitions. [2024-11-28 02:48:14,157 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 5 states have (on average 3.0) internal successors, (15), 5 states have internal predecessors, (15), 3 states have call successors, (7), 2 states have call predecessors, (7), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) [2024-11-28 02:48:14,157 INFO L276 IsEmpty]: Start isEmpty. Operand 216 states and 261 transitions. [2024-11-28 02:48:14,158 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2024-11-28 02:48:14,161 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 02:48:14,161 INFO L218 NwaCegarLoop]: trace histogram [5, 4, 4, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 02:48:14,173 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0197b218-9905-4a5e-bb6e-61b58cf45d84/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Ended with exit code 0 [2024-11-28 02:48:14,362 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8,8 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0197b218-9905-4a5e-bb6e-61b58cf45d84/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-28 02:48:14,362 INFO L396 AbstractCegarLoop]: === Iteration 10 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 02:48:14,362 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 02:48:14,362 INFO L85 PathProgramCache]: Analyzing trace with hash 1264601896, now seen corresponding path program 2 times [2024-11-28 02:48:14,363 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 02:48:14,363 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1646169361] [2024-11-28 02:48:14,363 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2024-11-28 02:48:14,363 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 02:48:14,387 INFO L229 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2024-11-28 02:48:14,387 INFO L230 tOrderPrioritization]: Conjunction of SSA is unknown [2024-11-28 02:48:14,388 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [983735188] [2024-11-28 02:48:14,388 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2024-11-28 02:48:14,388 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-28 02:48:14,388 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0197b218-9905-4a5e-bb6e-61b58cf45d84/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 02:48:14,391 INFO L229 MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0197b218-9905-4a5e-bb6e-61b58cf45d84/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-28 02:48:14,395 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0197b218-9905-4a5e-bb6e-61b58cf45d84/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2024-11-28 02:48:14,457 INFO L229 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2024-11-28 02:48:14,457 INFO L230 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-28 02:48:14,459 INFO L256 TraceCheckSpWp]: Trace formula consists of 120 conjuncts, 35 conjuncts are in the unsatisfiable core [2024-11-28 02:48:14,461 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-28 02:48:14,960 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 19 proven. 5 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2024-11-28 02:48:14,960 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-28 02:48:15,492 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 16 proven. 5 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2024-11-28 02:48:15,493 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 02:48:15,493 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1646169361] [2024-11-28 02:48:15,493 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2024-11-28 02:48:15,493 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [983735188] [2024-11-28 02:48:15,493 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [983735188] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-28 02:48:15,493 INFO L185 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2024-11-28 02:48:15,493 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 8] total 17 [2024-11-28 02:48:15,493 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1284307370] [2024-11-28 02:48:15,493 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2024-11-28 02:48:15,494 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 17 states [2024-11-28 02:48:15,494 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 02:48:15,494 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2024-11-28 02:48:15,495 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=48, Invalid=224, Unknown=0, NotChecked=0, Total=272 [2024-11-28 02:48:15,495 INFO L87 Difference]: Start difference. First operand 216 states and 261 transitions. Second operand has 17 states, 15 states have (on average 2.3333333333333335) internal successors, (35), 13 states have internal predecessors, (35), 7 states have call successors, (12), 3 states have call predecessors, (12), 3 states have return successors, (11), 6 states have call predecessors, (11), 5 states have call successors, (11) [2024-11-28 02:48:16,575 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 02:48:16,577 INFO L93 Difference]: Finished difference Result 266 states and 335 transitions. [2024-11-28 02:48:16,577 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2024-11-28 02:48:16,578 INFO L78 Accepts]: Start accepts. Automaton has has 17 states, 15 states have (on average 2.3333333333333335) internal successors, (35), 13 states have internal predecessors, (35), 7 states have call successors, (12), 3 states have call predecessors, (12), 3 states have return successors, (11), 6 states have call predecessors, (11), 5 states have call successors, (11) Word has length 43 [2024-11-28 02:48:16,578 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 02:48:16,583 INFO L225 Difference]: With dead ends: 266 [2024-11-28 02:48:16,583 INFO L226 Difference]: Without dead ends: 264 [2024-11-28 02:48:16,584 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 90 GetRequests, 69 SyntacticMatches, 0 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 68 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=101, Invalid=405, Unknown=0, NotChecked=0, Total=506 [2024-11-28 02:48:16,587 INFO L435 NwaCegarLoop]: 27 mSDtfsCounter, 50 mSDsluCounter, 200 mSDsCounter, 0 mSdLazyCounter, 255 mSolverCounterSat, 64 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 54 SdHoareTripleChecker+Valid, 227 SdHoareTripleChecker+Invalid, 319 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 64 IncrementalHoareTripleChecker+Valid, 255 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2024-11-28 02:48:16,588 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [54 Valid, 227 Invalid, 319 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [64 Valid, 255 Invalid, 0 Unknown, 0 Unchecked, 0.6s Time] [2024-11-28 02:48:16,589 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 264 states. [2024-11-28 02:48:16,683 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 264 to 228. [2024-11-28 02:48:16,684 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 228 states, 139 states have (on average 1.1654676258992807) internal successors, (162), 150 states have internal predecessors, (162), 57 states have call successors, (57), 31 states have call predecessors, (57), 31 states have return successors, (51), 46 states have call predecessors, (51), 51 states have call successors, (51) [2024-11-28 02:48:16,686 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 228 states to 228 states and 270 transitions. [2024-11-28 02:48:16,688 INFO L78 Accepts]: Start accepts. Automaton has 228 states and 270 transitions. Word has length 43 [2024-11-28 02:48:16,689 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 02:48:16,689 INFO L471 AbstractCegarLoop]: Abstraction has 228 states and 270 transitions. [2024-11-28 02:48:16,689 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 17 states, 15 states have (on average 2.3333333333333335) internal successors, (35), 13 states have internal predecessors, (35), 7 states have call successors, (12), 3 states have call predecessors, (12), 3 states have return successors, (11), 6 states have call predecessors, (11), 5 states have call successors, (11) [2024-11-28 02:48:16,689 INFO L276 IsEmpty]: Start isEmpty. Operand 228 states and 270 transitions. [2024-11-28 02:48:16,690 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2024-11-28 02:48:16,690 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 02:48:16,691 INFO L218 NwaCegarLoop]: trace histogram [6, 5, 5, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 02:48:16,703 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0197b218-9905-4a5e-bb6e-61b58cf45d84/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Forceful destruction successful, exit code 0 [2024-11-28 02:48:16,891 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable9,9 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0197b218-9905-4a5e-bb6e-61b58cf45d84/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-28 02:48:16,891 INFO L396 AbstractCegarLoop]: === Iteration 11 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 02:48:16,892 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 02:48:16,892 INFO L85 PathProgramCache]: Analyzing trace with hash -964469844, now seen corresponding path program 1 times [2024-11-28 02:48:16,892 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 02:48:16,892 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1410289477] [2024-11-28 02:48:16,892 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:48:16,892 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 02:48:16,924 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unknown [2024-11-28 02:48:16,926 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [677086841] [2024-11-28 02:48:16,926 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:48:16,927 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-28 02:48:16,927 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0197b218-9905-4a5e-bb6e-61b58cf45d84/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 02:48:16,929 INFO L229 MonitoredProcess]: Starting monitored process 10 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0197b218-9905-4a5e-bb6e-61b58cf45d84/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-28 02:48:16,932 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0197b218-9905-4a5e-bb6e-61b58cf45d84/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process [2024-11-28 02:48:16,990 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 02:48:16,996 INFO L256 TraceCheckSpWp]: Trace formula consists of 129 conjuncts, 33 conjuncts are in the unsatisfiable core [2024-11-28 02:48:16,998 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-28 02:48:17,452 INFO L134 CoverageAnalysis]: Checked inductivity of 59 backedges. 9 proven. 21 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2024-11-28 02:48:17,453 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-28 02:48:17,966 INFO L134 CoverageAnalysis]: Checked inductivity of 59 backedges. 9 proven. 18 refuted. 0 times theorem prover too weak. 32 trivial. 0 not checked. [2024-11-28 02:48:17,966 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 02:48:17,966 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1410289477] [2024-11-28 02:48:17,966 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2024-11-28 02:48:17,966 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [677086841] [2024-11-28 02:48:17,967 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [677086841] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-28 02:48:17,967 INFO L185 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2024-11-28 02:48:17,968 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 10] total 17 [2024-11-28 02:48:17,968 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1488166735] [2024-11-28 02:48:17,968 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2024-11-28 02:48:17,969 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 17 states [2024-11-28 02:48:17,969 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 02:48:17,969 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2024-11-28 02:48:17,970 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=51, Invalid=221, Unknown=0, NotChecked=0, Total=272 [2024-11-28 02:48:17,970 INFO L87 Difference]: Start difference. First operand 228 states and 270 transitions. Second operand has 17 states, 17 states have (on average 1.9411764705882353) internal successors, (33), 14 states have internal predecessors, (33), 7 states have call successors, (15), 2 states have call predecessors, (15), 3 states have return successors, (14), 6 states have call predecessors, (14), 7 states have call successors, (14) [2024-11-28 02:48:19,231 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 02:48:19,231 INFO L93 Difference]: Finished difference Result 277 states and 342 transitions. [2024-11-28 02:48:19,231 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2024-11-28 02:48:19,232 INFO L78 Accepts]: Start accepts. Automaton has has 17 states, 17 states have (on average 1.9411764705882353) internal successors, (33), 14 states have internal predecessors, (33), 7 states have call successors, (15), 2 states have call predecessors, (15), 3 states have return successors, (14), 6 states have call predecessors, (14), 7 states have call successors, (14) Word has length 48 [2024-11-28 02:48:19,232 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 02:48:19,234 INFO L225 Difference]: With dead ends: 277 [2024-11-28 02:48:19,234 INFO L226 Difference]: Without dead ends: 235 [2024-11-28 02:48:19,237 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 100 GetRequests, 77 SyntacticMatches, 2 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 78 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=106, Invalid=400, Unknown=0, NotChecked=0, Total=506 [2024-11-28 02:48:19,237 INFO L435 NwaCegarLoop]: 27 mSDtfsCounter, 33 mSDsluCounter, 214 mSDsCounter, 0 mSdLazyCounter, 285 mSolverCounterSat, 64 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.9s Time, 0 mProtectedPredicate, 0 mProtectedAction, 34 SdHoareTripleChecker+Valid, 241 SdHoareTripleChecker+Invalid, 349 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 64 IncrementalHoareTripleChecker+Valid, 285 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.9s IncrementalHoareTripleChecker+Time [2024-11-28 02:48:19,238 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [34 Valid, 241 Invalid, 349 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [64 Valid, 285 Invalid, 0 Unknown, 0 Unchecked, 0.9s Time] [2024-11-28 02:48:19,238 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 235 states. [2024-11-28 02:48:19,305 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 235 to 200. [2024-11-28 02:48:19,306 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 200 states, 129 states have (on average 1.1472868217054264) internal successors, (148), 135 states have internal predecessors, (148), 43 states have call successors, (43), 28 states have call predecessors, (43), 27 states have return successors, (38), 36 states have call predecessors, (38), 38 states have call successors, (38) [2024-11-28 02:48:19,309 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 200 states to 200 states and 229 transitions. [2024-11-28 02:48:19,309 INFO L78 Accepts]: Start accepts. Automaton has 200 states and 229 transitions. Word has length 48 [2024-11-28 02:48:19,310 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 02:48:19,310 INFO L471 AbstractCegarLoop]: Abstraction has 200 states and 229 transitions. [2024-11-28 02:48:19,310 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 17 states, 17 states have (on average 1.9411764705882353) internal successors, (33), 14 states have internal predecessors, (33), 7 states have call successors, (15), 2 states have call predecessors, (15), 3 states have return successors, (14), 6 states have call predecessors, (14), 7 states have call successors, (14) [2024-11-28 02:48:19,310 INFO L276 IsEmpty]: Start isEmpty. Operand 200 states and 229 transitions. [2024-11-28 02:48:19,313 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2024-11-28 02:48:19,313 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 02:48:19,313 INFO L218 NwaCegarLoop]: trace histogram [7, 6, 6, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 02:48:19,324 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0197b218-9905-4a5e-bb6e-61b58cf45d84/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Forceful destruction successful, exit code 0 [2024-11-28 02:48:19,514 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable10,10 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0197b218-9905-4a5e-bb6e-61b58cf45d84/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-28 02:48:19,514 INFO L396 AbstractCegarLoop]: === Iteration 12 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 02:48:19,515 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 02:48:19,515 INFO L85 PathProgramCache]: Analyzing trace with hash -392360138, now seen corresponding path program 1 times [2024-11-28 02:48:19,515 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 02:48:19,515 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1963343239] [2024-11-28 02:48:19,515 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:48:19,515 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 02:48:19,537 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unknown [2024-11-28 02:48:19,538 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1353692172] [2024-11-28 02:48:19,538 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:48:19,538 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-28 02:48:19,538 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0197b218-9905-4a5e-bb6e-61b58cf45d84/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 02:48:19,540 INFO L229 MonitoredProcess]: Starting monitored process 11 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0197b218-9905-4a5e-bb6e-61b58cf45d84/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-28 02:48:19,544 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0197b218-9905-4a5e-bb6e-61b58cf45d84/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Waiting until timeout for monitored process [2024-11-28 02:48:19,608 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 02:48:19,610 INFO L256 TraceCheckSpWp]: Trace formula consists of 151 conjuncts, 32 conjuncts are in the unsatisfiable core [2024-11-28 02:48:19,613 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-28 02:48:19,997 INFO L134 CoverageAnalysis]: Checked inductivity of 89 backedges. 12 proven. 16 refuted. 0 times theorem prover too weak. 61 trivial. 0 not checked. [2024-11-28 02:48:19,997 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-28 02:48:20,433 INFO L134 CoverageAnalysis]: Checked inductivity of 89 backedges. 18 proven. 7 refuted. 0 times theorem prover too weak. 64 trivial. 0 not checked. [2024-11-28 02:48:20,433 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 02:48:20,433 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1963343239] [2024-11-28 02:48:20,433 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2024-11-28 02:48:20,433 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1353692172] [2024-11-28 02:48:20,433 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1353692172] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-28 02:48:20,433 INFO L185 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2024-11-28 02:48:20,433 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 8] total 17 [2024-11-28 02:48:20,434 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [377489162] [2024-11-28 02:48:20,434 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2024-11-28 02:48:20,434 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 17 states [2024-11-28 02:48:20,434 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 02:48:20,435 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2024-11-28 02:48:20,435 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=54, Invalid=218, Unknown=0, NotChecked=0, Total=272 [2024-11-28 02:48:20,435 INFO L87 Difference]: Start difference. First operand 200 states and 229 transitions. Second operand has 17 states, 17 states have (on average 2.235294117647059) internal successors, (38), 14 states have internal predecessors, (38), 8 states have call successors, (17), 3 states have call predecessors, (17), 2 states have return successors, (16), 6 states have call predecessors, (16), 6 states have call successors, (16) [2024-11-28 02:48:20,981 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 02:48:20,981 INFO L93 Difference]: Finished difference Result 220 states and 255 transitions. [2024-11-28 02:48:20,982 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2024-11-28 02:48:20,982 INFO L78 Accepts]: Start accepts. Automaton has has 17 states, 17 states have (on average 2.235294117647059) internal successors, (38), 14 states have internal predecessors, (38), 8 states have call successors, (17), 3 states have call predecessors, (17), 2 states have return successors, (16), 6 states have call predecessors, (16), 6 states have call successors, (16) Word has length 57 [2024-11-28 02:48:20,982 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 02:48:20,984 INFO L225 Difference]: With dead ends: 220 [2024-11-28 02:48:20,984 INFO L226 Difference]: Without dead ends: 213 [2024-11-28 02:48:20,985 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 118 GetRequests, 97 SyntacticMatches, 0 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 40 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=105, Invalid=401, Unknown=0, NotChecked=0, Total=506 [2024-11-28 02:48:20,986 INFO L435 NwaCegarLoop]: 44 mSDtfsCounter, 31 mSDsluCounter, 312 mSDsCounter, 0 mSdLazyCounter, 193 mSolverCounterSat, 30 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 31 SdHoareTripleChecker+Valid, 356 SdHoareTripleChecker+Invalid, 223 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 30 IncrementalHoareTripleChecker+Valid, 193 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2024-11-28 02:48:20,986 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [31 Valid, 356 Invalid, 223 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [30 Valid, 193 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2024-11-28 02:48:20,987 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 213 states. [2024-11-28 02:48:21,054 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 213 to 191. [2024-11-28 02:48:21,056 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 191 states, 129 states have (on average 1.1395348837209303) internal successors, (147), 131 states have internal predecessors, (147), 34 states have call successors, (34), 28 states have call predecessors, (34), 27 states have return successors, (32), 31 states have call predecessors, (32), 32 states have call successors, (32) [2024-11-28 02:48:21,057 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 191 states to 191 states and 213 transitions. [2024-11-28 02:48:21,059 INFO L78 Accepts]: Start accepts. Automaton has 191 states and 213 transitions. Word has length 57 [2024-11-28 02:48:21,060 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 02:48:21,061 INFO L471 AbstractCegarLoop]: Abstraction has 191 states and 213 transitions. [2024-11-28 02:48:21,061 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 17 states, 17 states have (on average 2.235294117647059) internal successors, (38), 14 states have internal predecessors, (38), 8 states have call successors, (17), 3 states have call predecessors, (17), 2 states have return successors, (16), 6 states have call predecessors, (16), 6 states have call successors, (16) [2024-11-28 02:48:21,062 INFO L276 IsEmpty]: Start isEmpty. Operand 191 states and 213 transitions. [2024-11-28 02:48:21,063 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2024-11-28 02:48:21,063 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 02:48:21,063 INFO L218 NwaCegarLoop]: trace histogram [8, 7, 7, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 02:48:21,077 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0197b218-9905-4a5e-bb6e-61b58cf45d84/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Ended with exit code 0 [2024-11-28 02:48:21,263 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 11 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0197b218-9905-4a5e-bb6e-61b58cf45d84/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable11 [2024-11-28 02:48:21,264 INFO L396 AbstractCegarLoop]: === Iteration 13 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 02:48:21,264 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 02:48:21,264 INFO L85 PathProgramCache]: Analyzing trace with hash 547074059, now seen corresponding path program 1 times [2024-11-28 02:48:21,264 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 02:48:21,264 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1146500481] [2024-11-28 02:48:21,264 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:48:21,264 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 02:48:21,282 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 02:48:21,565 INFO L134 CoverageAnalysis]: Checked inductivity of 108 backedges. 27 proven. 7 refuted. 0 times theorem prover too weak. 74 trivial. 0 not checked. [2024-11-28 02:48:21,566 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 02:48:21,566 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1146500481] [2024-11-28 02:48:21,566 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1146500481] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-28 02:48:21,566 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [344869230] [2024-11-28 02:48:21,566 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:48:21,566 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-28 02:48:21,566 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0197b218-9905-4a5e-bb6e-61b58cf45d84/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 02:48:21,572 INFO L229 MonitoredProcess]: Starting monitored process 12 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0197b218-9905-4a5e-bb6e-61b58cf45d84/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-28 02:48:21,574 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0197b218-9905-4a5e-bb6e-61b58cf45d84/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Waiting until timeout for monitored process [2024-11-28 02:48:21,637 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 02:48:21,643 INFO L256 TraceCheckSpWp]: Trace formula consists of 149 conjuncts, 18 conjuncts are in the unsatisfiable core [2024-11-28 02:48:21,647 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-28 02:48:21,752 INFO L134 CoverageAnalysis]: Checked inductivity of 108 backedges. 41 proven. 5 refuted. 0 times theorem prover too weak. 62 trivial. 0 not checked. [2024-11-28 02:48:21,752 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-28 02:48:21,918 INFO L134 CoverageAnalysis]: Checked inductivity of 108 backedges. 41 proven. 5 refuted. 0 times theorem prover too weak. 62 trivial. 0 not checked. [2024-11-28 02:48:21,920 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [344869230] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-28 02:48:21,920 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-28 02:48:21,920 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 9, 8] total 13 [2024-11-28 02:48:21,920 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [529977453] [2024-11-28 02:48:21,920 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-28 02:48:21,921 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 13 states [2024-11-28 02:48:21,921 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 02:48:21,921 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2024-11-28 02:48:21,922 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=37, Invalid=119, Unknown=0, NotChecked=0, Total=156 [2024-11-28 02:48:21,922 INFO L87 Difference]: Start difference. First operand 191 states and 213 transitions. Second operand has 13 states, 10 states have (on average 2.6) internal successors, (26), 10 states have internal predecessors, (26), 6 states have call successors, (12), 3 states have call predecessors, (12), 2 states have return successors, (12), 4 states have call predecessors, (12), 6 states have call successors, (12) [2024-11-28 02:48:22,156 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 02:48:22,156 INFO L93 Difference]: Finished difference Result 217 states and 242 transitions. [2024-11-28 02:48:22,157 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2024-11-28 02:48:22,157 INFO L78 Accepts]: Start accepts. Automaton has has 13 states, 10 states have (on average 2.6) internal successors, (26), 10 states have internal predecessors, (26), 6 states have call successors, (12), 3 states have call predecessors, (12), 2 states have return successors, (12), 4 states have call predecessors, (12), 6 states have call successors, (12) Word has length 59 [2024-11-28 02:48:22,157 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 02:48:22,159 INFO L225 Difference]: With dead ends: 217 [2024-11-28 02:48:22,159 INFO L226 Difference]: Without dead ends: 197 [2024-11-28 02:48:22,160 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 126 GetRequests, 114 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 26 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=45, Invalid=137, Unknown=0, NotChecked=0, Total=182 [2024-11-28 02:48:22,160 INFO L435 NwaCegarLoop]: 23 mSDtfsCounter, 9 mSDsluCounter, 119 mSDsCounter, 0 mSdLazyCounter, 96 mSolverCounterSat, 7 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 12 SdHoareTripleChecker+Valid, 142 SdHoareTripleChecker+Invalid, 103 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 7 IncrementalHoareTripleChecker+Valid, 96 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-11-28 02:48:22,161 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [12 Valid, 142 Invalid, 103 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [7 Valid, 96 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-11-28 02:48:22,162 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 197 states. [2024-11-28 02:48:22,201 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 197 to 98. [2024-11-28 02:48:22,202 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 98 states, 66 states have (on average 1.106060606060606) internal successors, (73), 68 states have internal predecessors, (73), 17 states have call successors, (17), 14 states have call predecessors, (17), 14 states have return successors, (15), 15 states have call predecessors, (15), 15 states have call successors, (15) [2024-11-28 02:48:22,203 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 98 states to 98 states and 105 transitions. [2024-11-28 02:48:22,203 INFO L78 Accepts]: Start accepts. Automaton has 98 states and 105 transitions. Word has length 59 [2024-11-28 02:48:22,203 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 02:48:22,204 INFO L471 AbstractCegarLoop]: Abstraction has 98 states and 105 transitions. [2024-11-28 02:48:22,204 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 13 states, 10 states have (on average 2.6) internal successors, (26), 10 states have internal predecessors, (26), 6 states have call successors, (12), 3 states have call predecessors, (12), 2 states have return successors, (12), 4 states have call predecessors, (12), 6 states have call successors, (12) [2024-11-28 02:48:22,204 INFO L276 IsEmpty]: Start isEmpty. Operand 98 states and 105 transitions. [2024-11-28 02:48:22,205 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2024-11-28 02:48:22,205 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 02:48:22,205 INFO L218 NwaCegarLoop]: trace histogram [13, 12, 12, 5, 4, 4, 4, 4, 4, 4, 4, 4, 4, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 02:48:22,218 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0197b218-9905-4a5e-bb6e-61b58cf45d84/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Forceful destruction successful, exit code 0 [2024-11-28 02:48:22,410 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 12 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0197b218-9905-4a5e-bb6e-61b58cf45d84/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable12 [2024-11-28 02:48:22,410 INFO L396 AbstractCegarLoop]: === Iteration 14 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 02:48:22,410 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 02:48:22,410 INFO L85 PathProgramCache]: Analyzing trace with hash -842483152, now seen corresponding path program 2 times [2024-11-28 02:48:22,410 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 02:48:22,411 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1826991942] [2024-11-28 02:48:22,411 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2024-11-28 02:48:22,411 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 02:48:22,435 INFO L229 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2024-11-28 02:48:22,435 INFO L230 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-28 02:48:22,756 INFO L134 CoverageAnalysis]: Checked inductivity of 342 backedges. 24 proven. 50 refuted. 0 times theorem prover too weak. 268 trivial. 0 not checked. [2024-11-28 02:48:22,757 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 02:48:22,757 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1826991942] [2024-11-28 02:48:22,757 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1826991942] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-28 02:48:22,757 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [634068062] [2024-11-28 02:48:22,757 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2024-11-28 02:48:22,757 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-28 02:48:22,757 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0197b218-9905-4a5e-bb6e-61b58cf45d84/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 02:48:22,762 INFO L229 MonitoredProcess]: Starting monitored process 13 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0197b218-9905-4a5e-bb6e-61b58cf45d84/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-28 02:48:22,764 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0197b218-9905-4a5e-bb6e-61b58cf45d84/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Waiting until timeout for monitored process [2024-11-28 02:48:22,862 INFO L229 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2024-11-28 02:48:22,863 INFO L230 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-28 02:48:22,864 INFO L256 TraceCheckSpWp]: Trace formula consists of 231 conjuncts, 11 conjuncts are in the unsatisfiable core [2024-11-28 02:48:22,867 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-28 02:48:23,047 INFO L134 CoverageAnalysis]: Checked inductivity of 342 backedges. 24 proven. 266 refuted. 0 times theorem prover too weak. 52 trivial. 0 not checked. [2024-11-28 02:48:23,047 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-28 02:48:23,279 INFO L134 CoverageAnalysis]: Checked inductivity of 342 backedges. 24 proven. 50 refuted. 0 times theorem prover too weak. 268 trivial. 0 not checked. [2024-11-28 02:48:23,279 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [634068062] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-28 02:48:23,280 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-28 02:48:23,280 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 7, 8] total 15 [2024-11-28 02:48:23,280 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1846224103] [2024-11-28 02:48:23,280 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-28 02:48:23,280 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 15 states [2024-11-28 02:48:23,280 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 02:48:23,281 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2024-11-28 02:48:23,281 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=81, Invalid=129, Unknown=0, NotChecked=0, Total=210 [2024-11-28 02:48:23,282 INFO L87 Difference]: Start difference. First operand 98 states and 105 transitions. Second operand has 15 states, 15 states have (on average 4.533333333333333) internal successors, (68), 15 states have internal predecessors, (68), 11 states have call successors, (43), 7 states have call predecessors, (43), 6 states have return successors, (42), 10 states have call predecessors, (42), 10 states have call successors, (42) [2024-11-28 02:48:23,643 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 02:48:23,643 INFO L93 Difference]: Finished difference Result 233 states and 258 transitions. [2024-11-28 02:48:23,643 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2024-11-28 02:48:23,644 INFO L78 Accepts]: Start accepts. Automaton has has 15 states, 15 states have (on average 4.533333333333333) internal successors, (68), 15 states have internal predecessors, (68), 11 states have call successors, (43), 7 states have call predecessors, (43), 6 states have return successors, (42), 10 states have call predecessors, (42), 10 states have call successors, (42) Word has length 95 [2024-11-28 02:48:23,644 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 02:48:23,645 INFO L225 Difference]: With dead ends: 233 [2024-11-28 02:48:23,646 INFO L226 Difference]: Without dead ends: 224 [2024-11-28 02:48:23,647 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 205 GetRequests, 184 SyntacticMatches, 0 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 65 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=184, Invalid=322, Unknown=0, NotChecked=0, Total=506 [2024-11-28 02:48:23,649 INFO L435 NwaCegarLoop]: 28 mSDtfsCounter, 54 mSDsluCounter, 116 mSDsCounter, 0 mSdLazyCounter, 82 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 54 SdHoareTripleChecker+Valid, 144 SdHoareTripleChecker+Invalid, 86 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 82 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-11-28 02:48:23,649 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [54 Valid, 144 Invalid, 86 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 82 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-11-28 02:48:23,650 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 224 states. [2024-11-28 02:48:23,734 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 224 to 212. [2024-11-28 02:48:23,734 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 212 states, 144 states have (on average 1.0902777777777777) internal successors, (157), 146 states have internal predecessors, (157), 35 states have call successors, (35), 32 states have call predecessors, (35), 32 states have return successors, (33), 33 states have call predecessors, (33), 33 states have call successors, (33) [2024-11-28 02:48:23,736 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 212 states to 212 states and 225 transitions. [2024-11-28 02:48:23,736 INFO L78 Accepts]: Start accepts. Automaton has 212 states and 225 transitions. Word has length 95 [2024-11-28 02:48:23,736 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 02:48:23,737 INFO L471 AbstractCegarLoop]: Abstraction has 212 states and 225 transitions. [2024-11-28 02:48:23,737 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 15 states, 15 states have (on average 4.533333333333333) internal successors, (68), 15 states have internal predecessors, (68), 11 states have call successors, (43), 7 states have call predecessors, (43), 6 states have return successors, (42), 10 states have call predecessors, (42), 10 states have call successors, (42) [2024-11-28 02:48:23,737 INFO L276 IsEmpty]: Start isEmpty. Operand 212 states and 225 transitions. [2024-11-28 02:48:23,741 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 210 [2024-11-28 02:48:23,742 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 02:48:23,742 INFO L218 NwaCegarLoop]: trace histogram [31, 30, 30, 11, 10, 10, 10, 10, 10, 10, 10, 10, 10, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 02:48:23,752 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0197b218-9905-4a5e-bb6e-61b58cf45d84/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Forceful destruction successful, exit code 0 [2024-11-28 02:48:23,943 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 13 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0197b218-9905-4a5e-bb6e-61b58cf45d84/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable13 [2024-11-28 02:48:23,943 INFO L396 AbstractCegarLoop]: === Iteration 15 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 02:48:23,944 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 02:48:23,944 INFO L85 PathProgramCache]: Analyzing trace with hash -279231760, now seen corresponding path program 3 times [2024-11-28 02:48:23,944 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 02:48:23,944 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [786258514] [2024-11-28 02:48:23,944 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2024-11-28 02:48:23,944 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 02:48:24,088 INFO L229 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 20 check-sat command(s) [2024-11-28 02:48:24,089 INFO L230 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-28 02:48:25,299 INFO L134 CoverageAnalysis]: Checked inductivity of 2139 backedges. 60 proven. 335 refuted. 0 times theorem prover too weak. 1744 trivial. 0 not checked. [2024-11-28 02:48:25,299 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 02:48:25,299 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [786258514] [2024-11-28 02:48:25,299 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [786258514] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-28 02:48:25,299 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1751476499] [2024-11-28 02:48:25,299 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2024-11-28 02:48:25,300 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-28 02:48:25,300 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0197b218-9905-4a5e-bb6e-61b58cf45d84/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 02:48:25,302 INFO L229 MonitoredProcess]: Starting monitored process 14 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0197b218-9905-4a5e-bb6e-61b58cf45d84/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-28 02:48:25,306 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0197b218-9905-4a5e-bb6e-61b58cf45d84/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Waiting until timeout for monitored process [2024-11-28 02:48:25,478 INFO L229 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 20 check-sat command(s) [2024-11-28 02:48:25,478 INFO L230 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-28 02:48:25,481 INFO L256 TraceCheckSpWp]: Trace formula consists of 444 conjuncts, 23 conjuncts are in the unsatisfiable core [2024-11-28 02:48:25,488 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-28 02:48:25,859 INFO L134 CoverageAnalysis]: Checked inductivity of 2139 backedges. 60 proven. 1955 refuted. 0 times theorem prover too weak. 124 trivial. 0 not checked. [2024-11-28 02:48:25,859 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-28 02:48:26,622 INFO L134 CoverageAnalysis]: Checked inductivity of 2139 backedges. 60 proven. 335 refuted. 0 times theorem prover too weak. 1744 trivial. 0 not checked. [2024-11-28 02:48:26,622 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1751476499] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-28 02:48:26,623 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-28 02:48:26,623 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [21, 13, 14] total 33 [2024-11-28 02:48:26,623 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2110833733] [2024-11-28 02:48:26,623 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-28 02:48:26,624 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 33 states [2024-11-28 02:48:26,624 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 02:48:26,626 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 33 interpolants. [2024-11-28 02:48:26,626 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=445, Invalid=611, Unknown=0, NotChecked=0, Total=1056 [2024-11-28 02:48:26,627 INFO L87 Difference]: Start difference. First operand 212 states and 225 transitions. Second operand has 33 states, 33 states have (on average 4.424242424242424) internal successors, (146), 33 states have internal predecessors, (146), 23 states have call successors, (97), 13 states have call predecessors, (97), 12 states have return successors, (96), 22 states have call predecessors, (96), 22 states have call successors, (96) [2024-11-28 02:48:27,843 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 02:48:27,843 INFO L93 Difference]: Finished difference Result 473 states and 522 transitions. [2024-11-28 02:48:27,844 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 46 states. [2024-11-28 02:48:27,844 INFO L78 Accepts]: Start accepts. Automaton has has 33 states, 33 states have (on average 4.424242424242424) internal successors, (146), 33 states have internal predecessors, (146), 23 states have call successors, (97), 13 states have call predecessors, (97), 12 states have return successors, (96), 22 states have call predecessors, (96), 22 states have call successors, (96) Word has length 209 [2024-11-28 02:48:27,845 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 02:48:27,848 INFO L225 Difference]: With dead ends: 473 [2024-11-28 02:48:27,848 INFO L226 Difference]: Without dead ends: 464 [2024-11-28 02:48:27,850 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 451 GetRequests, 406 SyntacticMatches, 0 SemanticMatches, 45 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 235 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=796, Invalid=1366, Unknown=0, NotChecked=0, Total=2162 [2024-11-28 02:48:27,851 INFO L435 NwaCegarLoop]: 28 mSDtfsCounter, 228 mSDsluCounter, 212 mSDsCounter, 0 mSdLazyCounter, 195 mSolverCounterSat, 85 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 228 SdHoareTripleChecker+Valid, 240 SdHoareTripleChecker+Invalid, 280 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 85 IncrementalHoareTripleChecker+Valid, 195 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2024-11-28 02:48:27,851 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [228 Valid, 240 Invalid, 280 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [85 Valid, 195 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2024-11-28 02:48:27,852 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 464 states. [2024-11-28 02:48:27,996 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 464 to 440. [2024-11-28 02:48:27,997 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 440 states, 300 states have (on average 1.0833333333333333) internal successors, (325), 302 states have internal predecessors, (325), 71 states have call successors, (71), 68 states have call predecessors, (71), 68 states have return successors, (69), 69 states have call predecessors, (69), 69 states have call successors, (69) [2024-11-28 02:48:28,002 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 440 states to 440 states and 465 transitions. [2024-11-28 02:48:28,004 INFO L78 Accepts]: Start accepts. Automaton has 440 states and 465 transitions. Word has length 209 [2024-11-28 02:48:28,005 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 02:48:28,005 INFO L471 AbstractCegarLoop]: Abstraction has 440 states and 465 transitions. [2024-11-28 02:48:28,005 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 33 states, 33 states have (on average 4.424242424242424) internal successors, (146), 33 states have internal predecessors, (146), 23 states have call successors, (97), 13 states have call predecessors, (97), 12 states have return successors, (96), 22 states have call predecessors, (96), 22 states have call successors, (96) [2024-11-28 02:48:28,006 INFO L276 IsEmpty]: Start isEmpty. Operand 440 states and 465 transitions. [2024-11-28 02:48:28,017 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 438 [2024-11-28 02:48:28,017 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 02:48:28,017 INFO L218 NwaCegarLoop]: trace histogram [67, 66, 66, 23, 22, 22, 22, 22, 22, 22, 22, 22, 22, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 02:48:28,030 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0197b218-9905-4a5e-bb6e-61b58cf45d84/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Forceful destruction successful, exit code 0 [2024-11-28 02:48:28,221 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 14 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0197b218-9905-4a5e-bb6e-61b58cf45d84/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable14 [2024-11-28 02:48:28,222 INFO L396 AbstractCegarLoop]: === Iteration 16 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 02:48:28,223 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 02:48:28,223 INFO L85 PathProgramCache]: Analyzing trace with hash 860308592, now seen corresponding path program 4 times [2024-11-28 02:48:28,223 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 02:48:28,223 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [300558387] [2024-11-28 02:48:28,223 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2024-11-28 02:48:28,223 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 02:48:28,418 INFO L229 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2024-11-28 02:48:28,419 INFO L230 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-28 02:48:31,587 INFO L134 CoverageAnalysis]: Checked inductivity of 10377 backedges. 132 proven. 1661 refuted. 0 times theorem prover too weak. 8584 trivial. 0 not checked. [2024-11-28 02:48:31,587 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 02:48:31,587 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [300558387] [2024-11-28 02:48:31,588 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [300558387] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-28 02:48:31,588 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1986132942] [2024-11-28 02:48:31,588 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2024-11-28 02:48:31,588 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-28 02:48:31,588 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0197b218-9905-4a5e-bb6e-61b58cf45d84/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 02:48:31,590 INFO L229 MonitoredProcess]: Starting monitored process 15 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0197b218-9905-4a5e-bb6e-61b58cf45d84/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-28 02:48:31,594 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0197b218-9905-4a5e-bb6e-61b58cf45d84/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Waiting until timeout for monitored process [2024-11-28 02:48:31,897 INFO L229 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2024-11-28 02:48:31,897 INFO L230 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-28 02:48:31,906 INFO L256 TraceCheckSpWp]: Trace formula consists of 951 conjuncts, 47 conjuncts are in the unsatisfiable core [2024-11-28 02:48:31,917 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-28 02:48:32,736 INFO L134 CoverageAnalysis]: Checked inductivity of 10377 backedges. 132 proven. 9977 refuted. 0 times theorem prover too weak. 268 trivial. 0 not checked. [2024-11-28 02:48:32,736 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-28 02:48:34,424 INFO L134 CoverageAnalysis]: Checked inductivity of 10377 backedges. 132 proven. 1661 refuted. 0 times theorem prover too weak. 8584 trivial. 0 not checked. [2024-11-28 02:48:34,424 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1986132942] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-28 02:48:34,425 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-28 02:48:34,425 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [27, 25, 26] total 52 [2024-11-28 02:48:34,425 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1399913439] [2024-11-28 02:48:34,425 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-28 02:48:34,427 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 52 states [2024-11-28 02:48:34,427 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 02:48:34,429 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 52 interpolants. [2024-11-28 02:48:34,431 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=1230, Invalid=1422, Unknown=0, NotChecked=0, Total=2652 [2024-11-28 02:48:34,432 INFO L87 Difference]: Start difference. First operand 440 states and 465 transitions. Second operand has 52 states, 52 states have (on average 5.173076923076923) internal successors, (269), 52 states have internal predecessors, (269), 48 states have call successors, (205), 25 states have call predecessors, (205), 24 states have return successors, (204), 47 states have call predecessors, (204), 47 states have call successors, (204) [2024-11-28 02:48:37,554 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 02:48:37,554 INFO L93 Difference]: Finished difference Result 953 states and 1050 transitions. [2024-11-28 02:48:37,555 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 94 states. [2024-11-28 02:48:37,555 INFO L78 Accepts]: Start accepts. Automaton has has 52 states, 52 states have (on average 5.173076923076923) internal successors, (269), 52 states have internal predecessors, (269), 48 states have call successors, (205), 25 states have call predecessors, (205), 24 states have return successors, (204), 47 states have call predecessors, (204), 47 states have call successors, (204) Word has length 437 [2024-11-28 02:48:37,557 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 02:48:37,562 INFO L225 Difference]: With dead ends: 953 [2024-11-28 02:48:37,562 INFO L226 Difference]: Without dead ends: 944 [2024-11-28 02:48:37,565 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 943 GetRequests, 849 SyntacticMatches, 0 SemanticMatches, 94 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1380 ImplicationChecksByTransitivity, 2.9s TimeCoverageRelationStatistics Valid=3364, Invalid=5756, Unknown=0, NotChecked=0, Total=9120 [2024-11-28 02:48:37,566 INFO L435 NwaCegarLoop]: 28 mSDtfsCounter, 430 mSDsluCounter, 338 mSDsCounter, 0 mSdLazyCounter, 378 mSolverCounterSat, 121 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.8s Time, 0 mProtectedPredicate, 0 mProtectedAction, 430 SdHoareTripleChecker+Valid, 366 SdHoareTripleChecker+Invalid, 499 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 121 IncrementalHoareTripleChecker+Valid, 378 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.0s IncrementalHoareTripleChecker+Time [2024-11-28 02:48:37,566 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [430 Valid, 366 Invalid, 499 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [121 Valid, 378 Invalid, 0 Unknown, 0 Unchecked, 1.0s Time] [2024-11-28 02:48:37,568 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 944 states. [2024-11-28 02:48:37,780 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 944 to 896. [2024-11-28 02:48:37,782 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 896 states, 612 states have (on average 1.0800653594771241) internal successors, (661), 614 states have internal predecessors, (661), 143 states have call successors, (143), 140 states have call predecessors, (143), 140 states have return successors, (141), 141 states have call predecessors, (141), 141 states have call successors, (141) [2024-11-28 02:48:37,786 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 896 states to 896 states and 945 transitions. [2024-11-28 02:48:37,787 INFO L78 Accepts]: Start accepts. Automaton has 896 states and 945 transitions. Word has length 437 [2024-11-28 02:48:37,788 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 02:48:37,789 INFO L471 AbstractCegarLoop]: Abstraction has 896 states and 945 transitions. [2024-11-28 02:48:37,789 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 52 states, 52 states have (on average 5.173076923076923) internal successors, (269), 52 states have internal predecessors, (269), 48 states have call successors, (205), 25 states have call predecessors, (205), 24 states have return successors, (204), 47 states have call predecessors, (204), 47 states have call successors, (204) [2024-11-28 02:48:37,790 INFO L276 IsEmpty]: Start isEmpty. Operand 896 states and 945 transitions. [2024-11-28 02:48:37,831 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 894 [2024-11-28 02:48:37,831 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 02:48:37,832 INFO L218 NwaCegarLoop]: trace histogram [139, 138, 138, 47, 46, 46, 46, 46, 46, 46, 46, 46, 46, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 02:48:37,844 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0197b218-9905-4a5e-bb6e-61b58cf45d84/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Forceful destruction successful, exit code 0 [2024-11-28 02:48:38,036 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 15 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0197b218-9905-4a5e-bb6e-61b58cf45d84/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable15 [2024-11-28 02:48:38,036 INFO L396 AbstractCegarLoop]: === Iteration 17 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 02:48:38,037 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 02:48:38,037 INFO L85 PathProgramCache]: Analyzing trace with hash 428541808, now seen corresponding path program 5 times [2024-11-28 02:48:38,037 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 02:48:38,037 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [578725549] [2024-11-28 02:48:38,037 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2024-11-28 02:48:38,037 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 02:48:39,566 INFO L229 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 90 check-sat command(s) [2024-11-28 02:48:39,566 INFO L230 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-28 02:48:50,102 INFO L134 CoverageAnalysis]: Checked inductivity of 45429 backedges. 276 proven. 7337 refuted. 0 times theorem prover too weak. 37816 trivial. 0 not checked. [2024-11-28 02:48:50,102 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 02:48:50,103 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [578725549] [2024-11-28 02:48:50,103 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [578725549] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-28 02:48:50,103 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [137451323] [2024-11-28 02:48:50,103 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2024-11-28 02:48:50,103 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-28 02:48:50,103 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0197b218-9905-4a5e-bb6e-61b58cf45d84/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 02:48:50,106 INFO L229 MonitoredProcess]: Starting monitored process 16 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0197b218-9905-4a5e-bb6e-61b58cf45d84/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-28 02:48:50,109 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0197b218-9905-4a5e-bb6e-61b58cf45d84/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (16)] Waiting until timeout for monitored process [2024-11-28 02:50:16,580 INFO L229 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 90 check-sat command(s) [2024-11-28 02:50:16,580 INFO L230 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-28 02:50:16,594 INFO L256 TraceCheckSpWp]: Trace formula consists of 1911 conjuncts, 95 conjuncts are in the unsatisfiable core [2024-11-28 02:50:16,617 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-28 02:50:17,952 INFO L134 CoverageAnalysis]: Checked inductivity of 45429 backedges. 276 proven. 44597 refuted. 0 times theorem prover too weak. 556 trivial. 0 not checked. [2024-11-28 02:50:17,953 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-28 02:50:22,179 INFO L134 CoverageAnalysis]: Checked inductivity of 45429 backedges. 276 proven. 7337 refuted. 0 times theorem prover too weak. 37816 trivial. 0 not checked. [2024-11-28 02:50:22,179 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [137451323] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-28 02:50:22,179 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-28 02:50:22,180 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [51, 49, 50] total 99 [2024-11-28 02:50:22,180 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1164741438] [2024-11-28 02:50:22,180 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-28 02:50:22,184 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 99 states [2024-11-28 02:50:22,184 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 02:50:22,188 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 99 interpolants. [2024-11-28 02:50:22,191 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=4658, Invalid=5044, Unknown=0, NotChecked=0, Total=9702 [2024-11-28 02:50:22,192 INFO L87 Difference]: Start difference. First operand 896 states and 945 transitions. Second operand has 99 states, 99 states have (on average 5.353535353535354) internal successors, (530), 99 states have internal predecessors, (530), 95 states have call successors, (421), 49 states have call predecessors, (421), 48 states have return successors, (420), 94 states have call predecessors, (420), 94 states have call successors, (420) [2024-11-28 02:50:30,569 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 02:50:30,569 INFO L93 Difference]: Finished difference Result 1913 states and 2106 transitions. [2024-11-28 02:50:30,570 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 190 states. [2024-11-28 02:50:30,571 INFO L78 Accepts]: Start accepts. Automaton has has 99 states, 99 states have (on average 5.353535353535354) internal successors, (530), 99 states have internal predecessors, (530), 95 states have call successors, (421), 49 states have call predecessors, (421), 48 states have return successors, (420), 94 states have call predecessors, (420), 94 states have call successors, (420) Word has length 893 [2024-11-28 02:50:30,573 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 02:50:30,590 INFO L225 Difference]: With dead ends: 1913 [2024-11-28 02:50:30,591 INFO L226 Difference]: Without dead ends: 1904 [2024-11-28 02:50:30,603 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 1927 GetRequests, 1738 SyntacticMatches, 0 SemanticMatches, 189 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5716 ImplicationChecksByTransitivity, 8.6s TimeCoverageRelationStatistics Valid=13540, Invalid=22750, Unknown=0, NotChecked=0, Total=36290 [2024-11-28 02:50:30,604 INFO L435 NwaCegarLoop]: 28 mSDtfsCounter, 1155 mSDsluCounter, 656 mSDsCounter, 0 mSdLazyCounter, 769 mSolverCounterSat, 436 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1155 SdHoareTripleChecker+Valid, 684 SdHoareTripleChecker+Invalid, 1205 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 436 IncrementalHoareTripleChecker+Valid, 769 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.5s IncrementalHoareTripleChecker+Time [2024-11-28 02:50:30,604 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1155 Valid, 684 Invalid, 1205 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [436 Valid, 769 Invalid, 0 Unknown, 0 Unchecked, 1.5s Time] [2024-11-28 02:50:30,608 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1904 states. [2024-11-28 02:50:30,947 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1904 to 1808. [2024-11-28 02:50:30,950 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1808 states, 1236 states have (on average 1.0784789644012944) internal successors, (1333), 1238 states have internal predecessors, (1333), 287 states have call successors, (287), 284 states have call predecessors, (287), 284 states have return successors, (285), 285 states have call predecessors, (285), 285 states have call successors, (285) [2024-11-28 02:50:30,958 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1808 states to 1808 states and 1905 transitions. [2024-11-28 02:50:30,960 INFO L78 Accepts]: Start accepts. Automaton has 1808 states and 1905 transitions. Word has length 893 [2024-11-28 02:50:30,962 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 02:50:30,962 INFO L471 AbstractCegarLoop]: Abstraction has 1808 states and 1905 transitions. [2024-11-28 02:50:30,963 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 99 states, 99 states have (on average 5.353535353535354) internal successors, (530), 99 states have internal predecessors, (530), 95 states have call successors, (421), 49 states have call predecessors, (421), 48 states have return successors, (420), 94 states have call predecessors, (420), 94 states have call successors, (420) [2024-11-28 02:50:30,964 INFO L276 IsEmpty]: Start isEmpty. Operand 1808 states and 1905 transitions. [2024-11-28 02:50:30,994 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 1806 [2024-11-28 02:50:30,994 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 02:50:30,995 INFO L218 NwaCegarLoop]: trace histogram [283, 282, 282, 95, 94, 94, 94, 94, 94, 94, 94, 94, 94, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 02:50:31,014 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0197b218-9905-4a5e-bb6e-61b58cf45d84/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (16)] Ended with exit code 0 [2024-11-28 02:50:31,195 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 16 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0197b218-9905-4a5e-bb6e-61b58cf45d84/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable16 [2024-11-28 02:50:31,195 INFO L396 AbstractCegarLoop]: === Iteration 18 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 02:50:31,196 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 02:50:31,196 INFO L85 PathProgramCache]: Analyzing trace with hash 574721392, now seen corresponding path program 6 times [2024-11-28 02:50:31,197 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 02:50:31,197 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1190861862] [2024-11-28 02:50:31,197 INFO L95 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2024-11-28 02:50:31,197 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 02:50:35,559 INFO L229 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 179 check-sat command(s) [2024-11-28 02:50:35,559 INFO L230 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-28 02:51:30,191 INFO L134 CoverageAnalysis]: Checked inductivity of 189837 backedges. 564 proven. 30785 refuted. 0 times theorem prover too weak. 158488 trivial. 0 not checked. [2024-11-28 02:51:30,191 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 02:51:30,191 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1190861862] [2024-11-28 02:51:30,191 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1190861862] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-28 02:51:30,191 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [646490085] [2024-11-28 02:51:30,192 INFO L95 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2024-11-28 02:51:30,192 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-28 02:51:30,192 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0197b218-9905-4a5e-bb6e-61b58cf45d84/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 02:51:30,195 INFO L229 MonitoredProcess]: Starting monitored process 17 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0197b218-9905-4a5e-bb6e-61b58cf45d84/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-28 02:51:30,198 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0197b218-9905-4a5e-bb6e-61b58cf45d84/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (17)] Waiting until timeout for monitored process [2024-11-28 02:51:37,296 INFO L229 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 179 check-sat command(s) [2024-11-28 02:51:37,296 INFO L230 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-28 02:51:37,317 INFO L256 TraceCheckSpWp]: Trace formula consists of 3822 conjuncts, 191 conjuncts are in the unsatisfiable core [2024-11-28 02:51:37,346 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-28 02:51:39,401 INFO L134 CoverageAnalysis]: Checked inductivity of 189837 backedges. 564 proven. 188141 refuted. 0 times theorem prover too weak. 1132 trivial. 0 not checked. [2024-11-28 02:51:39,401 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-28 02:51:46,557 INFO L134 CoverageAnalysis]: Checked inductivity of 189837 backedges. 564 proven. 30785 refuted. 0 times theorem prover too weak. 158488 trivial. 0 not checked. [2024-11-28 02:51:46,557 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [646490085] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-28 02:51:46,557 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-28 02:51:46,558 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [133, 97, 98] total 139 [2024-11-28 02:51:46,558 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [808479694] [2024-11-28 02:51:46,558 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-28 02:51:46,560 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 139 states [2024-11-28 02:51:46,560 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 02:51:46,565 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 139 interpolants. [2024-11-28 02:51:46,567 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=6846, Invalid=12336, Unknown=0, NotChecked=0, Total=19182 [2024-11-28 02:51:46,568 INFO L87 Difference]: Start difference. First operand 1808 states and 1905 transitions. Second operand has 139 states, 139 states have (on average 5.539568345323741) internal successors, (770), 139 states have internal predecessors, (770), 101 states have call successors, (586), 97 states have call predecessors, (586), 96 states have return successors, (585), 100 states have call predecessors, (585), 100 states have call successors, (585) [2024-11-28 02:51:52,565 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 02:51:52,565 INFO L93 Difference]: Finished difference Result 1943 states and 2058 transitions. [2024-11-28 02:51:52,565 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 202 states. [2024-11-28 02:51:52,567 INFO L78 Accepts]: Start accepts. Automaton has has 139 states, 139 states have (on average 5.539568345323741) internal successors, (770), 139 states have internal predecessors, (770), 101 states have call successors, (586), 97 states have call predecessors, (586), 96 states have return successors, (585), 100 states have call predecessors, (585), 100 states have call successors, (585) Word has length 1805 [2024-11-28 02:51:52,570 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 02:51:52,581 INFO L225 Difference]: With dead ends: 1943 [2024-11-28 02:51:52,581 INFO L226 Difference]: Without dead ends: 1934 [2024-11-28 02:51:52,588 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 3805 GetRequests, 3514 SyntacticMatches, 90 SemanticMatches, 201 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10204 ImplicationChecksByTransitivity, 14.3s TimeCoverageRelationStatistics Valid=15349, Invalid=25657, Unknown=0, NotChecked=0, Total=41006 [2024-11-28 02:51:52,589 INFO L435 NwaCegarLoop]: 28 mSDtfsCounter, 368 mSDsluCounter, 732 mSDsCounter, 0 mSdLazyCounter, 862 mSolverCounterSat, 12 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 368 SdHoareTripleChecker+Valid, 760 SdHoareTripleChecker+Invalid, 874 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 12 IncrementalHoareTripleChecker+Valid, 862 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.3s IncrementalHoareTripleChecker+Time [2024-11-28 02:51:52,589 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [368 Valid, 760 Invalid, 874 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [12 Valid, 862 Invalid, 0 Unknown, 0 Unchecked, 1.3s Time] [2024-11-28 02:51:52,592 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1934 states. [2024-11-28 02:51:53,102 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1934 to 1922. [2024-11-28 02:51:53,105 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1922 states, 1314 states have (on average 1.078386605783866) internal successors, (1417), 1316 states have internal predecessors, (1417), 305 states have call successors, (305), 302 states have call predecessors, (305), 302 states have return successors, (303), 303 states have call predecessors, (303), 303 states have call successors, (303) [2024-11-28 02:51:53,111 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1922 states to 1922 states and 2025 transitions. [2024-11-28 02:51:53,113 INFO L78 Accepts]: Start accepts. Automaton has 1922 states and 2025 transitions. Word has length 1805 [2024-11-28 02:51:53,116 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 02:51:53,117 INFO L471 AbstractCegarLoop]: Abstraction has 1922 states and 2025 transitions. [2024-11-28 02:51:53,118 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 139 states, 139 states have (on average 5.539568345323741) internal successors, (770), 139 states have internal predecessors, (770), 101 states have call successors, (586), 97 states have call predecessors, (586), 96 states have return successors, (585), 100 states have call predecessors, (585), 100 states have call successors, (585) [2024-11-28 02:51:53,118 INFO L276 IsEmpty]: Start isEmpty. Operand 1922 states and 2025 transitions. [2024-11-28 02:51:53,148 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 1920 [2024-11-28 02:51:53,148 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 02:51:53,148 INFO L218 NwaCegarLoop]: trace histogram [301, 300, 300, 101, 100, 100, 100, 100, 100, 100, 100, 100, 100, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 02:51:53,187 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0197b218-9905-4a5e-bb6e-61b58cf45d84/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (17)] Forceful destruction successful, exit code 0 [2024-11-28 02:51:53,349 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 17 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0197b218-9905-4a5e-bb6e-61b58cf45d84/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable17 [2024-11-28 02:51:53,349 INFO L396 AbstractCegarLoop]: === Iteration 19 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 02:51:53,350 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 02:51:53,350 INFO L85 PathProgramCache]: Analyzing trace with hash -2073639376, now seen corresponding path program 7 times [2024-11-28 02:51:53,350 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 02:51:53,350 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1406585374] [2024-11-28 02:51:53,350 INFO L95 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2024-11-28 02:51:53,350 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 02:51:54,687 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unknown [2024-11-28 02:51:54,704 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [848049841] [2024-11-28 02:51:54,704 INFO L95 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2024-11-28 02:51:54,704 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-28 02:51:54,704 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0197b218-9905-4a5e-bb6e-61b58cf45d84/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 02:51:54,706 INFO L229 MonitoredProcess]: Starting monitored process 18 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0197b218-9905-4a5e-bb6e-61b58cf45d84/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-28 02:51:54,709 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0197b218-9905-4a5e-bb6e-61b58cf45d84/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (18)] Waiting until timeout for monitored process [2024-11-28 02:51:55,870 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-28 02:51:55,871 INFO L357 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-28 02:51:56,329 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-28 02:51:56,959 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-28 02:51:56,959 INFO L340 BasicCegarLoop]: Counterexample is feasible [2024-11-28 02:51:56,960 INFO L782 garLoopResultBuilder]: Registering result UNSAFE for location __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION (0 of 1 remaining) [2024-11-28 02:51:56,976 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0197b218-9905-4a5e-bb6e-61b58cf45d84/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (18)] Forceful destruction successful, exit code 0 [2024-11-28 02:51:57,162 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable18,18 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0197b218-9905-4a5e-bb6e-61b58cf45d84/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-28 02:51:57,165 INFO L422 BasicCegarLoop]: Path program histogram: [7, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 02:51:57,521 INFO L170 ceAbstractionStarter]: Computing trace abstraction results [2024-11-28 02:51:57,524 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 28.11 02:51:57 BoogieIcfgContainer [2024-11-28 02:51:57,524 INFO L131 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2024-11-28 02:51:57,525 INFO L112 PluginConnector]: ------------------------Witness Printer---------------------------- [2024-11-28 02:51:57,525 INFO L270 PluginConnector]: Initializing Witness Printer... [2024-11-28 02:51:57,526 INFO L274 PluginConnector]: Witness Printer initialized [2024-11-28 02:51:57,526 INFO L184 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.11 02:48:08" (3/4) ... [2024-11-28 02:51:57,527 INFO L140 WitnessPrinter]: Generating witness for reachability counterexample [2024-11-28 02:51:58,051 INFO L129 tionWitnessGenerator]: Generated YAML witness of length 1210. [2024-11-28 02:51:58,563 INFO L149 WitnessManager]: Wrote witness to /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0197b218-9905-4a5e-bb6e-61b58cf45d84/bin/uautomizer-verify-aQ6SnzHsRB/witness.graphml [2024-11-28 02:51:58,565 INFO L149 WitnessManager]: Wrote witness to /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0197b218-9905-4a5e-bb6e-61b58cf45d84/bin/uautomizer-verify-aQ6SnzHsRB/witness.yml [2024-11-28 02:51:58,565 INFO L131 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2024-11-28 02:51:58,568 INFO L158 Benchmark]: Toolchain (without parser) took 231361.65ms. Allocated memory was 142.6MB in the beginning and 419.4MB in the end (delta: 276.8MB). Free memory was 117.5MB in the beginning and 232.6MB in the end (delta: -115.1MB). Peak memory consumption was 1.1GB. Max. memory is 16.1GB. [2024-11-28 02:51:58,568 INFO L158 Benchmark]: CDTParser took 0.52ms. Allocated memory is still 117.4MB. Free memory is still 72.6MB. There was no memory consumed. Max. memory is 16.1GB. [2024-11-28 02:51:58,568 INFO L158 Benchmark]: CACSL2BoogieTranslator took 346.89ms. Allocated memory is still 142.6MB. Free memory was 117.3MB in the beginning and 105.2MB in the end (delta: 12.1MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. [2024-11-28 02:51:58,569 INFO L158 Benchmark]: Boogie Procedure Inliner took 41.75ms. Allocated memory is still 142.6MB. Free memory was 105.2MB in the beginning and 104.0MB in the end (delta: 1.2MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. [2024-11-28 02:51:58,569 INFO L158 Benchmark]: Boogie Preprocessor took 71.73ms. Allocated memory is still 142.6MB. Free memory was 104.0MB in the beginning and 102.8MB in the end (delta: 1.2MB). There was no memory consumed. Max. memory is 16.1GB. [2024-11-28 02:51:58,569 INFO L158 Benchmark]: RCFGBuilder took 480.74ms. Allocated memory is still 142.6MB. Free memory was 102.8MB in the beginning and 91.8MB in the end (delta: 11.0MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. [2024-11-28 02:51:58,569 INFO L158 Benchmark]: TraceAbstraction took 229370.54ms. Allocated memory was 142.6MB in the beginning and 1.8GB in the end (delta: 1.7GB). Free memory was 91.2MB in the beginning and 706.8MB in the end (delta: -615.6MB). Peak memory consumption was 1.1GB. Max. memory is 16.1GB. [2024-11-28 02:51:58,572 INFO L158 Benchmark]: Witness Printer took 1040.37ms. Allocated memory was 1.8GB in the beginning and 419.4MB in the end (delta: -1.4GB). Free memory was 706.8MB in the beginning and 232.6MB in the end (delta: 474.2MB). Peak memory consumption was 54.8MB. Max. memory is 16.1GB. [2024-11-28 02:51:58,574 INFO L338 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.52ms. Allocated memory is still 117.4MB. Free memory is still 72.6MB. There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 346.89ms. Allocated memory is still 142.6MB. Free memory was 117.3MB in the beginning and 105.2MB in the end (delta: 12.1MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 41.75ms. Allocated memory is still 142.6MB. Free memory was 105.2MB in the beginning and 104.0MB in the end (delta: 1.2MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. * Boogie Preprocessor took 71.73ms. Allocated memory is still 142.6MB. Free memory was 104.0MB in the beginning and 102.8MB in the end (delta: 1.2MB). There was no memory consumed. Max. memory is 16.1GB. * RCFGBuilder took 480.74ms. Allocated memory is still 142.6MB. Free memory was 102.8MB in the beginning and 91.8MB in the end (delta: 11.0MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. * TraceAbstraction took 229370.54ms. Allocated memory was 142.6MB in the beginning and 1.8GB in the end (delta: 1.7GB). Free memory was 91.2MB in the beginning and 706.8MB in the end (delta: -615.6MB). Peak memory consumption was 1.1GB. Max. memory is 16.1GB. * Witness Printer took 1040.37ms. Allocated memory was 1.8GB in the beginning and 419.4MB in the end (delta: -1.4GB). Free memory was 706.8MB in the beginning and 232.6MB in the end (delta: 474.2MB). Peak memory consumption was 54.8MB. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: ErrorAutomatonStatistics NumberErrorTraces: 0, NumberStatementsAllTraces: 0, NumberRelevantStatements: 0, 0.0s ErrorAutomatonConstructionTimeTotal, 0.0s FaulLocalizationTime, NumberStatementsFirstTrace: -1, TraceLengthAvg: 0, 0.0s ErrorAutomatonConstructionTimeAvg, 0.0s ErrorAutomatonDifferenceTimeAvg, 0.0s ErrorAutomatonDifferenceTimeTotal, NumberOfNoEnhancement: 0, NumberOfFiniteEnhancement: 0, NumberOfInfiniteEnhancement: 0 - CounterExampleResult [Line: 13]: a call to reach_error is reachable a call to reach_error is reachable We found a FailurePath: [L18] int counter = 0; VAL [counter=0] [L20] long long a, b, p, q, r, s; [L21] int x, y; [L22] x = __VERIFIER_nondet_int() [L23] y = __VERIFIER_nondet_int() [L24] CALL assume_abort_if_not(x >= 1) VAL [\old(cond)=1, counter=0] [L8] COND FALSE !(!cond) VAL [\old(cond)=1, counter=0] [L24] RET assume_abort_if_not(x >= 1) VAL [counter=0, x=102, y=1] [L25] CALL assume_abort_if_not(y >= 1) VAL [\old(cond)=1, counter=0] [L8] COND FALSE !(!cond) VAL [\old(cond)=1, counter=0] [L25] RET assume_abort_if_not(y >= 1) VAL [counter=0, x=102, y=1] [L27] a = x [L28] b = y [L29] p = 1 [L30] q = 0 [L31] r = 0 [L32] s = 1 VAL [a=102, b=1, counter=0, p=1, q=0, r=0, s=1, x=102, y=1] [L34] EXPR counter++ VAL [a=102, b=1, counter=1, p=1, q=0, r=0, s=1, x=102, y=1] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(1 == p * s - r * q) VAL [\old(cond)=1, counter=1] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=1] [L35] RET __VERIFIER_assert(1 == p * s - r * q) VAL [a=102, b=1, counter=1, p=1, q=0, r=0, s=1, x=102, y=1] [L36] CALL __VERIFIER_assert(a == y * r + x * p) VAL [\old(cond)=1, counter=1] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=1] [L36] RET __VERIFIER_assert(a == y * r + x * p) VAL [a=102, b=1, counter=1, p=1, q=0, r=0, s=1, x=102, y=1] [L37] CALL __VERIFIER_assert(b == x * q + y * s) VAL [\old(cond)=1, counter=1] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=1] [L37] RET __VERIFIER_assert(b == x * q + y * s) VAL [a=102, b=1, counter=1, p=1, q=0, r=0, s=1, x=102, y=1] [L39] COND FALSE !(!(a != b)) VAL [a=102, b=1, counter=1, p=1, q=0, r=0, s=1, x=102, y=1] [L42] COND TRUE a > b [L43] a = a - b [L44] p = p - q [L45] r = r - s VAL [a=101, b=1, counter=1, p=1, q=0, r=-1, s=1, x=102, y=1] [L34] EXPR counter++ VAL [a=101, b=1, counter=2, p=1, q=0, r=-1, s=1, x=102, y=1] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(1 == p * s - r * q) VAL [\old(cond)=1, counter=2] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=2] [L35] RET __VERIFIER_assert(1 == p * s - r * q) VAL [a=101, b=1, counter=2, p=1, q=0, r=-1, s=1, x=102, y=1] [L36] CALL __VERIFIER_assert(a == y * r + x * p) VAL [\old(cond)=1, counter=2] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=2] [L36] RET __VERIFIER_assert(a == y * r + x * p) VAL [a=101, b=1, counter=2, p=1, q=0, r=-1, s=1, x=102, y=1] [L37] CALL __VERIFIER_assert(b == x * q + y * s) VAL [\old(cond)=1, counter=2] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=2] [L37] RET __VERIFIER_assert(b == x * q + y * s) VAL [a=101, b=1, counter=2, p=1, q=0, r=-1, s=1, x=102, y=1] [L39] COND FALSE !(!(a != b)) VAL [a=101, b=1, counter=2, p=1, q=0, r=-1, s=1, x=102, y=1] [L42] COND TRUE a > b [L43] a = a - b [L44] p = p - q [L45] r = r - s VAL [a=100, b=1, counter=2, p=1, q=0, r=-2, s=1, x=102, y=1] [L34] EXPR counter++ VAL [a=100, b=1, counter=3, p=1, q=0, r=-2, s=1, x=102, y=1] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(1 == p * s - r * q) VAL [\old(cond)=1, counter=3] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=3] [L35] RET __VERIFIER_assert(1 == p * s - r * q) VAL [a=100, b=1, counter=3, p=1, q=0, r=-2, s=1, x=102, y=1] [L36] CALL __VERIFIER_assert(a == y * r + x * p) VAL [\old(cond)=1, counter=3] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=3] [L36] RET __VERIFIER_assert(a == y * r + x * p) VAL [a=100, b=1, counter=3, p=1, q=0, r=-2, s=1, x=102, y=1] [L37] CALL __VERIFIER_assert(b == x * q + y * s) VAL [\old(cond)=1, counter=3] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=3] [L37] RET __VERIFIER_assert(b == x * q + y * s) VAL [a=100, b=1, counter=3, p=1, q=0, r=-2, s=1, x=102, y=1] [L39] COND FALSE !(!(a != b)) VAL [a=100, b=1, counter=3, p=1, q=0, r=-2, s=1, x=102, y=1] [L42] COND TRUE a > b [L43] a = a - b [L44] p = p - q [L45] r = r - s VAL [a=99, b=1, counter=3, p=1, q=0, r=-3, s=1, x=102, y=1] [L34] EXPR counter++ VAL [a=99, b=1, counter=4, p=1, q=0, r=-3, s=1, x=102, y=1] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(1 == p * s - r * q) VAL [\old(cond)=1, counter=4] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=4] [L35] RET __VERIFIER_assert(1 == p * s - r * q) VAL [a=99, b=1, counter=4, p=1, q=0, r=-3, s=1, x=102, y=1] [L36] CALL __VERIFIER_assert(a == y * r + x * p) VAL [\old(cond)=1, counter=4] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=4] [L36] RET __VERIFIER_assert(a == y * r + x * p) VAL [a=99, b=1, counter=4, p=1, q=0, r=-3, s=1, x=102, y=1] [L37] CALL __VERIFIER_assert(b == x * q + y * s) VAL [\old(cond)=1, counter=4] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=4] [L37] RET __VERIFIER_assert(b == x * q + y * s) VAL [a=99, b=1, counter=4, p=1, q=0, r=-3, s=1, x=102, y=1] [L39] COND FALSE !(!(a != b)) VAL [a=99, b=1, counter=4, p=1, q=0, r=-3, s=1, x=102, y=1] [L42] COND TRUE a > b [L43] a = a - b [L44] p = p - q [L45] r = r - s VAL [a=98, b=1, counter=4, p=1, q=0, r=-4, s=1, x=102, y=1] [L34] EXPR counter++ VAL [a=98, b=1, counter=5, p=1, q=0, r=-4, s=1, x=102, y=1] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(1 == p * s - r * q) VAL [\old(cond)=1, counter=5] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=5] [L35] RET __VERIFIER_assert(1 == p * s - r * q) VAL [a=98, b=1, counter=5, p=1, q=0, r=-4, s=1, x=102, y=1] [L36] CALL __VERIFIER_assert(a == y * r + x * p) VAL [\old(cond)=1, counter=5] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=5] [L36] RET __VERIFIER_assert(a == y * r + x * p) VAL [a=98, b=1, counter=5, p=1, q=0, r=-4, s=1, x=102, y=1] [L37] CALL __VERIFIER_assert(b == x * q + y * s) VAL [\old(cond)=1, counter=5] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=5] [L37] RET __VERIFIER_assert(b == x * q + y * s) VAL [a=98, b=1, counter=5, p=1, q=0, r=-4, s=1, x=102, y=1] [L39] COND FALSE !(!(a != b)) VAL [a=98, b=1, counter=5, p=1, q=0, r=-4, s=1, x=102, y=1] [L42] COND TRUE a > b [L43] a = a - b [L44] p = p - q [L45] r = r - s VAL [a=97, b=1, counter=5, p=1, q=0, r=-5, s=1, x=102, y=1] [L34] EXPR counter++ VAL [a=97, b=1, counter=6, p=1, q=0, r=-5, s=1, x=102, y=1] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(1 == p * s - r * q) VAL [\old(cond)=1, counter=6] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=6] [L35] RET __VERIFIER_assert(1 == p * s - r * q) VAL [a=97, b=1, counter=6, p=1, q=0, r=-5, s=1, x=102, y=1] [L36] CALL __VERIFIER_assert(a == y * r + x * p) VAL [\old(cond)=1, counter=6] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=6] [L36] RET __VERIFIER_assert(a == y * r + x * p) VAL [a=97, b=1, counter=6, p=1, q=0, r=-5, s=1, x=102, y=1] [L37] CALL __VERIFIER_assert(b == x * q + y * s) VAL [\old(cond)=1, counter=6] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=6] [L37] RET __VERIFIER_assert(b == x * q + y * s) VAL [a=97, b=1, counter=6, p=1, q=0, r=-5, s=1, x=102, y=1] [L39] COND FALSE !(!(a != b)) VAL [a=97, b=1, counter=6, p=1, q=0, r=-5, s=1, x=102, y=1] [L42] COND TRUE a > b [L43] a = a - b [L44] p = p - q [L45] r = r - s VAL [a=96, b=1, counter=6, p=1, q=0, r=-6, s=1, x=102, y=1] [L34] EXPR counter++ VAL [a=96, b=1, counter=7, p=1, q=0, r=-6, s=1, x=102, y=1] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(1 == p * s - r * q) VAL [\old(cond)=1, counter=7] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=7] [L35] RET __VERIFIER_assert(1 == p * s - r * q) VAL [a=96, b=1, counter=7, p=1, q=0, r=-6, s=1, x=102, y=1] [L36] CALL __VERIFIER_assert(a == y * r + x * p) VAL [\old(cond)=1, counter=7] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=7] [L36] RET __VERIFIER_assert(a == y * r + x * p) VAL [a=96, b=1, counter=7, p=1, q=0, r=-6, s=1, x=102, y=1] [L37] CALL __VERIFIER_assert(b == x * q + y * s) VAL [\old(cond)=1, counter=7] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=7] [L37] RET __VERIFIER_assert(b == x * q + y * s) VAL [a=96, b=1, counter=7, p=1, q=0, r=-6, s=1, x=102, y=1] [L39] COND FALSE !(!(a != b)) VAL [a=96, b=1, counter=7, p=1, q=0, r=-6, s=1, x=102, y=1] [L42] COND TRUE a > b [L43] a = a - b [L44] p = p - q [L45] r = r - s VAL [a=95, b=1, counter=7, p=1, q=0, r=-7, s=1, x=102, y=1] [L34] EXPR counter++ VAL [a=95, b=1, counter=8, p=1, q=0, r=-7, s=1, x=102, y=1] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(1 == p * s - r * q) VAL [\old(cond)=1, counter=8] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=8] [L35] RET __VERIFIER_assert(1 == p * s - r * q) VAL [a=95, b=1, counter=8, p=1, q=0, r=-7, s=1, x=102, y=1] [L36] CALL __VERIFIER_assert(a == y * r + x * p) VAL [\old(cond)=1, counter=8] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=8] [L36] RET __VERIFIER_assert(a == y * r + x * p) VAL [a=95, b=1, counter=8, p=1, q=0, r=-7, s=1, x=102, y=1] [L37] CALL __VERIFIER_assert(b == x * q + y * s) VAL [\old(cond)=1, counter=8] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=8] [L37] RET __VERIFIER_assert(b == x * q + y * s) VAL [a=95, b=1, counter=8, p=1, q=0, r=-7, s=1, x=102, y=1] [L39] COND FALSE !(!(a != b)) VAL [a=95, b=1, counter=8, p=1, q=0, r=-7, s=1, x=102, y=1] [L42] COND TRUE a > b [L43] a = a - b [L44] p = p - q [L45] r = r - s VAL [a=94, b=1, counter=8, p=1, q=0, r=-8, s=1, x=102, y=1] [L34] EXPR counter++ VAL [a=94, b=1, counter=9, p=1, q=0, r=-8, s=1, x=102, y=1] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(1 == p * s - r * q) VAL [\old(cond)=1, counter=9] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=9] [L35] RET __VERIFIER_assert(1 == p * s - r * q) VAL [a=94, b=1, counter=9, p=1, q=0, r=-8, s=1, x=102, y=1] [L36] CALL __VERIFIER_assert(a == y * r + x * p) VAL [\old(cond)=1, counter=9] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=9] [L36] RET __VERIFIER_assert(a == y * r + x * p) VAL [a=94, b=1, counter=9, p=1, q=0, r=-8, s=1, x=102, y=1] [L37] CALL __VERIFIER_assert(b == x * q + y * s) VAL [\old(cond)=1, counter=9] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=9] [L37] RET __VERIFIER_assert(b == x * q + y * s) VAL [a=94, b=1, counter=9, p=1, q=0, r=-8, s=1, x=102, y=1] [L39] COND FALSE !(!(a != b)) VAL [a=94, b=1, counter=9, p=1, q=0, r=-8, s=1, x=102, y=1] [L42] COND TRUE a > b [L43] a = a - b [L44] p = p - q [L45] r = r - s VAL [a=93, b=1, counter=9, p=1, q=0, r=-9, s=1, x=102, y=1] [L34] EXPR counter++ VAL [a=93, b=1, counter=10, p=1, q=0, r=-9, s=1, x=102, y=1] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(1 == p * s - r * q) VAL [\old(cond)=1, counter=10] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=10] [L35] RET __VERIFIER_assert(1 == p * s - r * q) VAL [a=93, b=1, counter=10, p=1, q=0, r=-9, s=1, x=102, y=1] [L36] CALL __VERIFIER_assert(a == y * r + x * p) VAL [\old(cond)=1, counter=10] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=10] [L36] RET __VERIFIER_assert(a == y * r + x * p) VAL [a=93, b=1, counter=10, p=1, q=0, r=-9, s=1, x=102, y=1] [L37] CALL __VERIFIER_assert(b == x * q + y * s) VAL [\old(cond)=1, counter=10] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=10] [L37] RET __VERIFIER_assert(b == x * q + y * s) VAL [a=93, b=1, counter=10, p=1, q=0, r=-9, s=1, x=102, y=1] [L39] COND FALSE !(!(a != b)) VAL [a=93, b=1, counter=10, p=1, q=0, r=-9, s=1, x=102, y=1] [L42] COND TRUE a > b [L43] a = a - b [L44] p = p - q [L45] r = r - s VAL [a=92, b=1, counter=10, p=1, q=0, r=-10, s=1, x=102, y=1] [L34] EXPR counter++ VAL [a=92, b=1, counter=11, p=1, q=0, r=-10, s=1, x=102, y=1] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(1 == p * s - r * q) VAL [\old(cond)=1, counter=11] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=11] [L35] RET __VERIFIER_assert(1 == p * s - r * q) VAL [a=92, b=1, counter=11, p=1, q=0, r=-10, s=1, x=102, y=1] [L36] CALL __VERIFIER_assert(a == y * r + x * p) VAL [\old(cond)=1, counter=11] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=11] [L36] RET __VERIFIER_assert(a == y * r + x * p) VAL [a=92, b=1, counter=11, p=1, q=0, r=-10, s=1, x=102, y=1] [L37] CALL __VERIFIER_assert(b == x * q + y * s) VAL [\old(cond)=1, counter=11] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=11] [L37] RET __VERIFIER_assert(b == x * q + y * s) VAL [a=92, b=1, counter=11, p=1, q=0, r=-10, s=1, x=102, y=1] [L39] COND FALSE !(!(a != b)) VAL [a=92, b=1, counter=11, p=1, q=0, r=-10, s=1, x=102, y=1] [L42] COND TRUE a > b [L43] a = a - b [L44] p = p - q [L45] r = r - s VAL [a=91, b=1, counter=11, p=1, q=0, r=-11, s=1, x=102, y=1] [L34] EXPR counter++ VAL [a=91, b=1, counter=12, p=1, q=0, r=-11, s=1, x=102, y=1] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(1 == p * s - r * q) VAL [\old(cond)=1, counter=12] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=12] [L35] RET __VERIFIER_assert(1 == p * s - r * q) VAL [a=91, b=1, counter=12, p=1, q=0, r=-11, s=1, x=102, y=1] [L36] CALL __VERIFIER_assert(a == y * r + x * p) VAL [\old(cond)=1, counter=12] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=12] [L36] RET __VERIFIER_assert(a == y * r + x * p) VAL [a=91, b=1, counter=12, p=1, q=0, r=-11, s=1, x=102, y=1] [L37] CALL __VERIFIER_assert(b == x * q + y * s) VAL [\old(cond)=1, counter=12] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=12] [L37] RET __VERIFIER_assert(b == x * q + y * s) VAL [a=91, b=1, counter=12, p=1, q=0, r=-11, s=1, x=102, y=1] [L39] COND FALSE !(!(a != b)) VAL [a=91, b=1, counter=12, p=1, q=0, r=-11, s=1, x=102, y=1] [L42] COND TRUE a > b [L43] a = a - b [L44] p = p - q [L45] r = r - s VAL [a=90, b=1, counter=12, p=1, q=0, r=-12, s=1, x=102, y=1] [L34] EXPR counter++ VAL [a=90, b=1, counter=13, p=1, q=0, r=-12, s=1, x=102, y=1] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(1 == p * s - r * q) VAL [\old(cond)=1, counter=13] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=13] [L35] RET __VERIFIER_assert(1 == p * s - r * q) VAL [a=90, b=1, counter=13, p=1, q=0, r=-12, s=1, x=102, y=1] [L36] CALL __VERIFIER_assert(a == y * r + x * p) VAL [\old(cond)=1, counter=13] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=13] [L36] RET __VERIFIER_assert(a == y * r + x * p) VAL [a=90, b=1, counter=13, p=1, q=0, r=-12, s=1, x=102, y=1] [L37] CALL __VERIFIER_assert(b == x * q + y * s) VAL [\old(cond)=1, counter=13] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=13] [L37] RET __VERIFIER_assert(b == x * q + y * s) VAL [a=90, b=1, counter=13, p=1, q=0, r=-12, s=1, x=102, y=1] [L39] COND FALSE !(!(a != b)) VAL [a=90, b=1, counter=13, p=1, q=0, r=-12, s=1, x=102, y=1] [L42] COND TRUE a > b [L43] a = a - b [L44] p = p - q [L45] r = r - s VAL [a=89, b=1, counter=13, p=1, q=0, r=-13, s=1, x=102, y=1] [L34] EXPR counter++ VAL [a=89, b=1, counter=14, p=1, q=0, r=-13, s=1, x=102, y=1] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(1 == p * s - r * q) VAL [\old(cond)=1, counter=14] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=14] [L35] RET __VERIFIER_assert(1 == p * s - r * q) VAL [a=89, b=1, counter=14, p=1, q=0, r=-13, s=1, x=102, y=1] [L36] CALL __VERIFIER_assert(a == y * r + x * p) VAL [\old(cond)=1, counter=14] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=14] [L36] RET __VERIFIER_assert(a == y * r + x * p) VAL [a=89, b=1, counter=14, p=1, q=0, r=-13, s=1, x=102, y=1] [L37] CALL __VERIFIER_assert(b == x * q + y * s) VAL [\old(cond)=1, counter=14] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=14] [L37] RET __VERIFIER_assert(b == x * q + y * s) VAL [a=89, b=1, counter=14, p=1, q=0, r=-13, s=1, x=102, y=1] [L39] COND FALSE !(!(a != b)) VAL [a=89, b=1, counter=14, p=1, q=0, r=-13, s=1, x=102, y=1] [L42] COND TRUE a > b [L43] a = a - b [L44] p = p - q [L45] r = r - s VAL [a=88, b=1, counter=14, p=1, q=0, r=-14, s=1, x=102, y=1] [L34] EXPR counter++ VAL [a=88, b=1, counter=15, p=1, q=0, r=-14, s=1, x=102, y=1] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(1 == p * s - r * q) VAL [\old(cond)=1, counter=15] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=15] [L35] RET __VERIFIER_assert(1 == p * s - r * q) VAL [a=88, b=1, counter=15, p=1, q=0, r=-14, s=1, x=102, y=1] [L36] CALL __VERIFIER_assert(a == y * r + x * p) VAL [\old(cond)=1, counter=15] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=15] [L36] RET __VERIFIER_assert(a == y * r + x * p) VAL [a=88, b=1, counter=15, p=1, q=0, r=-14, s=1, x=102, y=1] [L37] CALL __VERIFIER_assert(b == x * q + y * s) VAL [\old(cond)=1, counter=15] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=15] [L37] RET __VERIFIER_assert(b == x * q + y * s) VAL [a=88, b=1, counter=15, p=1, q=0, r=-14, s=1, x=102, y=1] [L39] COND FALSE !(!(a != b)) VAL [a=88, b=1, counter=15, p=1, q=0, r=-14, s=1, x=102, y=1] [L42] COND TRUE a > b [L43] a = a - b [L44] p = p - q [L45] r = r - s VAL [a=87, b=1, counter=15, p=1, q=0, r=-15, s=1, x=102, y=1] [L34] EXPR counter++ VAL [a=87, b=1, counter=16, p=1, q=0, r=-15, s=1, x=102, y=1] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(1 == p * s - r * q) VAL [\old(cond)=1, counter=16] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=16] [L35] RET __VERIFIER_assert(1 == p * s - r * q) VAL [a=87, b=1, counter=16, p=1, q=0, r=-15, s=1, x=102, y=1] [L36] CALL __VERIFIER_assert(a == y * r + x * p) VAL [\old(cond)=1, counter=16] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=16] [L36] RET __VERIFIER_assert(a == y * r + x * p) VAL [a=87, b=1, counter=16, p=1, q=0, r=-15, s=1, x=102, y=1] [L37] CALL __VERIFIER_assert(b == x * q + y * s) VAL [\old(cond)=1, counter=16] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=16] [L37] RET __VERIFIER_assert(b == x * q + y * s) VAL [a=87, b=1, counter=16, p=1, q=0, r=-15, s=1, x=102, y=1] [L39] COND FALSE !(!(a != b)) VAL [a=87, b=1, counter=16, p=1, q=0, r=-15, s=1, x=102, y=1] [L42] COND TRUE a > b [L43] a = a - b [L44] p = p - q [L45] r = r - s VAL [a=86, b=1, counter=16, p=1, q=0, r=-16, s=1, x=102, y=1] [L34] EXPR counter++ VAL [a=86, b=1, counter=17, p=1, q=0, r=-16, s=1, x=102, y=1] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(1 == p * s - r * q) VAL [\old(cond)=1, counter=17] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=17] [L35] RET __VERIFIER_assert(1 == p * s - r * q) VAL [a=86, b=1, counter=17, p=1, q=0, r=-16, s=1, x=102, y=1] [L36] CALL __VERIFIER_assert(a == y * r + x * p) VAL [\old(cond)=1, counter=17] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=17] [L36] RET __VERIFIER_assert(a == y * r + x * p) VAL [a=86, b=1, counter=17, p=1, q=0, r=-16, s=1, x=102, y=1] [L37] CALL __VERIFIER_assert(b == x * q + y * s) VAL [\old(cond)=1, counter=17] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=17] [L37] RET __VERIFIER_assert(b == x * q + y * s) VAL [a=86, b=1, counter=17, p=1, q=0, r=-16, s=1, x=102, y=1] [L39] COND FALSE !(!(a != b)) VAL [a=86, b=1, counter=17, p=1, q=0, r=-16, s=1, x=102, y=1] [L42] COND TRUE a > b [L43] a = a - b [L44] p = p - q [L45] r = r - s VAL [a=85, b=1, counter=17, p=1, q=0, r=-17, s=1, x=102, y=1] [L34] EXPR counter++ VAL [a=85, b=1, counter=18, p=1, q=0, r=-17, s=1, x=102, y=1] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(1 == p * s - r * q) VAL [\old(cond)=1, counter=18] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=18] [L35] RET __VERIFIER_assert(1 == p * s - r * q) VAL [a=85, b=1, counter=18, p=1, q=0, r=-17, s=1, x=102, y=1] [L36] CALL __VERIFIER_assert(a == y * r + x * p) VAL [\old(cond)=1, counter=18] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=18] [L36] RET __VERIFIER_assert(a == y * r + x * p) VAL [a=85, b=1, counter=18, p=1, q=0, r=-17, s=1, x=102, y=1] [L37] CALL __VERIFIER_assert(b == x * q + y * s) VAL [\old(cond)=1, counter=18] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=18] [L37] RET __VERIFIER_assert(b == x * q + y * s) VAL [a=85, b=1, counter=18, p=1, q=0, r=-17, s=1, x=102, y=1] [L39] COND FALSE !(!(a != b)) VAL [a=85, b=1, counter=18, p=1, q=0, r=-17, s=1, x=102, y=1] [L42] COND TRUE a > b [L43] a = a - b [L44] p = p - q [L45] r = r - s VAL [a=84, b=1, counter=18, p=1, q=0, r=-18, s=1, x=102, y=1] [L34] EXPR counter++ VAL [a=84, b=1, counter=19, p=1, q=0, r=-18, s=1, x=102, y=1] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(1 == p * s - r * q) VAL [\old(cond)=1, counter=19] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=19] [L35] RET __VERIFIER_assert(1 == p * s - r * q) VAL [a=84, b=1, counter=19, p=1, q=0, r=-18, s=1, x=102, y=1] [L36] CALL __VERIFIER_assert(a == y * r + x * p) VAL [\old(cond)=1, counter=19] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=19] [L36] RET __VERIFIER_assert(a == y * r + x * p) VAL [a=84, b=1, counter=19, p=1, q=0, r=-18, s=1, x=102, y=1] [L37] CALL __VERIFIER_assert(b == x * q + y * s) VAL [\old(cond)=1, counter=19] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=19] [L37] RET __VERIFIER_assert(b == x * q + y * s) VAL [a=84, b=1, counter=19, p=1, q=0, r=-18, s=1, x=102, y=1] [L39] COND FALSE !(!(a != b)) VAL [a=84, b=1, counter=19, p=1, q=0, r=-18, s=1, x=102, y=1] [L42] COND TRUE a > b [L43] a = a - b [L44] p = p - q [L45] r = r - s VAL [a=83, b=1, counter=19, p=1, q=0, r=-19, s=1, x=102, y=1] [L34] EXPR counter++ VAL [a=83, b=1, counter=20, p=1, q=0, r=-19, s=1, x=102, y=1] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(1 == p * s - r * q) VAL [\old(cond)=1, counter=20] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=20] [L35] RET __VERIFIER_assert(1 == p * s - r * q) VAL [a=83, b=1, counter=20, p=1, q=0, r=-19, s=1, x=102, y=1] [L36] CALL __VERIFIER_assert(a == y * r + x * p) VAL [\old(cond)=1, counter=20] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=20] [L36] RET __VERIFIER_assert(a == y * r + x * p) VAL [a=83, b=1, counter=20, p=1, q=0, r=-19, s=1, x=102, y=1] [L37] CALL __VERIFIER_assert(b == x * q + y * s) VAL [\old(cond)=1, counter=20] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=20] [L37] RET __VERIFIER_assert(b == x * q + y * s) VAL [a=83, b=1, counter=20, p=1, q=0, r=-19, s=1, x=102, y=1] [L39] COND FALSE !(!(a != b)) VAL [a=83, b=1, counter=20, p=1, q=0, r=-19, s=1, x=102, y=1] [L42] COND TRUE a > b [L43] a = a - b [L44] p = p - q [L45] r = r - s VAL [a=82, b=1, counter=20, p=1, q=0, r=-20, s=1, x=102, y=1] [L34] EXPR counter++ VAL [a=82, b=1, counter=21, p=1, q=0, r=-20, s=1, x=102, y=1] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(1 == p * s - r * q) VAL [\old(cond)=1, counter=21] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=21] [L35] RET __VERIFIER_assert(1 == p * s - r * q) VAL [a=82, b=1, counter=21, p=1, q=0, r=-20, s=1, x=102, y=1] [L36] CALL __VERIFIER_assert(a == y * r + x * p) VAL [\old(cond)=1, counter=21] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=21] [L36] RET __VERIFIER_assert(a == y * r + x * p) VAL [a=82, b=1, counter=21, p=1, q=0, r=-20, s=1, x=102, y=1] [L37] CALL __VERIFIER_assert(b == x * q + y * s) VAL [\old(cond)=1, counter=21] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=21] [L37] RET __VERIFIER_assert(b == x * q + y * s) VAL [a=82, b=1, counter=21, p=1, q=0, r=-20, s=1, x=102, y=1] [L39] COND FALSE !(!(a != b)) VAL [a=82, b=1, counter=21, p=1, q=0, r=-20, s=1, x=102, y=1] [L42] COND TRUE a > b [L43] a = a - b [L44] p = p - q [L45] r = r - s VAL [a=81, b=1, counter=21, p=1, q=0, r=-21, s=1, x=102, y=1] [L34] EXPR counter++ VAL [a=81, b=1, counter=22, p=1, q=0, r=-21, s=1, x=102, y=1] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(1 == p * s - r * q) VAL [\old(cond)=1, counter=22] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=22] [L35] RET __VERIFIER_assert(1 == p * s - r * q) VAL [a=81, b=1, counter=22, p=1, q=0, r=-21, s=1, x=102, y=1] [L36] CALL __VERIFIER_assert(a == y * r + x * p) VAL [\old(cond)=1, counter=22] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=22] [L36] RET __VERIFIER_assert(a == y * r + x * p) VAL [a=81, b=1, counter=22, p=1, q=0, r=-21, s=1, x=102, y=1] [L37] CALL __VERIFIER_assert(b == x * q + y * s) VAL [\old(cond)=1, counter=22] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=22] [L37] RET __VERIFIER_assert(b == x * q + y * s) VAL [a=81, b=1, counter=22, p=1, q=0, r=-21, s=1, x=102, y=1] [L39] COND FALSE !(!(a != b)) VAL [a=81, b=1, counter=22, p=1, q=0, r=-21, s=1, x=102, y=1] [L42] COND TRUE a > b [L43] a = a - b [L44] p = p - q [L45] r = r - s VAL [a=80, b=1, counter=22, p=1, q=0, r=-22, s=1, x=102, y=1] [L34] EXPR counter++ VAL [a=80, b=1, counter=23, p=1, q=0, r=-22, s=1, x=102, y=1] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(1 == p * s - r * q) VAL [\old(cond)=1, counter=23] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=23] [L35] RET __VERIFIER_assert(1 == p * s - r * q) VAL [a=80, b=1, counter=23, p=1, q=0, r=-22, s=1, x=102, y=1] [L36] CALL __VERIFIER_assert(a == y * r + x * p) VAL [\old(cond)=1, counter=23] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=23] [L36] RET __VERIFIER_assert(a == y * r + x * p) VAL [a=80, b=1, counter=23, p=1, q=0, r=-22, s=1, x=102, y=1] [L37] CALL __VERIFIER_assert(b == x * q + y * s) VAL [\old(cond)=1, counter=23] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=23] [L37] RET __VERIFIER_assert(b == x * q + y * s) VAL [a=80, b=1, counter=23, p=1, q=0, r=-22, s=1, x=102, y=1] [L39] COND FALSE !(!(a != b)) VAL [a=80, b=1, counter=23, p=1, q=0, r=-22, s=1, x=102, y=1] [L42] COND TRUE a > b [L43] a = a - b [L44] p = p - q [L45] r = r - s VAL [a=79, b=1, counter=23, p=1, q=0, r=-23, s=1, x=102, y=1] [L34] EXPR counter++ VAL [a=79, b=1, counter=24, p=1, q=0, r=-23, s=1, x=102, y=1] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(1 == p * s - r * q) VAL [\old(cond)=1, counter=24] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=24] [L35] RET __VERIFIER_assert(1 == p * s - r * q) VAL [a=79, b=1, counter=24, p=1, q=0, r=-23, s=1, x=102, y=1] [L36] CALL __VERIFIER_assert(a == y * r + x * p) VAL [\old(cond)=1, counter=24] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=24] [L36] RET __VERIFIER_assert(a == y * r + x * p) VAL [a=79, b=1, counter=24, p=1, q=0, r=-23, s=1, x=102, y=1] [L37] CALL __VERIFIER_assert(b == x * q + y * s) VAL [\old(cond)=1, counter=24] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=24] [L37] RET __VERIFIER_assert(b == x * q + y * s) VAL [a=79, b=1, counter=24, p=1, q=0, r=-23, s=1, x=102, y=1] [L39] COND FALSE !(!(a != b)) VAL [a=79, b=1, counter=24, p=1, q=0, r=-23, s=1, x=102, y=1] [L42] COND TRUE a > b [L43] a = a - b [L44] p = p - q [L45] r = r - s VAL [a=78, b=1, counter=24, p=1, q=0, r=-24, s=1, x=102, y=1] [L34] EXPR counter++ VAL [a=78, b=1, counter=25, p=1, q=0, r=-24, s=1, x=102, y=1] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(1 == p * s - r * q) VAL [\old(cond)=1, counter=25] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=25] [L35] RET __VERIFIER_assert(1 == p * s - r * q) VAL [a=78, b=1, counter=25, p=1, q=0, r=-24, s=1, x=102, y=1] [L36] CALL __VERIFIER_assert(a == y * r + x * p) VAL [\old(cond)=1, counter=25] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=25] [L36] RET __VERIFIER_assert(a == y * r + x * p) VAL [a=78, b=1, counter=25, p=1, q=0, r=-24, s=1, x=102, y=1] [L37] CALL __VERIFIER_assert(b == x * q + y * s) VAL [\old(cond)=1, counter=25] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=25] [L37] RET __VERIFIER_assert(b == x * q + y * s) VAL [a=78, b=1, counter=25, p=1, q=0, r=-24, s=1, x=102, y=1] [L39] COND FALSE !(!(a != b)) VAL [a=78, b=1, counter=25, p=1, q=0, r=-24, s=1, x=102, y=1] [L42] COND TRUE a > b [L43] a = a - b [L44] p = p - q [L45] r = r - s VAL [a=77, b=1, counter=25, p=1, q=0, r=-25, s=1, x=102, y=1] [L34] EXPR counter++ VAL [a=77, b=1, counter=26, p=1, q=0, r=-25, s=1, x=102, y=1] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(1 == p * s - r * q) VAL [\old(cond)=1, counter=26] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=26] [L35] RET __VERIFIER_assert(1 == p * s - r * q) VAL [a=77, b=1, counter=26, p=1, q=0, r=-25, s=1, x=102, y=1] [L36] CALL __VERIFIER_assert(a == y * r + x * p) VAL [\old(cond)=1, counter=26] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=26] [L36] RET __VERIFIER_assert(a == y * r + x * p) VAL [a=77, b=1, counter=26, p=1, q=0, r=-25, s=1, x=102, y=1] [L37] CALL __VERIFIER_assert(b == x * q + y * s) VAL [\old(cond)=1, counter=26] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=26] [L37] RET __VERIFIER_assert(b == x * q + y * s) VAL [a=77, b=1, counter=26, p=1, q=0, r=-25, s=1, x=102, y=1] [L39] COND FALSE !(!(a != b)) VAL [a=77, b=1, counter=26, p=1, q=0, r=-25, s=1, x=102, y=1] [L42] COND TRUE a > b [L43] a = a - b [L44] p = p - q [L45] r = r - s VAL [a=76, b=1, counter=26, p=1, q=0, r=-26, s=1, x=102, y=1] [L34] EXPR counter++ VAL [a=76, b=1, counter=27, p=1, q=0, r=-26, s=1, x=102, y=1] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(1 == p * s - r * q) VAL [\old(cond)=1, counter=27] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=27] [L35] RET __VERIFIER_assert(1 == p * s - r * q) VAL [a=76, b=1, counter=27, p=1, q=0, r=-26, s=1, x=102, y=1] [L36] CALL __VERIFIER_assert(a == y * r + x * p) VAL [\old(cond)=1, counter=27] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=27] [L36] RET __VERIFIER_assert(a == y * r + x * p) VAL [a=76, b=1, counter=27, p=1, q=0, r=-26, s=1, x=102, y=1] [L37] CALL __VERIFIER_assert(b == x * q + y * s) VAL [\old(cond)=1, counter=27] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=27] [L37] RET __VERIFIER_assert(b == x * q + y * s) VAL [a=76, b=1, counter=27, p=1, q=0, r=-26, s=1, x=102, y=1] [L39] COND FALSE !(!(a != b)) VAL [a=76, b=1, counter=27, p=1, q=0, r=-26, s=1, x=102, y=1] [L42] COND TRUE a > b [L43] a = a - b [L44] p = p - q [L45] r = r - s VAL [a=75, b=1, counter=27, p=1, q=0, r=-27, s=1, x=102, y=1] [L34] EXPR counter++ VAL [a=75, b=1, counter=28, p=1, q=0, r=-27, s=1, x=102, y=1] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(1 == p * s - r * q) VAL [\old(cond)=1, counter=28] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=28] [L35] RET __VERIFIER_assert(1 == p * s - r * q) VAL [a=75, b=1, counter=28, p=1, q=0, r=-27, s=1, x=102, y=1] [L36] CALL __VERIFIER_assert(a == y * r + x * p) VAL [\old(cond)=1, counter=28] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=28] [L36] RET __VERIFIER_assert(a == y * r + x * p) VAL [a=75, b=1, counter=28, p=1, q=0, r=-27, s=1, x=102, y=1] [L37] CALL __VERIFIER_assert(b == x * q + y * s) VAL [\old(cond)=1, counter=28] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=28] [L37] RET __VERIFIER_assert(b == x * q + y * s) VAL [a=75, b=1, counter=28, p=1, q=0, r=-27, s=1, x=102, y=1] [L39] COND FALSE !(!(a != b)) VAL [a=75, b=1, counter=28, p=1, q=0, r=-27, s=1, x=102, y=1] [L42] COND TRUE a > b [L43] a = a - b [L44] p = p - q [L45] r = r - s VAL [a=74, b=1, counter=28, p=1, q=0, r=-28, s=1, x=102, y=1] [L34] EXPR counter++ VAL [a=74, b=1, counter=29, p=1, q=0, r=-28, s=1, x=102, y=1] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(1 == p * s - r * q) VAL [\old(cond)=1, counter=29] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=29] [L35] RET __VERIFIER_assert(1 == p * s - r * q) VAL [a=74, b=1, counter=29, p=1, q=0, r=-28, s=1, x=102, y=1] [L36] CALL __VERIFIER_assert(a == y * r + x * p) VAL [\old(cond)=1, counter=29] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=29] [L36] RET __VERIFIER_assert(a == y * r + x * p) VAL [a=74, b=1, counter=29, p=1, q=0, r=-28, s=1, x=102, y=1] [L37] CALL __VERIFIER_assert(b == x * q + y * s) VAL [\old(cond)=1, counter=29] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=29] [L37] RET __VERIFIER_assert(b == x * q + y * s) VAL [a=74, b=1, counter=29, p=1, q=0, r=-28, s=1, x=102, y=1] [L39] COND FALSE !(!(a != b)) VAL [a=74, b=1, counter=29, p=1, q=0, r=-28, s=1, x=102, y=1] [L42] COND TRUE a > b [L43] a = a - b [L44] p = p - q [L45] r = r - s VAL [a=73, b=1, counter=29, p=1, q=0, r=-29, s=1, x=102, y=1] [L34] EXPR counter++ VAL [a=73, b=1, counter=30, p=1, q=0, r=-29, s=1, x=102, y=1] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(1 == p * s - r * q) VAL [\old(cond)=1, counter=30] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=30] [L35] RET __VERIFIER_assert(1 == p * s - r * q) VAL [a=73, b=1, counter=30, p=1, q=0, r=-29, s=1, x=102, y=1] [L36] CALL __VERIFIER_assert(a == y * r + x * p) VAL [\old(cond)=1, counter=30] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=30] [L36] RET __VERIFIER_assert(a == y * r + x * p) VAL [a=73, b=1, counter=30, p=1, q=0, r=-29, s=1, x=102, y=1] [L37] CALL __VERIFIER_assert(b == x * q + y * s) VAL [\old(cond)=1, counter=30] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=30] [L37] RET __VERIFIER_assert(b == x * q + y * s) VAL [a=73, b=1, counter=30, p=1, q=0, r=-29, s=1, x=102, y=1] [L39] COND FALSE !(!(a != b)) VAL [a=73, b=1, counter=30, p=1, q=0, r=-29, s=1, x=102, y=1] [L42] COND TRUE a > b [L43] a = a - b [L44] p = p - q [L45] r = r - s VAL [a=72, b=1, counter=30, p=1, q=0, r=-30, s=1, x=102, y=1] [L34] EXPR counter++ VAL [a=72, b=1, counter=31, p=1, q=0, r=-30, s=1, x=102, y=1] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(1 == p * s - r * q) VAL [\old(cond)=1, counter=31] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=31] [L35] RET __VERIFIER_assert(1 == p * s - r * q) VAL [a=72, b=1, counter=31, p=1, q=0, r=-30, s=1, x=102, y=1] [L36] CALL __VERIFIER_assert(a == y * r + x * p) VAL [\old(cond)=1, counter=31] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=31] [L36] RET __VERIFIER_assert(a == y * r + x * p) VAL [a=72, b=1, counter=31, p=1, q=0, r=-30, s=1, x=102, y=1] [L37] CALL __VERIFIER_assert(b == x * q + y * s) VAL [\old(cond)=1, counter=31] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=31] [L37] RET __VERIFIER_assert(b == x * q + y * s) VAL [a=72, b=1, counter=31, p=1, q=0, r=-30, s=1, x=102, y=1] [L39] COND FALSE !(!(a != b)) VAL [a=72, b=1, counter=31, p=1, q=0, r=-30, s=1, x=102, y=1] [L42] COND TRUE a > b [L43] a = a - b [L44] p = p - q [L45] r = r - s VAL [a=71, b=1, counter=31, p=1, q=0, r=-31, s=1, x=102, y=1] [L34] EXPR counter++ VAL [a=71, b=1, counter=32, p=1, q=0, r=-31, s=1, x=102, y=1] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(1 == p * s - r * q) VAL [\old(cond)=1, counter=32] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=32] [L35] RET __VERIFIER_assert(1 == p * s - r * q) VAL [a=71, b=1, counter=32, p=1, q=0, r=-31, s=1, x=102, y=1] [L36] CALL __VERIFIER_assert(a == y * r + x * p) VAL [\old(cond)=1, counter=32] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=32] [L36] RET __VERIFIER_assert(a == y * r + x * p) VAL [a=71, b=1, counter=32, p=1, q=0, r=-31, s=1, x=102, y=1] [L37] CALL __VERIFIER_assert(b == x * q + y * s) VAL [\old(cond)=1, counter=32] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=32] [L37] RET __VERIFIER_assert(b == x * q + y * s) VAL [a=71, b=1, counter=32, p=1, q=0, r=-31, s=1, x=102, y=1] [L39] COND FALSE !(!(a != b)) VAL [a=71, b=1, counter=32, p=1, q=0, r=-31, s=1, x=102, y=1] [L42] COND TRUE a > b [L43] a = a - b [L44] p = p - q [L45] r = r - s VAL [a=70, b=1, counter=32, p=1, q=0, r=-32, s=1, x=102, y=1] [L34] EXPR counter++ VAL [a=70, b=1, counter=33, p=1, q=0, r=-32, s=1, x=102, y=1] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(1 == p * s - r * q) VAL [\old(cond)=1, counter=33] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=33] [L35] RET __VERIFIER_assert(1 == p * s - r * q) VAL [a=70, b=1, counter=33, p=1, q=0, r=-32, s=1, x=102, y=1] [L36] CALL __VERIFIER_assert(a == y * r + x * p) VAL [\old(cond)=1, counter=33] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=33] [L36] RET __VERIFIER_assert(a == y * r + x * p) VAL [a=70, b=1, counter=33, p=1, q=0, r=-32, s=1, x=102, y=1] [L37] CALL __VERIFIER_assert(b == x * q + y * s) VAL [\old(cond)=1, counter=33] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=33] [L37] RET __VERIFIER_assert(b == x * q + y * s) VAL [a=70, b=1, counter=33, p=1, q=0, r=-32, s=1, x=102, y=1] [L39] COND FALSE !(!(a != b)) VAL [a=70, b=1, counter=33, p=1, q=0, r=-32, s=1, x=102, y=1] [L42] COND TRUE a > b [L43] a = a - b [L44] p = p - q [L45] r = r - s VAL [a=69, b=1, counter=33, p=1, q=0, r=-33, s=1, x=102, y=1] [L34] EXPR counter++ VAL [a=69, b=1, counter=34, p=1, q=0, r=-33, s=1, x=102, y=1] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(1 == p * s - r * q) VAL [\old(cond)=1, counter=34] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=34] [L35] RET __VERIFIER_assert(1 == p * s - r * q) VAL [a=69, b=1, counter=34, p=1, q=0, r=-33, s=1, x=102, y=1] [L36] CALL __VERIFIER_assert(a == y * r + x * p) VAL [\old(cond)=1, counter=34] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=34] [L36] RET __VERIFIER_assert(a == y * r + x * p) VAL [a=69, b=1, counter=34, p=1, q=0, r=-33, s=1, x=102, y=1] [L37] CALL __VERIFIER_assert(b == x * q + y * s) VAL [\old(cond)=1, counter=34] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=34] [L37] RET __VERIFIER_assert(b == x * q + y * s) VAL [a=69, b=1, counter=34, p=1, q=0, r=-33, s=1, x=102, y=1] [L39] COND FALSE !(!(a != b)) VAL [a=69, b=1, counter=34, p=1, q=0, r=-33, s=1, x=102, y=1] [L42] COND TRUE a > b [L43] a = a - b [L44] p = p - q [L45] r = r - s VAL [a=68, b=1, counter=34, p=1, q=0, r=-34, s=1, x=102, y=1] [L34] EXPR counter++ VAL [a=68, b=1, counter=35, p=1, q=0, r=-34, s=1, x=102, y=1] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(1 == p * s - r * q) VAL [\old(cond)=1, counter=35] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=35] [L35] RET __VERIFIER_assert(1 == p * s - r * q) VAL [a=68, b=1, counter=35, p=1, q=0, r=-34, s=1, x=102, y=1] [L36] CALL __VERIFIER_assert(a == y * r + x * p) VAL [\old(cond)=1, counter=35] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=35] [L36] RET __VERIFIER_assert(a == y * r + x * p) VAL [a=68, b=1, counter=35, p=1, q=0, r=-34, s=1, x=102, y=1] [L37] CALL __VERIFIER_assert(b == x * q + y * s) VAL [\old(cond)=1, counter=35] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=35] [L37] RET __VERIFIER_assert(b == x * q + y * s) VAL [a=68, b=1, counter=35, p=1, q=0, r=-34, s=1, x=102, y=1] [L39] COND FALSE !(!(a != b)) VAL [a=68, b=1, counter=35, p=1, q=0, r=-34, s=1, x=102, y=1] [L42] COND TRUE a > b [L43] a = a - b [L44] p = p - q [L45] r = r - s VAL [a=67, b=1, counter=35, p=1, q=0, r=-35, s=1, x=102, y=1] [L34] EXPR counter++ VAL [a=67, b=1, counter=36, p=1, q=0, r=-35, s=1, x=102, y=1] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(1 == p * s - r * q) VAL [\old(cond)=1, counter=36] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=36] [L35] RET __VERIFIER_assert(1 == p * s - r * q) VAL [a=67, b=1, counter=36, p=1, q=0, r=-35, s=1, x=102, y=1] [L36] CALL __VERIFIER_assert(a == y * r + x * p) VAL [\old(cond)=1, counter=36] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=36] [L36] RET __VERIFIER_assert(a == y * r + x * p) VAL [a=67, b=1, counter=36, p=1, q=0, r=-35, s=1, x=102, y=1] [L37] CALL __VERIFIER_assert(b == x * q + y * s) VAL [\old(cond)=1, counter=36] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=36] [L37] RET __VERIFIER_assert(b == x * q + y * s) VAL [a=67, b=1, counter=36, p=1, q=0, r=-35, s=1, x=102, y=1] [L39] COND FALSE !(!(a != b)) VAL [a=67, b=1, counter=36, p=1, q=0, r=-35, s=1, x=102, y=1] [L42] COND TRUE a > b [L43] a = a - b [L44] p = p - q [L45] r = r - s VAL [a=66, b=1, counter=36, p=1, q=0, r=-36, s=1, x=102, y=1] [L34] EXPR counter++ VAL [a=66, b=1, counter=37, p=1, q=0, r=-36, s=1, x=102, y=1] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(1 == p * s - r * q) VAL [\old(cond)=1, counter=37] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=37] [L35] RET __VERIFIER_assert(1 == p * s - r * q) VAL [a=66, b=1, counter=37, p=1, q=0, r=-36, s=1, x=102, y=1] [L36] CALL __VERIFIER_assert(a == y * r + x * p) VAL [\old(cond)=1, counter=37] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=37] [L36] RET __VERIFIER_assert(a == y * r + x * p) VAL [a=66, b=1, counter=37, p=1, q=0, r=-36, s=1, x=102, y=1] [L37] CALL __VERIFIER_assert(b == x * q + y * s) VAL [\old(cond)=1, counter=37] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=37] [L37] RET __VERIFIER_assert(b == x * q + y * s) VAL [a=66, b=1, counter=37, p=1, q=0, r=-36, s=1, x=102, y=1] [L39] COND FALSE !(!(a != b)) VAL [a=66, b=1, counter=37, p=1, q=0, r=-36, s=1, x=102, y=1] [L42] COND TRUE a > b [L43] a = a - b [L44] p = p - q [L45] r = r - s VAL [a=65, b=1, counter=37, p=1, q=0, r=-37, s=1, x=102, y=1] [L34] EXPR counter++ VAL [a=65, b=1, counter=38, p=1, q=0, r=-37, s=1, x=102, y=1] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(1 == p * s - r * q) VAL [\old(cond)=1, counter=38] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=38] [L35] RET __VERIFIER_assert(1 == p * s - r * q) VAL [a=65, b=1, counter=38, p=1, q=0, r=-37, s=1, x=102, y=1] [L36] CALL __VERIFIER_assert(a == y * r + x * p) VAL [\old(cond)=1, counter=38] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=38] [L36] RET __VERIFIER_assert(a == y * r + x * p) VAL [a=65, b=1, counter=38, p=1, q=0, r=-37, s=1, x=102, y=1] [L37] CALL __VERIFIER_assert(b == x * q + y * s) VAL [\old(cond)=1, counter=38] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=38] [L37] RET __VERIFIER_assert(b == x * q + y * s) VAL [a=65, b=1, counter=38, p=1, q=0, r=-37, s=1, x=102, y=1] [L39] COND FALSE !(!(a != b)) VAL [a=65, b=1, counter=38, p=1, q=0, r=-37, s=1, x=102, y=1] [L42] COND TRUE a > b [L43] a = a - b [L44] p = p - q [L45] r = r - s VAL [a=64, b=1, counter=38, p=1, q=0, r=-38, s=1, x=102, y=1] [L34] EXPR counter++ VAL [a=64, b=1, counter=39, p=1, q=0, r=-38, s=1, x=102, y=1] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(1 == p * s - r * q) VAL [\old(cond)=1, counter=39] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=39] [L35] RET __VERIFIER_assert(1 == p * s - r * q) VAL [a=64, b=1, counter=39, p=1, q=0, r=-38, s=1, x=102, y=1] [L36] CALL __VERIFIER_assert(a == y * r + x * p) VAL [\old(cond)=1, counter=39] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=39] [L36] RET __VERIFIER_assert(a == y * r + x * p) VAL [a=64, b=1, counter=39, p=1, q=0, r=-38, s=1, x=102, y=1] [L37] CALL __VERIFIER_assert(b == x * q + y * s) VAL [\old(cond)=1, counter=39] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=39] [L37] RET __VERIFIER_assert(b == x * q + y * s) VAL [a=64, b=1, counter=39, p=1, q=0, r=-38, s=1, x=102, y=1] [L39] COND FALSE !(!(a != b)) VAL [a=64, b=1, counter=39, p=1, q=0, r=-38, s=1, x=102, y=1] [L42] COND TRUE a > b [L43] a = a - b [L44] p = p - q [L45] r = r - s VAL [a=63, b=1, counter=39, p=1, q=0, r=-39, s=1, x=102, y=1] [L34] EXPR counter++ VAL [a=63, b=1, counter=40, p=1, q=0, r=-39, s=1, x=102, y=1] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(1 == p * s - r * q) VAL [\old(cond)=1, counter=40] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=40] [L35] RET __VERIFIER_assert(1 == p * s - r * q) VAL [a=63, b=1, counter=40, p=1, q=0, r=-39, s=1, x=102, y=1] [L36] CALL __VERIFIER_assert(a == y * r + x * p) VAL [\old(cond)=1, counter=40] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=40] [L36] RET __VERIFIER_assert(a == y * r + x * p) VAL [a=63, b=1, counter=40, p=1, q=0, r=-39, s=1, x=102, y=1] [L37] CALL __VERIFIER_assert(b == x * q + y * s) VAL [\old(cond)=1, counter=40] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=40] [L37] RET __VERIFIER_assert(b == x * q + y * s) VAL [a=63, b=1, counter=40, p=1, q=0, r=-39, s=1, x=102, y=1] [L39] COND FALSE !(!(a != b)) VAL [a=63, b=1, counter=40, p=1, q=0, r=-39, s=1, x=102, y=1] [L42] COND TRUE a > b [L43] a = a - b [L44] p = p - q [L45] r = r - s VAL [a=62, b=1, counter=40, p=1, q=0, r=-40, s=1, x=102, y=1] [L34] EXPR counter++ VAL [a=62, b=1, counter=41, p=1, q=0, r=-40, s=1, x=102, y=1] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(1 == p * s - r * q) VAL [\old(cond)=1, counter=41] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=41] [L35] RET __VERIFIER_assert(1 == p * s - r * q) VAL [a=62, b=1, counter=41, p=1, q=0, r=-40, s=1, x=102, y=1] [L36] CALL __VERIFIER_assert(a == y * r + x * p) VAL [\old(cond)=1, counter=41] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=41] [L36] RET __VERIFIER_assert(a == y * r + x * p) VAL [a=62, b=1, counter=41, p=1, q=0, r=-40, s=1, x=102, y=1] [L37] CALL __VERIFIER_assert(b == x * q + y * s) VAL [\old(cond)=1, counter=41] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=41] [L37] RET __VERIFIER_assert(b == x * q + y * s) VAL [a=62, b=1, counter=41, p=1, q=0, r=-40, s=1, x=102, y=1] [L39] COND FALSE !(!(a != b)) VAL [a=62, b=1, counter=41, p=1, q=0, r=-40, s=1, x=102, y=1] [L42] COND TRUE a > b [L43] a = a - b [L44] p = p - q [L45] r = r - s VAL [a=61, b=1, counter=41, p=1, q=0, r=-41, s=1, x=102, y=1] [L34] EXPR counter++ VAL [a=61, b=1, counter=42, p=1, q=0, r=-41, s=1, x=102, y=1] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(1 == p * s - r * q) VAL [\old(cond)=1, counter=42] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=42] [L35] RET __VERIFIER_assert(1 == p * s - r * q) VAL [a=61, b=1, counter=42, p=1, q=0, r=-41, s=1, x=102, y=1] [L36] CALL __VERIFIER_assert(a == y * r + x * p) VAL [\old(cond)=1, counter=42] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=42] [L36] RET __VERIFIER_assert(a == y * r + x * p) VAL [a=61, b=1, counter=42, p=1, q=0, r=-41, s=1, x=102, y=1] [L37] CALL __VERIFIER_assert(b == x * q + y * s) VAL [\old(cond)=1, counter=42] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=42] [L37] RET __VERIFIER_assert(b == x * q + y * s) VAL [a=61, b=1, counter=42, p=1, q=0, r=-41, s=1, x=102, y=1] [L39] COND FALSE !(!(a != b)) VAL [a=61, b=1, counter=42, p=1, q=0, r=-41, s=1, x=102, y=1] [L42] COND TRUE a > b [L43] a = a - b [L44] p = p - q [L45] r = r - s VAL [a=60, b=1, counter=42, p=1, q=0, r=-42, s=1, x=102, y=1] [L34] EXPR counter++ VAL [a=60, b=1, counter=43, p=1, q=0, r=-42, s=1, x=102, y=1] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(1 == p * s - r * q) VAL [\old(cond)=1, counter=43] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=43] [L35] RET __VERIFIER_assert(1 == p * s - r * q) VAL [a=60, b=1, counter=43, p=1, q=0, r=-42, s=1, x=102, y=1] [L36] CALL __VERIFIER_assert(a == y * r + x * p) VAL [\old(cond)=1, counter=43] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=43] [L36] RET __VERIFIER_assert(a == y * r + x * p) VAL [a=60, b=1, counter=43, p=1, q=0, r=-42, s=1, x=102, y=1] [L37] CALL __VERIFIER_assert(b == x * q + y * s) VAL [\old(cond)=1, counter=43] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=43] [L37] RET __VERIFIER_assert(b == x * q + y * s) VAL [a=60, b=1, counter=43, p=1, q=0, r=-42, s=1, x=102, y=1] [L39] COND FALSE !(!(a != b)) VAL [a=60, b=1, counter=43, p=1, q=0, r=-42, s=1, x=102, y=1] [L42] COND TRUE a > b [L43] a = a - b [L44] p = p - q [L45] r = r - s VAL [a=59, b=1, counter=43, p=1, q=0, r=-43, s=1, x=102, y=1] [L34] EXPR counter++ VAL [a=59, b=1, counter=44, p=1, q=0, r=-43, s=1, x=102, y=1] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(1 == p * s - r * q) VAL [\old(cond)=1, counter=44] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=44] [L35] RET __VERIFIER_assert(1 == p * s - r * q) VAL [a=59, b=1, counter=44, p=1, q=0, r=-43, s=1, x=102, y=1] [L36] CALL __VERIFIER_assert(a == y * r + x * p) VAL [\old(cond)=1, counter=44] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=44] [L36] RET __VERIFIER_assert(a == y * r + x * p) VAL [a=59, b=1, counter=44, p=1, q=0, r=-43, s=1, x=102, y=1] [L37] CALL __VERIFIER_assert(b == x * q + y * s) VAL [\old(cond)=1, counter=44] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=44] [L37] RET __VERIFIER_assert(b == x * q + y * s) VAL [a=59, b=1, counter=44, p=1, q=0, r=-43, s=1, x=102, y=1] [L39] COND FALSE !(!(a != b)) VAL [a=59, b=1, counter=44, p=1, q=0, r=-43, s=1, x=102, y=1] [L42] COND TRUE a > b [L43] a = a - b [L44] p = p - q [L45] r = r - s VAL [a=58, b=1, counter=44, p=1, q=0, r=-44, s=1, x=102, y=1] [L34] EXPR counter++ VAL [a=58, b=1, counter=45, p=1, q=0, r=-44, s=1, x=102, y=1] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(1 == p * s - r * q) VAL [\old(cond)=1, counter=45] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=45] [L35] RET __VERIFIER_assert(1 == p * s - r * q) VAL [a=58, b=1, counter=45, p=1, q=0, r=-44, s=1, x=102, y=1] [L36] CALL __VERIFIER_assert(a == y * r + x * p) VAL [\old(cond)=1, counter=45] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=45] [L36] RET __VERIFIER_assert(a == y * r + x * p) VAL [a=58, b=1, counter=45, p=1, q=0, r=-44, s=1, x=102, y=1] [L37] CALL __VERIFIER_assert(b == x * q + y * s) VAL [\old(cond)=1, counter=45] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=45] [L37] RET __VERIFIER_assert(b == x * q + y * s) VAL [a=58, b=1, counter=45, p=1, q=0, r=-44, s=1, x=102, y=1] [L39] COND FALSE !(!(a != b)) VAL [a=58, b=1, counter=45, p=1, q=0, r=-44, s=1, x=102, y=1] [L42] COND TRUE a > b [L43] a = a - b [L44] p = p - q [L45] r = r - s VAL [a=57, b=1, counter=45, p=1, q=0, r=-45, s=1, x=102, y=1] [L34] EXPR counter++ VAL [a=57, b=1, counter=46, p=1, q=0, r=-45, s=1, x=102, y=1] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(1 == p * s - r * q) VAL [\old(cond)=1, counter=46] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=46] [L35] RET __VERIFIER_assert(1 == p * s - r * q) VAL [a=57, b=1, counter=46, p=1, q=0, r=-45, s=1, x=102, y=1] [L36] CALL __VERIFIER_assert(a == y * r + x * p) VAL [\old(cond)=1, counter=46] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=46] [L36] RET __VERIFIER_assert(a == y * r + x * p) VAL [a=57, b=1, counter=46, p=1, q=0, r=-45, s=1, x=102, y=1] [L37] CALL __VERIFIER_assert(b == x * q + y * s) VAL [\old(cond)=1, counter=46] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=46] [L37] RET __VERIFIER_assert(b == x * q + y * s) VAL [a=57, b=1, counter=46, p=1, q=0, r=-45, s=1, x=102, y=1] [L39] COND FALSE !(!(a != b)) VAL [a=57, b=1, counter=46, p=1, q=0, r=-45, s=1, x=102, y=1] [L42] COND TRUE a > b [L43] a = a - b [L44] p = p - q [L45] r = r - s VAL [a=56, b=1, counter=46, p=1, q=0, r=-46, s=1, x=102, y=1] [L34] EXPR counter++ VAL [a=56, b=1, counter=47, p=1, q=0, r=-46, s=1, x=102, y=1] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(1 == p * s - r * q) VAL [\old(cond)=1, counter=47] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=47] [L35] RET __VERIFIER_assert(1 == p * s - r * q) VAL [a=56, b=1, counter=47, p=1, q=0, r=-46, s=1, x=102, y=1] [L36] CALL __VERIFIER_assert(a == y * r + x * p) VAL [\old(cond)=1, counter=47] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=47] [L36] RET __VERIFIER_assert(a == y * r + x * p) VAL [a=56, b=1, counter=47, p=1, q=0, r=-46, s=1, x=102, y=1] [L37] CALL __VERIFIER_assert(b == x * q + y * s) VAL [\old(cond)=1, counter=47] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=47] [L37] RET __VERIFIER_assert(b == x * q + y * s) VAL [a=56, b=1, counter=47, p=1, q=0, r=-46, s=1, x=102, y=1] [L39] COND FALSE !(!(a != b)) VAL [a=56, b=1, counter=47, p=1, q=0, r=-46, s=1, x=102, y=1] [L42] COND TRUE a > b [L43] a = a - b [L44] p = p - q [L45] r = r - s VAL [a=55, b=1, counter=47, p=1, q=0, r=-47, s=1, x=102, y=1] [L34] EXPR counter++ VAL [a=55, b=1, counter=48, p=1, q=0, r=-47, s=1, x=102, y=1] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(1 == p * s - r * q) VAL [\old(cond)=1, counter=48] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=48] [L35] RET __VERIFIER_assert(1 == p * s - r * q) VAL [a=55, b=1, counter=48, p=1, q=0, r=-47, s=1, x=102, y=1] [L36] CALL __VERIFIER_assert(a == y * r + x * p) VAL [\old(cond)=1, counter=48] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=48] [L36] RET __VERIFIER_assert(a == y * r + x * p) VAL [a=55, b=1, counter=48, p=1, q=0, r=-47, s=1, x=102, y=1] [L37] CALL __VERIFIER_assert(b == x * q + y * s) VAL [\old(cond)=1, counter=48] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=48] [L37] RET __VERIFIER_assert(b == x * q + y * s) VAL [a=55, b=1, counter=48, p=1, q=0, r=-47, s=1, x=102, y=1] [L39] COND FALSE !(!(a != b)) VAL [a=55, b=1, counter=48, p=1, q=0, r=-47, s=1, x=102, y=1] [L42] COND TRUE a > b [L43] a = a - b [L44] p = p - q [L45] r = r - s VAL [a=54, b=1, counter=48, p=1, q=0, r=-48, s=1, x=102, y=1] [L34] EXPR counter++ VAL [a=54, b=1, counter=49, p=1, q=0, r=-48, s=1, x=102, y=1] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(1 == p * s - r * q) VAL [\old(cond)=1, counter=49] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=49] [L35] RET __VERIFIER_assert(1 == p * s - r * q) VAL [a=54, b=1, counter=49, p=1, q=0, r=-48, s=1, x=102, y=1] [L36] CALL __VERIFIER_assert(a == y * r + x * p) VAL [\old(cond)=1, counter=49] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=49] [L36] RET __VERIFIER_assert(a == y * r + x * p) VAL [a=54, b=1, counter=49, p=1, q=0, r=-48, s=1, x=102, y=1] [L37] CALL __VERIFIER_assert(b == x * q + y * s) VAL [\old(cond)=1, counter=49] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=49] [L37] RET __VERIFIER_assert(b == x * q + y * s) VAL [a=54, b=1, counter=49, p=1, q=0, r=-48, s=1, x=102, y=1] [L39] COND FALSE !(!(a != b)) VAL [a=54, b=1, counter=49, p=1, q=0, r=-48, s=1, x=102, y=1] [L42] COND TRUE a > b [L43] a = a - b [L44] p = p - q [L45] r = r - s VAL [a=53, b=1, counter=49, p=1, q=0, r=-49, s=1, x=102, y=1] [L34] EXPR counter++ VAL [a=53, b=1, counter=50, p=1, q=0, r=-49, s=1, x=102, y=1] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(1 == p * s - r * q) VAL [\old(cond)=1, counter=50] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=50] [L35] RET __VERIFIER_assert(1 == p * s - r * q) VAL [a=53, b=1, counter=50, p=1, q=0, r=-49, s=1, x=102, y=1] [L36] CALL __VERIFIER_assert(a == y * r + x * p) VAL [\old(cond)=1, counter=50] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=50] [L36] RET __VERIFIER_assert(a == y * r + x * p) VAL [a=53, b=1, counter=50, p=1, q=0, r=-49, s=1, x=102, y=1] [L37] CALL __VERIFIER_assert(b == x * q + y * s) VAL [\old(cond)=1, counter=50] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=50] [L37] RET __VERIFIER_assert(b == x * q + y * s) VAL [a=53, b=1, counter=50, p=1, q=0, r=-49, s=1, x=102, y=1] [L39] COND FALSE !(!(a != b)) VAL [a=53, b=1, counter=50, p=1, q=0, r=-49, s=1, x=102, y=1] [L42] COND TRUE a > b [L43] a = a - b [L44] p = p - q [L45] r = r - s VAL [a=52, b=1, counter=50, p=1, q=0, r=-50, s=1, x=102, y=1] [L34] EXPR counter++ VAL [a=52, b=1, counter=51, p=1, q=0, r=-50, s=1, x=102, y=1] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(1 == p * s - r * q) VAL [\old(cond)=1, counter=51] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=51] [L35] RET __VERIFIER_assert(1 == p * s - r * q) VAL [a=52, b=1, counter=51, p=1, q=0, r=-50, s=1, x=102, y=1] [L36] CALL __VERIFIER_assert(a == y * r + x * p) VAL [\old(cond)=1, counter=51] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=51] [L36] RET __VERIFIER_assert(a == y * r + x * p) VAL [a=52, b=1, counter=51, p=1, q=0, r=-50, s=1, x=102, y=1] [L37] CALL __VERIFIER_assert(b == x * q + y * s) VAL [\old(cond)=1, counter=51] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=51] [L37] RET __VERIFIER_assert(b == x * q + y * s) VAL [a=52, b=1, counter=51, p=1, q=0, r=-50, s=1, x=102, y=1] [L39] COND FALSE !(!(a != b)) VAL [a=52, b=1, counter=51, p=1, q=0, r=-50, s=1, x=102, y=1] [L42] COND TRUE a > b [L43] a = a - b [L44] p = p - q [L45] r = r - s VAL [a=51, b=1, counter=51, p=1, q=0, r=-51, s=1, x=102, y=1] [L34] EXPR counter++ VAL [a=51, b=1, counter=52, p=1, q=0, r=-51, s=1, x=102, y=1] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(1 == p * s - r * q) VAL [\old(cond)=1, counter=52] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=52] [L35] RET __VERIFIER_assert(1 == p * s - r * q) VAL [a=51, b=1, counter=52, p=1, q=0, r=-51, s=1, x=102, y=1] [L36] CALL __VERIFIER_assert(a == y * r + x * p) VAL [\old(cond)=1, counter=52] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=52] [L36] RET __VERIFIER_assert(a == y * r + x * p) VAL [a=51, b=1, counter=52, p=1, q=0, r=-51, s=1, x=102, y=1] [L37] CALL __VERIFIER_assert(b == x * q + y * s) VAL [\old(cond)=1, counter=52] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=52] [L37] RET __VERIFIER_assert(b == x * q + y * s) VAL [a=51, b=1, counter=52, p=1, q=0, r=-51, s=1, x=102, y=1] [L39] COND FALSE !(!(a != b)) VAL [a=51, b=1, counter=52, p=1, q=0, r=-51, s=1, x=102, y=1] [L42] COND TRUE a > b [L43] a = a - b [L44] p = p - q [L45] r = r - s VAL [a=50, b=1, counter=52, p=1, q=0, r=-52, s=1, x=102, y=1] [L34] EXPR counter++ VAL [a=50, b=1, counter=53, p=1, q=0, r=-52, s=1, x=102, y=1] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(1 == p * s - r * q) VAL [\old(cond)=1, counter=53] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=53] [L35] RET __VERIFIER_assert(1 == p * s - r * q) VAL [a=50, b=1, counter=53, p=1, q=0, r=-52, s=1, x=102, y=1] [L36] CALL __VERIFIER_assert(a == y * r + x * p) VAL [\old(cond)=1, counter=53] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=53] [L36] RET __VERIFIER_assert(a == y * r + x * p) VAL [a=50, b=1, counter=53, p=1, q=0, r=-52, s=1, x=102, y=1] [L37] CALL __VERIFIER_assert(b == x * q + y * s) VAL [\old(cond)=1, counter=53] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=53] [L37] RET __VERIFIER_assert(b == x * q + y * s) VAL [a=50, b=1, counter=53, p=1, q=0, r=-52, s=1, x=102, y=1] [L39] COND FALSE !(!(a != b)) VAL [a=50, b=1, counter=53, p=1, q=0, r=-52, s=1, x=102, y=1] [L42] COND TRUE a > b [L43] a = a - b [L44] p = p - q [L45] r = r - s VAL [a=49, b=1, counter=53, p=1, q=0, r=-53, s=1, x=102, y=1] [L34] EXPR counter++ VAL [a=49, b=1, counter=54, p=1, q=0, r=-53, s=1, x=102, y=1] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(1 == p * s - r * q) VAL [\old(cond)=1, counter=54] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=54] [L35] RET __VERIFIER_assert(1 == p * s - r * q) VAL [a=49, b=1, counter=54, p=1, q=0, r=-53, s=1, x=102, y=1] [L36] CALL __VERIFIER_assert(a == y * r + x * p) VAL [\old(cond)=1, counter=54] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=54] [L36] RET __VERIFIER_assert(a == y * r + x * p) VAL [a=49, b=1, counter=54, p=1, q=0, r=-53, s=1, x=102, y=1] [L37] CALL __VERIFIER_assert(b == x * q + y * s) VAL [\old(cond)=1, counter=54] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=54] [L37] RET __VERIFIER_assert(b == x * q + y * s) VAL [a=49, b=1, counter=54, p=1, q=0, r=-53, s=1, x=102, y=1] [L39] COND FALSE !(!(a != b)) VAL [a=49, b=1, counter=54, p=1, q=0, r=-53, s=1, x=102, y=1] [L42] COND TRUE a > b [L43] a = a - b [L44] p = p - q [L45] r = r - s VAL [a=48, b=1, counter=54, p=1, q=0, r=-54, s=1, x=102, y=1] [L34] EXPR counter++ VAL [a=48, b=1, counter=55, p=1, q=0, r=-54, s=1, x=102, y=1] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(1 == p * s - r * q) VAL [\old(cond)=1, counter=55] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=55] [L35] RET __VERIFIER_assert(1 == p * s - r * q) VAL [a=48, b=1, counter=55, p=1, q=0, r=-54, s=1, x=102, y=1] [L36] CALL __VERIFIER_assert(a == y * r + x * p) VAL [\old(cond)=1, counter=55] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=55] [L36] RET __VERIFIER_assert(a == y * r + x * p) VAL [a=48, b=1, counter=55, p=1, q=0, r=-54, s=1, x=102, y=1] [L37] CALL __VERIFIER_assert(b == x * q + y * s) VAL [\old(cond)=1, counter=55] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=55] [L37] RET __VERIFIER_assert(b == x * q + y * s) VAL [a=48, b=1, counter=55, p=1, q=0, r=-54, s=1, x=102, y=1] [L39] COND FALSE !(!(a != b)) VAL [a=48, b=1, counter=55, p=1, q=0, r=-54, s=1, x=102, y=1] [L42] COND TRUE a > b [L43] a = a - b [L44] p = p - q [L45] r = r - s VAL [a=47, b=1, counter=55, p=1, q=0, r=-55, s=1, x=102, y=1] [L34] EXPR counter++ VAL [a=47, b=1, counter=56, p=1, q=0, r=-55, s=1, x=102, y=1] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(1 == p * s - r * q) VAL [\old(cond)=1, counter=56] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=56] [L35] RET __VERIFIER_assert(1 == p * s - r * q) VAL [a=47, b=1, counter=56, p=1, q=0, r=-55, s=1, x=102, y=1] [L36] CALL __VERIFIER_assert(a == y * r + x * p) VAL [\old(cond)=1, counter=56] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=56] [L36] RET __VERIFIER_assert(a == y * r + x * p) VAL [a=47, b=1, counter=56, p=1, q=0, r=-55, s=1, x=102, y=1] [L37] CALL __VERIFIER_assert(b == x * q + y * s) VAL [\old(cond)=1, counter=56] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=56] [L37] RET __VERIFIER_assert(b == x * q + y * s) VAL [a=47, b=1, counter=56, p=1, q=0, r=-55, s=1, x=102, y=1] [L39] COND FALSE !(!(a != b)) VAL [a=47, b=1, counter=56, p=1, q=0, r=-55, s=1, x=102, y=1] [L42] COND TRUE a > b [L43] a = a - b [L44] p = p - q [L45] r = r - s VAL [a=46, b=1, counter=56, p=1, q=0, r=-56, s=1, x=102, y=1] [L34] EXPR counter++ VAL [a=46, b=1, counter=57, p=1, q=0, r=-56, s=1, x=102, y=1] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(1 == p * s - r * q) VAL [\old(cond)=1, counter=57] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=57] [L35] RET __VERIFIER_assert(1 == p * s - r * q) VAL [a=46, b=1, counter=57, p=1, q=0, r=-56, s=1, x=102, y=1] [L36] CALL __VERIFIER_assert(a == y * r + x * p) VAL [\old(cond)=1, counter=57] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=57] [L36] RET __VERIFIER_assert(a == y * r + x * p) VAL [a=46, b=1, counter=57, p=1, q=0, r=-56, s=1, x=102, y=1] [L37] CALL __VERIFIER_assert(b == x * q + y * s) VAL [\old(cond)=1, counter=57] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=57] [L37] RET __VERIFIER_assert(b == x * q + y * s) VAL [a=46, b=1, counter=57, p=1, q=0, r=-56, s=1, x=102, y=1] [L39] COND FALSE !(!(a != b)) VAL [a=46, b=1, counter=57, p=1, q=0, r=-56, s=1, x=102, y=1] [L42] COND TRUE a > b [L43] a = a - b [L44] p = p - q [L45] r = r - s VAL [a=45, b=1, counter=57, p=1, q=0, r=-57, s=1, x=102, y=1] [L34] EXPR counter++ VAL [a=45, b=1, counter=58, p=1, q=0, r=-57, s=1, x=102, y=1] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(1 == p * s - r * q) VAL [\old(cond)=1, counter=58] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=58] [L35] RET __VERIFIER_assert(1 == p * s - r * q) VAL [a=45, b=1, counter=58, p=1, q=0, r=-57, s=1, x=102, y=1] [L36] CALL __VERIFIER_assert(a == y * r + x * p) VAL [\old(cond)=1, counter=58] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=58] [L36] RET __VERIFIER_assert(a == y * r + x * p) VAL [a=45, b=1, counter=58, p=1, q=0, r=-57, s=1, x=102, y=1] [L37] CALL __VERIFIER_assert(b == x * q + y * s) VAL [\old(cond)=1, counter=58] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=58] [L37] RET __VERIFIER_assert(b == x * q + y * s) VAL [a=45, b=1, counter=58, p=1, q=0, r=-57, s=1, x=102, y=1] [L39] COND FALSE !(!(a != b)) VAL [a=45, b=1, counter=58, p=1, q=0, r=-57, s=1, x=102, y=1] [L42] COND TRUE a > b [L43] a = a - b [L44] p = p - q [L45] r = r - s VAL [a=44, b=1, counter=58, p=1, q=0, r=-58, s=1, x=102, y=1] [L34] EXPR counter++ VAL [a=44, b=1, counter=59, p=1, q=0, r=-58, s=1, x=102, y=1] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(1 == p * s - r * q) VAL [\old(cond)=1, counter=59] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=59] [L35] RET __VERIFIER_assert(1 == p * s - r * q) VAL [a=44, b=1, counter=59, p=1, q=0, r=-58, s=1, x=102, y=1] [L36] CALL __VERIFIER_assert(a == y * r + x * p) VAL [\old(cond)=1, counter=59] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=59] [L36] RET __VERIFIER_assert(a == y * r + x * p) VAL [a=44, b=1, counter=59, p=1, q=0, r=-58, s=1, x=102, y=1] [L37] CALL __VERIFIER_assert(b == x * q + y * s) VAL [\old(cond)=1, counter=59] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=59] [L37] RET __VERIFIER_assert(b == x * q + y * s) VAL [a=44, b=1, counter=59, p=1, q=0, r=-58, s=1, x=102, y=1] [L39] COND FALSE !(!(a != b)) VAL [a=44, b=1, counter=59, p=1, q=0, r=-58, s=1, x=102, y=1] [L42] COND TRUE a > b [L43] a = a - b [L44] p = p - q [L45] r = r - s VAL [a=43, b=1, counter=59, p=1, q=0, r=-59, s=1, x=102, y=1] [L34] EXPR counter++ VAL [a=43, b=1, counter=60, p=1, q=0, r=-59, s=1, x=102, y=1] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(1 == p * s - r * q) VAL [\old(cond)=1, counter=60] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=60] [L35] RET __VERIFIER_assert(1 == p * s - r * q) VAL [a=43, b=1, counter=60, p=1, q=0, r=-59, s=1, x=102, y=1] [L36] CALL __VERIFIER_assert(a == y * r + x * p) VAL [\old(cond)=1, counter=60] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=60] [L36] RET __VERIFIER_assert(a == y * r + x * p) VAL [a=43, b=1, counter=60, p=1, q=0, r=-59, s=1, x=102, y=1] [L37] CALL __VERIFIER_assert(b == x * q + y * s) VAL [\old(cond)=1, counter=60] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=60] [L37] RET __VERIFIER_assert(b == x * q + y * s) VAL [a=43, b=1, counter=60, p=1, q=0, r=-59, s=1, x=102, y=1] [L39] COND FALSE !(!(a != b)) VAL [a=43, b=1, counter=60, p=1, q=0, r=-59, s=1, x=102, y=1] [L42] COND TRUE a > b [L43] a = a - b [L44] p = p - q [L45] r = r - s VAL [a=42, b=1, counter=60, p=1, q=0, r=-60, s=1, x=102, y=1] [L34] EXPR counter++ VAL [a=42, b=1, counter=61, p=1, q=0, r=-60, s=1, x=102, y=1] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(1 == p * s - r * q) VAL [\old(cond)=1, counter=61] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=61] [L35] RET __VERIFIER_assert(1 == p * s - r * q) VAL [a=42, b=1, counter=61, p=1, q=0, r=-60, s=1, x=102, y=1] [L36] CALL __VERIFIER_assert(a == y * r + x * p) VAL [\old(cond)=1, counter=61] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=61] [L36] RET __VERIFIER_assert(a == y * r + x * p) VAL [a=42, b=1, counter=61, p=1, q=0, r=-60, s=1, x=102, y=1] [L37] CALL __VERIFIER_assert(b == x * q + y * s) VAL [\old(cond)=1, counter=61] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=61] [L37] RET __VERIFIER_assert(b == x * q + y * s) VAL [a=42, b=1, counter=61, p=1, q=0, r=-60, s=1, x=102, y=1] [L39] COND FALSE !(!(a != b)) VAL [a=42, b=1, counter=61, p=1, q=0, r=-60, s=1, x=102, y=1] [L42] COND TRUE a > b [L43] a = a - b [L44] p = p - q [L45] r = r - s VAL [a=41, b=1, counter=61, p=1, q=0, r=-61, s=1, x=102, y=1] [L34] EXPR counter++ VAL [a=41, b=1, counter=62, p=1, q=0, r=-61, s=1, x=102, y=1] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(1 == p * s - r * q) VAL [\old(cond)=1, counter=62] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=62] [L35] RET __VERIFIER_assert(1 == p * s - r * q) VAL [a=41, b=1, counter=62, p=1, q=0, r=-61, s=1, x=102, y=1] [L36] CALL __VERIFIER_assert(a == y * r + x * p) VAL [\old(cond)=1, counter=62] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=62] [L36] RET __VERIFIER_assert(a == y * r + x * p) VAL [a=41, b=1, counter=62, p=1, q=0, r=-61, s=1, x=102, y=1] [L37] CALL __VERIFIER_assert(b == x * q + y * s) VAL [\old(cond)=1, counter=62] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=62] [L37] RET __VERIFIER_assert(b == x * q + y * s) VAL [a=41, b=1, counter=62, p=1, q=0, r=-61, s=1, x=102, y=1] [L39] COND FALSE !(!(a != b)) VAL [a=41, b=1, counter=62, p=1, q=0, r=-61, s=1, x=102, y=1] [L42] COND TRUE a > b [L43] a = a - b [L44] p = p - q [L45] r = r - s VAL [a=40, b=1, counter=62, p=1, q=0, r=-62, s=1, x=102, y=1] [L34] EXPR counter++ VAL [a=40, b=1, counter=63, p=1, q=0, r=-62, s=1, x=102, y=1] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(1 == p * s - r * q) VAL [\old(cond)=1, counter=63] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=63] [L35] RET __VERIFIER_assert(1 == p * s - r * q) VAL [a=40, b=1, counter=63, p=1, q=0, r=-62, s=1, x=102, y=1] [L36] CALL __VERIFIER_assert(a == y * r + x * p) VAL [\old(cond)=1, counter=63] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=63] [L36] RET __VERIFIER_assert(a == y * r + x * p) VAL [a=40, b=1, counter=63, p=1, q=0, r=-62, s=1, x=102, y=1] [L37] CALL __VERIFIER_assert(b == x * q + y * s) VAL [\old(cond)=1, counter=63] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=63] [L37] RET __VERIFIER_assert(b == x * q + y * s) VAL [a=40, b=1, counter=63, p=1, q=0, r=-62, s=1, x=102, y=1] [L39] COND FALSE !(!(a != b)) VAL [a=40, b=1, counter=63, p=1, q=0, r=-62, s=1, x=102, y=1] [L42] COND TRUE a > b [L43] a = a - b [L44] p = p - q [L45] r = r - s VAL [a=39, b=1, counter=63, p=1, q=0, r=-63, s=1, x=102, y=1] [L34] EXPR counter++ VAL [a=39, b=1, counter=64, p=1, q=0, r=-63, s=1, x=102, y=1] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(1 == p * s - r * q) VAL [\old(cond)=1, counter=64] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=64] [L35] RET __VERIFIER_assert(1 == p * s - r * q) VAL [a=39, b=1, counter=64, p=1, q=0, r=-63, s=1, x=102, y=1] [L36] CALL __VERIFIER_assert(a == y * r + x * p) VAL [\old(cond)=1, counter=64] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=64] [L36] RET __VERIFIER_assert(a == y * r + x * p) VAL [a=39, b=1, counter=64, p=1, q=0, r=-63, s=1, x=102, y=1] [L37] CALL __VERIFIER_assert(b == x * q + y * s) VAL [\old(cond)=1, counter=64] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=64] [L37] RET __VERIFIER_assert(b == x * q + y * s) VAL [a=39, b=1, counter=64, p=1, q=0, r=-63, s=1, x=102, y=1] [L39] COND FALSE !(!(a != b)) VAL [a=39, b=1, counter=64, p=1, q=0, r=-63, s=1, x=102, y=1] [L42] COND TRUE a > b [L43] a = a - b [L44] p = p - q [L45] r = r - s VAL [a=38, b=1, counter=64, p=1, q=0, r=-64, s=1, x=102, y=1] [L34] EXPR counter++ VAL [a=38, b=1, counter=65, p=1, q=0, r=-64, s=1, x=102, y=1] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(1 == p * s - r * q) VAL [\old(cond)=1, counter=65] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=65] [L35] RET __VERIFIER_assert(1 == p * s - r * q) VAL [a=38, b=1, counter=65, p=1, q=0, r=-64, s=1, x=102, y=1] [L36] CALL __VERIFIER_assert(a == y * r + x * p) VAL [\old(cond)=1, counter=65] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=65] [L36] RET __VERIFIER_assert(a == y * r + x * p) VAL [a=38, b=1, counter=65, p=1, q=0, r=-64, s=1, x=102, y=1] [L37] CALL __VERIFIER_assert(b == x * q + y * s) VAL [\old(cond)=1, counter=65] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=65] [L37] RET __VERIFIER_assert(b == x * q + y * s) VAL [a=38, b=1, counter=65, p=1, q=0, r=-64, s=1, x=102, y=1] [L39] COND FALSE !(!(a != b)) VAL [a=38, b=1, counter=65, p=1, q=0, r=-64, s=1, x=102, y=1] [L42] COND TRUE a > b [L43] a = a - b [L44] p = p - q [L45] r = r - s VAL [a=37, b=1, counter=65, p=1, q=0, r=-65, s=1, x=102, y=1] [L34] EXPR counter++ VAL [a=37, b=1, counter=66, p=1, q=0, r=-65, s=1, x=102, y=1] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(1 == p * s - r * q) VAL [\old(cond)=1, counter=66] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=66] [L35] RET __VERIFIER_assert(1 == p * s - r * q) VAL [a=37, b=1, counter=66, p=1, q=0, r=-65, s=1, x=102, y=1] [L36] CALL __VERIFIER_assert(a == y * r + x * p) VAL [\old(cond)=1, counter=66] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=66] [L36] RET __VERIFIER_assert(a == y * r + x * p) VAL [a=37, b=1, counter=66, p=1, q=0, r=-65, s=1, x=102, y=1] [L37] CALL __VERIFIER_assert(b == x * q + y * s) VAL [\old(cond)=1, counter=66] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=66] [L37] RET __VERIFIER_assert(b == x * q + y * s) VAL [a=37, b=1, counter=66, p=1, q=0, r=-65, s=1, x=102, y=1] [L39] COND FALSE !(!(a != b)) VAL [a=37, b=1, counter=66, p=1, q=0, r=-65, s=1, x=102, y=1] [L42] COND TRUE a > b [L43] a = a - b [L44] p = p - q [L45] r = r - s VAL [a=36, b=1, counter=66, p=1, q=0, r=-66, s=1, x=102, y=1] [L34] EXPR counter++ VAL [a=36, b=1, counter=67, p=1, q=0, r=-66, s=1, x=102, y=1] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(1 == p * s - r * q) VAL [\old(cond)=1, counter=67] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=67] [L35] RET __VERIFIER_assert(1 == p * s - r * q) VAL [a=36, b=1, counter=67, p=1, q=0, r=-66, s=1, x=102, y=1] [L36] CALL __VERIFIER_assert(a == y * r + x * p) VAL [\old(cond)=1, counter=67] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=67] [L36] RET __VERIFIER_assert(a == y * r + x * p) VAL [a=36, b=1, counter=67, p=1, q=0, r=-66, s=1, x=102, y=1] [L37] CALL __VERIFIER_assert(b == x * q + y * s) VAL [\old(cond)=1, counter=67] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=67] [L37] RET __VERIFIER_assert(b == x * q + y * s) VAL [a=36, b=1, counter=67, p=1, q=0, r=-66, s=1, x=102, y=1] [L39] COND FALSE !(!(a != b)) VAL [a=36, b=1, counter=67, p=1, q=0, r=-66, s=1, x=102, y=1] [L42] COND TRUE a > b [L43] a = a - b [L44] p = p - q [L45] r = r - s VAL [a=35, b=1, counter=67, p=1, q=0, r=-67, s=1, x=102, y=1] [L34] EXPR counter++ VAL [a=35, b=1, counter=68, p=1, q=0, r=-67, s=1, x=102, y=1] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(1 == p * s - r * q) VAL [\old(cond)=1, counter=68] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=68] [L35] RET __VERIFIER_assert(1 == p * s - r * q) VAL [a=35, b=1, counter=68, p=1, q=0, r=-67, s=1, x=102, y=1] [L36] CALL __VERIFIER_assert(a == y * r + x * p) VAL [\old(cond)=1, counter=68] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=68] [L36] RET __VERIFIER_assert(a == y * r + x * p) VAL [a=35, b=1, counter=68, p=1, q=0, r=-67, s=1, x=102, y=1] [L37] CALL __VERIFIER_assert(b == x * q + y * s) VAL [\old(cond)=1, counter=68] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=68] [L37] RET __VERIFIER_assert(b == x * q + y * s) VAL [a=35, b=1, counter=68, p=1, q=0, r=-67, s=1, x=102, y=1] [L39] COND FALSE !(!(a != b)) VAL [a=35, b=1, counter=68, p=1, q=0, r=-67, s=1, x=102, y=1] [L42] COND TRUE a > b [L43] a = a - b [L44] p = p - q [L45] r = r - s VAL [a=34, b=1, counter=68, p=1, q=0, r=-68, s=1, x=102, y=1] [L34] EXPR counter++ VAL [a=34, b=1, counter=69, p=1, q=0, r=-68, s=1, x=102, y=1] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(1 == p * s - r * q) VAL [\old(cond)=1, counter=69] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=69] [L35] RET __VERIFIER_assert(1 == p * s - r * q) VAL [a=34, b=1, counter=69, p=1, q=0, r=-68, s=1, x=102, y=1] [L36] CALL __VERIFIER_assert(a == y * r + x * p) VAL [\old(cond)=1, counter=69] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=69] [L36] RET __VERIFIER_assert(a == y * r + x * p) VAL [a=34, b=1, counter=69, p=1, q=0, r=-68, s=1, x=102, y=1] [L37] CALL __VERIFIER_assert(b == x * q + y * s) VAL [\old(cond)=1, counter=69] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=69] [L37] RET __VERIFIER_assert(b == x * q + y * s) VAL [a=34, b=1, counter=69, p=1, q=0, r=-68, s=1, x=102, y=1] [L39] COND FALSE !(!(a != b)) VAL [a=34, b=1, counter=69, p=1, q=0, r=-68, s=1, x=102, y=1] [L42] COND TRUE a > b [L43] a = a - b [L44] p = p - q [L45] r = r - s VAL [a=33, b=1, counter=69, p=1, q=0, r=-69, s=1, x=102, y=1] [L34] EXPR counter++ VAL [a=33, b=1, counter=70, p=1, q=0, r=-69, s=1, x=102, y=1] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(1 == p * s - r * q) VAL [\old(cond)=1, counter=70] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=70] [L35] RET __VERIFIER_assert(1 == p * s - r * q) VAL [a=33, b=1, counter=70, p=1, q=0, r=-69, s=1, x=102, y=1] [L36] CALL __VERIFIER_assert(a == y * r + x * p) VAL [\old(cond)=1, counter=70] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=70] [L36] RET __VERIFIER_assert(a == y * r + x * p) VAL [a=33, b=1, counter=70, p=1, q=0, r=-69, s=1, x=102, y=1] [L37] CALL __VERIFIER_assert(b == x * q + y * s) VAL [\old(cond)=1, counter=70] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=70] [L37] RET __VERIFIER_assert(b == x * q + y * s) VAL [a=33, b=1, counter=70, p=1, q=0, r=-69, s=1, x=102, y=1] [L39] COND FALSE !(!(a != b)) VAL [a=33, b=1, counter=70, p=1, q=0, r=-69, s=1, x=102, y=1] [L42] COND TRUE a > b [L43] a = a - b [L44] p = p - q [L45] r = r - s VAL [a=32, b=1, counter=70, p=1, q=0, r=-70, s=1, x=102, y=1] [L34] EXPR counter++ VAL [a=32, b=1, counter=71, p=1, q=0, r=-70, s=1, x=102, y=1] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(1 == p * s - r * q) VAL [\old(cond)=1, counter=71] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=71] [L35] RET __VERIFIER_assert(1 == p * s - r * q) VAL [a=32, b=1, counter=71, p=1, q=0, r=-70, s=1, x=102, y=1] [L36] CALL __VERIFIER_assert(a == y * r + x * p) VAL [\old(cond)=1, counter=71] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=71] [L36] RET __VERIFIER_assert(a == y * r + x * p) VAL [a=32, b=1, counter=71, p=1, q=0, r=-70, s=1, x=102, y=1] [L37] CALL __VERIFIER_assert(b == x * q + y * s) VAL [\old(cond)=1, counter=71] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=71] [L37] RET __VERIFIER_assert(b == x * q + y * s) VAL [a=32, b=1, counter=71, p=1, q=0, r=-70, s=1, x=102, y=1] [L39] COND FALSE !(!(a != b)) VAL [a=32, b=1, counter=71, p=1, q=0, r=-70, s=1, x=102, y=1] [L42] COND TRUE a > b [L43] a = a - b [L44] p = p - q [L45] r = r - s VAL [a=31, b=1, counter=71, p=1, q=0, r=-71, s=1, x=102, y=1] [L34] EXPR counter++ VAL [a=31, b=1, counter=72, p=1, q=0, r=-71, s=1, x=102, y=1] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(1 == p * s - r * q) VAL [\old(cond)=1, counter=72] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=72] [L35] RET __VERIFIER_assert(1 == p * s - r * q) VAL [a=31, b=1, counter=72, p=1, q=0, r=-71, s=1, x=102, y=1] [L36] CALL __VERIFIER_assert(a == y * r + x * p) VAL [\old(cond)=1, counter=72] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=72] [L36] RET __VERIFIER_assert(a == y * r + x * p) VAL [a=31, b=1, counter=72, p=1, q=0, r=-71, s=1, x=102, y=1] [L37] CALL __VERIFIER_assert(b == x * q + y * s) VAL [\old(cond)=1, counter=72] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=72] [L37] RET __VERIFIER_assert(b == x * q + y * s) VAL [a=31, b=1, counter=72, p=1, q=0, r=-71, s=1, x=102, y=1] [L39] COND FALSE !(!(a != b)) VAL [a=31, b=1, counter=72, p=1, q=0, r=-71, s=1, x=102, y=1] [L42] COND TRUE a > b [L43] a = a - b [L44] p = p - q [L45] r = r - s VAL [a=30, b=1, counter=72, p=1, q=0, r=-72, s=1, x=102, y=1] [L34] EXPR counter++ VAL [a=30, b=1, counter=73, p=1, q=0, r=-72, s=1, x=102, y=1] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(1 == p * s - r * q) VAL [\old(cond)=1, counter=73] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=73] [L35] RET __VERIFIER_assert(1 == p * s - r * q) VAL [a=30, b=1, counter=73, p=1, q=0, r=-72, s=1, x=102, y=1] [L36] CALL __VERIFIER_assert(a == y * r + x * p) VAL [\old(cond)=1, counter=73] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=73] [L36] RET __VERIFIER_assert(a == y * r + x * p) VAL [a=30, b=1, counter=73, p=1, q=0, r=-72, s=1, x=102, y=1] [L37] CALL __VERIFIER_assert(b == x * q + y * s) VAL [\old(cond)=1, counter=73] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=73] [L37] RET __VERIFIER_assert(b == x * q + y * s) VAL [a=30, b=1, counter=73, p=1, q=0, r=-72, s=1, x=102, y=1] [L39] COND FALSE !(!(a != b)) VAL [a=30, b=1, counter=73, p=1, q=0, r=-72, s=1, x=102, y=1] [L42] COND TRUE a > b [L43] a = a - b [L44] p = p - q [L45] r = r - s VAL [a=29, b=1, counter=73, p=1, q=0, r=-73, s=1, x=102, y=1] [L34] EXPR counter++ VAL [a=29, b=1, counter=74, p=1, q=0, r=-73, s=1, x=102, y=1] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(1 == p * s - r * q) VAL [\old(cond)=1, counter=74] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=74] [L35] RET __VERIFIER_assert(1 == p * s - r * q) VAL [a=29, b=1, counter=74, p=1, q=0, r=-73, s=1, x=102, y=1] [L36] CALL __VERIFIER_assert(a == y * r + x * p) VAL [\old(cond)=1, counter=74] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=74] [L36] RET __VERIFIER_assert(a == y * r + x * p) VAL [a=29, b=1, counter=74, p=1, q=0, r=-73, s=1, x=102, y=1] [L37] CALL __VERIFIER_assert(b == x * q + y * s) VAL [\old(cond)=1, counter=74] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=74] [L37] RET __VERIFIER_assert(b == x * q + y * s) VAL [a=29, b=1, counter=74, p=1, q=0, r=-73, s=1, x=102, y=1] [L39] COND FALSE !(!(a != b)) VAL [a=29, b=1, counter=74, p=1, q=0, r=-73, s=1, x=102, y=1] [L42] COND TRUE a > b [L43] a = a - b [L44] p = p - q [L45] r = r - s VAL [a=28, b=1, counter=74, p=1, q=0, r=-74, s=1, x=102, y=1] [L34] EXPR counter++ VAL [a=28, b=1, counter=75, p=1, q=0, r=-74, s=1, x=102, y=1] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(1 == p * s - r * q) VAL [\old(cond)=1, counter=75] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=75] [L35] RET __VERIFIER_assert(1 == p * s - r * q) VAL [a=28, b=1, counter=75, p=1, q=0, r=-74, s=1, x=102, y=1] [L36] CALL __VERIFIER_assert(a == y * r + x * p) VAL [\old(cond)=1, counter=75] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=75] [L36] RET __VERIFIER_assert(a == y * r + x * p) VAL [a=28, b=1, counter=75, p=1, q=0, r=-74, s=1, x=102, y=1] [L37] CALL __VERIFIER_assert(b == x * q + y * s) VAL [\old(cond)=1, counter=75] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=75] [L37] RET __VERIFIER_assert(b == x * q + y * s) VAL [a=28, b=1, counter=75, p=1, q=0, r=-74, s=1, x=102, y=1] [L39] COND FALSE !(!(a != b)) VAL [a=28, b=1, counter=75, p=1, q=0, r=-74, s=1, x=102, y=1] [L42] COND TRUE a > b [L43] a = a - b [L44] p = p - q [L45] r = r - s VAL [a=27, b=1, counter=75, p=1, q=0, r=-75, s=1, x=102, y=1] [L34] EXPR counter++ VAL [a=27, b=1, counter=76, p=1, q=0, r=-75, s=1, x=102, y=1] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(1 == p * s - r * q) VAL [\old(cond)=1, counter=76] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=76] [L35] RET __VERIFIER_assert(1 == p * s - r * q) VAL [a=27, b=1, counter=76, p=1, q=0, r=-75, s=1, x=102, y=1] [L36] CALL __VERIFIER_assert(a == y * r + x * p) VAL [\old(cond)=1, counter=76] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=76] [L36] RET __VERIFIER_assert(a == y * r + x * p) VAL [a=27, b=1, counter=76, p=1, q=0, r=-75, s=1, x=102, y=1] [L37] CALL __VERIFIER_assert(b == x * q + y * s) VAL [\old(cond)=1, counter=76] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=76] [L37] RET __VERIFIER_assert(b == x * q + y * s) VAL [a=27, b=1, counter=76, p=1, q=0, r=-75, s=1, x=102, y=1] [L39] COND FALSE !(!(a != b)) VAL [a=27, b=1, counter=76, p=1, q=0, r=-75, s=1, x=102, y=1] [L42] COND TRUE a > b [L43] a = a - b [L44] p = p - q [L45] r = r - s VAL [a=26, b=1, counter=76, p=1, q=0, r=-76, s=1, x=102, y=1] [L34] EXPR counter++ VAL [a=26, b=1, counter=77, p=1, q=0, r=-76, s=1, x=102, y=1] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(1 == p * s - r * q) VAL [\old(cond)=1, counter=77] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=77] [L35] RET __VERIFIER_assert(1 == p * s - r * q) VAL [a=26, b=1, counter=77, p=1, q=0, r=-76, s=1, x=102, y=1] [L36] CALL __VERIFIER_assert(a == y * r + x * p) VAL [\old(cond)=1, counter=77] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=77] [L36] RET __VERIFIER_assert(a == y * r + x * p) VAL [a=26, b=1, counter=77, p=1, q=0, r=-76, s=1, x=102, y=1] [L37] CALL __VERIFIER_assert(b == x * q + y * s) VAL [\old(cond)=1, counter=77] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=77] [L37] RET __VERIFIER_assert(b == x * q + y * s) VAL [a=26, b=1, counter=77, p=1, q=0, r=-76, s=1, x=102, y=1] [L39] COND FALSE !(!(a != b)) VAL [a=26, b=1, counter=77, p=1, q=0, r=-76, s=1, x=102, y=1] [L42] COND TRUE a > b [L43] a = a - b [L44] p = p - q [L45] r = r - s VAL [a=25, b=1, counter=77, p=1, q=0, r=-77, s=1, x=102, y=1] [L34] EXPR counter++ VAL [a=25, b=1, counter=78, p=1, q=0, r=-77, s=1, x=102, y=1] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(1 == p * s - r * q) VAL [\old(cond)=1, counter=78] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=78] [L35] RET __VERIFIER_assert(1 == p * s - r * q) VAL [a=25, b=1, counter=78, p=1, q=0, r=-77, s=1, x=102, y=1] [L36] CALL __VERIFIER_assert(a == y * r + x * p) VAL [\old(cond)=1, counter=78] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=78] [L36] RET __VERIFIER_assert(a == y * r + x * p) VAL [a=25, b=1, counter=78, p=1, q=0, r=-77, s=1, x=102, y=1] [L37] CALL __VERIFIER_assert(b == x * q + y * s) VAL [\old(cond)=1, counter=78] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=78] [L37] RET __VERIFIER_assert(b == x * q + y * s) VAL [a=25, b=1, counter=78, p=1, q=0, r=-77, s=1, x=102, y=1] [L39] COND FALSE !(!(a != b)) VAL [a=25, b=1, counter=78, p=1, q=0, r=-77, s=1, x=102, y=1] [L42] COND TRUE a > b [L43] a = a - b [L44] p = p - q [L45] r = r - s VAL [a=24, b=1, counter=78, p=1, q=0, r=-78, s=1, x=102, y=1] [L34] EXPR counter++ VAL [a=24, b=1, counter=79, p=1, q=0, r=-78, s=1, x=102, y=1] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(1 == p * s - r * q) VAL [\old(cond)=1, counter=79] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=79] [L35] RET __VERIFIER_assert(1 == p * s - r * q) VAL [a=24, b=1, counter=79, p=1, q=0, r=-78, s=1, x=102, y=1] [L36] CALL __VERIFIER_assert(a == y * r + x * p) VAL [\old(cond)=1, counter=79] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=79] [L36] RET __VERIFIER_assert(a == y * r + x * p) VAL [a=24, b=1, counter=79, p=1, q=0, r=-78, s=1, x=102, y=1] [L37] CALL __VERIFIER_assert(b == x * q + y * s) VAL [\old(cond)=1, counter=79] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=79] [L37] RET __VERIFIER_assert(b == x * q + y * s) VAL [a=24, b=1, counter=79, p=1, q=0, r=-78, s=1, x=102, y=1] [L39] COND FALSE !(!(a != b)) VAL [a=24, b=1, counter=79, p=1, q=0, r=-78, s=1, x=102, y=1] [L42] COND TRUE a > b [L43] a = a - b [L44] p = p - q [L45] r = r - s VAL [a=23, b=1, counter=79, p=1, q=0, r=-79, s=1, x=102, y=1] [L34] EXPR counter++ VAL [a=23, b=1, counter=80, p=1, q=0, r=-79, s=1, x=102, y=1] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(1 == p * s - r * q) VAL [\old(cond)=1, counter=80] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=80] [L35] RET __VERIFIER_assert(1 == p * s - r * q) VAL [a=23, b=1, counter=80, p=1, q=0, r=-79, s=1, x=102, y=1] [L36] CALL __VERIFIER_assert(a == y * r + x * p) VAL [\old(cond)=1, counter=80] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=80] [L36] RET __VERIFIER_assert(a == y * r + x * p) VAL [a=23, b=1, counter=80, p=1, q=0, r=-79, s=1, x=102, y=1] [L37] CALL __VERIFIER_assert(b == x * q + y * s) VAL [\old(cond)=1, counter=80] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=80] [L37] RET __VERIFIER_assert(b == x * q + y * s) VAL [a=23, b=1, counter=80, p=1, q=0, r=-79, s=1, x=102, y=1] [L39] COND FALSE !(!(a != b)) VAL [a=23, b=1, counter=80, p=1, q=0, r=-79, s=1, x=102, y=1] [L42] COND TRUE a > b [L43] a = a - b [L44] p = p - q [L45] r = r - s VAL [a=22, b=1, counter=80, p=1, q=0, r=-80, s=1, x=102, y=1] [L34] EXPR counter++ VAL [a=22, b=1, counter=81, p=1, q=0, r=-80, s=1, x=102, y=1] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(1 == p * s - r * q) VAL [\old(cond)=1, counter=81] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=81] [L35] RET __VERIFIER_assert(1 == p * s - r * q) VAL [a=22, b=1, counter=81, p=1, q=0, r=-80, s=1, x=102, y=1] [L36] CALL __VERIFIER_assert(a == y * r + x * p) VAL [\old(cond)=1, counter=81] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=81] [L36] RET __VERIFIER_assert(a == y * r + x * p) VAL [a=22, b=1, counter=81, p=1, q=0, r=-80, s=1, x=102, y=1] [L37] CALL __VERIFIER_assert(b == x * q + y * s) VAL [\old(cond)=1, counter=81] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=81] [L37] RET __VERIFIER_assert(b == x * q + y * s) VAL [a=22, b=1, counter=81, p=1, q=0, r=-80, s=1, x=102, y=1] [L39] COND FALSE !(!(a != b)) VAL [a=22, b=1, counter=81, p=1, q=0, r=-80, s=1, x=102, y=1] [L42] COND TRUE a > b [L43] a = a - b [L44] p = p - q [L45] r = r - s VAL [a=21, b=1, counter=81, p=1, q=0, r=-81, s=1, x=102, y=1] [L34] EXPR counter++ VAL [a=21, b=1, counter=82, p=1, q=0, r=-81, s=1, x=102, y=1] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(1 == p * s - r * q) VAL [\old(cond)=1, counter=82] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=82] [L35] RET __VERIFIER_assert(1 == p * s - r * q) VAL [a=21, b=1, counter=82, p=1, q=0, r=-81, s=1, x=102, y=1] [L36] CALL __VERIFIER_assert(a == y * r + x * p) VAL [\old(cond)=1, counter=82] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=82] [L36] RET __VERIFIER_assert(a == y * r + x * p) VAL [a=21, b=1, counter=82, p=1, q=0, r=-81, s=1, x=102, y=1] [L37] CALL __VERIFIER_assert(b == x * q + y * s) VAL [\old(cond)=1, counter=82] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=82] [L37] RET __VERIFIER_assert(b == x * q + y * s) VAL [a=21, b=1, counter=82, p=1, q=0, r=-81, s=1, x=102, y=1] [L39] COND FALSE !(!(a != b)) VAL [a=21, b=1, counter=82, p=1, q=0, r=-81, s=1, x=102, y=1] [L42] COND TRUE a > b [L43] a = a - b [L44] p = p - q [L45] r = r - s VAL [a=20, b=1, counter=82, p=1, q=0, r=-82, s=1, x=102, y=1] [L34] EXPR counter++ VAL [a=20, b=1, counter=83, p=1, q=0, r=-82, s=1, x=102, y=1] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(1 == p * s - r * q) VAL [\old(cond)=1, counter=83] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=83] [L35] RET __VERIFIER_assert(1 == p * s - r * q) VAL [a=20, b=1, counter=83, p=1, q=0, r=-82, s=1, x=102, y=1] [L36] CALL __VERIFIER_assert(a == y * r + x * p) VAL [\old(cond)=1, counter=83] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=83] [L36] RET __VERIFIER_assert(a == y * r + x * p) VAL [a=20, b=1, counter=83, p=1, q=0, r=-82, s=1, x=102, y=1] [L37] CALL __VERIFIER_assert(b == x * q + y * s) VAL [\old(cond)=1, counter=83] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=83] [L37] RET __VERIFIER_assert(b == x * q + y * s) VAL [a=20, b=1, counter=83, p=1, q=0, r=-82, s=1, x=102, y=1] [L39] COND FALSE !(!(a != b)) VAL [a=20, b=1, counter=83, p=1, q=0, r=-82, s=1, x=102, y=1] [L42] COND TRUE a > b [L43] a = a - b [L44] p = p - q [L45] r = r - s VAL [a=19, b=1, counter=83, p=1, q=0, r=-83, s=1, x=102, y=1] [L34] EXPR counter++ VAL [a=19, b=1, counter=84, p=1, q=0, r=-83, s=1, x=102, y=1] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(1 == p * s - r * q) VAL [\old(cond)=1, counter=84] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=84] [L35] RET __VERIFIER_assert(1 == p * s - r * q) VAL [a=19, b=1, counter=84, p=1, q=0, r=-83, s=1, x=102, y=1] [L36] CALL __VERIFIER_assert(a == y * r + x * p) VAL [\old(cond)=1, counter=84] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=84] [L36] RET __VERIFIER_assert(a == y * r + x * p) VAL [a=19, b=1, counter=84, p=1, q=0, r=-83, s=1, x=102, y=1] [L37] CALL __VERIFIER_assert(b == x * q + y * s) VAL [\old(cond)=1, counter=84] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=84] [L37] RET __VERIFIER_assert(b == x * q + y * s) VAL [a=19, b=1, counter=84, p=1, q=0, r=-83, s=1, x=102, y=1] [L39] COND FALSE !(!(a != b)) VAL [a=19, b=1, counter=84, p=1, q=0, r=-83, s=1, x=102, y=1] [L42] COND TRUE a > b [L43] a = a - b [L44] p = p - q [L45] r = r - s VAL [a=18, b=1, counter=84, p=1, q=0, r=-84, s=1, x=102, y=1] [L34] EXPR counter++ VAL [a=18, b=1, counter=85, p=1, q=0, r=-84, s=1, x=102, y=1] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(1 == p * s - r * q) VAL [\old(cond)=1, counter=85] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=85] [L35] RET __VERIFIER_assert(1 == p * s - r * q) VAL [a=18, b=1, counter=85, p=1, q=0, r=-84, s=1, x=102, y=1] [L36] CALL __VERIFIER_assert(a == y * r + x * p) VAL [\old(cond)=1, counter=85] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=85] [L36] RET __VERIFIER_assert(a == y * r + x * p) VAL [a=18, b=1, counter=85, p=1, q=0, r=-84, s=1, x=102, y=1] [L37] CALL __VERIFIER_assert(b == x * q + y * s) VAL [\old(cond)=1, counter=85] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=85] [L37] RET __VERIFIER_assert(b == x * q + y * s) VAL [a=18, b=1, counter=85, p=1, q=0, r=-84, s=1, x=102, y=1] [L39] COND FALSE !(!(a != b)) VAL [a=18, b=1, counter=85, p=1, q=0, r=-84, s=1, x=102, y=1] [L42] COND TRUE a > b [L43] a = a - b [L44] p = p - q [L45] r = r - s VAL [a=17, b=1, counter=85, p=1, q=0, r=-85, s=1, x=102, y=1] [L34] EXPR counter++ VAL [a=17, b=1, counter=86, p=1, q=0, r=-85, s=1, x=102, y=1] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(1 == p * s - r * q) VAL [\old(cond)=1, counter=86] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=86] [L35] RET __VERIFIER_assert(1 == p * s - r * q) VAL [a=17, b=1, counter=86, p=1, q=0, r=-85, s=1, x=102, y=1] [L36] CALL __VERIFIER_assert(a == y * r + x * p) VAL [\old(cond)=1, counter=86] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=86] [L36] RET __VERIFIER_assert(a == y * r + x * p) VAL [a=17, b=1, counter=86, p=1, q=0, r=-85, s=1, x=102, y=1] [L37] CALL __VERIFIER_assert(b == x * q + y * s) VAL [\old(cond)=1, counter=86] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=86] [L37] RET __VERIFIER_assert(b == x * q + y * s) VAL [a=17, b=1, counter=86, p=1, q=0, r=-85, s=1, x=102, y=1] [L39] COND FALSE !(!(a != b)) VAL [a=17, b=1, counter=86, p=1, q=0, r=-85, s=1, x=102, y=1] [L42] COND TRUE a > b [L43] a = a - b [L44] p = p - q [L45] r = r - s VAL [a=16, b=1, counter=86, p=1, q=0, r=-86, s=1, x=102, y=1] [L34] EXPR counter++ VAL [a=16, b=1, counter=87, p=1, q=0, r=-86, s=1, x=102, y=1] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(1 == p * s - r * q) VAL [\old(cond)=1, counter=87] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=87] [L35] RET __VERIFIER_assert(1 == p * s - r * q) VAL [a=16, b=1, counter=87, p=1, q=0, r=-86, s=1, x=102, y=1] [L36] CALL __VERIFIER_assert(a == y * r + x * p) VAL [\old(cond)=1, counter=87] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=87] [L36] RET __VERIFIER_assert(a == y * r + x * p) VAL [a=16, b=1, counter=87, p=1, q=0, r=-86, s=1, x=102, y=1] [L37] CALL __VERIFIER_assert(b == x * q + y * s) VAL [\old(cond)=1, counter=87] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=87] [L37] RET __VERIFIER_assert(b == x * q + y * s) VAL [a=16, b=1, counter=87, p=1, q=0, r=-86, s=1, x=102, y=1] [L39] COND FALSE !(!(a != b)) VAL [a=16, b=1, counter=87, p=1, q=0, r=-86, s=1, x=102, y=1] [L42] COND TRUE a > b [L43] a = a - b [L44] p = p - q [L45] r = r - s VAL [a=15, b=1, counter=87, p=1, q=0, r=-87, s=1, x=102, y=1] [L34] EXPR counter++ VAL [a=15, b=1, counter=88, p=1, q=0, r=-87, s=1, x=102, y=1] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(1 == p * s - r * q) VAL [\old(cond)=1, counter=88] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=88] [L35] RET __VERIFIER_assert(1 == p * s - r * q) VAL [a=15, b=1, counter=88, p=1, q=0, r=-87, s=1, x=102, y=1] [L36] CALL __VERIFIER_assert(a == y * r + x * p) VAL [\old(cond)=1, counter=88] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=88] [L36] RET __VERIFIER_assert(a == y * r + x * p) VAL [a=15, b=1, counter=88, p=1, q=0, r=-87, s=1, x=102, y=1] [L37] CALL __VERIFIER_assert(b == x * q + y * s) VAL [\old(cond)=1, counter=88] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=88] [L37] RET __VERIFIER_assert(b == x * q + y * s) VAL [a=15, b=1, counter=88, p=1, q=0, r=-87, s=1, x=102, y=1] [L39] COND FALSE !(!(a != b)) VAL [a=15, b=1, counter=88, p=1, q=0, r=-87, s=1, x=102, y=1] [L42] COND TRUE a > b [L43] a = a - b [L44] p = p - q [L45] r = r - s VAL [a=14, b=1, counter=88, p=1, q=0, r=-88, s=1, x=102, y=1] [L34] EXPR counter++ VAL [a=14, b=1, counter=89, p=1, q=0, r=-88, s=1, x=102, y=1] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(1 == p * s - r * q) VAL [\old(cond)=1, counter=89] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=89] [L35] RET __VERIFIER_assert(1 == p * s - r * q) VAL [a=14, b=1, counter=89, p=1, q=0, r=-88, s=1, x=102, y=1] [L36] CALL __VERIFIER_assert(a == y * r + x * p) VAL [\old(cond)=1, counter=89] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=89] [L36] RET __VERIFIER_assert(a == y * r + x * p) VAL [a=14, b=1, counter=89, p=1, q=0, r=-88, s=1, x=102, y=1] [L37] CALL __VERIFIER_assert(b == x * q + y * s) VAL [\old(cond)=1, counter=89] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=89] [L37] RET __VERIFIER_assert(b == x * q + y * s) VAL [a=14, b=1, counter=89, p=1, q=0, r=-88, s=1, x=102, y=1] [L39] COND FALSE !(!(a != b)) VAL [a=14, b=1, counter=89, p=1, q=0, r=-88, s=1, x=102, y=1] [L42] COND TRUE a > b [L43] a = a - b [L44] p = p - q [L45] r = r - s VAL [a=13, b=1, counter=89, p=1, q=0, r=-89, s=1, x=102, y=1] [L34] EXPR counter++ VAL [a=13, b=1, counter=90, p=1, q=0, r=-89, s=1, x=102, y=1] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(1 == p * s - r * q) VAL [\old(cond)=1, counter=90] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=90] [L35] RET __VERIFIER_assert(1 == p * s - r * q) VAL [a=13, b=1, counter=90, p=1, q=0, r=-89, s=1, x=102, y=1] [L36] CALL __VERIFIER_assert(a == y * r + x * p) VAL [\old(cond)=1, counter=90] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=90] [L36] RET __VERIFIER_assert(a == y * r + x * p) VAL [a=13, b=1, counter=90, p=1, q=0, r=-89, s=1, x=102, y=1] [L37] CALL __VERIFIER_assert(b == x * q + y * s) VAL [\old(cond)=1, counter=90] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=90] [L37] RET __VERIFIER_assert(b == x * q + y * s) VAL [a=13, b=1, counter=90, p=1, q=0, r=-89, s=1, x=102, y=1] [L39] COND FALSE !(!(a != b)) VAL [a=13, b=1, counter=90, p=1, q=0, r=-89, s=1, x=102, y=1] [L42] COND TRUE a > b [L43] a = a - b [L44] p = p - q [L45] r = r - s VAL [a=12, b=1, counter=90, p=1, q=0, r=-90, s=1, x=102, y=1] [L34] EXPR counter++ VAL [a=12, b=1, counter=91, p=1, q=0, r=-90, s=1, x=102, y=1] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(1 == p * s - r * q) VAL [\old(cond)=1, counter=91] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=91] [L35] RET __VERIFIER_assert(1 == p * s - r * q) VAL [a=12, b=1, counter=91, p=1, q=0, r=-90, s=1, x=102, y=1] [L36] CALL __VERIFIER_assert(a == y * r + x * p) VAL [\old(cond)=1, counter=91] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=91] [L36] RET __VERIFIER_assert(a == y * r + x * p) VAL [a=12, b=1, counter=91, p=1, q=0, r=-90, s=1, x=102, y=1] [L37] CALL __VERIFIER_assert(b == x * q + y * s) VAL [\old(cond)=1, counter=91] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=91] [L37] RET __VERIFIER_assert(b == x * q + y * s) VAL [a=12, b=1, counter=91, p=1, q=0, r=-90, s=1, x=102, y=1] [L39] COND FALSE !(!(a != b)) VAL [a=12, b=1, counter=91, p=1, q=0, r=-90, s=1, x=102, y=1] [L42] COND TRUE a > b [L43] a = a - b [L44] p = p - q [L45] r = r - s VAL [a=11, b=1, counter=91, p=1, q=0, r=-91, s=1, x=102, y=1] [L34] EXPR counter++ VAL [a=11, b=1, counter=92, p=1, q=0, r=-91, s=1, x=102, y=1] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(1 == p * s - r * q) VAL [\old(cond)=1, counter=92] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=92] [L35] RET __VERIFIER_assert(1 == p * s - r * q) VAL [a=11, b=1, counter=92, p=1, q=0, r=-91, s=1, x=102, y=1] [L36] CALL __VERIFIER_assert(a == y * r + x * p) VAL [\old(cond)=1, counter=92] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=92] [L36] RET __VERIFIER_assert(a == y * r + x * p) VAL [a=11, b=1, counter=92, p=1, q=0, r=-91, s=1, x=102, y=1] [L37] CALL __VERIFIER_assert(b == x * q + y * s) VAL [\old(cond)=1, counter=92] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=92] [L37] RET __VERIFIER_assert(b == x * q + y * s) VAL [a=11, b=1, counter=92, p=1, q=0, r=-91, s=1, x=102, y=1] [L39] COND FALSE !(!(a != b)) VAL [a=11, b=1, counter=92, p=1, q=0, r=-91, s=1, x=102, y=1] [L42] COND TRUE a > b [L43] a = a - b [L44] p = p - q [L45] r = r - s VAL [a=10, b=1, counter=92, p=1, q=0, r=-92, s=1, x=102, y=1] [L34] EXPR counter++ VAL [a=10, b=1, counter=93, p=1, q=0, r=-92, s=1, x=102, y=1] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(1 == p * s - r * q) VAL [\old(cond)=1, counter=93] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=93] [L35] RET __VERIFIER_assert(1 == p * s - r * q) VAL [a=10, b=1, counter=93, p=1, q=0, r=-92, s=1, x=102, y=1] [L36] CALL __VERIFIER_assert(a == y * r + x * p) VAL [\old(cond)=1, counter=93] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=93] [L36] RET __VERIFIER_assert(a == y * r + x * p) VAL [a=10, b=1, counter=93, p=1, q=0, r=-92, s=1, x=102, y=1] [L37] CALL __VERIFIER_assert(b == x * q + y * s) VAL [\old(cond)=1, counter=93] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=93] [L37] RET __VERIFIER_assert(b == x * q + y * s) VAL [a=10, b=1, counter=93, p=1, q=0, r=-92, s=1, x=102, y=1] [L39] COND FALSE !(!(a != b)) VAL [a=10, b=1, counter=93, p=1, q=0, r=-92, s=1, x=102, y=1] [L42] COND TRUE a > b [L43] a = a - b [L44] p = p - q [L45] r = r - s VAL [a=9, b=1, counter=93, p=1, q=0, r=-93, s=1, x=102, y=1] [L34] EXPR counter++ VAL [a=9, b=1, counter=94, p=1, q=0, r=-93, s=1, x=102, y=1] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(1 == p * s - r * q) VAL [\old(cond)=1, counter=94] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=94] [L35] RET __VERIFIER_assert(1 == p * s - r * q) VAL [a=9, b=1, counter=94, p=1, q=0, r=-93, s=1, x=102, y=1] [L36] CALL __VERIFIER_assert(a == y * r + x * p) VAL [\old(cond)=1, counter=94] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=94] [L36] RET __VERIFIER_assert(a == y * r + x * p) VAL [a=9, b=1, counter=94, p=1, q=0, r=-93, s=1, x=102, y=1] [L37] CALL __VERIFIER_assert(b == x * q + y * s) VAL [\old(cond)=1, counter=94] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=94] [L37] RET __VERIFIER_assert(b == x * q + y * s) VAL [a=9, b=1, counter=94, p=1, q=0, r=-93, s=1, x=102, y=1] [L39] COND FALSE !(!(a != b)) VAL [a=9, b=1, counter=94, p=1, q=0, r=-93, s=1, x=102, y=1] [L42] COND TRUE a > b [L43] a = a - b [L44] p = p - q [L45] r = r - s VAL [a=8, b=1, counter=94, p=1, q=0, r=-94, s=1, x=102, y=1] [L34] EXPR counter++ VAL [a=8, b=1, counter=95, p=1, q=0, r=-94, s=1, x=102, y=1] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(1 == p * s - r * q) VAL [\old(cond)=1, counter=95] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=95] [L35] RET __VERIFIER_assert(1 == p * s - r * q) VAL [a=8, b=1, counter=95, p=1, q=0, r=-94, s=1, x=102, y=1] [L36] CALL __VERIFIER_assert(a == y * r + x * p) VAL [\old(cond)=1, counter=95] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=95] [L36] RET __VERIFIER_assert(a == y * r + x * p) VAL [a=8, b=1, counter=95, p=1, q=0, r=-94, s=1, x=102, y=1] [L37] CALL __VERIFIER_assert(b == x * q + y * s) VAL [\old(cond)=1, counter=95] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=95] [L37] RET __VERIFIER_assert(b == x * q + y * s) VAL [a=8, b=1, counter=95, p=1, q=0, r=-94, s=1, x=102, y=1] [L39] COND FALSE !(!(a != b)) VAL [a=8, b=1, counter=95, p=1, q=0, r=-94, s=1, x=102, y=1] [L42] COND TRUE a > b [L43] a = a - b [L44] p = p - q [L45] r = r - s VAL [a=7, b=1, counter=95, p=1, q=0, r=-95, s=1, x=102, y=1] [L34] EXPR counter++ VAL [a=7, b=1, counter=96, p=1, q=0, r=-95, s=1, x=102, y=1] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(1 == p * s - r * q) VAL [\old(cond)=1, counter=96] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=96] [L35] RET __VERIFIER_assert(1 == p * s - r * q) VAL [a=7, b=1, counter=96, p=1, q=0, r=-95, s=1, x=102, y=1] [L36] CALL __VERIFIER_assert(a == y * r + x * p) VAL [\old(cond)=1, counter=96] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=96] [L36] RET __VERIFIER_assert(a == y * r + x * p) VAL [a=7, b=1, counter=96, p=1, q=0, r=-95, s=1, x=102, y=1] [L37] CALL __VERIFIER_assert(b == x * q + y * s) VAL [\old(cond)=1, counter=96] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=96] [L37] RET __VERIFIER_assert(b == x * q + y * s) VAL [a=7, b=1, counter=96, p=1, q=0, r=-95, s=1, x=102, y=1] [L39] COND FALSE !(!(a != b)) VAL [a=7, b=1, counter=96, p=1, q=0, r=-95, s=1, x=102, y=1] [L42] COND TRUE a > b [L43] a = a - b [L44] p = p - q [L45] r = r - s VAL [a=6, b=1, counter=96, p=1, q=0, r=-96, s=1, x=102, y=1] [L34] EXPR counter++ VAL [a=6, b=1, counter=97, p=1, q=0, r=-96, s=1, x=102, y=1] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(1 == p * s - r * q) VAL [\old(cond)=1, counter=97] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=97] [L35] RET __VERIFIER_assert(1 == p * s - r * q) VAL [a=6, b=1, counter=97, p=1, q=0, r=-96, s=1, x=102, y=1] [L36] CALL __VERIFIER_assert(a == y * r + x * p) VAL [\old(cond)=1, counter=97] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=97] [L36] RET __VERIFIER_assert(a == y * r + x * p) VAL [a=6, b=1, counter=97, p=1, q=0, r=-96, s=1, x=102, y=1] [L37] CALL __VERIFIER_assert(b == x * q + y * s) VAL [\old(cond)=1, counter=97] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=97] [L37] RET __VERIFIER_assert(b == x * q + y * s) VAL [a=6, b=1, counter=97, p=1, q=0, r=-96, s=1, x=102, y=1] [L39] COND FALSE !(!(a != b)) VAL [a=6, b=1, counter=97, p=1, q=0, r=-96, s=1, x=102, y=1] [L42] COND TRUE a > b [L43] a = a - b [L44] p = p - q [L45] r = r - s VAL [a=5, b=1, counter=97, p=1, q=0, r=-97, s=1, x=102, y=1] [L34] EXPR counter++ VAL [a=5, b=1, counter=98, p=1, q=0, r=-97, s=1, x=102, y=1] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(1 == p * s - r * q) VAL [\old(cond)=1, counter=98] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=98] [L35] RET __VERIFIER_assert(1 == p * s - r * q) VAL [a=5, b=1, counter=98, p=1, q=0, r=-97, s=1, x=102, y=1] [L36] CALL __VERIFIER_assert(a == y * r + x * p) VAL [\old(cond)=1, counter=98] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=98] [L36] RET __VERIFIER_assert(a == y * r + x * p) VAL [a=5, b=1, counter=98, p=1, q=0, r=-97, s=1, x=102, y=1] [L37] CALL __VERIFIER_assert(b == x * q + y * s) VAL [\old(cond)=1, counter=98] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=98] [L37] RET __VERIFIER_assert(b == x * q + y * s) VAL [a=5, b=1, counter=98, p=1, q=0, r=-97, s=1, x=102, y=1] [L39] COND FALSE !(!(a != b)) VAL [a=5, b=1, counter=98, p=1, q=0, r=-97, s=1, x=102, y=1] [L42] COND TRUE a > b [L43] a = a - b [L44] p = p - q [L45] r = r - s VAL [a=4, b=1, counter=98, p=1, q=0, r=-98, s=1, x=102, y=1] [L34] EXPR counter++ VAL [a=4, b=1, counter=99, p=1, q=0, r=-98, s=1, x=102, y=1] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(1 == p * s - r * q) VAL [\old(cond)=1, counter=99] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=99] [L35] RET __VERIFIER_assert(1 == p * s - r * q) VAL [a=4, b=1, counter=99, p=1, q=0, r=-98, s=1, x=102, y=1] [L36] CALL __VERIFIER_assert(a == y * r + x * p) VAL [\old(cond)=1, counter=99] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=99] [L36] RET __VERIFIER_assert(a == y * r + x * p) VAL [a=4, b=1, counter=99, p=1, q=0, r=-98, s=1, x=102, y=1] [L37] CALL __VERIFIER_assert(b == x * q + y * s) VAL [\old(cond)=1, counter=99] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=99] [L37] RET __VERIFIER_assert(b == x * q + y * s) VAL [a=4, b=1, counter=99, p=1, q=0, r=-98, s=1, x=102, y=1] [L39] COND FALSE !(!(a != b)) VAL [a=4, b=1, counter=99, p=1, q=0, r=-98, s=1, x=102, y=1] [L42] COND TRUE a > b [L43] a = a - b [L44] p = p - q [L45] r = r - s VAL [a=3, b=1, counter=99, p=1, q=0, r=-99, s=1, x=102, y=1] [L34] EXPR counter++ VAL [a=3, b=1, counter=100, p=1, q=0, r=-99, s=1, x=102, y=1] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(1 == p * s - r * q) VAL [\old(cond)=1, counter=100] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=100] [L35] RET __VERIFIER_assert(1 == p * s - r * q) VAL [a=3, b=1, counter=100, p=1, q=0, r=-99, s=1, x=102, y=1] [L36] CALL __VERIFIER_assert(a == y * r + x * p) VAL [\old(cond)=1, counter=100] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=100] [L36] RET __VERIFIER_assert(a == y * r + x * p) VAL [a=3, b=1, counter=100, p=1, q=0, r=-99, s=1, x=102, y=1] [L37] CALL __VERIFIER_assert(b == x * q + y * s) VAL [\old(cond)=1, counter=100] [L11] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=100] [L37] RET __VERIFIER_assert(b == x * q + y * s) VAL [a=3, b=1, counter=100, p=1, q=0, r=-99, s=1, x=102, y=1] [L39] COND FALSE !(!(a != b)) VAL [a=3, b=1, counter=100, p=1, q=0, r=-99, s=1, x=102, y=1] [L42] COND TRUE a > b [L43] a = a - b [L44] p = p - q [L45] r = r - s VAL [a=2, b=1, counter=100, p=1, q=0, r=-100, s=1, x=102, y=1] [L34] EXPR counter++ VAL [a=2, b=1, counter=101, p=1, q=0, r=-100, s=1, x=102, y=1] [L34] COND FALSE !(counter++<100) [L53] CALL __VERIFIER_assert(a - b == 0) VAL [\old(cond)=0, counter=101] [L11] COND TRUE !(cond) VAL [\old(cond)=0, counter=101] [L13] reach_error() VAL [\old(cond)=0, counter=101] - StatisticsResult: Ultimate Automizer benchmark data CFG has 3 procedures, 30 locations, 1 error locations. Started 1 CEGAR loops. OverallTime: 228.9s, OverallIterations: 19, TraceHistogramMax: 301, PathProgramHistogramMax: 7, EmptinessCheckTime: 0.2s, AutomataDifference: 23.5s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, HoareTripleCheckerStatistics: 0 mSolverCounterUnknown, 2487 SdHoareTripleChecker+Valid, 7.1s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 2456 mSDsluCounter, 4166 SdHoareTripleChecker+Invalid, 6.1s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 0 IncrementalHoareTripleChecker+Unchecked, 3603 mSDsCounter, 848 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 3392 IncrementalHoareTripleChecker+Invalid, 4240 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 848 mSolverCounterUnsat, 563 mSDtfsCounter, 3392 mSolverCounterSat, 0.1s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Unknown, PredicateUnifierStatistics: 0 DeclaredPredicates, 8038 GetRequests, 7278 SyntacticMatches, 92 SemanticMatches, 668 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17841 ImplicationChecksByTransitivity, 29.4s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=1922occurred in iteration=18, InterpolantAutomatonStates: 654, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 1.9s AutomataMinimizationTime, 18 MinimizatonAttempts, 405 StatesRemovedByMinimization, 15 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.9s SsaConstructionTime, 102.5s SatisfiabilityAnalysisTime, 94.2s InterpolantComputationTime, 11596 NumberOfCodeBlocks, 11556 NumberOfCodeBlocksAsserted, 614 NumberOfCheckSat, 11147 ConstructedInterpolants, 0 QuantifiedInterpolants, 25611 SizeOfPredicates, 198 NumberOfNonLiveVariables, 8546 ConjunctsInSsa, 543 ConjunctsInUnsatCore, 37 InterpolantComputations, 8 PerfectInterpolantSequences, 419921/745297 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available, ConComCheckerStatistics: No data available RESULT: Ultimate proved your program to be incorrect! [2024-11-28 02:51:58,628 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0197b218-9905-4a5e-bb6e-61b58cf45d84/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Ended with exit code 0 Received shutdown request... --- End real Ultimate output --- Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE