./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/nla-digbench-scaling/fermat2-ll_unwindbound50.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version d790fecc Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4ce4be16-84b9-4d2f-a8a3-045f4ddaf82a/bin/uautomizer-verify-aQ6SnzHsRB/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4ce4be16-84b9-4d2f-a8a3-045f4ddaf82a/bin/uautomizer-verify-aQ6SnzHsRB/plugins/org.eclipse.equinox.launcher_1.6.800.v20240513-1750.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4ce4be16-84b9-4d2f-a8a3-045f4ddaf82a/bin/uautomizer-verify-aQ6SnzHsRB/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4ce4be16-84b9-4d2f-a8a3-045f4ddaf82a/bin/uautomizer-verify-aQ6SnzHsRB/config/AutomizerReach.xml -i ../../sv-benchmarks/c/nla-digbench-scaling/fermat2-ll_unwindbound50.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4ce4be16-84b9-4d2f-a8a3-045f4ddaf82a/bin/uautomizer-verify-aQ6SnzHsRB/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4ce4be16-84b9-4d2f-a8a3-045f4ddaf82a/bin/uautomizer-verify-aQ6SnzHsRB --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash a367fffaabe322cc88315ee22f1c9c69606de0332ddd62ff36608ec1e5019dc8 --- Real Ultimate output --- This is Ultimate 0.3.0-dev-d790fec [2024-11-27 20:24:17,926 INFO L188 SettingsManager]: Resetting all preferences to default values... [2024-11-27 20:24:18,021 INFO L114 SettingsManager]: Loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4ce4be16-84b9-4d2f-a8a3-045f4ddaf82a/bin/uautomizer-verify-aQ6SnzHsRB/config/svcomp-Reach-32bit-Automizer_Default.epf [2024-11-27 20:24:18,031 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2024-11-27 20:24:18,032 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2024-11-27 20:24:18,055 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2024-11-27 20:24:18,055 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2024-11-27 20:24:18,056 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2024-11-27 20:24:18,056 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2024-11-27 20:24:18,056 INFO L153 SettingsManager]: * Use memory slicer=true [2024-11-27 20:24:18,056 INFO L151 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2024-11-27 20:24:18,056 INFO L153 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2024-11-27 20:24:18,057 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2024-11-27 20:24:18,057 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2024-11-27 20:24:18,057 INFO L153 SettingsManager]: * Use SBE=true [2024-11-27 20:24:18,057 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2024-11-27 20:24:18,057 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2024-11-27 20:24:18,058 INFO L153 SettingsManager]: * sizeof long=4 [2024-11-27 20:24:18,058 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2024-11-27 20:24:18,058 INFO L153 SettingsManager]: * sizeof POINTER=4 [2024-11-27 20:24:18,058 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2024-11-27 20:24:18,058 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2024-11-27 20:24:18,058 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2024-11-27 20:24:18,059 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2024-11-27 20:24:18,059 INFO L153 SettingsManager]: * sizeof long double=12 [2024-11-27 20:24:18,059 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2024-11-27 20:24:18,059 INFO L153 SettingsManager]: * Behaviour of calls to undefined functions=OVERAPPROXIMATE_BEHAVIOUR [2024-11-27 20:24:18,059 INFO L153 SettingsManager]: * Use constant arrays=true [2024-11-27 20:24:18,059 INFO L151 SettingsManager]: Preferences of IcfgBuilder differ from their defaults: [2024-11-27 20:24:18,060 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-11-27 20:24:18,060 INFO L153 SettingsManager]: * Only consider context switches at boundaries of atomic blocks=true [2024-11-27 20:24:18,060 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2024-11-27 20:24:18,060 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2024-11-27 20:24:18,060 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2024-11-27 20:24:18,060 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-11-27 20:24:18,060 INFO L153 SettingsManager]: * Only consider context switches at boundaries of atomic blocks=true [2024-11-27 20:24:18,060 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2024-11-27 20:24:18,061 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2024-11-27 20:24:18,061 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2024-11-27 20:24:18,061 INFO L153 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2024-11-27 20:24:18,061 INFO L153 SettingsManager]: * Compute procedure contracts=false [2024-11-27 20:24:18,061 INFO L153 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopHeads [2024-11-27 20:24:18,061 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2024-11-27 20:24:18,061 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2024-11-27 20:24:18,061 INFO L153 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false [2024-11-27 20:24:18,061 INFO L153 SettingsManager]: * Automaton type used in concurrency analysis=PETRI_NET [2024-11-27 20:24:18,061 INFO L153 SettingsManager]: * Order on configurations for Petri net unfoldings=DBO [2024-11-27 20:24:18,062 INFO L153 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2024-11-27 20:24:18,062 INFO L153 SettingsManager]: * Looper check in Petri net analysis=SEMANTIC Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4ce4be16-84b9-4d2f-a8a3-045f4ddaf82a/bin/uautomizer-verify-aQ6SnzHsRB Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> a367fffaabe322cc88315ee22f1c9c69606de0332ddd62ff36608ec1e5019dc8 [2024-11-27 20:24:18,359 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2024-11-27 20:24:18,369 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2024-11-27 20:24:18,371 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2024-11-27 20:24:18,373 INFO L270 PluginConnector]: Initializing CDTParser... [2024-11-27 20:24:18,373 INFO L274 PluginConnector]: CDTParser initialized [2024-11-27 20:24:18,374 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4ce4be16-84b9-4d2f-a8a3-045f4ddaf82a/bin/uautomizer-verify-aQ6SnzHsRB/../../sv-benchmarks/c/nla-digbench-scaling/fermat2-ll_unwindbound50.c [2024-11-27 20:24:21,247 INFO L533 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4ce4be16-84b9-4d2f-a8a3-045f4ddaf82a/bin/uautomizer-verify-aQ6SnzHsRB/data/bed911ea7/4adbbeebec4c4c91840d06663a8e2749/FLAGa31243853 [2024-11-27 20:24:21,574 INFO L384 CDTParser]: Found 1 translation units. [2024-11-27 20:24:21,575 INFO L180 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4ce4be16-84b9-4d2f-a8a3-045f4ddaf82a/sv-benchmarks/c/nla-digbench-scaling/fermat2-ll_unwindbound50.c [2024-11-27 20:24:21,583 INFO L427 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4ce4be16-84b9-4d2f-a8a3-045f4ddaf82a/bin/uautomizer-verify-aQ6SnzHsRB/data/bed911ea7/4adbbeebec4c4c91840d06663a8e2749/FLAGa31243853 [2024-11-27 20:24:21,607 INFO L435 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4ce4be16-84b9-4d2f-a8a3-045f4ddaf82a/bin/uautomizer-verify-aQ6SnzHsRB/data/bed911ea7/4adbbeebec4c4c91840d06663a8e2749 [2024-11-27 20:24:21,610 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2024-11-27 20:24:21,612 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2024-11-27 20:24:21,614 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2024-11-27 20:24:21,614 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2024-11-27 20:24:21,620 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2024-11-27 20:24:21,621 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 27.11 08:24:21" (1/1) ... [2024-11-27 20:24:21,622 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@5a2fddb2 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.11 08:24:21, skipping insertion in model container [2024-11-27 20:24:21,622 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 27.11 08:24:21" (1/1) ... [2024-11-27 20:24:21,641 INFO L175 MainTranslator]: Built tables and reachable declarations [2024-11-27 20:24:21,860 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4ce4be16-84b9-4d2f-a8a3-045f4ddaf82a/sv-benchmarks/c/nla-digbench-scaling/fermat2-ll_unwindbound50.c[524,537] [2024-11-27 20:24:21,890 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-11-27 20:24:21,902 INFO L200 MainTranslator]: Completed pre-run [2024-11-27 20:24:21,917 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4ce4be16-84b9-4d2f-a8a3-045f4ddaf82a/sv-benchmarks/c/nla-digbench-scaling/fermat2-ll_unwindbound50.c[524,537] [2024-11-27 20:24:21,929 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-11-27 20:24:21,946 INFO L204 MainTranslator]: Completed translation [2024-11-27 20:24:21,946 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.11 08:24:21 WrapperNode [2024-11-27 20:24:21,948 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2024-11-27 20:24:21,949 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2024-11-27 20:24:21,949 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2024-11-27 20:24:21,949 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2024-11-27 20:24:21,960 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.11 08:24:21" (1/1) ... [2024-11-27 20:24:21,972 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.11 08:24:21" (1/1) ... [2024-11-27 20:24:21,996 INFO L138 Inliner]: procedures = 14, calls = 11, calls flagged for inlining = 2, calls inlined = 2, statements flattened = 46 [2024-11-27 20:24:21,997 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2024-11-27 20:24:21,998 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2024-11-27 20:24:21,998 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2024-11-27 20:24:21,998 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2024-11-27 20:24:22,010 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.11 08:24:21" (1/1) ... [2024-11-27 20:24:22,011 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.11 08:24:21" (1/1) ... [2024-11-27 20:24:22,012 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.11 08:24:21" (1/1) ... [2024-11-27 20:24:22,035 INFO L175 MemorySlicer]: Split 2 memory accesses to 1 slices as follows [2]. 100 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2]. The 0 writes are split as follows [0]. [2024-11-27 20:24:22,036 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.11 08:24:21" (1/1) ... [2024-11-27 20:24:22,037 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.11 08:24:21" (1/1) ... [2024-11-27 20:24:22,041 INFO L184 PluginConnector]: Executing the observer ReplaceArrayAssignments from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.11 08:24:21" (1/1) ... [2024-11-27 20:24:22,043 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.11 08:24:21" (1/1) ... [2024-11-27 20:24:22,050 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.11 08:24:21" (1/1) ... [2024-11-27 20:24:22,052 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.11 08:24:21" (1/1) ... [2024-11-27 20:24:22,053 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.11 08:24:21" (1/1) ... [2024-11-27 20:24:22,055 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2024-11-27 20:24:22,059 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2024-11-27 20:24:22,060 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2024-11-27 20:24:22,060 INFO L274 PluginConnector]: RCFGBuilder initialized [2024-11-27 20:24:22,061 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.11 08:24:21" (1/1) ... [2024-11-27 20:24:22,070 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2024-11-27 20:24:22,090 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4ce4be16-84b9-4d2f-a8a3-045f4ddaf82a/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-27 20:24:22,108 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4ce4be16-84b9-4d2f-a8a3-045f4ddaf82a/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (exit command is (exit), workingDir is null) [2024-11-27 20:24:22,112 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4ce4be16-84b9-4d2f-a8a3-045f4ddaf82a/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Waiting until timeout for monitored process [2024-11-27 20:24:22,143 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2024-11-27 20:24:22,143 INFO L130 BoogieDeclarations]: Found specification of procedure assume_abort_if_not [2024-11-27 20:24:22,143 INFO L138 BoogieDeclarations]: Found implementation of procedure assume_abort_if_not [2024-11-27 20:24:22,144 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#0 [2024-11-27 20:24:22,144 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2024-11-27 20:24:22,144 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2024-11-27 20:24:22,144 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_assert [2024-11-27 20:24:22,144 INFO L138 BoogieDeclarations]: Found implementation of procedure __VERIFIER_assert [2024-11-27 20:24:22,210 INFO L234 CfgBuilder]: Building ICFG [2024-11-27 20:24:22,212 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2024-11-27 20:24:22,402 INFO L? ?]: Removed 7 outVars from TransFormulas that were not future-live. [2024-11-27 20:24:22,402 INFO L283 CfgBuilder]: Performing block encoding [2024-11-27 20:24:22,420 INFO L307 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2024-11-27 20:24:22,420 INFO L312 CfgBuilder]: Removed 1 assume(true) statements. [2024-11-27 20:24:22,420 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 27.11 08:24:22 BoogieIcfgContainer [2024-11-27 20:24:22,420 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2024-11-27 20:24:22,423 INFO L112 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2024-11-27 20:24:22,423 INFO L270 PluginConnector]: Initializing TraceAbstraction... [2024-11-27 20:24:22,433 INFO L274 PluginConnector]: TraceAbstraction initialized [2024-11-27 20:24:22,433 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 27.11 08:24:21" (1/3) ... [2024-11-27 20:24:22,434 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@6dd0ecf0 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 27.11 08:24:22, skipping insertion in model container [2024-11-27 20:24:22,434 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.11 08:24:21" (2/3) ... [2024-11-27 20:24:22,434 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@6dd0ecf0 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 27.11 08:24:22, skipping insertion in model container [2024-11-27 20:24:22,434 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 27.11 08:24:22" (3/3) ... [2024-11-27 20:24:22,436 INFO L128 eAbstractionObserver]: Analyzing ICFG fermat2-ll_unwindbound50.c [2024-11-27 20:24:22,457 INFO L216 ceAbstractionStarter]: Automizer settings: Hoare:LoopHeads NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2024-11-27 20:24:22,460 INFO L151 ceAbstractionStarter]: Applying trace abstraction to ICFG fermat2-ll_unwindbound50.c that has 3 procedures, 25 locations, 1 initial locations, 1 loop locations, and 1 error locations. [2024-11-27 20:24:22,539 INFO L332 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2024-11-27 20:24:22,559 INFO L333 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mAutomataTypeConcurrency=PETRI_NET, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopHeads, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@55056fb1, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2024-11-27 20:24:22,559 INFO L334 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2024-11-27 20:24:22,564 INFO L276 IsEmpty]: Start isEmpty. Operand has 25 states, 17 states have (on average 1.411764705882353) internal successors, (24), 18 states have internal predecessors, (24), 4 states have call successors, (4), 2 states have call predecessors, (4), 2 states have return successors, (4), 4 states have call predecessors, (4), 4 states have call successors, (4) [2024-11-27 20:24:22,571 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2024-11-27 20:24:22,572 INFO L210 NwaCegarLoop]: Found error trace [2024-11-27 20:24:22,572 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-27 20:24:22,573 INFO L396 AbstractCegarLoop]: === Iteration 1 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-27 20:24:22,579 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-27 20:24:22,579 INFO L85 PathProgramCache]: Analyzing trace with hash 1086166160, now seen corresponding path program 1 times [2024-11-27 20:24:22,588 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-27 20:24:22,589 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [129600635] [2024-11-27 20:24:22,590 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-27 20:24:22,590 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-27 20:24:22,720 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-27 20:24:22,800 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-11-27 20:24:22,801 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-27 20:24:22,801 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [129600635] [2024-11-27 20:24:22,803 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [129600635] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-27 20:24:22,803 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1518381975] [2024-11-27 20:24:22,804 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-27 20:24:22,804 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-27 20:24:22,804 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4ce4be16-84b9-4d2f-a8a3-045f4ddaf82a/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-27 20:24:22,809 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4ce4be16-84b9-4d2f-a8a3-045f4ddaf82a/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-27 20:24:22,811 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4ce4be16-84b9-4d2f-a8a3-045f4ddaf82a/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2024-11-27 20:24:22,875 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-27 20:24:22,877 INFO L256 TraceCheckSpWp]: Trace formula consists of 61 conjuncts, 1 conjuncts are in the unsatisfiable core [2024-11-27 20:24:22,881 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-27 20:24:22,893 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-11-27 20:24:22,895 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-11-27 20:24:22,895 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1518381975] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-27 20:24:22,895 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-11-27 20:24:22,896 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [2] total 2 [2024-11-27 20:24:22,898 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [941348693] [2024-11-27 20:24:22,899 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-27 20:24:22,903 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 2 states [2024-11-27 20:24:22,903 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-27 20:24:22,926 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2024-11-27 20:24:22,927 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2024-11-27 20:24:22,929 INFO L87 Difference]: Start difference. First operand has 25 states, 17 states have (on average 1.411764705882353) internal successors, (24), 18 states have internal predecessors, (24), 4 states have call successors, (4), 2 states have call predecessors, (4), 2 states have return successors, (4), 4 states have call predecessors, (4), 4 states have call successors, (4) Second operand has 2 states, 2 states have (on average 6.0) internal successors, (12), 2 states have internal predecessors, (12), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (2), 1 states have call predecessors, (2), 2 states have call successors, (2) [2024-11-27 20:24:22,950 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-27 20:24:22,950 INFO L93 Difference]: Finished difference Result 47 states and 64 transitions. [2024-11-27 20:24:22,952 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-11-27 20:24:22,954 INFO L78 Accepts]: Start accepts. Automaton has has 2 states, 2 states have (on average 6.0) internal successors, (12), 2 states have internal predecessors, (12), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (2), 1 states have call predecessors, (2), 2 states have call successors, (2) Word has length 18 [2024-11-27 20:24:22,954 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-27 20:24:22,961 INFO L225 Difference]: With dead ends: 47 [2024-11-27 20:24:22,962 INFO L226 Difference]: Without dead ends: 21 [2024-11-27 20:24:22,966 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 19 SyntacticMatches, 0 SemanticMatches, 0 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2024-11-27 20:24:22,973 INFO L435 NwaCegarLoop]: 29 mSDtfsCounter, 0 mSDsluCounter, 0 mSDsCounter, 0 mSdLazyCounter, 0 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 29 SdHoareTripleChecker+Invalid, 0 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 0 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-27 20:24:22,975 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 29 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 0 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-27 20:24:22,991 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21 states. [2024-11-27 20:24:23,008 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21 to 21. [2024-11-27 20:24:23,009 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 21 states, 14 states have (on average 1.2857142857142858) internal successors, (18), 15 states have internal predecessors, (18), 4 states have call successors, (4), 2 states have call predecessors, (4), 2 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-27 20:24:23,015 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21 states to 21 states and 25 transitions. [2024-11-27 20:24:23,018 INFO L78 Accepts]: Start accepts. Automaton has 21 states and 25 transitions. Word has length 18 [2024-11-27 20:24:23,019 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-27 20:24:23,019 INFO L471 AbstractCegarLoop]: Abstraction has 21 states and 25 transitions. [2024-11-27 20:24:23,020 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 2 states, 2 states have (on average 6.0) internal successors, (12), 2 states have internal predecessors, (12), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (2), 1 states have call predecessors, (2), 2 states have call successors, (2) [2024-11-27 20:24:23,021 INFO L276 IsEmpty]: Start isEmpty. Operand 21 states and 25 transitions. [2024-11-27 20:24:23,022 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2024-11-27 20:24:23,023 INFO L210 NwaCegarLoop]: Found error trace [2024-11-27 20:24:23,023 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-27 20:24:23,034 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4ce4be16-84b9-4d2f-a8a3-045f4ddaf82a/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Ended with exit code 0 [2024-11-27 20:24:23,223 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 2 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4ce4be16-84b9-4d2f-a8a3-045f4ddaf82a/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable0 [2024-11-27 20:24:23,224 INFO L396 AbstractCegarLoop]: === Iteration 2 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-27 20:24:23,225 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-27 20:24:23,225 INFO L85 PathProgramCache]: Analyzing trace with hash 1316097620, now seen corresponding path program 1 times [2024-11-27 20:24:23,226 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-27 20:24:23,226 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1554117562] [2024-11-27 20:24:23,226 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-27 20:24:23,226 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-27 20:24:23,298 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unknown [2024-11-27 20:24:23,301 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1365958810] [2024-11-27 20:24:23,301 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-27 20:24:23,302 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-27 20:24:23,302 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4ce4be16-84b9-4d2f-a8a3-045f4ddaf82a/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-27 20:24:23,304 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4ce4be16-84b9-4d2f-a8a3-045f4ddaf82a/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-27 20:24:23,308 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4ce4be16-84b9-4d2f-a8a3-045f4ddaf82a/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2024-11-27 20:24:23,388 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-27 20:24:23,391 INFO L256 TraceCheckSpWp]: Trace formula consists of 65 conjuncts, 9 conjuncts are in the unsatisfiable core [2024-11-27 20:24:23,394 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-27 20:24:23,702 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-11-27 20:24:23,703 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-11-27 20:24:23,703 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-27 20:24:23,703 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1554117562] [2024-11-27 20:24:23,704 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2024-11-27 20:24:23,704 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1365958810] [2024-11-27 20:24:23,704 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1365958810] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-27 20:24:23,704 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-27 20:24:23,704 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-27 20:24:23,705 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1891061509] [2024-11-27 20:24:23,705 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-27 20:24:23,705 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-27 20:24:23,706 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-27 20:24:23,709 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-27 20:24:23,709 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-11-27 20:24:23,710 INFO L87 Difference]: Start difference. First operand 21 states and 25 transitions. Second operand has 5 states, 5 states have (on average 2.2) internal successors, (11), 4 states have internal predecessors, (11), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) [2024-11-27 20:24:24,765 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-27 20:24:24,765 INFO L93 Difference]: Finished difference Result 33 states and 40 transitions. [2024-11-27 20:24:24,766 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-11-27 20:24:24,766 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 2.2) internal successors, (11), 4 states have internal predecessors, (11), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) Word has length 19 [2024-11-27 20:24:24,766 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-27 20:24:24,767 INFO L225 Difference]: With dead ends: 33 [2024-11-27 20:24:24,767 INFO L226 Difference]: Without dead ends: 31 [2024-11-27 20:24:24,767 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 15 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2024-11-27 20:24:24,768 INFO L435 NwaCegarLoop]: 18 mSDtfsCounter, 5 mSDsluCounter, 51 mSDsCounter, 0 mSdLazyCounter, 30 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 6 SdHoareTripleChecker+Valid, 69 SdHoareTripleChecker+Invalid, 31 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 30 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.0s IncrementalHoareTripleChecker+Time [2024-11-27 20:24:24,769 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [6 Valid, 69 Invalid, 31 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 30 Invalid, 0 Unknown, 0 Unchecked, 1.0s Time] [2024-11-27 20:24:24,770 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 31 states. [2024-11-27 20:24:24,777 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 31 to 30. [2024-11-27 20:24:24,777 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 30 states, 21 states have (on average 1.3333333333333333) internal successors, (28), 22 states have internal predecessors, (28), 5 states have call successors, (5), 3 states have call predecessors, (5), 3 states have return successors, (4), 4 states have call predecessors, (4), 4 states have call successors, (4) [2024-11-27 20:24:24,778 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 30 states to 30 states and 37 transitions. [2024-11-27 20:24:24,778 INFO L78 Accepts]: Start accepts. Automaton has 30 states and 37 transitions. Word has length 19 [2024-11-27 20:24:24,780 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-27 20:24:24,780 INFO L471 AbstractCegarLoop]: Abstraction has 30 states and 37 transitions. [2024-11-27 20:24:24,781 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 2.2) internal successors, (11), 4 states have internal predecessors, (11), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) [2024-11-27 20:24:24,784 INFO L276 IsEmpty]: Start isEmpty. Operand 30 states and 37 transitions. [2024-11-27 20:24:24,785 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2024-11-27 20:24:24,785 INFO L210 NwaCegarLoop]: Found error trace [2024-11-27 20:24:24,785 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-27 20:24:24,790 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4ce4be16-84b9-4d2f-a8a3-045f4ddaf82a/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Forceful destruction successful, exit code 0 [2024-11-27 20:24:24,985 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1,3 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4ce4be16-84b9-4d2f-a8a3-045f4ddaf82a/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-27 20:24:24,986 INFO L396 AbstractCegarLoop]: === Iteration 3 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-27 20:24:24,986 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-27 20:24:24,986 INFO L85 PathProgramCache]: Analyzing trace with hash 1318004244, now seen corresponding path program 1 times [2024-11-27 20:24:24,986 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-27 20:24:24,986 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [868250952] [2024-11-27 20:24:24,986 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-27 20:24:24,987 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-27 20:24:25,003 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-27 20:24:25,144 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-11-27 20:24:25,144 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-27 20:24:25,145 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [868250952] [2024-11-27 20:24:25,145 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [868250952] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-27 20:24:25,145 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-27 20:24:25,145 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-27 20:24:25,146 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1108670022] [2024-11-27 20:24:25,146 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-27 20:24:25,146 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-27 20:24:25,146 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-27 20:24:25,147 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-27 20:24:25,147 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-27 20:24:25,148 INFO L87 Difference]: Start difference. First operand 30 states and 37 transitions. Second operand has 4 states, 4 states have (on average 2.75) internal successors, (11), 4 states have internal predecessors, (11), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) [2024-11-27 20:24:25,176 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-27 20:24:25,177 INFO L93 Difference]: Finished difference Result 39 states and 46 transitions. [2024-11-27 20:24:25,177 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-27 20:24:25,178 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 2.75) internal successors, (11), 4 states have internal predecessors, (11), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) Word has length 19 [2024-11-27 20:24:25,178 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-27 20:24:25,179 INFO L225 Difference]: With dead ends: 39 [2024-11-27 20:24:25,180 INFO L226 Difference]: Without dead ends: 32 [2024-11-27 20:24:25,180 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-27 20:24:25,181 INFO L435 NwaCegarLoop]: 23 mSDtfsCounter, 5 mSDsluCounter, 34 mSDsCounter, 0 mSdLazyCounter, 8 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 5 SdHoareTripleChecker+Valid, 57 SdHoareTripleChecker+Invalid, 8 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 8 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-27 20:24:25,182 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [5 Valid, 57 Invalid, 8 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 8 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-27 20:24:25,184 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32 states. [2024-11-27 20:24:25,196 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32 to 32. [2024-11-27 20:24:25,196 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 32 states, 23 states have (on average 1.3043478260869565) internal successors, (30), 24 states have internal predecessors, (30), 5 states have call successors, (5), 3 states have call predecessors, (5), 3 states have return successors, (4), 4 states have call predecessors, (4), 4 states have call successors, (4) [2024-11-27 20:24:25,197 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 32 states to 32 states and 39 transitions. [2024-11-27 20:24:25,197 INFO L78 Accepts]: Start accepts. Automaton has 32 states and 39 transitions. Word has length 19 [2024-11-27 20:24:25,198 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-27 20:24:25,198 INFO L471 AbstractCegarLoop]: Abstraction has 32 states and 39 transitions. [2024-11-27 20:24:25,198 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 2.75) internal successors, (11), 4 states have internal predecessors, (11), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) [2024-11-27 20:24:25,198 INFO L276 IsEmpty]: Start isEmpty. Operand 32 states and 39 transitions. [2024-11-27 20:24:25,198 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2024-11-27 20:24:25,198 INFO L210 NwaCegarLoop]: Found error trace [2024-11-27 20:24:25,198 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-27 20:24:25,199 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2024-11-27 20:24:25,199 INFO L396 AbstractCegarLoop]: === Iteration 4 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-27 20:24:25,199 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-27 20:24:25,199 INFO L85 PathProgramCache]: Analyzing trace with hash -1691684484, now seen corresponding path program 1 times [2024-11-27 20:24:25,199 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-27 20:24:25,202 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1712566318] [2024-11-27 20:24:25,202 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-27 20:24:25,202 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-27 20:24:25,242 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-27 20:24:25,574 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-11-27 20:24:25,575 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-27 20:24:25,575 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1712566318] [2024-11-27 20:24:25,575 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1712566318] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-27 20:24:25,575 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [35938199] [2024-11-27 20:24:25,575 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-27 20:24:25,576 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-27 20:24:25,576 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4ce4be16-84b9-4d2f-a8a3-045f4ddaf82a/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-27 20:24:25,580 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4ce4be16-84b9-4d2f-a8a3-045f4ddaf82a/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-27 20:24:25,583 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4ce4be16-84b9-4d2f-a8a3-045f4ddaf82a/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2024-11-27 20:24:25,639 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-27 20:24:25,640 INFO L256 TraceCheckSpWp]: Trace formula consists of 76 conjuncts, 10 conjuncts are in the unsatisfiable core [2024-11-27 20:24:25,642 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-27 20:24:25,755 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-11-27 20:24:25,755 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-27 20:24:25,935 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-11-27 20:24:25,935 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [35938199] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-27 20:24:25,935 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-27 20:24:25,935 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 8, 8] total 12 [2024-11-27 20:24:25,935 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [806015141] [2024-11-27 20:24:25,935 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-27 20:24:25,936 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 12 states [2024-11-27 20:24:25,936 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-27 20:24:25,936 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2024-11-27 20:24:25,936 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=31, Invalid=101, Unknown=0, NotChecked=0, Total=132 [2024-11-27 20:24:25,937 INFO L87 Difference]: Start difference. First operand 32 states and 39 transitions. Second operand has 12 states, 11 states have (on average 1.9090909090909092) internal successors, (21), 8 states have internal predecessors, (21), 2 states have call successors, (5), 3 states have call predecessors, (5), 2 states have return successors, (5), 4 states have call predecessors, (5), 1 states have call successors, (5) [2024-11-27 20:24:26,086 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-27 20:24:26,088 INFO L93 Difference]: Finished difference Result 39 states and 45 transitions. [2024-11-27 20:24:26,088 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2024-11-27 20:24:26,089 INFO L78 Accepts]: Start accepts. Automaton has has 12 states, 11 states have (on average 1.9090909090909092) internal successors, (21), 8 states have internal predecessors, (21), 2 states have call successors, (5), 3 states have call predecessors, (5), 2 states have return successors, (5), 4 states have call predecessors, (5), 1 states have call successors, (5) Word has length 25 [2024-11-27 20:24:26,089 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-27 20:24:26,090 INFO L225 Difference]: With dead ends: 39 [2024-11-27 20:24:26,090 INFO L226 Difference]: Without dead ends: 34 [2024-11-27 20:24:26,091 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 58 GetRequests, 45 SyntacticMatches, 2 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 26 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=39, Invalid=117, Unknown=0, NotChecked=0, Total=156 [2024-11-27 20:24:26,092 INFO L435 NwaCegarLoop]: 18 mSDtfsCounter, 8 mSDsluCounter, 104 mSDsCounter, 0 mSdLazyCounter, 60 mSolverCounterSat, 5 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 8 SdHoareTripleChecker+Valid, 122 SdHoareTripleChecker+Invalid, 65 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 5 IncrementalHoareTripleChecker+Valid, 60 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-27 20:24:26,093 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [8 Valid, 122 Invalid, 65 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [5 Valid, 60 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-27 20:24:26,094 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34 states. [2024-11-27 20:24:26,106 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34 to 25. [2024-11-27 20:24:26,107 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 25 states, 18 states have (on average 1.1111111111111112) internal successors, (20), 18 states have internal predecessors, (20), 4 states have call successors, (4), 3 states have call predecessors, (4), 2 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-27 20:24:26,109 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25 states to 25 states and 27 transitions. [2024-11-27 20:24:26,110 INFO L78 Accepts]: Start accepts. Automaton has 25 states and 27 transitions. Word has length 25 [2024-11-27 20:24:26,111 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-27 20:24:26,111 INFO L471 AbstractCegarLoop]: Abstraction has 25 states and 27 transitions. [2024-11-27 20:24:26,111 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 12 states, 11 states have (on average 1.9090909090909092) internal successors, (21), 8 states have internal predecessors, (21), 2 states have call successors, (5), 3 states have call predecessors, (5), 2 states have return successors, (5), 4 states have call predecessors, (5), 1 states have call successors, (5) [2024-11-27 20:24:26,112 INFO L276 IsEmpty]: Start isEmpty. Operand 25 states and 27 transitions. [2024-11-27 20:24:26,112 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2024-11-27 20:24:26,113 INFO L210 NwaCegarLoop]: Found error trace [2024-11-27 20:24:26,113 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-27 20:24:26,123 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4ce4be16-84b9-4d2f-a8a3-045f4ddaf82a/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Forceful destruction successful, exit code 0 [2024-11-27 20:24:26,314 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3,4 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4ce4be16-84b9-4d2f-a8a3-045f4ddaf82a/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-27 20:24:26,314 INFO L396 AbstractCegarLoop]: === Iteration 5 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-27 20:24:26,315 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-27 20:24:26,315 INFO L85 PathProgramCache]: Analyzing trace with hash -145551231, now seen corresponding path program 1 times [2024-11-27 20:24:26,315 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-27 20:24:26,315 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [104972811] [2024-11-27 20:24:26,315 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-27 20:24:26,315 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-27 20:24:26,331 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-27 20:24:26,417 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-11-27 20:24:26,417 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-27 20:24:26,418 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [104972811] [2024-11-27 20:24:26,418 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [104972811] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-27 20:24:26,418 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1471520777] [2024-11-27 20:24:26,418 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-27 20:24:26,418 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-27 20:24:26,418 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4ce4be16-84b9-4d2f-a8a3-045f4ddaf82a/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-27 20:24:26,422 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4ce4be16-84b9-4d2f-a8a3-045f4ddaf82a/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-27 20:24:26,424 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4ce4be16-84b9-4d2f-a8a3-045f4ddaf82a/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2024-11-27 20:24:26,485 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-27 20:24:26,490 INFO L256 TraceCheckSpWp]: Trace formula consists of 85 conjuncts, 5 conjuncts are in the unsatisfiable core [2024-11-27 20:24:26,492 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-27 20:24:26,570 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-11-27 20:24:26,570 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-27 20:24:26,662 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-11-27 20:24:26,662 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1471520777] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-27 20:24:26,662 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-27 20:24:26,663 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 4, 5] total 8 [2024-11-27 20:24:26,663 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1502294854] [2024-11-27 20:24:26,663 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-27 20:24:26,667 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2024-11-27 20:24:26,667 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-27 20:24:26,668 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2024-11-27 20:24:26,668 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=36, Unknown=0, NotChecked=0, Total=56 [2024-11-27 20:24:26,668 INFO L87 Difference]: Start difference. First operand 25 states and 27 transitions. Second operand has 8 states, 8 states have (on average 4.125) internal successors, (33), 8 states have internal predecessors, (33), 5 states have call successors, (10), 4 states have call predecessors, (10), 3 states have return successors, (9), 4 states have call predecessors, (9), 4 states have call successors, (9) [2024-11-27 20:24:26,802 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-27 20:24:26,803 INFO L93 Difference]: Finished difference Result 57 states and 64 transitions. [2024-11-27 20:24:26,803 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2024-11-27 20:24:26,803 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 4.125) internal successors, (33), 8 states have internal predecessors, (33), 5 states have call successors, (10), 4 states have call predecessors, (10), 3 states have return successors, (9), 4 states have call predecessors, (9), 4 states have call successors, (9) Word has length 28 [2024-11-27 20:24:26,804 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-27 20:24:26,806 INFO L225 Difference]: With dead ends: 57 [2024-11-27 20:24:26,807 INFO L226 Difference]: Without dead ends: 52 [2024-11-27 20:24:26,807 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 62 GetRequests, 53 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=40, Invalid=70, Unknown=0, NotChecked=0, Total=110 [2024-11-27 20:24:26,808 INFO L435 NwaCegarLoop]: 22 mSDtfsCounter, 21 mSDsluCounter, 70 mSDsCounter, 0 mSdLazyCounter, 24 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 21 SdHoareTripleChecker+Valid, 92 SdHoareTripleChecker+Invalid, 26 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 24 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-27 20:24:26,809 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [21 Valid, 92 Invalid, 26 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 24 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-27 20:24:26,809 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 52 states. [2024-11-27 20:24:26,832 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 52 to 52. [2024-11-27 20:24:26,832 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 52 states, 39 states have (on average 1.1282051282051282) internal successors, (44), 39 states have internal predecessors, (44), 7 states have call successors, (7), 6 states have call predecessors, (7), 5 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-11-27 20:24:26,833 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 52 states to 52 states and 57 transitions. [2024-11-27 20:24:26,835 INFO L78 Accepts]: Start accepts. Automaton has 52 states and 57 transitions. Word has length 28 [2024-11-27 20:24:26,836 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-27 20:24:26,836 INFO L471 AbstractCegarLoop]: Abstraction has 52 states and 57 transitions. [2024-11-27 20:24:26,836 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 4.125) internal successors, (33), 8 states have internal predecessors, (33), 5 states have call successors, (10), 4 states have call predecessors, (10), 3 states have return successors, (9), 4 states have call predecessors, (9), 4 states have call successors, (9) [2024-11-27 20:24:26,836 INFO L276 IsEmpty]: Start isEmpty. Operand 52 states and 57 transitions. [2024-11-27 20:24:26,837 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2024-11-27 20:24:26,837 INFO L210 NwaCegarLoop]: Found error trace [2024-11-27 20:24:26,837 INFO L218 NwaCegarLoop]: trace histogram [5, 5, 4, 4, 4, 4, 4, 4, 4, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-27 20:24:26,848 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4ce4be16-84b9-4d2f-a8a3-045f4ddaf82a/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Ended with exit code 0 [2024-11-27 20:24:27,037 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4,5 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4ce4be16-84b9-4d2f-a8a3-045f4ddaf82a/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-27 20:24:27,038 INFO L396 AbstractCegarLoop]: === Iteration 6 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-27 20:24:27,038 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-27 20:24:27,038 INFO L85 PathProgramCache]: Analyzing trace with hash -1700883628, now seen corresponding path program 2 times [2024-11-27 20:24:27,038 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-27 20:24:27,039 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1899841886] [2024-11-27 20:24:27,039 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2024-11-27 20:24:27,039 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-27 20:24:27,065 INFO L229 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2024-11-27 20:24:27,066 INFO L230 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-27 20:24:27,405 INFO L134 CoverageAnalysis]: Checked inductivity of 74 backedges. 8 proven. 38 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-11-27 20:24:27,405 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-27 20:24:27,406 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1899841886] [2024-11-27 20:24:27,406 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1899841886] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-27 20:24:27,406 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1066802754] [2024-11-27 20:24:27,406 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2024-11-27 20:24:27,406 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-27 20:24:27,407 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4ce4be16-84b9-4d2f-a8a3-045f4ddaf82a/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-27 20:24:27,409 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4ce4be16-84b9-4d2f-a8a3-045f4ddaf82a/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-27 20:24:27,412 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4ce4be16-84b9-4d2f-a8a3-045f4ddaf82a/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2024-11-27 20:24:27,501 INFO L229 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2024-11-27 20:24:27,501 INFO L230 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-27 20:24:27,502 INFO L256 TraceCheckSpWp]: Trace formula consists of 145 conjuncts, 11 conjuncts are in the unsatisfiable core [2024-11-27 20:24:27,505 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-27 20:24:27,637 INFO L134 CoverageAnalysis]: Checked inductivity of 74 backedges. 8 proven. 62 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-11-27 20:24:27,638 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-27 20:24:27,856 INFO L134 CoverageAnalysis]: Checked inductivity of 74 backedges. 8 proven. 38 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-11-27 20:24:27,857 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1066802754] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-27 20:24:27,857 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-27 20:24:27,857 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 7, 8] total 15 [2024-11-27 20:24:27,857 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [564010332] [2024-11-27 20:24:27,857 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-27 20:24:27,858 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 15 states [2024-11-27 20:24:27,859 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-27 20:24:27,860 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2024-11-27 20:24:27,862 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=81, Invalid=129, Unknown=0, NotChecked=0, Total=210 [2024-11-27 20:24:27,862 INFO L87 Difference]: Start difference. First operand 52 states and 57 transitions. Second operand has 15 states, 15 states have (on average 4.533333333333333) internal successors, (68), 15 states have internal predecessors, (68), 11 states have call successors, (19), 7 states have call predecessors, (19), 6 states have return successors, (18), 10 states have call predecessors, (18), 10 states have call successors, (18) [2024-11-27 20:24:28,184 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-27 20:24:28,184 INFO L93 Difference]: Finished difference Result 111 states and 127 transitions. [2024-11-27 20:24:28,185 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2024-11-27 20:24:28,185 INFO L78 Accepts]: Start accepts. Automaton has has 15 states, 15 states have (on average 4.533333333333333) internal successors, (68), 15 states have internal predecessors, (68), 11 states have call successors, (19), 7 states have call predecessors, (19), 6 states have return successors, (18), 10 states have call predecessors, (18), 10 states have call successors, (18) Word has length 55 [2024-11-27 20:24:28,186 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-27 20:24:28,187 INFO L225 Difference]: With dead ends: 111 [2024-11-27 20:24:28,189 INFO L226 Difference]: Without dead ends: 106 [2024-11-27 20:24:28,190 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 125 GetRequests, 104 SyntacticMatches, 0 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 65 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=184, Invalid=322, Unknown=0, NotChecked=0, Total=506 [2024-11-27 20:24:28,191 INFO L435 NwaCegarLoop]: 22 mSDtfsCounter, 63 mSDsluCounter, 114 mSDsCounter, 0 mSdLazyCounter, 48 mSolverCounterSat, 8 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 63 SdHoareTripleChecker+Valid, 136 SdHoareTripleChecker+Invalid, 56 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 8 IncrementalHoareTripleChecker+Valid, 48 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-27 20:24:28,192 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [63 Valid, 136 Invalid, 56 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [8 Valid, 48 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-27 20:24:28,193 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 106 states. [2024-11-27 20:24:28,243 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 106 to 106. [2024-11-27 20:24:28,243 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 106 states, 81 states have (on average 1.1358024691358024) internal successors, (92), 81 states have internal predecessors, (92), 13 states have call successors, (13), 12 states have call predecessors, (13), 11 states have return successors, (12), 12 states have call predecessors, (12), 12 states have call successors, (12) [2024-11-27 20:24:28,244 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 106 states to 106 states and 117 transitions. [2024-11-27 20:24:28,245 INFO L78 Accepts]: Start accepts. Automaton has 106 states and 117 transitions. Word has length 55 [2024-11-27 20:24:28,245 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-27 20:24:28,245 INFO L471 AbstractCegarLoop]: Abstraction has 106 states and 117 transitions. [2024-11-27 20:24:28,245 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 15 states, 15 states have (on average 4.533333333333333) internal successors, (68), 15 states have internal predecessors, (68), 11 states have call successors, (19), 7 states have call predecessors, (19), 6 states have return successors, (18), 10 states have call predecessors, (18), 10 states have call successors, (18) [2024-11-27 20:24:28,248 INFO L276 IsEmpty]: Start isEmpty. Operand 106 states and 117 transitions. [2024-11-27 20:24:28,250 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 110 [2024-11-27 20:24:28,252 INFO L210 NwaCegarLoop]: Found error trace [2024-11-27 20:24:28,253 INFO L218 NwaCegarLoop]: trace histogram [11, 11, 10, 10, 10, 10, 10, 10, 10, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-27 20:24:28,263 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4ce4be16-84b9-4d2f-a8a3-045f4ddaf82a/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Ended with exit code 0 [2024-11-27 20:24:28,457 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 6 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4ce4be16-84b9-4d2f-a8a3-045f4ddaf82a/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable5 [2024-11-27 20:24:28,457 INFO L396 AbstractCegarLoop]: === Iteration 7 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-27 20:24:28,457 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-27 20:24:28,457 INFO L85 PathProgramCache]: Analyzing trace with hash 592653108, now seen corresponding path program 3 times [2024-11-27 20:24:28,458 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-27 20:24:28,458 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1147248996] [2024-11-27 20:24:28,458 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2024-11-27 20:24:28,458 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-27 20:24:28,553 INFO L229 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 11 check-sat command(s) [2024-11-27 20:24:28,553 INFO L230 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-27 20:24:29,740 INFO L134 CoverageAnalysis]: Checked inductivity of 449 backedges. 20 proven. 245 refuted. 0 times theorem prover too weak. 184 trivial. 0 not checked. [2024-11-27 20:24:29,740 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-27 20:24:29,741 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1147248996] [2024-11-27 20:24:29,741 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1147248996] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-27 20:24:29,741 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1401614761] [2024-11-27 20:24:29,741 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2024-11-27 20:24:29,741 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-27 20:24:29,741 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4ce4be16-84b9-4d2f-a8a3-045f4ddaf82a/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-27 20:24:29,743 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4ce4be16-84b9-4d2f-a8a3-045f4ddaf82a/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-27 20:24:29,746 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4ce4be16-84b9-4d2f-a8a3-045f4ddaf82a/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2024-11-27 20:24:30,043 INFO L229 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 11 check-sat command(s) [2024-11-27 20:24:30,044 INFO L230 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-27 20:24:30,046 INFO L256 TraceCheckSpWp]: Trace formula consists of 265 conjuncts, 23 conjuncts are in the unsatisfiable core [2024-11-27 20:24:30,052 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-27 20:24:30,339 INFO L134 CoverageAnalysis]: Checked inductivity of 449 backedges. 20 proven. 425 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-11-27 20:24:30,340 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-27 20:24:31,154 INFO L134 CoverageAnalysis]: Checked inductivity of 449 backedges. 20 proven. 245 refuted. 0 times theorem prover too weak. 184 trivial. 0 not checked. [2024-11-27 20:24:31,154 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1401614761] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-27 20:24:31,154 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-27 20:24:31,154 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [21, 13, 14] total 33 [2024-11-27 20:24:31,155 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [231698024] [2024-11-27 20:24:31,155 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-27 20:24:31,156 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 33 states [2024-11-27 20:24:31,156 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-27 20:24:31,162 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 33 interpolants. [2024-11-27 20:24:31,162 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=441, Invalid=615, Unknown=0, NotChecked=0, Total=1056 [2024-11-27 20:24:31,163 INFO L87 Difference]: Start difference. First operand 106 states and 117 transitions. Second operand has 33 states, 33 states have (on average 4.424242424242424) internal successors, (146), 33 states have internal predecessors, (146), 23 states have call successors, (37), 13 states have call predecessors, (37), 12 states have return successors, (36), 22 states have call predecessors, (36), 22 states have call successors, (36) [2024-11-27 20:24:32,107 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-27 20:24:32,107 INFO L93 Difference]: Finished difference Result 219 states and 253 transitions. [2024-11-27 20:24:32,108 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 46 states. [2024-11-27 20:24:32,108 INFO L78 Accepts]: Start accepts. Automaton has has 33 states, 33 states have (on average 4.424242424242424) internal successors, (146), 33 states have internal predecessors, (146), 23 states have call successors, (37), 13 states have call predecessors, (37), 12 states have return successors, (36), 22 states have call predecessors, (36), 22 states have call successors, (36) Word has length 109 [2024-11-27 20:24:32,112 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-27 20:24:32,114 INFO L225 Difference]: With dead ends: 219 [2024-11-27 20:24:32,114 INFO L226 Difference]: Without dead ends: 214 [2024-11-27 20:24:32,119 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 251 GetRequests, 206 SyntacticMatches, 0 SemanticMatches, 45 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 238 ImplicationChecksByTransitivity, 1.3s TimeCoverageRelationStatistics Valid=796, Invalid=1366, Unknown=0, NotChecked=0, Total=2162 [2024-11-27 20:24:32,120 INFO L435 NwaCegarLoop]: 22 mSDtfsCounter, 159 mSDsluCounter, 226 mSDsCounter, 0 mSdLazyCounter, 136 mSolverCounterSat, 16 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 159 SdHoareTripleChecker+Valid, 248 SdHoareTripleChecker+Invalid, 152 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 16 IncrementalHoareTripleChecker+Valid, 136 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2024-11-27 20:24:32,120 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [159 Valid, 248 Invalid, 152 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [16 Valid, 136 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2024-11-27 20:24:32,122 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 214 states. [2024-11-27 20:24:32,210 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 214 to 214. [2024-11-27 20:24:32,212 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 214 states, 165 states have (on average 1.1393939393939394) internal successors, (188), 165 states have internal predecessors, (188), 25 states have call successors, (25), 24 states have call predecessors, (25), 23 states have return successors, (24), 24 states have call predecessors, (24), 24 states have call successors, (24) [2024-11-27 20:24:32,214 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 214 states to 214 states and 237 transitions. [2024-11-27 20:24:32,217 INFO L78 Accepts]: Start accepts. Automaton has 214 states and 237 transitions. Word has length 109 [2024-11-27 20:24:32,217 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-27 20:24:32,217 INFO L471 AbstractCegarLoop]: Abstraction has 214 states and 237 transitions. [2024-11-27 20:24:32,218 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 33 states, 33 states have (on average 4.424242424242424) internal successors, (146), 33 states have internal predecessors, (146), 23 states have call successors, (37), 13 states have call predecessors, (37), 12 states have return successors, (36), 22 states have call predecessors, (36), 22 states have call successors, (36) [2024-11-27 20:24:32,219 INFO L276 IsEmpty]: Start isEmpty. Operand 214 states and 237 transitions. [2024-11-27 20:24:32,225 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 218 [2024-11-27 20:24:32,225 INFO L210 NwaCegarLoop]: Found error trace [2024-11-27 20:24:32,225 INFO L218 NwaCegarLoop]: trace histogram [23, 23, 22, 22, 22, 22, 22, 22, 22, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-27 20:24:32,231 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4ce4be16-84b9-4d2f-a8a3-045f4ddaf82a/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Forceful destruction successful, exit code 0 [2024-11-27 20:24:32,426 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6,7 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4ce4be16-84b9-4d2f-a8a3-045f4ddaf82a/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-27 20:24:32,426 INFO L396 AbstractCegarLoop]: === Iteration 8 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-27 20:24:32,427 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-27 20:24:32,427 INFO L85 PathProgramCache]: Analyzing trace with hash 1359241972, now seen corresponding path program 4 times [2024-11-27 20:24:32,427 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-27 20:24:32,427 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1908764356] [2024-11-27 20:24:32,427 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2024-11-27 20:24:32,427 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-27 20:24:32,628 INFO L229 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2024-11-27 20:24:32,628 INFO L230 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-27 20:24:35,609 INFO L134 CoverageAnalysis]: Checked inductivity of 2171 backedges. 44 proven. 1199 refuted. 0 times theorem prover too weak. 928 trivial. 0 not checked. [2024-11-27 20:24:35,610 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-27 20:24:35,610 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1908764356] [2024-11-27 20:24:35,610 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1908764356] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-27 20:24:35,610 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [602527565] [2024-11-27 20:24:35,611 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2024-11-27 20:24:35,611 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-27 20:24:35,611 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4ce4be16-84b9-4d2f-a8a3-045f4ddaf82a/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-27 20:24:35,614 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4ce4be16-84b9-4d2f-a8a3-045f4ddaf82a/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-27 20:24:35,619 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4ce4be16-84b9-4d2f-a8a3-045f4ddaf82a/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2024-11-27 20:24:35,825 INFO L229 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2024-11-27 20:24:35,826 INFO L230 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-27 20:24:35,830 INFO L256 TraceCheckSpWp]: Trace formula consists of 505 conjuncts, 47 conjuncts are in the unsatisfiable core [2024-11-27 20:24:35,845 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-27 20:24:36,431 INFO L134 CoverageAnalysis]: Checked inductivity of 2171 backedges. 44 proven. 2123 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-11-27 20:24:36,432 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-27 20:24:38,361 INFO L134 CoverageAnalysis]: Checked inductivity of 2171 backedges. 44 proven. 1199 refuted. 0 times theorem prover too weak. 928 trivial. 0 not checked. [2024-11-27 20:24:38,362 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [602527565] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-27 20:24:38,362 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-27 20:24:38,362 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [31, 25, 26] total 57 [2024-11-27 20:24:38,362 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2128705720] [2024-11-27 20:24:38,363 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-27 20:24:38,364 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 57 states [2024-11-27 20:24:38,364 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-27 20:24:38,367 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 57 interpolants. [2024-11-27 20:24:38,369 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=1269, Invalid=1923, Unknown=0, NotChecked=0, Total=3192 [2024-11-27 20:24:38,370 INFO L87 Difference]: Start difference. First operand 214 states and 237 transitions. Second operand has 57 states, 56 states have (on average 4.892857142857143) internal successors, (274), 56 states have internal predecessors, (274), 49 states have call successors, (74), 26 states have call predecessors, (74), 24 states have return successors, (72), 47 states have call predecessors, (72), 47 states have call successors, (72) [2024-11-27 20:24:41,126 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-27 20:24:41,126 INFO L93 Difference]: Finished difference Result 435 states and 505 transitions. [2024-11-27 20:24:41,127 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 94 states. [2024-11-27 20:24:41,127 INFO L78 Accepts]: Start accepts. Automaton has has 57 states, 56 states have (on average 4.892857142857143) internal successors, (274), 56 states have internal predecessors, (274), 49 states have call successors, (74), 26 states have call predecessors, (74), 24 states have return successors, (72), 47 states have call predecessors, (72), 47 states have call successors, (72) Word has length 217 [2024-11-27 20:24:41,128 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-27 20:24:41,131 INFO L225 Difference]: With dead ends: 435 [2024-11-27 20:24:41,131 INFO L226 Difference]: Without dead ends: 430 [2024-11-27 20:24:41,136 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 507 GetRequests, 408 SyntacticMatches, 0 SemanticMatches, 99 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1578 ImplicationChecksByTransitivity, 3.9s TimeCoverageRelationStatistics Valid=3446, Invalid=6654, Unknown=0, NotChecked=0, Total=10100 [2024-11-27 20:24:41,137 INFO L435 NwaCegarLoop]: 22 mSDtfsCounter, 361 mSDsluCounter, 413 mSDsCounter, 0 mSdLazyCounter, 226 mSolverCounterSat, 45 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 361 SdHoareTripleChecker+Valid, 435 SdHoareTripleChecker+Invalid, 271 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 45 IncrementalHoareTripleChecker+Valid, 226 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2024-11-27 20:24:41,138 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [361 Valid, 435 Invalid, 271 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [45 Valid, 226 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2024-11-27 20:24:41,139 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 430 states. [2024-11-27 20:24:41,227 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 430 to 430. [2024-11-27 20:24:41,228 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 430 states, 333 states have (on average 1.1411411411411412) internal successors, (380), 333 states have internal predecessors, (380), 49 states have call successors, (49), 48 states have call predecessors, (49), 47 states have return successors, (48), 48 states have call predecessors, (48), 48 states have call successors, (48) [2024-11-27 20:24:41,231 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 430 states to 430 states and 477 transitions. [2024-11-27 20:24:41,232 INFO L78 Accepts]: Start accepts. Automaton has 430 states and 477 transitions. Word has length 217 [2024-11-27 20:24:41,233 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-27 20:24:41,233 INFO L471 AbstractCegarLoop]: Abstraction has 430 states and 477 transitions. [2024-11-27 20:24:41,233 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 57 states, 56 states have (on average 4.892857142857143) internal successors, (274), 56 states have internal predecessors, (274), 49 states have call successors, (74), 26 states have call predecessors, (74), 24 states have return successors, (72), 47 states have call predecessors, (72), 47 states have call successors, (72) [2024-11-27 20:24:41,234 INFO L276 IsEmpty]: Start isEmpty. Operand 430 states and 477 transitions. [2024-11-27 20:24:41,243 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 434 [2024-11-27 20:24:41,243 INFO L210 NwaCegarLoop]: Found error trace [2024-11-27 20:24:41,244 INFO L218 NwaCegarLoop]: trace histogram [47, 47, 46, 46, 46, 46, 46, 46, 46, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-27 20:24:41,256 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4ce4be16-84b9-4d2f-a8a3-045f4ddaf82a/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Ended with exit code 0 [2024-11-27 20:24:41,448 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7,8 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4ce4be16-84b9-4d2f-a8a3-045f4ddaf82a/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-27 20:24:41,448 INFO L396 AbstractCegarLoop]: === Iteration 9 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-27 20:24:41,449 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-27 20:24:41,449 INFO L85 PathProgramCache]: Analyzing trace with hash 1200550516, now seen corresponding path program 5 times [2024-11-27 20:24:41,449 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-27 20:24:41,449 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [199344461] [2024-11-27 20:24:41,449 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2024-11-27 20:24:41,449 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-27 20:24:41,994 INFO L229 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 47 check-sat command(s) [2024-11-27 20:24:41,995 INFO L230 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-27 20:24:47,985 INFO L134 CoverageAnalysis]: Checked inductivity of 9503 backedges. 92 proven. 5267 refuted. 0 times theorem prover too weak. 4144 trivial. 0 not checked. [2024-11-27 20:24:47,985 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-27 20:24:47,985 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [199344461] [2024-11-27 20:24:47,985 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [199344461] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-27 20:24:47,986 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1905702764] [2024-11-27 20:24:47,986 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2024-11-27 20:24:47,986 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-27 20:24:47,986 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4ce4be16-84b9-4d2f-a8a3-045f4ddaf82a/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-27 20:24:47,988 INFO L229 MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4ce4be16-84b9-4d2f-a8a3-045f4ddaf82a/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-27 20:24:47,991 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4ce4be16-84b9-4d2f-a8a3-045f4ddaf82a/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2024-11-27 20:24:50,956 INFO L229 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 47 check-sat command(s) [2024-11-27 20:24:50,956 INFO L230 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-27 20:24:50,964 INFO L256 TraceCheckSpWp]: Trace formula consists of 985 conjuncts, 95 conjuncts are in the unsatisfiable core [2024-11-27 20:24:50,974 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-27 20:24:51,763 INFO L134 CoverageAnalysis]: Checked inductivity of 9503 backedges. 92 proven. 9407 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-11-27 20:24:51,763 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-27 20:24:53,829 INFO L134 CoverageAnalysis]: Checked inductivity of 9503 backedges. 92 proven. 5267 refuted. 0 times theorem prover too weak. 4144 trivial. 0 not checked. [2024-11-27 20:24:53,829 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1905702764] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-27 20:24:53,829 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-27 20:24:53,829 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [51, 49, 50] total 55 [2024-11-27 20:24:53,830 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1289173235] [2024-11-27 20:24:53,830 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-27 20:24:53,831 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 55 states [2024-11-27 20:24:53,831 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-27 20:24:53,836 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 55 interpolants. [2024-11-27 20:24:53,837 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=1380, Invalid=1590, Unknown=0, NotChecked=0, Total=2970 [2024-11-27 20:24:53,839 INFO L87 Difference]: Start difference. First operand 430 states and 477 transitions. Second operand has 55 states, 55 states have (on average 6.509090909090909) internal successors, (358), 55 states have internal predecessors, (358), 51 states have call successors, (102), 49 states have call predecessors, (102), 48 states have return successors, (101), 50 states have call predecessors, (101), 50 states have call successors, (101) [2024-11-27 20:24:56,046 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-27 20:24:56,047 INFO L93 Difference]: Finished difference Result 471 states and 525 transitions. [2024-11-27 20:24:56,047 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 102 states. [2024-11-27 20:24:56,047 INFO L78 Accepts]: Start accepts. Automaton has has 55 states, 55 states have (on average 6.509090909090909) internal successors, (358), 55 states have internal predecessors, (358), 51 states have call successors, (102), 49 states have call predecessors, (102), 48 states have return successors, (101), 50 states have call predecessors, (101), 50 states have call successors, (101) Word has length 433 [2024-11-27 20:24:56,049 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-27 20:24:56,056 INFO L225 Difference]: With dead ends: 471 [2024-11-27 20:24:56,057 INFO L226 Difference]: Without dead ends: 466 [2024-11-27 20:24:56,059 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 963 GetRequests, 818 SyntacticMatches, 44 SemanticMatches, 101 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2482 ImplicationChecksByTransitivity, 4.3s TimeCoverageRelationStatistics Valid=3926, Invalid=6580, Unknown=0, NotChecked=0, Total=10506 [2024-11-27 20:24:56,060 INFO L435 NwaCegarLoop]: 22 mSDtfsCounter, 165 mSDsluCounter, 360 mSDsCounter, 0 mSdLazyCounter, 215 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 165 SdHoareTripleChecker+Valid, 382 SdHoareTripleChecker+Invalid, 216 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 215 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2024-11-27 20:24:56,060 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [165 Valid, 382 Invalid, 216 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 215 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2024-11-27 20:24:56,061 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 466 states. [2024-11-27 20:24:56,131 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 466 to 466. [2024-11-27 20:24:56,132 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 466 states, 361 states have (on average 1.1412742382271468) internal successors, (412), 361 states have internal predecessors, (412), 53 states have call successors, (53), 52 states have call predecessors, (53), 51 states have return successors, (52), 52 states have call predecessors, (52), 52 states have call successors, (52) [2024-11-27 20:24:56,135 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 466 states to 466 states and 517 transitions. [2024-11-27 20:24:56,135 INFO L78 Accepts]: Start accepts. Automaton has 466 states and 517 transitions. Word has length 433 [2024-11-27 20:24:56,136 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-27 20:24:56,137 INFO L471 AbstractCegarLoop]: Abstraction has 466 states and 517 transitions. [2024-11-27 20:24:56,137 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 55 states, 55 states have (on average 6.509090909090909) internal successors, (358), 55 states have internal predecessors, (358), 51 states have call successors, (102), 49 states have call predecessors, (102), 48 states have return successors, (101), 50 states have call predecessors, (101), 50 states have call successors, (101) [2024-11-27 20:24:56,137 INFO L276 IsEmpty]: Start isEmpty. Operand 466 states and 517 transitions. [2024-11-27 20:24:56,146 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 470 [2024-11-27 20:24:56,146 INFO L210 NwaCegarLoop]: Found error trace [2024-11-27 20:24:56,146 INFO L218 NwaCegarLoop]: trace histogram [51, 51, 50, 50, 50, 50, 50, 50, 50, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-27 20:24:56,153 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4ce4be16-84b9-4d2f-a8a3-045f4ddaf82a/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Forceful destruction successful, exit code 0 [2024-11-27 20:24:56,346 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8,9 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4ce4be16-84b9-4d2f-a8a3-045f4ddaf82a/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-27 20:24:56,347 INFO L396 AbstractCegarLoop]: === Iteration 10 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-27 20:24:56,347 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-27 20:24:56,347 INFO L85 PathProgramCache]: Analyzing trace with hash 1536667572, now seen corresponding path program 6 times [2024-11-27 20:24:56,347 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-27 20:24:56,347 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1424899129] [2024-11-27 20:24:56,348 INFO L95 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2024-11-27 20:24:56,348 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-27 20:24:57,204 INFO L229 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 51 check-sat command(s) [2024-11-27 20:24:57,204 INFO L230 tOrderPrioritization]: Conjunction of SSA is unknown [2024-11-27 20:24:57,214 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1650296998] [2024-11-27 20:24:57,214 INFO L95 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2024-11-27 20:24:57,214 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-27 20:24:57,214 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4ce4be16-84b9-4d2f-a8a3-045f4ddaf82a/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-27 20:24:57,216 INFO L229 MonitoredProcess]: Starting monitored process 10 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4ce4be16-84b9-4d2f-a8a3-045f4ddaf82a/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-27 20:24:57,218 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4ce4be16-84b9-4d2f-a8a3-045f4ddaf82a/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process [2024-11-27 20:24:58,969 INFO L229 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 51 check-sat command(s) [2024-11-27 20:24:58,969 INFO L230 tOrderPrioritization]: Conjunction of SSA is sat [2024-11-27 20:24:58,969 INFO L357 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-27 20:24:59,120 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-27 20:24:59,286 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-27 20:24:59,286 INFO L340 BasicCegarLoop]: Counterexample is feasible [2024-11-27 20:24:59,287 INFO L782 garLoopResultBuilder]: Registering result UNSAFE for location __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION (0 of 1 remaining) [2024-11-27 20:24:59,298 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4ce4be16-84b9-4d2f-a8a3-045f4ddaf82a/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Ended with exit code 0 [2024-11-27 20:24:59,490 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable9,10 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4ce4be16-84b9-4d2f-a8a3-045f4ddaf82a/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-27 20:24:59,493 INFO L422 BasicCegarLoop]: Path program histogram: [6, 1, 1, 1, 1] [2024-11-27 20:24:59,651 INFO L170 ceAbstractionStarter]: Computing trace abstraction results [2024-11-27 20:24:59,656 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 27.11 08:24:59 BoogieIcfgContainer [2024-11-27 20:24:59,656 INFO L131 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2024-11-27 20:24:59,657 INFO L112 PluginConnector]: ------------------------Witness Printer---------------------------- [2024-11-27 20:24:59,657 INFO L270 PluginConnector]: Initializing Witness Printer... [2024-11-27 20:24:59,657 INFO L274 PluginConnector]: Witness Printer initialized [2024-11-27 20:24:59,659 INFO L184 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 27.11 08:24:22" (3/4) ... [2024-11-27 20:24:59,660 INFO L140 WitnessPrinter]: Generating witness for reachability counterexample [2024-11-27 20:24:59,835 INFO L129 tionWitnessGenerator]: Generated YAML witness of length 310. [2024-11-27 20:25:00,080 INFO L149 WitnessManager]: Wrote witness to /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4ce4be16-84b9-4d2f-a8a3-045f4ddaf82a/bin/uautomizer-verify-aQ6SnzHsRB/witness.graphml [2024-11-27 20:25:00,081 INFO L149 WitnessManager]: Wrote witness to /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4ce4be16-84b9-4d2f-a8a3-045f4ddaf82a/bin/uautomizer-verify-aQ6SnzHsRB/witness.yml [2024-11-27 20:25:00,081 INFO L131 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2024-11-27 20:25:00,082 INFO L158 Benchmark]: Toolchain (without parser) took 38470.12ms. Allocated memory was 142.6MB in the beginning and 469.8MB in the end (delta: 327.2MB). Free memory was 119.5MB in the beginning and 189.0MB in the end (delta: -69.5MB). Peak memory consumption was 255.2MB. Max. memory is 16.1GB. [2024-11-27 20:25:00,082 INFO L158 Benchmark]: CDTParser took 0.48ms. Allocated memory is still 142.6MB. Free memory is still 79.6MB. There was no memory consumed. Max. memory is 16.1GB. [2024-11-27 20:25:00,083 INFO L158 Benchmark]: CACSL2BoogieTranslator took 334.51ms. Allocated memory is still 142.6MB. Free memory was 119.5MB in the beginning and 107.7MB in the end (delta: 11.8MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. [2024-11-27 20:25:00,083 INFO L158 Benchmark]: Boogie Procedure Inliner took 48.21ms. Allocated memory is still 142.6MB. Free memory was 107.7MB in the beginning and 106.7MB in the end (delta: 974.8kB). There was no memory consumed. Max. memory is 16.1GB. [2024-11-27 20:25:00,083 INFO L158 Benchmark]: Boogie Preprocessor took 60.55ms. Allocated memory is still 142.6MB. Free memory was 106.7MB in the beginning and 105.4MB in the end (delta: 1.3MB). There was no memory consumed. Max. memory is 16.1GB. [2024-11-27 20:25:00,084 INFO L158 Benchmark]: RCFGBuilder took 361.15ms. Allocated memory is still 142.6MB. Free memory was 105.4MB in the beginning and 94.6MB in the end (delta: 10.8MB). Peak memory consumption was 16.8MB. Max. memory is 16.1GB. [2024-11-27 20:25:00,084 INFO L158 Benchmark]: TraceAbstraction took 37232.81ms. Allocated memory was 142.6MB in the beginning and 469.8MB in the end (delta: 327.2MB). Free memory was 94.2MB in the beginning and 214.2MB in the end (delta: -120.0MB). Peak memory consumption was 204.9MB. Max. memory is 16.1GB. [2024-11-27 20:25:00,085 INFO L158 Benchmark]: Witness Printer took 424.63ms. Allocated memory is still 469.8MB. Free memory was 214.2MB in the beginning and 189.0MB in the end (delta: 25.2MB). Peak memory consumption was 25.2MB. Max. memory is 16.1GB. [2024-11-27 20:25:00,086 INFO L338 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.48ms. Allocated memory is still 142.6MB. Free memory is still 79.6MB. There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 334.51ms. Allocated memory is still 142.6MB. Free memory was 119.5MB in the beginning and 107.7MB in the end (delta: 11.8MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 48.21ms. Allocated memory is still 142.6MB. Free memory was 107.7MB in the beginning and 106.7MB in the end (delta: 974.8kB). There was no memory consumed. Max. memory is 16.1GB. * Boogie Preprocessor took 60.55ms. Allocated memory is still 142.6MB. Free memory was 106.7MB in the beginning and 105.4MB in the end (delta: 1.3MB). There was no memory consumed. Max. memory is 16.1GB. * RCFGBuilder took 361.15ms. Allocated memory is still 142.6MB. Free memory was 105.4MB in the beginning and 94.6MB in the end (delta: 10.8MB). Peak memory consumption was 16.8MB. Max. memory is 16.1GB. * TraceAbstraction took 37232.81ms. Allocated memory was 142.6MB in the beginning and 469.8MB in the end (delta: 327.2MB). Free memory was 94.2MB in the beginning and 214.2MB in the end (delta: -120.0MB). Peak memory consumption was 204.9MB. Max. memory is 16.1GB. * Witness Printer took 424.63ms. Allocated memory is still 469.8MB. Free memory was 214.2MB in the beginning and 189.0MB in the end (delta: 25.2MB). Peak memory consumption was 25.2MB. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: ErrorAutomatonStatistics NumberErrorTraces: 0, NumberStatementsAllTraces: 0, NumberRelevantStatements: 0, 0.0s ErrorAutomatonConstructionTimeTotal, 0.0s FaulLocalizationTime, NumberStatementsFirstTrace: -1, TraceLengthAvg: 0, 0.0s ErrorAutomatonConstructionTimeAvg, 0.0s ErrorAutomatonDifferenceTimeAvg, 0.0s ErrorAutomatonDifferenceTimeTotal, NumberOfNoEnhancement: 0, NumberOfFiniteEnhancement: 0, NumberOfInfiniteEnhancement: 0 - CounterExampleResult [Line: 14]: a call to reach_error is reachable a call to reach_error is reachable We found a FailurePath: [L19] int counter = 0; VAL [counter=0] [L21] int A, R; [L22] long long u, v, r; [L23] A = __VERIFIER_nondet_int() [L24] R = __VERIFIER_nondet_int() [L26] CALL assume_abort_if_not(((long long) R - 1) * ((long long) R - 1) < A) VAL [\old(cond)=1, counter=0] [L9] COND FALSE !(!cond) VAL [\old(cond)=1, counter=0] [L26] RET assume_abort_if_not(((long long) R - 1) * ((long long) R - 1) < A) VAL [A=1565003, R=1252, counter=0] [L28] CALL assume_abort_if_not(A % 2 == 1) VAL [\old(cond)=1, counter=0] [L9] COND FALSE !(!cond) VAL [\old(cond)=1, counter=0] [L28] RET assume_abort_if_not(A % 2 == 1) VAL [A=1565003, R=1252, counter=0] [L30] u = ((long long) 2 * R) + 1 [L31] v = 1 [L32] r = ((long long) R * R) - A VAL [A=1565003, counter=0, r=2501, u=2505, v=1] [L34] EXPR counter++ VAL [A=1565003, counter=1, r=2501, u=2505, v=1] [L34] COND TRUE counter++<50 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=1] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=1] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=1565003, counter=1, r=2501, u=2505, v=1] [L36] COND FALSE !(!(r != 0)) VAL [A=1565003, counter=1, r=2501, u=2505, v=1] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=1565003, counter=1, r=2500, u=2505, v=3] [L34] EXPR counter++ VAL [A=1565003, counter=2, r=2500, u=2505, v=3] [L34] COND TRUE counter++<50 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=2] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=2] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=1565003, counter=2, r=2500, u=2505, v=3] [L36] COND FALSE !(!(r != 0)) VAL [A=1565003, counter=2, r=2500, u=2505, v=3] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=1565003, counter=2, r=2497, u=2505, v=5] [L34] EXPR counter++ VAL [A=1565003, counter=3, r=2497, u=2505, v=5] [L34] COND TRUE counter++<50 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=3] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=3] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=1565003, counter=3, r=2497, u=2505, v=5] [L36] COND FALSE !(!(r != 0)) VAL [A=1565003, counter=3, r=2497, u=2505, v=5] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=1565003, counter=3, r=2492, u=2505, v=7] [L34] EXPR counter++ VAL [A=1565003, counter=4, r=2492, u=2505, v=7] [L34] COND TRUE counter++<50 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=4] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=4] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=1565003, counter=4, r=2492, u=2505, v=7] [L36] COND FALSE !(!(r != 0)) VAL [A=1565003, counter=4, r=2492, u=2505, v=7] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=1565003, counter=4, r=2485, u=2505, v=9] [L34] EXPR counter++ VAL [A=1565003, counter=5, r=2485, u=2505, v=9] [L34] COND TRUE counter++<50 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=5] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=5] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=1565003, counter=5, r=2485, u=2505, v=9] [L36] COND FALSE !(!(r != 0)) VAL [A=1565003, counter=5, r=2485, u=2505, v=9] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=1565003, counter=5, r=2476, u=2505, v=11] [L34] EXPR counter++ VAL [A=1565003, counter=6, r=2476, u=2505, v=11] [L34] COND TRUE counter++<50 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=6] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=6] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=1565003, counter=6, r=2476, u=2505, v=11] [L36] COND FALSE !(!(r != 0)) VAL [A=1565003, counter=6, r=2476, u=2505, v=11] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=1565003, counter=6, r=2465, u=2505, v=13] [L34] EXPR counter++ VAL [A=1565003, counter=7, r=2465, u=2505, v=13] [L34] COND TRUE counter++<50 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=7] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=7] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=1565003, counter=7, r=2465, u=2505, v=13] [L36] COND FALSE !(!(r != 0)) VAL [A=1565003, counter=7, r=2465, u=2505, v=13] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=1565003, counter=7, r=2452, u=2505, v=15] [L34] EXPR counter++ VAL [A=1565003, counter=8, r=2452, u=2505, v=15] [L34] COND TRUE counter++<50 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=8] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=8] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=1565003, counter=8, r=2452, u=2505, v=15] [L36] COND FALSE !(!(r != 0)) VAL [A=1565003, counter=8, r=2452, u=2505, v=15] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=1565003, counter=8, r=2437, u=2505, v=17] [L34] EXPR counter++ VAL [A=1565003, counter=9, r=2437, u=2505, v=17] [L34] COND TRUE counter++<50 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=9] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=9] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=1565003, counter=9, r=2437, u=2505, v=17] [L36] COND FALSE !(!(r != 0)) VAL [A=1565003, counter=9, r=2437, u=2505, v=17] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=1565003, counter=9, r=2420, u=2505, v=19] [L34] EXPR counter++ VAL [A=1565003, counter=10, r=2420, u=2505, v=19] [L34] COND TRUE counter++<50 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=10] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=10] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=1565003, counter=10, r=2420, u=2505, v=19] [L36] COND FALSE !(!(r != 0)) VAL [A=1565003, counter=10, r=2420, u=2505, v=19] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=1565003, counter=10, r=2401, u=2505, v=21] [L34] EXPR counter++ VAL [A=1565003, counter=11, r=2401, u=2505, v=21] [L34] COND TRUE counter++<50 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=11] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=11] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=1565003, counter=11, r=2401, u=2505, v=21] [L36] COND FALSE !(!(r != 0)) VAL [A=1565003, counter=11, r=2401, u=2505, v=21] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=1565003, counter=11, r=2380, u=2505, v=23] [L34] EXPR counter++ VAL [A=1565003, counter=12, r=2380, u=2505, v=23] [L34] COND TRUE counter++<50 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=12] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=12] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=1565003, counter=12, r=2380, u=2505, v=23] [L36] COND FALSE !(!(r != 0)) VAL [A=1565003, counter=12, r=2380, u=2505, v=23] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=1565003, counter=12, r=2357, u=2505, v=25] [L34] EXPR counter++ VAL [A=1565003, counter=13, r=2357, u=2505, v=25] [L34] COND TRUE counter++<50 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=13] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=13] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=1565003, counter=13, r=2357, u=2505, v=25] [L36] COND FALSE !(!(r != 0)) VAL [A=1565003, counter=13, r=2357, u=2505, v=25] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=1565003, counter=13, r=2332, u=2505, v=27] [L34] EXPR counter++ VAL [A=1565003, counter=14, r=2332, u=2505, v=27] [L34] COND TRUE counter++<50 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=14] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=14] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=1565003, counter=14, r=2332, u=2505, v=27] [L36] COND FALSE !(!(r != 0)) VAL [A=1565003, counter=14, r=2332, u=2505, v=27] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=1565003, counter=14, r=2305, u=2505, v=29] [L34] EXPR counter++ VAL [A=1565003, counter=15, r=2305, u=2505, v=29] [L34] COND TRUE counter++<50 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=15] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=15] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=1565003, counter=15, r=2305, u=2505, v=29] [L36] COND FALSE !(!(r != 0)) VAL [A=1565003, counter=15, r=2305, u=2505, v=29] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=1565003, counter=15, r=2276, u=2505, v=31] [L34] EXPR counter++ VAL [A=1565003, counter=16, r=2276, u=2505, v=31] [L34] COND TRUE counter++<50 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=16] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=16] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=1565003, counter=16, r=2276, u=2505, v=31] [L36] COND FALSE !(!(r != 0)) VAL [A=1565003, counter=16, r=2276, u=2505, v=31] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=1565003, counter=16, r=2245, u=2505, v=33] [L34] EXPR counter++ VAL [A=1565003, counter=17, r=2245, u=2505, v=33] [L34] COND TRUE counter++<50 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=17] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=17] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=1565003, counter=17, r=2245, u=2505, v=33] [L36] COND FALSE !(!(r != 0)) VAL [A=1565003, counter=17, r=2245, u=2505, v=33] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=1565003, counter=17, r=2212, u=2505, v=35] [L34] EXPR counter++ VAL [A=1565003, counter=18, r=2212, u=2505, v=35] [L34] COND TRUE counter++<50 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=18] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=18] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=1565003, counter=18, r=2212, u=2505, v=35] [L36] COND FALSE !(!(r != 0)) VAL [A=1565003, counter=18, r=2212, u=2505, v=35] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=1565003, counter=18, r=2177, u=2505, v=37] [L34] EXPR counter++ VAL [A=1565003, counter=19, r=2177, u=2505, v=37] [L34] COND TRUE counter++<50 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=19] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=19] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=1565003, counter=19, r=2177, u=2505, v=37] [L36] COND FALSE !(!(r != 0)) VAL [A=1565003, counter=19, r=2177, u=2505, v=37] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=1565003, counter=19, r=2140, u=2505, v=39] [L34] EXPR counter++ VAL [A=1565003, counter=20, r=2140, u=2505, v=39] [L34] COND TRUE counter++<50 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=20] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=20] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=1565003, counter=20, r=2140, u=2505, v=39] [L36] COND FALSE !(!(r != 0)) VAL [A=1565003, counter=20, r=2140, u=2505, v=39] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=1565003, counter=20, r=2101, u=2505, v=41] [L34] EXPR counter++ VAL [A=1565003, counter=21, r=2101, u=2505, v=41] [L34] COND TRUE counter++<50 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=21] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=21] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=1565003, counter=21, r=2101, u=2505, v=41] [L36] COND FALSE !(!(r != 0)) VAL [A=1565003, counter=21, r=2101, u=2505, v=41] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=1565003, counter=21, r=2060, u=2505, v=43] [L34] EXPR counter++ VAL [A=1565003, counter=22, r=2060, u=2505, v=43] [L34] COND TRUE counter++<50 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=22] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=22] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=1565003, counter=22, r=2060, u=2505, v=43] [L36] COND FALSE !(!(r != 0)) VAL [A=1565003, counter=22, r=2060, u=2505, v=43] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=1565003, counter=22, r=2017, u=2505, v=45] [L34] EXPR counter++ VAL [A=1565003, counter=23, r=2017, u=2505, v=45] [L34] COND TRUE counter++<50 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=23] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=23] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=1565003, counter=23, r=2017, u=2505, v=45] [L36] COND FALSE !(!(r != 0)) VAL [A=1565003, counter=23, r=2017, u=2505, v=45] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=1565003, counter=23, r=1972, u=2505, v=47] [L34] EXPR counter++ VAL [A=1565003, counter=24, r=1972, u=2505, v=47] [L34] COND TRUE counter++<50 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=24] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=24] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=1565003, counter=24, r=1972, u=2505, v=47] [L36] COND FALSE !(!(r != 0)) VAL [A=1565003, counter=24, r=1972, u=2505, v=47] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=1565003, counter=24, r=1925, u=2505, v=49] [L34] EXPR counter++ VAL [A=1565003, counter=25, r=1925, u=2505, v=49] [L34] COND TRUE counter++<50 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=25] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=25] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=1565003, counter=25, r=1925, u=2505, v=49] [L36] COND FALSE !(!(r != 0)) VAL [A=1565003, counter=25, r=1925, u=2505, v=49] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=1565003, counter=25, r=1876, u=2505, v=51] [L34] EXPR counter++ VAL [A=1565003, counter=26, r=1876, u=2505, v=51] [L34] COND TRUE counter++<50 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=26] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=26] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=1565003, counter=26, r=1876, u=2505, v=51] [L36] COND FALSE !(!(r != 0)) VAL [A=1565003, counter=26, r=1876, u=2505, v=51] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=1565003, counter=26, r=1825, u=2505, v=53] [L34] EXPR counter++ VAL [A=1565003, counter=27, r=1825, u=2505, v=53] [L34] COND TRUE counter++<50 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=27] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=27] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=1565003, counter=27, r=1825, u=2505, v=53] [L36] COND FALSE !(!(r != 0)) VAL [A=1565003, counter=27, r=1825, u=2505, v=53] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=1565003, counter=27, r=1772, u=2505, v=55] [L34] EXPR counter++ VAL [A=1565003, counter=28, r=1772, u=2505, v=55] [L34] COND TRUE counter++<50 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=28] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=28] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=1565003, counter=28, r=1772, u=2505, v=55] [L36] COND FALSE !(!(r != 0)) VAL [A=1565003, counter=28, r=1772, u=2505, v=55] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=1565003, counter=28, r=1717, u=2505, v=57] [L34] EXPR counter++ VAL [A=1565003, counter=29, r=1717, u=2505, v=57] [L34] COND TRUE counter++<50 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=29] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=29] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=1565003, counter=29, r=1717, u=2505, v=57] [L36] COND FALSE !(!(r != 0)) VAL [A=1565003, counter=29, r=1717, u=2505, v=57] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=1565003, counter=29, r=1660, u=2505, v=59] [L34] EXPR counter++ VAL [A=1565003, counter=30, r=1660, u=2505, v=59] [L34] COND TRUE counter++<50 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=30] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=30] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=1565003, counter=30, r=1660, u=2505, v=59] [L36] COND FALSE !(!(r != 0)) VAL [A=1565003, counter=30, r=1660, u=2505, v=59] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=1565003, counter=30, r=1601, u=2505, v=61] [L34] EXPR counter++ VAL [A=1565003, counter=31, r=1601, u=2505, v=61] [L34] COND TRUE counter++<50 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=31] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=31] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=1565003, counter=31, r=1601, u=2505, v=61] [L36] COND FALSE !(!(r != 0)) VAL [A=1565003, counter=31, r=1601, u=2505, v=61] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=1565003, counter=31, r=1540, u=2505, v=63] [L34] EXPR counter++ VAL [A=1565003, counter=32, r=1540, u=2505, v=63] [L34] COND TRUE counter++<50 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=32] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=32] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=1565003, counter=32, r=1540, u=2505, v=63] [L36] COND FALSE !(!(r != 0)) VAL [A=1565003, counter=32, r=1540, u=2505, v=63] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=1565003, counter=32, r=1477, u=2505, v=65] [L34] EXPR counter++ VAL [A=1565003, counter=33, r=1477, u=2505, v=65] [L34] COND TRUE counter++<50 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=33] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=33] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=1565003, counter=33, r=1477, u=2505, v=65] [L36] COND FALSE !(!(r != 0)) VAL [A=1565003, counter=33, r=1477, u=2505, v=65] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=1565003, counter=33, r=1412, u=2505, v=67] [L34] EXPR counter++ VAL [A=1565003, counter=34, r=1412, u=2505, v=67] [L34] COND TRUE counter++<50 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=34] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=34] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=1565003, counter=34, r=1412, u=2505, v=67] [L36] COND FALSE !(!(r != 0)) VAL [A=1565003, counter=34, r=1412, u=2505, v=67] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=1565003, counter=34, r=1345, u=2505, v=69] [L34] EXPR counter++ VAL [A=1565003, counter=35, r=1345, u=2505, v=69] [L34] COND TRUE counter++<50 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=35] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=35] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=1565003, counter=35, r=1345, u=2505, v=69] [L36] COND FALSE !(!(r != 0)) VAL [A=1565003, counter=35, r=1345, u=2505, v=69] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=1565003, counter=35, r=1276, u=2505, v=71] [L34] EXPR counter++ VAL [A=1565003, counter=36, r=1276, u=2505, v=71] [L34] COND TRUE counter++<50 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=36] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=36] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=1565003, counter=36, r=1276, u=2505, v=71] [L36] COND FALSE !(!(r != 0)) VAL [A=1565003, counter=36, r=1276, u=2505, v=71] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=1565003, counter=36, r=1205, u=2505, v=73] [L34] EXPR counter++ VAL [A=1565003, counter=37, r=1205, u=2505, v=73] [L34] COND TRUE counter++<50 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=37] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=37] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=1565003, counter=37, r=1205, u=2505, v=73] [L36] COND FALSE !(!(r != 0)) VAL [A=1565003, counter=37, r=1205, u=2505, v=73] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=1565003, counter=37, r=1132, u=2505, v=75] [L34] EXPR counter++ VAL [A=1565003, counter=38, r=1132, u=2505, v=75] [L34] COND TRUE counter++<50 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=38] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=38] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=1565003, counter=38, r=1132, u=2505, v=75] [L36] COND FALSE !(!(r != 0)) VAL [A=1565003, counter=38, r=1132, u=2505, v=75] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=1565003, counter=38, r=1057, u=2505, v=77] [L34] EXPR counter++ VAL [A=1565003, counter=39, r=1057, u=2505, v=77] [L34] COND TRUE counter++<50 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=39] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=39] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=1565003, counter=39, r=1057, u=2505, v=77] [L36] COND FALSE !(!(r != 0)) VAL [A=1565003, counter=39, r=1057, u=2505, v=77] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=1565003, counter=39, r=980, u=2505, v=79] [L34] EXPR counter++ VAL [A=1565003, counter=40, r=980, u=2505, v=79] [L34] COND TRUE counter++<50 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=40] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=40] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=1565003, counter=40, r=980, u=2505, v=79] [L36] COND FALSE !(!(r != 0)) VAL [A=1565003, counter=40, r=980, u=2505, v=79] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=1565003, counter=40, r=901, u=2505, v=81] [L34] EXPR counter++ VAL [A=1565003, counter=41, r=901, u=2505, v=81] [L34] COND TRUE counter++<50 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=41] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=41] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=1565003, counter=41, r=901, u=2505, v=81] [L36] COND FALSE !(!(r != 0)) VAL [A=1565003, counter=41, r=901, u=2505, v=81] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=1565003, counter=41, r=820, u=2505, v=83] [L34] EXPR counter++ VAL [A=1565003, counter=42, r=820, u=2505, v=83] [L34] COND TRUE counter++<50 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=42] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=42] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=1565003, counter=42, r=820, u=2505, v=83] [L36] COND FALSE !(!(r != 0)) VAL [A=1565003, counter=42, r=820, u=2505, v=83] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=1565003, counter=42, r=737, u=2505, v=85] [L34] EXPR counter++ VAL [A=1565003, counter=43, r=737, u=2505, v=85] [L34] COND TRUE counter++<50 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=43] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=43] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=1565003, counter=43, r=737, u=2505, v=85] [L36] COND FALSE !(!(r != 0)) VAL [A=1565003, counter=43, r=737, u=2505, v=85] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=1565003, counter=43, r=652, u=2505, v=87] [L34] EXPR counter++ VAL [A=1565003, counter=44, r=652, u=2505, v=87] [L34] COND TRUE counter++<50 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=44] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=44] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=1565003, counter=44, r=652, u=2505, v=87] [L36] COND FALSE !(!(r != 0)) VAL [A=1565003, counter=44, r=652, u=2505, v=87] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=1565003, counter=44, r=565, u=2505, v=89] [L34] EXPR counter++ VAL [A=1565003, counter=45, r=565, u=2505, v=89] [L34] COND TRUE counter++<50 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=45] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=45] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=1565003, counter=45, r=565, u=2505, v=89] [L36] COND FALSE !(!(r != 0)) VAL [A=1565003, counter=45, r=565, u=2505, v=89] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=1565003, counter=45, r=476, u=2505, v=91] [L34] EXPR counter++ VAL [A=1565003, counter=46, r=476, u=2505, v=91] [L34] COND TRUE counter++<50 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=46] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=46] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=1565003, counter=46, r=476, u=2505, v=91] [L36] COND FALSE !(!(r != 0)) VAL [A=1565003, counter=46, r=476, u=2505, v=91] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=1565003, counter=46, r=385, u=2505, v=93] [L34] EXPR counter++ VAL [A=1565003, counter=47, r=385, u=2505, v=93] [L34] COND TRUE counter++<50 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=47] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=47] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=1565003, counter=47, r=385, u=2505, v=93] [L36] COND FALSE !(!(r != 0)) VAL [A=1565003, counter=47, r=385, u=2505, v=93] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=1565003, counter=47, r=292, u=2505, v=95] [L34] EXPR counter++ VAL [A=1565003, counter=48, r=292, u=2505, v=95] [L34] COND TRUE counter++<50 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=48] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=48] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=1565003, counter=48, r=292, u=2505, v=95] [L36] COND FALSE !(!(r != 0)) VAL [A=1565003, counter=48, r=292, u=2505, v=95] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=1565003, counter=48, r=197, u=2505, v=97] [L34] EXPR counter++ VAL [A=1565003, counter=49, r=197, u=2505, v=97] [L34] COND TRUE counter++<50 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=49] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=49] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=1565003, counter=49, r=197, u=2505, v=97] [L36] COND FALSE !(!(r != 0)) VAL [A=1565003, counter=49, r=197, u=2505, v=97] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=1565003, counter=49, r=100, u=2505, v=99] [L34] EXPR counter++ VAL [A=1565003, counter=50, r=100, u=2505, v=99] [L34] COND TRUE counter++<50 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=50] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=50] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=1565003, counter=50, r=100, u=2505, v=99] [L36] COND FALSE !(!(r != 0)) VAL [A=1565003, counter=50, r=100, u=2505, v=99] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=1565003, counter=50, r=1, u=2505, v=101] [L34] EXPR counter++ VAL [A=1565003, counter=51, r=1, u=2505, v=101] [L34] COND FALSE !(counter++<50) [L48] CALL __VERIFIER_assert(((long long) 4*A) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=0, counter=51] [L12] COND TRUE !(cond) VAL [\old(cond)=0, counter=51] [L14] reach_error() VAL [\old(cond)=0, counter=51] - StatisticsResult: Ultimate Automizer benchmark data CFG has 3 procedures, 25 locations, 1 error locations. Started 1 CEGAR loops. OverallTime: 37.0s, OverallIterations: 10, TraceHistogramMax: 51, PathProgramHistogramMax: 6, EmptinessCheckTime: 0.0s, AutomataDifference: 7.8s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, HoareTripleCheckerStatistics: 0 mSolverCounterUnknown, 788 SdHoareTripleChecker+Valid, 2.7s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 787 mSDsluCounter, 1570 SdHoareTripleChecker+Invalid, 2.3s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 0 IncrementalHoareTripleChecker+Unchecked, 1372 mSDsCounter, 78 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 747 IncrementalHoareTripleChecker+Invalid, 825 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 78 mSolverCounterUnsat, 198 mSDtfsCounter, 747 mSolverCounterSat, 0.1s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Unknown, PredicateUnifierStatistics: 0 DeclaredPredicates, 2008 GetRequests, 1670 SyntacticMatches, 46 SemanticMatches, 292 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4396 ImplicationChecksByTransitivity, 10.2s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=466occurred in iteration=9, InterpolantAutomatonStates: 293, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 0.4s AutomataMinimizationTime, 9 MinimizatonAttempts, 10 StatesRemovedByMinimization, 2 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.2s SsaConstructionTime, 6.8s SatisfiabilityAnalysisTime, 18.8s InterpolantComputationTime, 2765 NumberOfCodeBlocks, 2765 NumberOfCodeBlocksAsserted, 235 NumberOfCheckSat, 2653 ConstructedInterpolants, 0 QuantifiedInterpolants, 6509 SizeOfPredicates, 85 NumberOfNonLiveVariables, 2187 ConjunctsInSsa, 201 ConjunctsInUnsatCore, 22 InterpolantComputations, 3 PerfectInterpolantSequences, 11123/36649 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available, ConComCheckerStatistics: No data available RESULT: Ultimate proved your program to be incorrect! [2024-11-27 20:25:00,117 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4ce4be16-84b9-4d2f-a8a3-045f4ddaf82a/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Forceful destruction successful, exit code 0 Received shutdown request... --- End real Ultimate output --- Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE