./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.4_1.ufo.UNBOUNDED.pals.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version d790fecc Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_58ef54d4-00f4-4eef-9b59-4b85557f99bb/bin/uautomizer-verify-aQ6SnzHsRB/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_58ef54d4-00f4-4eef-9b59-4b85557f99bb/bin/uautomizer-verify-aQ6SnzHsRB/plugins/org.eclipse.equinox.launcher_1.6.800.v20240513-1750.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_58ef54d4-00f4-4eef-9b59-4b85557f99bb/bin/uautomizer-verify-aQ6SnzHsRB/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_58ef54d4-00f4-4eef-9b59-4b85557f99bb/bin/uautomizer-verify-aQ6SnzHsRB/config/AutomizerReach.xml -i ../../sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.4_1.ufo.UNBOUNDED.pals.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_58ef54d4-00f4-4eef-9b59-4b85557f99bb/bin/uautomizer-verify-aQ6SnzHsRB/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_58ef54d4-00f4-4eef-9b59-4b85557f99bb/bin/uautomizer-verify-aQ6SnzHsRB --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash ac8e60fb32c268c01bf0cc1d1cd76454411c67e3ab15d16b4eca5e74b982e97f --- Real Ultimate output --- This is Ultimate 0.3.0-dev-d790fec [2024-11-28 02:33:22,663 INFO L188 SettingsManager]: Resetting all preferences to default values... [2024-11-28 02:33:22,723 INFO L114 SettingsManager]: Loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_58ef54d4-00f4-4eef-9b59-4b85557f99bb/bin/uautomizer-verify-aQ6SnzHsRB/config/svcomp-Reach-32bit-Automizer_Default.epf [2024-11-28 02:33:22,729 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2024-11-28 02:33:22,729 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2024-11-28 02:33:22,774 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2024-11-28 02:33:22,775 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2024-11-28 02:33:22,775 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2024-11-28 02:33:22,775 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2024-11-28 02:33:22,775 INFO L153 SettingsManager]: * Use memory slicer=true [2024-11-28 02:33:22,775 INFO L151 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2024-11-28 02:33:22,778 INFO L153 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2024-11-28 02:33:22,778 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2024-11-28 02:33:22,778 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2024-11-28 02:33:22,779 INFO L153 SettingsManager]: * Use SBE=true [2024-11-28 02:33:22,779 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2024-11-28 02:33:22,779 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2024-11-28 02:33:22,779 INFO L153 SettingsManager]: * sizeof long=4 [2024-11-28 02:33:22,779 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2024-11-28 02:33:22,780 INFO L153 SettingsManager]: * sizeof POINTER=4 [2024-11-28 02:33:22,780 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2024-11-28 02:33:22,780 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2024-11-28 02:33:22,780 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2024-11-28 02:33:22,780 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2024-11-28 02:33:22,780 INFO L153 SettingsManager]: * sizeof long double=12 [2024-11-28 02:33:22,780 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2024-11-28 02:33:22,780 INFO L153 SettingsManager]: * Behaviour of calls to undefined functions=OVERAPPROXIMATE_BEHAVIOUR [2024-11-28 02:33:22,780 INFO L153 SettingsManager]: * Use constant arrays=true [2024-11-28 02:33:22,780 INFO L151 SettingsManager]: Preferences of IcfgBuilder differ from their defaults: [2024-11-28 02:33:22,780 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-11-28 02:33:22,781 INFO L153 SettingsManager]: * Only consider context switches at boundaries of atomic blocks=true [2024-11-28 02:33:22,782 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2024-11-28 02:33:22,782 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2024-11-28 02:33:22,782 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2024-11-28 02:33:22,782 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-11-28 02:33:22,782 INFO L153 SettingsManager]: * Only consider context switches at boundaries of atomic blocks=true [2024-11-28 02:33:22,782 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2024-11-28 02:33:22,782 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2024-11-28 02:33:22,783 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2024-11-28 02:33:22,783 INFO L153 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2024-11-28 02:33:22,783 INFO L153 SettingsManager]: * Compute procedure contracts=false [2024-11-28 02:33:22,783 INFO L153 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopHeads [2024-11-28 02:33:22,783 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2024-11-28 02:33:22,783 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2024-11-28 02:33:22,784 INFO L153 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false [2024-11-28 02:33:22,784 INFO L153 SettingsManager]: * Automaton type used in concurrency analysis=PETRI_NET [2024-11-28 02:33:22,784 INFO L153 SettingsManager]: * Order on configurations for Petri net unfoldings=DBO [2024-11-28 02:33:22,784 INFO L153 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2024-11-28 02:33:22,784 INFO L153 SettingsManager]: * Looper check in Petri net analysis=SEMANTIC Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_58ef54d4-00f4-4eef-9b59-4b85557f99bb/bin/uautomizer-verify-aQ6SnzHsRB Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> ac8e60fb32c268c01bf0cc1d1cd76454411c67e3ab15d16b4eca5e74b982e97f [2024-11-28 02:33:23,070 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2024-11-28 02:33:23,078 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2024-11-28 02:33:23,083 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2024-11-28 02:33:23,085 INFO L270 PluginConnector]: Initializing CDTParser... [2024-11-28 02:33:23,085 INFO L274 PluginConnector]: CDTParser initialized [2024-11-28 02:33:23,086 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_58ef54d4-00f4-4eef-9b59-4b85557f99bb/bin/uautomizer-verify-aQ6SnzHsRB/../../sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.4_1.ufo.UNBOUNDED.pals.c [2024-11-28 02:33:25,998 INFO L533 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_58ef54d4-00f4-4eef-9b59-4b85557f99bb/bin/uautomizer-verify-aQ6SnzHsRB/data/dc34f0e57/59e934c14022469db934f0a465796c3e/FLAGa17eceaca [2024-11-28 02:33:26,299 INFO L384 CDTParser]: Found 1 translation units. [2024-11-28 02:33:26,299 INFO L180 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_58ef54d4-00f4-4eef-9b59-4b85557f99bb/sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.4_1.ufo.UNBOUNDED.pals.c [2024-11-28 02:33:26,317 INFO L427 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_58ef54d4-00f4-4eef-9b59-4b85557f99bb/bin/uautomizer-verify-aQ6SnzHsRB/data/dc34f0e57/59e934c14022469db934f0a465796c3e/FLAGa17eceaca [2024-11-28 02:33:26,552 INFO L435 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_58ef54d4-00f4-4eef-9b59-4b85557f99bb/bin/uautomizer-verify-aQ6SnzHsRB/data/dc34f0e57/59e934c14022469db934f0a465796c3e [2024-11-28 02:33:26,555 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2024-11-28 02:33:26,556 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2024-11-28 02:33:26,558 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2024-11-28 02:33:26,558 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2024-11-28 02:33:26,562 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2024-11-28 02:33:26,563 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.11 02:33:26" (1/1) ... [2024-11-28 02:33:26,563 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@4eafb35b and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 02:33:26, skipping insertion in model container [2024-11-28 02:33:26,564 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.11 02:33:26" (1/1) ... [2024-11-28 02:33:26,589 INFO L175 MainTranslator]: Built tables and reachable declarations [2024-11-28 02:33:26,820 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_58ef54d4-00f4-4eef-9b59-4b85557f99bb/sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.4_1.ufo.UNBOUNDED.pals.c[14522,14535] [2024-11-28 02:33:26,824 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-11-28 02:33:26,833 INFO L200 MainTranslator]: Completed pre-run [2024-11-28 02:33:26,895 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_58ef54d4-00f4-4eef-9b59-4b85557f99bb/sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.4_1.ufo.UNBOUNDED.pals.c[14522,14535] [2024-11-28 02:33:26,896 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-11-28 02:33:26,912 INFO L204 MainTranslator]: Completed translation [2024-11-28 02:33:26,912 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 02:33:26 WrapperNode [2024-11-28 02:33:26,913 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2024-11-28 02:33:26,914 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2024-11-28 02:33:26,914 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2024-11-28 02:33:26,914 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2024-11-28 02:33:26,923 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 02:33:26" (1/1) ... [2024-11-28 02:33:26,940 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 02:33:26" (1/1) ... [2024-11-28 02:33:26,975 INFO L138 Inliner]: procedures = 32, calls = 48, calls flagged for inlining = 12, calls inlined = 12, statements flattened = 501 [2024-11-28 02:33:26,976 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2024-11-28 02:33:26,976 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2024-11-28 02:33:26,977 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2024-11-28 02:33:26,977 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2024-11-28 02:33:26,985 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 02:33:26" (1/1) ... [2024-11-28 02:33:26,985 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 02:33:26" (1/1) ... [2024-11-28 02:33:26,989 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 02:33:26" (1/1) ... [2024-11-28 02:33:27,013 INFO L175 MemorySlicer]: Split 2 memory accesses to 1 slices as follows [2]. 100 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2]. The 0 writes are split as follows [0]. [2024-11-28 02:33:27,014 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 02:33:26" (1/1) ... [2024-11-28 02:33:27,014 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 02:33:26" (1/1) ... [2024-11-28 02:33:27,024 INFO L184 PluginConnector]: Executing the observer ReplaceArrayAssignments from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 02:33:26" (1/1) ... [2024-11-28 02:33:27,026 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 02:33:26" (1/1) ... [2024-11-28 02:33:27,031 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 02:33:26" (1/1) ... [2024-11-28 02:33:27,037 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 02:33:26" (1/1) ... [2024-11-28 02:33:27,039 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 02:33:26" (1/1) ... [2024-11-28 02:33:27,047 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2024-11-28 02:33:27,047 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2024-11-28 02:33:27,051 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2024-11-28 02:33:27,051 INFO L274 PluginConnector]: RCFGBuilder initialized [2024-11-28 02:33:27,052 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 02:33:26" (1/1) ... [2024-11-28 02:33:27,061 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2024-11-28 02:33:27,080 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_58ef54d4-00f4-4eef-9b59-4b85557f99bb/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 02:33:27,093 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_58ef54d4-00f4-4eef-9b59-4b85557f99bb/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (exit command is (exit), workingDir is null) [2024-11-28 02:33:27,096 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_58ef54d4-00f4-4eef-9b59-4b85557f99bb/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Waiting until timeout for monitored process [2024-11-28 02:33:27,125 INFO L130 BoogieDeclarations]: Found specification of procedure read_manual_selection_history [2024-11-28 02:33:27,125 INFO L138 BoogieDeclarations]: Found implementation of procedure read_manual_selection_history [2024-11-28 02:33:27,125 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2024-11-28 02:33:27,125 INFO L130 BoogieDeclarations]: Found specification of procedure read_side2_failed_history [2024-11-28 02:33:27,125 INFO L138 BoogieDeclarations]: Found implementation of procedure read_side2_failed_history [2024-11-28 02:33:27,125 INFO L130 BoogieDeclarations]: Found specification of procedure assert [2024-11-28 02:33:27,125 INFO L138 BoogieDeclarations]: Found implementation of procedure assert [2024-11-28 02:33:27,125 INFO L130 BoogieDeclarations]: Found specification of procedure flip_the_side [2024-11-28 02:33:27,125 INFO L138 BoogieDeclarations]: Found implementation of procedure flip_the_side [2024-11-28 02:33:27,125 INFO L130 BoogieDeclarations]: Found specification of procedure assume_abort_if_not [2024-11-28 02:33:27,125 INFO L138 BoogieDeclarations]: Found implementation of procedure assume_abort_if_not [2024-11-28 02:33:27,126 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#0 [2024-11-28 02:33:27,126 INFO L130 BoogieDeclarations]: Found specification of procedure read_side1_failed_history [2024-11-28 02:33:27,126 INFO L138 BoogieDeclarations]: Found implementation of procedure read_side1_failed_history [2024-11-28 02:33:27,126 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2024-11-28 02:33:27,126 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2024-11-28 02:33:27,126 INFO L130 BoogieDeclarations]: Found specification of procedure read_active_side_history [2024-11-28 02:33:27,126 INFO L138 BoogieDeclarations]: Found implementation of procedure read_active_side_history [2024-11-28 02:33:27,279 INFO L234 CfgBuilder]: Building ICFG [2024-11-28 02:33:27,281 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2024-11-28 02:33:27,950 INFO L? ?]: Removed 113 outVars from TransFormulas that were not future-live. [2024-11-28 02:33:27,951 INFO L283 CfgBuilder]: Performing block encoding [2024-11-28 02:33:27,970 INFO L307 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2024-11-28 02:33:27,970 INFO L312 CfgBuilder]: Removed 2 assume(true) statements. [2024-11-28 02:33:27,971 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.11 02:33:27 BoogieIcfgContainer [2024-11-28 02:33:27,971 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2024-11-28 02:33:27,973 INFO L112 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2024-11-28 02:33:27,973 INFO L270 PluginConnector]: Initializing TraceAbstraction... [2024-11-28 02:33:27,978 INFO L274 PluginConnector]: TraceAbstraction initialized [2024-11-28 02:33:27,978 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 28.11 02:33:26" (1/3) ... [2024-11-28 02:33:27,979 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@7684f70a and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.11 02:33:27, skipping insertion in model container [2024-11-28 02:33:27,979 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 02:33:26" (2/3) ... [2024-11-28 02:33:27,979 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@7684f70a and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.11 02:33:27, skipping insertion in model container [2024-11-28 02:33:27,979 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.11 02:33:27" (3/3) ... [2024-11-28 02:33:27,980 INFO L128 eAbstractionObserver]: Analyzing ICFG pals_STARTPALS_ActiveStandby.4_1.ufo.UNBOUNDED.pals.c [2024-11-28 02:33:27,996 INFO L216 ceAbstractionStarter]: Automizer settings: Hoare:LoopHeads NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2024-11-28 02:33:27,998 INFO L151 ceAbstractionStarter]: Applying trace abstraction to ICFG pals_STARTPALS_ActiveStandby.4_1.ufo.UNBOUNDED.pals.c that has 8 procedures, 178 locations, 1 initial locations, 1 loop locations, and 1 error locations. [2024-11-28 02:33:28,090 INFO L332 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2024-11-28 02:33:28,102 INFO L333 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mAutomataTypeConcurrency=PETRI_NET, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopHeads, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@82e7c92, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2024-11-28 02:33:28,102 INFO L334 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2024-11-28 02:33:28,106 INFO L276 IsEmpty]: Start isEmpty. Operand has 178 states, 138 states have (on average 1.5507246376811594) internal successors, (214), 140 states have internal predecessors, (214), 31 states have call successors, (31), 7 states have call predecessors, (31), 7 states have return successors, (31), 31 states have call predecessors, (31), 31 states have call successors, (31) [2024-11-28 02:33:28,116 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2024-11-28 02:33:28,117 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 02:33:28,118 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 02:33:28,118 INFO L396 AbstractCegarLoop]: === Iteration 1 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 02:33:28,123 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 02:33:28,125 INFO L85 PathProgramCache]: Analyzing trace with hash -131107926, now seen corresponding path program 1 times [2024-11-28 02:33:28,132 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 02:33:28,133 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1748467648] [2024-11-28 02:33:28,133 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:33:28,133 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 02:33:28,298 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 02:33:28,478 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-28 02:33:28,479 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 02:33:28,481 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1748467648] [2024-11-28 02:33:28,482 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1748467648] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 02:33:28,482 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 02:33:28,482 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2024-11-28 02:33:28,484 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1223483125] [2024-11-28 02:33:28,484 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 02:33:28,489 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 2 states [2024-11-28 02:33:28,489 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 02:33:28,509 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2024-11-28 02:33:28,510 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2024-11-28 02:33:28,512 INFO L87 Difference]: Start difference. First operand has 178 states, 138 states have (on average 1.5507246376811594) internal successors, (214), 140 states have internal predecessors, (214), 31 states have call successors, (31), 7 states have call predecessors, (31), 7 states have return successors, (31), 31 states have call predecessors, (31), 31 states have call successors, (31) Second operand has 2 states, 2 states have (on average 12.0) internal successors, (24), 2 states have internal predecessors, (24), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2024-11-28 02:33:28,555 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 02:33:28,555 INFO L93 Difference]: Finished difference Result 336 states and 549 transitions. [2024-11-28 02:33:28,556 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-11-28 02:33:28,557 INFO L78 Accepts]: Start accepts. Automaton has has 2 states, 2 states have (on average 12.0) internal successors, (24), 2 states have internal predecessors, (24), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 28 [2024-11-28 02:33:28,558 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 02:33:28,565 INFO L225 Difference]: With dead ends: 336 [2024-11-28 02:33:28,565 INFO L226 Difference]: Without dead ends: 174 [2024-11-28 02:33:28,569 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 0 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2024-11-28 02:33:28,572 INFO L435 NwaCegarLoop]: 269 mSDtfsCounter, 0 mSDsluCounter, 0 mSDsCounter, 0 mSdLazyCounter, 0 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 269 SdHoareTripleChecker+Invalid, 0 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 0 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-28 02:33:28,572 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 269 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 0 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-28 02:33:28,585 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 174 states. [2024-11-28 02:33:28,624 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 174 to 174. [2024-11-28 02:33:28,626 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 174 states, 135 states have (on average 1.5333333333333334) internal successors, (207), 136 states have internal predecessors, (207), 31 states have call successors, (31), 7 states have call predecessors, (31), 7 states have return successors, (31), 31 states have call predecessors, (31), 31 states have call successors, (31) [2024-11-28 02:33:28,638 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 174 states to 174 states and 269 transitions. [2024-11-28 02:33:28,640 INFO L78 Accepts]: Start accepts. Automaton has 174 states and 269 transitions. Word has length 28 [2024-11-28 02:33:28,640 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 02:33:28,640 INFO L471 AbstractCegarLoop]: Abstraction has 174 states and 269 transitions. [2024-11-28 02:33:28,642 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 2 states, 2 states have (on average 12.0) internal successors, (24), 2 states have internal predecessors, (24), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2024-11-28 02:33:28,642 INFO L276 IsEmpty]: Start isEmpty. Operand 174 states and 269 transitions. [2024-11-28 02:33:28,643 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2024-11-28 02:33:28,643 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 02:33:28,643 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 02:33:28,644 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2024-11-28 02:33:28,644 INFO L396 AbstractCegarLoop]: === Iteration 2 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 02:33:28,644 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 02:33:28,644 INFO L85 PathProgramCache]: Analyzing trace with hash 87746792, now seen corresponding path program 1 times [2024-11-28 02:33:28,644 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 02:33:28,645 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [106500577] [2024-11-28 02:33:28,649 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:33:28,649 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 02:33:28,718 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 02:33:28,993 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-28 02:33:28,994 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 02:33:28,994 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [106500577] [2024-11-28 02:33:28,994 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [106500577] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 02:33:28,994 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 02:33:28,994 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-11-28 02:33:28,994 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1526954505] [2024-11-28 02:33:28,995 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 02:33:28,996 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-11-28 02:33:28,996 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 02:33:28,996 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-11-28 02:33:28,996 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2024-11-28 02:33:28,997 INFO L87 Difference]: Start difference. First operand 174 states and 269 transitions. Second operand has 6 states, 5 states have (on average 4.8) internal successors, (24), 6 states have internal predecessors, (24), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2024-11-28 02:33:29,151 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 02:33:29,155 INFO L93 Difference]: Finished difference Result 334 states and 512 transitions. [2024-11-28 02:33:29,155 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-28 02:33:29,156 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 5 states have (on average 4.8) internal successors, (24), 6 states have internal predecessors, (24), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 28 [2024-11-28 02:33:29,156 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 02:33:29,157 INFO L225 Difference]: With dead ends: 334 [2024-11-28 02:33:29,157 INFO L226 Difference]: Without dead ends: 174 [2024-11-28 02:33:29,161 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2024-11-28 02:33:29,162 INFO L435 NwaCegarLoop]: 265 mSDtfsCounter, 0 mSDsluCounter, 1038 mSDsCounter, 0 mSdLazyCounter, 27 mSolverCounterSat, 11 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 1303 SdHoareTripleChecker+Invalid, 38 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.1s SdHoareTripleChecker+Time, 11 IncrementalHoareTripleChecker+Valid, 27 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-28 02:33:29,162 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 1303 Invalid, 38 Unknown, 0 Unchecked, 0.1s Time], IncrementalHoareTripleChecker [11 Valid, 27 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-28 02:33:29,163 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 174 states. [2024-11-28 02:33:29,175 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 174 to 174. [2024-11-28 02:33:29,175 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 174 states, 135 states have (on average 1.4444444444444444) internal successors, (195), 136 states have internal predecessors, (195), 31 states have call successors, (31), 7 states have call predecessors, (31), 7 states have return successors, (31), 31 states have call predecessors, (31), 31 states have call successors, (31) [2024-11-28 02:33:29,178 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 174 states to 174 states and 257 transitions. [2024-11-28 02:33:29,178 INFO L78 Accepts]: Start accepts. Automaton has 174 states and 257 transitions. Word has length 28 [2024-11-28 02:33:29,178 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 02:33:29,178 INFO L471 AbstractCegarLoop]: Abstraction has 174 states and 257 transitions. [2024-11-28 02:33:29,178 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 5 states have (on average 4.8) internal successors, (24), 6 states have internal predecessors, (24), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2024-11-28 02:33:29,178 INFO L276 IsEmpty]: Start isEmpty. Operand 174 states and 257 transitions. [2024-11-28 02:33:29,179 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2024-11-28 02:33:29,179 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 02:33:29,179 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 02:33:29,180 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2024-11-28 02:33:29,180 INFO L396 AbstractCegarLoop]: === Iteration 3 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 02:33:29,180 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 02:33:29,180 INFO L85 PathProgramCache]: Analyzing trace with hash -475299443, now seen corresponding path program 1 times [2024-11-28 02:33:29,180 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 02:33:29,180 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1349843526] [2024-11-28 02:33:29,181 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:33:29,181 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 02:33:29,273 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 02:33:29,571 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-28 02:33:29,572 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 02:33:29,572 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1349843526] [2024-11-28 02:33:29,572 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1349843526] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 02:33:29,572 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 02:33:29,572 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-28 02:33:29,572 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [311504659] [2024-11-28 02:33:29,572 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 02:33:29,573 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-28 02:33:29,573 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 02:33:29,573 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-28 02:33:29,573 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-28 02:33:29,573 INFO L87 Difference]: Start difference. First operand 174 states and 257 transitions. Second operand has 4 states, 4 states have (on average 8.75) internal successors, (35), 3 states have internal predecessors, (35), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2024-11-28 02:33:29,659 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 02:33:29,659 INFO L93 Difference]: Finished difference Result 335 states and 504 transitions. [2024-11-28 02:33:29,659 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-28 02:33:29,659 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 8.75) internal successors, (35), 3 states have internal predecessors, (35), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 39 [2024-11-28 02:33:29,660 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 02:33:29,661 INFO L225 Difference]: With dead ends: 335 [2024-11-28 02:33:29,661 INFO L226 Difference]: Without dead ends: 178 [2024-11-28 02:33:29,662 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-11-28 02:33:29,666 INFO L435 NwaCegarLoop]: 251 mSDtfsCounter, 3 mSDsluCounter, 492 mSDsCounter, 0 mSdLazyCounter, 24 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 3 SdHoareTripleChecker+Valid, 743 SdHoareTripleChecker+Invalid, 27 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 24 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-28 02:33:29,666 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [3 Valid, 743 Invalid, 27 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 24 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-28 02:33:29,667 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 178 states. [2024-11-28 02:33:29,687 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 178 to 178. [2024-11-28 02:33:29,687 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 178 states, 138 states have (on average 1.434782608695652) internal successors, (198), 139 states have internal predecessors, (198), 31 states have call successors, (31), 8 states have call predecessors, (31), 8 states have return successors, (31), 31 states have call predecessors, (31), 31 states have call successors, (31) [2024-11-28 02:33:29,692 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 178 states to 178 states and 260 transitions. [2024-11-28 02:33:29,693 INFO L78 Accepts]: Start accepts. Automaton has 178 states and 260 transitions. Word has length 39 [2024-11-28 02:33:29,695 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 02:33:29,695 INFO L471 AbstractCegarLoop]: Abstraction has 178 states and 260 transitions. [2024-11-28 02:33:29,695 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 8.75) internal successors, (35), 3 states have internal predecessors, (35), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2024-11-28 02:33:29,695 INFO L276 IsEmpty]: Start isEmpty. Operand 178 states and 260 transitions. [2024-11-28 02:33:29,697 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2024-11-28 02:33:29,697 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 02:33:29,697 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 02:33:29,697 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2024-11-28 02:33:29,697 INFO L396 AbstractCegarLoop]: === Iteration 4 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 02:33:29,698 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 02:33:29,698 INFO L85 PathProgramCache]: Analyzing trace with hash 1731358847, now seen corresponding path program 1 times [2024-11-28 02:33:29,698 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 02:33:29,698 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [504768444] [2024-11-28 02:33:29,698 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:33:29,698 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 02:33:29,768 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 02:33:29,864 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-11-28 02:33:29,864 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 02:33:29,864 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [504768444] [2024-11-28 02:33:29,865 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [504768444] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 02:33:29,865 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 02:33:29,865 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2024-11-28 02:33:29,865 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [152977003] [2024-11-28 02:33:29,865 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 02:33:29,865 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2024-11-28 02:33:29,865 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 02:33:29,866 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2024-11-28 02:33:29,866 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-11-28 02:33:29,866 INFO L87 Difference]: Start difference. First operand 178 states and 260 transitions. Second operand has 3 states, 3 states have (on average 14.666666666666666) internal successors, (44), 3 states have internal predecessors, (44), 3 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-28 02:33:29,943 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 02:33:29,943 INFO L93 Difference]: Finished difference Result 488 states and 723 transitions. [2024-11-28 02:33:29,945 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-11-28 02:33:29,945 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 14.666666666666666) internal successors, (44), 3 states have internal predecessors, (44), 3 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Word has length 55 [2024-11-28 02:33:29,945 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 02:33:29,949 INFO L225 Difference]: With dead ends: 488 [2024-11-28 02:33:29,950 INFO L226 Difference]: Without dead ends: 327 [2024-11-28 02:33:29,951 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-11-28 02:33:29,952 INFO L435 NwaCegarLoop]: 267 mSDtfsCounter, 208 mSDsluCounter, 248 mSDsCounter, 0 mSdLazyCounter, 7 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 208 SdHoareTripleChecker+Valid, 515 SdHoareTripleChecker+Invalid, 8 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 7 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-28 02:33:29,954 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [208 Valid, 515 Invalid, 8 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 7 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-28 02:33:29,955 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 327 states. [2024-11-28 02:33:30,000 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 327 to 322. [2024-11-28 02:33:30,001 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 322 states, 245 states have (on average 1.453061224489796) internal successors, (356), 247 states have internal predecessors, (356), 60 states have call successors, (60), 16 states have call predecessors, (60), 16 states have return successors, (60), 59 states have call predecessors, (60), 60 states have call successors, (60) [2024-11-28 02:33:30,004 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 322 states to 322 states and 476 transitions. [2024-11-28 02:33:30,005 INFO L78 Accepts]: Start accepts. Automaton has 322 states and 476 transitions. Word has length 55 [2024-11-28 02:33:30,005 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 02:33:30,006 INFO L471 AbstractCegarLoop]: Abstraction has 322 states and 476 transitions. [2024-11-28 02:33:30,006 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 14.666666666666666) internal successors, (44), 3 states have internal predecessors, (44), 3 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-28 02:33:30,006 INFO L276 IsEmpty]: Start isEmpty. Operand 322 states and 476 transitions. [2024-11-28 02:33:30,008 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2024-11-28 02:33:30,008 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 02:33:30,008 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 02:33:30,008 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3 [2024-11-28 02:33:30,008 INFO L396 AbstractCegarLoop]: === Iteration 5 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 02:33:30,011 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 02:33:30,011 INFO L85 PathProgramCache]: Analyzing trace with hash -1025460899, now seen corresponding path program 1 times [2024-11-28 02:33:30,012 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 02:33:30,012 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [271531771] [2024-11-28 02:33:30,012 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:33:30,012 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 02:33:30,075 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 02:33:30,187 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-11-28 02:33:30,188 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 02:33:30,189 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [271531771] [2024-11-28 02:33:30,189 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [271531771] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 02:33:30,189 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 02:33:30,189 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2024-11-28 02:33:30,190 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [316318477] [2024-11-28 02:33:30,190 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 02:33:30,191 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2024-11-28 02:33:30,191 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 02:33:30,192 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2024-11-28 02:33:30,192 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-11-28 02:33:30,192 INFO L87 Difference]: Start difference. First operand 322 states and 476 transitions. Second operand has 3 states, 3 states have (on average 15.0) internal successors, (45), 3 states have internal predecessors, (45), 3 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-28 02:33:30,297 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 02:33:30,298 INFO L93 Difference]: Finished difference Result 905 states and 1349 transitions. [2024-11-28 02:33:30,299 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-11-28 02:33:30,299 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 15.0) internal successors, (45), 3 states have internal predecessors, (45), 3 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Word has length 56 [2024-11-28 02:33:30,299 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 02:33:30,307 INFO L225 Difference]: With dead ends: 905 [2024-11-28 02:33:30,309 INFO L226 Difference]: Without dead ends: 600 [2024-11-28 02:33:30,310 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-11-28 02:33:30,311 INFO L435 NwaCegarLoop]: 287 mSDtfsCounter, 210 mSDsluCounter, 250 mSDsCounter, 0 mSdLazyCounter, 7 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 210 SdHoareTripleChecker+Valid, 537 SdHoareTripleChecker+Invalid, 8 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 7 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-28 02:33:30,313 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [210 Valid, 537 Invalid, 8 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 7 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-28 02:33:30,314 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 600 states. [2024-11-28 02:33:30,385 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 600 to 594. [2024-11-28 02:33:30,387 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 594 states, 445 states have (on average 1.4629213483146069) internal successors, (651), 449 states have internal predecessors, (651), 117 states have call successors, (117), 31 states have call predecessors, (117), 31 states have return successors, (117), 114 states have call predecessors, (117), 117 states have call successors, (117) [2024-11-28 02:33:30,394 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 594 states to 594 states and 885 transitions. [2024-11-28 02:33:30,394 INFO L78 Accepts]: Start accepts. Automaton has 594 states and 885 transitions. Word has length 56 [2024-11-28 02:33:30,395 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 02:33:30,395 INFO L471 AbstractCegarLoop]: Abstraction has 594 states and 885 transitions. [2024-11-28 02:33:30,395 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 15.0) internal successors, (45), 3 states have internal predecessors, (45), 3 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-28 02:33:30,395 INFO L276 IsEmpty]: Start isEmpty. Operand 594 states and 885 transitions. [2024-11-28 02:33:30,400 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2024-11-28 02:33:30,400 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 02:33:30,401 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 02:33:30,401 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4 [2024-11-28 02:33:30,401 INFO L396 AbstractCegarLoop]: === Iteration 6 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 02:33:30,401 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 02:33:30,402 INFO L85 PathProgramCache]: Analyzing trace with hash 1989642719, now seen corresponding path program 1 times [2024-11-28 02:33:30,402 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 02:33:30,403 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1264833584] [2024-11-28 02:33:30,403 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:33:30,403 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 02:33:30,456 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 02:33:30,620 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-11-28 02:33:30,620 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 02:33:30,620 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1264833584] [2024-11-28 02:33:30,620 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1264833584] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 02:33:30,620 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 02:33:30,620 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-28 02:33:30,620 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [766705120] [2024-11-28 02:33:30,621 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 02:33:30,621 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-28 02:33:30,621 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 02:33:30,622 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-28 02:33:30,622 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-11-28 02:33:30,622 INFO L87 Difference]: Start difference. First operand 594 states and 885 transitions. Second operand has 5 states, 5 states have (on average 9.0) internal successors, (45), 5 states have internal predecessors, (45), 3 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-28 02:33:30,923 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 02:33:30,923 INFO L93 Difference]: Finished difference Result 1271 states and 1888 transitions. [2024-11-28 02:33:30,923 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-11-28 02:33:30,923 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 9.0) internal successors, (45), 5 states have internal predecessors, (45), 3 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Word has length 56 [2024-11-28 02:33:30,924 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 02:33:30,932 INFO L225 Difference]: With dead ends: 1271 [2024-11-28 02:33:30,933 INFO L226 Difference]: Without dead ends: 694 [2024-11-28 02:33:30,937 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2024-11-28 02:33:30,937 INFO L435 NwaCegarLoop]: 225 mSDtfsCounter, 355 mSDsluCounter, 440 mSDsCounter, 0 mSdLazyCounter, 94 mSolverCounterSat, 14 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 355 SdHoareTripleChecker+Valid, 665 SdHoareTripleChecker+Invalid, 108 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 14 IncrementalHoareTripleChecker+Valid, 94 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-11-28 02:33:30,938 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [355 Valid, 665 Invalid, 108 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [14 Valid, 94 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-11-28 02:33:30,942 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 694 states. [2024-11-28 02:33:31,045 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 694 to 682. [2024-11-28 02:33:31,047 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 682 states, 520 states have (on average 1.448076923076923) internal successors, (753), 523 states have internal predecessors, (753), 124 states have call successors, (124), 37 states have call predecessors, (124), 37 states have return successors, (124), 121 states have call predecessors, (124), 124 states have call successors, (124) [2024-11-28 02:33:31,054 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 682 states to 682 states and 1001 transitions. [2024-11-28 02:33:31,058 INFO L78 Accepts]: Start accepts. Automaton has 682 states and 1001 transitions. Word has length 56 [2024-11-28 02:33:31,058 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 02:33:31,058 INFO L471 AbstractCegarLoop]: Abstraction has 682 states and 1001 transitions. [2024-11-28 02:33:31,058 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 9.0) internal successors, (45), 5 states have internal predecessors, (45), 3 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-28 02:33:31,058 INFO L276 IsEmpty]: Start isEmpty. Operand 682 states and 1001 transitions. [2024-11-28 02:33:31,059 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2024-11-28 02:33:31,060 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 02:33:31,060 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 02:33:31,060 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5 [2024-11-28 02:33:31,060 INFO L396 AbstractCegarLoop]: === Iteration 7 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 02:33:31,061 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 02:33:31,061 INFO L85 PathProgramCache]: Analyzing trace with hash -138082030, now seen corresponding path program 1 times [2024-11-28 02:33:31,062 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 02:33:31,062 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [501822012] [2024-11-28 02:33:31,062 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:33:31,062 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 02:33:31,125 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 02:33:31,316 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-11-28 02:33:31,317 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 02:33:31,317 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [501822012] [2024-11-28 02:33:31,317 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [501822012] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 02:33:31,317 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 02:33:31,317 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-28 02:33:31,317 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1449069691] [2024-11-28 02:33:31,317 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 02:33:31,317 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-28 02:33:31,318 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 02:33:31,318 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-28 02:33:31,318 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-11-28 02:33:31,318 INFO L87 Difference]: Start difference. First operand 682 states and 1001 transitions. Second operand has 5 states, 5 states have (on average 9.2) internal successors, (46), 5 states have internal predecessors, (46), 3 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-28 02:33:31,561 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 02:33:31,561 INFO L93 Difference]: Finished difference Result 1271 states and 1880 transitions. [2024-11-28 02:33:31,561 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-11-28 02:33:31,562 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 9.2) internal successors, (46), 5 states have internal predecessors, (46), 3 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Word has length 57 [2024-11-28 02:33:31,562 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 02:33:31,567 INFO L225 Difference]: With dead ends: 1271 [2024-11-28 02:33:31,567 INFO L226 Difference]: Without dead ends: 694 [2024-11-28 02:33:31,569 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2024-11-28 02:33:31,570 INFO L435 NwaCegarLoop]: 226 mSDtfsCounter, 352 mSDsluCounter, 442 mSDsCounter, 0 mSdLazyCounter, 91 mSolverCounterSat, 13 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 352 SdHoareTripleChecker+Valid, 668 SdHoareTripleChecker+Invalid, 104 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 13 IncrementalHoareTripleChecker+Valid, 91 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-28 02:33:31,570 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [352 Valid, 668 Invalid, 104 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [13 Valid, 91 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-28 02:33:31,571 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 694 states. [2024-11-28 02:33:31,650 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 694 to 682. [2024-11-28 02:33:31,652 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 682 states, 520 states have (on average 1.4403846153846154) internal successors, (749), 523 states have internal predecessors, (749), 124 states have call successors, (124), 37 states have call predecessors, (124), 37 states have return successors, (124), 121 states have call predecessors, (124), 124 states have call successors, (124) [2024-11-28 02:33:31,658 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 682 states to 682 states and 997 transitions. [2024-11-28 02:33:31,659 INFO L78 Accepts]: Start accepts. Automaton has 682 states and 997 transitions. Word has length 57 [2024-11-28 02:33:31,659 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 02:33:31,660 INFO L471 AbstractCegarLoop]: Abstraction has 682 states and 997 transitions. [2024-11-28 02:33:31,660 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 9.2) internal successors, (46), 5 states have internal predecessors, (46), 3 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-28 02:33:31,660 INFO L276 IsEmpty]: Start isEmpty. Operand 682 states and 997 transitions. [2024-11-28 02:33:31,661 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2024-11-28 02:33:31,661 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 02:33:31,661 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 02:33:31,661 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6 [2024-11-28 02:33:31,661 INFO L396 AbstractCegarLoop]: === Iteration 8 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 02:33:31,662 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 02:33:31,662 INFO L85 PathProgramCache]: Analyzing trace with hash 1602179858, now seen corresponding path program 1 times [2024-11-28 02:33:31,662 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 02:33:31,662 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [302583082] [2024-11-28 02:33:31,662 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:33:31,662 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 02:33:31,710 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 02:33:31,932 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-11-28 02:33:31,933 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 02:33:31,933 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [302583082] [2024-11-28 02:33:31,933 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [302583082] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 02:33:31,933 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 02:33:31,933 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-28 02:33:31,934 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [109852881] [2024-11-28 02:33:31,934 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 02:33:31,934 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-28 02:33:31,934 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 02:33:31,935 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-28 02:33:31,935 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-28 02:33:31,935 INFO L87 Difference]: Start difference. First operand 682 states and 997 transitions. Second operand has 4 states, 4 states have (on average 11.75) internal successors, (47), 3 states have internal predecessors, (47), 2 states have call successors, (5), 3 states have call predecessors, (5), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-28 02:33:32,028 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 02:33:32,029 INFO L93 Difference]: Finished difference Result 1279 states and 1892 transitions. [2024-11-28 02:33:32,029 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-28 02:33:32,030 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 11.75) internal successors, (47), 3 states have internal predecessors, (47), 2 states have call successors, (5), 3 states have call predecessors, (5), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 58 [2024-11-28 02:33:32,030 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 02:33:32,035 INFO L225 Difference]: With dead ends: 1279 [2024-11-28 02:33:32,036 INFO L226 Difference]: Without dead ends: 702 [2024-11-28 02:33:32,037 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-11-28 02:33:32,038 INFO L435 NwaCegarLoop]: 253 mSDtfsCounter, 4 mSDsluCounter, 502 mSDsCounter, 0 mSdLazyCounter, 15 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 4 SdHoareTripleChecker+Valid, 755 SdHoareTripleChecker+Invalid, 16 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 15 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-28 02:33:32,039 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [4 Valid, 755 Invalid, 16 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 15 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-28 02:33:32,041 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 702 states. [2024-11-28 02:33:32,103 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 702 to 702. [2024-11-28 02:33:32,104 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 702 states, 536 states have (on average 1.4272388059701493) internal successors, (765), 539 states have internal predecessors, (765), 124 states have call successors, (124), 41 states have call predecessors, (124), 41 states have return successors, (124), 121 states have call predecessors, (124), 124 states have call successors, (124) [2024-11-28 02:33:32,110 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 702 states to 702 states and 1013 transitions. [2024-11-28 02:33:32,111 INFO L78 Accepts]: Start accepts. Automaton has 702 states and 1013 transitions. Word has length 58 [2024-11-28 02:33:32,111 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 02:33:32,111 INFO L471 AbstractCegarLoop]: Abstraction has 702 states and 1013 transitions. [2024-11-28 02:33:32,112 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 11.75) internal successors, (47), 3 states have internal predecessors, (47), 2 states have call successors, (5), 3 states have call predecessors, (5), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-28 02:33:32,112 INFO L276 IsEmpty]: Start isEmpty. Operand 702 states and 1013 transitions. [2024-11-28 02:33:32,114 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2024-11-28 02:33:32,114 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 02:33:32,114 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 02:33:32,114 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7 [2024-11-28 02:33:32,114 INFO L396 AbstractCegarLoop]: === Iteration 9 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 02:33:32,117 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 02:33:32,117 INFO L85 PathProgramCache]: Analyzing trace with hash 1495777117, now seen corresponding path program 1 times [2024-11-28 02:33:32,117 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 02:33:32,117 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [273781361] [2024-11-28 02:33:32,117 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:33:32,117 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 02:33:32,155 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 02:33:32,338 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-11-28 02:33:32,338 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 02:33:32,339 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [273781361] [2024-11-28 02:33:32,339 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [273781361] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 02:33:32,339 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 02:33:32,339 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-28 02:33:32,339 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1623991442] [2024-11-28 02:33:32,339 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 02:33:32,339 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-28 02:33:32,340 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 02:33:32,340 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-28 02:33:32,340 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-28 02:33:32,340 INFO L87 Difference]: Start difference. First operand 702 states and 1013 transitions. Second operand has 4 states, 4 states have (on average 13.25) internal successors, (53), 3 states have internal predecessors, (53), 2 states have call successors, (6), 3 states have call predecessors, (6), 1 states have return successors, (4), 1 states have call predecessors, (4), 1 states have call successors, (4) [2024-11-28 02:33:32,439 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 02:33:32,439 INFO L93 Difference]: Finished difference Result 1319 states and 1936 transitions. [2024-11-28 02:33:32,440 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-28 02:33:32,440 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 13.25) internal successors, (53), 3 states have internal predecessors, (53), 2 states have call successors, (6), 3 states have call predecessors, (6), 1 states have return successors, (4), 1 states have call predecessors, (4), 1 states have call successors, (4) Word has length 66 [2024-11-28 02:33:32,440 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 02:33:32,445 INFO L225 Difference]: With dead ends: 1319 [2024-11-28 02:33:32,445 INFO L226 Difference]: Without dead ends: 722 [2024-11-28 02:33:32,447 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-11-28 02:33:32,447 INFO L435 NwaCegarLoop]: 250 mSDtfsCounter, 4 mSDsluCounter, 491 mSDsCounter, 0 mSdLazyCounter, 26 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 4 SdHoareTripleChecker+Valid, 741 SdHoareTripleChecker+Invalid, 30 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 26 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-28 02:33:32,447 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [4 Valid, 741 Invalid, 30 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 26 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-28 02:33:32,449 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 722 states. [2024-11-28 02:33:32,502 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 722 to 722. [2024-11-28 02:33:32,504 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 722 states, 552 states have (on average 1.414855072463768) internal successors, (781), 555 states have internal predecessors, (781), 124 states have call successors, (124), 45 states have call predecessors, (124), 45 states have return successors, (124), 121 states have call predecessors, (124), 124 states have call successors, (124) [2024-11-28 02:33:32,510 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 722 states to 722 states and 1029 transitions. [2024-11-28 02:33:32,511 INFO L78 Accepts]: Start accepts. Automaton has 722 states and 1029 transitions. Word has length 66 [2024-11-28 02:33:32,512 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 02:33:32,512 INFO L471 AbstractCegarLoop]: Abstraction has 722 states and 1029 transitions. [2024-11-28 02:33:32,512 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 13.25) internal successors, (53), 3 states have internal predecessors, (53), 2 states have call successors, (6), 3 states have call predecessors, (6), 1 states have return successors, (4), 1 states have call predecessors, (4), 1 states have call successors, (4) [2024-11-28 02:33:32,512 INFO L276 IsEmpty]: Start isEmpty. Operand 722 states and 1029 transitions. [2024-11-28 02:33:32,513 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 75 [2024-11-28 02:33:32,513 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 02:33:32,514 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 02:33:32,514 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8 [2024-11-28 02:33:32,514 INFO L396 AbstractCegarLoop]: === Iteration 10 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 02:33:32,515 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 02:33:32,515 INFO L85 PathProgramCache]: Analyzing trace with hash 1186649897, now seen corresponding path program 1 times [2024-11-28 02:33:32,515 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 02:33:32,515 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1343062310] [2024-11-28 02:33:32,515 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:33:32,515 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 02:33:32,551 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 02:33:32,777 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-11-28 02:33:32,777 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 02:33:32,777 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1343062310] [2024-11-28 02:33:32,777 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1343062310] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 02:33:32,777 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 02:33:32,777 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-28 02:33:32,777 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1322760025] [2024-11-28 02:33:32,777 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 02:33:32,779 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-28 02:33:32,779 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 02:33:32,779 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-28 02:33:32,779 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-28 02:33:32,779 INFO L87 Difference]: Start difference. First operand 722 states and 1029 transitions. Second operand has 4 states, 4 states have (on average 14.75) internal successors, (59), 3 states have internal predecessors, (59), 2 states have call successors, (7), 3 states have call predecessors, (7), 1 states have return successors, (5), 1 states have call predecessors, (5), 1 states have call successors, (5) [2024-11-28 02:33:32,881 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 02:33:32,881 INFO L93 Difference]: Finished difference Result 1359 states and 1968 transitions. [2024-11-28 02:33:32,882 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-28 02:33:32,882 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 14.75) internal successors, (59), 3 states have internal predecessors, (59), 2 states have call successors, (7), 3 states have call predecessors, (7), 1 states have return successors, (5), 1 states have call predecessors, (5), 1 states have call successors, (5) Word has length 74 [2024-11-28 02:33:32,882 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 02:33:32,887 INFO L225 Difference]: With dead ends: 1359 [2024-11-28 02:33:32,887 INFO L226 Difference]: Without dead ends: 742 [2024-11-28 02:33:32,889 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-11-28 02:33:32,889 INFO L435 NwaCegarLoop]: 250 mSDtfsCounter, 4 mSDsluCounter, 491 mSDsCounter, 0 mSdLazyCounter, 26 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 4 SdHoareTripleChecker+Valid, 741 SdHoareTripleChecker+Invalid, 30 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 26 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-28 02:33:32,890 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [4 Valid, 741 Invalid, 30 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 26 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-28 02:33:32,891 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 742 states. [2024-11-28 02:33:32,944 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 742 to 742. [2024-11-28 02:33:32,945 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 742 states, 568 states have (on average 1.403169014084507) internal successors, (797), 571 states have internal predecessors, (797), 124 states have call successors, (124), 49 states have call predecessors, (124), 49 states have return successors, (124), 121 states have call predecessors, (124), 124 states have call successors, (124) [2024-11-28 02:33:32,951 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 742 states to 742 states and 1045 transitions. [2024-11-28 02:33:32,952 INFO L78 Accepts]: Start accepts. Automaton has 742 states and 1045 transitions. Word has length 74 [2024-11-28 02:33:32,952 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 02:33:32,952 INFO L471 AbstractCegarLoop]: Abstraction has 742 states and 1045 transitions. [2024-11-28 02:33:32,952 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 14.75) internal successors, (59), 3 states have internal predecessors, (59), 2 states have call successors, (7), 3 states have call predecessors, (7), 1 states have return successors, (5), 1 states have call predecessors, (5), 1 states have call successors, (5) [2024-11-28 02:33:32,952 INFO L276 IsEmpty]: Start isEmpty. Operand 742 states and 1045 transitions. [2024-11-28 02:33:32,954 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 75 [2024-11-28 02:33:32,954 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 02:33:32,954 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 02:33:32,954 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable9 [2024-11-28 02:33:32,954 INFO L396 AbstractCegarLoop]: === Iteration 11 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 02:33:32,954 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 02:33:32,955 INFO L85 PathProgramCache]: Analyzing trace with hash -1209809406, now seen corresponding path program 1 times [2024-11-28 02:33:32,955 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 02:33:32,955 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1989846460] [2024-11-28 02:33:32,955 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:33:32,955 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 02:33:32,995 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 02:33:33,147 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-11-28 02:33:33,148 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 02:33:33,148 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1989846460] [2024-11-28 02:33:33,148 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1989846460] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 02:33:33,148 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 02:33:33,148 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-28 02:33:33,148 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [874457424] [2024-11-28 02:33:33,148 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 02:33:33,148 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-28 02:33:33,149 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 02:33:33,149 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-28 02:33:33,149 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-28 02:33:33,149 INFO L87 Difference]: Start difference. First operand 742 states and 1045 transitions. Second operand has 4 states, 4 states have (on average 14.75) internal successors, (59), 3 states have internal predecessors, (59), 2 states have call successors, (7), 3 states have call predecessors, (7), 1 states have return successors, (5), 1 states have call predecessors, (5), 1 states have call successors, (5) [2024-11-28 02:33:33,239 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 02:33:33,239 INFO L93 Difference]: Finished difference Result 1395 states and 1984 transitions. [2024-11-28 02:33:33,240 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-28 02:33:33,240 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 14.75) internal successors, (59), 3 states have internal predecessors, (59), 2 states have call successors, (7), 3 states have call predecessors, (7), 1 states have return successors, (5), 1 states have call predecessors, (5), 1 states have call successors, (5) Word has length 74 [2024-11-28 02:33:33,240 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 02:33:33,245 INFO L225 Difference]: With dead ends: 1395 [2024-11-28 02:33:33,245 INFO L226 Difference]: Without dead ends: 758 [2024-11-28 02:33:33,247 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-11-28 02:33:33,247 INFO L435 NwaCegarLoop]: 255 mSDtfsCounter, 3 mSDsluCounter, 496 mSDsCounter, 0 mSdLazyCounter, 21 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 3 SdHoareTripleChecker+Valid, 751 SdHoareTripleChecker+Invalid, 22 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 21 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-28 02:33:33,247 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [3 Valid, 751 Invalid, 22 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 21 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-28 02:33:33,248 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 758 states. [2024-11-28 02:33:33,294 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 758 to 758. [2024-11-28 02:33:33,295 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 758 states, 580 states have (on average 1.3948275862068966) internal successors, (809), 583 states have internal predecessors, (809), 124 states have call successors, (124), 53 states have call predecessors, (124), 53 states have return successors, (124), 121 states have call predecessors, (124), 124 states have call successors, (124) [2024-11-28 02:33:33,300 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 758 states to 758 states and 1057 transitions. [2024-11-28 02:33:33,302 INFO L78 Accepts]: Start accepts. Automaton has 758 states and 1057 transitions. Word has length 74 [2024-11-28 02:33:33,302 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 02:33:33,302 INFO L471 AbstractCegarLoop]: Abstraction has 758 states and 1057 transitions. [2024-11-28 02:33:33,302 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 14.75) internal successors, (59), 3 states have internal predecessors, (59), 2 states have call successors, (7), 3 states have call predecessors, (7), 1 states have return successors, (5), 1 states have call predecessors, (5), 1 states have call successors, (5) [2024-11-28 02:33:33,302 INFO L276 IsEmpty]: Start isEmpty. Operand 758 states and 1057 transitions. [2024-11-28 02:33:33,304 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 83 [2024-11-28 02:33:33,304 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 02:33:33,304 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 02:33:33,304 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable10 [2024-11-28 02:33:33,305 INFO L396 AbstractCegarLoop]: === Iteration 12 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 02:33:33,305 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 02:33:33,305 INFO L85 PathProgramCache]: Analyzing trace with hash -203434871, now seen corresponding path program 1 times [2024-11-28 02:33:33,305 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 02:33:33,305 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [549532318] [2024-11-28 02:33:33,305 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:33:33,305 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 02:33:33,341 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 02:33:33,594 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-11-28 02:33:33,594 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 02:33:33,594 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [549532318] [2024-11-28 02:33:33,594 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [549532318] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 02:33:33,595 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 02:33:33,595 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-28 02:33:33,595 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1041500191] [2024-11-28 02:33:33,595 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 02:33:33,595 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-28 02:33:33,595 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 02:33:33,596 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-28 02:33:33,596 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-28 02:33:33,596 INFO L87 Difference]: Start difference. First operand 758 states and 1057 transitions. Second operand has 4 states, 4 states have (on average 15.25) internal successors, (61), 3 states have internal predecessors, (61), 2 states have call successors, (8), 3 states have call predecessors, (8), 1 states have return successors, (6), 1 states have call predecessors, (6), 1 states have call successors, (6) [2024-11-28 02:33:33,696 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 02:33:33,696 INFO L93 Difference]: Finished difference Result 1435 states and 2020 transitions. [2024-11-28 02:33:33,697 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-28 02:33:33,697 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 15.25) internal successors, (61), 3 states have internal predecessors, (61), 2 states have call successors, (8), 3 states have call predecessors, (8), 1 states have return successors, (6), 1 states have call predecessors, (6), 1 states have call successors, (6) Word has length 82 [2024-11-28 02:33:33,697 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 02:33:33,702 INFO L225 Difference]: With dead ends: 1435 [2024-11-28 02:33:33,702 INFO L226 Difference]: Without dead ends: 782 [2024-11-28 02:33:33,704 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-11-28 02:33:33,705 INFO L435 NwaCegarLoop]: 254 mSDtfsCounter, 5 mSDsluCounter, 499 mSDsCounter, 0 mSdLazyCounter, 20 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 5 SdHoareTripleChecker+Valid, 753 SdHoareTripleChecker+Invalid, 22 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 20 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-28 02:33:33,705 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [5 Valid, 753 Invalid, 22 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 20 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-28 02:33:33,706 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 782 states. [2024-11-28 02:33:33,759 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 782 to 782. [2024-11-28 02:33:33,760 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 782 states, 600 states have (on average 1.3816666666666666) internal successors, (829), 603 states have internal predecessors, (829), 124 states have call successors, (124), 57 states have call predecessors, (124), 57 states have return successors, (124), 121 states have call predecessors, (124), 124 states have call successors, (124) [2024-11-28 02:33:33,766 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 782 states to 782 states and 1077 transitions. [2024-11-28 02:33:33,767 INFO L78 Accepts]: Start accepts. Automaton has 782 states and 1077 transitions. Word has length 82 [2024-11-28 02:33:33,767 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 02:33:33,767 INFO L471 AbstractCegarLoop]: Abstraction has 782 states and 1077 transitions. [2024-11-28 02:33:33,768 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 15.25) internal successors, (61), 3 states have internal predecessors, (61), 2 states have call successors, (8), 3 states have call predecessors, (8), 1 states have return successors, (6), 1 states have call predecessors, (6), 1 states have call successors, (6) [2024-11-28 02:33:33,768 INFO L276 IsEmpty]: Start isEmpty. Operand 782 states and 1077 transitions. [2024-11-28 02:33:33,770 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 86 [2024-11-28 02:33:33,770 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 02:33:33,770 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 02:33:33,770 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable11 [2024-11-28 02:33:33,770 INFO L396 AbstractCegarLoop]: === Iteration 13 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 02:33:33,771 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 02:33:33,771 INFO L85 PathProgramCache]: Analyzing trace with hash -1273158516, now seen corresponding path program 1 times [2024-11-28 02:33:33,771 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 02:33:33,771 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1800536090] [2024-11-28 02:33:33,771 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:33:33,771 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 02:33:33,870 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 02:33:34,490 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-11-28 02:33:34,491 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 02:33:34,491 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1800536090] [2024-11-28 02:33:34,491 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1800536090] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 02:33:34,491 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 02:33:34,491 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2024-11-28 02:33:34,491 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [444419478] [2024-11-28 02:33:34,491 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 02:33:34,492 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2024-11-28 02:33:34,492 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 02:33:34,492 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-11-28 02:33:34,492 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2024-11-28 02:33:34,492 INFO L87 Difference]: Start difference. First operand 782 states and 1077 transitions. Second operand has 7 states, 7 states have (on average 9.142857142857142) internal successors, (64), 6 states have internal predecessors, (64), 3 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (7), 4 states have call predecessors, (7), 3 states have call successors, (7) [2024-11-28 02:33:34,913 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 02:33:34,913 INFO L93 Difference]: Finished difference Result 2029 states and 2783 transitions. [2024-11-28 02:33:34,914 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2024-11-28 02:33:34,914 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 9.142857142857142) internal successors, (64), 6 states have internal predecessors, (64), 3 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (7), 4 states have call predecessors, (7), 3 states have call successors, (7) Word has length 85 [2024-11-28 02:33:34,914 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 02:33:34,923 INFO L225 Difference]: With dead ends: 2029 [2024-11-28 02:33:34,923 INFO L226 Difference]: Without dead ends: 1352 [2024-11-28 02:33:34,925 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=27, Invalid=83, Unknown=0, NotChecked=0, Total=110 [2024-11-28 02:33:34,926 INFO L435 NwaCegarLoop]: 259 mSDtfsCounter, 196 mSDsluCounter, 1193 mSDsCounter, 0 mSdLazyCounter, 102 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 200 SdHoareTripleChecker+Valid, 1452 SdHoareTripleChecker+Invalid, 105 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 102 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-11-28 02:33:34,926 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [200 Valid, 1452 Invalid, 105 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 102 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-11-28 02:33:34,928 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1352 states. [2024-11-28 02:33:35,021 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1352 to 1066. [2024-11-28 02:33:35,024 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1066 states, 811 states have (on average 1.369913686806412) internal successors, (1111), 816 states have internal predecessors, (1111), 172 states have call successors, (172), 82 states have call predecessors, (172), 82 states have return successors, (172), 167 states have call predecessors, (172), 172 states have call successors, (172) [2024-11-28 02:33:35,031 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1066 states to 1066 states and 1455 transitions. [2024-11-28 02:33:35,033 INFO L78 Accepts]: Start accepts. Automaton has 1066 states and 1455 transitions. Word has length 85 [2024-11-28 02:33:35,033 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 02:33:35,033 INFO L471 AbstractCegarLoop]: Abstraction has 1066 states and 1455 transitions. [2024-11-28 02:33:35,033 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 9.142857142857142) internal successors, (64), 6 states have internal predecessors, (64), 3 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (7), 4 states have call predecessors, (7), 3 states have call successors, (7) [2024-11-28 02:33:35,033 INFO L276 IsEmpty]: Start isEmpty. Operand 1066 states and 1455 transitions. [2024-11-28 02:33:35,035 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 89 [2024-11-28 02:33:35,035 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 02:33:35,036 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 02:33:35,037 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable12 [2024-11-28 02:33:35,038 INFO L396 AbstractCegarLoop]: === Iteration 14 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 02:33:35,038 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 02:33:35,038 INFO L85 PathProgramCache]: Analyzing trace with hash 754951298, now seen corresponding path program 1 times [2024-11-28 02:33:35,038 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 02:33:35,038 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [464185816] [2024-11-28 02:33:35,038 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:33:35,039 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 02:33:35,080 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 02:33:35,516 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-11-28 02:33:35,517 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 02:33:35,517 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [464185816] [2024-11-28 02:33:35,517 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [464185816] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-28 02:33:35,517 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2006959594] [2024-11-28 02:33:35,517 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:33:35,518 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-28 02:33:35,518 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_58ef54d4-00f4-4eef-9b59-4b85557f99bb/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 02:33:35,520 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_58ef54d4-00f4-4eef-9b59-4b85557f99bb/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-28 02:33:35,523 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_58ef54d4-00f4-4eef-9b59-4b85557f99bb/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2024-11-28 02:33:35,740 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 02:33:35,744 INFO L256 TraceCheckSpWp]: Trace formula consists of 474 conjuncts, 13 conjuncts are in the unsatisfiable core [2024-11-28 02:33:35,753 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-28 02:33:35,905 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2024-11-28 02:33:35,905 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-11-28 02:33:35,905 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2006959594] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 02:33:35,905 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-11-28 02:33:35,905 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [10] total 15 [2024-11-28 02:33:35,905 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [776319870] [2024-11-28 02:33:35,905 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 02:33:35,906 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2024-11-28 02:33:35,906 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 02:33:35,906 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2024-11-28 02:33:35,906 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=30, Invalid=180, Unknown=0, NotChecked=0, Total=210 [2024-11-28 02:33:35,907 INFO L87 Difference]: Start difference. First operand 1066 states and 1455 transitions. Second operand has 8 states, 7 states have (on average 9.142857142857142) internal successors, (64), 7 states have internal predecessors, (64), 2 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (7), 1 states have call predecessors, (7), 1 states have call successors, (7) [2024-11-28 02:33:36,230 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 02:33:36,230 INFO L93 Difference]: Finished difference Result 2299 states and 3249 transitions. [2024-11-28 02:33:36,231 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2024-11-28 02:33:36,231 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 7 states have (on average 9.142857142857142) internal successors, (64), 7 states have internal predecessors, (64), 2 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (7), 1 states have call predecessors, (7), 1 states have call successors, (7) Word has length 88 [2024-11-28 02:33:36,231 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 02:33:36,241 INFO L225 Difference]: With dead ends: 2299 [2024-11-28 02:33:36,241 INFO L226 Difference]: Without dead ends: 1486 [2024-11-28 02:33:36,243 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 101 GetRequests, 85 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 12 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=45, Invalid=261, Unknown=0, NotChecked=0, Total=306 [2024-11-28 02:33:36,244 INFO L435 NwaCegarLoop]: 430 mSDtfsCounter, 135 mSDsluCounter, 2384 mSDsCounter, 0 mSdLazyCounter, 124 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 161 SdHoareTripleChecker+Valid, 2814 SdHoareTripleChecker+Invalid, 126 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 124 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-28 02:33:36,244 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [161 Valid, 2814 Invalid, 126 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 124 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-28 02:33:36,246 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1486 states. [2024-11-28 02:33:36,363 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1486 to 1074. [2024-11-28 02:33:36,365 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1074 states, 815 states have (on average 1.3607361963190183) internal successors, (1109), 822 states have internal predecessors, (1109), 174 states have call successors, (174), 84 states have call predecessors, (174), 84 states have return successors, (174), 167 states have call predecessors, (174), 174 states have call successors, (174) [2024-11-28 02:33:36,372 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1074 states to 1074 states and 1457 transitions. [2024-11-28 02:33:36,374 INFO L78 Accepts]: Start accepts. Automaton has 1074 states and 1457 transitions. Word has length 88 [2024-11-28 02:33:36,374 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 02:33:36,374 INFO L471 AbstractCegarLoop]: Abstraction has 1074 states and 1457 transitions. [2024-11-28 02:33:36,374 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 7 states have (on average 9.142857142857142) internal successors, (64), 7 states have internal predecessors, (64), 2 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (7), 1 states have call predecessors, (7), 1 states have call successors, (7) [2024-11-28 02:33:36,374 INFO L276 IsEmpty]: Start isEmpty. Operand 1074 states and 1457 transitions. [2024-11-28 02:33:36,376 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 90 [2024-11-28 02:33:36,376 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 02:33:36,376 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 02:33:36,386 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_58ef54d4-00f4-4eef-9b59-4b85557f99bb/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Ended with exit code 0 [2024-11-28 02:33:36,576 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 2 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_58ef54d4-00f4-4eef-9b59-4b85557f99bb/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable13 [2024-11-28 02:33:36,577 INFO L396 AbstractCegarLoop]: === Iteration 15 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 02:33:36,577 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 02:33:36,577 INFO L85 PathProgramCache]: Analyzing trace with hash -1891908626, now seen corresponding path program 1 times [2024-11-28 02:33:36,577 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 02:33:36,577 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2093749465] [2024-11-28 02:33:36,578 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:33:36,578 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 02:33:36,621 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 02:33:36,794 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-11-28 02:33:36,794 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 02:33:36,794 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2093749465] [2024-11-28 02:33:36,794 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2093749465] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 02:33:36,794 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 02:33:36,795 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-28 02:33:36,796 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1200164917] [2024-11-28 02:33:36,796 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 02:33:36,796 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-28 02:33:36,796 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 02:33:36,797 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-28 02:33:36,797 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-28 02:33:36,797 INFO L87 Difference]: Start difference. First operand 1074 states and 1457 transitions. Second operand has 4 states, 4 states have (on average 17.0) internal successors, (68), 3 states have internal predecessors, (68), 2 states have call successors, (9), 3 states have call predecessors, (9), 1 states have return successors, (7), 1 states have call predecessors, (7), 1 states have call successors, (7) [2024-11-28 02:33:36,926 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 02:33:36,926 INFO L93 Difference]: Finished difference Result 1999 states and 2732 transitions. [2024-11-28 02:33:36,926 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-28 02:33:36,927 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 17.0) internal successors, (68), 3 states have internal predecessors, (68), 2 states have call successors, (9), 3 states have call predecessors, (9), 1 states have return successors, (7), 1 states have call predecessors, (7), 1 states have call successors, (7) Word has length 89 [2024-11-28 02:33:36,927 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 02:33:36,934 INFO L225 Difference]: With dead ends: 1999 [2024-11-28 02:33:36,934 INFO L226 Difference]: Without dead ends: 1098 [2024-11-28 02:33:36,936 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-11-28 02:33:36,937 INFO L435 NwaCegarLoop]: 255 mSDtfsCounter, 3 mSDsluCounter, 496 mSDsCounter, 0 mSdLazyCounter, 21 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 3 SdHoareTripleChecker+Valid, 751 SdHoareTripleChecker+Invalid, 22 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 21 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-28 02:33:36,937 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [3 Valid, 751 Invalid, 22 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 21 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-28 02:33:36,940 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1098 states. [2024-11-28 02:33:37,045 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1098 to 1098. [2024-11-28 02:33:37,047 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1098 states, 833 states have (on average 1.3529411764705883) internal successors, (1127), 840 states have internal predecessors, (1127), 174 states have call successors, (174), 90 states have call predecessors, (174), 90 states have return successors, (174), 167 states have call predecessors, (174), 174 states have call successors, (174) [2024-11-28 02:33:37,053 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1098 states to 1098 states and 1475 transitions. [2024-11-28 02:33:37,055 INFO L78 Accepts]: Start accepts. Automaton has 1098 states and 1475 transitions. Word has length 89 [2024-11-28 02:33:37,055 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 02:33:37,055 INFO L471 AbstractCegarLoop]: Abstraction has 1098 states and 1475 transitions. [2024-11-28 02:33:37,056 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 17.0) internal successors, (68), 3 states have internal predecessors, (68), 2 states have call successors, (9), 3 states have call predecessors, (9), 1 states have return successors, (7), 1 states have call predecessors, (7), 1 states have call successors, (7) [2024-11-28 02:33:37,056 INFO L276 IsEmpty]: Start isEmpty. Operand 1098 states and 1475 transitions. [2024-11-28 02:33:37,059 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 92 [2024-11-28 02:33:37,059 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 02:33:37,059 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 02:33:37,059 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable14 [2024-11-28 02:33:37,059 INFO L396 AbstractCegarLoop]: === Iteration 16 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 02:33:37,060 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 02:33:37,060 INFO L85 PathProgramCache]: Analyzing trace with hash -103126629, now seen corresponding path program 1 times [2024-11-28 02:33:37,060 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 02:33:37,060 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1610367938] [2024-11-28 02:33:37,060 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:33:37,060 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 02:33:37,097 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 02:33:37,244 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-11-28 02:33:37,245 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 02:33:37,245 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1610367938] [2024-11-28 02:33:37,245 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1610367938] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 02:33:37,245 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 02:33:37,245 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2024-11-28 02:33:37,245 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [321872488] [2024-11-28 02:33:37,245 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 02:33:37,246 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2024-11-28 02:33:37,246 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 02:33:37,246 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-11-28 02:33:37,247 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2024-11-28 02:33:37,247 INFO L87 Difference]: Start difference. First operand 1098 states and 1475 transitions. Second operand has 7 states, 7 states have (on average 9.571428571428571) internal successors, (67), 6 states have internal predecessors, (67), 3 states have call successors, (9), 2 states have call predecessors, (9), 2 states have return successors, (7), 3 states have call predecessors, (7), 2 states have call successors, (7) [2024-11-28 02:33:37,513 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 02:33:37,514 INFO L93 Difference]: Finished difference Result 1978 states and 2660 transitions. [2024-11-28 02:33:37,514 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2024-11-28 02:33:37,514 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 9.571428571428571) internal successors, (67), 6 states have internal predecessors, (67), 3 states have call successors, (9), 2 states have call predecessors, (9), 2 states have return successors, (7), 3 states have call predecessors, (7), 2 states have call successors, (7) Word has length 91 [2024-11-28 02:33:37,514 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 02:33:37,522 INFO L225 Difference]: With dead ends: 1978 [2024-11-28 02:33:37,522 INFO L226 Difference]: Without dead ends: 1135 [2024-11-28 02:33:37,524 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=27, Invalid=83, Unknown=0, NotChecked=0, Total=110 [2024-11-28 02:33:37,525 INFO L435 NwaCegarLoop]: 255 mSDtfsCounter, 249 mSDsluCounter, 1206 mSDsCounter, 0 mSdLazyCounter, 75 mSolverCounterSat, 15 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 250 SdHoareTripleChecker+Valid, 1461 SdHoareTripleChecker+Invalid, 90 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 15 IncrementalHoareTripleChecker+Valid, 75 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-28 02:33:37,525 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [250 Valid, 1461 Invalid, 90 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [15 Valid, 75 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-28 02:33:37,527 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1135 states. [2024-11-28 02:33:37,626 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1135 to 1101. [2024-11-28 02:33:37,628 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1101 states, 847 states have (on average 1.345926800472255) internal successors, (1140), 859 states have internal predecessors, (1140), 162 states have call successors, (162), 91 states have call predecessors, (162), 91 states have return successors, (162), 150 states have call predecessors, (162), 162 states have call successors, (162) [2024-11-28 02:33:37,634 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1101 states to 1101 states and 1464 transitions. [2024-11-28 02:33:37,636 INFO L78 Accepts]: Start accepts. Automaton has 1101 states and 1464 transitions. Word has length 91 [2024-11-28 02:33:37,637 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 02:33:37,637 INFO L471 AbstractCegarLoop]: Abstraction has 1101 states and 1464 transitions. [2024-11-28 02:33:37,637 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 9.571428571428571) internal successors, (67), 6 states have internal predecessors, (67), 3 states have call successors, (9), 2 states have call predecessors, (9), 2 states have return successors, (7), 3 states have call predecessors, (7), 2 states have call successors, (7) [2024-11-28 02:33:37,637 INFO L276 IsEmpty]: Start isEmpty. Operand 1101 states and 1464 transitions. [2024-11-28 02:33:37,639 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 94 [2024-11-28 02:33:37,639 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 02:33:37,639 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 02:33:37,639 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable15 [2024-11-28 02:33:37,639 INFO L396 AbstractCegarLoop]: === Iteration 17 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 02:33:37,640 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 02:33:37,640 INFO L85 PathProgramCache]: Analyzing trace with hash 940479954, now seen corresponding path program 1 times [2024-11-28 02:33:37,640 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 02:33:37,640 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [720864811] [2024-11-28 02:33:37,640 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:33:37,640 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 02:33:37,717 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 02:33:38,312 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2024-11-28 02:33:38,312 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 02:33:38,313 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [720864811] [2024-11-28 02:33:38,313 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [720864811] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 02:33:38,313 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 02:33:38,313 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2024-11-28 02:33:38,313 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1975226587] [2024-11-28 02:33:38,313 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 02:33:38,313 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2024-11-28 02:33:38,314 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 02:33:38,314 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-11-28 02:33:38,314 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2024-11-28 02:33:38,314 INFO L87 Difference]: Start difference. First operand 1101 states and 1464 transitions. Second operand has 7 states, 7 states have (on average 9.428571428571429) internal successors, (66), 6 states have internal predecessors, (66), 3 states have call successors, (9), 2 states have call predecessors, (9), 2 states have return successors, (8), 4 states have call predecessors, (8), 3 states have call successors, (8) [2024-11-28 02:33:38,617 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 02:33:38,617 INFO L93 Difference]: Finished difference Result 1965 states and 2621 transitions. [2024-11-28 02:33:38,618 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2024-11-28 02:33:38,618 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 9.428571428571429) internal successors, (66), 6 states have internal predecessors, (66), 3 states have call successors, (9), 2 states have call predecessors, (9), 2 states have return successors, (8), 4 states have call predecessors, (8), 3 states have call successors, (8) Word has length 93 [2024-11-28 02:33:38,618 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 02:33:38,626 INFO L225 Difference]: With dead ends: 1965 [2024-11-28 02:33:38,626 INFO L226 Difference]: Without dead ends: 1099 [2024-11-28 02:33:38,628 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=27, Invalid=83, Unknown=0, NotChecked=0, Total=110 [2024-11-28 02:33:38,629 INFO L435 NwaCegarLoop]: 254 mSDtfsCounter, 183 mSDsluCounter, 1191 mSDsCounter, 0 mSdLazyCounter, 74 mSolverCounterSat, 10 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 185 SdHoareTripleChecker+Valid, 1445 SdHoareTripleChecker+Invalid, 84 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 10 IncrementalHoareTripleChecker+Valid, 74 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-28 02:33:38,629 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [185 Valid, 1445 Invalid, 84 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [10 Valid, 74 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-28 02:33:38,631 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1099 states. [2024-11-28 02:33:38,713 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1099 to 992. [2024-11-28 02:33:38,715 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 992 states, 765 states have (on average 1.3477124183006537) internal successors, (1031), 775 states have internal predecessors, (1031), 145 states have call successors, (145), 81 states have call predecessors, (145), 81 states have return successors, (145), 135 states have call predecessors, (145), 145 states have call successors, (145) [2024-11-28 02:33:38,720 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 992 states to 992 states and 1321 transitions. [2024-11-28 02:33:38,723 INFO L78 Accepts]: Start accepts. Automaton has 992 states and 1321 transitions. Word has length 93 [2024-11-28 02:33:38,723 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 02:33:38,723 INFO L471 AbstractCegarLoop]: Abstraction has 992 states and 1321 transitions. [2024-11-28 02:33:38,723 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 9.428571428571429) internal successors, (66), 6 states have internal predecessors, (66), 3 states have call successors, (9), 2 states have call predecessors, (9), 2 states have return successors, (8), 4 states have call predecessors, (8), 3 states have call successors, (8) [2024-11-28 02:33:38,724 INFO L276 IsEmpty]: Start isEmpty. Operand 992 states and 1321 transitions. [2024-11-28 02:33:38,725 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2024-11-28 02:33:38,725 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 02:33:38,725 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 02:33:38,725 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable16 [2024-11-28 02:33:38,725 INFO L396 AbstractCegarLoop]: === Iteration 18 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 02:33:38,726 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 02:33:38,726 INFO L85 PathProgramCache]: Analyzing trace with hash -393724703, now seen corresponding path program 1 times [2024-11-28 02:33:38,726 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 02:33:38,726 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1071781318] [2024-11-28 02:33:38,726 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:33:38,726 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 02:33:38,771 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 02:33:39,396 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-11-28 02:33:39,397 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 02:33:39,397 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1071781318] [2024-11-28 02:33:39,397 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1071781318] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 02:33:39,397 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 02:33:39,397 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2024-11-28 02:33:39,398 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1850682480] [2024-11-28 02:33:39,398 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 02:33:39,398 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2024-11-28 02:33:39,398 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 02:33:39,399 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-11-28 02:33:39,399 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2024-11-28 02:33:39,400 INFO L87 Difference]: Start difference. First operand 992 states and 1321 transitions. Second operand has 7 states, 7 states have (on average 10.142857142857142) internal successors, (71), 6 states have internal predecessors, (71), 3 states have call successors, (9), 2 states have call predecessors, (9), 2 states have return successors, (8), 4 states have call predecessors, (8), 3 states have call successors, (8) [2024-11-28 02:33:40,004 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 02:33:40,009 INFO L93 Difference]: Finished difference Result 1896 states and 2508 transitions. [2024-11-28 02:33:40,009 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2024-11-28 02:33:40,010 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 10.142857142857142) internal successors, (71), 6 states have internal predecessors, (71), 3 states have call successors, (9), 2 states have call predecessors, (9), 2 states have return successors, (8), 4 states have call predecessors, (8), 3 states have call successors, (8) Word has length 94 [2024-11-28 02:33:40,010 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 02:33:40,018 INFO L225 Difference]: With dead ends: 1896 [2024-11-28 02:33:40,018 INFO L226 Difference]: Without dead ends: 1059 [2024-11-28 02:33:40,020 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=32, Invalid=78, Unknown=0, NotChecked=0, Total=110 [2024-11-28 02:33:40,021 INFO L435 NwaCegarLoop]: 277 mSDtfsCounter, 403 mSDsluCounter, 965 mSDsCounter, 0 mSdLazyCounter, 179 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 409 SdHoareTripleChecker+Valid, 1242 SdHoareTripleChecker+Invalid, 181 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 179 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2024-11-28 02:33:40,021 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [409 Valid, 1242 Invalid, 181 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 179 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2024-11-28 02:33:40,023 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1059 states. [2024-11-28 02:33:40,175 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1059 to 1008. [2024-11-28 02:33:40,178 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1008 states, 773 states have (on average 1.3247089262613196) internal successors, (1024), 784 states have internal predecessors, (1024), 148 states have call successors, (148), 86 states have call predecessors, (148), 86 states have return successors, (148), 137 states have call predecessors, (148), 148 states have call successors, (148) [2024-11-28 02:33:40,185 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1008 states to 1008 states and 1320 transitions. [2024-11-28 02:33:40,188 INFO L78 Accepts]: Start accepts. Automaton has 1008 states and 1320 transitions. Word has length 94 [2024-11-28 02:33:40,188 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 02:33:40,188 INFO L471 AbstractCegarLoop]: Abstraction has 1008 states and 1320 transitions. [2024-11-28 02:33:40,189 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 10.142857142857142) internal successors, (71), 6 states have internal predecessors, (71), 3 states have call successors, (9), 2 states have call predecessors, (9), 2 states have return successors, (8), 4 states have call predecessors, (8), 3 states have call successors, (8) [2024-11-28 02:33:40,189 INFO L276 IsEmpty]: Start isEmpty. Operand 1008 states and 1320 transitions. [2024-11-28 02:33:40,190 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2024-11-28 02:33:40,191 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 02:33:40,191 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 02:33:40,191 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable17 [2024-11-28 02:33:40,191 INFO L396 AbstractCegarLoop]: === Iteration 19 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 02:33:40,192 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 02:33:40,192 INFO L85 PathProgramCache]: Analyzing trace with hash -284174634, now seen corresponding path program 1 times [2024-11-28 02:33:40,192 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 02:33:40,192 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1507725068] [2024-11-28 02:33:40,193 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:33:40,193 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 02:33:40,229 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 02:33:40,317 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-28 02:33:40,317 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 02:33:40,317 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1507725068] [2024-11-28 02:33:40,317 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1507725068] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 02:33:40,317 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 02:33:40,318 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-28 02:33:40,318 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1478393348] [2024-11-28 02:33:40,318 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 02:33:40,318 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-28 02:33:40,318 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 02:33:40,319 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-28 02:33:40,319 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-28 02:33:40,319 INFO L87 Difference]: Start difference. First operand 1008 states and 1320 transitions. Second operand has 4 states, 4 states have (on average 17.75) internal successors, (71), 4 states have internal predecessors, (71), 3 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) [2024-11-28 02:33:40,605 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 02:33:40,606 INFO L93 Difference]: Finished difference Result 2661 states and 3506 transitions. [2024-11-28 02:33:40,606 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-11-28 02:33:40,606 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 17.75) internal successors, (71), 4 states have internal predecessors, (71), 3 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) Word has length 95 [2024-11-28 02:33:40,606 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 02:33:40,618 INFO L225 Difference]: With dead ends: 2661 [2024-11-28 02:33:40,618 INFO L226 Difference]: Without dead ends: 1859 [2024-11-28 02:33:40,621 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-11-28 02:33:40,621 INFO L435 NwaCegarLoop]: 452 mSDtfsCounter, 199 mSDsluCounter, 679 mSDsCounter, 0 mSdLazyCounter, 35 mSolverCounterSat, 7 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 199 SdHoareTripleChecker+Valid, 1131 SdHoareTripleChecker+Invalid, 42 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 7 IncrementalHoareTripleChecker+Valid, 35 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-28 02:33:40,622 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [199 Valid, 1131 Invalid, 42 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [7 Valid, 35 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-28 02:33:40,624 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1859 states. [2024-11-28 02:33:40,828 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1859 to 1744. [2024-11-28 02:33:40,832 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1744 states, 1319 states have (on average 1.3176648976497347) internal successors, (1738), 1338 states have internal predecessors, (1738), 272 states have call successors, (272), 152 states have call predecessors, (272), 152 states have return successors, (272), 253 states have call predecessors, (272), 272 states have call successors, (272) [2024-11-28 02:33:40,842 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1744 states to 1744 states and 2282 transitions. [2024-11-28 02:33:40,845 INFO L78 Accepts]: Start accepts. Automaton has 1744 states and 2282 transitions. Word has length 95 [2024-11-28 02:33:40,845 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 02:33:40,845 INFO L471 AbstractCegarLoop]: Abstraction has 1744 states and 2282 transitions. [2024-11-28 02:33:40,845 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 17.75) internal successors, (71), 4 states have internal predecessors, (71), 3 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) [2024-11-28 02:33:40,845 INFO L276 IsEmpty]: Start isEmpty. Operand 1744 states and 2282 transitions. [2024-11-28 02:33:40,847 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 98 [2024-11-28 02:33:40,847 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 02:33:40,847 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 02:33:40,847 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable18 [2024-11-28 02:33:40,848 INFO L396 AbstractCegarLoop]: === Iteration 20 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 02:33:40,848 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 02:33:40,848 INFO L85 PathProgramCache]: Analyzing trace with hash -1869830197, now seen corresponding path program 1 times [2024-11-28 02:33:40,848 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 02:33:40,848 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [306882644] [2024-11-28 02:33:40,848 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:33:40,849 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 02:33:40,932 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 02:33:41,590 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-11-28 02:33:41,590 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 02:33:41,591 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [306882644] [2024-11-28 02:33:41,591 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [306882644] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 02:33:41,591 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 02:33:41,591 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2024-11-28 02:33:41,591 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [96954487] [2024-11-28 02:33:41,591 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 02:33:41,591 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2024-11-28 02:33:41,592 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 02:33:41,592 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-11-28 02:33:41,592 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2024-11-28 02:33:41,592 INFO L87 Difference]: Start difference. First operand 1744 states and 2282 transitions. Second operand has 7 states, 7 states have (on average 10.571428571428571) internal successors, (74), 6 states have internal predecessors, (74), 3 states have call successors, (9), 2 states have call predecessors, (9), 2 states have return successors, (8), 3 states have call predecessors, (8), 2 states have call successors, (8) [2024-11-28 02:33:42,382 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 02:33:42,382 INFO L93 Difference]: Finished difference Result 3400 states and 4444 transitions. [2024-11-28 02:33:42,382 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2024-11-28 02:33:42,383 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 10.571428571428571) internal successors, (74), 6 states have internal predecessors, (74), 3 states have call successors, (9), 2 states have call predecessors, (9), 2 states have return successors, (8), 3 states have call predecessors, (8), 2 states have call successors, (8) Word has length 97 [2024-11-28 02:33:42,383 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 02:33:42,394 INFO L225 Difference]: With dead ends: 3400 [2024-11-28 02:33:42,395 INFO L226 Difference]: Without dead ends: 1940 [2024-11-28 02:33:42,398 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=32, Invalid=78, Unknown=0, NotChecked=0, Total=110 [2024-11-28 02:33:42,399 INFO L435 NwaCegarLoop]: 317 mSDtfsCounter, 513 mSDsluCounter, 1090 mSDsCounter, 0 mSdLazyCounter, 179 mSolverCounterSat, 51 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 519 SdHoareTripleChecker+Valid, 1407 SdHoareTripleChecker+Invalid, 230 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 51 IncrementalHoareTripleChecker+Valid, 179 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2024-11-28 02:33:42,402 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [519 Valid, 1407 Invalid, 230 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [51 Valid, 179 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2024-11-28 02:33:42,404 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1940 states. [2024-11-28 02:33:42,622 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1940 to 1771. [2024-11-28 02:33:42,625 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1771 states, 1333 states have (on average 1.3113278319579895) internal successors, (1748), 1353 states have internal predecessors, (1748), 280 states have call successors, (280), 157 states have call predecessors, (280), 157 states have return successors, (280), 260 states have call predecessors, (280), 280 states have call successors, (280) [2024-11-28 02:33:42,634 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1771 states to 1771 states and 2308 transitions. [2024-11-28 02:33:42,637 INFO L78 Accepts]: Start accepts. Automaton has 1771 states and 2308 transitions. Word has length 97 [2024-11-28 02:33:42,637 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 02:33:42,637 INFO L471 AbstractCegarLoop]: Abstraction has 1771 states and 2308 transitions. [2024-11-28 02:33:42,637 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 10.571428571428571) internal successors, (74), 6 states have internal predecessors, (74), 3 states have call successors, (9), 2 states have call predecessors, (9), 2 states have return successors, (8), 3 states have call predecessors, (8), 2 states have call successors, (8) [2024-11-28 02:33:42,638 INFO L276 IsEmpty]: Start isEmpty. Operand 1771 states and 2308 transitions. [2024-11-28 02:33:42,639 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 100 [2024-11-28 02:33:42,639 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 02:33:42,639 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 02:33:42,639 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable19 [2024-11-28 02:33:42,640 INFO L396 AbstractCegarLoop]: === Iteration 21 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 02:33:42,640 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 02:33:42,640 INFO L85 PathProgramCache]: Analyzing trace with hash -1876171216, now seen corresponding path program 1 times [2024-11-28 02:33:42,640 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 02:33:42,640 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1146419973] [2024-11-28 02:33:42,641 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:33:42,642 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 02:33:42,678 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 02:33:42,761 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-28 02:33:42,762 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 02:33:42,762 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1146419973] [2024-11-28 02:33:42,762 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1146419973] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 02:33:42,762 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 02:33:42,762 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-28 02:33:42,762 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1085746077] [2024-11-28 02:33:42,762 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 02:33:42,763 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-28 02:33:42,764 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 02:33:42,764 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-28 02:33:42,764 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-28 02:33:42,765 INFO L87 Difference]: Start difference. First operand 1771 states and 2308 transitions. Second operand has 4 states, 4 states have (on average 18.75) internal successors, (75), 4 states have internal predecessors, (75), 3 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) [2024-11-28 02:33:43,201 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 02:33:43,201 INFO L93 Difference]: Finished difference Result 4501 states and 5898 transitions. [2024-11-28 02:33:43,202 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-11-28 02:33:43,202 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 18.75) internal successors, (75), 4 states have internal predecessors, (75), 3 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) Word has length 99 [2024-11-28 02:33:43,202 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 02:33:43,217 INFO L225 Difference]: With dead ends: 4501 [2024-11-28 02:33:43,217 INFO L226 Difference]: Without dead ends: 3057 [2024-11-28 02:33:43,221 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-11-28 02:33:43,222 INFO L435 NwaCegarLoop]: 468 mSDtfsCounter, 205 mSDsluCounter, 701 mSDsCounter, 0 mSdLazyCounter, 30 mSolverCounterSat, 5 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 205 SdHoareTripleChecker+Valid, 1169 SdHoareTripleChecker+Invalid, 35 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 5 IncrementalHoareTripleChecker+Valid, 30 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-28 02:33:43,223 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [205 Valid, 1169 Invalid, 35 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [5 Valid, 30 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-28 02:33:43,226 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3057 states. [2024-11-28 02:33:43,572 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3057 to 2782. [2024-11-28 02:33:43,581 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2782 states, 2069 states have (on average 1.3015949734171097) internal successors, (2693), 2100 states have internal predecessors, (2693), 460 states have call successors, (460), 252 states have call predecessors, (460), 252 states have return successors, (460), 429 states have call predecessors, (460), 460 states have call successors, (460) [2024-11-28 02:33:43,597 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2782 states to 2782 states and 3613 transitions. [2024-11-28 02:33:43,601 INFO L78 Accepts]: Start accepts. Automaton has 2782 states and 3613 transitions. Word has length 99 [2024-11-28 02:33:43,602 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 02:33:43,602 INFO L471 AbstractCegarLoop]: Abstraction has 2782 states and 3613 transitions. [2024-11-28 02:33:43,602 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 18.75) internal successors, (75), 4 states have internal predecessors, (75), 3 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) [2024-11-28 02:33:43,602 INFO L276 IsEmpty]: Start isEmpty. Operand 2782 states and 3613 transitions. [2024-11-28 02:33:43,605 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 100 [2024-11-28 02:33:43,605 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 02:33:43,606 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 02:33:43,606 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable20 [2024-11-28 02:33:43,606 INFO L396 AbstractCegarLoop]: === Iteration 22 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 02:33:43,606 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 02:33:43,606 INFO L85 PathProgramCache]: Analyzing trace with hash -1671410112, now seen corresponding path program 1 times [2024-11-28 02:33:43,606 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 02:33:43,607 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1306355656] [2024-11-28 02:33:43,607 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:33:43,607 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 02:33:43,646 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 02:33:43,761 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-28 02:33:43,762 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 02:33:43,762 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1306355656] [2024-11-28 02:33:43,762 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1306355656] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 02:33:43,762 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 02:33:43,762 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-28 02:33:43,762 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2039729562] [2024-11-28 02:33:43,762 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 02:33:43,763 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-28 02:33:43,763 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 02:33:43,763 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-28 02:33:43,764 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-28 02:33:43,764 INFO L87 Difference]: Start difference. First operand 2782 states and 3613 transitions. Second operand has 4 states, 4 states have (on average 18.75) internal successors, (75), 4 states have internal predecessors, (75), 3 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) [2024-11-28 02:33:44,332 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 02:33:44,333 INFO L93 Difference]: Finished difference Result 6508 states and 8489 transitions. [2024-11-28 02:33:44,334 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-11-28 02:33:44,334 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 18.75) internal successors, (75), 4 states have internal predecessors, (75), 3 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) Word has length 99 [2024-11-28 02:33:44,335 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 02:33:44,358 INFO L225 Difference]: With dead ends: 6508 [2024-11-28 02:33:44,358 INFO L226 Difference]: Without dead ends: 4169 [2024-11-28 02:33:44,365 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-11-28 02:33:44,367 INFO L435 NwaCegarLoop]: 478 mSDtfsCounter, 198 mSDsluCounter, 703 mSDsCounter, 0 mSdLazyCounter, 40 mSolverCounterSat, 6 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 198 SdHoareTripleChecker+Valid, 1181 SdHoareTripleChecker+Invalid, 46 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 6 IncrementalHoareTripleChecker+Valid, 40 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-28 02:33:44,367 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [198 Valid, 1181 Invalid, 46 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [6 Valid, 40 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-28 02:33:44,372 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4169 states. [2024-11-28 02:33:44,966 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4169 to 3988. [2024-11-28 02:33:44,976 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3988 states, 2951 states have (on average 1.2978651304642495) internal successors, (3830), 2995 states have internal predecessors, (3830), 672 states have call successors, (672), 364 states have call predecessors, (672), 364 states have return successors, (672), 628 states have call predecessors, (672), 672 states have call successors, (672) [2024-11-28 02:33:44,992 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3988 states to 3988 states and 5174 transitions. [2024-11-28 02:33:44,997 INFO L78 Accepts]: Start accepts. Automaton has 3988 states and 5174 transitions. Word has length 99 [2024-11-28 02:33:44,998 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 02:33:44,998 INFO L471 AbstractCegarLoop]: Abstraction has 3988 states and 5174 transitions. [2024-11-28 02:33:44,998 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 18.75) internal successors, (75), 4 states have internal predecessors, (75), 3 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) [2024-11-28 02:33:44,998 INFO L276 IsEmpty]: Start isEmpty. Operand 3988 states and 5174 transitions. [2024-11-28 02:33:45,000 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 101 [2024-11-28 02:33:45,001 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 02:33:45,001 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 02:33:45,001 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable21 [2024-11-28 02:33:45,001 INFO L396 AbstractCegarLoop]: === Iteration 23 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 02:33:45,001 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 02:33:45,002 INFO L85 PathProgramCache]: Analyzing trace with hash -275000023, now seen corresponding path program 1 times [2024-11-28 02:33:45,002 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 02:33:45,002 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1090449152] [2024-11-28 02:33:45,002 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:33:45,002 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 02:33:45,027 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 02:33:45,071 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-28 02:33:45,071 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 02:33:45,071 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1090449152] [2024-11-28 02:33:45,071 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1090449152] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 02:33:45,071 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 02:33:45,072 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2024-11-28 02:33:45,072 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [381594925] [2024-11-28 02:33:45,072 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 02:33:45,072 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2024-11-28 02:33:45,073 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 02:33:45,073 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2024-11-28 02:33:45,073 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-11-28 02:33:45,073 INFO L87 Difference]: Start difference. First operand 3988 states and 5174 transitions. Second operand has 3 states, 3 states have (on average 25.333333333333332) internal successors, (76), 3 states have internal predecessors, (76), 2 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) [2024-11-28 02:33:45,591 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 02:33:45,592 INFO L93 Difference]: Finished difference Result 7667 states and 9991 transitions. [2024-11-28 02:33:45,592 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-11-28 02:33:45,592 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 25.333333333333332) internal successors, (76), 3 states have internal predecessors, (76), 2 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) Word has length 100 [2024-11-28 02:33:45,592 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 02:33:45,613 INFO L225 Difference]: With dead ends: 7667 [2024-11-28 02:33:45,614 INFO L226 Difference]: Without dead ends: 4021 [2024-11-28 02:33:45,622 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-11-28 02:33:45,623 INFO L435 NwaCegarLoop]: 258 mSDtfsCounter, 6 mSDsluCounter, 223 mSDsCounter, 0 mSdLazyCounter, 39 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 7 SdHoareTripleChecker+Valid, 481 SdHoareTripleChecker+Invalid, 40 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 39 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-28 02:33:45,623 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [7 Valid, 481 Invalid, 40 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 39 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-28 02:33:45,627 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4021 states. [2024-11-28 02:33:46,107 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4021 to 3994. [2024-11-28 02:33:46,116 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3994 states, 2957 states have (on average 1.2972607372336828) internal successors, (3836), 3001 states have internal predecessors, (3836), 672 states have call successors, (672), 364 states have call predecessors, (672), 364 states have return successors, (672), 628 states have call predecessors, (672), 672 states have call successors, (672) [2024-11-28 02:33:46,132 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3994 states to 3994 states and 5180 transitions. [2024-11-28 02:33:46,137 INFO L78 Accepts]: Start accepts. Automaton has 3994 states and 5180 transitions. Word has length 100 [2024-11-28 02:33:46,137 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 02:33:46,137 INFO L471 AbstractCegarLoop]: Abstraction has 3994 states and 5180 transitions. [2024-11-28 02:33:46,138 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 25.333333333333332) internal successors, (76), 3 states have internal predecessors, (76), 2 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) [2024-11-28 02:33:46,139 INFO L276 IsEmpty]: Start isEmpty. Operand 3994 states and 5180 transitions. [2024-11-28 02:33:46,141 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 102 [2024-11-28 02:33:46,141 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 02:33:46,142 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 02:33:46,142 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable22 [2024-11-28 02:33:46,142 INFO L396 AbstractCegarLoop]: === Iteration 24 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 02:33:46,143 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 02:33:46,143 INFO L85 PathProgramCache]: Analyzing trace with hash 2124726715, now seen corresponding path program 1 times [2024-11-28 02:33:46,143 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 02:33:46,143 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [40399676] [2024-11-28 02:33:46,143 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:33:46,144 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 02:33:46,177 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 02:33:46,290 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-28 02:33:46,290 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 02:33:46,290 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [40399676] [2024-11-28 02:33:46,290 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [40399676] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 02:33:46,290 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 02:33:46,291 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-28 02:33:46,291 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2142529550] [2024-11-28 02:33:46,291 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 02:33:46,291 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-28 02:33:46,291 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 02:33:46,292 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-28 02:33:46,292 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-28 02:33:46,292 INFO L87 Difference]: Start difference. First operand 3994 states and 5180 transitions. Second operand has 4 states, 4 states have (on average 19.25) internal successors, (77), 4 states have internal predecessors, (77), 2 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) [2024-11-28 02:33:46,723 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 02:33:46,724 INFO L93 Difference]: Finished difference Result 7632 states and 9918 transitions. [2024-11-28 02:33:46,724 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-28 02:33:46,724 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 19.25) internal successors, (77), 4 states have internal predecessors, (77), 2 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) Word has length 101 [2024-11-28 02:33:46,725 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 02:33:46,755 INFO L225 Difference]: With dead ends: 7632 [2024-11-28 02:33:46,755 INFO L226 Difference]: Without dead ends: 3710 [2024-11-28 02:33:46,761 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-11-28 02:33:46,762 INFO L435 NwaCegarLoop]: 260 mSDtfsCounter, 79 mSDsluCounter, 470 mSDsCounter, 0 mSdLazyCounter, 16 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 79 SdHoareTripleChecker+Valid, 730 SdHoareTripleChecker+Invalid, 19 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 16 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-28 02:33:46,762 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [79 Valid, 730 Invalid, 19 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 16 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-28 02:33:46,766 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3710 states. [2024-11-28 02:33:47,136 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3710 to 3647. [2024-11-28 02:33:47,142 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3647 states, 2693 states have (on average 1.305607129595247) internal successors, (3516), 2727 states have internal predecessors, (3516), 620 states have call successors, (620), 333 states have call predecessors, (620), 333 states have return successors, (620), 586 states have call predecessors, (620), 620 states have call successors, (620) [2024-11-28 02:33:47,154 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3647 states to 3647 states and 4756 transitions. [2024-11-28 02:33:47,160 INFO L78 Accepts]: Start accepts. Automaton has 3647 states and 4756 transitions. Word has length 101 [2024-11-28 02:33:47,160 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 02:33:47,160 INFO L471 AbstractCegarLoop]: Abstraction has 3647 states and 4756 transitions. [2024-11-28 02:33:47,160 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 19.25) internal successors, (77), 4 states have internal predecessors, (77), 2 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) [2024-11-28 02:33:47,160 INFO L276 IsEmpty]: Start isEmpty. Operand 3647 states and 4756 transitions. [2024-11-28 02:33:47,162 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 103 [2024-11-28 02:33:47,162 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 02:33:47,162 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 02:33:47,163 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable23 [2024-11-28 02:33:47,163 INFO L396 AbstractCegarLoop]: === Iteration 25 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 02:33:47,164 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 02:33:47,164 INFO L85 PathProgramCache]: Analyzing trace with hash -425938695, now seen corresponding path program 1 times [2024-11-28 02:33:47,164 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 02:33:47,164 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [106868107] [2024-11-28 02:33:47,164 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:33:47,164 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 02:33:47,186 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 02:33:47,225 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-28 02:33:47,225 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 02:33:47,225 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [106868107] [2024-11-28 02:33:47,225 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [106868107] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 02:33:47,225 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 02:33:47,225 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2024-11-28 02:33:47,225 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1878357284] [2024-11-28 02:33:47,225 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 02:33:47,226 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2024-11-28 02:33:47,226 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 02:33:47,227 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2024-11-28 02:33:47,227 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-11-28 02:33:47,227 INFO L87 Difference]: Start difference. First operand 3647 states and 4756 transitions. Second operand has 3 states, 3 states have (on average 26.0) internal successors, (78), 3 states have internal predecessors, (78), 2 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) [2024-11-28 02:33:47,778 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 02:33:47,779 INFO L93 Difference]: Finished difference Result 7170 states and 9388 transitions. [2024-11-28 02:33:47,779 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-11-28 02:33:47,779 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 26.0) internal successors, (78), 3 states have internal predecessors, (78), 2 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) Word has length 102 [2024-11-28 02:33:47,780 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 02:33:47,803 INFO L225 Difference]: With dead ends: 7170 [2024-11-28 02:33:47,803 INFO L226 Difference]: Without dead ends: 3698 [2024-11-28 02:33:47,813 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-11-28 02:33:47,813 INFO L435 NwaCegarLoop]: 259 mSDtfsCounter, 6 mSDsluCounter, 222 mSDsCounter, 0 mSdLazyCounter, 39 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 7 SdHoareTripleChecker+Valid, 481 SdHoareTripleChecker+Invalid, 40 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 39 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-28 02:33:47,814 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [7 Valid, 481 Invalid, 40 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 39 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-28 02:33:47,819 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3698 states. [2024-11-28 02:33:48,257 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3698 to 3657. [2024-11-28 02:33:48,262 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3657 states, 2703 states have (on average 1.3044765075841658) internal successors, (3526), 2737 states have internal predecessors, (3526), 620 states have call successors, (620), 333 states have call predecessors, (620), 333 states have return successors, (620), 586 states have call predecessors, (620), 620 states have call successors, (620) [2024-11-28 02:33:48,273 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3657 states to 3657 states and 4766 transitions. [2024-11-28 02:33:48,280 INFO L78 Accepts]: Start accepts. Automaton has 3657 states and 4766 transitions. Word has length 102 [2024-11-28 02:33:48,280 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 02:33:48,280 INFO L471 AbstractCegarLoop]: Abstraction has 3657 states and 4766 transitions. [2024-11-28 02:33:48,280 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 26.0) internal successors, (78), 3 states have internal predecessors, (78), 2 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) [2024-11-28 02:33:48,280 INFO L276 IsEmpty]: Start isEmpty. Operand 3657 states and 4766 transitions. [2024-11-28 02:33:48,282 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 103 [2024-11-28 02:33:48,282 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 02:33:48,282 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 02:33:48,282 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable24 [2024-11-28 02:33:48,282 INFO L396 AbstractCegarLoop]: === Iteration 26 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 02:33:48,283 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 02:33:48,283 INFO L85 PathProgramCache]: Analyzing trace with hash 1786405918, now seen corresponding path program 1 times [2024-11-28 02:33:48,283 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 02:33:48,283 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2147131521] [2024-11-28 02:33:48,283 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:33:48,283 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 02:33:48,318 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 02:33:48,434 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-28 02:33:48,436 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 02:33:48,436 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2147131521] [2024-11-28 02:33:48,436 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2147131521] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 02:33:48,437 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 02:33:48,437 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-28 02:33:48,437 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [17496471] [2024-11-28 02:33:48,437 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 02:33:48,437 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-28 02:33:48,437 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 02:33:48,438 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-28 02:33:48,438 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-28 02:33:48,438 INFO L87 Difference]: Start difference. First operand 3657 states and 4766 transitions. Second operand has 4 states, 4 states have (on average 19.5) internal successors, (78), 4 states have internal predecessors, (78), 2 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) [2024-11-28 02:33:48,806 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 02:33:48,807 INFO L93 Difference]: Finished difference Result 7121 states and 9299 transitions. [2024-11-28 02:33:48,807 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-28 02:33:48,807 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 19.5) internal successors, (78), 4 states have internal predecessors, (78), 2 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) Word has length 102 [2024-11-28 02:33:48,807 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 02:33:48,825 INFO L225 Difference]: With dead ends: 7121 [2024-11-28 02:33:48,826 INFO L226 Difference]: Without dead ends: 3579 [2024-11-28 02:33:48,834 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-11-28 02:33:48,834 INFO L435 NwaCegarLoop]: 265 mSDtfsCounter, 60 mSDsluCounter, 475 mSDsCounter, 0 mSdLazyCounter, 16 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 60 SdHoareTripleChecker+Valid, 740 SdHoareTripleChecker+Invalid, 19 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 16 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-28 02:33:48,836 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [60 Valid, 740 Invalid, 19 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 16 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-28 02:33:48,839 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3579 states. [2024-11-28 02:33:49,143 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3579 to 2751. [2024-11-28 02:33:49,147 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2751 states, 2031 states have (on average 1.2968980797636631) internal successors, (2634), 2050 states have internal predecessors, (2634), 469 states have call successors, (469), 250 states have call predecessors, (469), 250 states have return successors, (469), 450 states have call predecessors, (469), 469 states have call successors, (469) [2024-11-28 02:33:49,155 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2751 states to 2751 states and 3572 transitions. [2024-11-28 02:33:49,162 INFO L78 Accepts]: Start accepts. Automaton has 2751 states and 3572 transitions. Word has length 102 [2024-11-28 02:33:49,162 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 02:33:49,162 INFO L471 AbstractCegarLoop]: Abstraction has 2751 states and 3572 transitions. [2024-11-28 02:33:49,162 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 19.5) internal successors, (78), 4 states have internal predecessors, (78), 2 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) [2024-11-28 02:33:49,162 INFO L276 IsEmpty]: Start isEmpty. Operand 2751 states and 3572 transitions. [2024-11-28 02:33:49,167 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 152 [2024-11-28 02:33:49,167 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 02:33:49,168 INFO L218 NwaCegarLoop]: trace histogram [4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 02:33:49,168 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable25 [2024-11-28 02:33:49,169 INFO L396 AbstractCegarLoop]: === Iteration 27 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 02:33:49,170 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 02:33:49,170 INFO L85 PathProgramCache]: Analyzing trace with hash 1492707530, now seen corresponding path program 1 times [2024-11-28 02:33:49,170 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 02:33:49,170 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [854010738] [2024-11-28 02:33:49,170 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:33:49,170 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 02:33:49,238 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 02:33:49,615 INFO L134 CoverageAnalysis]: Checked inductivity of 84 backedges. 16 proven. 12 refuted. 0 times theorem prover too weak. 56 trivial. 0 not checked. [2024-11-28 02:33:49,615 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 02:33:49,615 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [854010738] [2024-11-28 02:33:49,616 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [854010738] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-28 02:33:49,616 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2126123475] [2024-11-28 02:33:49,616 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:33:49,616 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-28 02:33:49,616 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_58ef54d4-00f4-4eef-9b59-4b85557f99bb/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 02:33:49,618 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_58ef54d4-00f4-4eef-9b59-4b85557f99bb/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-28 02:33:49,623 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_58ef54d4-00f4-4eef-9b59-4b85557f99bb/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2024-11-28 02:33:49,897 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 02:33:49,900 INFO L256 TraceCheckSpWp]: Trace formula consists of 727 conjuncts, 22 conjuncts are in the unsatisfiable core [2024-11-28 02:33:49,907 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-28 02:33:49,954 INFO L134 CoverageAnalysis]: Checked inductivity of 84 backedges. 41 proven. 0 refuted. 0 times theorem prover too weak. 43 trivial. 0 not checked. [2024-11-28 02:33:49,957 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-11-28 02:33:49,958 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2126123475] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 02:33:49,958 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-11-28 02:33:49,958 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [7] total 10 [2024-11-28 02:33:49,958 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2107260368] [2024-11-28 02:33:49,958 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 02:33:49,959 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-28 02:33:49,959 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 02:33:49,959 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-28 02:33:49,959 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=72, Unknown=0, NotChecked=0, Total=90 [2024-11-28 02:33:49,959 INFO L87 Difference]: Start difference. First operand 2751 states and 3572 transitions. Second operand has 5 states, 4 states have (on average 25.0) internal successors, (100), 5 states have internal predecessors, (100), 3 states have call successors, (12), 2 states have call predecessors, (12), 3 states have return successors, (12), 2 states have call predecessors, (12), 3 states have call successors, (12) [2024-11-28 02:33:50,295 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 02:33:50,295 INFO L93 Difference]: Finished difference Result 5180 states and 6763 transitions. [2024-11-28 02:33:50,295 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-11-28 02:33:50,296 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 4 states have (on average 25.0) internal successors, (100), 5 states have internal predecessors, (100), 3 states have call successors, (12), 2 states have call predecessors, (12), 3 states have return successors, (12), 2 states have call predecessors, (12), 3 states have call successors, (12) Word has length 151 [2024-11-28 02:33:50,296 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 02:33:50,311 INFO L225 Difference]: With dead ends: 5180 [2024-11-28 02:33:50,311 INFO L226 Difference]: Without dead ends: 2584 [2024-11-28 02:33:50,317 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 157 GetRequests, 149 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=18, Invalid=72, Unknown=0, NotChecked=0, Total=90 [2024-11-28 02:33:50,318 INFO L435 NwaCegarLoop]: 254 mSDtfsCounter, 0 mSDsluCounter, 750 mSDsCounter, 0 mSdLazyCounter, 20 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 1004 SdHoareTripleChecker+Invalid, 20 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 20 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-28 02:33:50,319 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 1004 Invalid, 20 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 20 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-28 02:33:50,323 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2584 states. [2024-11-28 02:33:50,613 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2584 to 2569. [2024-11-28 02:33:50,617 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2569 states, 1894 states have (on average 1.2930306230200634) internal successors, (2449), 1911 states have internal predecessors, (2449), 440 states have call successors, (440), 234 states have call predecessors, (440), 234 states have return successors, (440), 423 states have call predecessors, (440), 440 states have call successors, (440) [2024-11-28 02:33:50,624 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2569 states to 2569 states and 3329 transitions. [2024-11-28 02:33:50,630 INFO L78 Accepts]: Start accepts. Automaton has 2569 states and 3329 transitions. Word has length 151 [2024-11-28 02:33:50,631 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 02:33:50,631 INFO L471 AbstractCegarLoop]: Abstraction has 2569 states and 3329 transitions. [2024-11-28 02:33:50,631 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 4 states have (on average 25.0) internal successors, (100), 5 states have internal predecessors, (100), 3 states have call successors, (12), 2 states have call predecessors, (12), 3 states have return successors, (12), 2 states have call predecessors, (12), 3 states have call successors, (12) [2024-11-28 02:33:50,631 INFO L276 IsEmpty]: Start isEmpty. Operand 2569 states and 3329 transitions. [2024-11-28 02:33:50,636 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 154 [2024-11-28 02:33:50,636 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 02:33:50,636 INFO L218 NwaCegarLoop]: trace histogram [4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 02:33:50,647 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_58ef54d4-00f4-4eef-9b59-4b85557f99bb/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Forceful destruction successful, exit code 0 [2024-11-28 02:33:50,837 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_58ef54d4-00f4-4eef-9b59-4b85557f99bb/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable26 [2024-11-28 02:33:50,837 INFO L396 AbstractCegarLoop]: === Iteration 28 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 02:33:50,837 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 02:33:50,838 INFO L85 PathProgramCache]: Analyzing trace with hash 433320110, now seen corresponding path program 1 times [2024-11-28 02:33:50,838 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 02:33:50,838 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1966436438] [2024-11-28 02:33:50,838 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:33:50,838 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 02:33:50,926 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 02:33:51,625 INFO L134 CoverageAnalysis]: Checked inductivity of 85 backedges. 23 proven. 6 refuted. 0 times theorem prover too weak. 56 trivial. 0 not checked. [2024-11-28 02:33:51,625 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 02:33:51,625 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1966436438] [2024-11-28 02:33:51,626 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1966436438] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-28 02:33:51,626 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [357030156] [2024-11-28 02:33:51,626 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:33:51,626 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-28 02:33:51,626 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_58ef54d4-00f4-4eef-9b59-4b85557f99bb/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 02:33:51,628 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_58ef54d4-00f4-4eef-9b59-4b85557f99bb/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-28 02:33:51,630 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_58ef54d4-00f4-4eef-9b59-4b85557f99bb/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2024-11-28 02:33:51,911 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 02:33:51,914 INFO L256 TraceCheckSpWp]: Trace formula consists of 761 conjuncts, 27 conjuncts are in the unsatisfiable core [2024-11-28 02:33:51,923 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-28 02:33:52,323 INFO L134 CoverageAnalysis]: Checked inductivity of 85 backedges. 32 proven. 44 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-11-28 02:33:52,323 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-28 02:33:52,745 INFO L134 CoverageAnalysis]: Checked inductivity of 85 backedges. 12 proven. 17 refuted. 0 times theorem prover too weak. 56 trivial. 0 not checked. [2024-11-28 02:33:52,745 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [357030156] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-28 02:33:52,745 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-28 02:33:52,745 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 11, 8] total 24 [2024-11-28 02:33:52,745 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2092583439] [2024-11-28 02:33:52,746 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-28 02:33:52,746 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 24 states [2024-11-28 02:33:52,747 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 02:33:52,747 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2024-11-28 02:33:52,747 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=66, Invalid=486, Unknown=0, NotChecked=0, Total=552 [2024-11-28 02:33:52,748 INFO L87 Difference]: Start difference. First operand 2569 states and 3329 transitions. Second operand has 24 states, 24 states have (on average 10.583333333333334) internal successors, (254), 22 states have internal predecessors, (254), 9 states have call successors, (41), 4 states have call predecessors, (41), 7 states have return successors, (40), 11 states have call predecessors, (40), 9 states have call successors, (40) [2024-11-28 02:33:59,498 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 02:33:59,498 INFO L93 Difference]: Finished difference Result 7507 states and 9755 transitions. [2024-11-28 02:33:59,499 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 64 states. [2024-11-28 02:33:59,499 INFO L78 Accepts]: Start accepts. Automaton has has 24 states, 24 states have (on average 10.583333333333334) internal successors, (254), 22 states have internal predecessors, (254), 9 states have call successors, (41), 4 states have call predecessors, (41), 7 states have return successors, (40), 11 states have call predecessors, (40), 9 states have call successors, (40) Word has length 153 [2024-11-28 02:33:59,500 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 02:33:59,528 INFO L225 Difference]: With dead ends: 7507 [2024-11-28 02:33:59,528 INFO L226 Difference]: Without dead ends: 5174 [2024-11-28 02:33:59,537 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 405 GetRequests, 322 SyntacticMatches, 0 SemanticMatches, 83 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1833 ImplicationChecksByTransitivity, 2.4s TimeCoverageRelationStatistics Valid=1036, Invalid=6104, Unknown=0, NotChecked=0, Total=7140 [2024-11-28 02:33:59,538 INFO L435 NwaCegarLoop]: 640 mSDtfsCounter, 2854 mSDsluCounter, 6380 mSDsCounter, 0 mSdLazyCounter, 3816 mSolverCounterSat, 1070 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 3.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2854 SdHoareTripleChecker+Valid, 7020 SdHoareTripleChecker+Invalid, 4886 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.1s SdHoareTripleChecker+Time, 1070 IncrementalHoareTripleChecker+Valid, 3816 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 3.7s IncrementalHoareTripleChecker+Time [2024-11-28 02:33:59,538 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2854 Valid, 7020 Invalid, 4886 Unknown, 0 Unchecked, 0.1s Time], IncrementalHoareTripleChecker [1070 Valid, 3816 Invalid, 0 Unknown, 0 Unchecked, 3.7s Time] [2024-11-28 02:33:59,544 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5174 states. [2024-11-28 02:34:00,246 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5174 to 4492. [2024-11-28 02:34:00,254 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4492 states, 3312 states have (on average 1.2958937198067633) internal successors, (4292), 3341 states have internal predecessors, (4292), 765 states have call successors, (765), 414 states have call predecessors, (765), 414 states have return successors, (765), 736 states have call predecessors, (765), 765 states have call successors, (765) [2024-11-28 02:34:00,270 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4492 states to 4492 states and 5822 transitions. [2024-11-28 02:34:00,280 INFO L78 Accepts]: Start accepts. Automaton has 4492 states and 5822 transitions. Word has length 153 [2024-11-28 02:34:00,280 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 02:34:00,280 INFO L471 AbstractCegarLoop]: Abstraction has 4492 states and 5822 transitions. [2024-11-28 02:34:00,281 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 24 states, 24 states have (on average 10.583333333333334) internal successors, (254), 22 states have internal predecessors, (254), 9 states have call successors, (41), 4 states have call predecessors, (41), 7 states have return successors, (40), 11 states have call predecessors, (40), 9 states have call successors, (40) [2024-11-28 02:34:00,281 INFO L276 IsEmpty]: Start isEmpty. Operand 4492 states and 5822 transitions. [2024-11-28 02:34:00,289 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 155 [2024-11-28 02:34:00,289 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 02:34:00,289 INFO L218 NwaCegarLoop]: trace histogram [4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 02:34:00,302 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_58ef54d4-00f4-4eef-9b59-4b85557f99bb/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Ended with exit code 0 [2024-11-28 02:34:00,494 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 4 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_58ef54d4-00f4-4eef-9b59-4b85557f99bb/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable27 [2024-11-28 02:34:00,494 INFO L396 AbstractCegarLoop]: === Iteration 29 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 02:34:00,495 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 02:34:00,495 INFO L85 PathProgramCache]: Analyzing trace with hash 1655848050, now seen corresponding path program 1 times [2024-11-28 02:34:00,495 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 02:34:00,495 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1406008915] [2024-11-28 02:34:00,495 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:34:00,495 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 02:34:00,583 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 02:34:01,563 INFO L134 CoverageAnalysis]: Checked inductivity of 83 backedges. 22 proven. 5 refuted. 0 times theorem prover too weak. 56 trivial. 0 not checked. [2024-11-28 02:34:01,564 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 02:34:01,564 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1406008915] [2024-11-28 02:34:01,564 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1406008915] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-28 02:34:01,564 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [687339983] [2024-11-28 02:34:01,564 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:34:01,564 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-28 02:34:01,565 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_58ef54d4-00f4-4eef-9b59-4b85557f99bb/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 02:34:01,567 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_58ef54d4-00f4-4eef-9b59-4b85557f99bb/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-28 02:34:01,570 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_58ef54d4-00f4-4eef-9b59-4b85557f99bb/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2024-11-28 02:34:01,844 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 02:34:01,849 INFO L256 TraceCheckSpWp]: Trace formula consists of 762 conjuncts, 50 conjuncts are in the unsatisfiable core [2024-11-28 02:34:01,858 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-28 02:34:02,676 INFO L134 CoverageAnalysis]: Checked inductivity of 83 backedges. 61 proven. 13 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-11-28 02:34:02,679 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-28 02:34:03,547 INFO L134 CoverageAnalysis]: Checked inductivity of 83 backedges. 15 proven. 12 refuted. 0 times theorem prover too weak. 56 trivial. 0 not checked. [2024-11-28 02:34:03,550 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [687339983] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-28 02:34:03,550 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-28 02:34:03,550 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 11, 11] total 27 [2024-11-28 02:34:03,550 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [853676081] [2024-11-28 02:34:03,550 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-28 02:34:03,551 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 27 states [2024-11-28 02:34:03,551 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 02:34:03,552 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2024-11-28 02:34:03,552 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=120, Invalid=582, Unknown=0, NotChecked=0, Total=702 [2024-11-28 02:34:03,552 INFO L87 Difference]: Start difference. First operand 4492 states and 5822 transitions. Second operand has 27 states, 27 states have (on average 8.814814814814815) internal successors, (238), 27 states have internal predecessors, (238), 10 states have call successors, (38), 5 states have call predecessors, (38), 6 states have return successors, (37), 10 states have call predecessors, (37), 10 states have call successors, (37) [2024-11-28 02:34:08,088 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 02:34:08,088 INFO L93 Difference]: Finished difference Result 9897 states and 12810 transitions. [2024-11-28 02:34:08,089 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 56 states. [2024-11-28 02:34:08,089 INFO L78 Accepts]: Start accepts. Automaton has has 27 states, 27 states have (on average 8.814814814814815) internal successors, (238), 27 states have internal predecessors, (238), 10 states have call successors, (38), 5 states have call predecessors, (38), 6 states have return successors, (37), 10 states have call predecessors, (37), 10 states have call successors, (37) Word has length 154 [2024-11-28 02:34:08,089 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 02:34:08,113 INFO L225 Difference]: With dead ends: 9897 [2024-11-28 02:34:08,114 INFO L226 Difference]: Without dead ends: 5652 [2024-11-28 02:34:08,123 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 387 GetRequests, 309 SyntacticMatches, 0 SemanticMatches, 78 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1979 ImplicationChecksByTransitivity, 2.6s TimeCoverageRelationStatistics Valid=1147, Invalid=5173, Unknown=0, NotChecked=0, Total=6320 [2024-11-28 02:34:08,124 INFO L435 NwaCegarLoop]: 320 mSDtfsCounter, 2593 mSDsluCounter, 3157 mSDsCounter, 0 mSdLazyCounter, 1618 mSolverCounterSat, 889 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2593 SdHoareTripleChecker+Valid, 3477 SdHoareTripleChecker+Invalid, 2507 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 889 IncrementalHoareTripleChecker+Valid, 1618 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.8s IncrementalHoareTripleChecker+Time [2024-11-28 02:34:08,124 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2593 Valid, 3477 Invalid, 2507 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [889 Valid, 1618 Invalid, 0 Unknown, 0 Unchecked, 1.8s Time] [2024-11-28 02:34:08,128 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5652 states. [2024-11-28 02:34:09,013 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5652 to 5216. [2024-11-28 02:34:09,020 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5216 states, 3855 states have (on average 1.2897535667963684) internal successors, (4972), 3888 states have internal predecessors, (4972), 876 states have call successors, (876), 484 states have call predecessors, (876), 484 states have return successors, (876), 843 states have call predecessors, (876), 876 states have call successors, (876) [2024-11-28 02:34:09,031 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5216 states to 5216 states and 6724 transitions. [2024-11-28 02:34:09,039 INFO L78 Accepts]: Start accepts. Automaton has 5216 states and 6724 transitions. Word has length 154 [2024-11-28 02:34:09,040 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 02:34:09,040 INFO L471 AbstractCegarLoop]: Abstraction has 5216 states and 6724 transitions. [2024-11-28 02:34:09,041 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 27 states, 27 states have (on average 8.814814814814815) internal successors, (238), 27 states have internal predecessors, (238), 10 states have call successors, (38), 5 states have call predecessors, (38), 6 states have return successors, (37), 10 states have call predecessors, (37), 10 states have call successors, (37) [2024-11-28 02:34:09,041 INFO L276 IsEmpty]: Start isEmpty. Operand 5216 states and 6724 transitions. [2024-11-28 02:34:09,048 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 157 [2024-11-28 02:34:09,048 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 02:34:09,048 INFO L218 NwaCegarLoop]: trace histogram [4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 02:34:09,059 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_58ef54d4-00f4-4eef-9b59-4b85557f99bb/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Forceful destruction successful, exit code 0 [2024-11-28 02:34:09,253 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 5 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_58ef54d4-00f4-4eef-9b59-4b85557f99bb/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable28 [2024-11-28 02:34:09,253 INFO L396 AbstractCegarLoop]: === Iteration 30 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 02:34:09,253 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 02:34:09,253 INFO L85 PathProgramCache]: Analyzing trace with hash -1261954953, now seen corresponding path program 1 times [2024-11-28 02:34:09,254 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 02:34:09,254 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [910828374] [2024-11-28 02:34:09,254 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:34:09,254 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 02:34:09,292 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 02:34:09,477 INFO L134 CoverageAnalysis]: Checked inductivity of 87 backedges. 22 proven. 0 refuted. 0 times theorem prover too weak. 65 trivial. 0 not checked. [2024-11-28 02:34:09,477 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 02:34:09,477 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [910828374] [2024-11-28 02:34:09,477 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [910828374] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 02:34:09,477 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 02:34:09,477 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2024-11-28 02:34:09,478 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [205720363] [2024-11-28 02:34:09,478 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 02:34:09,478 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2024-11-28 02:34:09,478 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 02:34:09,479 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-11-28 02:34:09,479 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2024-11-28 02:34:09,479 INFO L87 Difference]: Start difference. First operand 5216 states and 6724 transitions. Second operand has 7 states, 7 states have (on average 12.857142857142858) internal successors, (90), 6 states have internal predecessors, (90), 3 states have call successors, (14), 2 states have call predecessors, (14), 2 states have return successors, (13), 3 states have call predecessors, (13), 2 states have call successors, (13) [2024-11-28 02:34:10,962 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 02:34:10,963 INFO L93 Difference]: Finished difference Result 14904 states and 19316 transitions. [2024-11-28 02:34:10,963 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2024-11-28 02:34:10,963 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 12.857142857142858) internal successors, (90), 6 states have internal predecessors, (90), 3 states have call successors, (14), 2 states have call predecessors, (14), 2 states have return successors, (13), 3 states have call predecessors, (13), 2 states have call successors, (13) Word has length 156 [2024-11-28 02:34:10,963 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 02:34:11,000 INFO L225 Difference]: With dead ends: 14904 [2024-11-28 02:34:11,001 INFO L226 Difference]: Without dead ends: 10147 [2024-11-28 02:34:11,011 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=83, Unknown=0, NotChecked=0, Total=110 [2024-11-28 02:34:11,011 INFO L435 NwaCegarLoop]: 477 mSDtfsCounter, 219 mSDsluCounter, 2054 mSDsCounter, 0 mSdLazyCounter, 137 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 224 SdHoareTripleChecker+Valid, 2531 SdHoareTripleChecker+Invalid, 137 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 137 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-11-28 02:34:11,011 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [224 Valid, 2531 Invalid, 137 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 137 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-11-28 02:34:11,018 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10147 states. [2024-11-28 02:34:12,309 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10147 to 7591. [2024-11-28 02:34:12,319 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7591 states, 5566 states have (on average 1.2896155228171038) internal successors, (7178), 5616 states have internal predecessors, (7178), 1319 states have call successors, (1319), 705 states have call predecessors, (1319), 705 states have return successors, (1319), 1269 states have call predecessors, (1319), 1319 states have call successors, (1319) [2024-11-28 02:34:12,337 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7591 states to 7591 states and 9816 transitions. [2024-11-28 02:34:12,347 INFO L78 Accepts]: Start accepts. Automaton has 7591 states and 9816 transitions. Word has length 156 [2024-11-28 02:34:12,348 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 02:34:12,348 INFO L471 AbstractCegarLoop]: Abstraction has 7591 states and 9816 transitions. [2024-11-28 02:34:12,348 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 12.857142857142858) internal successors, (90), 6 states have internal predecessors, (90), 3 states have call successors, (14), 2 states have call predecessors, (14), 2 states have return successors, (13), 3 states have call predecessors, (13), 2 states have call successors, (13) [2024-11-28 02:34:12,348 INFO L276 IsEmpty]: Start isEmpty. Operand 7591 states and 9816 transitions. [2024-11-28 02:34:12,359 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 157 [2024-11-28 02:34:12,360 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 02:34:12,360 INFO L218 NwaCegarLoop]: trace histogram [4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 02:34:12,360 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable29 [2024-11-28 02:34:12,360 INFO L396 AbstractCegarLoop]: === Iteration 31 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 02:34:12,360 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 02:34:12,360 INFO L85 PathProgramCache]: Analyzing trace with hash -2005359977, now seen corresponding path program 1 times [2024-11-28 02:34:12,361 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 02:34:12,361 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [989350250] [2024-11-28 02:34:12,361 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:34:12,361 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 02:34:12,440 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 02:34:13,830 INFO L134 CoverageAnalysis]: Checked inductivity of 85 backedges. 15 proven. 14 refuted. 0 times theorem prover too weak. 56 trivial. 0 not checked. [2024-11-28 02:34:13,830 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 02:34:13,830 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [989350250] [2024-11-28 02:34:13,830 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [989350250] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-28 02:34:13,830 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1302333945] [2024-11-28 02:34:13,830 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:34:13,830 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-28 02:34:13,830 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_58ef54d4-00f4-4eef-9b59-4b85557f99bb/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 02:34:13,832 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_58ef54d4-00f4-4eef-9b59-4b85557f99bb/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-28 02:34:13,834 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_58ef54d4-00f4-4eef-9b59-4b85557f99bb/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2024-11-28 02:34:14,077 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 02:34:14,080 INFO L256 TraceCheckSpWp]: Trace formula consists of 779 conjuncts, 38 conjuncts are in the unsatisfiable core [2024-11-28 02:34:14,084 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-28 02:34:14,619 INFO L134 CoverageAnalysis]: Checked inductivity of 85 backedges. 59 proven. 17 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-11-28 02:34:14,619 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-28 02:34:15,766 INFO L134 CoverageAnalysis]: Checked inductivity of 85 backedges. 20 proven. 9 refuted. 0 times theorem prover too weak. 56 trivial. 0 not checked. [2024-11-28 02:34:15,766 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1302333945] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-28 02:34:15,766 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-28 02:34:15,766 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 13, 10] total 32 [2024-11-28 02:34:15,766 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1300282811] [2024-11-28 02:34:15,766 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-28 02:34:15,767 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 32 states [2024-11-28 02:34:15,767 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 02:34:15,768 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 32 interpolants. [2024-11-28 02:34:15,768 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=127, Invalid=865, Unknown=0, NotChecked=0, Total=992 [2024-11-28 02:34:15,768 INFO L87 Difference]: Start difference. First operand 7591 states and 9816 transitions. Second operand has 32 states, 32 states have (on average 8.125) internal successors, (260), 32 states have internal predecessors, (260), 11 states have call successors, (38), 5 states have call predecessors, (38), 6 states have return successors, (37), 11 states have call predecessors, (37), 11 states have call successors, (37) [2024-11-28 02:34:23,243 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 02:34:23,243 INFO L93 Difference]: Finished difference Result 16958 states and 21972 transitions. [2024-11-28 02:34:23,243 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 85 states. [2024-11-28 02:34:23,243 INFO L78 Accepts]: Start accepts. Automaton has has 32 states, 32 states have (on average 8.125) internal successors, (260), 32 states have internal predecessors, (260), 11 states have call successors, (38), 5 states have call predecessors, (38), 6 states have return successors, (37), 11 states have call predecessors, (37), 11 states have call successors, (37) Word has length 156 [2024-11-28 02:34:23,244 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 02:34:23,288 INFO L225 Difference]: With dead ends: 16958 [2024-11-28 02:34:23,289 INFO L226 Difference]: Without dead ends: 9779 [2024-11-28 02:34:23,308 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 426 GetRequests, 314 SyntacticMatches, 0 SemanticMatches, 112 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4414 ImplicationChecksByTransitivity, 3.5s TimeCoverageRelationStatistics Valid=2004, Invalid=10878, Unknown=0, NotChecked=0, Total=12882 [2024-11-28 02:34:23,308 INFO L435 NwaCegarLoop]: 545 mSDtfsCounter, 4358 mSDsluCounter, 4972 mSDsCounter, 0 mSdLazyCounter, 2755 mSolverCounterSat, 1539 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 2.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 4358 SdHoareTripleChecker+Valid, 5517 SdHoareTripleChecker+Invalid, 4294 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1539 IncrementalHoareTripleChecker+Valid, 2755 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 2.8s IncrementalHoareTripleChecker+Time [2024-11-28 02:34:23,309 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [4358 Valid, 5517 Invalid, 4294 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1539 Valid, 2755 Invalid, 0 Unknown, 0 Unchecked, 2.8s Time] [2024-11-28 02:34:23,317 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9779 states. [2024-11-28 02:34:25,026 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9779 to 9176. [2024-11-28 02:34:25,034 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 9176 states, 6740 states have (on average 1.2875370919881306) internal successors, (8678), 6802 states have internal predecessors, (8678), 1584 states have call successors, (1584), 851 states have call predecessors, (1584), 851 states have return successors, (1584), 1522 states have call predecessors, (1584), 1584 states have call successors, (1584) [2024-11-28 02:34:25,059 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9176 states to 9176 states and 11846 transitions. [2024-11-28 02:34:25,072 INFO L78 Accepts]: Start accepts. Automaton has 9176 states and 11846 transitions. Word has length 156 [2024-11-28 02:34:25,073 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 02:34:25,073 INFO L471 AbstractCegarLoop]: Abstraction has 9176 states and 11846 transitions. [2024-11-28 02:34:25,073 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 32 states, 32 states have (on average 8.125) internal successors, (260), 32 states have internal predecessors, (260), 11 states have call successors, (38), 5 states have call predecessors, (38), 6 states have return successors, (37), 11 states have call predecessors, (37), 11 states have call successors, (37) [2024-11-28 02:34:25,073 INFO L276 IsEmpty]: Start isEmpty. Operand 9176 states and 11846 transitions. [2024-11-28 02:34:25,083 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 158 [2024-11-28 02:34:25,083 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 02:34:25,084 INFO L218 NwaCegarLoop]: trace histogram [4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 02:34:25,094 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_58ef54d4-00f4-4eef-9b59-4b85557f99bb/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Ended with exit code 0 [2024-11-28 02:34:25,284 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable30,6 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_58ef54d4-00f4-4eef-9b59-4b85557f99bb/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-28 02:34:25,285 INFO L396 AbstractCegarLoop]: === Iteration 32 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 02:34:25,285 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 02:34:25,285 INFO L85 PathProgramCache]: Analyzing trace with hash 1846912646, now seen corresponding path program 1 times [2024-11-28 02:34:25,285 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 02:34:25,285 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [353819491] [2024-11-28 02:34:25,286 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:34:25,286 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 02:34:25,370 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 02:34:26,559 INFO L134 CoverageAnalysis]: Checked inductivity of 87 backedges. 25 proven. 6 refuted. 0 times theorem prover too weak. 56 trivial. 0 not checked. [2024-11-28 02:34:26,560 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 02:34:26,560 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [353819491] [2024-11-28 02:34:26,560 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [353819491] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-28 02:34:26,560 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [770296136] [2024-11-28 02:34:26,560 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:34:26,560 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-28 02:34:26,560 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_58ef54d4-00f4-4eef-9b59-4b85557f99bb/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 02:34:26,562 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_58ef54d4-00f4-4eef-9b59-4b85557f99bb/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-28 02:34:26,565 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_58ef54d4-00f4-4eef-9b59-4b85557f99bb/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2024-11-28 02:34:26,835 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 02:34:26,844 INFO L256 TraceCheckSpWp]: Trace formula consists of 779 conjuncts, 40 conjuncts are in the unsatisfiable core [2024-11-28 02:34:26,849 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-28 02:34:27,377 INFO L134 CoverageAnalysis]: Checked inductivity of 87 backedges. 64 proven. 14 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-11-28 02:34:27,377 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-28 02:34:28,192 INFO L134 CoverageAnalysis]: Checked inductivity of 87 backedges. 25 proven. 6 refuted. 0 times theorem prover too weak. 56 trivial. 0 not checked. [2024-11-28 02:34:28,192 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [770296136] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-28 02:34:28,192 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-28 02:34:28,192 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 13, 10] total 27 [2024-11-28 02:34:28,193 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2101048977] [2024-11-28 02:34:28,193 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-28 02:34:28,193 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 27 states [2024-11-28 02:34:28,193 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 02:34:28,194 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2024-11-28 02:34:28,194 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=124, Invalid=578, Unknown=0, NotChecked=0, Total=702 [2024-11-28 02:34:28,194 INFO L87 Difference]: Start difference. First operand 9176 states and 11846 transitions. Second operand has 27 states, 27 states have (on average 8.37037037037037) internal successors, (226), 27 states have internal predecessors, (226), 8 states have call successors, (30), 5 states have call predecessors, (30), 6 states have return successors, (29), 8 states have call predecessors, (29), 8 states have call successors, (29) [2024-11-28 02:34:31,439 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 02:34:31,439 INFO L93 Difference]: Finished difference Result 17957 states and 23259 transitions. [2024-11-28 02:34:31,440 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2024-11-28 02:34:31,440 INFO L78 Accepts]: Start accepts. Automaton has has 27 states, 27 states have (on average 8.37037037037037) internal successors, (226), 27 states have internal predecessors, (226), 8 states have call successors, (30), 5 states have call predecessors, (30), 6 states have return successors, (29), 8 states have call predecessors, (29), 8 states have call successors, (29) Word has length 157 [2024-11-28 02:34:31,440 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 02:34:31,472 INFO L225 Difference]: With dead ends: 17957 [2024-11-28 02:34:31,472 INFO L226 Difference]: Without dead ends: 9178 [2024-11-28 02:34:31,485 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 340 GetRequests, 303 SyntacticMatches, 0 SemanticMatches, 37 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 303 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=277, Invalid=1205, Unknown=0, NotChecked=0, Total=1482 [2024-11-28 02:34:31,485 INFO L435 NwaCegarLoop]: 451 mSDtfsCounter, 1094 mSDsluCounter, 3437 mSDsCounter, 0 mSdLazyCounter, 1629 mSolverCounterSat, 299 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1094 SdHoareTripleChecker+Valid, 3888 SdHoareTripleChecker+Invalid, 1928 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 299 IncrementalHoareTripleChecker+Valid, 1629 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.4s IncrementalHoareTripleChecker+Time [2024-11-28 02:34:31,486 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1094 Valid, 3888 Invalid, 1928 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [299 Valid, 1629 Invalid, 0 Unknown, 0 Unchecked, 1.4s Time] [2024-11-28 02:34:31,493 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9178 states. [2024-11-28 02:34:33,468 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9178 to 9112. [2024-11-28 02:34:33,475 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 9112 states, 6684 states have (on average 1.2881508078994615) internal successors, (8610), 6746 states have internal predecessors, (8610), 1580 states have call successors, (1580), 847 states have call predecessors, (1580), 847 states have return successors, (1580), 1518 states have call predecessors, (1580), 1580 states have call successors, (1580) [2024-11-28 02:34:33,496 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9112 states to 9112 states and 11770 transitions. [2024-11-28 02:34:33,527 INFO L78 Accepts]: Start accepts. Automaton has 9112 states and 11770 transitions. Word has length 157 [2024-11-28 02:34:33,527 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 02:34:33,527 INFO L471 AbstractCegarLoop]: Abstraction has 9112 states and 11770 transitions. [2024-11-28 02:34:33,527 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 27 states, 27 states have (on average 8.37037037037037) internal successors, (226), 27 states have internal predecessors, (226), 8 states have call successors, (30), 5 states have call predecessors, (30), 6 states have return successors, (29), 8 states have call predecessors, (29), 8 states have call successors, (29) [2024-11-28 02:34:33,528 INFO L276 IsEmpty]: Start isEmpty. Operand 9112 states and 11770 transitions. [2024-11-28 02:34:33,548 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 159 [2024-11-28 02:34:33,548 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 02:34:33,549 INFO L218 NwaCegarLoop]: trace histogram [4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 02:34:33,558 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_58ef54d4-00f4-4eef-9b59-4b85557f99bb/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Forceful destruction successful, exit code 0 [2024-11-28 02:34:33,749 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable31,7 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_58ef54d4-00f4-4eef-9b59-4b85557f99bb/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-28 02:34:33,750 INFO L396 AbstractCegarLoop]: === Iteration 33 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 02:34:33,750 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 02:34:33,750 INFO L85 PathProgramCache]: Analyzing trace with hash 783351040, now seen corresponding path program 1 times [2024-11-28 02:34:33,750 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 02:34:33,750 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1794340736] [2024-11-28 02:34:33,750 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:34:33,751 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 02:34:33,840 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 02:34:34,590 INFO L134 CoverageAnalysis]: Checked inductivity of 85 backedges. 27 proven. 4 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2024-11-28 02:34:34,591 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 02:34:34,591 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1794340736] [2024-11-28 02:34:34,591 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1794340736] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-28 02:34:34,591 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [903925431] [2024-11-28 02:34:34,591 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:34:34,591 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-28 02:34:34,591 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_58ef54d4-00f4-4eef-9b59-4b85557f99bb/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 02:34:34,593 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_58ef54d4-00f4-4eef-9b59-4b85557f99bb/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-28 02:34:34,597 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_58ef54d4-00f4-4eef-9b59-4b85557f99bb/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2024-11-28 02:34:34,878 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 02:34:34,882 INFO L256 TraceCheckSpWp]: Trace formula consists of 765 conjuncts, 34 conjuncts are in the unsatisfiable core [2024-11-28 02:34:34,886 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-28 02:34:35,088 INFO L134 CoverageAnalysis]: Checked inductivity of 85 backedges. 65 proven. 4 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2024-11-28 02:34:35,089 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-28 02:34:35,400 INFO L134 CoverageAnalysis]: Checked inductivity of 85 backedges. 27 proven. 6 refuted. 0 times theorem prover too weak. 52 trivial. 0 not checked. [2024-11-28 02:34:35,401 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [903925431] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-28 02:34:35,401 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-28 02:34:35,401 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 12, 10] total 22 [2024-11-28 02:34:35,401 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1032781161] [2024-11-28 02:34:35,401 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-28 02:34:35,402 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 22 states [2024-11-28 02:34:35,402 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 02:34:35,402 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2024-11-28 02:34:35,402 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=73, Invalid=389, Unknown=0, NotChecked=0, Total=462 [2024-11-28 02:34:35,403 INFO L87 Difference]: Start difference. First operand 9112 states and 11770 transitions. Second operand has 22 states, 22 states have (on average 7.681818181818182) internal successors, (169), 17 states have internal predecessors, (169), 4 states have call successors, (24), 4 states have call predecessors, (24), 8 states have return successors, (27), 8 states have call predecessors, (27), 4 states have call successors, (27) [2024-11-28 02:34:40,036 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 02:34:40,037 INFO L93 Difference]: Finished difference Result 24326 states and 31327 transitions. [2024-11-28 02:34:40,037 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2024-11-28 02:34:40,037 INFO L78 Accepts]: Start accepts. Automaton has has 22 states, 22 states have (on average 7.681818181818182) internal successors, (169), 17 states have internal predecessors, (169), 4 states have call successors, (24), 4 states have call predecessors, (24), 8 states have return successors, (27), 8 states have call predecessors, (27), 4 states have call successors, (27) Word has length 158 [2024-11-28 02:34:40,038 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 02:34:40,096 INFO L225 Difference]: With dead ends: 24326 [2024-11-28 02:34:40,096 INFO L226 Difference]: Without dead ends: 15486 [2024-11-28 02:34:40,113 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 360 GetRequests, 315 SyntacticMatches, 0 SemanticMatches, 45 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 429 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=311, Invalid=1851, Unknown=0, NotChecked=0, Total=2162 [2024-11-28 02:34:40,113 INFO L435 NwaCegarLoop]: 431 mSDtfsCounter, 929 mSDsluCounter, 4647 mSDsCounter, 0 mSdLazyCounter, 1938 mSolverCounterSat, 341 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 932 SdHoareTripleChecker+Valid, 5078 SdHoareTripleChecker+Invalid, 2279 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 341 IncrementalHoareTripleChecker+Valid, 1938 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.4s IncrementalHoareTripleChecker+Time [2024-11-28 02:34:40,114 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [932 Valid, 5078 Invalid, 2279 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [341 Valid, 1938 Invalid, 0 Unknown, 0 Unchecked, 1.4s Time] [2024-11-28 02:34:40,123 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15486 states. [2024-11-28 02:34:42,424 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15486 to 10278. [2024-11-28 02:34:42,431 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 10278 states, 7524 states have (on average 1.2880116959064327) internal successors, (9691), 7598 states have internal predecessors, (9691), 1782 states have call successors, (1782), 971 states have call predecessors, (1782), 971 states have return successors, (1782), 1708 states have call predecessors, (1782), 1782 states have call successors, (1782) [2024-11-28 02:34:42,455 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10278 states to 10278 states and 13255 transitions. [2024-11-28 02:34:42,473 INFO L78 Accepts]: Start accepts. Automaton has 10278 states and 13255 transitions. Word has length 158 [2024-11-28 02:34:42,474 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 02:34:42,474 INFO L471 AbstractCegarLoop]: Abstraction has 10278 states and 13255 transitions. [2024-11-28 02:34:42,474 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 22 states, 22 states have (on average 7.681818181818182) internal successors, (169), 17 states have internal predecessors, (169), 4 states have call successors, (24), 4 states have call predecessors, (24), 8 states have return successors, (27), 8 states have call predecessors, (27), 4 states have call successors, (27) [2024-11-28 02:34:42,474 INFO L276 IsEmpty]: Start isEmpty. Operand 10278 states and 13255 transitions. [2024-11-28 02:34:42,483 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 167 [2024-11-28 02:34:42,483 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 02:34:42,483 INFO L218 NwaCegarLoop]: trace histogram [4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 02:34:42,493 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_58ef54d4-00f4-4eef-9b59-4b85557f99bb/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Ended with exit code 0 [2024-11-28 02:34:42,687 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 8 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_58ef54d4-00f4-4eef-9b59-4b85557f99bb/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable32 [2024-11-28 02:34:42,687 INFO L396 AbstractCegarLoop]: === Iteration 34 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 02:34:42,688 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 02:34:42,690 INFO L85 PathProgramCache]: Analyzing trace with hash -1346805712, now seen corresponding path program 1 times [2024-11-28 02:34:42,690 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 02:34:42,690 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1685140047] [2024-11-28 02:34:42,690 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:34:42,690 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 02:34:42,788 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 02:34:42,971 INFO L134 CoverageAnalysis]: Checked inductivity of 90 backedges. 24 proven. 2 refuted. 0 times theorem prover too weak. 64 trivial. 0 not checked. [2024-11-28 02:34:42,972 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 02:34:42,972 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1685140047] [2024-11-28 02:34:42,972 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1685140047] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-28 02:34:42,972 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1452765046] [2024-11-28 02:34:42,972 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:34:42,972 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-28 02:34:42,972 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_58ef54d4-00f4-4eef-9b59-4b85557f99bb/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 02:34:42,974 INFO L229 MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_58ef54d4-00f4-4eef-9b59-4b85557f99bb/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-28 02:34:42,979 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_58ef54d4-00f4-4eef-9b59-4b85557f99bb/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2024-11-28 02:34:43,259 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 02:34:43,265 INFO L256 TraceCheckSpWp]: Trace formula consists of 784 conjuncts, 11 conjuncts are in the unsatisfiable core [2024-11-28 02:34:43,268 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-28 02:34:43,348 INFO L134 CoverageAnalysis]: Checked inductivity of 90 backedges. 47 proven. 4 refuted. 0 times theorem prover too weak. 39 trivial. 0 not checked. [2024-11-28 02:34:43,348 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-28 02:34:43,476 INFO L134 CoverageAnalysis]: Checked inductivity of 90 backedges. 24 proven. 2 refuted. 0 times theorem prover too weak. 64 trivial. 0 not checked. [2024-11-28 02:34:43,476 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1452765046] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-28 02:34:43,476 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-28 02:34:43,477 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 7] total 9 [2024-11-28 02:34:43,477 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [132110846] [2024-11-28 02:34:43,477 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-28 02:34:43,477 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 9 states [2024-11-28 02:34:43,477 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 02:34:43,478 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2024-11-28 02:34:43,479 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=53, Unknown=0, NotChecked=0, Total=72 [2024-11-28 02:34:43,480 INFO L87 Difference]: Start difference. First operand 10278 states and 13255 transitions. Second operand has 9 states, 9 states have (on average 15.88888888888889) internal successors, (143), 8 states have internal predecessors, (143), 3 states have call successors, (28), 4 states have call predecessors, (28), 7 states have return successors, (29), 4 states have call predecessors, (29), 3 states have call successors, (29) [2024-11-28 02:34:45,216 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 02:34:45,216 INFO L93 Difference]: Finished difference Result 20510 states and 26444 transitions. [2024-11-28 02:34:45,216 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2024-11-28 02:34:45,216 INFO L78 Accepts]: Start accepts. Automaton has has 9 states, 9 states have (on average 15.88888888888889) internal successors, (143), 8 states have internal predecessors, (143), 3 states have call successors, (28), 4 states have call predecessors, (28), 7 states have return successors, (29), 4 states have call predecessors, (29), 3 states have call successors, (29) Word has length 166 [2024-11-28 02:34:45,217 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 02:34:45,260 INFO L225 Difference]: With dead ends: 20510 [2024-11-28 02:34:45,260 INFO L226 Difference]: Without dead ends: 10440 [2024-11-28 02:34:45,275 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 341 GetRequests, 331 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=31, Invalid=101, Unknown=0, NotChecked=0, Total=132 [2024-11-28 02:34:45,276 INFO L435 NwaCegarLoop]: 253 mSDtfsCounter, 73 mSDsluCounter, 1201 mSDsCounter, 0 mSdLazyCounter, 66 mSolverCounterSat, 6 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 74 SdHoareTripleChecker+Valid, 1454 SdHoareTripleChecker+Invalid, 72 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 6 IncrementalHoareTripleChecker+Valid, 66 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-28 02:34:45,276 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [74 Valid, 1454 Invalid, 72 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [6 Valid, 66 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-28 02:34:45,282 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10440 states. [2024-11-28 02:34:47,195 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10440 to 10278. [2024-11-28 02:34:47,201 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 10278 states, 7524 states have (on average 1.2874800637958532) internal successors, (9687), 7598 states have internal predecessors, (9687), 1782 states have call successors, (1782), 971 states have call predecessors, (1782), 971 states have return successors, (1782), 1708 states have call predecessors, (1782), 1782 states have call successors, (1782) [2024-11-28 02:34:47,216 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10278 states to 10278 states and 13251 transitions. [2024-11-28 02:34:47,228 INFO L78 Accepts]: Start accepts. Automaton has 10278 states and 13251 transitions. Word has length 166 [2024-11-28 02:34:47,228 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 02:34:47,228 INFO L471 AbstractCegarLoop]: Abstraction has 10278 states and 13251 transitions. [2024-11-28 02:34:47,228 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 9 states, 9 states have (on average 15.88888888888889) internal successors, (143), 8 states have internal predecessors, (143), 3 states have call successors, (28), 4 states have call predecessors, (28), 7 states have return successors, (29), 4 states have call predecessors, (29), 3 states have call successors, (29) [2024-11-28 02:34:47,229 INFO L276 IsEmpty]: Start isEmpty. Operand 10278 states and 13251 transitions. [2024-11-28 02:34:47,235 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 175 [2024-11-28 02:34:47,235 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 02:34:47,235 INFO L218 NwaCegarLoop]: trace histogram [4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 02:34:47,245 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_58ef54d4-00f4-4eef-9b59-4b85557f99bb/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Forceful destruction successful, exit code 0 [2024-11-28 02:34:47,436 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 9 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_58ef54d4-00f4-4eef-9b59-4b85557f99bb/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable33 [2024-11-28 02:34:47,436 INFO L396 AbstractCegarLoop]: === Iteration 35 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 02:34:47,436 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 02:34:47,436 INFO L85 PathProgramCache]: Analyzing trace with hash -511519232, now seen corresponding path program 1 times [2024-11-28 02:34:47,437 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 02:34:47,437 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [567187768] [2024-11-28 02:34:47,437 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:34:47,437 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 02:34:47,526 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 02:34:48,764 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 27 proven. 8 refuted. 0 times theorem prover too weak. 70 trivial. 0 not checked. [2024-11-28 02:34:48,764 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 02:34:48,764 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [567187768] [2024-11-28 02:34:48,764 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [567187768] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-28 02:34:48,764 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [244797835] [2024-11-28 02:34:48,764 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:34:48,765 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-28 02:34:48,765 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_58ef54d4-00f4-4eef-9b59-4b85557f99bb/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 02:34:48,766 INFO L229 MonitoredProcess]: Starting monitored process 10 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_58ef54d4-00f4-4eef-9b59-4b85557f99bb/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-28 02:34:48,768 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_58ef54d4-00f4-4eef-9b59-4b85557f99bb/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process [2024-11-28 02:34:49,118 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 02:34:49,122 INFO L256 TraceCheckSpWp]: Trace formula consists of 802 conjuncts, 29 conjuncts are in the unsatisfiable core [2024-11-28 02:34:49,127 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-28 02:34:49,396 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 75 proven. 6 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2024-11-28 02:34:49,396 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-28 02:34:49,731 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 29 proven. 8 refuted. 0 times theorem prover too weak. 68 trivial. 0 not checked. [2024-11-28 02:34:49,732 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [244797835] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-28 02:34:49,732 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-28 02:34:49,732 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 12, 10] total 22 [2024-11-28 02:34:49,732 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1873904515] [2024-11-28 02:34:49,732 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-28 02:34:49,733 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 22 states [2024-11-28 02:34:49,733 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 02:34:49,734 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2024-11-28 02:34:49,734 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=70, Invalid=392, Unknown=0, NotChecked=0, Total=462 [2024-11-28 02:34:49,734 INFO L87 Difference]: Start difference. First operand 10278 states and 13251 transitions. Second operand has 22 states, 22 states have (on average 8.0) internal successors, (176), 17 states have internal predecessors, (176), 4 states have call successors, (29), 4 states have call predecessors, (29), 9 states have return successors, (32), 9 states have call predecessors, (32), 4 states have call successors, (32) [2024-11-28 02:34:54,636 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 02:34:54,636 INFO L93 Difference]: Finished difference Result 28807 states and 38222 transitions. [2024-11-28 02:34:54,636 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2024-11-28 02:34:54,637 INFO L78 Accepts]: Start accepts. Automaton has has 22 states, 22 states have (on average 8.0) internal successors, (176), 17 states have internal predecessors, (176), 4 states have call successors, (29), 4 states have call predecessors, (29), 9 states have return successors, (32), 9 states have call predecessors, (32), 4 states have call successors, (32) Word has length 174 [2024-11-28 02:34:54,637 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 02:34:54,702 INFO L225 Difference]: With dead ends: 28807 [2024-11-28 02:34:54,702 INFO L226 Difference]: Without dead ends: 18737 [2024-11-28 02:34:54,721 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 376 GetRequests, 341 SyntacticMatches, 0 SemanticMatches, 35 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 223 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=194, Invalid=1138, Unknown=0, NotChecked=0, Total=1332 [2024-11-28 02:34:54,722 INFO L435 NwaCegarLoop]: 364 mSDtfsCounter, 476 mSDsluCounter, 4418 mSDsCounter, 0 mSdLazyCounter, 1518 mSolverCounterSat, 104 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.9s Time, 0 mProtectedPredicate, 0 mProtectedAction, 481 SdHoareTripleChecker+Valid, 4782 SdHoareTripleChecker+Invalid, 1622 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 104 IncrementalHoareTripleChecker+Valid, 1518 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.0s IncrementalHoareTripleChecker+Time [2024-11-28 02:34:54,722 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [481 Valid, 4782 Invalid, 1622 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [104 Valid, 1518 Invalid, 0 Unknown, 0 Unchecked, 1.0s Time] [2024-11-28 02:34:54,733 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18737 states. [2024-11-28 02:34:57,303 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18737 to 12390. [2024-11-28 02:34:57,310 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 12390 states, 9038 states have (on average 1.2857933171055542) internal successors, (11621), 9134 states have internal predecessors, (11621), 2166 states have call successors, (2166), 1185 states have call predecessors, (2166), 1185 states have return successors, (2166), 2070 states have call predecessors, (2166), 2166 states have call successors, (2166) [2024-11-28 02:34:57,331 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12390 states to 12390 states and 15953 transitions. [2024-11-28 02:34:57,347 INFO L78 Accepts]: Start accepts. Automaton has 12390 states and 15953 transitions. Word has length 174 [2024-11-28 02:34:57,347 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 02:34:57,347 INFO L471 AbstractCegarLoop]: Abstraction has 12390 states and 15953 transitions. [2024-11-28 02:34:57,348 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 22 states, 22 states have (on average 8.0) internal successors, (176), 17 states have internal predecessors, (176), 4 states have call successors, (29), 4 states have call predecessors, (29), 9 states have return successors, (32), 9 states have call predecessors, (32), 4 states have call successors, (32) [2024-11-28 02:34:57,348 INFO L276 IsEmpty]: Start isEmpty. Operand 12390 states and 15953 transitions. [2024-11-28 02:34:57,352 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 182 [2024-11-28 02:34:57,353 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 02:34:57,353 INFO L218 NwaCegarLoop]: trace histogram [5, 5, 4, 4, 4, 4, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 02:34:57,365 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_58ef54d4-00f4-4eef-9b59-4b85557f99bb/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Ended with exit code 0 [2024-11-28 02:34:57,553 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 10 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_58ef54d4-00f4-4eef-9b59-4b85557f99bb/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable34 [2024-11-28 02:34:57,553 INFO L396 AbstractCegarLoop]: === Iteration 36 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 02:34:57,554 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 02:34:57,554 INFO L85 PathProgramCache]: Analyzing trace with hash 1832391060, now seen corresponding path program 1 times [2024-11-28 02:34:57,554 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 02:34:57,554 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1453672388] [2024-11-28 02:34:57,554 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:34:57,554 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 02:34:57,707 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-28 02:34:57,708 INFO L357 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-28 02:34:57,854 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-28 02:34:57,998 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-28 02:34:58,002 INFO L340 BasicCegarLoop]: Counterexample is feasible [2024-11-28 02:34:58,003 INFO L782 garLoopResultBuilder]: Registering result UNSAFE for location assertErr0ASSERT_VIOLATIONERROR_FUNCTION (0 of 1 remaining) [2024-11-28 02:34:58,006 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable35 [2024-11-28 02:34:58,018 INFO L422 BasicCegarLoop]: Path program histogram: [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 02:34:58,341 INFO L170 ceAbstractionStarter]: Computing trace abstraction results [2024-11-28 02:34:58,348 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 28.11 02:34:58 BoogieIcfgContainer [2024-11-28 02:34:58,352 INFO L131 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2024-11-28 02:34:58,353 INFO L112 PluginConnector]: ------------------------Witness Printer---------------------------- [2024-11-28 02:34:58,353 INFO L270 PluginConnector]: Initializing Witness Printer... [2024-11-28 02:34:58,353 INFO L274 PluginConnector]: Witness Printer initialized [2024-11-28 02:34:58,354 INFO L184 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.11 02:33:27" (3/4) ... [2024-11-28 02:34:58,355 INFO L140 WitnessPrinter]: Generating witness for reachability counterexample [2024-11-28 02:34:58,671 INFO L129 tionWitnessGenerator]: Generated YAML witness of length 142. [2024-11-28 02:34:58,867 INFO L149 WitnessManager]: Wrote witness to /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_58ef54d4-00f4-4eef-9b59-4b85557f99bb/bin/uautomizer-verify-aQ6SnzHsRB/witness.graphml [2024-11-28 02:34:58,868 INFO L149 WitnessManager]: Wrote witness to /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_58ef54d4-00f4-4eef-9b59-4b85557f99bb/bin/uautomizer-verify-aQ6SnzHsRB/witness.yml [2024-11-28 02:34:58,868 INFO L131 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2024-11-28 02:34:58,873 INFO L158 Benchmark]: Toolchain (without parser) took 92313.20ms. Allocated memory was 142.6MB in the beginning and 3.2GB in the end (delta: 3.0GB). Free memory was 104.2MB in the beginning and 2.2GB in the end (delta: -2.1GB). Peak memory consumption was 915.6MB. Max. memory is 16.1GB. [2024-11-28 02:34:58,873 INFO L158 Benchmark]: CDTParser took 0.50ms. Allocated memory is still 167.8MB. Free memory is still 103.7MB. There was no memory consumed. Max. memory is 16.1GB. [2024-11-28 02:34:58,873 INFO L158 Benchmark]: CACSL2BoogieTranslator took 355.50ms. Allocated memory is still 142.6MB. Free memory was 103.9MB in the beginning and 86.1MB in the end (delta: 17.8MB). Peak memory consumption was 16.8MB. Max. memory is 16.1GB. [2024-11-28 02:34:58,874 INFO L158 Benchmark]: Boogie Procedure Inliner took 62.38ms. Allocated memory is still 142.6MB. Free memory was 86.1MB in the beginning and 82.4MB in the end (delta: 3.6MB). There was no memory consumed. Max. memory is 16.1GB. [2024-11-28 02:34:58,874 INFO L158 Benchmark]: Boogie Preprocessor took 70.36ms. Allocated memory is still 142.6MB. Free memory was 82.4MB in the beginning and 78.3MB in the end (delta: 4.1MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. [2024-11-28 02:34:58,874 INFO L158 Benchmark]: RCFGBuilder took 923.28ms. Allocated memory is still 142.6MB. Free memory was 78.3MB in the beginning and 38.3MB in the end (delta: 40.0MB). Peak memory consumption was 41.9MB. Max. memory is 16.1GB. [2024-11-28 02:34:58,874 INFO L158 Benchmark]: TraceAbstraction took 90378.78ms. Allocated memory was 142.6MB in the beginning and 3.2GB in the end (delta: 3.0GB). Free memory was 37.7MB in the beginning and 2.3GB in the end (delta: -2.2GB). Peak memory consumption was 806.5MB. Max. memory is 16.1GB. [2024-11-28 02:34:58,875 INFO L158 Benchmark]: Witness Printer took 515.84ms. Allocated memory is still 3.2GB. Free memory was 2.3GB in the beginning and 2.2GB in the end (delta: 41.9MB). Peak memory consumption was 41.9MB. Max. memory is 16.1GB. [2024-11-28 02:34:58,876 INFO L338 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.50ms. Allocated memory is still 167.8MB. Free memory is still 103.7MB. There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 355.50ms. Allocated memory is still 142.6MB. Free memory was 103.9MB in the beginning and 86.1MB in the end (delta: 17.8MB). Peak memory consumption was 16.8MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 62.38ms. Allocated memory is still 142.6MB. Free memory was 86.1MB in the beginning and 82.4MB in the end (delta: 3.6MB). There was no memory consumed. Max. memory is 16.1GB. * Boogie Preprocessor took 70.36ms. Allocated memory is still 142.6MB. Free memory was 82.4MB in the beginning and 78.3MB in the end (delta: 4.1MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. * RCFGBuilder took 923.28ms. Allocated memory is still 142.6MB. Free memory was 78.3MB in the beginning and 38.3MB in the end (delta: 40.0MB). Peak memory consumption was 41.9MB. Max. memory is 16.1GB. * TraceAbstraction took 90378.78ms. Allocated memory was 142.6MB in the beginning and 3.2GB in the end (delta: 3.0GB). Free memory was 37.7MB in the beginning and 2.3GB in the end (delta: -2.2GB). Peak memory consumption was 806.5MB. Max. memory is 16.1GB. * Witness Printer took 515.84ms. Allocated memory is still 3.2GB. Free memory was 2.3GB in the beginning and 2.2GB in the end (delta: 41.9MB). Peak memory consumption was 41.9MB. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: ErrorAutomatonStatistics NumberErrorTraces: 0, NumberStatementsAllTraces: 0, NumberRelevantStatements: 0, 0.0s ErrorAutomatonConstructionTimeTotal, 0.0s FaulLocalizationTime, NumberStatementsFirstTrace: -1, TraceLengthAvg: 0, 0.0s ErrorAutomatonConstructionTimeAvg, 0.0s ErrorAutomatonDifferenceTimeAvg, 0.0s ErrorAutomatonDifferenceTimeTotal, NumberOfNoEnhancement: 0, NumberOfFiniteEnhancement: 0, NumberOfInfiniteEnhancement: 0 - CounterExampleResult [Line: 610]: a call to reach_error is reachable a call to reach_error is reachable We found a FailurePath: [L24] msg_t nomsg = (msg_t )-1; [L25] port_t cs1 ; [L26] int8_t cs1_old ; [L27] int8_t cs1_new ; [L28] port_t cs2 ; [L29] int8_t cs2_old ; [L30] int8_t cs2_new ; [L31] port_t s1s2 ; [L32] int8_t s1s2_old ; [L33] int8_t s1s2_new ; [L34] port_t s1s1 ; [L35] int8_t s1s1_old ; [L36] int8_t s1s1_new ; [L37] port_t s2s1 ; [L38] int8_t s2s1_old ; [L39] int8_t s2s1_new ; [L40] port_t s2s2 ; [L41] int8_t s2s2_old ; [L42] int8_t s2s2_new ; [L43] port_t s1p ; [L44] int8_t s1p_old ; [L45] int8_t s1p_new ; [L46] port_t s2p ; [L47] int8_t s2p_old ; [L48] int8_t s2p_new ; [L51] _Bool side1Failed ; [L52] _Bool side2Failed ; [L53] msg_t side1_written ; [L54] msg_t side2_written ; [L60] static _Bool side1Failed_History_0 ; [L61] static _Bool side1Failed_History_1 ; [L62] static _Bool side1Failed_History_2 ; [L63] static _Bool side2Failed_History_0 ; [L64] static _Bool side2Failed_History_1 ; [L65] static _Bool side2Failed_History_2 ; [L66] static int8_t active_side_History_0 ; [L67] static int8_t active_side_History_1 ; [L68] static int8_t active_side_History_2 ; [L69] static msg_t manual_selection_History_0 ; [L70] static msg_t manual_selection_History_1 ; [L71] static msg_t manual_selection_History_2 ; VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=0, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L534] int c1 ; [L535] int i2 ; [L538] c1 = 0 [L539] side1Failed = __VERIFIER_nondet_bool() [L540] side2Failed = __VERIFIER_nondet_bool() [L541] side1_written = __VERIFIER_nondet_char() [L542] side2_written = __VERIFIER_nondet_char() [L543] side1Failed_History_0 = __VERIFIER_nondet_bool() [L544] side1Failed_History_1 = __VERIFIER_nondet_bool() [L545] side1Failed_History_2 = __VERIFIER_nondet_bool() [L546] side2Failed_History_0 = __VERIFIER_nondet_bool() [L547] side2Failed_History_1 = __VERIFIER_nondet_bool() [L548] side2Failed_History_2 = __VERIFIER_nondet_bool() [L549] active_side_History_0 = __VERIFIER_nondet_char() [L550] active_side_History_1 = __VERIFIER_nondet_char() [L551] active_side_History_2 = __VERIFIER_nondet_char() [L552] manual_selection_History_0 = __VERIFIER_nondet_char() [L553] manual_selection_History_1 = __VERIFIER_nondet_char() [L554] manual_selection_History_2 = __VERIFIER_nondet_char() [L555] CALL, EXPR init() [L197] COND FALSE !((int )side1Failed_History_0 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=1, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L200] COND FALSE !((int )side2Failed_History_0 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=1, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L203] COND FALSE !((int )active_side_History_0 != -2) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=1, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L206] COND FALSE !((int )manual_selection_History_0 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=1, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L209] COND FALSE !((int )side1Failed_History_1 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=1, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L212] COND FALSE !((int )side2Failed_History_1 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=1, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L215] COND FALSE !((int )active_side_History_1 != -2) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=1, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L218] COND FALSE !((int )manual_selection_History_1 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=1, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L221] COND FALSE !((int )side1Failed_History_2 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=1, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L224] COND FALSE !((int )side2Failed_History_2 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=1, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L227] COND FALSE !((int )active_side_History_2 != -2) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=1, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L230] COND FALSE !((int )manual_selection_History_2 != 0) [L233] return (1); VAL [\result=1, active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=1, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L555] RET, EXPR init() [L555] i2 = init() [L556] CALL assume_abort_if_not(i2) VAL [\old(cond)=1, active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=1, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L58] COND FALSE !(!cond) VAL [\old(cond)=1, active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=1, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L556] RET assume_abort_if_not(i2) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, i2=1, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=1, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L557] cs1_old = nomsg [L558] cs1_new = nomsg [L559] cs2_old = nomsg [L560] cs2_new = nomsg [L561] s1s2_old = nomsg [L562] s1s2_new = nomsg [L563] s1s1_old = nomsg [L564] s1s1_new = nomsg [L565] s2s1_old = nomsg [L566] s2s1_new = nomsg [L567] s2s2_old = nomsg [L568] s2s2_new = nomsg [L569] s1p_old = nomsg [L570] s1p_new = nomsg [L571] s2p_old = nomsg [L572] s2p_new = nomsg [L573] i2 = 0 VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, i2=1, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=1, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L576] CALL Console_task_each_pals_period() [L251] msg_t manual_selection ; [L252] char tmp ; [L255] tmp = __VERIFIER_nondet_char() [L256] manual_selection = tmp [L257] CALL write_manual_selection_history(manual_selection) [L167] manual_selection_History_2 = manual_selection_History_1 [L168] manual_selection_History_1 = manual_selection_History_0 [L169] manual_selection_History_0 = val VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=1, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L257] RET write_manual_selection_history(manual_selection) [L258] cs1_new = manual_selection != nomsg && cs1_new == nomsg ? manual_selection : cs1_new [L259] cs2_new = manual_selection != nomsg && cs2_new == nomsg ? manual_selection : cs2_new [L260] manual_selection = (msg_t )0 VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=127, cs1_old=-1, cs2=0, cs2_new=127, cs2_old=-1, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=1, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L576] RET Console_task_each_pals_period() [L577] CALL Side1_activestandby_task_each_pals_period() [L266] int8_t side1 ; [L267] int8_t side2 ; [L268] msg_t manual_selection ; [L269] int8_t next_state ; [L272] side1 = nomsg [L273] side2 = nomsg [L274] manual_selection = (msg_t )0 [L275] side1Failed = __VERIFIER_nondet_bool() [L276] CALL write_side1_failed_history(side1Failed) [L77] side1Failed_History_2 = side1Failed_History_1 [L78] side1Failed_History_1 = side1Failed_History_0 [L79] side1Failed_History_0 = val VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=127, cs1_old=-1, cs2=0, cs2_new=127, cs2_old=-1, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L276] RET write_side1_failed_history(side1Failed) [L277] COND TRUE \read(side1Failed) [L278] s1s1_new = nomsg != nomsg && s1s1_new == nomsg ? nomsg : s1s1_new [L279] s1s2_new = nomsg != nomsg && s1s2_new == nomsg ? nomsg : s1s2_new [L280] s1p_new = nomsg != nomsg && s1p_new == nomsg ? nomsg : s1p_new [L281] side1_written = nomsg VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=127, cs1_old=-1, cs2=0, cs2_new=127, cs2_old=-1, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L577] RET Side1_activestandby_task_each_pals_period() [L578] CALL Side2_activestandby_task_each_pals_period() [L323] int8_t side1 ; [L324] int8_t side2 ; [L325] msg_t manual_selection ; [L326] int8_t next_state ; [L329] side1 = nomsg [L330] side2 = nomsg [L331] manual_selection = (msg_t )0 [L332] side2Failed = __VERIFIER_nondet_bool() [L333] CALL write_side2_failed_history(side2Failed) [L107] side2Failed_History_2 = side2Failed_History_1 [L108] side2Failed_History_1 = side2Failed_History_0 [L109] side2Failed_History_0 = val VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=127, cs1_old=-1, cs2=0, cs2_new=127, cs2_old=-1, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L333] RET write_side2_failed_history(side2Failed) [L334] COND FALSE !(\read(side2Failed)) [L341] side1 = s1s2_old [L342] s1s2_old = nomsg [L343] side2 = s2s2_old [L344] s2s2_old = nomsg [L345] manual_selection = cs2_old [L346] cs2_old = nomsg VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=127, cs1_old=-1, cs2=0, cs2_new=127, cs2_old=-1, manual_selection=-1, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L347] COND TRUE (int )side1 == (int )side2 [L348] next_state = (int8_t )0 VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=127, cs1_old=-1, cs2=0, cs2_new=127, cs2_old=-1, manual_selection=-1, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, next_state=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L371] s2s1_new = next_state != nomsg && s2s1_new == nomsg ? next_state : s2s1_new [L372] s2s2_new = next_state != nomsg && s2s2_new == nomsg ? next_state : s2s2_new [L373] s2p_new = next_state != nomsg && s2p_new == nomsg ? next_state : s2p_new [L374] side2_written = next_state VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=127, cs1_old=-1, cs2=0, cs2_new=127, cs2_old=-1, manual_selection=-1, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L578] RET Side2_activestandby_task_each_pals_period() [L579] CALL Pendulum_prism_task_each_pals_period() [L380] int8_t active_side ; [L381] int8_t tmp ; [L382] int8_t side1 ; [L383] int8_t side2 ; VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=127, cs1_old=-1, cs2=0, cs2_new=127, cs2_old=-1, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L386] CALL, EXPR read_active_side_history((unsigned char)0) VAL [\old(index)=0, active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=127, cs1_old=-1, cs2=0, cs2_new=127, cs2_old=-1, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L148] COND TRUE (int )index == 0 [L149] return (active_side_History_0); VAL [\old(index)=0, \result=-2, active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=127, cs1_old=-1, cs2=0, cs2_new=127, cs2_old=-1, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L386] RET, EXPR read_active_side_history((unsigned char)0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=127, cs1_old=-1, cs2=0, cs2_new=127, cs2_old=-1, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L386] tmp = read_active_side_history((unsigned char)0) [L387] active_side = tmp [L388] side1 = nomsg [L389] side2 = nomsg [L390] side1 = s1p_old [L391] s1p_old = nomsg [L392] side2 = s2p_old [L393] s2p_old = nomsg VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=127, cs1_old=-1, cs2=0, cs2_new=127, cs2_old=-1, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L394] COND FALSE !((int )side1 == 1) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=127, cs1_old=-1, cs2=0, cs2_new=127, cs2_old=-1, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L397] COND FALSE !((int )side2 == 1) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=127, cs1_old=-1, cs2=0, cs2_new=127, cs2_old=-1, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L400] COND FALSE !((int )side1 == 0) [L407] active_side = (int8_t )0 VAL [active_side=0, active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=127, cs1_old=-1, cs2=0, cs2_new=127, cs2_old=-1, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L409] CALL write_active_side_history(active_side) [L137] active_side_History_2 = active_side_History_1 [L138] active_side_History_1 = active_side_History_0 [L139] active_side_History_0 = val VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=127, cs1_old=-1, cs2=0, cs2_new=127, cs2_old=-1, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L409] RET write_active_side_history(active_side) [L579] RET Pendulum_prism_task_each_pals_period() [L580] cs1_old = cs1_new [L581] cs1_new = nomsg [L582] cs2_old = cs2_new [L583] cs2_new = nomsg [L584] s1s2_old = s1s2_new [L585] s1s2_new = nomsg [L586] s1s1_old = s1s1_new [L587] s1s1_new = nomsg [L588] s2s1_old = s2s1_new [L589] s2s1_new = nomsg [L590] s2s2_old = s2s2_new [L591] s2s2_new = nomsg [L592] s1p_old = s1p_new [L593] s1p_new = nomsg [L594] s2p_old = s2p_new [L595] s2p_new = nomsg [L596] CALL, EXPR check() [L415] int tmp ; [L416] msg_t tmp___0 ; [L417] _Bool tmp___1 ; [L418] _Bool tmp___2 ; [L419] _Bool tmp___3 ; [L420] _Bool tmp___4 ; [L421] int8_t tmp___5 ; [L422] _Bool tmp___6 ; [L423] _Bool tmp___7 ; [L424] _Bool tmp___8 ; [L425] int8_t tmp___9 ; [L426] _Bool tmp___10 ; [L427] _Bool tmp___11 ; [L428] _Bool tmp___12 ; [L429] msg_t tmp___13 ; [L430] _Bool tmp___14 ; [L431] _Bool tmp___15 ; [L432] _Bool tmp___16 ; [L433] _Bool tmp___17 ; [L434] int8_t tmp___18 ; [L435] int8_t tmp___19 ; [L436] int8_t tmp___20 ; VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L439] COND FALSE !(! side1Failed) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L442] COND TRUE ! side2Failed [L443] tmp = 1 VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0, tmp=1] [L447] CALL assume_abort_if_not((_Bool )tmp) VAL [\old(cond)=1, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L58] COND FALSE !(!cond) VAL [\old(cond)=1, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L447] RET assume_abort_if_not((_Bool )tmp) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0, tmp=1] [L448] CALL, EXPR read_manual_selection_history((unsigned char)1) VAL [\old(index)=1, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L178] COND FALSE !((int )index == 0) VAL [\old(index)=1, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, index=1, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L181] COND TRUE (int )index == 1 [L182] return (manual_selection_History_1); VAL [\old(index)=1, \result=0, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L448] RET, EXPR read_manual_selection_history((unsigned char)1) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0, tmp=1] [L448] tmp___0 = read_manual_selection_history((unsigned char)1) [L449] COND TRUE ! tmp___0 VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0, tmp=1] [L450] CALL, EXPR read_side1_failed_history((unsigned char)1) VAL [\old(index)=1, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L88] COND FALSE !((int )index == 0) VAL [\old(index)=1, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, index=1, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L91] COND TRUE (int )index == 1 [L92] return (side1Failed_History_1); VAL [\old(index)=1, \result=0, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L450] RET, EXPR read_side1_failed_history((unsigned char)1) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0, tmp=1] [L450] tmp___1 = read_side1_failed_history((unsigned char)1) [L451] COND TRUE ! tmp___1 VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0, tmp=1] [L452] CALL, EXPR read_side1_failed_history((unsigned char)0) VAL [\old(index)=0, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L88] COND TRUE (int )index == 0 [L89] return (side1Failed_History_0); VAL [\old(index)=0, \result=1, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L452] RET, EXPR read_side1_failed_history((unsigned char)0) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0, tmp=1] [L452] tmp___2 = read_side1_failed_history((unsigned char)0) [L453] COND FALSE !(! tmp___2) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0, tmp=1] [L478] CALL, EXPR read_side1_failed_history((unsigned char)1) VAL [\old(index)=1, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L88] COND FALSE !((int )index == 0) VAL [\old(index)=1, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, index=1, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L91] COND TRUE (int )index == 1 [L92] return (side1Failed_History_1); VAL [\old(index)=1, \result=0, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L478] RET, EXPR read_side1_failed_history((unsigned char)1) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0, tmp=1] [L478] tmp___7 = read_side1_failed_history((unsigned char)1) [L479] COND FALSE !(\read(tmp___7)) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0, tmp=1] [L494] CALL, EXPR read_side1_failed_history((unsigned char)1) VAL [\old(index)=1, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L88] COND FALSE !((int )index == 0) VAL [\old(index)=1, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, index=1, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L91] COND TRUE (int )index == 1 [L92] return (side1Failed_History_1); VAL [\old(index)=1, \result=0, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L494] RET, EXPR read_side1_failed_history((unsigned char)1) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0, tmp=1] [L494] tmp___11 = read_side1_failed_history((unsigned char)1) [L495] COND TRUE ! tmp___11 VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0, tmp=1] [L496] CALL, EXPR read_side2_failed_history((unsigned char)1) VAL [\old(index)=1, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L118] COND FALSE !((int )index == 0) VAL [\old(index)=1, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, index=1, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L121] COND TRUE (int )index == 1 [L122] return (side2Failed_History_1); VAL [\old(index)=1, \result=0, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L496] RET, EXPR read_side2_failed_history((unsigned char)1) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0, tmp=1] [L496] tmp___12 = read_side2_failed_history((unsigned char)1) [L497] COND FALSE !(\read(tmp___12)) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0, tmp=1] [L510] CALL, EXPR read_active_side_history((unsigned char)2) VAL [\old(index)=2, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L148] COND FALSE !((int )index == 0) VAL [\old(index)=2, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, index=2, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L151] COND FALSE !((int )index == 1) VAL [\old(index)=2, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, index=2, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L154] COND TRUE (int )index == 2 [L155] return (active_side_History_2); VAL [\old(index)=2, \result=-2, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L510] RET, EXPR read_active_side_history((unsigned char)2) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0, tmp=1] [L510] tmp___20 = read_active_side_history((unsigned char)2) [L511] COND FALSE !((int )tmp___20 > -2) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0, tmp=1] [L529] return (1); VAL [\result=1, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0, tmp=1] [L596] RET, EXPR check() [L596] c1 = check() [L597] CALL assert(c1) VAL [\old(arg)=1, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L608] COND FALSE !(! arg) VAL [\old(arg)=1, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L597] RET assert(c1) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, c1=1, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, i2=1, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L576] CALL Console_task_each_pals_period() [L251] msg_t manual_selection ; [L252] char tmp ; [L255] tmp = __VERIFIER_nondet_char() [L256] manual_selection = tmp [L257] CALL write_manual_selection_history(manual_selection) [L167] manual_selection_History_2 = manual_selection_History_1 [L168] manual_selection_History_1 = manual_selection_History_0 [L169] manual_selection_History_0 = val VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, manual_selection_History_0=0, manual_selection_History_1=127, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L257] RET write_manual_selection_history(manual_selection) [L258] cs1_new = manual_selection != nomsg && cs1_new == nomsg ? manual_selection : cs1_new [L259] cs2_new = manual_selection != nomsg && cs2_new == nomsg ? manual_selection : cs2_new [L260] manual_selection = (msg_t )0 VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=127, cs2=0, cs2_new=0, cs2_old=127, manual_selection_History_0=0, manual_selection_History_1=127, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L576] RET Console_task_each_pals_period() [L577] CALL Side1_activestandby_task_each_pals_period() [L266] int8_t side1 ; [L267] int8_t side2 ; [L268] msg_t manual_selection ; [L269] int8_t next_state ; [L272] side1 = nomsg [L273] side2 = nomsg [L274] manual_selection = (msg_t )0 [L275] side1Failed = __VERIFIER_nondet_bool() [L276] CALL write_side1_failed_history(side1Failed) [L77] side1Failed_History_2 = side1Failed_History_1 [L78] side1Failed_History_1 = side1Failed_History_0 [L79] side1Failed_History_0 = val VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=127, cs2=0, cs2_new=0, cs2_old=127, manual_selection_History_0=0, manual_selection_History_1=127, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L276] RET write_side1_failed_history(side1Failed) [L277] COND FALSE !(\read(side1Failed)) [L284] side1 = s1s1_old [L285] s1s1_old = nomsg [L286] side2 = s2s1_old [L287] s2s1_old = nomsg [L288] manual_selection = cs1_old [L289] cs1_old = nomsg VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=-1, cs2=0, cs2_new=0, cs2_old=127, manual_selection=127, manual_selection_History_0=0, manual_selection_History_1=127, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=-1, side2=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L290] COND FALSE !((int )side1 == (int )side2) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=-1, cs2=0, cs2_new=0, cs2_old=127, manual_selection=127, manual_selection_History_0=0, manual_selection_History_1=127, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=-1, side2=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L293] COND TRUE (int )side1 == (int )nomsg VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=-1, cs2=0, cs2_new=0, cs2_old=127, manual_selection=127, manual_selection_History_0=0, manual_selection_History_1=127, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=-1, side2=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L294] COND TRUE (int )side2 != (int )nomsg [L295] next_state = (int8_t )0 VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=-1, cs2=0, cs2_new=0, cs2_old=127, manual_selection=127, manual_selection_History_0=0, manual_selection_History_1=127, manual_selection_History_2=0, next_state=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L314] s1s1_new = next_state != nomsg && s1s1_new == nomsg ? next_state : s1s1_new [L315] s1s2_new = next_state != nomsg && s1s2_new == nomsg ? next_state : s1s2_new [L316] s1p_new = next_state != nomsg && s1p_new == nomsg ? next_state : s1p_new [L317] side1_written = next_state VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=-1, cs2=0, cs2_new=0, cs2_old=127, manual_selection=127, manual_selection_History_0=0, manual_selection_History_1=127, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L577] RET Side1_activestandby_task_each_pals_period() [L578] CALL Side2_activestandby_task_each_pals_period() [L323] int8_t side1 ; [L324] int8_t side2 ; [L325] msg_t manual_selection ; [L326] int8_t next_state ; [L329] side1 = nomsg [L330] side2 = nomsg [L331] manual_selection = (msg_t )0 [L332] side2Failed = __VERIFIER_nondet_bool() [L333] CALL write_side2_failed_history(side2Failed) [L107] side2Failed_History_2 = side2Failed_History_1 [L108] side2Failed_History_1 = side2Failed_History_0 [L109] side2Failed_History_0 = val VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=-1, cs2=0, cs2_new=0, cs2_old=127, manual_selection_History_0=0, manual_selection_History_1=127, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L333] RET write_side2_failed_history(side2Failed) [L334] COND TRUE \read(side2Failed) [L335] s2s1_new = nomsg != nomsg && s2s1_new == nomsg ? nomsg : s2s1_new [L336] s2s2_new = nomsg != nomsg && s2s2_new == nomsg ? nomsg : s2s2_new [L337] s2p_new = nomsg != nomsg && s2p_new == nomsg ? nomsg : s2p_new [L338] side2_written = nomsg VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=-1, cs2=0, cs2_new=0, cs2_old=127, manual_selection_History_0=0, manual_selection_History_1=127, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=-1] [L578] RET Side2_activestandby_task_each_pals_period() [L579] CALL Pendulum_prism_task_each_pals_period() [L380] int8_t active_side ; [L381] int8_t tmp ; [L382] int8_t side1 ; [L383] int8_t side2 ; VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=-1, cs2=0, cs2_new=0, cs2_old=127, manual_selection_History_0=0, manual_selection_History_1=127, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=-1] [L386] CALL, EXPR read_active_side_history((unsigned char)0) VAL [\old(index)=0, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=-1, cs2=0, cs2_new=0, cs2_old=127, manual_selection_History_0=0, manual_selection_History_1=127, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=-1] [L148] COND TRUE (int )index == 0 [L149] return (active_side_History_0); VAL [\old(index)=0, \result=0, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=-1, cs2=0, cs2_new=0, cs2_old=127, manual_selection_History_0=0, manual_selection_History_1=127, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=-1] [L386] RET, EXPR read_active_side_history((unsigned char)0) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=-1, cs2=0, cs2_new=0, cs2_old=127, manual_selection_History_0=0, manual_selection_History_1=127, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=-1] [L386] tmp = read_active_side_history((unsigned char)0) [L387] active_side = tmp [L388] side1 = nomsg [L389] side2 = nomsg [L390] side1 = s1p_old [L391] s1p_old = nomsg [L392] side2 = s2p_old [L393] s2p_old = nomsg VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=-1, cs2=0, cs2_new=0, cs2_old=127, manual_selection_History_0=0, manual_selection_History_1=127, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=0, side2=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=-1] [L394] COND FALSE !((int )side1 == 1) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=-1, cs2=0, cs2_new=0, cs2_old=127, manual_selection_History_0=0, manual_selection_History_1=127, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=0, side2=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=-1] [L397] COND FALSE !((int )side2 == 1) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=-1, cs2=0, cs2_new=0, cs2_old=127, manual_selection_History_0=0, manual_selection_History_1=127, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=0, side2=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=-1] [L400] COND FALSE !((int )side1 == 0) [L407] active_side = (int8_t )0 VAL [active_side=0, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=-1, cs2=0, cs2_new=0, cs2_old=127, manual_selection_History_0=0, manual_selection_History_1=127, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=0, side2=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=-1] [L409] CALL write_active_side_history(active_side) [L137] active_side_History_2 = active_side_History_1 [L138] active_side_History_1 = active_side_History_0 [L139] active_side_History_0 = val VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=-1, cs2=0, cs2_new=0, cs2_old=127, manual_selection_History_0=0, manual_selection_History_1=127, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=-1] [L409] RET write_active_side_history(active_side) [L579] RET Pendulum_prism_task_each_pals_period() [L580] cs1_old = cs1_new [L581] cs1_new = nomsg [L582] cs2_old = cs2_new [L583] cs2_new = nomsg [L584] s1s2_old = s1s2_new [L585] s1s2_new = nomsg [L586] s1s1_old = s1s1_new [L587] s1s1_new = nomsg [L588] s2s1_old = s2s1_new [L589] s2s1_new = nomsg [L590] s2s2_old = s2s2_new [L591] s2s2_new = nomsg [L592] s1p_old = s1p_new [L593] s1p_new = nomsg [L594] s2p_old = s2p_new [L595] s2p_new = nomsg [L596] CALL, EXPR check() [L415] int tmp ; [L416] msg_t tmp___0 ; [L417] _Bool tmp___1 ; [L418] _Bool tmp___2 ; [L419] _Bool tmp___3 ; [L420] _Bool tmp___4 ; [L421] int8_t tmp___5 ; [L422] _Bool tmp___6 ; [L423] _Bool tmp___7 ; [L424] _Bool tmp___8 ; [L425] int8_t tmp___9 ; [L426] _Bool tmp___10 ; [L427] _Bool tmp___11 ; [L428] _Bool tmp___12 ; [L429] msg_t tmp___13 ; [L430] _Bool tmp___14 ; [L431] _Bool tmp___15 ; [L432] _Bool tmp___16 ; [L433] _Bool tmp___17 ; [L434] int8_t tmp___18 ; [L435] int8_t tmp___19 ; [L436] int8_t tmp___20 ; VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=0, cs2=0, cs2_new=-1, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=127, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=-1] [L439] COND TRUE ! side1Failed [L440] tmp = 1 VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=0, cs2=0, cs2_new=-1, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=127, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=-1, tmp=1] [L447] CALL assume_abort_if_not((_Bool )tmp) VAL [\old(cond)=1, active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=0, cs2=0, cs2_new=-1, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=127, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=-1] [L58] COND FALSE !(!cond) VAL [\old(cond)=1, active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=0, cs2=0, cs2_new=-1, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=127, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=-1] [L447] RET assume_abort_if_not((_Bool )tmp) VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=0, cs2=0, cs2_new=-1, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=127, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=-1, tmp=1] [L448] CALL, EXPR read_manual_selection_history((unsigned char)1) VAL [\old(index)=1, active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=0, cs2=0, cs2_new=-1, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=127, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=-1] [L178] COND FALSE !((int )index == 0) VAL [\old(index)=1, active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=0, cs2=0, cs2_new=-1, cs2_old=0, index=1, manual_selection_History_0=0, manual_selection_History_1=127, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=-1] [L181] COND TRUE (int )index == 1 [L182] return (manual_selection_History_1); VAL [\old(index)=1, \result=127, active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=0, cs2=0, cs2_new=-1, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=127, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=-1] [L448] RET, EXPR read_manual_selection_history((unsigned char)1) VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=0, cs2=0, cs2_new=-1, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=127, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=-1, tmp=1] [L448] tmp___0 = read_manual_selection_history((unsigned char)1) [L449] COND FALSE !(! tmp___0) VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=0, cs2=0, cs2_new=-1, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=127, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=-1, tmp=1] [L478] CALL, EXPR read_side1_failed_history((unsigned char)1) VAL [\old(index)=1, active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=0, cs2=0, cs2_new=-1, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=127, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=-1] [L88] COND FALSE !((int )index == 0) VAL [\old(index)=1, active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=0, cs2=0, cs2_new=-1, cs2_old=0, index=1, manual_selection_History_0=0, manual_selection_History_1=127, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=-1] [L91] COND TRUE (int )index == 1 [L92] return (side1Failed_History_1); VAL [\old(index)=1, \result=1, active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=0, cs2=0, cs2_new=-1, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=127, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=-1] [L478] RET, EXPR read_side1_failed_history((unsigned char)1) VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=0, cs2=0, cs2_new=-1, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=127, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=-1, tmp=1] [L478] tmp___7 = read_side1_failed_history((unsigned char)1) [L479] COND TRUE \read(tmp___7) VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=0, cs2=0, cs2_new=-1, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=127, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=-1, tmp=1] [L480] CALL, EXPR read_side2_failed_history((unsigned char)1) VAL [\old(index)=1, active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=0, cs2=0, cs2_new=-1, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=127, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=-1] [L118] COND FALSE !((int )index == 0) VAL [\old(index)=1, active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=0, cs2=0, cs2_new=-1, cs2_old=0, index=1, manual_selection_History_0=0, manual_selection_History_1=127, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=-1] [L121] COND TRUE (int )index == 1 [L122] return (side2Failed_History_1); VAL [\old(index)=1, \result=0, active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=0, cs2=0, cs2_new=-1, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=127, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=-1] [L480] RET, EXPR read_side2_failed_history((unsigned char)1) VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=0, cs2=0, cs2_new=-1, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=127, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=-1, tmp=1] [L480] tmp___8 = read_side2_failed_history((unsigned char)1) [L481] COND TRUE ! tmp___8 VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=0, cs2=0, cs2_new=-1, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=127, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=-1, tmp=1] [L482] CALL, EXPR read_active_side_history((unsigned char)0) VAL [\old(index)=0, active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=0, cs2=0, cs2_new=-1, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=127, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=-1] [L148] COND TRUE (int )index == 0 [L149] return (active_side_History_0); VAL [\old(index)=0, \result=0, active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=0, cs2=0, cs2_new=-1, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=127, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=-1] [L482] RET, EXPR read_active_side_history((unsigned char)0) VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=0, cs2=0, cs2_new=-1, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=127, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=-1, tmp=1] [L482] tmp___5 = read_active_side_history((unsigned char)0) [L483] COND TRUE ! ((int )tmp___5 == 2) [L484] return (0); VAL [\result=0, active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=0, cs2=0, cs2_new=-1, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=127, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=-1, tmp=1] [L596] RET, EXPR check() [L596] c1 = check() [L597] CALL assert(c1) VAL [\old(arg)=0, active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=0, cs2=0, cs2_new=-1, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=127, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=-1] [L608] COND TRUE ! arg VAL [\old(arg)=0, active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=0, cs2=0, cs2_new=-1, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=127, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=-1] [L610] reach_error() VAL [\old(arg)=0, active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=0, cs2=0, cs2_new=-1, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=127, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=-1] - StatisticsResult: Ultimate Automizer benchmark data CFG has 8 procedures, 178 locations, 1 error locations. Started 1 CEGAR loops. OverallTime: 90.0s, OverallIterations: 36, TraceHistogramMax: 5, PathProgramHistogramMax: 1, EmptinessCheckTime: 0.1s, AutomataDifference: 43.6s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, HoareTripleCheckerStatistics: 0 mSolverCounterUnknown, 16240 SdHoareTripleChecker+Valid, 14.8s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 16179 mSDsluCounter, 59677 SdHoareTripleChecker+Invalid, 12.6s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 0 IncrementalHoareTripleChecker+Unchecked, 48403 mSDsCounter, 4413 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 14824 IncrementalHoareTripleChecker+Invalid, 19237 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 4413 mSolverCounterUnsat, 11274 mSDtfsCounter, 14824 mSolverCounterSat, 0.4s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Unknown, PredicateUnifierStatistics: 0 DeclaredPredicates, 3076 GetRequests, 2544 SyntacticMatches, 0 SemanticMatches, 532 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9248 ImplicationChecksByTransitivity, 11.6s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=12390occurred in iteration=35, InterpolantAutomatonStates: 428, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 18.5s AutomataMinimizationTime, 35 MinimizatonAttempts, 18699 StatesRemovedByMinimization, 26 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.7s SsaConstructionTime, 2.5s SatisfiabilityAnalysisTime, 20.3s InterpolantComputationTime, 4971 NumberOfCodeBlocks, 4971 NumberOfCodeBlocksAsserted, 45 NumberOfCheckSat, 5857 ConstructedInterpolants, 0 QuantifiedInterpolants, 16466 SizeOfPredicates, 31 NumberOfNonLiveVariables, 6633 ConjunctsInSsa, 264 ConjunctsInUnsatCore, 51 InterpolantComputations, 28 PerfectInterpolantSequences, 2121/2343 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available, ConComCheckerStatistics: No data available RESULT: Ultimate proved your program to be incorrect! [2024-11-28 02:34:58,908 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_58ef54d4-00f4-4eef-9b59-4b85557f99bb/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Forceful destruction successful, exit code 0 Received shutdown request... --- End real Ultimate output --- Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE