./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/combinations/pc_sfifo_3.cil+token_ring.01.cil-2.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version d790fecc Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4d5c9a20-2d38-4680-bc84-99c8d1b727a2/bin/uautomizer-verify-aQ6SnzHsRB/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4d5c9a20-2d38-4680-bc84-99c8d1b727a2/bin/uautomizer-verify-aQ6SnzHsRB/plugins/org.eclipse.equinox.launcher_1.6.800.v20240513-1750.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4d5c9a20-2d38-4680-bc84-99c8d1b727a2/bin/uautomizer-verify-aQ6SnzHsRB/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4d5c9a20-2d38-4680-bc84-99c8d1b727a2/bin/uautomizer-verify-aQ6SnzHsRB/config/AutomizerReach.xml -i ../../sv-benchmarks/c/combinations/pc_sfifo_3.cil+token_ring.01.cil-2.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4d5c9a20-2d38-4680-bc84-99c8d1b727a2/bin/uautomizer-verify-aQ6SnzHsRB/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4d5c9a20-2d38-4680-bc84-99c8d1b727a2/bin/uautomizer-verify-aQ6SnzHsRB --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 41c8a8bc6e14c971558b90999312edb800c79ff966f34c4894803ada36cfe43c --- Real Ultimate output --- This is Ultimate 0.3.0-dev-d790fec [2024-11-28 02:53:30,983 INFO L188 SettingsManager]: Resetting all preferences to default values... [2024-11-28 02:53:31,071 INFO L114 SettingsManager]: Loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4d5c9a20-2d38-4680-bc84-99c8d1b727a2/bin/uautomizer-verify-aQ6SnzHsRB/config/svcomp-Reach-32bit-Automizer_Default.epf [2024-11-28 02:53:31,077 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2024-11-28 02:53:31,078 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2024-11-28 02:53:31,101 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2024-11-28 02:53:31,102 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2024-11-28 02:53:31,102 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2024-11-28 02:53:31,103 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2024-11-28 02:53:31,103 INFO L153 SettingsManager]: * Use memory slicer=true [2024-11-28 02:53:31,103 INFO L151 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2024-11-28 02:53:31,103 INFO L153 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2024-11-28 02:53:31,103 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2024-11-28 02:53:31,104 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2024-11-28 02:53:31,104 INFO L153 SettingsManager]: * Use SBE=true [2024-11-28 02:53:31,104 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2024-11-28 02:53:31,104 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2024-11-28 02:53:31,104 INFO L153 SettingsManager]: * sizeof long=4 [2024-11-28 02:53:31,104 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2024-11-28 02:53:31,104 INFO L153 SettingsManager]: * sizeof POINTER=4 [2024-11-28 02:53:31,104 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2024-11-28 02:53:31,105 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2024-11-28 02:53:31,105 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2024-11-28 02:53:31,105 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2024-11-28 02:53:31,105 INFO L153 SettingsManager]: * sizeof long double=12 [2024-11-28 02:53:31,105 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2024-11-28 02:53:31,105 INFO L153 SettingsManager]: * Behaviour of calls to undefined functions=OVERAPPROXIMATE_BEHAVIOUR [2024-11-28 02:53:31,105 INFO L153 SettingsManager]: * Use constant arrays=true [2024-11-28 02:53:31,105 INFO L151 SettingsManager]: Preferences of IcfgBuilder differ from their defaults: [2024-11-28 02:53:31,105 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-11-28 02:53:31,106 INFO L153 SettingsManager]: * Only consider context switches at boundaries of atomic blocks=true [2024-11-28 02:53:31,106 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2024-11-28 02:53:31,106 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2024-11-28 02:53:31,106 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2024-11-28 02:53:31,106 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-11-28 02:53:31,106 INFO L153 SettingsManager]: * Only consider context switches at boundaries of atomic blocks=true [2024-11-28 02:53:31,106 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2024-11-28 02:53:31,107 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2024-11-28 02:53:31,107 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2024-11-28 02:53:31,107 INFO L153 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2024-11-28 02:53:31,107 INFO L153 SettingsManager]: * Compute procedure contracts=false [2024-11-28 02:53:31,107 INFO L153 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopHeads [2024-11-28 02:53:31,107 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2024-11-28 02:53:31,107 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2024-11-28 02:53:31,107 INFO L153 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false [2024-11-28 02:53:31,108 INFO L153 SettingsManager]: * Automaton type used in concurrency analysis=PETRI_NET [2024-11-28 02:53:31,108 INFO L153 SettingsManager]: * Order on configurations for Petri net unfoldings=DBO [2024-11-28 02:53:31,108 INFO L153 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2024-11-28 02:53:31,108 INFO L153 SettingsManager]: * Looper check in Petri net analysis=SEMANTIC Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4d5c9a20-2d38-4680-bc84-99c8d1b727a2/bin/uautomizer-verify-aQ6SnzHsRB Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 41c8a8bc6e14c971558b90999312edb800c79ff966f34c4894803ada36cfe43c [2024-11-28 02:53:31,405 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2024-11-28 02:53:31,417 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2024-11-28 02:53:31,420 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2024-11-28 02:53:31,422 INFO L270 PluginConnector]: Initializing CDTParser... [2024-11-28 02:53:31,423 INFO L274 PluginConnector]: CDTParser initialized [2024-11-28 02:53:31,424 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4d5c9a20-2d38-4680-bc84-99c8d1b727a2/bin/uautomizer-verify-aQ6SnzHsRB/../../sv-benchmarks/c/combinations/pc_sfifo_3.cil+token_ring.01.cil-2.c [2024-11-28 02:53:34,296 INFO L533 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4d5c9a20-2d38-4680-bc84-99c8d1b727a2/bin/uautomizer-verify-aQ6SnzHsRB/data/687b751f2/855f37fb7dc249baa64b9a8a2a51b713/FLAG62aebc2d3 [2024-11-28 02:53:34,574 INFO L384 CDTParser]: Found 1 translation units. [2024-11-28 02:53:34,575 INFO L180 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4d5c9a20-2d38-4680-bc84-99c8d1b727a2/sv-benchmarks/c/combinations/pc_sfifo_3.cil+token_ring.01.cil-2.c [2024-11-28 02:53:34,591 INFO L427 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4d5c9a20-2d38-4680-bc84-99c8d1b727a2/bin/uautomizer-verify-aQ6SnzHsRB/data/687b751f2/855f37fb7dc249baa64b9a8a2a51b713/FLAG62aebc2d3 [2024-11-28 02:53:34,849 INFO L435 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4d5c9a20-2d38-4680-bc84-99c8d1b727a2/bin/uautomizer-verify-aQ6SnzHsRB/data/687b751f2/855f37fb7dc249baa64b9a8a2a51b713 [2024-11-28 02:53:34,852 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2024-11-28 02:53:34,857 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2024-11-28 02:53:34,859 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2024-11-28 02:53:34,859 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2024-11-28 02:53:34,863 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2024-11-28 02:53:34,864 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.11 02:53:34" (1/1) ... [2024-11-28 02:53:34,865 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@426157f6 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 02:53:34, skipping insertion in model container [2024-11-28 02:53:34,865 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.11 02:53:34" (1/1) ... [2024-11-28 02:53:34,896 INFO L175 MainTranslator]: Built tables and reachable declarations [2024-11-28 02:53:35,032 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4d5c9a20-2d38-4680-bc84-99c8d1b727a2/sv-benchmarks/c/combinations/pc_sfifo_3.cil+token_ring.01.cil-2.c[911,924] [2024-11-28 02:53:35,109 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4d5c9a20-2d38-4680-bc84-99c8d1b727a2/sv-benchmarks/c/combinations/pc_sfifo_3.cil+token_ring.01.cil-2.c[8416,8429] [2024-11-28 02:53:35,137 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-11-28 02:53:35,148 INFO L200 MainTranslator]: Completed pre-run [2024-11-28 02:53:35,158 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4d5c9a20-2d38-4680-bc84-99c8d1b727a2/sv-benchmarks/c/combinations/pc_sfifo_3.cil+token_ring.01.cil-2.c[911,924] [2024-11-28 02:53:35,183 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4d5c9a20-2d38-4680-bc84-99c8d1b727a2/sv-benchmarks/c/combinations/pc_sfifo_3.cil+token_ring.01.cil-2.c[8416,8429] [2024-11-28 02:53:35,203 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-11-28 02:53:35,223 INFO L204 MainTranslator]: Completed translation [2024-11-28 02:53:35,223 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 02:53:35 WrapperNode [2024-11-28 02:53:35,224 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2024-11-28 02:53:35,225 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2024-11-28 02:53:35,225 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2024-11-28 02:53:35,225 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2024-11-28 02:53:35,232 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 02:53:35" (1/1) ... [2024-11-28 02:53:35,240 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 02:53:35" (1/1) ... [2024-11-28 02:53:35,267 INFO L138 Inliner]: procedures = 57, calls = 65, calls flagged for inlining = 25, calls inlined = 25, statements flattened = 444 [2024-11-28 02:53:35,268 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2024-11-28 02:53:35,269 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2024-11-28 02:53:35,269 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2024-11-28 02:53:35,269 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2024-11-28 02:53:35,278 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 02:53:35" (1/1) ... [2024-11-28 02:53:35,278 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 02:53:35" (1/1) ... [2024-11-28 02:53:35,281 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 02:53:35" (1/1) ... [2024-11-28 02:53:35,299 INFO L175 MemorySlicer]: Split 2 memory accesses to 1 slices as follows [2]. 100 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2]. The 0 writes are split as follows [0]. [2024-11-28 02:53:35,299 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 02:53:35" (1/1) ... [2024-11-28 02:53:35,300 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 02:53:35" (1/1) ... [2024-11-28 02:53:35,311 INFO L184 PluginConnector]: Executing the observer ReplaceArrayAssignments from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 02:53:35" (1/1) ... [2024-11-28 02:53:35,316 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 02:53:35" (1/1) ... [2024-11-28 02:53:35,330 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 02:53:35" (1/1) ... [2024-11-28 02:53:35,333 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 02:53:35" (1/1) ... [2024-11-28 02:53:35,335 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 02:53:35" (1/1) ... [2024-11-28 02:53:35,338 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2024-11-28 02:53:35,339 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2024-11-28 02:53:35,339 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2024-11-28 02:53:35,339 INFO L274 PluginConnector]: RCFGBuilder initialized [2024-11-28 02:53:35,341 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 02:53:35" (1/1) ... [2024-11-28 02:53:35,346 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2024-11-28 02:53:35,361 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4d5c9a20-2d38-4680-bc84-99c8d1b727a2/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 02:53:35,374 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4d5c9a20-2d38-4680-bc84-99c8d1b727a2/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (exit command is (exit), workingDir is null) [2024-11-28 02:53:35,382 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4d5c9a20-2d38-4680-bc84-99c8d1b727a2/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Waiting until timeout for monitored process [2024-11-28 02:53:35,410 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2024-11-28 02:53:35,410 INFO L130 BoogieDeclarations]: Found specification of procedure immediate_notify [2024-11-28 02:53:35,410 INFO L138 BoogieDeclarations]: Found implementation of procedure immediate_notify [2024-11-28 02:53:35,410 INFO L130 BoogieDeclarations]: Found specification of procedure is_do_write_p_triggered [2024-11-28 02:53:35,410 INFO L138 BoogieDeclarations]: Found implementation of procedure is_do_write_p_triggered [2024-11-28 02:53:35,410 INFO L130 BoogieDeclarations]: Found specification of procedure exists_runnable_thread1 [2024-11-28 02:53:35,410 INFO L138 BoogieDeclarations]: Found implementation of procedure exists_runnable_thread1 [2024-11-28 02:53:35,410 INFO L130 BoogieDeclarations]: Found specification of procedure exists_runnable_thread2 [2024-11-28 02:53:35,411 INFO L138 BoogieDeclarations]: Found implementation of procedure exists_runnable_thread2 [2024-11-28 02:53:35,411 INFO L130 BoogieDeclarations]: Found specification of procedure reset_delta_events1 [2024-11-28 02:53:35,411 INFO L138 BoogieDeclarations]: Found implementation of procedure reset_delta_events1 [2024-11-28 02:53:35,411 INFO L130 BoogieDeclarations]: Found specification of procedure reset_delta_events2 [2024-11-28 02:53:35,411 INFO L138 BoogieDeclarations]: Found implementation of procedure reset_delta_events2 [2024-11-28 02:53:35,411 INFO L130 BoogieDeclarations]: Found specification of procedure activate_threads2 [2024-11-28 02:53:35,412 INFO L138 BoogieDeclarations]: Found implementation of procedure activate_threads2 [2024-11-28 02:53:35,412 INFO L130 BoogieDeclarations]: Found specification of procedure activate_threads1 [2024-11-28 02:53:35,412 INFO L138 BoogieDeclarations]: Found implementation of procedure activate_threads1 [2024-11-28 02:53:35,413 INFO L130 BoogieDeclarations]: Found specification of procedure is_do_read_c_triggered [2024-11-28 02:53:35,413 INFO L138 BoogieDeclarations]: Found implementation of procedure is_do_read_c_triggered [2024-11-28 02:53:35,413 INFO L130 BoogieDeclarations]: Found specification of procedure update_channels1 [2024-11-28 02:53:35,413 INFO L138 BoogieDeclarations]: Found implementation of procedure update_channels1 [2024-11-28 02:53:35,413 INFO L130 BoogieDeclarations]: Found specification of procedure update_channels2 [2024-11-28 02:53:35,413 INFO L138 BoogieDeclarations]: Found implementation of procedure update_channels2 [2024-11-28 02:53:35,413 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#0 [2024-11-28 02:53:35,413 INFO L130 BoogieDeclarations]: Found specification of procedure fire_delta_events2 [2024-11-28 02:53:35,416 INFO L138 BoogieDeclarations]: Found implementation of procedure fire_delta_events2 [2024-11-28 02:53:35,416 INFO L130 BoogieDeclarations]: Found specification of procedure fire_delta_events1 [2024-11-28 02:53:35,416 INFO L138 BoogieDeclarations]: Found implementation of procedure fire_delta_events1 [2024-11-28 02:53:35,416 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2024-11-28 02:53:35,416 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2024-11-28 02:53:35,416 INFO L130 BoogieDeclarations]: Found specification of procedure error1 [2024-11-28 02:53:35,416 INFO L138 BoogieDeclarations]: Found implementation of procedure error1 [2024-11-28 02:53:35,416 INFO L130 BoogieDeclarations]: Found specification of procedure error2 [2024-11-28 02:53:35,416 INFO L138 BoogieDeclarations]: Found implementation of procedure error2 [2024-11-28 02:53:35,510 INFO L234 CfgBuilder]: Building ICFG [2024-11-28 02:53:35,512 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2024-11-28 02:53:36,040 INFO L727 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##56: assume !(1 == ~q_free~0); [2024-11-28 02:53:36,040 INFO L727 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##55: assume 1 == ~q_free~0;~c_dr_st~0 := 2;~c_dr_pc~0 := 2;~a_t~0 := do_read_c_~a~0#1; [2024-11-28 02:53:36,157 INFO L? ?]: Removed 68 outVars from TransFormulas that were not future-live. [2024-11-28 02:53:36,158 INFO L283 CfgBuilder]: Performing block encoding [2024-11-28 02:53:36,173 INFO L307 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2024-11-28 02:53:36,173 INFO L312 CfgBuilder]: Removed 16 assume(true) statements. [2024-11-28 02:53:36,173 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.11 02:53:36 BoogieIcfgContainer [2024-11-28 02:53:36,173 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2024-11-28 02:53:36,176 INFO L112 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2024-11-28 02:53:36,176 INFO L270 PluginConnector]: Initializing TraceAbstraction... [2024-11-28 02:53:36,209 INFO L274 PluginConnector]: TraceAbstraction initialized [2024-11-28 02:53:36,209 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 28.11 02:53:34" (1/3) ... [2024-11-28 02:53:36,210 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@5fcbcf25 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.11 02:53:36, skipping insertion in model container [2024-11-28 02:53:36,210 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 02:53:35" (2/3) ... [2024-11-28 02:53:36,210 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@5fcbcf25 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.11 02:53:36, skipping insertion in model container [2024-11-28 02:53:36,210 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.11 02:53:36" (3/3) ... [2024-11-28 02:53:36,212 INFO L128 eAbstractionObserver]: Analyzing ICFG pc_sfifo_3.cil+token_ring.01.cil-2.c [2024-11-28 02:53:36,229 INFO L216 ceAbstractionStarter]: Automizer settings: Hoare:LoopHeads NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2024-11-28 02:53:36,230 INFO L151 ceAbstractionStarter]: Applying trace abstraction to ICFG pc_sfifo_3.cil+token_ring.01.cil-2.c that has 16 procedures, 226 locations, 1 initial locations, 8 loop locations, and 2 error locations. [2024-11-28 02:53:36,302 INFO L332 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2024-11-28 02:53:36,318 INFO L333 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mAutomataTypeConcurrency=PETRI_NET, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopHeads, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@6daf1b30, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2024-11-28 02:53:36,318 INFO L334 AbstractCegarLoop]: Starting to check reachability of 2 error locations. [2024-11-28 02:53:36,324 INFO L276 IsEmpty]: Start isEmpty. Operand has 226 states, 177 states have (on average 1.5480225988700564) internal successors, (274), 183 states have internal predecessors, (274), 33 states have call successors, (33), 15 states have call predecessors, (33), 15 states have return successors, (33), 31 states have call predecessors, (33), 33 states have call successors, (33) [2024-11-28 02:53:36,336 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2024-11-28 02:53:36,338 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 02:53:36,339 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 02:53:36,339 INFO L396 AbstractCegarLoop]: === Iteration 1 === Targeting error2Err0ASSERT_VIOLATIONERROR_FUNCTION === [error1Err0ASSERT_VIOLATIONERROR_FUNCTION, error2Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 02:53:36,345 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 02:53:36,345 INFO L85 PathProgramCache]: Analyzing trace with hash 801190010, now seen corresponding path program 1 times [2024-11-28 02:53:36,353 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 02:53:36,353 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [696507258] [2024-11-28 02:53:36,354 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:53:36,355 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 02:53:36,485 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 02:53:36,841 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-28 02:53:36,842 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 02:53:36,842 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [696507258] [2024-11-28 02:53:36,843 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [696507258] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 02:53:36,843 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 02:53:36,843 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-28 02:53:36,844 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1806697510] [2024-11-28 02:53:36,845 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 02:53:36,848 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-28 02:53:36,849 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 02:53:36,871 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-28 02:53:36,872 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-11-28 02:53:36,874 INFO L87 Difference]: Start difference. First operand has 226 states, 177 states have (on average 1.5480225988700564) internal successors, (274), 183 states have internal predecessors, (274), 33 states have call successors, (33), 15 states have call predecessors, (33), 15 states have return successors, (33), 31 states have call predecessors, (33), 33 states have call successors, (33) Second operand has 5 states, 5 states have (on average 9.0) internal successors, (45), 4 states have internal predecessors, (45), 2 states have call successors, (6), 3 states have call predecessors, (6), 2 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) [2024-11-28 02:53:37,554 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 02:53:37,554 INFO L93 Difference]: Finished difference Result 536 states and 815 transitions. [2024-11-28 02:53:37,555 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-28 02:53:37,557 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 9.0) internal successors, (45), 4 states have internal predecessors, (45), 2 states have call successors, (6), 3 states have call predecessors, (6), 2 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) Word has length 56 [2024-11-28 02:53:37,557 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 02:53:37,574 INFO L225 Difference]: With dead ends: 536 [2024-11-28 02:53:37,574 INFO L226 Difference]: Without dead ends: 317 [2024-11-28 02:53:37,578 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2024-11-28 02:53:37,616 INFO L435 NwaCegarLoop]: 209 mSDtfsCounter, 433 mSDsluCounter, 436 mSDsCounter, 0 mSdLazyCounter, 362 mSolverCounterSat, 60 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 454 SdHoareTripleChecker+Valid, 645 SdHoareTripleChecker+Invalid, 422 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 60 IncrementalHoareTripleChecker+Valid, 362 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2024-11-28 02:53:37,616 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [454 Valid, 645 Invalid, 422 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [60 Valid, 362 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2024-11-28 02:53:37,634 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 317 states. [2024-11-28 02:53:37,699 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 317 to 308. [2024-11-28 02:53:37,702 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 308 states, 243 states have (on average 1.477366255144033) internal successors, (359), 249 states have internal predecessors, (359), 43 states have call successors, (43), 21 states have call predecessors, (43), 20 states have return successors, (40), 39 states have call predecessors, (40), 39 states have call successors, (40) [2024-11-28 02:53:37,711 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 308 states to 308 states and 442 transitions. [2024-11-28 02:53:37,715 INFO L78 Accepts]: Start accepts. Automaton has 308 states and 442 transitions. Word has length 56 [2024-11-28 02:53:37,715 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 02:53:37,715 INFO L471 AbstractCegarLoop]: Abstraction has 308 states and 442 transitions. [2024-11-28 02:53:37,716 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 9.0) internal successors, (45), 4 states have internal predecessors, (45), 2 states have call successors, (6), 3 states have call predecessors, (6), 2 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) [2024-11-28 02:53:37,716 INFO L276 IsEmpty]: Start isEmpty. Operand 308 states and 442 transitions. [2024-11-28 02:53:37,720 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2024-11-28 02:53:37,720 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 02:53:37,720 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 02:53:37,720 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2024-11-28 02:53:37,720 INFO L396 AbstractCegarLoop]: === Iteration 2 === Targeting error2Err0ASSERT_VIOLATIONERROR_FUNCTION === [error1Err0ASSERT_VIOLATIONERROR_FUNCTION, error2Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 02:53:37,721 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 02:53:37,722 INFO L85 PathProgramCache]: Analyzing trace with hash -1029343114, now seen corresponding path program 1 times [2024-11-28 02:53:37,722 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 02:53:37,723 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [289504815] [2024-11-28 02:53:37,723 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:53:37,723 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 02:53:37,753 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 02:53:37,943 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-28 02:53:37,943 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 02:53:37,943 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [289504815] [2024-11-28 02:53:37,943 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [289504815] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 02:53:37,944 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 02:53:37,944 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-11-28 02:53:37,944 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2129621245] [2024-11-28 02:53:37,944 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 02:53:37,945 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-11-28 02:53:37,945 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 02:53:37,946 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-11-28 02:53:37,946 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2024-11-28 02:53:37,946 INFO L87 Difference]: Start difference. First operand 308 states and 442 transitions. Second operand has 6 states, 6 states have (on average 7.5) internal successors, (45), 5 states have internal predecessors, (45), 2 states have call successors, (6), 3 states have call predecessors, (6), 2 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) [2024-11-28 02:53:38,697 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 02:53:38,697 INFO L93 Difference]: Finished difference Result 612 states and 881 transitions. [2024-11-28 02:53:38,697 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2024-11-28 02:53:38,698 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 7.5) internal successors, (45), 5 states have internal predecessors, (45), 2 states have call successors, (6), 3 states have call predecessors, (6), 2 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) Word has length 56 [2024-11-28 02:53:38,698 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 02:53:38,701 INFO L225 Difference]: With dead ends: 612 [2024-11-28 02:53:38,701 INFO L226 Difference]: Without dead ends: 421 [2024-11-28 02:53:38,706 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=24, Invalid=48, Unknown=0, NotChecked=0, Total=72 [2024-11-28 02:53:38,711 INFO L435 NwaCegarLoop]: 271 mSDtfsCounter, 412 mSDsluCounter, 725 mSDsCounter, 0 mSdLazyCounter, 636 mSolverCounterSat, 45 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 433 SdHoareTripleChecker+Valid, 996 SdHoareTripleChecker+Invalid, 681 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 45 IncrementalHoareTripleChecker+Valid, 636 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2024-11-28 02:53:38,711 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [433 Valid, 996 Invalid, 681 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [45 Valid, 636 Invalid, 0 Unknown, 0 Unchecked, 0.6s Time] [2024-11-28 02:53:38,713 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 421 states. [2024-11-28 02:53:38,775 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 421 to 396. [2024-11-28 02:53:38,778 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 396 states, 314 states have (on average 1.4713375796178343) internal successors, (462), 321 states have internal predecessors, (462), 53 states have call successors, (53), 27 states have call predecessors, (53), 27 states have return successors, (53), 50 states have call predecessors, (53), 49 states have call successors, (53) [2024-11-28 02:53:38,782 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 396 states to 396 states and 568 transitions. [2024-11-28 02:53:38,783 INFO L78 Accepts]: Start accepts. Automaton has 396 states and 568 transitions. Word has length 56 [2024-11-28 02:53:38,784 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 02:53:38,784 INFO L471 AbstractCegarLoop]: Abstraction has 396 states and 568 transitions. [2024-11-28 02:53:38,784 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 7.5) internal successors, (45), 5 states have internal predecessors, (45), 2 states have call successors, (6), 3 states have call predecessors, (6), 2 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) [2024-11-28 02:53:38,784 INFO L276 IsEmpty]: Start isEmpty. Operand 396 states and 568 transitions. [2024-11-28 02:53:38,789 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2024-11-28 02:53:38,789 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 02:53:38,789 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 02:53:38,789 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2024-11-28 02:53:38,789 INFO L396 AbstractCegarLoop]: === Iteration 3 === Targeting error2Err0ASSERT_VIOLATIONERROR_FUNCTION === [error1Err0ASSERT_VIOLATIONERROR_FUNCTION, error2Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 02:53:38,790 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 02:53:38,790 INFO L85 PathProgramCache]: Analyzing trace with hash -1926736392, now seen corresponding path program 1 times [2024-11-28 02:53:38,790 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 02:53:38,790 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1041438298] [2024-11-28 02:53:38,790 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:53:38,790 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 02:53:38,817 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 02:53:38,991 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-28 02:53:38,991 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 02:53:38,991 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1041438298] [2024-11-28 02:53:38,991 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1041438298] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 02:53:38,991 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 02:53:38,991 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-28 02:53:38,991 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [284369278] [2024-11-28 02:53:38,992 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 02:53:38,992 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-28 02:53:38,992 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 02:53:38,992 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-28 02:53:38,993 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-11-28 02:53:38,993 INFO L87 Difference]: Start difference. First operand 396 states and 568 transitions. Second operand has 5 states, 5 states have (on average 9.0) internal successors, (45), 5 states have internal predecessors, (45), 2 states have call successors, (6), 3 states have call predecessors, (6), 2 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) [2024-11-28 02:53:39,406 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 02:53:39,407 INFO L93 Difference]: Finished difference Result 690 states and 996 transitions. [2024-11-28 02:53:39,407 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-28 02:53:39,408 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 9.0) internal successors, (45), 5 states have internal predecessors, (45), 2 states have call successors, (6), 3 states have call predecessors, (6), 2 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) Word has length 56 [2024-11-28 02:53:39,408 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 02:53:39,412 INFO L225 Difference]: With dead ends: 690 [2024-11-28 02:53:39,412 INFO L226 Difference]: Without dead ends: 411 [2024-11-28 02:53:39,413 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2024-11-28 02:53:39,415 INFO L435 NwaCegarLoop]: 185 mSDtfsCounter, 369 mSDsluCounter, 291 mSDsCounter, 0 mSdLazyCounter, 318 mSolverCounterSat, 48 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 390 SdHoareTripleChecker+Valid, 476 SdHoareTripleChecker+Invalid, 366 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 48 IncrementalHoareTripleChecker+Valid, 318 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2024-11-28 02:53:39,416 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [390 Valid, 476 Invalid, 366 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [48 Valid, 318 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2024-11-28 02:53:39,420 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 411 states. [2024-11-28 02:53:39,472 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 411 to 396. [2024-11-28 02:53:39,473 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 396 states, 314 states have (on average 1.4617834394904459) internal successors, (459), 321 states have internal predecessors, (459), 53 states have call successors, (53), 27 states have call predecessors, (53), 27 states have return successors, (53), 50 states have call predecessors, (53), 49 states have call successors, (53) [2024-11-28 02:53:39,476 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 396 states to 396 states and 565 transitions. [2024-11-28 02:53:39,478 INFO L78 Accepts]: Start accepts. Automaton has 396 states and 565 transitions. Word has length 56 [2024-11-28 02:53:39,478 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 02:53:39,478 INFO L471 AbstractCegarLoop]: Abstraction has 396 states and 565 transitions. [2024-11-28 02:53:39,478 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 9.0) internal successors, (45), 5 states have internal predecessors, (45), 2 states have call successors, (6), 3 states have call predecessors, (6), 2 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) [2024-11-28 02:53:39,478 INFO L276 IsEmpty]: Start isEmpty. Operand 396 states and 565 transitions. [2024-11-28 02:53:39,480 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2024-11-28 02:53:39,483 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 02:53:39,483 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 02:53:39,483 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2024-11-28 02:53:39,483 INFO L396 AbstractCegarLoop]: === Iteration 4 === Targeting error2Err0ASSERT_VIOLATIONERROR_FUNCTION === [error1Err0ASSERT_VIOLATIONERROR_FUNCTION, error2Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 02:53:39,484 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 02:53:39,484 INFO L85 PathProgramCache]: Analyzing trace with hash -1678589898, now seen corresponding path program 1 times [2024-11-28 02:53:39,484 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 02:53:39,484 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1342818492] [2024-11-28 02:53:39,484 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:53:39,484 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 02:53:39,505 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 02:53:39,597 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-28 02:53:39,598 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 02:53:39,598 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1342818492] [2024-11-28 02:53:39,598 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1342818492] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 02:53:39,598 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 02:53:39,598 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-28 02:53:39,598 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [936183353] [2024-11-28 02:53:39,599 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 02:53:39,599 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-28 02:53:39,600 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 02:53:39,601 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-28 02:53:39,601 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-11-28 02:53:39,601 INFO L87 Difference]: Start difference. First operand 396 states and 565 transitions. Second operand has 5 states, 5 states have (on average 9.0) internal successors, (45), 5 states have internal predecessors, (45), 2 states have call successors, (6), 2 states have call predecessors, (6), 2 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) [2024-11-28 02:53:39,667 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 02:53:39,668 INFO L93 Difference]: Finished difference Result 683 states and 987 transitions. [2024-11-28 02:53:39,669 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-11-28 02:53:39,669 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 9.0) internal successors, (45), 5 states have internal predecessors, (45), 2 states have call successors, (6), 2 states have call predecessors, (6), 2 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) Word has length 56 [2024-11-28 02:53:39,669 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 02:53:39,672 INFO L225 Difference]: With dead ends: 683 [2024-11-28 02:53:39,673 INFO L226 Difference]: Without dead ends: 405 [2024-11-28 02:53:39,674 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-11-28 02:53:39,675 INFO L435 NwaCegarLoop]: 304 mSDtfsCounter, 0 mSDsluCounter, 906 mSDsCounter, 0 mSdLazyCounter, 17 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 1210 SdHoareTripleChecker+Invalid, 17 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 17 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-28 02:53:39,675 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 1210 Invalid, 17 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 17 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-28 02:53:39,678 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 405 states. [2024-11-28 02:53:39,716 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 405 to 405. [2024-11-28 02:53:39,718 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 405 states, 323 states have (on average 1.4489164086687307) internal successors, (468), 330 states have internal predecessors, (468), 53 states have call successors, (53), 27 states have call predecessors, (53), 27 states have return successors, (53), 50 states have call predecessors, (53), 49 states have call successors, (53) [2024-11-28 02:53:39,721 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 405 states to 405 states and 574 transitions. [2024-11-28 02:53:39,722 INFO L78 Accepts]: Start accepts. Automaton has 405 states and 574 transitions. Word has length 56 [2024-11-28 02:53:39,723 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 02:53:39,723 INFO L471 AbstractCegarLoop]: Abstraction has 405 states and 574 transitions. [2024-11-28 02:53:39,723 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 9.0) internal successors, (45), 5 states have internal predecessors, (45), 2 states have call successors, (6), 2 states have call predecessors, (6), 2 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) [2024-11-28 02:53:39,724 INFO L276 IsEmpty]: Start isEmpty. Operand 405 states and 574 transitions. [2024-11-28 02:53:39,725 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2024-11-28 02:53:39,725 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 02:53:39,726 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 02:53:39,726 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3 [2024-11-28 02:53:39,726 INFO L396 AbstractCegarLoop]: === Iteration 5 === Targeting error2Err0ASSERT_VIOLATIONERROR_FUNCTION === [error1Err0ASSERT_VIOLATIONERROR_FUNCTION, error2Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 02:53:39,726 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 02:53:39,727 INFO L85 PathProgramCache]: Analyzing trace with hash -1403830284, now seen corresponding path program 1 times [2024-11-28 02:53:39,728 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 02:53:39,728 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1803762124] [2024-11-28 02:53:39,728 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:53:39,728 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 02:53:39,746 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 02:53:39,820 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-28 02:53:39,820 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 02:53:39,821 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1803762124] [2024-11-28 02:53:39,821 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1803762124] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 02:53:39,821 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 02:53:39,821 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-28 02:53:39,821 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [997923358] [2024-11-28 02:53:39,821 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 02:53:39,821 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-28 02:53:39,821 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 02:53:39,822 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-28 02:53:39,822 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-28 02:53:39,822 INFO L87 Difference]: Start difference. First operand 405 states and 574 transitions. Second operand has 4 states, 4 states have (on average 11.25) internal successors, (45), 4 states have internal predecessors, (45), 2 states have call successors, (6), 2 states have call predecessors, (6), 2 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) [2024-11-28 02:53:40,069 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 02:53:40,069 INFO L93 Difference]: Finished difference Result 963 states and 1371 transitions. [2024-11-28 02:53:40,070 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-28 02:53:40,070 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 11.25) internal successors, (45), 4 states have internal predecessors, (45), 2 states have call successors, (6), 2 states have call predecessors, (6), 2 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) Word has length 56 [2024-11-28 02:53:40,070 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 02:53:40,075 INFO L225 Difference]: With dead ends: 963 [2024-11-28 02:53:40,076 INFO L226 Difference]: Without dead ends: 676 [2024-11-28 02:53:40,077 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-28 02:53:40,079 INFO L435 NwaCegarLoop]: 424 mSDtfsCounter, 415 mSDsluCounter, 337 mSDsCounter, 0 mSdLazyCounter, 105 mSolverCounterSat, 5 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 415 SdHoareTripleChecker+Valid, 761 SdHoareTripleChecker+Invalid, 110 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 5 IncrementalHoareTripleChecker+Valid, 105 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-11-28 02:53:40,080 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [415 Valid, 761 Invalid, 110 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [5 Valid, 105 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-11-28 02:53:40,082 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 676 states. [2024-11-28 02:53:40,154 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 676 to 669. [2024-11-28 02:53:40,157 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 669 states, 539 states have (on average 1.437847866419295) internal successors, (775), 548 states have internal predecessors, (775), 81 states have call successors, (81), 45 states have call predecessors, (81), 47 states have return successors, (84), 78 states have call predecessors, (84), 77 states have call successors, (84) [2024-11-28 02:53:40,162 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 669 states to 669 states and 940 transitions. [2024-11-28 02:53:40,163 INFO L78 Accepts]: Start accepts. Automaton has 669 states and 940 transitions. Word has length 56 [2024-11-28 02:53:40,163 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 02:53:40,163 INFO L471 AbstractCegarLoop]: Abstraction has 669 states and 940 transitions. [2024-11-28 02:53:40,163 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 11.25) internal successors, (45), 4 states have internal predecessors, (45), 2 states have call successors, (6), 2 states have call predecessors, (6), 2 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) [2024-11-28 02:53:40,165 INFO L276 IsEmpty]: Start isEmpty. Operand 669 states and 940 transitions. [2024-11-28 02:53:40,166 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2024-11-28 02:53:40,166 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 02:53:40,166 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 02:53:40,166 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4 [2024-11-28 02:53:40,166 INFO L396 AbstractCegarLoop]: === Iteration 6 === Targeting error2Err0ASSERT_VIOLATIONERROR_FUNCTION === [error1Err0ASSERT_VIOLATIONERROR_FUNCTION, error2Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 02:53:40,167 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 02:53:40,167 INFO L85 PathProgramCache]: Analyzing trace with hash -1460974509, now seen corresponding path program 1 times [2024-11-28 02:53:40,167 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 02:53:40,167 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1394747386] [2024-11-28 02:53:40,167 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:53:40,167 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 02:53:40,186 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 02:53:40,287 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-28 02:53:40,287 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 02:53:40,287 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1394747386] [2024-11-28 02:53:40,287 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1394747386] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 02:53:40,287 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 02:53:40,288 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-28 02:53:40,288 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1901447549] [2024-11-28 02:53:40,288 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 02:53:40,288 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-28 02:53:40,288 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 02:53:40,289 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-28 02:53:40,289 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-11-28 02:53:40,290 INFO L87 Difference]: Start difference. First operand 669 states and 940 transitions. Second operand has 5 states, 5 states have (on average 9.0) internal successors, (45), 5 states have internal predecessors, (45), 2 states have call successors, (6), 2 states have call predecessors, (6), 2 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) [2024-11-28 02:53:40,383 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 02:53:40,383 INFO L93 Difference]: Finished difference Result 1229 states and 1747 transitions. [2024-11-28 02:53:40,383 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-11-28 02:53:40,384 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 9.0) internal successors, (45), 5 states have internal predecessors, (45), 2 states have call successors, (6), 2 states have call predecessors, (6), 2 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) Word has length 56 [2024-11-28 02:53:40,384 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 02:53:40,389 INFO L225 Difference]: With dead ends: 1229 [2024-11-28 02:53:40,389 INFO L226 Difference]: Without dead ends: 678 [2024-11-28 02:53:40,392 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-11-28 02:53:40,393 INFO L435 NwaCegarLoop]: 304 mSDtfsCounter, 0 mSDsluCounter, 906 mSDsCounter, 0 mSdLazyCounter, 17 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 1210 SdHoareTripleChecker+Invalid, 17 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 17 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-28 02:53:40,395 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 1210 Invalid, 17 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 17 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-28 02:53:40,397 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 678 states. [2024-11-28 02:53:40,474 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 678 to 678. [2024-11-28 02:53:40,475 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 678 states, 548 states have (on average 1.4251824817518248) internal successors, (781), 557 states have internal predecessors, (781), 81 states have call successors, (81), 45 states have call predecessors, (81), 47 states have return successors, (84), 78 states have call predecessors, (84), 77 states have call successors, (84) [2024-11-28 02:53:40,480 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 678 states to 678 states and 946 transitions. [2024-11-28 02:53:40,481 INFO L78 Accepts]: Start accepts. Automaton has 678 states and 946 transitions. Word has length 56 [2024-11-28 02:53:40,481 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 02:53:40,481 INFO L471 AbstractCegarLoop]: Abstraction has 678 states and 946 transitions. [2024-11-28 02:53:40,481 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 9.0) internal successors, (45), 5 states have internal predecessors, (45), 2 states have call successors, (6), 2 states have call predecessors, (6), 2 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) [2024-11-28 02:53:40,481 INFO L276 IsEmpty]: Start isEmpty. Operand 678 states and 946 transitions. [2024-11-28 02:53:40,483 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2024-11-28 02:53:40,483 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 02:53:40,484 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 02:53:40,484 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5 [2024-11-28 02:53:40,484 INFO L396 AbstractCegarLoop]: === Iteration 7 === Targeting error2Err0ASSERT_VIOLATIONERROR_FUNCTION === [error1Err0ASSERT_VIOLATIONERROR_FUNCTION, error2Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 02:53:40,485 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 02:53:40,485 INFO L85 PathProgramCache]: Analyzing trace with hash -1398934895, now seen corresponding path program 1 times [2024-11-28 02:53:40,485 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 02:53:40,485 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1214844340] [2024-11-28 02:53:40,485 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:53:40,485 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 02:53:40,499 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 02:53:40,680 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-28 02:53:40,680 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 02:53:40,680 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1214844340] [2024-11-28 02:53:40,680 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1214844340] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 02:53:40,680 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 02:53:40,680 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-11-28 02:53:40,680 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [693419825] [2024-11-28 02:53:40,680 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 02:53:40,681 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-11-28 02:53:40,681 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 02:53:40,681 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-11-28 02:53:40,681 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2024-11-28 02:53:40,681 INFO L87 Difference]: Start difference. First operand 678 states and 946 transitions. Second operand has 6 states, 6 states have (on average 7.5) internal successors, (45), 6 states have internal predecessors, (45), 2 states have call successors, (6), 3 states have call predecessors, (6), 3 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) [2024-11-28 02:53:41,299 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 02:53:41,299 INFO L93 Difference]: Finished difference Result 1104 states and 1536 transitions. [2024-11-28 02:53:41,300 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2024-11-28 02:53:41,300 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 7.5) internal successors, (45), 6 states have internal predecessors, (45), 2 states have call successors, (6), 3 states have call predecessors, (6), 3 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) Word has length 56 [2024-11-28 02:53:41,300 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 02:53:41,304 INFO L225 Difference]: With dead ends: 1104 [2024-11-28 02:53:41,304 INFO L226 Difference]: Without dead ends: 716 [2024-11-28 02:53:41,305 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=24, Invalid=48, Unknown=0, NotChecked=0, Total=72 [2024-11-28 02:53:41,306 INFO L435 NwaCegarLoop]: 196 mSDtfsCounter, 407 mSDsluCounter, 558 mSDsCounter, 0 mSdLazyCounter, 557 mSolverCounterSat, 56 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 427 SdHoareTripleChecker+Valid, 754 SdHoareTripleChecker+Invalid, 613 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 56 IncrementalHoareTripleChecker+Valid, 557 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2024-11-28 02:53:41,306 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [427 Valid, 754 Invalid, 613 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [56 Valid, 557 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2024-11-28 02:53:41,308 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 716 states. [2024-11-28 02:53:41,358 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 716 to 670. [2024-11-28 02:53:41,360 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 670 states, 542 states have (on average 1.418819188191882) internal successors, (769), 549 states have internal predecessors, (769), 81 states have call successors, (81), 45 states have call predecessors, (81), 45 states have return successors, (79), 77 states have call predecessors, (79), 77 states have call successors, (79) [2024-11-28 02:53:41,364 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 670 states to 670 states and 929 transitions. [2024-11-28 02:53:41,365 INFO L78 Accepts]: Start accepts. Automaton has 670 states and 929 transitions. Word has length 56 [2024-11-28 02:53:41,365 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 02:53:41,365 INFO L471 AbstractCegarLoop]: Abstraction has 670 states and 929 transitions. [2024-11-28 02:53:41,365 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 7.5) internal successors, (45), 6 states have internal predecessors, (45), 2 states have call successors, (6), 3 states have call predecessors, (6), 3 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) [2024-11-28 02:53:41,366 INFO L276 IsEmpty]: Start isEmpty. Operand 670 states and 929 transitions. [2024-11-28 02:53:41,366 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2024-11-28 02:53:41,367 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 02:53:41,367 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 02:53:41,367 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6 [2024-11-28 02:53:41,367 INFO L396 AbstractCegarLoop]: === Iteration 8 === Targeting error2Err0ASSERT_VIOLATIONERROR_FUNCTION === [error1Err0ASSERT_VIOLATIONERROR_FUNCTION, error2Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 02:53:41,367 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 02:53:41,368 INFO L85 PathProgramCache]: Analyzing trace with hash -976233069, now seen corresponding path program 1 times [2024-11-28 02:53:41,368 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 02:53:41,368 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1075234645] [2024-11-28 02:53:41,368 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:53:41,368 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 02:53:41,379 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 02:53:41,511 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-28 02:53:41,511 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 02:53:41,511 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1075234645] [2024-11-28 02:53:41,511 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1075234645] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 02:53:41,511 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 02:53:41,512 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-28 02:53:41,512 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [282421247] [2024-11-28 02:53:41,512 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 02:53:41,514 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-28 02:53:41,514 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 02:53:41,515 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-28 02:53:41,515 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-11-28 02:53:41,515 INFO L87 Difference]: Start difference. First operand 670 states and 929 transitions. Second operand has 5 states, 5 states have (on average 9.0) internal successors, (45), 5 states have internal predecessors, (45), 2 states have call successors, (6), 3 states have call predecessors, (6), 3 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) [2024-11-28 02:53:41,980 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 02:53:41,980 INFO L93 Difference]: Finished difference Result 1324 states and 1845 transitions. [2024-11-28 02:53:41,981 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-28 02:53:41,981 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 9.0) internal successors, (45), 5 states have internal predecessors, (45), 2 states have call successors, (6), 3 states have call predecessors, (6), 3 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) Word has length 56 [2024-11-28 02:53:41,981 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 02:53:41,986 INFO L225 Difference]: With dead ends: 1324 [2024-11-28 02:53:41,986 INFO L226 Difference]: Without dead ends: 772 [2024-11-28 02:53:41,988 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 6 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2024-11-28 02:53:41,988 INFO L435 NwaCegarLoop]: 184 mSDtfsCounter, 396 mSDsluCounter, 285 mSDsCounter, 0 mSdLazyCounter, 370 mSolverCounterSat, 52 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 416 SdHoareTripleChecker+Valid, 469 SdHoareTripleChecker+Invalid, 422 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 52 IncrementalHoareTripleChecker+Valid, 370 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2024-11-28 02:53:41,989 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [416 Valid, 469 Invalid, 422 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [52 Valid, 370 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2024-11-28 02:53:41,990 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 772 states. [2024-11-28 02:53:42,062 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 772 to 727. [2024-11-28 02:53:42,064 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 727 states, 590 states have (on average 1.3745762711864407) internal successors, (811), 597 states have internal predecessors, (811), 84 states have call successors, (84), 51 states have call predecessors, (84), 51 states have return successors, (88), 80 states have call predecessors, (88), 80 states have call successors, (88) [2024-11-28 02:53:42,069 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 727 states to 727 states and 983 transitions. [2024-11-28 02:53:42,070 INFO L78 Accepts]: Start accepts. Automaton has 727 states and 983 transitions. Word has length 56 [2024-11-28 02:53:42,070 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 02:53:42,070 INFO L471 AbstractCegarLoop]: Abstraction has 727 states and 983 transitions. [2024-11-28 02:53:42,070 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 9.0) internal successors, (45), 5 states have internal predecessors, (45), 2 states have call successors, (6), 3 states have call predecessors, (6), 3 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) [2024-11-28 02:53:42,070 INFO L276 IsEmpty]: Start isEmpty. Operand 727 states and 983 transitions. [2024-11-28 02:53:42,071 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2024-11-28 02:53:42,071 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 02:53:42,071 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 02:53:42,071 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7 [2024-11-28 02:53:42,072 INFO L396 AbstractCegarLoop]: === Iteration 9 === Targeting error2Err0ASSERT_VIOLATIONERROR_FUNCTION === [error1Err0ASSERT_VIOLATIONERROR_FUNCTION, error2Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 02:53:42,072 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 02:53:42,072 INFO L85 PathProgramCache]: Analyzing trace with hash -1793881519, now seen corresponding path program 1 times [2024-11-28 02:53:42,072 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 02:53:42,072 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1102638925] [2024-11-28 02:53:42,072 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:53:42,073 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 02:53:42,083 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 02:53:42,201 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-28 02:53:42,201 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 02:53:42,202 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1102638925] [2024-11-28 02:53:42,202 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1102638925] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 02:53:42,202 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 02:53:42,202 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-11-28 02:53:42,202 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1972543447] [2024-11-28 02:53:42,202 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 02:53:42,202 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-11-28 02:53:42,202 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 02:53:42,203 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-11-28 02:53:42,203 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2024-11-28 02:53:42,203 INFO L87 Difference]: Start difference. First operand 727 states and 983 transitions. Second operand has 6 states, 6 states have (on average 7.5) internal successors, (45), 6 states have internal predecessors, (45), 2 states have call successors, (6), 3 states have call predecessors, (6), 3 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) [2024-11-28 02:53:42,874 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 02:53:42,874 INFO L93 Difference]: Finished difference Result 1571 states and 2100 transitions. [2024-11-28 02:53:42,875 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2024-11-28 02:53:42,875 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 7.5) internal successors, (45), 6 states have internal predecessors, (45), 2 states have call successors, (6), 3 states have call predecessors, (6), 3 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) Word has length 56 [2024-11-28 02:53:42,875 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 02:53:42,882 INFO L225 Difference]: With dead ends: 1571 [2024-11-28 02:53:42,883 INFO L226 Difference]: Without dead ends: 963 [2024-11-28 02:53:42,884 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 6 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=24, Invalid=48, Unknown=0, NotChecked=0, Total=72 [2024-11-28 02:53:42,886 INFO L435 NwaCegarLoop]: 197 mSDtfsCounter, 388 mSDsluCounter, 545 mSDsCounter, 0 mSdLazyCounter, 615 mSolverCounterSat, 55 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 407 SdHoareTripleChecker+Valid, 742 SdHoareTripleChecker+Invalid, 670 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 55 IncrementalHoareTripleChecker+Valid, 615 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2024-11-28 02:53:42,887 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [407 Valid, 742 Invalid, 670 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [55 Valid, 615 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2024-11-28 02:53:42,889 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 963 states. [2024-11-28 02:53:42,986 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 963 to 893. [2024-11-28 02:53:42,988 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 893 states, 724 states have (on average 1.350828729281768) internal successors, (978), 733 states have internal predecessors, (978), 102 states have call successors, (102), 63 states have call predecessors, (102), 65 states have return successors, (112), 99 states have call predecessors, (112), 98 states have call successors, (112) [2024-11-28 02:53:42,994 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 893 states to 893 states and 1192 transitions. [2024-11-28 02:53:42,995 INFO L78 Accepts]: Start accepts. Automaton has 893 states and 1192 transitions. Word has length 56 [2024-11-28 02:53:42,995 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 02:53:42,995 INFO L471 AbstractCegarLoop]: Abstraction has 893 states and 1192 transitions. [2024-11-28 02:53:42,996 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 7.5) internal successors, (45), 6 states have internal predecessors, (45), 2 states have call successors, (6), 3 states have call predecessors, (6), 3 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) [2024-11-28 02:53:42,996 INFO L276 IsEmpty]: Start isEmpty. Operand 893 states and 1192 transitions. [2024-11-28 02:53:42,997 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2024-11-28 02:53:42,997 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 02:53:42,997 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 02:53:42,997 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8 [2024-11-28 02:53:42,997 INFO L396 AbstractCegarLoop]: === Iteration 10 === Targeting error2Err0ASSERT_VIOLATIONERROR_FUNCTION === [error1Err0ASSERT_VIOLATIONERROR_FUNCTION, error2Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 02:53:42,998 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 02:53:42,998 INFO L85 PathProgramCache]: Analyzing trace with hash 812142035, now seen corresponding path program 1 times [2024-11-28 02:53:42,998 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 02:53:42,998 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2138395080] [2024-11-28 02:53:42,998 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:53:42,998 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 02:53:43,008 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 02:53:43,034 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-28 02:53:43,034 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 02:53:43,034 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2138395080] [2024-11-28 02:53:43,034 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2138395080] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 02:53:43,034 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 02:53:43,034 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2024-11-28 02:53:43,034 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2073631321] [2024-11-28 02:53:43,034 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 02:53:43,035 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2024-11-28 02:53:43,035 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 02:53:43,035 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2024-11-28 02:53:43,035 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-11-28 02:53:43,035 INFO L87 Difference]: Start difference. First operand 893 states and 1192 transitions. Second operand has 3 states, 3 states have (on average 15.0) internal successors, (45), 3 states have internal predecessors, (45), 2 states have call successors, (6), 2 states have call predecessors, (6), 1 states have return successors, (5), 1 states have call predecessors, (5), 1 states have call successors, (5) [2024-11-28 02:53:43,177 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 02:53:43,177 INFO L93 Difference]: Finished difference Result 2203 states and 2935 transitions. [2024-11-28 02:53:43,178 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-11-28 02:53:43,178 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 15.0) internal successors, (45), 3 states have internal predecessors, (45), 2 states have call successors, (6), 2 states have call predecessors, (6), 1 states have return successors, (5), 1 states have call predecessors, (5), 1 states have call successors, (5) Word has length 56 [2024-11-28 02:53:43,178 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 02:53:43,186 INFO L225 Difference]: With dead ends: 2203 [2024-11-28 02:53:43,186 INFO L226 Difference]: Without dead ends: 1429 [2024-11-28 02:53:43,188 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-11-28 02:53:43,189 INFO L435 NwaCegarLoop]: 303 mSDtfsCounter, 263 mSDsluCounter, 127 mSDsCounter, 0 mSdLazyCounter, 8 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 263 SdHoareTripleChecker+Valid, 430 SdHoareTripleChecker+Invalid, 10 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 8 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-28 02:53:43,189 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [263 Valid, 430 Invalid, 10 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 8 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-28 02:53:43,191 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1429 states. [2024-11-28 02:53:43,287 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1429 to 1419. [2024-11-28 02:53:43,290 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1419 states, 1144 states have (on average 1.319055944055944) internal successors, (1509), 1161 states have internal predecessors, (1509), 164 states have call successors, (164), 105 states have call predecessors, (164), 109 states have return successors, (175), 155 states have call predecessors, (175), 160 states have call successors, (175) [2024-11-28 02:53:43,299 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1419 states to 1419 states and 1848 transitions. [2024-11-28 02:53:43,300 INFO L78 Accepts]: Start accepts. Automaton has 1419 states and 1848 transitions. Word has length 56 [2024-11-28 02:53:43,301 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 02:53:43,301 INFO L471 AbstractCegarLoop]: Abstraction has 1419 states and 1848 transitions. [2024-11-28 02:53:43,301 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 15.0) internal successors, (45), 3 states have internal predecessors, (45), 2 states have call successors, (6), 2 states have call predecessors, (6), 1 states have return successors, (5), 1 states have call predecessors, (5), 1 states have call successors, (5) [2024-11-28 02:53:43,301 INFO L276 IsEmpty]: Start isEmpty. Operand 1419 states and 1848 transitions. [2024-11-28 02:53:43,302 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 64 [2024-11-28 02:53:43,302 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 02:53:43,302 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 02:53:43,302 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable9 [2024-11-28 02:53:43,302 INFO L396 AbstractCegarLoop]: === Iteration 11 === Targeting error1Err0ASSERT_VIOLATIONERROR_FUNCTION === [error1Err0ASSERT_VIOLATIONERROR_FUNCTION, error2Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 02:53:43,303 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 02:53:43,303 INFO L85 PathProgramCache]: Analyzing trace with hash 740146201, now seen corresponding path program 1 times [2024-11-28 02:53:43,303 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 02:53:43,303 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1165400289] [2024-11-28 02:53:43,303 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:53:43,303 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 02:53:43,316 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 02:53:43,409 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-28 02:53:43,409 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 02:53:43,409 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1165400289] [2024-11-28 02:53:43,410 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1165400289] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 02:53:43,410 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 02:53:43,410 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-28 02:53:43,410 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1271754760] [2024-11-28 02:53:43,410 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 02:53:43,410 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-28 02:53:43,410 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 02:53:43,411 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-28 02:53:43,411 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-11-28 02:53:43,411 INFO L87 Difference]: Start difference. First operand 1419 states and 1848 transitions. Second operand has 5 states, 5 states have (on average 9.6) internal successors, (48), 5 states have internal predecessors, (48), 3 states have call successors, (8), 3 states have call predecessors, (8), 3 states have return successors, (7), 3 states have call predecessors, (7), 3 states have call successors, (7) [2024-11-28 02:53:43,944 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 02:53:43,945 INFO L93 Difference]: Finished difference Result 1634 states and 2162 transitions. [2024-11-28 02:53:43,945 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-28 02:53:43,945 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 9.6) internal successors, (48), 5 states have internal predecessors, (48), 3 states have call successors, (8), 3 states have call predecessors, (8), 3 states have return successors, (7), 3 states have call predecessors, (7), 3 states have call successors, (7) Word has length 63 [2024-11-28 02:53:43,945 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 02:53:43,955 INFO L225 Difference]: With dead ends: 1634 [2024-11-28 02:53:43,955 INFO L226 Difference]: Without dead ends: 1534 [2024-11-28 02:53:43,956 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2024-11-28 02:53:43,957 INFO L435 NwaCegarLoop]: 212 mSDtfsCounter, 290 mSDsluCounter, 495 mSDsCounter, 0 mSdLazyCounter, 424 mSolverCounterSat, 54 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 299 SdHoareTripleChecker+Valid, 707 SdHoareTripleChecker+Invalid, 478 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 54 IncrementalHoareTripleChecker+Valid, 424 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2024-11-28 02:53:43,957 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [299 Valid, 707 Invalid, 478 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [54 Valid, 424 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2024-11-28 02:53:43,959 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1534 states. [2024-11-28 02:53:44,085 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1534 to 1527. [2024-11-28 02:53:44,088 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1527 states, 1230 states have (on average 1.326829268292683) internal successors, (1632), 1249 states have internal predecessors, (1632), 177 states have call successors, (177), 112 states have call predecessors, (177), 118 states have return successors, (193), 169 states have call predecessors, (193), 173 states have call successors, (193) [2024-11-28 02:53:44,098 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1527 states to 1527 states and 2002 transitions. [2024-11-28 02:53:44,100 INFO L78 Accepts]: Start accepts. Automaton has 1527 states and 2002 transitions. Word has length 63 [2024-11-28 02:53:44,100 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 02:53:44,100 INFO L471 AbstractCegarLoop]: Abstraction has 1527 states and 2002 transitions. [2024-11-28 02:53:44,100 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 9.6) internal successors, (48), 5 states have internal predecessors, (48), 3 states have call successors, (8), 3 states have call predecessors, (8), 3 states have return successors, (7), 3 states have call predecessors, (7), 3 states have call successors, (7) [2024-11-28 02:53:44,100 INFO L276 IsEmpty]: Start isEmpty. Operand 1527 states and 2002 transitions. [2024-11-28 02:53:44,104 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 64 [2024-11-28 02:53:44,104 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 02:53:44,104 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 02:53:44,104 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable10 [2024-11-28 02:53:44,104 INFO L396 AbstractCegarLoop]: === Iteration 12 === Targeting error1Err0ASSERT_VIOLATIONERROR_FUNCTION === [error1Err0ASSERT_VIOLATIONERROR_FUNCTION, error2Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 02:53:44,105 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 02:53:44,105 INFO L85 PathProgramCache]: Analyzing trace with hash -1546372391, now seen corresponding path program 1 times [2024-11-28 02:53:44,105 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 02:53:44,105 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [882949979] [2024-11-28 02:53:44,105 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:53:44,106 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 02:53:44,118 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 02:53:44,240 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-28 02:53:44,240 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 02:53:44,240 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [882949979] [2024-11-28 02:53:44,240 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [882949979] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 02:53:44,240 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 02:53:44,240 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-11-28 02:53:44,240 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1577095009] [2024-11-28 02:53:44,241 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 02:53:44,241 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-11-28 02:53:44,241 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 02:53:44,241 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-11-28 02:53:44,241 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2024-11-28 02:53:44,242 INFO L87 Difference]: Start difference. First operand 1527 states and 2002 transitions. Second operand has 6 states, 6 states have (on average 8.0) internal successors, (48), 6 states have internal predecessors, (48), 3 states have call successors, (8), 3 states have call predecessors, (8), 3 states have return successors, (7), 3 states have call predecessors, (7), 3 states have call successors, (7) [2024-11-28 02:53:45,096 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 02:53:45,096 INFO L93 Difference]: Finished difference Result 1882 states and 2505 transitions. [2024-11-28 02:53:45,097 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2024-11-28 02:53:45,097 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 8.0) internal successors, (48), 6 states have internal predecessors, (48), 3 states have call successors, (8), 3 states have call predecessors, (8), 3 states have return successors, (7), 3 states have call predecessors, (7), 3 states have call successors, (7) Word has length 63 [2024-11-28 02:53:45,097 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 02:53:45,106 INFO L225 Difference]: With dead ends: 1882 [2024-11-28 02:53:45,106 INFO L226 Difference]: Without dead ends: 1681 [2024-11-28 02:53:45,107 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 7 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=24, Invalid=48, Unknown=0, NotChecked=0, Total=72 [2024-11-28 02:53:45,108 INFO L435 NwaCegarLoop]: 269 mSDtfsCounter, 434 mSDsluCounter, 737 mSDsCounter, 0 mSdLazyCounter, 713 mSolverCounterSat, 57 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 458 SdHoareTripleChecker+Valid, 1006 SdHoareTripleChecker+Invalid, 770 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 57 IncrementalHoareTripleChecker+Valid, 713 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2024-11-28 02:53:45,108 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [458 Valid, 1006 Invalid, 770 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [57 Valid, 713 Invalid, 0 Unknown, 0 Unchecked, 0.6s Time] [2024-11-28 02:53:45,110 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1681 states. [2024-11-28 02:53:45,247 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1681 to 1635. [2024-11-28 02:53:45,250 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1635 states, 1316 states have (on average 1.3328267477203648) internal successors, (1754), 1337 states have internal predecessors, (1754), 190 states have call successors, (190), 119 states have call predecessors, (190), 127 states have return successors, (214), 183 states have call predecessors, (214), 186 states have call successors, (214) [2024-11-28 02:53:45,259 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1635 states to 1635 states and 2158 transitions. [2024-11-28 02:53:45,261 INFO L78 Accepts]: Start accepts. Automaton has 1635 states and 2158 transitions. Word has length 63 [2024-11-28 02:53:45,261 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 02:53:45,261 INFO L471 AbstractCegarLoop]: Abstraction has 1635 states and 2158 transitions. [2024-11-28 02:53:45,261 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 8.0) internal successors, (48), 6 states have internal predecessors, (48), 3 states have call successors, (8), 3 states have call predecessors, (8), 3 states have return successors, (7), 3 states have call predecessors, (7), 3 states have call successors, (7) [2024-11-28 02:53:45,262 INFO L276 IsEmpty]: Start isEmpty. Operand 1635 states and 2158 transitions. [2024-11-28 02:53:45,263 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 64 [2024-11-28 02:53:45,263 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 02:53:45,263 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 02:53:45,264 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable11 [2024-11-28 02:53:45,264 INFO L396 AbstractCegarLoop]: === Iteration 13 === Targeting error1Err0ASSERT_VIOLATIONERROR_FUNCTION === [error1Err0ASSERT_VIOLATIONERROR_FUNCTION, error2Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 02:53:45,264 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 02:53:45,264 INFO L85 PathProgramCache]: Analyzing trace with hash -1561891109, now seen corresponding path program 1 times [2024-11-28 02:53:45,264 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 02:53:45,264 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1144505649] [2024-11-28 02:53:45,265 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:53:45,265 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 02:53:45,274 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 02:53:45,316 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-28 02:53:45,316 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 02:53:45,316 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1144505649] [2024-11-28 02:53:45,316 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1144505649] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 02:53:45,316 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 02:53:45,316 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-28 02:53:45,316 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1159066854] [2024-11-28 02:53:45,317 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 02:53:45,317 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-28 02:53:45,317 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 02:53:45,317 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-28 02:53:45,318 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-28 02:53:45,318 INFO L87 Difference]: Start difference. First operand 1635 states and 2158 transitions. Second operand has 4 states, 4 states have (on average 12.0) internal successors, (48), 4 states have internal predecessors, (48), 4 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (7), 3 states have call predecessors, (7), 4 states have call successors, (7) [2024-11-28 02:53:45,656 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 02:53:45,656 INFO L93 Difference]: Finished difference Result 2505 states and 3404 transitions. [2024-11-28 02:53:45,657 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-28 02:53:45,657 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 12.0) internal successors, (48), 4 states have internal predecessors, (48), 4 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (7), 3 states have call predecessors, (7), 4 states have call successors, (7) Word has length 63 [2024-11-28 02:53:45,657 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 02:53:45,667 INFO L225 Difference]: With dead ends: 2505 [2024-11-28 02:53:45,667 INFO L226 Difference]: Without dead ends: 2202 [2024-11-28 02:53:45,669 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-28 02:53:45,670 INFO L435 NwaCegarLoop]: 419 mSDtfsCounter, 397 mSDsluCounter, 359 mSDsCounter, 0 mSdLazyCounter, 115 mSolverCounterSat, 13 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 397 SdHoareTripleChecker+Valid, 778 SdHoareTripleChecker+Invalid, 128 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 13 IncrementalHoareTripleChecker+Valid, 115 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-11-28 02:53:45,670 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [397 Valid, 778 Invalid, 128 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [13 Valid, 115 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-11-28 02:53:45,673 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2202 states. [2024-11-28 02:53:45,867 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2202 to 2185. [2024-11-28 02:53:45,870 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2185 states, 1756 states have (on average 1.3451025056947608) internal successors, (2362), 1785 states have internal predecessors, (2362), 250 states have call successors, (250), 161 states have call predecessors, (250), 177 states have return successors, (299), 243 states have call predecessors, (299), 246 states have call successors, (299) [2024-11-28 02:53:45,882 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2185 states to 2185 states and 2911 transitions. [2024-11-28 02:53:45,884 INFO L78 Accepts]: Start accepts. Automaton has 2185 states and 2911 transitions. Word has length 63 [2024-11-28 02:53:45,884 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 02:53:45,884 INFO L471 AbstractCegarLoop]: Abstraction has 2185 states and 2911 transitions. [2024-11-28 02:53:45,884 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 12.0) internal successors, (48), 4 states have internal predecessors, (48), 4 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (7), 3 states have call predecessors, (7), 4 states have call successors, (7) [2024-11-28 02:53:45,884 INFO L276 IsEmpty]: Start isEmpty. Operand 2185 states and 2911 transitions. [2024-11-28 02:53:45,886 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 65 [2024-11-28 02:53:45,886 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 02:53:45,886 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 02:53:45,886 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable12 [2024-11-28 02:53:45,887 INFO L396 AbstractCegarLoop]: === Iteration 14 === Targeting error1Err0ASSERT_VIOLATIONERROR_FUNCTION === [error1Err0ASSERT_VIOLATIONERROR_FUNCTION, error2Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 02:53:45,887 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 02:53:45,887 INFO L85 PathProgramCache]: Analyzing trace with hash -1825352632, now seen corresponding path program 1 times [2024-11-28 02:53:45,887 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 02:53:45,887 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [622768885] [2024-11-28 02:53:45,887 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:53:45,887 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 02:53:45,896 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 02:53:45,956 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-28 02:53:45,957 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 02:53:45,957 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [622768885] [2024-11-28 02:53:45,957 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [622768885] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 02:53:45,957 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 02:53:45,957 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-11-28 02:53:45,957 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [597695558] [2024-11-28 02:53:45,957 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 02:53:45,958 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-11-28 02:53:45,958 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 02:53:45,958 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-11-28 02:53:45,958 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2024-11-28 02:53:45,959 INFO L87 Difference]: Start difference. First operand 2185 states and 2911 transitions. Second operand has 6 states, 6 states have (on average 8.166666666666666) internal successors, (49), 5 states have internal predecessors, (49), 2 states have call successors, (8), 2 states have call predecessors, (8), 3 states have return successors, (7), 3 states have call predecessors, (7), 2 states have call successors, (7) [2024-11-28 02:53:46,244 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 02:53:46,244 INFO L93 Difference]: Finished difference Result 3058 states and 4145 transitions. [2024-11-28 02:53:46,244 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-28 02:53:46,245 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 8.166666666666666) internal successors, (49), 5 states have internal predecessors, (49), 2 states have call successors, (8), 2 states have call predecessors, (8), 3 states have return successors, (7), 3 states have call predecessors, (7), 2 states have call successors, (7) Word has length 64 [2024-11-28 02:53:46,245 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 02:53:46,258 INFO L225 Difference]: With dead ends: 3058 [2024-11-28 02:53:46,258 INFO L226 Difference]: Without dead ends: 2205 [2024-11-28 02:53:46,261 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2024-11-28 02:53:46,262 INFO L435 NwaCegarLoop]: 302 mSDtfsCounter, 0 mSDsluCounter, 1202 mSDsCounter, 0 mSdLazyCounter, 20 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 1504 SdHoareTripleChecker+Invalid, 20 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 20 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-28 02:53:46,262 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 1504 Invalid, 20 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 20 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-28 02:53:46,265 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2205 states. [2024-11-28 02:53:46,456 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2205 to 2205. [2024-11-28 02:53:46,460 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2205 states, 1772 states have (on average 1.3391647855530473) internal successors, (2373), 1801 states have internal predecessors, (2373), 250 states have call successors, (250), 161 states have call predecessors, (250), 181 states have return successors, (306), 247 states have call predecessors, (306), 246 states have call successors, (306) [2024-11-28 02:53:46,473 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2205 states to 2205 states and 2929 transitions. [2024-11-28 02:53:46,475 INFO L78 Accepts]: Start accepts. Automaton has 2205 states and 2929 transitions. Word has length 64 [2024-11-28 02:53:46,475 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 02:53:46,475 INFO L471 AbstractCegarLoop]: Abstraction has 2205 states and 2929 transitions. [2024-11-28 02:53:46,476 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 8.166666666666666) internal successors, (49), 5 states have internal predecessors, (49), 2 states have call successors, (8), 2 states have call predecessors, (8), 3 states have return successors, (7), 3 states have call predecessors, (7), 2 states have call successors, (7) [2024-11-28 02:53:46,476 INFO L276 IsEmpty]: Start isEmpty. Operand 2205 states and 2929 transitions. [2024-11-28 02:53:46,478 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 65 [2024-11-28 02:53:46,478 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 02:53:46,478 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 02:53:46,478 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable13 [2024-11-28 02:53:46,478 INFO L396 AbstractCegarLoop]: === Iteration 15 === Targeting error1Err0ASSERT_VIOLATIONERROR_FUNCTION === [error1Err0ASSERT_VIOLATIONERROR_FUNCTION, error2Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 02:53:46,479 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 02:53:46,479 INFO L85 PathProgramCache]: Analyzing trace with hash 2075247878, now seen corresponding path program 1 times [2024-11-28 02:53:46,479 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 02:53:46,479 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1423617153] [2024-11-28 02:53:46,479 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:53:46,479 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 02:53:46,492 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 02:53:46,558 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-28 02:53:46,558 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 02:53:46,558 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1423617153] [2024-11-28 02:53:46,558 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1423617153] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 02:53:46,558 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 02:53:46,558 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-11-28 02:53:46,558 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1569717572] [2024-11-28 02:53:46,559 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 02:53:46,559 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-11-28 02:53:46,561 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 02:53:46,561 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-11-28 02:53:46,561 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2024-11-28 02:53:46,561 INFO L87 Difference]: Start difference. First operand 2205 states and 2929 transitions. Second operand has 6 states, 6 states have (on average 8.166666666666666) internal successors, (49), 6 states have internal predecessors, (49), 4 states have call successors, (8), 2 states have call predecessors, (8), 4 states have return successors, (7), 4 states have call predecessors, (7), 4 states have call successors, (7) [2024-11-28 02:53:47,436 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 02:53:47,436 INFO L93 Difference]: Finished difference Result 4667 states and 6366 transitions. [2024-11-28 02:53:47,437 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2024-11-28 02:53:47,437 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 8.166666666666666) internal successors, (49), 6 states have internal predecessors, (49), 4 states have call successors, (8), 2 states have call predecessors, (8), 4 states have return successors, (7), 4 states have call predecessors, (7), 4 states have call successors, (7) Word has length 64 [2024-11-28 02:53:47,437 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 02:53:47,450 INFO L225 Difference]: With dead ends: 4667 [2024-11-28 02:53:47,450 INFO L226 Difference]: Without dead ends: 2495 [2024-11-28 02:53:47,455 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=50, Unknown=0, NotChecked=0, Total=72 [2024-11-28 02:53:47,456 INFO L435 NwaCegarLoop]: 576 mSDtfsCounter, 1077 mSDsluCounter, 1068 mSDsCounter, 0 mSdLazyCounter, 446 mSolverCounterSat, 227 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1085 SdHoareTripleChecker+Valid, 1644 SdHoareTripleChecker+Invalid, 673 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 227 IncrementalHoareTripleChecker+Valid, 446 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2024-11-28 02:53:47,457 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1085 Valid, 1644 Invalid, 673 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [227 Valid, 446 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2024-11-28 02:53:47,460 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2495 states. [2024-11-28 02:53:47,684 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2495 to 2130. [2024-11-28 02:53:47,689 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2130 states, 1697 states have (on average 1.319387153800825) internal successors, (2239), 1726 states have internal predecessors, (2239), 250 states have call successors, (250), 161 states have call predecessors, (250), 181 states have return successors, (294), 247 states have call predecessors, (294), 246 states have call successors, (294) [2024-11-28 02:53:47,702 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2130 states to 2130 states and 2783 transitions. [2024-11-28 02:53:47,704 INFO L78 Accepts]: Start accepts. Automaton has 2130 states and 2783 transitions. Word has length 64 [2024-11-28 02:53:47,704 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 02:53:47,705 INFO L471 AbstractCegarLoop]: Abstraction has 2130 states and 2783 transitions. [2024-11-28 02:53:47,705 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 8.166666666666666) internal successors, (49), 6 states have internal predecessors, (49), 4 states have call successors, (8), 2 states have call predecessors, (8), 4 states have return successors, (7), 4 states have call predecessors, (7), 4 states have call successors, (7) [2024-11-28 02:53:47,705 INFO L276 IsEmpty]: Start isEmpty. Operand 2130 states and 2783 transitions. [2024-11-28 02:53:47,706 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2024-11-28 02:53:47,707 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 02:53:47,707 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 02:53:47,707 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable14 [2024-11-28 02:53:47,707 INFO L396 AbstractCegarLoop]: === Iteration 16 === Targeting error1Err0ASSERT_VIOLATIONERROR_FUNCTION === [error1Err0ASSERT_VIOLATIONERROR_FUNCTION, error2Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 02:53:47,708 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 02:53:47,708 INFO L85 PathProgramCache]: Analyzing trace with hash 519199385, now seen corresponding path program 1 times [2024-11-28 02:53:47,708 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 02:53:47,708 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1050841007] [2024-11-28 02:53:47,708 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:53:47,708 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 02:53:47,717 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 02:53:47,789 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-28 02:53:47,790 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 02:53:47,790 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1050841007] [2024-11-28 02:53:47,790 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1050841007] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 02:53:47,790 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 02:53:47,790 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-11-28 02:53:47,790 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [788044786] [2024-11-28 02:53:47,790 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 02:53:47,790 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-11-28 02:53:47,790 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 02:53:47,791 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-11-28 02:53:47,791 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2024-11-28 02:53:47,791 INFO L87 Difference]: Start difference. First operand 2130 states and 2783 transitions. Second operand has 6 states, 6 states have (on average 8.333333333333334) internal successors, (50), 5 states have internal predecessors, (50), 2 states have call successors, (8), 2 states have call predecessors, (8), 3 states have return successors, (7), 3 states have call predecessors, (7), 2 states have call successors, (7) [2024-11-28 02:53:48,075 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 02:53:48,075 INFO L93 Difference]: Finished difference Result 2973 states and 3910 transitions. [2024-11-28 02:53:48,075 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-28 02:53:48,076 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 8.333333333333334) internal successors, (50), 5 states have internal predecessors, (50), 2 states have call successors, (8), 2 states have call predecessors, (8), 3 states have return successors, (7), 3 states have call predecessors, (7), 2 states have call successors, (7) Word has length 65 [2024-11-28 02:53:48,076 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 02:53:48,088 INFO L225 Difference]: With dead ends: 2973 [2024-11-28 02:53:48,089 INFO L226 Difference]: Without dead ends: 2175 [2024-11-28 02:53:48,091 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2024-11-28 02:53:48,093 INFO L435 NwaCegarLoop]: 294 mSDtfsCounter, 0 mSDsluCounter, 1171 mSDsCounter, 0 mSdLazyCounter, 19 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 1465 SdHoareTripleChecker+Invalid, 19 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 19 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-28 02:53:48,093 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 1465 Invalid, 19 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 19 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-28 02:53:48,096 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2175 states. [2024-11-28 02:53:48,347 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2175 to 2175. [2024-11-28 02:53:48,350 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2175 states, 1733 states have (on average 1.3127524523946912) internal successors, (2275), 1762 states have internal predecessors, (2275), 250 states have call successors, (250), 161 states have call predecessors, (250), 190 states have return successors, (303), 256 states have call predecessors, (303), 246 states have call successors, (303) [2024-11-28 02:53:48,359 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2175 states to 2175 states and 2828 transitions. [2024-11-28 02:53:48,362 INFO L78 Accepts]: Start accepts. Automaton has 2175 states and 2828 transitions. Word has length 65 [2024-11-28 02:53:48,362 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 02:53:48,362 INFO L471 AbstractCegarLoop]: Abstraction has 2175 states and 2828 transitions. [2024-11-28 02:53:48,362 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 8.333333333333334) internal successors, (50), 5 states have internal predecessors, (50), 2 states have call successors, (8), 2 states have call predecessors, (8), 3 states have return successors, (7), 3 states have call predecessors, (7), 2 states have call successors, (7) [2024-11-28 02:53:48,363 INFO L276 IsEmpty]: Start isEmpty. Operand 2175 states and 2828 transitions. [2024-11-28 02:53:48,364 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2024-11-28 02:53:48,364 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 02:53:48,364 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 02:53:48,364 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable15 [2024-11-28 02:53:48,365 INFO L396 AbstractCegarLoop]: === Iteration 17 === Targeting error1Err0ASSERT_VIOLATIONERROR_FUNCTION === [error1Err0ASSERT_VIOLATIONERROR_FUNCTION, error2Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 02:53:48,366 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 02:53:48,366 INFO L85 PathProgramCache]: Analyzing trace with hash -1852539877, now seen corresponding path program 1 times [2024-11-28 02:53:48,366 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 02:53:48,366 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1885172811] [2024-11-28 02:53:48,367 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:53:48,367 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 02:53:48,380 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 02:53:48,547 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-28 02:53:48,547 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 02:53:48,547 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1885172811] [2024-11-28 02:53:48,547 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1885172811] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 02:53:48,547 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 02:53:48,547 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-11-28 02:53:48,547 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1966340892] [2024-11-28 02:53:48,547 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 02:53:48,547 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-11-28 02:53:48,547 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 02:53:48,548 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-11-28 02:53:48,548 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2024-11-28 02:53:48,548 INFO L87 Difference]: Start difference. First operand 2175 states and 2828 transitions. Second operand has 6 states, 6 states have (on average 8.333333333333334) internal successors, (50), 6 states have internal predecessors, (50), 3 states have call successors, (8), 3 states have call predecessors, (8), 3 states have return successors, (7), 3 states have call predecessors, (7), 3 states have call successors, (7) [2024-11-28 02:53:49,389 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 02:53:49,389 INFO L93 Difference]: Finished difference Result 3072 states and 3978 transitions. [2024-11-28 02:53:49,389 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2024-11-28 02:53:49,390 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 8.333333333333334) internal successors, (50), 6 states have internal predecessors, (50), 3 states have call successors, (8), 3 states have call predecessors, (8), 3 states have return successors, (7), 3 states have call predecessors, (7), 3 states have call successors, (7) Word has length 65 [2024-11-28 02:53:49,390 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 02:53:49,401 INFO L225 Difference]: With dead ends: 3072 [2024-11-28 02:53:49,401 INFO L226 Difference]: Without dead ends: 2314 [2024-11-28 02:53:49,404 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 10 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=30, Invalid=60, Unknown=0, NotChecked=0, Total=90 [2024-11-28 02:53:49,405 INFO L435 NwaCegarLoop]: 189 mSDtfsCounter, 434 mSDsluCounter, 538 mSDsCounter, 0 mSdLazyCounter, 650 mSolverCounterSat, 70 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 455 SdHoareTripleChecker+Valid, 727 SdHoareTripleChecker+Invalid, 720 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 70 IncrementalHoareTripleChecker+Valid, 650 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2024-11-28 02:53:49,405 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [455 Valid, 727 Invalid, 720 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [70 Valid, 650 Invalid, 0 Unknown, 0 Unchecked, 0.6s Time] [2024-11-28 02:53:49,408 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2314 states. [2024-11-28 02:53:49,635 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2314 to 2184. [2024-11-28 02:53:49,638 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2184 states, 1742 states have (on average 1.3099885189437428) internal successors, (2282), 1769 states have internal predecessors, (2282), 251 states have call successors, (251), 162 states have call predecessors, (251), 189 states have return successors, (298), 257 states have call predecessors, (298), 247 states have call successors, (298) [2024-11-28 02:53:49,645 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2184 states to 2184 states and 2831 transitions. [2024-11-28 02:53:49,648 INFO L78 Accepts]: Start accepts. Automaton has 2184 states and 2831 transitions. Word has length 65 [2024-11-28 02:53:49,648 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 02:53:49,649 INFO L471 AbstractCegarLoop]: Abstraction has 2184 states and 2831 transitions. [2024-11-28 02:53:49,649 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 8.333333333333334) internal successors, (50), 6 states have internal predecessors, (50), 3 states have call successors, (8), 3 states have call predecessors, (8), 3 states have return successors, (7), 3 states have call predecessors, (7), 3 states have call successors, (7) [2024-11-28 02:53:49,649 INFO L276 IsEmpty]: Start isEmpty. Operand 2184 states and 2831 transitions. [2024-11-28 02:53:49,650 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2024-11-28 02:53:49,650 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 02:53:49,650 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 02:53:49,650 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable16 [2024-11-28 02:53:49,651 INFO L396 AbstractCegarLoop]: === Iteration 18 === Targeting error1Err0ASSERT_VIOLATIONERROR_FUNCTION === [error1Err0ASSERT_VIOLATIONERROR_FUNCTION, error2Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 02:53:49,651 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 02:53:49,651 INFO L85 PathProgramCache]: Analyzing trace with hash -1633685159, now seen corresponding path program 1 times [2024-11-28 02:53:49,651 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 02:53:49,651 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1148967421] [2024-11-28 02:53:49,651 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:53:49,652 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 02:53:49,662 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 02:53:49,703 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-28 02:53:49,703 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 02:53:49,703 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1148967421] [2024-11-28 02:53:49,703 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1148967421] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 02:53:49,704 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 02:53:49,704 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-28 02:53:49,704 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [714515921] [2024-11-28 02:53:49,704 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 02:53:49,704 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-28 02:53:49,704 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 02:53:49,704 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-28 02:53:49,704 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-28 02:53:49,705 INFO L87 Difference]: Start difference. First operand 2184 states and 2831 transitions. Second operand has 4 states, 4 states have (on average 12.5) internal successors, (50), 4 states have internal predecessors, (50), 4 states have call successors, (8), 3 states have call predecessors, (8), 2 states have return successors, (7), 3 states have call predecessors, (7), 3 states have call successors, (7) [2024-11-28 02:53:50,329 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 02:53:50,330 INFO L93 Difference]: Finished difference Result 3874 states and 5065 transitions. [2024-11-28 02:53:50,330 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-11-28 02:53:50,330 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 12.5) internal successors, (50), 4 states have internal predecessors, (50), 4 states have call successors, (8), 3 states have call predecessors, (8), 2 states have return successors, (7), 3 states have call predecessors, (7), 3 states have call successors, (7) Word has length 65 [2024-11-28 02:53:50,331 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 02:53:50,346 INFO L225 Difference]: With dead ends: 3874 [2024-11-28 02:53:50,346 INFO L226 Difference]: Without dead ends: 3025 [2024-11-28 02:53:50,349 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-11-28 02:53:50,350 INFO L435 NwaCegarLoop]: 175 mSDtfsCounter, 389 mSDsluCounter, 197 mSDsCounter, 0 mSdLazyCounter, 231 mSolverCounterSat, 66 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 409 SdHoareTripleChecker+Valid, 372 SdHoareTripleChecker+Invalid, 297 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 66 IncrementalHoareTripleChecker+Valid, 231 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2024-11-28 02:53:50,350 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [409 Valid, 372 Invalid, 297 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [66 Valid, 231 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2024-11-28 02:53:50,353 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3025 states. [2024-11-28 02:53:50,687 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3025 to 3015. [2024-11-28 02:53:50,699 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3015 states, 2378 states have (on average 1.2981497056349873) internal successors, (3087), 2418 states have internal predecessors, (3087), 355 states have call successors, (355), 226 states have call predecessors, (355), 280 states have return successors, (475), 378 states have call predecessors, (475), 351 states have call successors, (475) [2024-11-28 02:53:50,709 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3015 states to 3015 states and 3917 transitions. [2024-11-28 02:53:50,712 INFO L78 Accepts]: Start accepts. Automaton has 3015 states and 3917 transitions. Word has length 65 [2024-11-28 02:53:50,712 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 02:53:50,712 INFO L471 AbstractCegarLoop]: Abstraction has 3015 states and 3917 transitions. [2024-11-28 02:53:50,713 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 12.5) internal successors, (50), 4 states have internal predecessors, (50), 4 states have call successors, (8), 3 states have call predecessors, (8), 2 states have return successors, (7), 3 states have call predecessors, (7), 3 states have call successors, (7) [2024-11-28 02:53:50,714 INFO L276 IsEmpty]: Start isEmpty. Operand 3015 states and 3917 transitions. [2024-11-28 02:53:50,717 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2024-11-28 02:53:50,717 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 02:53:50,718 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 02:53:50,718 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable17 [2024-11-28 02:53:50,718 INFO L396 AbstractCegarLoop]: === Iteration 19 === Targeting error1Err0ASSERT_VIOLATIONERROR_FUNCTION === [error1Err0ASSERT_VIOLATIONERROR_FUNCTION, error2Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 02:53:50,719 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 02:53:50,719 INFO L85 PathProgramCache]: Analyzing trace with hash 1233207275, now seen corresponding path program 1 times [2024-11-28 02:53:50,719 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 02:53:50,719 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1317481787] [2024-11-28 02:53:50,719 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:53:50,719 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 02:53:50,740 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 02:53:50,774 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-28 02:53:50,774 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 02:53:50,775 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1317481787] [2024-11-28 02:53:50,775 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1317481787] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 02:53:50,775 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 02:53:50,775 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2024-11-28 02:53:50,775 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1240511854] [2024-11-28 02:53:50,775 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 02:53:50,776 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2024-11-28 02:53:50,776 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 02:53:50,777 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2024-11-28 02:53:50,777 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-11-28 02:53:50,777 INFO L87 Difference]: Start difference. First operand 3015 states and 3917 transitions. Second operand has 3 states, 3 states have (on average 17.0) internal successors, (51), 3 states have internal predecessors, (51), 3 states have call successors, (8), 2 states have call predecessors, (8), 1 states have return successors, (7), 2 states have call predecessors, (7), 2 states have call successors, (7) [2024-11-28 02:53:51,201 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 02:53:51,201 INFO L93 Difference]: Finished difference Result 4559 states and 6005 transitions. [2024-11-28 02:53:51,202 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-11-28 02:53:51,202 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 17.0) internal successors, (51), 3 states have internal predecessors, (51), 3 states have call successors, (8), 2 states have call predecessors, (8), 1 states have return successors, (7), 2 states have call predecessors, (7), 2 states have call successors, (7) Word has length 66 [2024-11-28 02:53:51,202 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 02:53:51,210 INFO L225 Difference]: With dead ends: 4559 [2024-11-28 02:53:51,210 INFO L226 Difference]: Without dead ends: 1312 [2024-11-28 02:53:51,217 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-11-28 02:53:51,218 INFO L435 NwaCegarLoop]: 281 mSDtfsCounter, 264 mSDsluCounter, 0 mSDsCounter, 0 mSdLazyCounter, 2 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 264 SdHoareTripleChecker+Valid, 281 SdHoareTripleChecker+Invalid, 4 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 2 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-28 02:53:51,219 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [264 Valid, 281 Invalid, 4 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 2 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-28 02:53:51,221 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1312 states. [2024-11-28 02:53:51,324 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1312 to 1312. [2024-11-28 02:53:51,326 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1312 states, 1061 states have (on average 1.30631479736098) internal successors, (1386), 1075 states have internal predecessors, (1386), 148 states have call successors, (148), 97 states have call predecessors, (148), 102 states have return successors, (161), 141 states have call predecessors, (161), 146 states have call successors, (161) [2024-11-28 02:53:51,330 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1312 states to 1312 states and 1695 transitions. [2024-11-28 02:53:51,333 INFO L78 Accepts]: Start accepts. Automaton has 1312 states and 1695 transitions. Word has length 66 [2024-11-28 02:53:51,333 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 02:53:51,333 INFO L471 AbstractCegarLoop]: Abstraction has 1312 states and 1695 transitions. [2024-11-28 02:53:51,334 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 17.0) internal successors, (51), 3 states have internal predecessors, (51), 3 states have call successors, (8), 2 states have call predecessors, (8), 1 states have return successors, (7), 2 states have call predecessors, (7), 2 states have call successors, (7) [2024-11-28 02:53:51,334 INFO L276 IsEmpty]: Start isEmpty. Operand 1312 states and 1695 transitions. [2024-11-28 02:53:51,336 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 91 [2024-11-28 02:53:51,336 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 02:53:51,337 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 02:53:51,337 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable18 [2024-11-28 02:53:51,337 INFO L396 AbstractCegarLoop]: === Iteration 20 === Targeting error2Err0ASSERT_VIOLATIONERROR_FUNCTION === [error1Err0ASSERT_VIOLATIONERROR_FUNCTION, error2Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 02:53:51,338 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 02:53:51,338 INFO L85 PathProgramCache]: Analyzing trace with hash 1335294027, now seen corresponding path program 1 times [2024-11-28 02:53:51,338 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 02:53:51,338 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1423550930] [2024-11-28 02:53:51,338 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:53:51,338 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 02:53:51,354 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 02:53:51,442 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2024-11-28 02:53:51,443 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 02:53:51,443 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1423550930] [2024-11-28 02:53:51,443 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1423550930] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 02:53:51,443 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 02:53:51,443 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-28 02:53:51,444 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1408555956] [2024-11-28 02:53:51,444 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 02:53:51,444 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-28 02:53:51,444 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 02:53:51,445 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-28 02:53:51,445 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-28 02:53:51,445 INFO L87 Difference]: Start difference. First operand 1312 states and 1695 transitions. Second operand has 4 states, 4 states have (on average 14.0) internal successors, (56), 4 states have internal predecessors, (56), 4 states have call successors, (9), 3 states have call predecessors, (9), 2 states have return successors, (8), 4 states have call predecessors, (8), 4 states have call successors, (8) [2024-11-28 02:53:51,839 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 02:53:51,839 INFO L93 Difference]: Finished difference Result 3739 states and 4910 transitions. [2024-11-28 02:53:51,839 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-11-28 02:53:51,839 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 14.0) internal successors, (56), 4 states have internal predecessors, (56), 4 states have call successors, (9), 3 states have call predecessors, (9), 2 states have return successors, (8), 4 states have call predecessors, (8), 4 states have call successors, (8) Word has length 90 [2024-11-28 02:53:51,840 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 02:53:51,859 INFO L225 Difference]: With dead ends: 3739 [2024-11-28 02:53:51,863 INFO L226 Difference]: Without dead ends: 2441 [2024-11-28 02:53:51,867 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-11-28 02:53:51,868 INFO L435 NwaCegarLoop]: 144 mSDtfsCounter, 169 mSDsluCounter, 178 mSDsCounter, 0 mSdLazyCounter, 115 mSolverCounterSat, 37 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 175 SdHoareTripleChecker+Valid, 322 SdHoareTripleChecker+Invalid, 152 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 37 IncrementalHoareTripleChecker+Valid, 115 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-11-28 02:53:51,870 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [175 Valid, 322 Invalid, 152 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [37 Valid, 115 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-11-28 02:53:51,873 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2441 states. [2024-11-28 02:53:52,092 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2441 to 2395. [2024-11-28 02:53:52,095 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2395 states, 1912 states have (on average 1.2939330543933054) internal successors, (2474), 1946 states have internal predecessors, (2474), 279 states have call successors, (279), 179 states have call predecessors, (279), 203 states have return successors, (370), 273 states have call predecessors, (370), 277 states have call successors, (370) [2024-11-28 02:53:52,103 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2395 states to 2395 states and 3123 transitions. [2024-11-28 02:53:52,106 INFO L78 Accepts]: Start accepts. Automaton has 2395 states and 3123 transitions. Word has length 90 [2024-11-28 02:53:52,106 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 02:53:52,106 INFO L471 AbstractCegarLoop]: Abstraction has 2395 states and 3123 transitions. [2024-11-28 02:53:52,106 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 14.0) internal successors, (56), 4 states have internal predecessors, (56), 4 states have call successors, (9), 3 states have call predecessors, (9), 2 states have return successors, (8), 4 states have call predecessors, (8), 4 states have call successors, (8) [2024-11-28 02:53:52,106 INFO L276 IsEmpty]: Start isEmpty. Operand 2395 states and 3123 transitions. [2024-11-28 02:53:52,108 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 91 [2024-11-28 02:53:52,109 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 02:53:52,109 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 02:53:52,110 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable19 [2024-11-28 02:53:52,110 INFO L396 AbstractCegarLoop]: === Iteration 21 === Targeting error2Err0ASSERT_VIOLATIONERROR_FUNCTION === [error1Err0ASSERT_VIOLATIONERROR_FUNCTION, error2Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 02:53:52,111 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 02:53:52,111 INFO L85 PathProgramCache]: Analyzing trace with hash 277455949, now seen corresponding path program 1 times [2024-11-28 02:53:52,111 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 02:53:52,112 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1836491287] [2024-11-28 02:53:52,112 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:53:52,112 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 02:53:52,122 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 02:53:52,148 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-11-28 02:53:52,148 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 02:53:52,148 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1836491287] [2024-11-28 02:53:52,148 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1836491287] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 02:53:52,148 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 02:53:52,148 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2024-11-28 02:53:52,148 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1260309242] [2024-11-28 02:53:52,148 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 02:53:52,148 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2024-11-28 02:53:52,149 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 02:53:52,149 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2024-11-28 02:53:52,149 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-11-28 02:53:52,149 INFO L87 Difference]: Start difference. First operand 2395 states and 3123 transitions. Second operand has 3 states, 3 states have (on average 17.333333333333332) internal successors, (52), 3 states have internal predecessors, (52), 3 states have call successors, (8), 2 states have call predecessors, (8), 1 states have return successors, (7), 3 states have call predecessors, (7), 3 states have call successors, (7) [2024-11-28 02:53:52,334 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 02:53:52,334 INFO L93 Difference]: Finished difference Result 4262 states and 5537 transitions. [2024-11-28 02:53:52,334 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-11-28 02:53:52,334 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 17.333333333333332) internal successors, (52), 3 states have internal predecessors, (52), 3 states have call successors, (8), 2 states have call predecessors, (8), 1 states have return successors, (7), 3 states have call predecessors, (7), 3 states have call successors, (7) Word has length 90 [2024-11-28 02:53:52,335 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 02:53:52,344 INFO L225 Difference]: With dead ends: 4262 [2024-11-28 02:53:52,344 INFO L226 Difference]: Without dead ends: 1881 [2024-11-28 02:53:52,349 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-11-28 02:53:52,351 INFO L435 NwaCegarLoop]: 150 mSDtfsCounter, 144 mSDsluCounter, 1 mSDsCounter, 0 mSdLazyCounter, 2 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 144 SdHoareTripleChecker+Valid, 151 SdHoareTripleChecker+Invalid, 2 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 2 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-28 02:53:52,351 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [144 Valid, 151 Invalid, 2 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 2 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-28 02:53:52,354 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1881 states. [2024-11-28 02:53:52,529 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1881 to 1881. [2024-11-28 02:53:52,531 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1881 states, 1510 states have (on average 1.290728476821192) internal successors, (1949), 1537 states have internal predecessors, (1949), 211 states have call successors, (211), 138 states have call predecessors, (211), 159 states have return successors, (276), 207 states have call predecessors, (276), 209 states have call successors, (276) [2024-11-28 02:53:52,537 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1881 states to 1881 states and 2436 transitions. [2024-11-28 02:53:52,540 INFO L78 Accepts]: Start accepts. Automaton has 1881 states and 2436 transitions. Word has length 90 [2024-11-28 02:53:52,540 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 02:53:52,540 INFO L471 AbstractCegarLoop]: Abstraction has 1881 states and 2436 transitions. [2024-11-28 02:53:52,540 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 17.333333333333332) internal successors, (52), 3 states have internal predecessors, (52), 3 states have call successors, (8), 2 states have call predecessors, (8), 1 states have return successors, (7), 3 states have call predecessors, (7), 3 states have call successors, (7) [2024-11-28 02:53:52,541 INFO L276 IsEmpty]: Start isEmpty. Operand 1881 states and 2436 transitions. [2024-11-28 02:53:52,542 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2024-11-28 02:53:52,542 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 02:53:52,543 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 02:53:52,543 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable20 [2024-11-28 02:53:52,543 INFO L396 AbstractCegarLoop]: === Iteration 22 === Targeting error2Err0ASSERT_VIOLATIONERROR_FUNCTION === [error1Err0ASSERT_VIOLATIONERROR_FUNCTION, error2Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 02:53:52,543 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 02:53:52,543 INFO L85 PathProgramCache]: Analyzing trace with hash -325309394, now seen corresponding path program 1 times [2024-11-28 02:53:52,544 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 02:53:52,544 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [472889007] [2024-11-28 02:53:52,544 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:53:52,544 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 02:53:52,556 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 02:53:52,637 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 9 proven. 0 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2024-11-28 02:53:52,638 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 02:53:52,638 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [472889007] [2024-11-28 02:53:52,638 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [472889007] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 02:53:52,638 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 02:53:52,638 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2024-11-28 02:53:52,638 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [745467540] [2024-11-28 02:53:52,638 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 02:53:52,639 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2024-11-28 02:53:52,639 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 02:53:52,639 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-11-28 02:53:52,639 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2024-11-28 02:53:52,640 INFO L87 Difference]: Start difference. First operand 1881 states and 2436 transitions. Second operand has 7 states, 7 states have (on average 8.714285714285714) internal successors, (61), 6 states have internal predecessors, (61), 4 states have call successors, (9), 3 states have call predecessors, (9), 3 states have return successors, (8), 3 states have call predecessors, (8), 3 states have call successors, (8) [2024-11-28 02:53:53,563 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 02:53:53,564 INFO L93 Difference]: Finished difference Result 5192 states and 6782 transitions. [2024-11-28 02:53:53,564 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2024-11-28 02:53:53,564 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 8.714285714285714) internal successors, (61), 6 states have internal predecessors, (61), 4 states have call successors, (9), 3 states have call predecessors, (9), 3 states have return successors, (8), 3 states have call predecessors, (8), 3 states have call successors, (8) Word has length 92 [2024-11-28 02:53:53,565 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 02:53:53,577 INFO L225 Difference]: With dead ends: 5192 [2024-11-28 02:53:53,577 INFO L226 Difference]: Without dead ends: 2550 [2024-11-28 02:53:53,583 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 11 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 39 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=71, Invalid=201, Unknown=0, NotChecked=0, Total=272 [2024-11-28 02:53:53,585 INFO L435 NwaCegarLoop]: 166 mSDtfsCounter, 843 mSDsluCounter, 550 mSDsCounter, 0 mSdLazyCounter, 479 mSolverCounterSat, 235 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 855 SdHoareTripleChecker+Valid, 716 SdHoareTripleChecker+Invalid, 714 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 235 IncrementalHoareTripleChecker+Valid, 479 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2024-11-28 02:53:53,585 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [855 Valid, 716 Invalid, 714 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [235 Valid, 479 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2024-11-28 02:53:53,588 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2550 states. [2024-11-28 02:53:53,830 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2550 to 2500. [2024-11-28 02:53:53,832 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2500 states, 2032 states have (on average 1.2411417322834646) internal successors, (2522), 2064 states have internal predecessors, (2522), 255 states have call successors, (255), 180 states have call predecessors, (255), 212 states have return successors, (329), 257 states have call predecessors, (329), 253 states have call successors, (329) [2024-11-28 02:53:53,839 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2500 states to 2500 states and 3106 transitions. [2024-11-28 02:53:53,842 INFO L78 Accepts]: Start accepts. Automaton has 2500 states and 3106 transitions. Word has length 92 [2024-11-28 02:53:53,842 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 02:53:53,843 INFO L471 AbstractCegarLoop]: Abstraction has 2500 states and 3106 transitions. [2024-11-28 02:53:53,843 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 8.714285714285714) internal successors, (61), 6 states have internal predecessors, (61), 4 states have call successors, (9), 3 states have call predecessors, (9), 3 states have return successors, (8), 3 states have call predecessors, (8), 3 states have call successors, (8) [2024-11-28 02:53:53,843 INFO L276 IsEmpty]: Start isEmpty. Operand 2500 states and 3106 transitions. [2024-11-28 02:53:53,846 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 133 [2024-11-28 02:53:53,846 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 02:53:53,846 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 02:53:53,846 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable21 [2024-11-28 02:53:53,846 INFO L396 AbstractCegarLoop]: === Iteration 23 === Targeting error2Err0ASSERT_VIOLATIONERROR_FUNCTION === [error1Err0ASSERT_VIOLATIONERROR_FUNCTION, error2Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 02:53:53,847 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 02:53:53,847 INFO L85 PathProgramCache]: Analyzing trace with hash 103710680, now seen corresponding path program 1 times [2024-11-28 02:53:53,847 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 02:53:53,847 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1422460682] [2024-11-28 02:53:53,847 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:53:53,847 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 02:53:53,861 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 02:53:53,980 INFO L134 CoverageAnalysis]: Checked inductivity of 76 backedges. 20 proven. 3 refuted. 0 times theorem prover too weak. 53 trivial. 0 not checked. [2024-11-28 02:53:53,980 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 02:53:53,980 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1422460682] [2024-11-28 02:53:53,980 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1422460682] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-28 02:53:53,981 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [361871209] [2024-11-28 02:53:53,981 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:53:53,981 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-28 02:53:53,981 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4d5c9a20-2d38-4680-bc84-99c8d1b727a2/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 02:53:53,985 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4d5c9a20-2d38-4680-bc84-99c8d1b727a2/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-28 02:53:53,987 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4d5c9a20-2d38-4680-bc84-99c8d1b727a2/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2024-11-28 02:53:54,118 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 02:53:54,120 INFO L256 TraceCheckSpWp]: Trace formula consists of 428 conjuncts, 2 conjuncts are in the unsatisfiable core [2024-11-28 02:53:54,128 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-28 02:53:54,207 INFO L134 CoverageAnalysis]: Checked inductivity of 76 backedges. 59 proven. 0 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2024-11-28 02:53:54,207 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-11-28 02:53:54,208 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [361871209] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 02:53:54,208 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-11-28 02:53:54,208 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [7] total 8 [2024-11-28 02:53:54,208 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [817996258] [2024-11-28 02:53:54,208 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 02:53:54,209 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2024-11-28 02:53:54,209 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 02:53:54,209 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2024-11-28 02:53:54,209 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=43, Unknown=0, NotChecked=0, Total=56 [2024-11-28 02:53:54,209 INFO L87 Difference]: Start difference. First operand 2500 states and 3106 transitions. Second operand has 3 states, 3 states have (on average 31.333333333333332) internal successors, (94), 3 states have internal predecessors, (94), 3 states have call successors, (12), 3 states have call predecessors, (12), 3 states have return successors, (11), 3 states have call predecessors, (11), 3 states have call successors, (11) [2024-11-28 02:53:54,537 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 02:53:54,537 INFO L93 Difference]: Finished difference Result 4730 states and 5991 transitions. [2024-11-28 02:53:54,538 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-11-28 02:53:54,538 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 31.333333333333332) internal successors, (94), 3 states have internal predecessors, (94), 3 states have call successors, (12), 3 states have call predecessors, (12), 3 states have return successors, (11), 3 states have call predecessors, (11), 3 states have call successors, (11) Word has length 132 [2024-11-28 02:53:54,538 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 02:53:54,550 INFO L225 Difference]: With dead ends: 4730 [2024-11-28 02:53:54,550 INFO L226 Difference]: Without dead ends: 2303 [2024-11-28 02:53:54,555 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 139 GetRequests, 133 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=43, Unknown=0, NotChecked=0, Total=56 [2024-11-28 02:53:54,556 INFO L435 NwaCegarLoop]: 148 mSDtfsCounter, 109 mSDsluCounter, 22 mSDsCounter, 0 mSdLazyCounter, 7 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 109 SdHoareTripleChecker+Valid, 170 SdHoareTripleChecker+Invalid, 11 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 7 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-28 02:53:54,556 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [109 Valid, 170 Invalid, 11 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 7 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-28 02:53:54,559 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2303 states. [2024-11-28 02:53:54,761 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2303 to 2297. [2024-11-28 02:53:54,763 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2297 states, 1875 states have (on average 1.1914666666666667) internal successors, (2234), 1897 states have internal predecessors, (2234), 230 states have call successors, (230), 169 states have call predecessors, (230), 191 states have return successors, (272), 231 states have call predecessors, (272), 228 states have call successors, (272) [2024-11-28 02:53:54,768 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2297 states to 2297 states and 2736 transitions. [2024-11-28 02:53:54,772 INFO L78 Accepts]: Start accepts. Automaton has 2297 states and 2736 transitions. Word has length 132 [2024-11-28 02:53:54,772 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 02:53:54,773 INFO L471 AbstractCegarLoop]: Abstraction has 2297 states and 2736 transitions. [2024-11-28 02:53:54,773 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 31.333333333333332) internal successors, (94), 3 states have internal predecessors, (94), 3 states have call successors, (12), 3 states have call predecessors, (12), 3 states have return successors, (11), 3 states have call predecessors, (11), 3 states have call successors, (11) [2024-11-28 02:53:54,773 INFO L276 IsEmpty]: Start isEmpty. Operand 2297 states and 2736 transitions. [2024-11-28 02:53:54,775 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 133 [2024-11-28 02:53:54,775 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 02:53:54,775 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 02:53:54,785 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4d5c9a20-2d38-4680-bc84-99c8d1b727a2/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Ended with exit code 0 [2024-11-28 02:53:54,979 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable22,2 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4d5c9a20-2d38-4680-bc84-99c8d1b727a2/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-28 02:53:54,980 INFO L396 AbstractCegarLoop]: === Iteration 24 === Targeting error2Err0ASSERT_VIOLATIONERROR_FUNCTION === [error1Err0ASSERT_VIOLATIONERROR_FUNCTION, error2Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 02:53:54,980 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 02:53:54,981 INFO L85 PathProgramCache]: Analyzing trace with hash -338741835, now seen corresponding path program 1 times [2024-11-28 02:53:54,981 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 02:53:54,981 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [219209052] [2024-11-28 02:53:54,981 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:53:54,981 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 02:53:54,994 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 02:53:55,089 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 20 proven. 3 refuted. 0 times theorem prover too weak. 55 trivial. 0 not checked. [2024-11-28 02:53:55,089 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 02:53:55,089 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [219209052] [2024-11-28 02:53:55,089 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [219209052] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-28 02:53:55,089 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [667767719] [2024-11-28 02:53:55,089 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:53:55,090 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-28 02:53:55,090 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4d5c9a20-2d38-4680-bc84-99c8d1b727a2/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 02:53:55,091 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4d5c9a20-2d38-4680-bc84-99c8d1b727a2/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-28 02:53:55,094 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4d5c9a20-2d38-4680-bc84-99c8d1b727a2/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2024-11-28 02:53:55,218 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 02:53:55,220 INFO L256 TraceCheckSpWp]: Trace formula consists of 424 conjuncts, 2 conjuncts are in the unsatisfiable core [2024-11-28 02:53:55,223 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-28 02:53:55,256 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 58 proven. 0 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2024-11-28 02:53:55,259 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-11-28 02:53:55,259 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [667767719] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 02:53:55,259 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-11-28 02:53:55,259 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [7] total 8 [2024-11-28 02:53:55,260 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2063001161] [2024-11-28 02:53:55,260 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 02:53:55,260 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2024-11-28 02:53:55,260 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 02:53:55,260 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2024-11-28 02:53:55,261 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=42, Unknown=0, NotChecked=0, Total=56 [2024-11-28 02:53:55,261 INFO L87 Difference]: Start difference. First operand 2297 states and 2736 transitions. Second operand has 3 states, 3 states have (on average 30.666666666666668) internal successors, (92), 3 states have internal predecessors, (92), 3 states have call successors, (12), 3 states have call predecessors, (12), 2 states have return successors, (11), 2 states have call predecessors, (11), 3 states have call successors, (11) [2024-11-28 02:53:55,452 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 02:53:55,452 INFO L93 Difference]: Finished difference Result 3467 states and 4126 transitions. [2024-11-28 02:53:55,453 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-11-28 02:53:55,453 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 30.666666666666668) internal successors, (92), 3 states have internal predecessors, (92), 3 states have call successors, (12), 3 states have call predecessors, (12), 2 states have return successors, (11), 2 states have call predecessors, (11), 3 states have call successors, (11) Word has length 132 [2024-11-28 02:53:55,453 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 02:53:55,463 INFO L225 Difference]: With dead ends: 3467 [2024-11-28 02:53:55,465 INFO L226 Difference]: Without dead ends: 1038 [2024-11-28 02:53:55,469 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 139 GetRequests, 133 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=14, Invalid=42, Unknown=0, NotChecked=0, Total=56 [2024-11-28 02:53:55,470 INFO L435 NwaCegarLoop]: 201 mSDtfsCounter, 110 mSDsluCounter, 120 mSDsCounter, 0 mSdLazyCounter, 8 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 110 SdHoareTripleChecker+Valid, 321 SdHoareTripleChecker+Invalid, 9 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 8 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-28 02:53:55,470 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [110 Valid, 321 Invalid, 9 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 8 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-28 02:53:55,471 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1038 states. [2024-11-28 02:53:55,565 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1038 to 1038. [2024-11-28 02:53:55,566 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1038 states, 843 states have (on average 1.1613285883748516) internal successors, (979), 852 states have internal predecessors, (979), 112 states have call successors, (112), 79 states have call predecessors, (112), 82 states have return successors, (114), 107 states have call predecessors, (114), 110 states have call successors, (114) [2024-11-28 02:53:55,569 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1038 states to 1038 states and 1205 transitions. [2024-11-28 02:53:55,572 INFO L78 Accepts]: Start accepts. Automaton has 1038 states and 1205 transitions. Word has length 132 [2024-11-28 02:53:55,572 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 02:53:55,572 INFO L471 AbstractCegarLoop]: Abstraction has 1038 states and 1205 transitions. [2024-11-28 02:53:55,572 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 30.666666666666668) internal successors, (92), 3 states have internal predecessors, (92), 3 states have call successors, (12), 3 states have call predecessors, (12), 2 states have return successors, (11), 2 states have call predecessors, (11), 3 states have call successors, (11) [2024-11-28 02:53:55,573 INFO L276 IsEmpty]: Start isEmpty. Operand 1038 states and 1205 transitions. [2024-11-28 02:53:55,574 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 134 [2024-11-28 02:53:55,574 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 02:53:55,574 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 02:53:55,583 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4d5c9a20-2d38-4680-bc84-99c8d1b727a2/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Ended with exit code 0 [2024-11-28 02:53:55,775 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4d5c9a20-2d38-4680-bc84-99c8d1b727a2/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable23 [2024-11-28 02:53:55,775 INFO L396 AbstractCegarLoop]: === Iteration 25 === Targeting error2Err0ASSERT_VIOLATIONERROR_FUNCTION === [error1Err0ASSERT_VIOLATIONERROR_FUNCTION, error2Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 02:53:55,776 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 02:53:55,776 INFO L85 PathProgramCache]: Analyzing trace with hash 1589779711, now seen corresponding path program 1 times [2024-11-28 02:53:55,776 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 02:53:55,776 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [834008984] [2024-11-28 02:53:55,776 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:53:55,776 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 02:53:55,799 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 02:53:55,840 INFO L134 CoverageAnalysis]: Checked inductivity of 79 backedges. 36 proven. 0 refuted. 0 times theorem prover too weak. 43 trivial. 0 not checked. [2024-11-28 02:53:55,841 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 02:53:55,841 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [834008984] [2024-11-28 02:53:55,841 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [834008984] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 02:53:55,842 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 02:53:55,842 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-28 02:53:55,842 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1842030610] [2024-11-28 02:53:55,842 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 02:53:55,842 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-28 02:53:55,842 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 02:53:55,843 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-28 02:53:55,843 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-28 02:53:55,843 INFO L87 Difference]: Start difference. First operand 1038 states and 1205 transitions. Second operand has 4 states, 4 states have (on average 22.0) internal successors, (88), 4 states have internal predecessors, (88), 3 states have call successors, (11), 2 states have call predecessors, (11), 2 states have return successors, (11), 4 states have call predecessors, (11), 3 states have call successors, (11) [2024-11-28 02:53:56,041 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 02:53:56,041 INFO L93 Difference]: Finished difference Result 1855 states and 2171 transitions. [2024-11-28 02:53:56,042 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-28 02:53:56,042 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 22.0) internal successors, (88), 4 states have internal predecessors, (88), 3 states have call successors, (11), 2 states have call predecessors, (11), 2 states have return successors, (11), 4 states have call predecessors, (11), 3 states have call successors, (11) Word has length 133 [2024-11-28 02:53:56,042 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 02:53:56,049 INFO L225 Difference]: With dead ends: 1855 [2024-11-28 02:53:56,049 INFO L226 Difference]: Without dead ends: 1038 [2024-11-28 02:53:56,051 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-28 02:53:56,051 INFO L435 NwaCegarLoop]: 220 mSDtfsCounter, 200 mSDsluCounter, 169 mSDsCounter, 0 mSdLazyCounter, 65 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 200 SdHoareTripleChecker+Valid, 389 SdHoareTripleChecker+Invalid, 67 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 65 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-28 02:53:56,051 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [200 Valid, 389 Invalid, 67 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 65 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-28 02:53:56,052 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1038 states. [2024-11-28 02:53:56,150 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1038 to 1038. [2024-11-28 02:53:56,151 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1038 states, 843 states have (on average 1.1470937129300118) internal successors, (967), 852 states have internal predecessors, (967), 112 states have call successors, (112), 79 states have call predecessors, (112), 82 states have return successors, (114), 107 states have call predecessors, (114), 110 states have call successors, (114) [2024-11-28 02:53:56,154 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1038 states to 1038 states and 1193 transitions. [2024-11-28 02:53:56,157 INFO L78 Accepts]: Start accepts. Automaton has 1038 states and 1193 transitions. Word has length 133 [2024-11-28 02:53:56,158 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 02:53:56,158 INFO L471 AbstractCegarLoop]: Abstraction has 1038 states and 1193 transitions. [2024-11-28 02:53:56,158 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 22.0) internal successors, (88), 4 states have internal predecessors, (88), 3 states have call successors, (11), 2 states have call predecessors, (11), 2 states have return successors, (11), 4 states have call predecessors, (11), 3 states have call successors, (11) [2024-11-28 02:53:56,158 INFO L276 IsEmpty]: Start isEmpty. Operand 1038 states and 1193 transitions. [2024-11-28 02:53:56,160 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 135 [2024-11-28 02:53:56,160 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 02:53:56,160 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 02:53:56,160 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable24 [2024-11-28 02:53:56,160 INFO L396 AbstractCegarLoop]: === Iteration 26 === Targeting error2Err0ASSERT_VIOLATIONERROR_FUNCTION === [error1Err0ASSERT_VIOLATIONERROR_FUNCTION, error2Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 02:53:56,160 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 02:53:56,161 INFO L85 PathProgramCache]: Analyzing trace with hash 642410623, now seen corresponding path program 1 times [2024-11-28 02:53:56,161 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 02:53:56,161 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2058012386] [2024-11-28 02:53:56,161 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:53:56,161 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 02:53:56,176 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 02:53:56,282 INFO L134 CoverageAnalysis]: Checked inductivity of 80 backedges. 18 proven. 0 refuted. 0 times theorem prover too weak. 62 trivial. 0 not checked. [2024-11-28 02:53:56,285 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 02:53:56,285 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2058012386] [2024-11-28 02:53:56,285 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2058012386] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 02:53:56,286 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 02:53:56,286 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-28 02:53:56,286 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1142977803] [2024-11-28 02:53:56,286 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 02:53:56,286 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-28 02:53:56,286 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 02:53:56,286 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-28 02:53:56,286 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-28 02:53:56,287 INFO L87 Difference]: Start difference. First operand 1038 states and 1193 transitions. Second operand has 4 states, 4 states have (on average 19.75) internal successors, (79), 4 states have internal predecessors, (79), 4 states have call successors, (10), 2 states have call predecessors, (10), 1 states have return successors, (9), 3 states have call predecessors, (9), 3 states have call successors, (9) [2024-11-28 02:53:56,576 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 02:53:56,576 INFO L93 Difference]: Finished difference Result 1043 states and 1197 transitions. [2024-11-28 02:53:56,577 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-28 02:53:56,577 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 19.75) internal successors, (79), 4 states have internal predecessors, (79), 4 states have call successors, (10), 2 states have call predecessors, (10), 1 states have return successors, (9), 3 states have call predecessors, (9), 3 states have call successors, (9) Word has length 134 [2024-11-28 02:53:56,577 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 02:53:56,587 INFO L225 Difference]: With dead ends: 1043 [2024-11-28 02:53:56,588 INFO L226 Difference]: Without dead ends: 1040 [2024-11-28 02:53:56,588 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-28 02:53:56,589 INFO L435 NwaCegarLoop]: 231 mSDtfsCounter, 209 mSDsluCounter, 179 mSDsCounter, 0 mSdLazyCounter, 56 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 209 SdHoareTripleChecker+Valid, 410 SdHoareTripleChecker+Invalid, 57 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 56 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-28 02:53:56,590 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [209 Valid, 410 Invalid, 57 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 56 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-28 02:53:56,591 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1040 states. [2024-11-28 02:53:56,755 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1040 to 1037. [2024-11-28 02:53:56,756 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1037 states, 843 states have (on average 1.143534994068802) internal successors, (964), 851 states have internal predecessors, (964), 111 states have call successors, (111), 79 states have call predecessors, (111), 82 states have return successors, (114), 107 states have call predecessors, (114), 110 states have call successors, (114) [2024-11-28 02:53:56,758 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1037 states to 1037 states and 1189 transitions. [2024-11-28 02:53:56,761 INFO L78 Accepts]: Start accepts. Automaton has 1037 states and 1189 transitions. Word has length 134 [2024-11-28 02:53:56,762 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 02:53:56,762 INFO L471 AbstractCegarLoop]: Abstraction has 1037 states and 1189 transitions. [2024-11-28 02:53:56,762 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 19.75) internal successors, (79), 4 states have internal predecessors, (79), 4 states have call successors, (10), 2 states have call predecessors, (10), 1 states have return successors, (9), 3 states have call predecessors, (9), 3 states have call successors, (9) [2024-11-28 02:53:56,762 INFO L276 IsEmpty]: Start isEmpty. Operand 1037 states and 1189 transitions. [2024-11-28 02:53:56,764 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 139 [2024-11-28 02:53:56,764 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 02:53:56,765 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 02:53:56,765 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable25 [2024-11-28 02:53:56,765 INFO L396 AbstractCegarLoop]: === Iteration 27 === Targeting error2Err0ASSERT_VIOLATIONERROR_FUNCTION === [error1Err0ASSERT_VIOLATIONERROR_FUNCTION, error2Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 02:53:56,765 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 02:53:56,766 INFO L85 PathProgramCache]: Analyzing trace with hash 1316192999, now seen corresponding path program 1 times [2024-11-28 02:53:56,766 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 02:53:56,766 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [252327269] [2024-11-28 02:53:56,766 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:53:56,766 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 02:53:56,789 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 02:53:56,822 INFO L134 CoverageAnalysis]: Checked inductivity of 80 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 80 trivial. 0 not checked. [2024-11-28 02:53:56,822 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 02:53:56,822 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [252327269] [2024-11-28 02:53:56,822 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [252327269] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 02:53:56,822 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 02:53:56,822 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2024-11-28 02:53:56,822 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1599346069] [2024-11-28 02:53:56,822 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 02:53:56,823 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2024-11-28 02:53:56,823 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 02:53:56,823 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2024-11-28 02:53:56,823 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-11-28 02:53:56,823 INFO L87 Difference]: Start difference. First operand 1037 states and 1189 transitions. Second operand has 3 states, 3 states have (on average 24.333333333333332) internal successors, (73), 3 states have internal predecessors, (73), 2 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 1 states have call predecessors, (8), 1 states have call successors, (8) [2024-11-28 02:53:56,973 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 02:53:56,973 INFO L93 Difference]: Finished difference Result 1662 states and 1904 transitions. [2024-11-28 02:53:56,974 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-11-28 02:53:56,974 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 24.333333333333332) internal successors, (73), 3 states have internal predecessors, (73), 2 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 1 states have call predecessors, (8), 1 states have call successors, (8) Word has length 138 [2024-11-28 02:53:56,974 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 02:53:56,980 INFO L225 Difference]: With dead ends: 1662 [2024-11-28 02:53:56,981 INFO L226 Difference]: Without dead ends: 1040 [2024-11-28 02:53:56,982 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-11-28 02:53:56,982 INFO L435 NwaCegarLoop]: 143 mSDtfsCounter, 0 mSDsluCounter, 132 mSDsCounter, 0 mSdLazyCounter, 12 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 275 SdHoareTripleChecker+Invalid, 12 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 12 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-28 02:53:56,983 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 275 Invalid, 12 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 12 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-28 02:53:56,984 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1040 states. [2024-11-28 02:53:57,109 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1040 to 1040. [2024-11-28 02:53:57,111 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1040 states, 846 states have (on average 1.1430260047281324) internal successors, (967), 854 states have internal predecessors, (967), 111 states have call successors, (111), 79 states have call predecessors, (111), 82 states have return successors, (114), 107 states have call predecessors, (114), 110 states have call successors, (114) [2024-11-28 02:53:57,113 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1040 states to 1040 states and 1192 transitions. [2024-11-28 02:53:57,116 INFO L78 Accepts]: Start accepts. Automaton has 1040 states and 1192 transitions. Word has length 138 [2024-11-28 02:53:57,117 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 02:53:57,117 INFO L471 AbstractCegarLoop]: Abstraction has 1040 states and 1192 transitions. [2024-11-28 02:53:57,117 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 24.333333333333332) internal successors, (73), 3 states have internal predecessors, (73), 2 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 1 states have call predecessors, (8), 1 states have call successors, (8) [2024-11-28 02:53:57,117 INFO L276 IsEmpty]: Start isEmpty. Operand 1040 states and 1192 transitions. [2024-11-28 02:53:57,119 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 140 [2024-11-28 02:53:57,119 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 02:53:57,120 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 02:53:57,120 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable26 [2024-11-28 02:53:57,120 INFO L396 AbstractCegarLoop]: === Iteration 28 === Targeting error2Err0ASSERT_VIOLATIONERROR_FUNCTION === [error1Err0ASSERT_VIOLATIONERROR_FUNCTION, error2Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-28 02:53:57,120 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 02:53:57,120 INFO L85 PathProgramCache]: Analyzing trace with hash -918579689, now seen corresponding path program 1 times [2024-11-28 02:53:57,121 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 02:53:57,121 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [712636545] [2024-11-28 02:53:57,121 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 02:53:57,121 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 02:53:57,140 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-28 02:53:57,140 INFO L357 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-28 02:53:57,159 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-28 02:53:57,256 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-28 02:53:57,257 INFO L340 BasicCegarLoop]: Counterexample is feasible [2024-11-28 02:53:57,258 INFO L782 garLoopResultBuilder]: Registering result UNSAFE for location error2Err0ASSERT_VIOLATIONERROR_FUNCTION (1 of 2 remaining) [2024-11-28 02:53:57,260 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location error1Err0ASSERT_VIOLATIONERROR_FUNCTION (0 of 2 remaining) [2024-11-28 02:53:57,260 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable27 [2024-11-28 02:53:57,263 INFO L422 BasicCegarLoop]: Path program histogram: [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 02:53:57,453 INFO L170 ceAbstractionStarter]: Computing trace abstraction results [2024-11-28 02:53:57,455 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 28.11 02:53:57 BoogieIcfgContainer [2024-11-28 02:53:57,455 INFO L131 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2024-11-28 02:53:57,456 INFO L112 PluginConnector]: ------------------------Witness Printer---------------------------- [2024-11-28 02:53:57,456 INFO L270 PluginConnector]: Initializing Witness Printer... [2024-11-28 02:53:57,456 INFO L274 PluginConnector]: Witness Printer initialized [2024-11-28 02:53:57,457 INFO L184 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.11 02:53:36" (3/4) ... [2024-11-28 02:53:57,458 INFO L140 WitnessPrinter]: Generating witness for reachability counterexample [2024-11-28 02:53:57,644 INFO L129 tionWitnessGenerator]: Generated YAML witness of length 102. [2024-11-28 02:53:57,785 INFO L149 WitnessManager]: Wrote witness to /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4d5c9a20-2d38-4680-bc84-99c8d1b727a2/bin/uautomizer-verify-aQ6SnzHsRB/witness.graphml [2024-11-28 02:53:57,785 INFO L149 WitnessManager]: Wrote witness to /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4d5c9a20-2d38-4680-bc84-99c8d1b727a2/bin/uautomizer-verify-aQ6SnzHsRB/witness.yml [2024-11-28 02:53:57,785 INFO L131 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2024-11-28 02:53:57,786 INFO L158 Benchmark]: Toolchain (without parser) took 22929.04ms. Allocated memory was 117.4MB in the beginning and 830.5MB in the end (delta: 713.0MB). Free memory was 92.8MB in the beginning and 395.9MB in the end (delta: -303.1MB). Peak memory consumption was 409.7MB. Max. memory is 16.1GB. [2024-11-28 02:53:57,789 INFO L158 Benchmark]: CDTParser took 0.71ms. Allocated memory is still 117.4MB. Free memory was 74.5MB in the beginning and 74.4MB in the end (delta: 84.0kB). There was no memory consumed. Max. memory is 16.1GB. [2024-11-28 02:53:57,790 INFO L158 Benchmark]: CACSL2BoogieTranslator took 365.37ms. Allocated memory is still 117.4MB. Free memory was 92.6MB in the beginning and 75.4MB in the end (delta: 17.2MB). Peak memory consumption was 16.8MB. Max. memory is 16.1GB. [2024-11-28 02:53:57,790 INFO L158 Benchmark]: Boogie Procedure Inliner took 43.38ms. Allocated memory is still 117.4MB. Free memory was 75.4MB in the beginning and 72.9MB in the end (delta: 2.5MB). There was no memory consumed. Max. memory is 16.1GB. [2024-11-28 02:53:57,790 INFO L158 Benchmark]: Boogie Preprocessor took 69.95ms. Allocated memory is still 117.4MB. Free memory was 72.9MB in the beginning and 70.2MB in the end (delta: 2.8MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. [2024-11-28 02:53:57,790 INFO L158 Benchmark]: RCFGBuilder took 834.48ms. Allocated memory is still 117.4MB. Free memory was 70.2MB in the beginning and 39.2MB in the end (delta: 31.0MB). Peak memory consumption was 25.2MB. Max. memory is 16.1GB. [2024-11-28 02:53:57,791 INFO L158 Benchmark]: TraceAbstraction took 21279.78ms. Allocated memory was 117.4MB in the beginning and 830.5MB in the end (delta: 713.0MB). Free memory was 38.7MB in the beginning and 425.3MB in the end (delta: -386.6MB). Peak memory consumption was 325.8MB. Max. memory is 16.1GB. [2024-11-28 02:53:57,791 INFO L158 Benchmark]: Witness Printer took 329.37ms. Allocated memory is still 830.5MB. Free memory was 425.3MB in the beginning and 395.9MB in the end (delta: 29.4MB). Peak memory consumption was 33.6MB. Max. memory is 16.1GB. [2024-11-28 02:53:57,792 INFO L338 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.71ms. Allocated memory is still 117.4MB. Free memory was 74.5MB in the beginning and 74.4MB in the end (delta: 84.0kB). There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 365.37ms. Allocated memory is still 117.4MB. Free memory was 92.6MB in the beginning and 75.4MB in the end (delta: 17.2MB). Peak memory consumption was 16.8MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 43.38ms. Allocated memory is still 117.4MB. Free memory was 75.4MB in the beginning and 72.9MB in the end (delta: 2.5MB). There was no memory consumed. Max. memory is 16.1GB. * Boogie Preprocessor took 69.95ms. Allocated memory is still 117.4MB. Free memory was 72.9MB in the beginning and 70.2MB in the end (delta: 2.8MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. * RCFGBuilder took 834.48ms. Allocated memory is still 117.4MB. Free memory was 70.2MB in the beginning and 39.2MB in the end (delta: 31.0MB). Peak memory consumption was 25.2MB. Max. memory is 16.1GB. * TraceAbstraction took 21279.78ms. Allocated memory was 117.4MB in the beginning and 830.5MB in the end (delta: 713.0MB). Free memory was 38.7MB in the beginning and 425.3MB in the end (delta: -386.6MB). Peak memory consumption was 325.8MB. Max. memory is 16.1GB. * Witness Printer took 329.37ms. Allocated memory is still 830.5MB. Free memory was 425.3MB in the beginning and 395.9MB in the end (delta: 29.4MB). Peak memory consumption was 33.6MB. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: ErrorAutomatonStatistics NumberErrorTraces: 0, NumberStatementsAllTraces: 0, NumberRelevantStatements: 0, 0.0s ErrorAutomatonConstructionTimeTotal, 0.0s FaulLocalizationTime, NumberStatementsFirstTrace: -1, TraceLengthAvg: 0, 0.0s ErrorAutomatonConstructionTimeAvg, 0.0s ErrorAutomatonDifferenceTimeAvg, 0.0s ErrorAutomatonDifferenceTimeTotal, NumberOfNoEnhancement: 0, NumberOfFiniteEnhancement: 0, NumberOfInfiniteEnhancement: 0 - CounterExampleResult [Line: 599]: a call to reach_error is reachable a call to reach_error is reachable We found a FailurePath: [L32] int fast_clk_edge ; [L33] int slow_clk_edge ; [L34] int q_buf_0 ; [L35] int q_free ; [L36] int q_read_ev ; [L37] int q_write_ev ; [L38] int q_req_up ; [L39] int q_ev ; [L60] int p_num_write ; [L61] int p_last_write ; [L62] int p_dw_st ; [L63] int p_dw_pc ; [L64] int p_dw_i ; [L65] int c_num_read ; [L66] int c_last_read ; [L67] int c_dr_st ; [L68] int c_dr_pc ; [L69] int c_dr_i ; [L202] static int a_t ; [L352] static int t = 0; [L603] int m_pc = 0; [L604] int t1_pc = 0; [L605] int m_st ; [L606] int t1_st ; [L607] int m_i ; [L608] int t1_i ; [L609] int M_E = 2; [L610] int T1_E = 2; [L611] int E_M = 2; [L612] int E_1 = 2; [L616] int token ; [L618] int local ; VAL [E_1=2, E_M=2, M_E=2, T1_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=0, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=0, t1_pc=0, t1_st=0, t=0, token=0] [L1077] COND FALSE !(__VERIFIER_nondet_int()) [L1080] CALL main2() [L1064] int __retres1 ; [L1068] CALL init_model2() [L979] m_i = 1 [L980] t1_i = 1 VAL [E_1=2, E_M=2, M_E=2, T1_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=0, t=0, token=0] [L1068] RET init_model2() [L1069] CALL start_simulation2() [L1005] int kernel_st ; [L1006] int tmp ; [L1007] int tmp___0 ; [L1011] kernel_st = 0 VAL [E_1=2, E_M=2, M_E=2, T1_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=0, t=0, token=0] [L1012] FCALL update_channels2() VAL [E_1=2, E_M=2, M_E=2, T1_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=0, t=0, token=0] [L1013] CALL init_threads2() [L761] COND TRUE m_i == 1 [L762] m_st = 0 VAL [E_1=2, E_M=2, M_E=2, T1_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=0, t=0, token=0] [L766] COND TRUE t1_i == 1 [L767] t1_st = 0 VAL [E_1=2, E_M=2, M_E=2, T1_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=0, t=0, token=0] [L1013] RET init_threads2() [L1014] CALL fire_delta_events2() VAL [E_1=2, E_M=2, M_E=2, T1_E=2, \old(E_1)=2, \old(E_M)=2, \old(M_E)=2, \old(T1_E)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=0, t=0, token=0] [L850] COND FALSE !(M_E == 0) VAL [E_1=2, E_M=2, M_E=2, T1_E=2, \old(E_1)=2, \old(E_M)=2, \old(M_E)=2, \old(T1_E)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=0, t=0, token=0] [L855] COND FALSE !(T1_E == 0) VAL [E_1=2, E_M=2, M_E=2, T1_E=2, \old(E_1)=2, \old(E_M)=2, \old(M_E)=2, \old(T1_E)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=0, t=0, token=0] [L860] COND FALSE !(E_M == 0) VAL [E_1=2, E_M=2, M_E=2, T1_E=2, \old(E_1)=2, \old(E_M)=2, \old(M_E)=2, \old(T1_E)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=0, t=0, token=0] [L865] COND FALSE !(E_1 == 0) VAL [E_1=2, E_M=2, M_E=2, T1_E=2, \old(E_1)=2, \old(E_M)=2, \old(M_E)=2, \old(T1_E)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=0, t=0, token=0] [L1014] RET fire_delta_events2() VAL [E_1=2, E_M=2, M_E=2, T1_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=0, t=0, token=0] [L1015] CALL activate_threads2() VAL [E_1=2, E_M=2, M_E=2, T1_E=2, \old(m_st)=0, \old(t1_st)=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=0, t=0, token=0] [L903] int tmp ; [L904] int tmp___0 ; [L908] CALL, EXPR is_master_triggered() [L712] int __retres1 ; VAL [E_1=2, E_M=2, M_E=2, T1_E=2, \old(m_st)=0, \old(t1_st)=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=0, t=0, token=0] [L715] COND FALSE !(m_pc == 1) VAL [E_1=2, E_M=2, M_E=2, T1_E=2, \old(m_st)=0, \old(t1_st)=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=0, t=0, token=0] [L725] __retres1 = 0 VAL [E_1=2, E_M=2, M_E=2, T1_E=2, \old(m_st)=0, \old(t1_st)=0, __retres1=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=0, t=0, token=0] [L727] return (__retres1); VAL [E_1=2, E_M=2, M_E=2, T1_E=2, \old(m_st)=0, \old(t1_st)=0, \result=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=0, t=0, token=0] [L908] RET, EXPR is_master_triggered() [L908] tmp = is_master_triggered() [L910] COND FALSE !(\read(tmp)) VAL [E_1=2, E_M=2, M_E=2, T1_E=2, \old(m_st)=0, \old(t1_st)=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=0, t=0, token=0] [L916] CALL, EXPR is_transmit1_triggered() [L731] int __retres1 ; VAL [E_1=2, E_M=2, M_E=2, T1_E=2, \old(m_st)=0, \old(t1_st)=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=0, t=0, token=0] [L734] COND FALSE !(t1_pc == 1) VAL [E_1=2, E_M=2, M_E=2, T1_E=2, \old(m_st)=0, \old(t1_st)=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=0, t=0, token=0] [L744] __retres1 = 0 VAL [E_1=2, E_M=2, M_E=2, T1_E=2, \old(m_st)=0, \old(t1_st)=0, __retres1=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=0, t=0, token=0] [L746] return (__retres1); VAL [E_1=2, E_M=2, M_E=2, T1_E=2, \old(m_st)=0, \old(t1_st)=0, \result=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=0, t=0, token=0] [L916] RET, EXPR is_transmit1_triggered() [L916] tmp___0 = is_transmit1_triggered() [L918] COND FALSE !(\read(tmp___0)) VAL [E_1=2, E_M=2, M_E=2, T1_E=2, \old(m_st)=0, \old(t1_st)=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=0, t=0, token=0] [L1015] RET activate_threads2() VAL [E_1=2, E_M=2, M_E=2, T1_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=0, t=0, token=0] [L1016] CALL reset_delta_events2() VAL [E_1=2, E_M=2, M_E=2, T1_E=2, \old(E_1)=2, \old(E_M)=2, \old(M_E)=2, \old(T1_E)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=0, t=0, token=0] [L878] COND FALSE !(M_E == 1) VAL [E_1=2, E_M=2, M_E=2, T1_E=2, \old(E_1)=2, \old(E_M)=2, \old(M_E)=2, \old(T1_E)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=0, t=0, token=0] [L883] COND FALSE !(T1_E == 1) VAL [E_1=2, E_M=2, M_E=2, T1_E=2, \old(E_1)=2, \old(E_M)=2, \old(M_E)=2, \old(T1_E)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=0, t=0, token=0] [L888] COND FALSE !(E_M == 1) VAL [E_1=2, E_M=2, M_E=2, T1_E=2, \old(E_1)=2, \old(E_M)=2, \old(M_E)=2, \old(T1_E)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=0, t=0, token=0] [L893] COND FALSE !(E_1 == 1) VAL [E_1=2, E_M=2, M_E=2, T1_E=2, \old(E_1)=2, \old(E_M)=2, \old(M_E)=2, \old(T1_E)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=0, t=0, token=0] [L1016] RET reset_delta_events2() VAL [E_1=2, E_M=2, M_E=2, T1_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=0, t=0, token=0] [L1022] kernel_st = 1 [L1023] CALL eval2() [L797] int tmp ; VAL [E_1=2, E_M=2, M_E=2, T1_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=0, t=0, token=0] [L804] CALL, EXPR exists_runnable_thread2() VAL [E_1=2, E_M=2, M_E=2, T1_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=0, t=0, token=0] [L776] int __retres1 ; VAL [E_1=2, E_M=2, M_E=2, T1_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=0, t=0, token=0] [L779] COND TRUE m_st == 0 [L780] __retres1 = 1 VAL [E_1=2, E_M=2, M_E=2, T1_E=2, __retres1=1, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=0, t=0, token=0] [L792] return (__retres1); VAL [E_1=2, E_M=2, M_E=2, T1_E=2, \result=1, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=0, t=0, token=0] [L804] RET, EXPR exists_runnable_thread2() VAL [E_1=2, E_M=2, M_E=2, T1_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=0, t=0, token=0] [L804] tmp = exists_runnable_thread2() [L806] COND TRUE \read(tmp) VAL [E_1=2, E_M=2, M_E=2, T1_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=0, t=0, token=0] [L811] COND TRUE m_st == 0 [L812] int tmp_ndt_1; [L813] tmp_ndt_1 = __VERIFIER_nondet_int() [L814] COND FALSE !(\read(tmp_ndt_1)) VAL [E_1=2, E_M=2, M_E=2, T1_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=0, t=0, token=0] [L825] COND TRUE t1_st == 0 [L826] int tmp_ndt_2; [L827] tmp_ndt_2 = __VERIFIER_nondet_int() [L828] COND TRUE \read(tmp_ndt_2) [L830] t1_st = 1 [L831] CALL transmit1() [L679] COND TRUE t1_pc == 0 VAL [E_1=2, E_M=2, M_E=2, T1_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=1, t=0, token=0] [L692] t1_pc = 1 [L693] t1_st = 2 VAL [E_1=2, E_M=2, M_E=2, T1_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t=0, token=0] [L831] RET transmit1() [L804] CALL, EXPR exists_runnable_thread2() VAL [E_1=2, E_M=2, M_E=2, T1_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t=0, token=0] [L776] int __retres1 ; VAL [E_1=2, E_M=2, M_E=2, T1_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t=0, token=0] [L779] COND TRUE m_st == 0 [L780] __retres1 = 1 VAL [E_1=2, E_M=2, M_E=2, T1_E=2, __retres1=1, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t=0, token=0] [L792] return (__retres1); VAL [E_1=2, E_M=2, M_E=2, T1_E=2, \result=1, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t=0, token=0] [L804] RET, EXPR exists_runnable_thread2() VAL [E_1=2, E_M=2, M_E=2, T1_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t=0, token=0] [L804] tmp = exists_runnable_thread2() [L806] COND TRUE \read(tmp) VAL [E_1=2, E_M=2, M_E=2, T1_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t=0, token=0] [L811] COND TRUE m_st == 0 [L812] int tmp_ndt_1; [L813] tmp_ndt_1 = __VERIFIER_nondet_int() [L814] COND TRUE \read(tmp_ndt_1) [L816] m_st = 1 [L817] CALL master() [L621] int tmp_var = __VERIFIER_nondet_int(); [L623] COND TRUE m_pc == 0 VAL [E_1=2, E_M=2, M_E=2, T1_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t=0, tmp_var=0, token=0] [L637] token = __VERIFIER_nondet_int() [L638] local = token [L639] E_1 = 1 VAL [E_1=1, E_M=2, M_E=2, T1_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t=0, tmp_var=0, token=0] [L640] CALL immediate_notify() VAL [E_1=1, E_M=2, M_E=2, T1_E=2, \old(m_st)=1, \old(t1_st)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t=0, token=0] [L932] CALL activate_threads2() VAL [E_1=1, E_M=2, M_E=2, T1_E=2, \old(m_st)=1, \old(t1_st)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t=0, token=0] [L903] int tmp ; [L904] int tmp___0 ; [L908] CALL, EXPR is_master_triggered() [L712] int __retres1 ; VAL [E_1=1, E_M=2, M_E=2, T1_E=2, \old(m_st)=1, \old(t1_st)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t=0, token=0] [L715] COND FALSE !(m_pc == 1) VAL [E_1=1, E_M=2, M_E=2, T1_E=2, \old(m_st)=1, \old(t1_st)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t=0, token=0] [L725] __retres1 = 0 VAL [E_1=1, E_M=2, M_E=2, T1_E=2, \old(m_st)=1, \old(t1_st)=2, __retres1=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t=0, token=0] [L727] return (__retres1); VAL [E_1=1, E_M=2, M_E=2, T1_E=2, \old(m_st)=1, \old(t1_st)=2, \result=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t=0, token=0] [L908] RET, EXPR is_master_triggered() [L908] tmp = is_master_triggered() [L910] COND FALSE !(\read(tmp)) VAL [E_1=1, E_M=2, M_E=2, T1_E=2, \old(m_st)=1, \old(t1_st)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t=0, token=0] [L916] CALL, EXPR is_transmit1_triggered() [L731] int __retres1 ; VAL [E_1=1, E_M=2, M_E=2, T1_E=2, \old(m_st)=1, \old(t1_st)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t=0, token=0] [L734] COND TRUE t1_pc == 1 VAL [E_1=1, E_M=2, M_E=2, T1_E=2, \old(m_st)=1, \old(t1_st)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t=0, token=0] [L735] COND TRUE E_1 == 1 [L736] __retres1 = 1 VAL [E_1=1, E_M=2, M_E=2, T1_E=2, \old(m_st)=1, \old(t1_st)=2, __retres1=1, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t=0, token=0] [L746] return (__retres1); VAL [E_1=1, E_M=2, M_E=2, T1_E=2, \old(m_st)=1, \old(t1_st)=2, \result=1, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t=0, token=0] [L916] RET, EXPR is_transmit1_triggered() [L916] tmp___0 = is_transmit1_triggered() [L918] COND TRUE \read(tmp___0) [L919] t1_st = 0 VAL [E_1=1, E_M=2, M_E=2, T1_E=2, \old(m_st)=1, \old(t1_st)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=0, t=0, token=0] [L932] RET activate_threads2() VAL [E_1=1, E_M=2, M_E=2, T1_E=2, \old(m_st)=1, \old(t1_st)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=0, t=0, token=0] [L640] RET immediate_notify() VAL [E_1=1, E_M=2, M_E=2, T1_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=0, t=0, tmp_var=0, token=0] [L641] E_1 = 2 [L642] m_pc = 1 [L643] m_st = 2 VAL [E_1=2, E_M=2, M_E=2, T1_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=0, t=0, tmp_var=0, token=0] [L817] RET master() [L825] COND TRUE t1_st == 0 [L826] int tmp_ndt_2; [L827] tmp_ndt_2 = __VERIFIER_nondet_int() [L828] COND TRUE \read(tmp_ndt_2) [L830] t1_st = 1 [L831] CALL transmit1() [L679] COND FALSE !(t1_pc == 0) VAL [E_1=2, E_M=2, M_E=2, T1_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=1, t=0, token=0] [L682] COND TRUE t1_pc == 1 VAL [E_1=2, E_M=2, M_E=2, T1_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=1, t=0, token=0] [L698] token += 1 [L699] E_M = 1 VAL [E_1=2, E_M=1, M_E=2, T1_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=1, t=0, token=1] [L700] CALL immediate_notify() VAL [E_1=2, E_M=1, M_E=2, T1_E=2, \old(m_st)=2, \old(t1_st)=1, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=1, t=0, token=1] [L932] CALL activate_threads2() VAL [E_1=2, E_M=1, M_E=2, T1_E=2, \old(m_st)=2, \old(t1_st)=1, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=1, t=0, token=1] [L903] int tmp ; [L904] int tmp___0 ; [L908] CALL, EXPR is_master_triggered() [L712] int __retres1 ; VAL [E_1=2, E_M=1, M_E=2, T1_E=2, \old(m_st)=2, \old(t1_st)=1, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=1, t=0, token=1] [L715] COND TRUE m_pc == 1 VAL [E_1=2, E_M=1, M_E=2, T1_E=2, \old(m_st)=2, \old(t1_st)=1, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=1, t=0, token=1] [L716] COND TRUE E_M == 1 [L717] __retres1 = 1 VAL [E_1=2, E_M=1, M_E=2, T1_E=2, \old(m_st)=2, \old(t1_st)=1, __retres1=1, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=1, t=0, token=1] [L727] return (__retres1); VAL [E_1=2, E_M=1, M_E=2, T1_E=2, \old(m_st)=2, \old(t1_st)=1, \result=1, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=1, t=0, token=1] [L908] RET, EXPR is_master_triggered() [L908] tmp = is_master_triggered() [L910] COND TRUE \read(tmp) [L911] m_st = 0 VAL [E_1=2, E_M=1, M_E=2, T1_E=2, \old(m_st)=2, \old(t1_st)=1, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=1, t=0, token=1] [L916] CALL, EXPR is_transmit1_triggered() [L731] int __retres1 ; VAL [E_1=2, E_M=1, M_E=2, T1_E=2, \old(m_st)=2, \old(t1_st)=1, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=1, t=0, token=1] [L734] COND TRUE t1_pc == 1 VAL [E_1=2, E_M=1, M_E=2, T1_E=2, \old(m_st)=2, \old(t1_st)=1, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=1, t=0, token=1] [L735] COND FALSE !(E_1 == 1) VAL [E_1=2, E_M=1, M_E=2, T1_E=2, \old(m_st)=2, \old(t1_st)=1, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=1, t=0, token=1] [L744] __retres1 = 0 VAL [E_1=2, E_M=1, M_E=2, T1_E=2, \old(m_st)=2, \old(t1_st)=1, __retres1=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=1, t=0, token=1] [L746] return (__retres1); VAL [E_1=2, E_M=1, M_E=2, T1_E=2, \old(m_st)=2, \old(t1_st)=1, \result=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=1, t=0, token=1] [L916] RET, EXPR is_transmit1_triggered() [L916] tmp___0 = is_transmit1_triggered() [L918] COND FALSE !(\read(tmp___0)) VAL [E_1=2, E_M=1, M_E=2, T1_E=2, \old(m_st)=2, \old(t1_st)=1, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=1, t=0, token=1] [L932] RET activate_threads2() VAL [E_1=2, E_M=1, M_E=2, T1_E=2, \old(m_st)=2, \old(t1_st)=1, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=1, t=0, token=1] [L700] RET immediate_notify() VAL [E_1=2, E_M=1, M_E=2, T1_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=1, t=0, token=1] [L701] E_M = 2 VAL [E_1=2, E_M=2, M_E=2, T1_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=1, t=0, token=1] [L692] t1_pc = 1 [L693] t1_st = 2 VAL [E_1=2, E_M=2, M_E=2, T1_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t=0, token=1] [L831] RET transmit1() [L804] CALL, EXPR exists_runnable_thread2() VAL [E_1=2, E_M=2, M_E=2, T1_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t=0, token=1] [L776] int __retres1 ; VAL [E_1=2, E_M=2, M_E=2, T1_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t=0, token=1] [L779] COND TRUE m_st == 0 [L780] __retres1 = 1 VAL [E_1=2, E_M=2, M_E=2, T1_E=2, __retres1=1, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t=0, token=1] [L792] return (__retres1); VAL [E_1=2, E_M=2, M_E=2, T1_E=2, \result=1, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t=0, token=1] [L804] RET, EXPR exists_runnable_thread2() VAL [E_1=2, E_M=2, M_E=2, T1_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t=0, token=1] [L804] tmp = exists_runnable_thread2() [L806] COND TRUE \read(tmp) VAL [E_1=2, E_M=2, M_E=2, T1_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t=0, token=1] [L811] COND TRUE m_st == 0 [L812] int tmp_ndt_1; [L813] tmp_ndt_1 = __VERIFIER_nondet_int() [L814] COND TRUE \read(tmp_ndt_1) [L816] m_st = 1 [L817] CALL master() [L621] int tmp_var = __VERIFIER_nondet_int(); [L623] COND FALSE !(m_pc == 0) VAL [E_1=2, E_M=2, M_E=2, T1_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t=0, tmp_var=5, token=1] [L626] COND TRUE m_pc == 1 VAL [E_1=2, E_M=2, M_E=2, T1_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t=0, tmp_var=5, token=1] [L648] COND FALSE !(token != local + 1) VAL [E_1=2, E_M=2, M_E=2, T1_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t=0, tmp_var=5, token=1] [L653] COND TRUE tmp_var <= 5 VAL [E_1=2, E_M=2, M_E=2, T1_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t=0, tmp_var=5, token=1] [L654] COND TRUE tmp_var >= 5 VAL [E_1=2, E_M=2, M_E=2, T1_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t=0, tmp_var=5, token=1] [L659] COND TRUE tmp_var <= 5 VAL [E_1=2, E_M=2, M_E=2, T1_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t=0, tmp_var=5, token=1] [L660] COND TRUE tmp_var >= 5 VAL [E_1=2, E_M=2, M_E=2, T1_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t=0, tmp_var=5, token=1] [L661] COND TRUE tmp_var == 5 VAL [E_1=2, E_M=2, M_E=2, T1_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t=0, token=1] [L662] CALL error2() VAL [E_1=2, E_M=2, M_E=2, T1_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t=0, token=1] [L599] reach_error() VAL [E_1=2, E_M=2, M_E=2, T1_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t=0, token=1] - UnprovableResult [Line: 27]: Unable to prove that a call to reach_error is unreachable Unable to prove that a call to reach_error is unreachable Reason: Not analyzed. - StatisticsResult: Ultimate Automizer benchmark data CFG has 16 procedures, 226 locations, 2 error locations. Started 1 CEGAR loops. OverallTime: 21.0s, OverallIterations: 28, TraceHistogramMax: 3, PathProgramHistogramMax: 1, EmptinessCheckTime: 0.1s, AutomataDifference: 12.4s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, HoareTripleCheckerStatistics: 0 mSolverCounterUnknown, 8374 SdHoareTripleChecker+Valid, 6.8s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 8152 mSDsluCounter, 18931 SdHoareTripleChecker+Invalid, 5.5s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 0 IncrementalHoareTripleChecker+Unchecked, 12234 mSDsCounter, 1092 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 6369 IncrementalHoareTripleChecker+Invalid, 7461 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 1092 mSolverCounterUnsat, 6697 mSDtfsCounter, 6369 mSolverCounterSat, 0.2s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Unknown, PredicateUnifierStatistics: 0 DeclaredPredicates, 485 GetRequests, 366 SyntacticMatches, 0 SemanticMatches, 119 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 55 ImplicationChecksByTransitivity, 0.6s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=3015occurred in iteration=18, InterpolantAutomatonStates: 156, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 4.1s AutomataMinimizationTime, 27 MinimizatonAttempts, 907 StatesRemovedByMinimization, 18 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.1s SsaConstructionTime, 0.4s SatisfiabilityAnalysisTime, 2.8s InterpolantComputationTime, 2482 NumberOfCodeBlocks, 2482 NumberOfCodeBlocksAsserted, 30 NumberOfCheckSat, 2314 ConstructedInterpolants, 0 QuantifiedInterpolants, 3566 SizeOfPredicates, 0 NumberOfNonLiveVariables, 852 ConjunctsInSsa, 4 ConjunctsInUnsatCore, 29 InterpolantComputations, 27 PerfectInterpolantSequences, 616/622 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available, ConComCheckerStatistics: No data available RESULT: Ultimate proved your program to be incorrect! [2024-11-28 02:53:57,822 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4d5c9a20-2d38-4680-bc84-99c8d1b727a2/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Forceful destruction successful, exit code 0 Received shutdown request... --- End real Ultimate output --- Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE