./Ultimate.py --spec ../../sv-benchmarks/c/properties/valid-memsafety.prp --file ../../sv-benchmarks/c/memsafety-broom/sll-middle-shared.i --full-output --architecture 64bit -------------------------------------------------------------------------------- Checking for memory safety (deref-memtrack) Using default analysis Version d790fecc Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3d345d57-71d6-4e9e-9140-a659b2e77150/bin/uautomizer-verify-aQ6SnzHsRB/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3d345d57-71d6-4e9e-9140-a659b2e77150/bin/uautomizer-verify-aQ6SnzHsRB/plugins/org.eclipse.equinox.launcher_1.6.800.v20240513-1750.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3d345d57-71d6-4e9e-9140-a659b2e77150/bin/uautomizer-verify-aQ6SnzHsRB/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3d345d57-71d6-4e9e-9140-a659b2e77150/bin/uautomizer-verify-aQ6SnzHsRB/config/AutomizerMemDerefMemtrack.xml -i ../../sv-benchmarks/c/memsafety-broom/sll-middle-shared.i -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3d345d57-71d6-4e9e-9140-a659b2e77150/bin/uautomizer-verify-aQ6SnzHsRB/config/svcomp-DerefFreeMemtrack-64bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3d345d57-71d6-4e9e-9140-a659b2e77150/bin/uautomizer-verify-aQ6SnzHsRB --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G valid-free) ) CHECK( init(main()), LTL(G valid-deref) ) CHECK( init(main()), LTL(G valid-memtrack) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash 003ead3201cb38ecc17dca4c0dd7fb7b12eace11010ba9f6077aefef97bddb9b --- Real Ultimate output --- This is Ultimate 0.3.0-dev-d790fec [2024-11-28 03:58:17,468 INFO L188 SettingsManager]: Resetting all preferences to default values... [2024-11-28 03:58:17,578 INFO L114 SettingsManager]: Loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3d345d57-71d6-4e9e-9140-a659b2e77150/bin/uautomizer-verify-aQ6SnzHsRB/config/svcomp-DerefFreeMemtrack-64bit-Automizer_Default.epf [2024-11-28 03:58:17,588 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2024-11-28 03:58:17,588 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2024-11-28 03:58:17,637 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2024-11-28 03:58:17,640 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2024-11-28 03:58:17,640 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2024-11-28 03:58:17,640 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2024-11-28 03:58:17,641 INFO L153 SettingsManager]: * Use memory slicer=true [2024-11-28 03:58:17,642 INFO L151 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2024-11-28 03:58:17,642 INFO L153 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2024-11-28 03:58:17,643 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2024-11-28 03:58:17,643 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2024-11-28 03:58:17,643 INFO L153 SettingsManager]: * Use SBE=true [2024-11-28 03:58:17,644 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2024-11-28 03:58:17,644 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2024-11-28 03:58:17,645 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2024-11-28 03:58:17,645 INFO L153 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2024-11-28 03:58:17,645 INFO L153 SettingsManager]: * Bitprecise bitfields=true [2024-11-28 03:58:17,645 INFO L153 SettingsManager]: * SV-COMP memtrack compatibility mode=true [2024-11-28 03:58:17,646 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2024-11-28 03:58:17,646 INFO L153 SettingsManager]: * Adapt memory model on pointer casts if necessary=true [2024-11-28 03:58:17,646 INFO L153 SettingsManager]: * Check unreachability of reach_error function=false [2024-11-28 03:58:17,646 INFO L153 SettingsManager]: * Behaviour of calls to undefined functions=OVERAPPROXIMATE_BEHAVIOUR [2024-11-28 03:58:17,646 INFO L153 SettingsManager]: * Use constant arrays=true [2024-11-28 03:58:17,646 INFO L151 SettingsManager]: Preferences of IcfgBuilder differ from their defaults: [2024-11-28 03:58:17,647 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-11-28 03:58:17,647 INFO L153 SettingsManager]: * Only consider context switches at boundaries of atomic blocks=true [2024-11-28 03:58:17,647 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2024-11-28 03:58:17,647 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2024-11-28 03:58:17,647 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2024-11-28 03:58:17,648 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-11-28 03:58:17,648 INFO L153 SettingsManager]: * Only consider context switches at boundaries of atomic blocks=true [2024-11-28 03:58:17,649 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2024-11-28 03:58:17,649 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2024-11-28 03:58:17,649 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2024-11-28 03:58:17,649 INFO L153 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2024-11-28 03:58:17,649 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2024-11-28 03:58:17,649 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2024-11-28 03:58:17,650 INFO L153 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false [2024-11-28 03:58:17,650 INFO L153 SettingsManager]: * Automaton type used in concurrency analysis=PETRI_NET [2024-11-28 03:58:17,650 INFO L153 SettingsManager]: * Order on configurations for Petri net unfoldings=DBO [2024-11-28 03:58:17,650 INFO L153 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2024-11-28 03:58:17,650 INFO L153 SettingsManager]: * Looper check in Petri net analysis=SEMANTIC Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3d345d57-71d6-4e9e-9140-a659b2e77150/bin/uautomizer-verify-aQ6SnzHsRB Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G valid-free) ) CHECK( init(main()), LTL(G valid-deref) ) CHECK( init(main()), LTL(G valid-memtrack) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 003ead3201cb38ecc17dca4c0dd7fb7b12eace11010ba9f6077aefef97bddb9b [2024-11-28 03:58:18,037 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2024-11-28 03:58:18,052 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2024-11-28 03:58:18,054 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2024-11-28 03:58:18,058 INFO L270 PluginConnector]: Initializing CDTParser... [2024-11-28 03:58:18,059 INFO L274 PluginConnector]: CDTParser initialized [2024-11-28 03:58:18,062 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3d345d57-71d6-4e9e-9140-a659b2e77150/bin/uautomizer-verify-aQ6SnzHsRB/../../sv-benchmarks/c/memsafety-broom/sll-middle-shared.i [2024-11-28 03:58:21,607 INFO L533 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3d345d57-71d6-4e9e-9140-a659b2e77150/bin/uautomizer-verify-aQ6SnzHsRB/data/dfd8659d7/16df7fb0958d4600800536b0d14a151d/FLAG174341328 [2024-11-28 03:58:21,999 INFO L384 CDTParser]: Found 1 translation units. [2024-11-28 03:58:21,999 INFO L180 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3d345d57-71d6-4e9e-9140-a659b2e77150/sv-benchmarks/c/memsafety-broom/sll-middle-shared.i [2024-11-28 03:58:22,043 INFO L427 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3d345d57-71d6-4e9e-9140-a659b2e77150/bin/uautomizer-verify-aQ6SnzHsRB/data/dfd8659d7/16df7fb0958d4600800536b0d14a151d/FLAG174341328 [2024-11-28 03:58:22,206 INFO L435 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3d345d57-71d6-4e9e-9140-a659b2e77150/bin/uautomizer-verify-aQ6SnzHsRB/data/dfd8659d7/16df7fb0958d4600800536b0d14a151d [2024-11-28 03:58:22,208 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2024-11-28 03:58:22,210 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2024-11-28 03:58:22,213 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2024-11-28 03:58:22,213 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2024-11-28 03:58:22,218 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2024-11-28 03:58:22,219 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.11 03:58:22" (1/1) ... [2024-11-28 03:58:22,222 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@315debf6 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 03:58:22, skipping insertion in model container [2024-11-28 03:58:22,223 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.11 03:58:22" (1/1) ... [2024-11-28 03:58:22,309 INFO L175 MainTranslator]: Built tables and reachable declarations [2024-11-28 03:58:22,675 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-11-28 03:58:22,688 INFO L200 MainTranslator]: Completed pre-run [2024-11-28 03:58:22,744 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-11-28 03:58:22,773 INFO L204 MainTranslator]: Completed translation [2024-11-28 03:58:22,774 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 03:58:22 WrapperNode [2024-11-28 03:58:22,774 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2024-11-28 03:58:22,775 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2024-11-28 03:58:22,775 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2024-11-28 03:58:22,776 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2024-11-28 03:58:22,783 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 03:58:22" (1/1) ... [2024-11-28 03:58:22,798 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 03:58:22" (1/1) ... [2024-11-28 03:58:22,824 INFO L138 Inliner]: procedures = 121, calls = 31, calls flagged for inlining = 6, calls inlined = 6, statements flattened = 92 [2024-11-28 03:58:22,824 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2024-11-28 03:58:22,826 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2024-11-28 03:58:22,826 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2024-11-28 03:58:22,827 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2024-11-28 03:58:22,837 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 03:58:22" (1/1) ... [2024-11-28 03:58:22,837 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 03:58:22" (1/1) ... [2024-11-28 03:58:22,845 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 03:58:22" (1/1) ... [2024-11-28 03:58:22,878 INFO L175 MemorySlicer]: Split 17 memory accesses to 1 slices as follows [17]. 100 percent of accesses are in the largest equivalence class. The 0 initializations are split as follows [0]. The 8 writes are split as follows [8]. [2024-11-28 03:58:22,880 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 03:58:22" (1/1) ... [2024-11-28 03:58:22,880 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 03:58:22" (1/1) ... [2024-11-28 03:58:22,895 INFO L184 PluginConnector]: Executing the observer ReplaceArrayAssignments from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 03:58:22" (1/1) ... [2024-11-28 03:58:22,896 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 03:58:22" (1/1) ... [2024-11-28 03:58:22,903 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 03:58:22" (1/1) ... [2024-11-28 03:58:22,907 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 03:58:22" (1/1) ... [2024-11-28 03:58:22,908 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 03:58:22" (1/1) ... [2024-11-28 03:58:22,913 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2024-11-28 03:58:22,914 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2024-11-28 03:58:22,914 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2024-11-28 03:58:22,914 INFO L274 PluginConnector]: RCFGBuilder initialized [2024-11-28 03:58:22,919 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 03:58:22" (1/1) ... [2024-11-28 03:58:22,929 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2024-11-28 03:58:22,947 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3d345d57-71d6-4e9e-9140-a659b2e77150/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 03:58:22,965 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3d345d57-71d6-4e9e-9140-a659b2e77150/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (exit command is (exit), workingDir is null) [2024-11-28 03:58:22,972 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3d345d57-71d6-4e9e-9140-a659b2e77150/bin/uautomizer-verify-aQ6SnzHsRB/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Waiting until timeout for monitored process [2024-11-28 03:58:23,000 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#0 [2024-11-28 03:58:23,003 INFO L130 BoogieDeclarations]: Found specification of procedure alloc_and_zero [2024-11-28 03:58:23,004 INFO L138 BoogieDeclarations]: Found implementation of procedure alloc_and_zero [2024-11-28 03:58:23,004 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap [2024-11-28 03:58:23,004 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$#0 [2024-11-28 03:58:23,004 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$#0 [2024-11-28 03:58:23,004 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2024-11-28 03:58:23,004 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2024-11-28 03:58:23,004 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2024-11-28 03:58:23,155 INFO L234 CfgBuilder]: Building ICFG [2024-11-28 03:58:23,158 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2024-11-28 03:58:23,673 INFO L? ?]: Removed 107 outVars from TransFormulas that were not future-live. [2024-11-28 03:58:23,673 INFO L283 CfgBuilder]: Performing block encoding [2024-11-28 03:58:23,697 INFO L307 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2024-11-28 03:58:23,699 INFO L312 CfgBuilder]: Removed 3 assume(true) statements. [2024-11-28 03:58:23,699 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.11 03:58:23 BoogieIcfgContainer [2024-11-28 03:58:23,699 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2024-11-28 03:58:23,702 INFO L112 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2024-11-28 03:58:23,702 INFO L270 PluginConnector]: Initializing TraceAbstraction... [2024-11-28 03:58:23,709 INFO L274 PluginConnector]: TraceAbstraction initialized [2024-11-28 03:58:23,709 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 28.11 03:58:22" (1/3) ... [2024-11-28 03:58:23,710 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@79d1fc04 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.11 03:58:23, skipping insertion in model container [2024-11-28 03:58:23,710 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 03:58:22" (2/3) ... [2024-11-28 03:58:23,710 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@79d1fc04 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.11 03:58:23, skipping insertion in model container [2024-11-28 03:58:23,710 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.11 03:58:23" (3/3) ... [2024-11-28 03:58:23,713 INFO L128 eAbstractionObserver]: Analyzing ICFG sll-middle-shared.i [2024-11-28 03:58:23,731 INFO L216 ceAbstractionStarter]: Automizer settings: Hoare:None NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2024-11-28 03:58:23,735 INFO L151 ceAbstractionStarter]: Applying trace abstraction to ICFG sll-middle-shared.i that has 2 procedures, 101 locations, 1 initial locations, 3 loop locations, and 44 error locations. [2024-11-28 03:58:23,798 INFO L332 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2024-11-28 03:58:23,822 INFO L333 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mAutomataTypeConcurrency=PETRI_NET, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=None, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@181a2dc8, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2024-11-28 03:58:23,822 INFO L334 AbstractCegarLoop]: Starting to check reachability of 44 error locations. [2024-11-28 03:58:23,827 INFO L276 IsEmpty]: Start isEmpty. Operand has 101 states, 53 states have (on average 1.9622641509433962) internal successors, (104), 97 states have internal predecessors, (104), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2024-11-28 03:58:23,835 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 6 [2024-11-28 03:58:23,835 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 03:58:23,836 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1] [2024-11-28 03:58:23,836 INFO L396 AbstractCegarLoop]: === Iteration 1 === Targeting alloc_and_zeroErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [alloc_and_zeroErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, alloc_and_zeroErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 41 more)] === [2024-11-28 03:58:23,842 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 03:58:23,844 INFO L85 PathProgramCache]: Analyzing trace with hash 34543147, now seen corresponding path program 1 times [2024-11-28 03:58:23,853 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 03:58:23,853 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [63413129] [2024-11-28 03:58:23,854 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 03:58:23,855 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 03:58:23,989 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 03:58:24,122 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-28 03:58:24,123 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 03:58:24,124 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [63413129] [2024-11-28 03:58:24,124 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [63413129] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 03:58:24,124 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 03:58:24,125 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2024-11-28 03:58:24,128 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [342253337] [2024-11-28 03:58:24,129 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 03:58:24,134 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2024-11-28 03:58:24,135 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 03:58:24,165 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2024-11-28 03:58:24,166 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-11-28 03:58:24,168 INFO L87 Difference]: Start difference. First operand has 101 states, 53 states have (on average 1.9622641509433962) internal successors, (104), 97 states have internal predecessors, (104), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Second operand has 3 states, 2 states have (on average 2.0) internal successors, (4), 3 states have internal predecessors, (4), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 03:58:24,362 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 03:58:24,363 INFO L93 Difference]: Finished difference Result 100 states and 104 transitions. [2024-11-28 03:58:24,365 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-11-28 03:58:24,367 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 2 states have (on average 2.0) internal successors, (4), 3 states have internal predecessors, (4), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 5 [2024-11-28 03:58:24,367 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 03:58:24,376 INFO L225 Difference]: With dead ends: 100 [2024-11-28 03:58:24,376 INFO L226 Difference]: Without dead ends: 98 [2024-11-28 03:58:24,378 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-11-28 03:58:24,383 INFO L435 NwaCegarLoop]: 101 mSDtfsCounter, 1 mSDsluCounter, 56 mSDsCounter, 0 mSdLazyCounter, 49 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1 SdHoareTripleChecker+Valid, 157 SdHoareTripleChecker+Invalid, 49 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 49 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-11-28 03:58:24,384 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1 Valid, 157 Invalid, 49 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 49 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-11-28 03:58:24,401 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 98 states. [2024-11-28 03:58:24,433 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 98 to 98. [2024-11-28 03:58:24,436 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 98 states, 52 states have (on average 1.8846153846153846) internal successors, (98), 94 states have internal predecessors, (98), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2024-11-28 03:58:24,445 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 98 states to 98 states and 102 transitions. [2024-11-28 03:58:24,446 INFO L78 Accepts]: Start accepts. Automaton has 98 states and 102 transitions. Word has length 5 [2024-11-28 03:58:24,446 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 03:58:24,449 INFO L471 AbstractCegarLoop]: Abstraction has 98 states and 102 transitions. [2024-11-28 03:58:24,449 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 2 states have (on average 2.0) internal successors, (4), 3 states have internal predecessors, (4), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 03:58:24,449 INFO L276 IsEmpty]: Start isEmpty. Operand 98 states and 102 transitions. [2024-11-28 03:58:24,449 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 6 [2024-11-28 03:58:24,450 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 03:58:24,450 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1] [2024-11-28 03:58:24,450 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2024-11-28 03:58:24,450 INFO L396 AbstractCegarLoop]: === Iteration 2 === Targeting alloc_and_zeroErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [alloc_and_zeroErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, alloc_and_zeroErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 41 more)] === [2024-11-28 03:58:24,451 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 03:58:24,451 INFO L85 PathProgramCache]: Analyzing trace with hash 34543148, now seen corresponding path program 1 times [2024-11-28 03:58:24,451 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 03:58:24,451 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [844861536] [2024-11-28 03:58:24,451 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 03:58:24,451 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 03:58:24,483 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 03:58:24,574 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-28 03:58:24,574 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 03:58:24,575 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [844861536] [2024-11-28 03:58:24,575 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [844861536] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 03:58:24,575 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 03:58:24,575 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2024-11-28 03:58:24,575 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [696816039] [2024-11-28 03:58:24,575 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 03:58:24,576 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2024-11-28 03:58:24,577 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 03:58:24,577 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2024-11-28 03:58:24,577 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-11-28 03:58:24,577 INFO L87 Difference]: Start difference. First operand 98 states and 102 transitions. Second operand has 3 states, 2 states have (on average 2.0) internal successors, (4), 3 states have internal predecessors, (4), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 03:58:24,685 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 03:58:24,685 INFO L93 Difference]: Finished difference Result 97 states and 101 transitions. [2024-11-28 03:58:24,686 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-11-28 03:58:24,686 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 2 states have (on average 2.0) internal successors, (4), 3 states have internal predecessors, (4), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 5 [2024-11-28 03:58:24,687 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 03:58:24,688 INFO L225 Difference]: With dead ends: 97 [2024-11-28 03:58:24,688 INFO L226 Difference]: Without dead ends: 97 [2024-11-28 03:58:24,688 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-11-28 03:58:24,689 INFO L435 NwaCegarLoop]: 99 mSDtfsCounter, 1 mSDsluCounter, 64 mSDsCounter, 0 mSdLazyCounter, 37 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1 SdHoareTripleChecker+Valid, 163 SdHoareTripleChecker+Invalid, 37 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 37 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-28 03:58:24,689 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1 Valid, 163 Invalid, 37 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 37 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-28 03:58:24,690 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 97 states. [2024-11-28 03:58:24,695 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 97 to 97. [2024-11-28 03:58:24,696 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 97 states, 52 states have (on average 1.8653846153846154) internal successors, (97), 93 states have internal predecessors, (97), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2024-11-28 03:58:24,698 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 97 states to 97 states and 101 transitions. [2024-11-28 03:58:24,698 INFO L78 Accepts]: Start accepts. Automaton has 97 states and 101 transitions. Word has length 5 [2024-11-28 03:58:24,698 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 03:58:24,698 INFO L471 AbstractCegarLoop]: Abstraction has 97 states and 101 transitions. [2024-11-28 03:58:24,699 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 2 states have (on average 2.0) internal successors, (4), 3 states have internal predecessors, (4), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-28 03:58:24,699 INFO L276 IsEmpty]: Start isEmpty. Operand 97 states and 101 transitions. [2024-11-28 03:58:24,699 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 11 [2024-11-28 03:58:24,699 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 03:58:24,699 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 03:58:24,700 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2024-11-28 03:58:24,700 INFO L396 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [alloc_and_zeroErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, alloc_and_zeroErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 41 more)] === [2024-11-28 03:58:24,700 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 03:58:24,701 INFO L85 PathProgramCache]: Analyzing trace with hash -1042879868, now seen corresponding path program 1 times [2024-11-28 03:58:24,701 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 03:58:24,701 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1237320067] [2024-11-28 03:58:24,701 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 03:58:24,701 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 03:58:24,726 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 03:58:24,832 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-28 03:58:24,832 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 03:58:24,833 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1237320067] [2024-11-28 03:58:24,833 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1237320067] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 03:58:24,833 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 03:58:24,833 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2024-11-28 03:58:24,833 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [201634769] [2024-11-28 03:58:24,833 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 03:58:24,834 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2024-11-28 03:58:24,834 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 03:58:24,835 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2024-11-28 03:58:24,835 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-11-28 03:58:24,835 INFO L87 Difference]: Start difference. First operand 97 states and 101 transitions. Second operand has 3 states, 2 states have (on average 4.0) internal successors, (8), 3 states have internal predecessors, (8), 1 states have call successors, (1), 1 states have call predecessors, (1), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2024-11-28 03:58:24,979 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 03:58:24,981 INFO L93 Difference]: Finished difference Result 101 states and 107 transitions. [2024-11-28 03:58:24,981 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-11-28 03:58:24,981 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 2 states have (on average 4.0) internal successors, (8), 3 states have internal predecessors, (8), 1 states have call successors, (1), 1 states have call predecessors, (1), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 10 [2024-11-28 03:58:24,982 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 03:58:24,984 INFO L225 Difference]: With dead ends: 101 [2024-11-28 03:58:24,984 INFO L226 Difference]: Without dead ends: 101 [2024-11-28 03:58:24,984 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-11-28 03:58:24,989 INFO L435 NwaCegarLoop]: 91 mSDtfsCounter, 15 mSDsluCounter, 48 mSDsCounter, 0 mSdLazyCounter, 48 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 15 SdHoareTripleChecker+Valid, 139 SdHoareTripleChecker+Invalid, 49 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 48 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-28 03:58:24,990 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [15 Valid, 139 Invalid, 49 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 48 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-28 03:58:24,991 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 101 states. [2024-11-28 03:58:25,004 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 101 to 96. [2024-11-28 03:58:25,006 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 96 states, 52 states have (on average 1.8461538461538463) internal successors, (96), 92 states have internal predecessors, (96), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2024-11-28 03:58:25,008 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 96 states to 96 states and 100 transitions. [2024-11-28 03:58:25,011 INFO L78 Accepts]: Start accepts. Automaton has 96 states and 100 transitions. Word has length 10 [2024-11-28 03:58:25,011 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 03:58:25,012 INFO L471 AbstractCegarLoop]: Abstraction has 96 states and 100 transitions. [2024-11-28 03:58:25,012 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 2 states have (on average 4.0) internal successors, (8), 3 states have internal predecessors, (8), 1 states have call successors, (1), 1 states have call predecessors, (1), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2024-11-28 03:58:25,012 INFO L276 IsEmpty]: Start isEmpty. Operand 96 states and 100 transitions. [2024-11-28 03:58:25,012 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 11 [2024-11-28 03:58:25,012 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 03:58:25,012 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 03:58:25,013 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2024-11-28 03:58:25,013 INFO L396 AbstractCegarLoop]: === Iteration 4 === Targeting ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [alloc_and_zeroErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, alloc_and_zeroErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 41 more)] === [2024-11-28 03:58:25,013 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 03:58:25,013 INFO L85 PathProgramCache]: Analyzing trace with hash -1042879867, now seen corresponding path program 1 times [2024-11-28 03:58:25,014 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 03:58:25,014 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2144856990] [2024-11-28 03:58:25,014 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 03:58:25,014 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 03:58:25,040 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 03:58:25,156 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-28 03:58:25,157 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 03:58:25,157 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2144856990] [2024-11-28 03:58:25,157 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2144856990] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 03:58:25,157 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 03:58:25,157 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2024-11-28 03:58:25,158 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [203304558] [2024-11-28 03:58:25,158 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 03:58:25,158 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2024-11-28 03:58:25,158 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 03:58:25,159 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2024-11-28 03:58:25,159 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-11-28 03:58:25,159 INFO L87 Difference]: Start difference. First operand 96 states and 100 transitions. Second operand has 3 states, 2 states have (on average 4.0) internal successors, (8), 3 states have internal predecessors, (8), 1 states have call successors, (1), 1 states have call predecessors, (1), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2024-11-28 03:58:25,261 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 03:58:25,262 INFO L93 Difference]: Finished difference Result 100 states and 106 transitions. [2024-11-28 03:58:25,262 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-11-28 03:58:25,262 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 2 states have (on average 4.0) internal successors, (8), 3 states have internal predecessors, (8), 1 states have call successors, (1), 1 states have call predecessors, (1), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 10 [2024-11-28 03:58:25,263 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 03:58:25,264 INFO L225 Difference]: With dead ends: 100 [2024-11-28 03:58:25,264 INFO L226 Difference]: Without dead ends: 100 [2024-11-28 03:58:25,264 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-11-28 03:58:25,265 INFO L435 NwaCegarLoop]: 91 mSDtfsCounter, 15 mSDsluCounter, 56 mSDsCounter, 0 mSdLazyCounter, 38 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 15 SdHoareTripleChecker+Valid, 147 SdHoareTripleChecker+Invalid, 39 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 38 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-28 03:58:25,265 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [15 Valid, 147 Invalid, 39 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 38 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-28 03:58:25,267 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 100 states. [2024-11-28 03:58:25,272 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 100 to 95. [2024-11-28 03:58:25,272 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 95 states, 52 states have (on average 1.8269230769230769) internal successors, (95), 91 states have internal predecessors, (95), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2024-11-28 03:58:25,274 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 95 states to 95 states and 99 transitions. [2024-11-28 03:58:25,274 INFO L78 Accepts]: Start accepts. Automaton has 95 states and 99 transitions. Word has length 10 [2024-11-28 03:58:25,275 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 03:58:25,275 INFO L471 AbstractCegarLoop]: Abstraction has 95 states and 99 transitions. [2024-11-28 03:58:25,275 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 2 states have (on average 4.0) internal successors, (8), 3 states have internal predecessors, (8), 1 states have call successors, (1), 1 states have call predecessors, (1), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2024-11-28 03:58:25,275 INFO L276 IsEmpty]: Start isEmpty. Operand 95 states and 99 transitions. [2024-11-28 03:58:25,276 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 13 [2024-11-28 03:58:25,276 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 03:58:25,276 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 03:58:25,276 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3 [2024-11-28 03:58:25,276 INFO L396 AbstractCegarLoop]: === Iteration 5 === Targeting ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [alloc_and_zeroErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, alloc_and_zeroErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 41 more)] === [2024-11-28 03:58:25,277 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 03:58:25,277 INFO L85 PathProgramCache]: Analyzing trace with hash -1480173691, now seen corresponding path program 1 times [2024-11-28 03:58:25,277 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 03:58:25,278 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2135183455] [2024-11-28 03:58:25,278 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 03:58:25,278 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 03:58:25,323 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 03:58:25,493 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-28 03:58:25,493 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 03:58:25,493 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2135183455] [2024-11-28 03:58:25,494 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2135183455] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 03:58:25,494 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 03:58:25,494 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2024-11-28 03:58:25,494 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [277800769] [2024-11-28 03:58:25,494 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 03:58:25,494 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2024-11-28 03:58:25,494 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 03:58:25,495 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2024-11-28 03:58:25,495 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-11-28 03:58:25,495 INFO L87 Difference]: Start difference. First operand 95 states and 99 transitions. Second operand has 3 states, 2 states have (on average 5.0) internal successors, (10), 3 states have internal predecessors, (10), 1 states have call successors, (1), 1 states have call predecessors, (1), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2024-11-28 03:58:25,621 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 03:58:25,621 INFO L93 Difference]: Finished difference Result 99 states and 105 transitions. [2024-11-28 03:58:25,621 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-11-28 03:58:25,622 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 2 states have (on average 5.0) internal successors, (10), 3 states have internal predecessors, (10), 1 states have call successors, (1), 1 states have call predecessors, (1), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 12 [2024-11-28 03:58:25,622 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 03:58:25,623 INFO L225 Difference]: With dead ends: 99 [2024-11-28 03:58:25,623 INFO L226 Difference]: Without dead ends: 99 [2024-11-28 03:58:25,623 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-11-28 03:58:25,624 INFO L435 NwaCegarLoop]: 92 mSDtfsCounter, 12 mSDsluCounter, 48 mSDsCounter, 0 mSdLazyCounter, 47 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 12 SdHoareTripleChecker+Valid, 140 SdHoareTripleChecker+Invalid, 47 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 47 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-28 03:58:25,624 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [12 Valid, 140 Invalid, 47 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 47 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-28 03:58:25,629 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 99 states. [2024-11-28 03:58:25,638 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 99 to 94. [2024-11-28 03:58:25,639 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 94 states, 52 states have (on average 1.8076923076923077) internal successors, (94), 90 states have internal predecessors, (94), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2024-11-28 03:58:25,640 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 94 states to 94 states and 98 transitions. [2024-11-28 03:58:25,643 INFO L78 Accepts]: Start accepts. Automaton has 94 states and 98 transitions. Word has length 12 [2024-11-28 03:58:25,644 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 03:58:25,644 INFO L471 AbstractCegarLoop]: Abstraction has 94 states and 98 transitions. [2024-11-28 03:58:25,644 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 2 states have (on average 5.0) internal successors, (10), 3 states have internal predecessors, (10), 1 states have call successors, (1), 1 states have call predecessors, (1), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2024-11-28 03:58:25,644 INFO L276 IsEmpty]: Start isEmpty. Operand 94 states and 98 transitions. [2024-11-28 03:58:25,645 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 13 [2024-11-28 03:58:25,645 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 03:58:25,645 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 03:58:25,645 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4 [2024-11-28 03:58:25,645 INFO L396 AbstractCegarLoop]: === Iteration 6 === Targeting ULTIMATE.startErr3REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [alloc_and_zeroErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, alloc_and_zeroErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 41 more)] === [2024-11-28 03:58:25,646 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 03:58:25,647 INFO L85 PathProgramCache]: Analyzing trace with hash -1480173690, now seen corresponding path program 1 times [2024-11-28 03:58:25,648 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 03:58:25,648 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [872361883] [2024-11-28 03:58:25,648 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 03:58:25,648 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 03:58:25,672 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 03:58:25,835 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-28 03:58:25,835 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 03:58:25,835 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [872361883] [2024-11-28 03:58:25,835 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [872361883] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 03:58:25,835 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 03:58:25,835 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2024-11-28 03:58:25,835 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [161900264] [2024-11-28 03:58:25,836 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 03:58:25,836 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2024-11-28 03:58:25,836 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 03:58:25,837 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2024-11-28 03:58:25,837 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-11-28 03:58:25,837 INFO L87 Difference]: Start difference. First operand 94 states and 98 transitions. Second operand has 3 states, 2 states have (on average 5.0) internal successors, (10), 3 states have internal predecessors, (10), 1 states have call successors, (1), 1 states have call predecessors, (1), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2024-11-28 03:58:25,942 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 03:58:25,942 INFO L93 Difference]: Finished difference Result 98 states and 104 transitions. [2024-11-28 03:58:25,943 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-11-28 03:58:25,943 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 2 states have (on average 5.0) internal successors, (10), 3 states have internal predecessors, (10), 1 states have call successors, (1), 1 states have call predecessors, (1), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 12 [2024-11-28 03:58:25,944 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 03:58:25,944 INFO L225 Difference]: With dead ends: 98 [2024-11-28 03:58:25,944 INFO L226 Difference]: Without dead ends: 98 [2024-11-28 03:58:25,945 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-11-28 03:58:25,946 INFO L435 NwaCegarLoop]: 92 mSDtfsCounter, 12 mSDsluCounter, 56 mSDsCounter, 0 mSdLazyCounter, 37 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 12 SdHoareTripleChecker+Valid, 148 SdHoareTripleChecker+Invalid, 37 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 37 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-28 03:58:25,946 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [12 Valid, 148 Invalid, 37 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 37 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-28 03:58:25,951 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 98 states. [2024-11-28 03:58:25,959 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 98 to 93. [2024-11-28 03:58:25,959 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 93 states, 52 states have (on average 1.7884615384615385) internal successors, (93), 89 states have internal predecessors, (93), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2024-11-28 03:58:25,960 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 93 states to 93 states and 97 transitions. [2024-11-28 03:58:25,960 INFO L78 Accepts]: Start accepts. Automaton has 93 states and 97 transitions. Word has length 12 [2024-11-28 03:58:25,960 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 03:58:25,961 INFO L471 AbstractCegarLoop]: Abstraction has 93 states and 97 transitions. [2024-11-28 03:58:25,961 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 2 states have (on average 5.0) internal successors, (10), 3 states have internal predecessors, (10), 1 states have call successors, (1), 1 states have call predecessors, (1), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2024-11-28 03:58:25,961 INFO L276 IsEmpty]: Start isEmpty. Operand 93 states and 97 transitions. [2024-11-28 03:58:25,961 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2024-11-28 03:58:25,966 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 03:58:25,966 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 03:58:25,966 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5 [2024-11-28 03:58:25,966 INFO L396 AbstractCegarLoop]: === Iteration 7 === Targeting ULTIMATE.startErr4REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [alloc_and_zeroErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, alloc_and_zeroErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 41 more)] === [2024-11-28 03:58:25,967 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 03:58:25,967 INFO L85 PathProgramCache]: Analyzing trace with hash -812742458, now seen corresponding path program 1 times [2024-11-28 03:58:25,967 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 03:58:25,967 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [459054523] [2024-11-28 03:58:25,967 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 03:58:25,967 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 03:58:26,016 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 03:58:26,376 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-28 03:58:26,377 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 03:58:26,377 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [459054523] [2024-11-28 03:58:26,377 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [459054523] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 03:58:26,377 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 03:58:26,377 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-11-28 03:58:26,377 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1134197126] [2024-11-28 03:58:26,377 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 03:58:26,378 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2024-11-28 03:58:26,378 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 03:58:26,378 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-11-28 03:58:26,378 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2024-11-28 03:58:26,379 INFO L87 Difference]: Start difference. First operand 93 states and 97 transitions. Second operand has 7 states, 6 states have (on average 2.0) internal successors, (12), 6 states have internal predecessors, (12), 1 states have call successors, (1), 1 states have call predecessors, (1), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2024-11-28 03:58:26,678 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 03:58:26,678 INFO L93 Difference]: Finished difference Result 93 states and 99 transitions. [2024-11-28 03:58:26,679 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-28 03:58:26,679 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 6 states have (on average 2.0) internal successors, (12), 6 states have internal predecessors, (12), 1 states have call successors, (1), 1 states have call predecessors, (1), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 14 [2024-11-28 03:58:26,679 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 03:58:26,680 INFO L225 Difference]: With dead ends: 93 [2024-11-28 03:58:26,680 INFO L226 Difference]: Without dead ends: 93 [2024-11-28 03:58:26,681 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2024-11-28 03:58:26,681 INFO L435 NwaCegarLoop]: 72 mSDtfsCounter, 17 mSDsluCounter, 205 mSDsCounter, 0 mSdLazyCounter, 232 mSolverCounterSat, 6 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 17 SdHoareTripleChecker+Valid, 277 SdHoareTripleChecker+Invalid, 238 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 6 IncrementalHoareTripleChecker+Valid, 232 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2024-11-28 03:58:26,682 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [17 Valid, 277 Invalid, 238 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [6 Valid, 232 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2024-11-28 03:58:26,684 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 93 states. [2024-11-28 03:58:26,691 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 93 to 88. [2024-11-28 03:58:26,695 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 88 states, 52 states have (on average 1.6923076923076923) internal successors, (88), 84 states have internal predecessors, (88), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2024-11-28 03:58:26,696 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 88 states to 88 states and 92 transitions. [2024-11-28 03:58:26,696 INFO L78 Accepts]: Start accepts. Automaton has 88 states and 92 transitions. Word has length 14 [2024-11-28 03:58:26,696 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 03:58:26,696 INFO L471 AbstractCegarLoop]: Abstraction has 88 states and 92 transitions. [2024-11-28 03:58:26,696 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 6 states have (on average 2.0) internal successors, (12), 6 states have internal predecessors, (12), 1 states have call successors, (1), 1 states have call predecessors, (1), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2024-11-28 03:58:26,696 INFO L276 IsEmpty]: Start isEmpty. Operand 88 states and 92 transitions. [2024-11-28 03:58:26,697 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2024-11-28 03:58:26,697 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 03:58:26,697 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 03:58:26,697 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6 [2024-11-28 03:58:26,697 INFO L396 AbstractCegarLoop]: === Iteration 8 === Targeting ULTIMATE.startErr5REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [alloc_and_zeroErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, alloc_and_zeroErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 41 more)] === [2024-11-28 03:58:26,698 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 03:58:26,698 INFO L85 PathProgramCache]: Analyzing trace with hash -812742457, now seen corresponding path program 1 times [2024-11-28 03:58:26,698 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 03:58:26,698 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1095937782] [2024-11-28 03:58:26,698 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 03:58:26,698 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 03:58:26,742 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 03:58:27,200 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-28 03:58:27,200 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 03:58:27,200 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1095937782] [2024-11-28 03:58:27,200 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1095937782] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 03:58:27,200 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 03:58:27,200 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-11-28 03:58:27,200 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1307297672] [2024-11-28 03:58:27,200 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 03:58:27,201 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2024-11-28 03:58:27,201 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 03:58:27,201 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-11-28 03:58:27,201 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2024-11-28 03:58:27,202 INFO L87 Difference]: Start difference. First operand 88 states and 92 transitions. Second operand has 7 states, 6 states have (on average 2.0) internal successors, (12), 6 states have internal predecessors, (12), 1 states have call successors, (1), 1 states have call predecessors, (1), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2024-11-28 03:58:27,495 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 03:58:27,495 INFO L93 Difference]: Finished difference Result 91 states and 97 transitions. [2024-11-28 03:58:27,495 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-28 03:58:27,495 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 6 states have (on average 2.0) internal successors, (12), 6 states have internal predecessors, (12), 1 states have call successors, (1), 1 states have call predecessors, (1), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 14 [2024-11-28 03:58:27,496 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 03:58:27,496 INFO L225 Difference]: With dead ends: 91 [2024-11-28 03:58:27,496 INFO L226 Difference]: Without dead ends: 91 [2024-11-28 03:58:27,496 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2024-11-28 03:58:27,497 INFO L435 NwaCegarLoop]: 82 mSDtfsCounter, 8 mSDsluCounter, 188 mSDsCounter, 0 mSdLazyCounter, 251 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 8 SdHoareTripleChecker+Valid, 270 SdHoareTripleChecker+Invalid, 253 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 251 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2024-11-28 03:58:27,498 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [8 Valid, 270 Invalid, 253 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 251 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2024-11-28 03:58:27,498 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 91 states. [2024-11-28 03:58:27,501 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 91 to 86. [2024-11-28 03:58:27,502 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 86 states, 52 states have (on average 1.6538461538461537) internal successors, (86), 82 states have internal predecessors, (86), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2024-11-28 03:58:27,502 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 86 states to 86 states and 90 transitions. [2024-11-28 03:58:27,503 INFO L78 Accepts]: Start accepts. Automaton has 86 states and 90 transitions. Word has length 14 [2024-11-28 03:58:27,503 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 03:58:27,503 INFO L471 AbstractCegarLoop]: Abstraction has 86 states and 90 transitions. [2024-11-28 03:58:27,503 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 6 states have (on average 2.0) internal successors, (12), 6 states have internal predecessors, (12), 1 states have call successors, (1), 1 states have call predecessors, (1), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2024-11-28 03:58:27,503 INFO L276 IsEmpty]: Start isEmpty. Operand 86 states and 90 transitions. [2024-11-28 03:58:27,503 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2024-11-28 03:58:27,503 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 03:58:27,504 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 03:58:27,504 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7 [2024-11-28 03:58:27,504 INFO L396 AbstractCegarLoop]: === Iteration 9 === Targeting ULTIMATE.startErr20REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [alloc_and_zeroErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, alloc_and_zeroErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 41 more)] === [2024-11-28 03:58:27,504 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 03:58:27,504 INFO L85 PathProgramCache]: Analyzing trace with hash -2108784643, now seen corresponding path program 1 times [2024-11-28 03:58:27,505 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 03:58:27,505 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1133887360] [2024-11-28 03:58:27,505 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 03:58:27,505 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 03:58:27,528 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 03:58:27,665 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-28 03:58:27,666 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 03:58:27,666 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1133887360] [2024-11-28 03:58:27,666 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1133887360] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 03:58:27,666 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 03:58:27,666 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-11-28 03:58:27,666 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1747954577] [2024-11-28 03:58:27,666 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 03:58:27,666 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2024-11-28 03:58:27,666 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 03:58:27,667 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-11-28 03:58:27,667 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2024-11-28 03:58:27,667 INFO L87 Difference]: Start difference. First operand 86 states and 90 transitions. Second operand has 7 states, 6 states have (on average 3.1666666666666665) internal successors, (19), 7 states have internal predecessors, (19), 1 states have call successors, (1), 1 states have call predecessors, (1), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2024-11-28 03:58:27,906 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 03:58:27,906 INFO L93 Difference]: Finished difference Result 112 states and 124 transitions. [2024-11-28 03:58:27,906 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2024-11-28 03:58:27,907 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 6 states have (on average 3.1666666666666665) internal successors, (19), 7 states have internal predecessors, (19), 1 states have call successors, (1), 1 states have call predecessors, (1), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 21 [2024-11-28 03:58:27,907 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 03:58:27,908 INFO L225 Difference]: With dead ends: 112 [2024-11-28 03:58:27,908 INFO L226 Difference]: Without dead ends: 112 [2024-11-28 03:58:27,908 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2024-11-28 03:58:27,908 INFO L435 NwaCegarLoop]: 63 mSDtfsCounter, 41 mSDsluCounter, 178 mSDsCounter, 0 mSdLazyCounter, 192 mSolverCounterSat, 5 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 41 SdHoareTripleChecker+Valid, 241 SdHoareTripleChecker+Invalid, 197 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 5 IncrementalHoareTripleChecker+Valid, 192 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-11-28 03:58:27,909 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [41 Valid, 241 Invalid, 197 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [5 Valid, 192 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-11-28 03:58:27,909 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 112 states. [2024-11-28 03:58:27,917 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 112 to 103. [2024-11-28 03:58:27,918 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 103 states, 70 states have (on average 1.6428571428571428) internal successors, (115), 98 states have internal predecessors, (115), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-28 03:58:27,919 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 103 states to 103 states and 121 transitions. [2024-11-28 03:58:27,919 INFO L78 Accepts]: Start accepts. Automaton has 103 states and 121 transitions. Word has length 21 [2024-11-28 03:58:27,919 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 03:58:27,919 INFO L471 AbstractCegarLoop]: Abstraction has 103 states and 121 transitions. [2024-11-28 03:58:27,919 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 6 states have (on average 3.1666666666666665) internal successors, (19), 7 states have internal predecessors, (19), 1 states have call successors, (1), 1 states have call predecessors, (1), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2024-11-28 03:58:27,919 INFO L276 IsEmpty]: Start isEmpty. Operand 103 states and 121 transitions. [2024-11-28 03:58:27,924 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2024-11-28 03:58:27,924 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 03:58:27,924 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 03:58:27,924 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8 [2024-11-28 03:58:27,924 INFO L396 AbstractCegarLoop]: === Iteration 10 === Targeting ULTIMATE.startErr21REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [alloc_and_zeroErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, alloc_and_zeroErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 41 more)] === [2024-11-28 03:58:27,925 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 03:58:27,928 INFO L85 PathProgramCache]: Analyzing trace with hash -2108784642, now seen corresponding path program 1 times [2024-11-28 03:58:27,929 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 03:58:27,929 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1133241503] [2024-11-28 03:58:27,929 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 03:58:27,929 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 03:58:27,964 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 03:58:28,322 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-28 03:58:28,322 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 03:58:28,323 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1133241503] [2024-11-28 03:58:28,323 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1133241503] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 03:58:28,323 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 03:58:28,323 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2024-11-28 03:58:28,323 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [326665339] [2024-11-28 03:58:28,323 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 03:58:28,324 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 9 states [2024-11-28 03:58:28,324 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 03:58:28,324 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2024-11-28 03:58:28,325 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=57, Unknown=0, NotChecked=0, Total=72 [2024-11-28 03:58:28,326 INFO L87 Difference]: Start difference. First operand 103 states and 121 transitions. Second operand has 9 states, 8 states have (on average 2.375) internal successors, (19), 8 states have internal predecessors, (19), 1 states have call successors, (1), 1 states have call predecessors, (1), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2024-11-28 03:58:28,591 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 03:58:28,591 INFO L93 Difference]: Finished difference Result 115 states and 130 transitions. [2024-11-28 03:58:28,592 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2024-11-28 03:58:28,593 INFO L78 Accepts]: Start accepts. Automaton has has 9 states, 8 states have (on average 2.375) internal successors, (19), 8 states have internal predecessors, (19), 1 states have call successors, (1), 1 states have call predecessors, (1), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 21 [2024-11-28 03:58:28,593 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 03:58:28,593 INFO L225 Difference]: With dead ends: 115 [2024-11-28 03:58:28,594 INFO L226 Difference]: Without dead ends: 115 [2024-11-28 03:58:28,594 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=19, Invalid=71, Unknown=0, NotChecked=0, Total=90 [2024-11-28 03:58:28,595 INFO L435 NwaCegarLoop]: 67 mSDtfsCounter, 21 mSDsluCounter, 399 mSDsCounter, 0 mSdLazyCounter, 225 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 21 SdHoareTripleChecker+Valid, 466 SdHoareTripleChecker+Invalid, 228 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 225 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-11-28 03:58:28,596 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [21 Valid, 466 Invalid, 228 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 225 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-11-28 03:58:28,597 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 115 states. [2024-11-28 03:58:28,603 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 115 to 111. [2024-11-28 03:58:28,608 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 111 states, 78 states have (on average 1.5897435897435896) internal successors, (124), 106 states have internal predecessors, (124), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-28 03:58:28,609 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 111 states to 111 states and 130 transitions. [2024-11-28 03:58:28,609 INFO L78 Accepts]: Start accepts. Automaton has 111 states and 130 transitions. Word has length 21 [2024-11-28 03:58:28,609 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 03:58:28,609 INFO L471 AbstractCegarLoop]: Abstraction has 111 states and 130 transitions. [2024-11-28 03:58:28,609 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 9 states, 8 states have (on average 2.375) internal successors, (19), 8 states have internal predecessors, (19), 1 states have call successors, (1), 1 states have call predecessors, (1), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2024-11-28 03:58:28,610 INFO L276 IsEmpty]: Start isEmpty. Operand 111 states and 130 transitions. [2024-11-28 03:58:28,610 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2024-11-28 03:58:28,610 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 03:58:28,610 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 03:58:28,611 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable9 [2024-11-28 03:58:28,611 INFO L396 AbstractCegarLoop]: === Iteration 11 === Targeting ULTIMATE.startErr26REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [alloc_and_zeroErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, alloc_and_zeroErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 41 more)] === [2024-11-28 03:58:28,611 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 03:58:28,611 INFO L85 PathProgramCache]: Analyzing trace with hash 682598732, now seen corresponding path program 1 times [2024-11-28 03:58:28,612 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 03:58:28,612 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [619067505] [2024-11-28 03:58:28,612 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 03:58:28,612 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 03:58:28,641 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 03:58:28,810 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-28 03:58:28,810 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 03:58:28,810 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [619067505] [2024-11-28 03:58:28,811 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [619067505] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 03:58:28,811 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 03:58:28,811 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2024-11-28 03:58:28,811 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [664525038] [2024-11-28 03:58:28,811 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 03:58:28,811 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2024-11-28 03:58:28,811 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 03:58:28,812 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2024-11-28 03:58:28,812 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=43, Unknown=0, NotChecked=0, Total=56 [2024-11-28 03:58:28,812 INFO L87 Difference]: Start difference. First operand 111 states and 130 transitions. Second operand has 8 states, 8 states have (on average 2.625) internal successors, (21), 7 states have internal predecessors, (21), 1 states have call successors, (1), 1 states have call predecessors, (1), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2024-11-28 03:58:28,918 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 03:58:28,918 INFO L93 Difference]: Finished difference Result 117 states and 138 transitions. [2024-11-28 03:58:28,919 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2024-11-28 03:58:28,919 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 2.625) internal successors, (21), 7 states have internal predecessors, (21), 1 states have call successors, (1), 1 states have call predecessors, (1), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 23 [2024-11-28 03:58:28,919 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 03:58:28,920 INFO L225 Difference]: With dead ends: 117 [2024-11-28 03:58:28,920 INFO L226 Difference]: Without dead ends: 117 [2024-11-28 03:58:28,920 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=43, Unknown=0, NotChecked=0, Total=56 [2024-11-28 03:58:28,921 INFO L435 NwaCegarLoop]: 79 mSDtfsCounter, 25 mSDsluCounter, 432 mSDsCounter, 0 mSdLazyCounter, 96 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 26 SdHoareTripleChecker+Valid, 511 SdHoareTripleChecker+Invalid, 96 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 96 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-28 03:58:28,921 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [26 Valid, 511 Invalid, 96 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 96 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-28 03:58:28,921 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 117 states. [2024-11-28 03:58:28,924 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 117 to 112. [2024-11-28 03:58:28,925 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 112 states, 79 states have (on average 1.5569620253164558) internal successors, (123), 107 states have internal predecessors, (123), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-28 03:58:28,926 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 112 states to 112 states and 129 transitions. [2024-11-28 03:58:28,926 INFO L78 Accepts]: Start accepts. Automaton has 112 states and 129 transitions. Word has length 23 [2024-11-28 03:58:28,926 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 03:58:28,926 INFO L471 AbstractCegarLoop]: Abstraction has 112 states and 129 transitions. [2024-11-28 03:58:28,926 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 2.625) internal successors, (21), 7 states have internal predecessors, (21), 1 states have call successors, (1), 1 states have call predecessors, (1), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2024-11-28 03:58:28,926 INFO L276 IsEmpty]: Start isEmpty. Operand 112 states and 129 transitions. [2024-11-28 03:58:28,927 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-11-28 03:58:28,927 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 03:58:28,927 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 03:58:28,927 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable10 [2024-11-28 03:58:28,928 INFO L396 AbstractCegarLoop]: === Iteration 12 === Targeting ULTIMATE.startErr8REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [alloc_and_zeroErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, alloc_and_zeroErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 41 more)] === [2024-11-28 03:58:28,928 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 03:58:28,928 INFO L85 PathProgramCache]: Analyzing trace with hash 1792494994, now seen corresponding path program 1 times [2024-11-28 03:58:28,928 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 03:58:28,928 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [848419897] [2024-11-28 03:58:28,928 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 03:58:28,929 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 03:58:28,952 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 03:58:29,151 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-28 03:58:29,151 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 03:58:29,151 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [848419897] [2024-11-28 03:58:29,151 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [848419897] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 03:58:29,152 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 03:58:29,152 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-11-28 03:58:29,152 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [717675829] [2024-11-28 03:58:29,152 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 03:58:29,152 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2024-11-28 03:58:29,152 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 03:58:29,153 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-11-28 03:58:29,153 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2024-11-28 03:58:29,153 INFO L87 Difference]: Start difference. First operand 112 states and 129 transitions. Second operand has 7 states, 6 states have (on average 3.3333333333333335) internal successors, (20), 6 states have internal predecessors, (20), 2 states have call successors, (2), 2 states have call predecessors, (2), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2024-11-28 03:58:29,356 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 03:58:29,357 INFO L93 Difference]: Finished difference Result 112 states and 128 transitions. [2024-11-28 03:58:29,357 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-28 03:58:29,357 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 6 states have (on average 3.3333333333333335) internal successors, (20), 6 states have internal predecessors, (20), 2 states have call successors, (2), 2 states have call predecessors, (2), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Word has length 24 [2024-11-28 03:58:29,358 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 03:58:29,358 INFO L225 Difference]: With dead ends: 112 [2024-11-28 03:58:29,358 INFO L226 Difference]: Without dead ends: 112 [2024-11-28 03:58:29,359 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2024-11-28 03:58:29,359 INFO L435 NwaCegarLoop]: 71 mSDtfsCounter, 14 mSDsluCounter, 165 mSDsCounter, 0 mSdLazyCounter, 180 mSolverCounterSat, 8 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 14 SdHoareTripleChecker+Valid, 236 SdHoareTripleChecker+Invalid, 188 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 8 IncrementalHoareTripleChecker+Valid, 180 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-11-28 03:58:29,359 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [14 Valid, 236 Invalid, 188 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [8 Valid, 180 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-11-28 03:58:29,360 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 112 states. [2024-11-28 03:58:29,362 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 112 to 112. [2024-11-28 03:58:29,363 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 112 states, 79 states have (on average 1.5443037974683544) internal successors, (122), 107 states have internal predecessors, (122), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-28 03:58:29,364 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 112 states to 112 states and 128 transitions. [2024-11-28 03:58:29,364 INFO L78 Accepts]: Start accepts. Automaton has 112 states and 128 transitions. Word has length 24 [2024-11-28 03:58:29,364 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 03:58:29,364 INFO L471 AbstractCegarLoop]: Abstraction has 112 states and 128 transitions. [2024-11-28 03:58:29,364 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 6 states have (on average 3.3333333333333335) internal successors, (20), 6 states have internal predecessors, (20), 2 states have call successors, (2), 2 states have call predecessors, (2), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2024-11-28 03:58:29,365 INFO L276 IsEmpty]: Start isEmpty. Operand 112 states and 128 transitions. [2024-11-28 03:58:29,365 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2024-11-28 03:58:29,365 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 03:58:29,365 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 03:58:29,365 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable11 [2024-11-28 03:58:29,366 INFO L396 AbstractCegarLoop]: === Iteration 13 === Targeting ULTIMATE.startErr9REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [alloc_and_zeroErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, alloc_and_zeroErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 41 more)] === [2024-11-28 03:58:29,366 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 03:58:29,366 INFO L85 PathProgramCache]: Analyzing trace with hash 1792494995, now seen corresponding path program 1 times [2024-11-28 03:58:29,366 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 03:58:29,366 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [741749023] [2024-11-28 03:58:29,366 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 03:58:29,366 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 03:58:29,392 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 03:58:29,715 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-28 03:58:29,716 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 03:58:29,716 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [741749023] [2024-11-28 03:58:29,716 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [741749023] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-28 03:58:29,716 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1874226064] [2024-11-28 03:58:29,716 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 03:58:29,716 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-28 03:58:29,716 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3d345d57-71d6-4e9e-9140-a659b2e77150/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 03:58:29,720 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3d345d57-71d6-4e9e-9140-a659b2e77150/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-28 03:58:29,723 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3d345d57-71d6-4e9e-9140-a659b2e77150/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2024-11-28 03:58:29,861 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 03:58:29,867 INFO L256 TraceCheckSpWp]: Trace formula consists of 207 conjuncts, 12 conjuncts are in the unsatisfiable core [2024-11-28 03:58:29,872 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-28 03:58:30,051 WARN L873 $PredicateComparison]: unable to prove that (exists ((alloc_and_zero_~pi~0.base Int)) (and (= (select |c_old(#valid)| alloc_and_zero_~pi~0.base) 0) (= (store |c_old(#length)| alloc_and_zero_~pi~0.base (select |c_#length| alloc_and_zero_~pi~0.base)) |c_#length|))) is different from true [2024-11-28 03:58:30,130 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-11-28 03:58:30,138 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 11 [2024-11-28 03:58:30,155 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-11-28 03:58:30,155 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 11 treesize of output 11 [2024-11-28 03:58:30,183 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-28 03:58:30,184 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-11-28 03:58:30,184 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1874226064] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 03:58:30,184 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-11-28 03:58:30,184 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [11] total 15 [2024-11-28 03:58:30,184 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1502490638] [2024-11-28 03:58:30,184 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 03:58:30,185 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2024-11-28 03:58:30,185 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 03:58:30,185 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-11-28 03:58:30,185 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=43, Invalid=170, Unknown=1, NotChecked=26, Total=240 [2024-11-28 03:58:30,186 INFO L87 Difference]: Start difference. First operand 112 states and 128 transitions. Second operand has 7 states, 6 states have (on average 3.3333333333333335) internal successors, (20), 5 states have internal predecessors, (20), 2 states have call successors, (2), 2 states have call predecessors, (2), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2024-11-28 03:58:30,364 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 03:58:30,364 INFO L93 Difference]: Finished difference Result 116 states and 124 transitions. [2024-11-28 03:58:30,365 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2024-11-28 03:58:30,365 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 6 states have (on average 3.3333333333333335) internal successors, (20), 5 states have internal predecessors, (20), 2 states have call successors, (2), 2 states have call predecessors, (2), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Word has length 24 [2024-11-28 03:58:30,365 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 03:58:30,366 INFO L225 Difference]: With dead ends: 116 [2024-11-28 03:58:30,366 INFO L226 Difference]: Without dead ends: 116 [2024-11-28 03:58:30,367 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 34 GetRequests, 20 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 24 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=43, Invalid=170, Unknown=1, NotChecked=26, Total=240 [2024-11-28 03:58:30,367 INFO L435 NwaCegarLoop]: 75 mSDtfsCounter, 26 mSDsluCounter, 124 mSDsCounter, 0 mSdLazyCounter, 135 mSolverCounterSat, 7 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 26 SdHoareTripleChecker+Valid, 199 SdHoareTripleChecker+Invalid, 267 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 7 IncrementalHoareTripleChecker+Valid, 135 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 125 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-11-28 03:58:30,368 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [26 Valid, 199 Invalid, 267 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [7 Valid, 135 Invalid, 0 Unknown, 125 Unchecked, 0.2s Time] [2024-11-28 03:58:30,368 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 116 states. [2024-11-28 03:58:30,371 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 116 to 112. [2024-11-28 03:58:30,371 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 112 states, 79 states have (on average 1.4936708860759493) internal successors, (118), 107 states have internal predecessors, (118), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-28 03:58:30,372 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 112 states to 112 states and 124 transitions. [2024-11-28 03:58:30,372 INFO L78 Accepts]: Start accepts. Automaton has 112 states and 124 transitions. Word has length 24 [2024-11-28 03:58:30,372 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 03:58:30,372 INFO L471 AbstractCegarLoop]: Abstraction has 112 states and 124 transitions. [2024-11-28 03:58:30,373 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 6 states have (on average 3.3333333333333335) internal successors, (20), 5 states have internal predecessors, (20), 2 states have call successors, (2), 2 states have call predecessors, (2), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2024-11-28 03:58:30,373 INFO L276 IsEmpty]: Start isEmpty. Operand 112 states and 124 transitions. [2024-11-28 03:58:30,373 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2024-11-28 03:58:30,373 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 03:58:30,374 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 03:58:30,384 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3d345d57-71d6-4e9e-9140-a659b2e77150/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Forceful destruction successful, exit code 0 [2024-11-28 03:58:30,574 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 2 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3d345d57-71d6-4e9e-9140-a659b2e77150/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable12 [2024-11-28 03:58:30,575 INFO L396 AbstractCegarLoop]: === Iteration 14 === Targeting ULTIMATE.startErr12REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [alloc_and_zeroErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, alloc_and_zeroErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 41 more)] === [2024-11-28 03:58:30,575 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 03:58:30,575 INFO L85 PathProgramCache]: Analyzing trace with hash 889984058, now seen corresponding path program 1 times [2024-11-28 03:58:30,575 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 03:58:30,575 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [402311502] [2024-11-28 03:58:30,575 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 03:58:30,575 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 03:58:30,612 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 03:58:30,805 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-11-28 03:58:30,805 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 03:58:30,805 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [402311502] [2024-11-28 03:58:30,805 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [402311502] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 03:58:30,805 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 03:58:30,806 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-11-28 03:58:30,806 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1549483476] [2024-11-28 03:58:30,806 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 03:58:30,806 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2024-11-28 03:58:30,806 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 03:58:30,806 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-11-28 03:58:30,806 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2024-11-28 03:58:30,807 INFO L87 Difference]: Start difference. First operand 112 states and 124 transitions. Second operand has 7 states, 6 states have (on average 3.6666666666666665) internal successors, (22), 6 states have internal predecessors, (22), 1 states have call successors, (2), 1 states have call predecessors, (2), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) [2024-11-28 03:58:31,019 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 03:58:31,019 INFO L93 Difference]: Finished difference Result 111 states and 122 transitions. [2024-11-28 03:58:31,020 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2024-11-28 03:58:31,020 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 6 states have (on average 3.6666666666666665) internal successors, (22), 6 states have internal predecessors, (22), 1 states have call successors, (2), 1 states have call predecessors, (2), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) Word has length 27 [2024-11-28 03:58:31,020 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 03:58:31,021 INFO L225 Difference]: With dead ends: 111 [2024-11-28 03:58:31,021 INFO L226 Difference]: Without dead ends: 111 [2024-11-28 03:58:31,021 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2024-11-28 03:58:31,021 INFO L435 NwaCegarLoop]: 79 mSDtfsCounter, 4 mSDsluCounter, 223 mSDsCounter, 0 mSdLazyCounter, 208 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 4 SdHoareTripleChecker+Valid, 302 SdHoareTripleChecker+Invalid, 209 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 208 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-11-28 03:58:31,022 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [4 Valid, 302 Invalid, 209 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 208 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-11-28 03:58:31,022 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 111 states. [2024-11-28 03:58:31,026 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 111 to 111. [2024-11-28 03:58:31,026 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 111 states, 79 states have (on average 1.4683544303797469) internal successors, (116), 106 states have internal predecessors, (116), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-28 03:58:31,027 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 111 states to 111 states and 122 transitions. [2024-11-28 03:58:31,027 INFO L78 Accepts]: Start accepts. Automaton has 111 states and 122 transitions. Word has length 27 [2024-11-28 03:58:31,027 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 03:58:31,027 INFO L471 AbstractCegarLoop]: Abstraction has 111 states and 122 transitions. [2024-11-28 03:58:31,028 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 6 states have (on average 3.6666666666666665) internal successors, (22), 6 states have internal predecessors, (22), 1 states have call successors, (2), 1 states have call predecessors, (2), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) [2024-11-28 03:58:31,028 INFO L276 IsEmpty]: Start isEmpty. Operand 111 states and 122 transitions. [2024-11-28 03:58:31,028 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2024-11-28 03:58:31,029 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 03:58:31,029 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 03:58:31,029 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable13 [2024-11-28 03:58:31,029 INFO L396 AbstractCegarLoop]: === Iteration 15 === Targeting ULTIMATE.startErr13REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [alloc_and_zeroErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, alloc_and_zeroErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 41 more)] === [2024-11-28 03:58:31,030 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 03:58:31,030 INFO L85 PathProgramCache]: Analyzing trace with hash 889984059, now seen corresponding path program 1 times [2024-11-28 03:58:31,030 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 03:58:31,030 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1324286068] [2024-11-28 03:58:31,030 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 03:58:31,030 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 03:58:31,071 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 03:58:31,425 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-11-28 03:58:31,426 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 03:58:31,426 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1324286068] [2024-11-28 03:58:31,426 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1324286068] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 03:58:31,427 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 03:58:31,427 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-11-28 03:58:31,427 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2098081624] [2024-11-28 03:58:31,427 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 03:58:31,428 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2024-11-28 03:58:31,428 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 03:58:31,428 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-11-28 03:58:31,428 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2024-11-28 03:58:31,429 INFO L87 Difference]: Start difference. First operand 111 states and 122 transitions. Second operand has 7 states, 6 states have (on average 3.8333333333333335) internal successors, (23), 6 states have internal predecessors, (23), 1 states have call successors, (2), 1 states have call predecessors, (2), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) [2024-11-28 03:58:31,666 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 03:58:31,666 INFO L93 Difference]: Finished difference Result 110 states and 120 transitions. [2024-11-28 03:58:31,666 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2024-11-28 03:58:31,667 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 6 states have (on average 3.8333333333333335) internal successors, (23), 6 states have internal predecessors, (23), 1 states have call successors, (2), 1 states have call predecessors, (2), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) Word has length 27 [2024-11-28 03:58:31,667 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 03:58:31,667 INFO L225 Difference]: With dead ends: 110 [2024-11-28 03:58:31,668 INFO L226 Difference]: Without dead ends: 110 [2024-11-28 03:58:31,668 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2024-11-28 03:58:31,668 INFO L435 NwaCegarLoop]: 79 mSDtfsCounter, 3 mSDsluCounter, 247 mSDsCounter, 0 mSdLazyCounter, 179 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 3 SdHoareTripleChecker+Valid, 326 SdHoareTripleChecker+Invalid, 179 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 179 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-11-28 03:58:31,669 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [3 Valid, 326 Invalid, 179 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 179 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-11-28 03:58:31,669 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 110 states. [2024-11-28 03:58:31,674 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 110 to 110. [2024-11-28 03:58:31,675 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 110 states, 79 states have (on average 1.4430379746835442) internal successors, (114), 105 states have internal predecessors, (114), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-28 03:58:31,676 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 110 states to 110 states and 120 transitions. [2024-11-28 03:58:31,676 INFO L78 Accepts]: Start accepts. Automaton has 110 states and 120 transitions. Word has length 27 [2024-11-28 03:58:31,676 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 03:58:31,679 INFO L471 AbstractCegarLoop]: Abstraction has 110 states and 120 transitions. [2024-11-28 03:58:31,679 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 6 states have (on average 3.8333333333333335) internal successors, (23), 6 states have internal predecessors, (23), 1 states have call successors, (2), 1 states have call predecessors, (2), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) [2024-11-28 03:58:31,679 INFO L276 IsEmpty]: Start isEmpty. Operand 110 states and 120 transitions. [2024-11-28 03:58:31,680 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2024-11-28 03:58:31,680 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 03:58:31,680 INFO L218 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 03:58:31,680 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable14 [2024-11-28 03:58:31,680 INFO L396 AbstractCegarLoop]: === Iteration 16 === Targeting ULTIMATE.startErr20REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [alloc_and_zeroErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, alloc_and_zeroErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 41 more)] === [2024-11-28 03:58:31,681 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 03:58:31,681 INFO L85 PathProgramCache]: Analyzing trace with hash 547437274, now seen corresponding path program 1 times [2024-11-28 03:58:31,681 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 03:58:31,681 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [309124224] [2024-11-28 03:58:31,681 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 03:58:31,681 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 03:58:31,725 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 03:58:33,157 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-28 03:58:33,157 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 03:58:33,157 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [309124224] [2024-11-28 03:58:33,158 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [309124224] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-28 03:58:33,158 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1061973557] [2024-11-28 03:58:33,158 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 03:58:33,158 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-28 03:58:33,158 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3d345d57-71d6-4e9e-9140-a659b2e77150/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 03:58:33,160 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3d345d57-71d6-4e9e-9140-a659b2e77150/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-28 03:58:33,164 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3d345d57-71d6-4e9e-9140-a659b2e77150/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2024-11-28 03:58:33,327 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 03:58:33,330 INFO L256 TraceCheckSpWp]: Trace formula consists of 223 conjuncts, 67 conjuncts are in the unsatisfiable core [2024-11-28 03:58:33,336 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-28 03:58:33,342 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2024-11-28 03:58:33,381 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 9 [2024-11-28 03:58:33,392 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 9 [2024-11-28 03:58:33,627 INFO L349 Elim1Store]: treesize reduction 18, result has 35.7 percent of original size [2024-11-28 03:58:33,627 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 17 treesize of output 21 [2024-11-28 03:58:33,747 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 13 [2024-11-28 03:58:33,763 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 13 [2024-11-28 03:58:33,830 INFO L349 Elim1Store]: treesize reduction 8, result has 52.9 percent of original size [2024-11-28 03:58:33,830 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 2 case distinctions, treesize of input 16 treesize of output 18 [2024-11-28 03:58:33,973 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 13 [2024-11-28 03:58:33,983 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 13 [2024-11-28 03:58:34,119 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 13 [2024-11-28 03:58:34,134 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 13 [2024-11-28 03:58:34,230 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-11-28 03:58:34,230 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 37 treesize of output 24 [2024-11-28 03:58:34,243 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 13 [2024-11-28 03:58:34,542 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-28 03:58:34,542 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-28 03:58:35,208 WARN L851 $PredicateComparison]: unable to prove that (let ((.cse1 (+ 16 |c_ULTIMATE.start_create_~now~0#1.offset|)) (.cse2 (+ |c_ULTIMATE.start_create_~sll~0#1.offset| 8))) (and (forall ((v_ArrVal_528 (Array Int Int)) (v_ArrVal_535 Int)) (= 0 (select (select (let ((.cse0 (store |c_#memory_$Pointer$#0.base| |c_ULTIMATE.start_create_~data2~0#1.base| v_ArrVal_528))) (store .cse0 |c_ULTIMATE.start_create_~now~0#1.base| (store (store (select .cse0 |c_ULTIMATE.start_create_~now~0#1.base|) |c_ULTIMATE.start_create_~now~0#1.offset| |c_ULTIMATE.start_create_~data1~0#1.base|) .cse1 v_ArrVal_535))) |c_ULTIMATE.start_create_~sll~0#1.base|) .cse2))) (forall ((v_ArrVal_531 Int) (v_ArrVal_529 (Array Int Int)) (v_ArrVal_534 Int)) (= (select (select (let ((.cse3 (store |c_#memory_$Pointer$#0.offset| |c_ULTIMATE.start_create_~data2~0#1.base| v_ArrVal_529))) (store .cse3 |c_ULTIMATE.start_create_~now~0#1.base| (store (store (select .cse3 |c_ULTIMATE.start_create_~now~0#1.base|) |c_ULTIMATE.start_create_~now~0#1.offset| v_ArrVal_531) .cse1 v_ArrVal_534))) |c_ULTIMATE.start_create_~sll~0#1.base|) .cse2) 0)))) is different from false [2024-11-28 03:58:36,868 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-11-28 03:58:36,869 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 25 treesize of output 26 [2024-11-28 03:58:36,878 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 140 treesize of output 122 [2024-11-28 03:58:36,893 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 13 [2024-11-28 03:58:36,900 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 20 [2024-11-28 03:58:36,965 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-11-28 03:58:36,965 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 25 treesize of output 26 [2024-11-28 03:58:36,971 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 70 treesize of output 58 [2024-11-28 03:58:36,981 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 46 treesize of output 38 [2024-11-28 03:58:36,988 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 20 [2024-11-28 03:58:37,171 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-28 03:58:37,171 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1061973557] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-28 03:58:37,171 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-28 03:58:37,171 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 15, 16] total 38 [2024-11-28 03:58:37,171 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2035110382] [2024-11-28 03:58:37,171 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-28 03:58:37,172 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 38 states [2024-11-28 03:58:37,172 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 03:58:37,173 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 38 interpolants. [2024-11-28 03:58:37,175 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=128, Invalid=1205, Unknown=3, NotChecked=70, Total=1406 [2024-11-28 03:58:37,175 INFO L87 Difference]: Start difference. First operand 110 states and 120 transitions. Second operand has 38 states, 38 states have (on average 1.7894736842105263) internal successors, (68), 35 states have internal predecessors, (68), 1 states have call successors, (1), 1 states have call predecessors, (1), 3 states have return successors, (3), 3 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-28 03:58:38,898 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 03:58:38,898 INFO L93 Difference]: Finished difference Result 112 states and 122 transitions. [2024-11-28 03:58:38,899 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2024-11-28 03:58:38,899 INFO L78 Accepts]: Start accepts. Automaton has has 38 states, 38 states have (on average 1.7894736842105263) internal successors, (68), 35 states have internal predecessors, (68), 1 states have call successors, (1), 1 states have call predecessors, (1), 3 states have return successors, (3), 3 states have call predecessors, (3), 1 states have call successors, (3) Word has length 28 [2024-11-28 03:58:38,900 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 03:58:38,901 INFO L225 Difference]: With dead ends: 112 [2024-11-28 03:58:38,903 INFO L226 Difference]: Without dead ends: 112 [2024-11-28 03:58:38,904 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 77 GetRequests, 34 SyntacticMatches, 1 SemanticMatches, 42 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 315 ImplicationChecksByTransitivity, 3.2s TimeCoverageRelationStatistics Valid=192, Invalid=1615, Unknown=3, NotChecked=82, Total=1892 [2024-11-28 03:58:38,905 INFO L435 NwaCegarLoop]: 70 mSDtfsCounter, 24 mSDsluCounter, 1149 mSDsCounter, 0 mSdLazyCounter, 748 mSolverCounterSat, 17 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 24 SdHoareTripleChecker+Valid, 1219 SdHoareTripleChecker+Invalid, 812 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 17 IncrementalHoareTripleChecker+Valid, 748 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 47 IncrementalHoareTripleChecker+Unchecked, 1.1s IncrementalHoareTripleChecker+Time [2024-11-28 03:58:38,905 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [24 Valid, 1219 Invalid, 812 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [17 Valid, 748 Invalid, 0 Unknown, 47 Unchecked, 1.1s Time] [2024-11-28 03:58:38,906 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 112 states. [2024-11-28 03:58:38,909 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 112 to 112. [2024-11-28 03:58:38,910 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 112 states, 81 states have (on average 1.4320987654320987) internal successors, (116), 107 states have internal predecessors, (116), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-28 03:58:38,911 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 112 states to 112 states and 122 transitions. [2024-11-28 03:58:38,911 INFO L78 Accepts]: Start accepts. Automaton has 112 states and 122 transitions. Word has length 28 [2024-11-28 03:58:38,912 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 03:58:38,912 INFO L471 AbstractCegarLoop]: Abstraction has 112 states and 122 transitions. [2024-11-28 03:58:38,912 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 38 states, 38 states have (on average 1.7894736842105263) internal successors, (68), 35 states have internal predecessors, (68), 1 states have call successors, (1), 1 states have call predecessors, (1), 3 states have return successors, (3), 3 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-28 03:58:38,913 INFO L276 IsEmpty]: Start isEmpty. Operand 112 states and 122 transitions. [2024-11-28 03:58:38,913 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2024-11-28 03:58:38,915 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 03:58:38,916 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 03:58:38,927 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3d345d57-71d6-4e9e-9140-a659b2e77150/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Ended with exit code 0 [2024-11-28 03:58:39,120 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3d345d57-71d6-4e9e-9140-a659b2e77150/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable15 [2024-11-28 03:58:39,120 INFO L396 AbstractCegarLoop]: === Iteration 17 === Targeting ULTIMATE.startErr16REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [alloc_and_zeroErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, alloc_and_zeroErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 41 more)] === [2024-11-28 03:58:39,120 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 03:58:39,121 INFO L85 PathProgramCache]: Analyzing trace with hash 681969593, now seen corresponding path program 1 times [2024-11-28 03:58:39,121 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 03:58:39,121 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2069072882] [2024-11-28 03:58:39,121 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 03:58:39,121 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 03:58:39,158 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 03:58:39,501 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-28 03:58:39,501 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 03:58:39,501 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2069072882] [2024-11-28 03:58:39,502 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2069072882] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 03:58:39,502 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 03:58:39,502 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2024-11-28 03:58:39,502 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [522335215] [2024-11-28 03:58:39,502 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 03:58:39,503 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 11 states [2024-11-28 03:58:39,503 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 03:58:39,504 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2024-11-28 03:58:39,504 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=90, Unknown=0, NotChecked=0, Total=110 [2024-11-28 03:58:39,504 INFO L87 Difference]: Start difference. First operand 112 states and 122 transitions. Second operand has 11 states, 10 states have (on average 2.6) internal successors, (26), 9 states have internal predecessors, (26), 2 states have call successors, (2), 2 states have call predecessors, (2), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2024-11-28 03:58:39,875 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 03:58:39,875 INFO L93 Difference]: Finished difference Result 113 states and 121 transitions. [2024-11-28 03:58:39,876 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2024-11-28 03:58:39,876 INFO L78 Accepts]: Start accepts. Automaton has has 11 states, 10 states have (on average 2.6) internal successors, (26), 9 states have internal predecessors, (26), 2 states have call successors, (2), 2 states have call predecessors, (2), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Word has length 30 [2024-11-28 03:58:39,876 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 03:58:39,877 INFO L225 Difference]: With dead ends: 113 [2024-11-28 03:58:39,877 INFO L226 Difference]: Without dead ends: 113 [2024-11-28 03:58:39,877 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=44, Invalid=166, Unknown=0, NotChecked=0, Total=210 [2024-11-28 03:58:39,878 INFO L435 NwaCegarLoop]: 70 mSDtfsCounter, 23 mSDsluCounter, 472 mSDsCounter, 0 mSdLazyCounter, 300 mSolverCounterSat, 5 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 23 SdHoareTripleChecker+Valid, 542 SdHoareTripleChecker+Invalid, 305 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 5 IncrementalHoareTripleChecker+Valid, 300 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2024-11-28 03:58:39,878 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [23 Valid, 542 Invalid, 305 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [5 Valid, 300 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2024-11-28 03:58:39,880 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 113 states. [2024-11-28 03:58:39,886 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 113 to 112. [2024-11-28 03:58:39,886 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 112 states, 81 states have (on average 1.4197530864197532) internal successors, (115), 107 states have internal predecessors, (115), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-28 03:58:39,887 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 112 states to 112 states and 121 transitions. [2024-11-28 03:58:39,887 INFO L78 Accepts]: Start accepts. Automaton has 112 states and 121 transitions. Word has length 30 [2024-11-28 03:58:39,888 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 03:58:39,888 INFO L471 AbstractCegarLoop]: Abstraction has 112 states and 121 transitions. [2024-11-28 03:58:39,888 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 11 states, 10 states have (on average 2.6) internal successors, (26), 9 states have internal predecessors, (26), 2 states have call successors, (2), 2 states have call predecessors, (2), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2024-11-28 03:58:39,889 INFO L276 IsEmpty]: Start isEmpty. Operand 112 states and 121 transitions. [2024-11-28 03:58:39,889 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2024-11-28 03:58:39,890 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 03:58:39,890 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 03:58:39,890 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable16 [2024-11-28 03:58:39,891 INFO L396 AbstractCegarLoop]: === Iteration 18 === Targeting ULTIMATE.startErr17REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [alloc_and_zeroErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, alloc_and_zeroErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 41 more)] === [2024-11-28 03:58:39,891 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 03:58:39,893 INFO L85 PathProgramCache]: Analyzing trace with hash 681969594, now seen corresponding path program 1 times [2024-11-28 03:58:39,893 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 03:58:39,893 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1346184921] [2024-11-28 03:58:39,893 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 03:58:39,894 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 03:58:39,931 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 03:58:40,508 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-28 03:58:40,509 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 03:58:40,509 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1346184921] [2024-11-28 03:58:40,509 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1346184921] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 03:58:40,509 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 03:58:40,510 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2024-11-28 03:58:40,510 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [935746450] [2024-11-28 03:58:40,510 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 03:58:40,510 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 11 states [2024-11-28 03:58:40,510 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 03:58:40,511 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2024-11-28 03:58:40,511 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2024-11-28 03:58:40,511 INFO L87 Difference]: Start difference. First operand 112 states and 121 transitions. Second operand has 11 states, 10 states have (on average 2.6) internal successors, (26), 9 states have internal predecessors, (26), 2 states have call successors, (2), 2 states have call predecessors, (2), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2024-11-28 03:58:40,912 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 03:58:40,912 INFO L93 Difference]: Finished difference Result 112 states and 120 transitions. [2024-11-28 03:58:40,912 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2024-11-28 03:58:40,913 INFO L78 Accepts]: Start accepts. Automaton has has 11 states, 10 states have (on average 2.6) internal successors, (26), 9 states have internal predecessors, (26), 2 states have call successors, (2), 2 states have call predecessors, (2), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Word has length 30 [2024-11-28 03:58:40,913 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 03:58:40,914 INFO L225 Difference]: With dead ends: 112 [2024-11-28 03:58:40,914 INFO L226 Difference]: Without dead ends: 112 [2024-11-28 03:58:40,914 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=40, Invalid=142, Unknown=0, NotChecked=0, Total=182 [2024-11-28 03:58:40,914 INFO L435 NwaCegarLoop]: 71 mSDtfsCounter, 21 mSDsluCounter, 321 mSDsCounter, 0 mSdLazyCounter, 283 mSolverCounterSat, 5 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 21 SdHoareTripleChecker+Valid, 392 SdHoareTripleChecker+Invalid, 288 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 5 IncrementalHoareTripleChecker+Valid, 283 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2024-11-28 03:58:40,915 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [21 Valid, 392 Invalid, 288 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [5 Valid, 283 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2024-11-28 03:58:40,915 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 112 states. [2024-11-28 03:58:40,920 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 112 to 112. [2024-11-28 03:58:40,921 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 112 states, 81 states have (on average 1.4074074074074074) internal successors, (114), 107 states have internal predecessors, (114), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-28 03:58:40,922 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 112 states to 112 states and 120 transitions. [2024-11-28 03:58:40,923 INFO L78 Accepts]: Start accepts. Automaton has 112 states and 120 transitions. Word has length 30 [2024-11-28 03:58:40,924 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 03:58:40,924 INFO L471 AbstractCegarLoop]: Abstraction has 112 states and 120 transitions. [2024-11-28 03:58:40,924 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 11 states, 10 states have (on average 2.6) internal successors, (26), 9 states have internal predecessors, (26), 2 states have call successors, (2), 2 states have call predecessors, (2), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2024-11-28 03:58:40,924 INFO L276 IsEmpty]: Start isEmpty. Operand 112 states and 120 transitions. [2024-11-28 03:58:40,925 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2024-11-28 03:58:40,925 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 03:58:40,925 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 03:58:40,925 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable17 [2024-11-28 03:58:40,925 INFO L396 AbstractCegarLoop]: === Iteration 19 === Targeting ULTIMATE.startErr26REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [alloc_and_zeroErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, alloc_and_zeroErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 41 more)] === [2024-11-28 03:58:40,926 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 03:58:40,926 INFO L85 PathProgramCache]: Analyzing trace with hash 2101287145, now seen corresponding path program 1 times [2024-11-28 03:58:40,926 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 03:58:40,926 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1273833188] [2024-11-28 03:58:40,926 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 03:58:40,926 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 03:58:40,956 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 03:58:41,088 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-11-28 03:58:41,088 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 03:58:41,088 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1273833188] [2024-11-28 03:58:41,089 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1273833188] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 03:58:41,089 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 03:58:41,089 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2024-11-28 03:58:41,089 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1839957652] [2024-11-28 03:58:41,089 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 03:58:41,090 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2024-11-28 03:58:41,090 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 03:58:41,090 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2024-11-28 03:58:41,091 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2024-11-28 03:58:41,091 INFO L87 Difference]: Start difference. First operand 112 states and 120 transitions. Second operand has 8 states, 7 states have (on average 4.0) internal successors, (28), 8 states have internal predecessors, (28), 1 states have call successors, (1), 1 states have call predecessors, (1), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2024-11-28 03:58:41,397 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 03:58:41,397 INFO L93 Difference]: Finished difference Result 128 states and 142 transitions. [2024-11-28 03:58:41,398 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2024-11-28 03:58:41,398 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 7 states have (on average 4.0) internal successors, (28), 8 states have internal predecessors, (28), 1 states have call successors, (1), 1 states have call predecessors, (1), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 30 [2024-11-28 03:58:41,398 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 03:58:41,399 INFO L225 Difference]: With dead ends: 128 [2024-11-28 03:58:41,399 INFO L226 Difference]: Without dead ends: 128 [2024-11-28 03:58:41,400 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2024-11-28 03:58:41,400 INFO L435 NwaCegarLoop]: 55 mSDtfsCounter, 36 mSDsluCounter, 219 mSDsCounter, 0 mSdLazyCounter, 293 mSolverCounterSat, 7 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 36 SdHoareTripleChecker+Valid, 274 SdHoareTripleChecker+Invalid, 300 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 7 IncrementalHoareTripleChecker+Valid, 293 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2024-11-28 03:58:41,401 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [36 Valid, 274 Invalid, 300 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [7 Valid, 293 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2024-11-28 03:58:41,401 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 128 states. [2024-11-28 03:58:41,404 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 128 to 123. [2024-11-28 03:58:41,405 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 123 states, 93 states have (on average 1.4408602150537635) internal successors, (134), 118 states have internal predecessors, (134), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-28 03:58:41,406 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 123 states to 123 states and 140 transitions. [2024-11-28 03:58:41,406 INFO L78 Accepts]: Start accepts. Automaton has 123 states and 140 transitions. Word has length 30 [2024-11-28 03:58:41,406 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 03:58:41,406 INFO L471 AbstractCegarLoop]: Abstraction has 123 states and 140 transitions. [2024-11-28 03:58:41,407 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 7 states have (on average 4.0) internal successors, (28), 8 states have internal predecessors, (28), 1 states have call successors, (1), 1 states have call predecessors, (1), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2024-11-28 03:58:41,407 INFO L276 IsEmpty]: Start isEmpty. Operand 123 states and 140 transitions. [2024-11-28 03:58:41,407 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2024-11-28 03:58:41,407 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 03:58:41,407 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 03:58:41,408 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable18 [2024-11-28 03:58:41,408 INFO L396 AbstractCegarLoop]: === Iteration 20 === Targeting ULTIMATE.startErr27REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [alloc_and_zeroErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, alloc_and_zeroErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 41 more)] === [2024-11-28 03:58:41,408 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 03:58:41,408 INFO L85 PathProgramCache]: Analyzing trace with hash 2101287146, now seen corresponding path program 1 times [2024-11-28 03:58:41,409 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 03:58:41,409 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1599762873] [2024-11-28 03:58:41,409 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 03:58:41,409 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 03:58:41,433 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 03:58:41,775 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-28 03:58:41,775 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 03:58:41,775 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1599762873] [2024-11-28 03:58:41,775 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1599762873] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-28 03:58:41,776 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1551653199] [2024-11-28 03:58:41,776 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 03:58:41,776 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-28 03:58:41,776 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3d345d57-71d6-4e9e-9140-a659b2e77150/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 03:58:41,778 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3d345d57-71d6-4e9e-9140-a659b2e77150/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-28 03:58:41,782 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3d345d57-71d6-4e9e-9140-a659b2e77150/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2024-11-28 03:58:41,939 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 03:58:41,945 INFO L256 TraceCheckSpWp]: Trace formula consists of 235 conjuncts, 31 conjuncts are in the unsatisfiable core [2024-11-28 03:58:41,948 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-28 03:58:42,096 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-28 03:58:42,097 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-28 03:58:42,222 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-11-28 03:58:42,222 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 19 treesize of output 23 [2024-11-28 03:58:42,353 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-28 03:58:42,353 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1551653199] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-28 03:58:42,353 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-28 03:58:42,353 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 5, 5] total 18 [2024-11-28 03:58:42,353 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1389847705] [2024-11-28 03:58:42,354 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-28 03:58:42,354 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 19 states [2024-11-28 03:58:42,354 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 03:58:42,355 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2024-11-28 03:58:42,355 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=50, Invalid=292, Unknown=0, NotChecked=0, Total=342 [2024-11-28 03:58:42,356 INFO L87 Difference]: Start difference. First operand 123 states and 140 transitions. Second operand has 19 states, 18 states have (on average 3.6666666666666665) internal successors, (66), 18 states have internal predecessors, (66), 1 states have call successors, (1), 1 states have call predecessors, (1), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) [2024-11-28 03:58:42,995 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 03:58:42,995 INFO L93 Difference]: Finished difference Result 157 states and 180 transitions. [2024-11-28 03:58:42,995 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2024-11-28 03:58:42,996 INFO L78 Accepts]: Start accepts. Automaton has has 19 states, 18 states have (on average 3.6666666666666665) internal successors, (66), 18 states have internal predecessors, (66), 1 states have call successors, (1), 1 states have call predecessors, (1), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) Word has length 30 [2024-11-28 03:58:42,996 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 03:58:42,998 INFO L225 Difference]: With dead ends: 157 [2024-11-28 03:58:42,998 INFO L226 Difference]: Without dead ends: 157 [2024-11-28 03:58:42,999 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 73 GetRequests, 52 SyntacticMatches, 0 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 31 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=82, Invalid=424, Unknown=0, NotChecked=0, Total=506 [2024-11-28 03:58:42,999 INFO L435 NwaCegarLoop]: 54 mSDtfsCounter, 79 mSDsluCounter, 453 mSDsCounter, 0 mSdLazyCounter, 512 mSolverCounterSat, 10 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 79 SdHoareTripleChecker+Valid, 507 SdHoareTripleChecker+Invalid, 522 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 10 IncrementalHoareTripleChecker+Valid, 512 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2024-11-28 03:58:43,000 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [79 Valid, 507 Invalid, 522 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [10 Valid, 512 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2024-11-28 03:58:43,000 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 157 states. [2024-11-28 03:58:43,005 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 157 to 146. [2024-11-28 03:58:43,005 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 146 states, 118 states have (on average 1.4491525423728813) internal successors, (171), 141 states have internal predecessors, (171), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-28 03:58:43,007 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 146 states to 146 states and 177 transitions. [2024-11-28 03:58:43,007 INFO L78 Accepts]: Start accepts. Automaton has 146 states and 177 transitions. Word has length 30 [2024-11-28 03:58:43,007 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 03:58:43,007 INFO L471 AbstractCegarLoop]: Abstraction has 146 states and 177 transitions. [2024-11-28 03:58:43,008 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 19 states, 18 states have (on average 3.6666666666666665) internal successors, (66), 18 states have internal predecessors, (66), 1 states have call successors, (1), 1 states have call predecessors, (1), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) [2024-11-28 03:58:43,008 INFO L276 IsEmpty]: Start isEmpty. Operand 146 states and 177 transitions. [2024-11-28 03:58:43,008 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2024-11-28 03:58:43,009 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 03:58:43,009 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 03:58:43,020 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3d345d57-71d6-4e9e-9140-a659b2e77150/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Forceful destruction successful, exit code 0 [2024-11-28 03:58:43,213 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable19,4 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3d345d57-71d6-4e9e-9140-a659b2e77150/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-28 03:58:43,213 INFO L396 AbstractCegarLoop]: === Iteration 21 === Targeting ULTIMATE.startErr28ASSERT_VIOLATIONMEMORY_FREE === [alloc_and_zeroErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, alloc_and_zeroErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 41 more)] === [2024-11-28 03:58:43,214 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 03:58:43,214 INFO L85 PathProgramCache]: Analyzing trace with hash 715392120, now seen corresponding path program 1 times [2024-11-28 03:58:43,214 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 03:58:43,214 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1770504858] [2024-11-28 03:58:43,214 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 03:58:43,214 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 03:58:43,240 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 03:58:43,612 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-28 03:58:43,613 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 03:58:43,613 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1770504858] [2024-11-28 03:58:43,613 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1770504858] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-28 03:58:43,613 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [905027901] [2024-11-28 03:58:43,613 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 03:58:43,613 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-28 03:58:43,614 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3d345d57-71d6-4e9e-9140-a659b2e77150/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 03:58:43,617 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3d345d57-71d6-4e9e-9140-a659b2e77150/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-28 03:58:43,621 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3d345d57-71d6-4e9e-9140-a659b2e77150/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2024-11-28 03:58:43,787 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 03:58:43,790 INFO L256 TraceCheckSpWp]: Trace formula consists of 243 conjuncts, 31 conjuncts are in the unsatisfiable core [2024-11-28 03:58:43,793 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-28 03:58:43,843 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2024-11-28 03:58:43,856 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 11 [2024-11-28 03:58:43,897 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-11-28 03:58:43,897 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-11-28 03:58:43,898 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [905027901] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 03:58:43,898 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-11-28 03:58:43,898 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [9] total 9 [2024-11-28 03:58:43,898 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1217544835] [2024-11-28 03:58:43,898 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 03:58:43,898 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 9 states [2024-11-28 03:58:43,899 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 03:58:43,899 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2024-11-28 03:58:43,899 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=71, Unknown=0, NotChecked=0, Total=90 [2024-11-28 03:58:43,900 INFO L87 Difference]: Start difference. First operand 146 states and 177 transitions. Second operand has 9 states, 8 states have (on average 3.625) internal successors, (29), 9 states have internal predecessors, (29), 1 states have call successors, (1), 1 states have call predecessors, (1), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2024-11-28 03:58:44,184 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 03:58:44,184 INFO L93 Difference]: Finished difference Result 157 states and 185 transitions. [2024-11-28 03:58:44,185 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2024-11-28 03:58:44,185 INFO L78 Accepts]: Start accepts. Automaton has has 9 states, 8 states have (on average 3.625) internal successors, (29), 9 states have internal predecessors, (29), 1 states have call successors, (1), 1 states have call predecessors, (1), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 31 [2024-11-28 03:58:44,185 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 03:58:44,186 INFO L225 Difference]: With dead ends: 157 [2024-11-28 03:58:44,186 INFO L226 Difference]: Without dead ends: 157 [2024-11-28 03:58:44,186 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 41 GetRequests, 31 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=28, Invalid=104, Unknown=0, NotChecked=0, Total=132 [2024-11-28 03:58:44,187 INFO L435 NwaCegarLoop]: 59 mSDtfsCounter, 33 mSDsluCounter, 358 mSDsCounter, 0 mSdLazyCounter, 244 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 33 SdHoareTripleChecker+Valid, 417 SdHoareTripleChecker+Invalid, 246 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 244 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-11-28 03:58:44,187 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [33 Valid, 417 Invalid, 246 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 244 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-11-28 03:58:44,188 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 157 states. [2024-11-28 03:58:44,192 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 157 to 146. [2024-11-28 03:58:44,193 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 146 states, 118 states have (on average 1.4406779661016949) internal successors, (170), 141 states have internal predecessors, (170), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-28 03:58:44,194 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 146 states to 146 states and 176 transitions. [2024-11-28 03:58:44,194 INFO L78 Accepts]: Start accepts. Automaton has 146 states and 176 transitions. Word has length 31 [2024-11-28 03:58:44,194 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 03:58:44,194 INFO L471 AbstractCegarLoop]: Abstraction has 146 states and 176 transitions. [2024-11-28 03:58:44,195 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 9 states, 8 states have (on average 3.625) internal successors, (29), 9 states have internal predecessors, (29), 1 states have call successors, (1), 1 states have call predecessors, (1), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2024-11-28 03:58:44,195 INFO L276 IsEmpty]: Start isEmpty. Operand 146 states and 176 transitions. [2024-11-28 03:58:44,195 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2024-11-28 03:58:44,195 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 03:58:44,195 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 03:58:44,207 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3d345d57-71d6-4e9e-9140-a659b2e77150/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Forceful destruction successful, exit code 0 [2024-11-28 03:58:44,400 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable20,5 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3d345d57-71d6-4e9e-9140-a659b2e77150/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-28 03:58:44,400 INFO L396 AbstractCegarLoop]: === Iteration 22 === Targeting ULTIMATE.startErr41ASSERT_VIOLATIONMEMORY_LEAK === [alloc_and_zeroErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, alloc_and_zeroErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 41 more)] === [2024-11-28 03:58:44,400 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 03:58:44,400 INFO L85 PathProgramCache]: Analyzing trace with hash 702942353, now seen corresponding path program 1 times [2024-11-28 03:58:44,400 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 03:58:44,401 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [565232761] [2024-11-28 03:58:44,401 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 03:58:44,401 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 03:58:44,447 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 03:58:44,597 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-11-28 03:58:44,597 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 03:58:44,597 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [565232761] [2024-11-28 03:58:44,598 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [565232761] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 03:58:44,598 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 03:58:44,598 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2024-11-28 03:58:44,598 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [287872973] [2024-11-28 03:58:44,598 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 03:58:44,598 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 9 states [2024-11-28 03:58:44,599 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 03:58:44,599 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2024-11-28 03:58:44,599 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=57, Unknown=0, NotChecked=0, Total=72 [2024-11-28 03:58:44,600 INFO L87 Difference]: Start difference. First operand 146 states and 176 transitions. Second operand has 9 states, 9 states have (on average 3.3333333333333335) internal successors, (30), 8 states have internal predecessors, (30), 1 states have call successors, (1), 1 states have call predecessors, (1), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2024-11-28 03:58:44,720 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 03:58:44,720 INFO L93 Difference]: Finished difference Result 149 states and 174 transitions. [2024-11-28 03:58:44,721 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2024-11-28 03:58:44,721 INFO L78 Accepts]: Start accepts. Automaton has has 9 states, 9 states have (on average 3.3333333333333335) internal successors, (30), 8 states have internal predecessors, (30), 1 states have call successors, (1), 1 states have call predecessors, (1), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 32 [2024-11-28 03:58:44,721 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 03:58:44,722 INFO L225 Difference]: With dead ends: 149 [2024-11-28 03:58:44,722 INFO L226 Difference]: Without dead ends: 149 [2024-11-28 03:58:44,722 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=57, Unknown=0, NotChecked=0, Total=72 [2024-11-28 03:58:44,724 INFO L435 NwaCegarLoop]: 66 mSDtfsCounter, 43 mSDsluCounter, 400 mSDsCounter, 0 mSdLazyCounter, 134 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 44 SdHoareTripleChecker+Valid, 466 SdHoareTripleChecker+Invalid, 135 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 134 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-28 03:58:44,725 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [44 Valid, 466 Invalid, 135 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 134 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-28 03:58:44,726 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 149 states. [2024-11-28 03:58:44,729 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 149 to 144. [2024-11-28 03:58:44,730 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 144 states, 116 states have (on average 1.396551724137931) internal successors, (162), 139 states have internal predecessors, (162), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-28 03:58:44,731 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 144 states to 144 states and 168 transitions. [2024-11-28 03:58:44,731 INFO L78 Accepts]: Start accepts. Automaton has 144 states and 168 transitions. Word has length 32 [2024-11-28 03:58:44,732 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 03:58:44,732 INFO L471 AbstractCegarLoop]: Abstraction has 144 states and 168 transitions. [2024-11-28 03:58:44,732 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 9 states, 9 states have (on average 3.3333333333333335) internal successors, (30), 8 states have internal predecessors, (30), 1 states have call successors, (1), 1 states have call predecessors, (1), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2024-11-28 03:58:44,732 INFO L276 IsEmpty]: Start isEmpty. Operand 144 states and 168 transitions. [2024-11-28 03:58:44,733 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2024-11-28 03:58:44,733 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 03:58:44,733 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 03:58:44,733 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable21 [2024-11-28 03:58:44,733 INFO L396 AbstractCegarLoop]: === Iteration 23 === Targeting ULTIMATE.startErr29ASSERT_VIOLATIONMEMORY_FREE === [alloc_and_zeroErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, alloc_and_zeroErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 41 more)] === [2024-11-28 03:58:44,734 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 03:58:44,734 INFO L85 PathProgramCache]: Analyzing trace with hash 702319369, now seen corresponding path program 1 times [2024-11-28 03:58:44,734 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 03:58:44,734 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1453835908] [2024-11-28 03:58:44,734 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 03:58:44,734 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 03:58:44,757 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 03:58:45,133 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-28 03:58:45,133 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 03:58:45,133 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1453835908] [2024-11-28 03:58:45,133 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1453835908] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-28 03:58:45,133 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1834256039] [2024-11-28 03:58:45,134 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 03:58:45,134 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-28 03:58:45,134 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3d345d57-71d6-4e9e-9140-a659b2e77150/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 03:58:45,136 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3d345d57-71d6-4e9e-9140-a659b2e77150/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-28 03:58:45,139 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3d345d57-71d6-4e9e-9140-a659b2e77150/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2024-11-28 03:58:45,318 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 03:58:45,325 INFO L256 TraceCheckSpWp]: Trace formula consists of 245 conjuncts, 27 conjuncts are in the unsatisfiable core [2024-11-28 03:58:45,328 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-28 03:58:45,396 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 1 [2024-11-28 03:58:45,406 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 13 [2024-11-28 03:58:45,450 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 9 [2024-11-28 03:58:45,457 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-11-28 03:58:45,457 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-11-28 03:58:45,458 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1834256039] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 03:58:45,458 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-11-28 03:58:45,458 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [9] total 9 [2024-11-28 03:58:45,458 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1276888066] [2024-11-28 03:58:45,458 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 03:58:45,458 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 9 states [2024-11-28 03:58:45,458 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 03:58:45,459 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2024-11-28 03:58:45,459 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=71, Unknown=0, NotChecked=0, Total=90 [2024-11-28 03:58:45,459 INFO L87 Difference]: Start difference. First operand 144 states and 168 transitions. Second operand has 9 states, 8 states have (on average 3.75) internal successors, (30), 9 states have internal predecessors, (30), 1 states have call successors, (1), 1 states have call predecessors, (1), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2024-11-28 03:58:45,827 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 03:58:45,827 INFO L93 Difference]: Finished difference Result 148 states and 167 transitions. [2024-11-28 03:58:45,828 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2024-11-28 03:58:45,828 INFO L78 Accepts]: Start accepts. Automaton has has 9 states, 8 states have (on average 3.75) internal successors, (30), 9 states have internal predecessors, (30), 1 states have call successors, (1), 1 states have call predecessors, (1), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 32 [2024-11-28 03:58:45,828 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 03:58:45,829 INFO L225 Difference]: With dead ends: 148 [2024-11-28 03:58:45,830 INFO L226 Difference]: Without dead ends: 148 [2024-11-28 03:58:45,831 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 42 GetRequests, 32 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=28, Invalid=104, Unknown=0, NotChecked=0, Total=132 [2024-11-28 03:58:45,831 INFO L435 NwaCegarLoop]: 54 mSDtfsCounter, 32 mSDsluCounter, 282 mSDsCounter, 0 mSdLazyCounter, 308 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 32 SdHoareTripleChecker+Valid, 336 SdHoareTripleChecker+Invalid, 311 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 308 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2024-11-28 03:58:45,832 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [32 Valid, 336 Invalid, 311 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 308 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2024-11-28 03:58:45,832 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 148 states. [2024-11-28 03:58:45,836 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 148 to 144. [2024-11-28 03:58:45,841 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 144 states, 116 states have (on average 1.3879310344827587) internal successors, (161), 139 states have internal predecessors, (161), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-28 03:58:45,842 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 144 states to 144 states and 167 transitions. [2024-11-28 03:58:45,842 INFO L78 Accepts]: Start accepts. Automaton has 144 states and 167 transitions. Word has length 32 [2024-11-28 03:58:45,842 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 03:58:45,842 INFO L471 AbstractCegarLoop]: Abstraction has 144 states and 167 transitions. [2024-11-28 03:58:45,843 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 9 states, 8 states have (on average 3.75) internal successors, (30), 9 states have internal predecessors, (30), 1 states have call successors, (1), 1 states have call predecessors, (1), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2024-11-28 03:58:45,843 INFO L276 IsEmpty]: Start isEmpty. Operand 144 states and 167 transitions. [2024-11-28 03:58:45,843 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2024-11-28 03:58:45,843 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 03:58:45,843 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 03:58:45,859 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3d345d57-71d6-4e9e-9140-a659b2e77150/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Ended with exit code 0 [2024-11-28 03:58:46,043 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 6 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3d345d57-71d6-4e9e-9140-a659b2e77150/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable22 [2024-11-28 03:58:46,044 INFO L396 AbstractCegarLoop]: === Iteration 24 === Targeting ULTIMATE.startErr30ASSERT_VIOLATIONMEMORY_FREE === [alloc_and_zeroErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, alloc_and_zeroErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 41 more)] === [2024-11-28 03:58:46,045 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 03:58:46,045 INFO L85 PathProgramCache]: Analyzing trace with hash 297064090, now seen corresponding path program 1 times [2024-11-28 03:58:46,045 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 03:58:46,045 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [503641654] [2024-11-28 03:58:46,045 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 03:58:46,045 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 03:58:46,073 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 03:58:46,634 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-28 03:58:46,635 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 03:58:46,635 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [503641654] [2024-11-28 03:58:46,635 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [503641654] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-28 03:58:46,635 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1320113079] [2024-11-28 03:58:46,635 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 03:58:46,635 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-28 03:58:46,636 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3d345d57-71d6-4e9e-9140-a659b2e77150/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 03:58:46,638 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3d345d57-71d6-4e9e-9140-a659b2e77150/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-28 03:58:46,642 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3d345d57-71d6-4e9e-9140-a659b2e77150/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2024-11-28 03:58:46,820 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 03:58:46,823 INFO L256 TraceCheckSpWp]: Trace formula consists of 247 conjuncts, 33 conjuncts are in the unsatisfiable core [2024-11-28 03:58:46,829 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-28 03:58:46,840 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2024-11-28 03:58:46,883 INFO L349 Elim1Store]: treesize reduction 20, result has 33.3 percent of original size [2024-11-28 03:58:46,884 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 19 treesize of output 16 [2024-11-28 03:58:46,919 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 1 [2024-11-28 03:58:46,934 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 13 [2024-11-28 03:58:46,975 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 9 [2024-11-28 03:58:46,982 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-11-28 03:58:46,982 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-11-28 03:58:46,982 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1320113079] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 03:58:46,983 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-11-28 03:58:46,983 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [11] total 11 [2024-11-28 03:58:46,983 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [416042233] [2024-11-28 03:58:46,983 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 03:58:46,983 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 9 states [2024-11-28 03:58:46,983 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 03:58:46,984 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2024-11-28 03:58:46,984 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=27, Invalid=105, Unknown=0, NotChecked=0, Total=132 [2024-11-28 03:58:46,984 INFO L87 Difference]: Start difference. First operand 144 states and 167 transitions. Second operand has 9 states, 8 states have (on average 3.875) internal successors, (31), 9 states have internal predecessors, (31), 1 states have call successors, (1), 1 states have call predecessors, (1), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2024-11-28 03:58:47,292 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 03:58:47,292 INFO L93 Difference]: Finished difference Result 144 states and 166 transitions. [2024-11-28 03:58:47,292 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2024-11-28 03:58:47,293 INFO L78 Accepts]: Start accepts. Automaton has has 9 states, 8 states have (on average 3.875) internal successors, (31), 9 states have internal predecessors, (31), 1 states have call successors, (1), 1 states have call predecessors, (1), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 33 [2024-11-28 03:58:47,293 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 03:58:47,294 INFO L225 Difference]: With dead ends: 144 [2024-11-28 03:58:47,294 INFO L226 Difference]: Without dead ends: 144 [2024-11-28 03:58:47,294 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 46 GetRequests, 33 SyntacticMatches, 1 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 37 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=38, Invalid=144, Unknown=0, NotChecked=0, Total=182 [2024-11-28 03:58:47,295 INFO L435 NwaCegarLoop]: 67 mSDtfsCounter, 12 mSDsluCounter, 235 mSDsCounter, 0 mSdLazyCounter, 263 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 12 SdHoareTripleChecker+Valid, 302 SdHoareTripleChecker+Invalid, 264 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 263 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2024-11-28 03:58:47,295 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [12 Valid, 302 Invalid, 264 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 263 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2024-11-28 03:58:47,296 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 144 states. [2024-11-28 03:58:47,303 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 144 to 144. [2024-11-28 03:58:47,303 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 144 states, 116 states have (on average 1.3793103448275863) internal successors, (160), 139 states have internal predecessors, (160), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-28 03:58:47,304 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 144 states to 144 states and 166 transitions. [2024-11-28 03:58:47,305 INFO L78 Accepts]: Start accepts. Automaton has 144 states and 166 transitions. Word has length 33 [2024-11-28 03:58:47,305 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 03:58:47,305 INFO L471 AbstractCegarLoop]: Abstraction has 144 states and 166 transitions. [2024-11-28 03:58:47,306 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 9 states, 8 states have (on average 3.875) internal successors, (31), 9 states have internal predecessors, (31), 1 states have call successors, (1), 1 states have call predecessors, (1), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2024-11-28 03:58:47,306 INFO L276 IsEmpty]: Start isEmpty. Operand 144 states and 166 transitions. [2024-11-28 03:58:47,307 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2024-11-28 03:58:47,307 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 03:58:47,308 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 03:58:47,319 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3d345d57-71d6-4e9e-9140-a659b2e77150/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Forceful destruction successful, exit code 0 [2024-11-28 03:58:47,508 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 7 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3d345d57-71d6-4e9e-9140-a659b2e77150/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable23 [2024-11-28 03:58:47,509 INFO L396 AbstractCegarLoop]: === Iteration 25 === Targeting ULTIMATE.startErr31REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [alloc_and_zeroErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, alloc_and_zeroErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 41 more)] === [2024-11-28 03:58:47,509 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 03:58:47,509 INFO L85 PathProgramCache]: Analyzing trace with hash 619052332, now seen corresponding path program 1 times [2024-11-28 03:58:47,509 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 03:58:47,509 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1537892868] [2024-11-28 03:58:47,509 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 03:58:47,509 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 03:58:47,531 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 03:58:47,979 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-28 03:58:47,979 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 03:58:47,979 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1537892868] [2024-11-28 03:58:47,979 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1537892868] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-28 03:58:47,979 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [531196659] [2024-11-28 03:58:47,980 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 03:58:47,980 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-28 03:58:47,980 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3d345d57-71d6-4e9e-9140-a659b2e77150/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 03:58:47,982 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3d345d57-71d6-4e9e-9140-a659b2e77150/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-28 03:58:47,986 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3d345d57-71d6-4e9e-9140-a659b2e77150/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2024-11-28 03:58:48,159 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 03:58:48,161 INFO L256 TraceCheckSpWp]: Trace formula consists of 250 conjuncts, 41 conjuncts are in the unsatisfiable core [2024-11-28 03:58:48,164 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-28 03:58:48,167 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2024-11-28 03:58:48,188 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-11-28 03:58:48,189 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 11 treesize of output 11 [2024-11-28 03:58:48,232 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 1 [2024-11-28 03:58:48,279 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 12 [2024-11-28 03:58:48,398 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 8 [2024-11-28 03:58:48,418 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 9 [2024-11-28 03:58:48,421 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-11-28 03:58:48,424 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-11-28 03:58:48,425 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [531196659] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 03:58:48,425 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-11-28 03:58:48,425 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [12] imperfect sequences [13] total 18 [2024-11-28 03:58:48,425 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [80934834] [2024-11-28 03:58:48,425 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 03:58:48,425 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 13 states [2024-11-28 03:58:48,425 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 03:58:48,426 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2024-11-28 03:58:48,426 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=47, Invalid=295, Unknown=0, NotChecked=0, Total=342 [2024-11-28 03:58:48,426 INFO L87 Difference]: Start difference. First operand 144 states and 166 transitions. Second operand has 13 states, 12 states have (on average 2.6666666666666665) internal successors, (32), 12 states have internal predecessors, (32), 1 states have call successors, (1), 1 states have call predecessors, (1), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2024-11-28 03:58:48,874 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 03:58:48,874 INFO L93 Difference]: Finished difference Result 147 states and 165 transitions. [2024-11-28 03:58:48,875 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2024-11-28 03:58:48,875 INFO L78 Accepts]: Start accepts. Automaton has has 13 states, 12 states have (on average 2.6666666666666665) internal successors, (32), 12 states have internal predecessors, (32), 1 states have call successors, (1), 1 states have call predecessors, (1), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 34 [2024-11-28 03:58:48,875 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 03:58:48,876 INFO L225 Difference]: With dead ends: 147 [2024-11-28 03:58:48,876 INFO L226 Difference]: Without dead ends: 147 [2024-11-28 03:58:48,877 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 49 GetRequests, 29 SyntacticMatches, 1 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 31 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=58, Invalid=362, Unknown=0, NotChecked=0, Total=420 [2024-11-28 03:58:48,877 INFO L435 NwaCegarLoop]: 50 mSDtfsCounter, 52 mSDsluCounter, 421 mSDsCounter, 0 mSdLazyCounter, 480 mSolverCounterSat, 6 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 52 SdHoareTripleChecker+Valid, 471 SdHoareTripleChecker+Invalid, 486 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 6 IncrementalHoareTripleChecker+Valid, 480 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2024-11-28 03:58:48,878 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [52 Valid, 471 Invalid, 486 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [6 Valid, 480 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2024-11-28 03:58:48,879 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 147 states. [2024-11-28 03:58:48,882 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 147 to 144. [2024-11-28 03:58:48,883 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 144 states, 116 states have (on average 1.3706896551724137) internal successors, (159), 139 states have internal predecessors, (159), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-28 03:58:48,884 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 144 states to 144 states and 165 transitions. [2024-11-28 03:58:48,884 INFO L78 Accepts]: Start accepts. Automaton has 144 states and 165 transitions. Word has length 34 [2024-11-28 03:58:48,884 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 03:58:48,884 INFO L471 AbstractCegarLoop]: Abstraction has 144 states and 165 transitions. [2024-11-28 03:58:48,885 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 13 states, 12 states have (on average 2.6666666666666665) internal successors, (32), 12 states have internal predecessors, (32), 1 states have call successors, (1), 1 states have call predecessors, (1), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2024-11-28 03:58:48,885 INFO L276 IsEmpty]: Start isEmpty. Operand 144 states and 165 transitions. [2024-11-28 03:58:48,885 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2024-11-28 03:58:48,885 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 03:58:48,885 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 03:58:48,897 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3d345d57-71d6-4e9e-9140-a659b2e77150/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Ended with exit code 0 [2024-11-28 03:58:49,090 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 8 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3d345d57-71d6-4e9e-9140-a659b2e77150/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable24 [2024-11-28 03:58:49,090 INFO L396 AbstractCegarLoop]: === Iteration 26 === Targeting ULTIMATE.startErr33ASSERT_VIOLATIONMEMORY_FREE === [alloc_and_zeroErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, alloc_and_zeroErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 41 more)] === [2024-11-28 03:58:49,091 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 03:58:49,091 INFO L85 PathProgramCache]: Analyzing trace with hash 2010753182, now seen corresponding path program 1 times [2024-11-28 03:58:49,091 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 03:58:49,091 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1939881067] [2024-11-28 03:58:49,092 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 03:58:49,092 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 03:58:49,126 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 03:58:49,589 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-11-28 03:58:49,590 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 03:58:49,590 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1939881067] [2024-11-28 03:58:49,590 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1939881067] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 03:58:49,590 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 03:58:49,590 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2024-11-28 03:58:49,590 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [488975377] [2024-11-28 03:58:49,591 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 03:58:49,591 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 12 states [2024-11-28 03:58:49,591 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 03:58:49,592 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2024-11-28 03:58:49,592 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=110, Unknown=0, NotChecked=0, Total=132 [2024-11-28 03:58:49,593 INFO L87 Difference]: Start difference. First operand 144 states and 165 transitions. Second operand has 12 states, 11 states have (on average 3.0) internal successors, (33), 11 states have internal predecessors, (33), 1 states have call successors, (1), 1 states have call predecessors, (1), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2024-11-28 03:58:49,929 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 03:58:49,929 INFO L93 Difference]: Finished difference Result 146 states and 164 transitions. [2024-11-28 03:58:49,930 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2024-11-28 03:58:49,930 INFO L78 Accepts]: Start accepts. Automaton has has 12 states, 11 states have (on average 3.0) internal successors, (33), 11 states have internal predecessors, (33), 1 states have call successors, (1), 1 states have call predecessors, (1), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 35 [2024-11-28 03:58:49,930 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 03:58:49,931 INFO L225 Difference]: With dead ends: 146 [2024-11-28 03:58:49,931 INFO L226 Difference]: Without dead ends: 146 [2024-11-28 03:58:49,931 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=31, Invalid=151, Unknown=0, NotChecked=0, Total=182 [2024-11-28 03:58:49,932 INFO L435 NwaCegarLoop]: 57 mSDtfsCounter, 22 mSDsluCounter, 521 mSDsCounter, 0 mSdLazyCounter, 306 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 22 SdHoareTripleChecker+Valid, 578 SdHoareTripleChecker+Invalid, 307 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 306 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2024-11-28 03:58:49,932 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [22 Valid, 578 Invalid, 307 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 306 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2024-11-28 03:58:49,933 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 146 states. [2024-11-28 03:58:49,937 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 146 to 144. [2024-11-28 03:58:49,938 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 144 states, 116 states have (on average 1.3620689655172413) internal successors, (158), 139 states have internal predecessors, (158), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-28 03:58:49,939 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 144 states to 144 states and 164 transitions. [2024-11-28 03:58:49,939 INFO L78 Accepts]: Start accepts. Automaton has 144 states and 164 transitions. Word has length 35 [2024-11-28 03:58:49,939 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 03:58:49,939 INFO L471 AbstractCegarLoop]: Abstraction has 144 states and 164 transitions. [2024-11-28 03:58:49,939 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 12 states, 11 states have (on average 3.0) internal successors, (33), 11 states have internal predecessors, (33), 1 states have call successors, (1), 1 states have call predecessors, (1), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2024-11-28 03:58:49,940 INFO L276 IsEmpty]: Start isEmpty. Operand 144 states and 164 transitions. [2024-11-28 03:58:49,940 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2024-11-28 03:58:49,940 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 03:58:49,940 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 03:58:49,940 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable25 [2024-11-28 03:58:49,940 INFO L396 AbstractCegarLoop]: === Iteration 27 === Targeting ULTIMATE.startErr34ASSERT_VIOLATIONMEMORY_FREE === [alloc_and_zeroErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, alloc_and_zeroErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 41 more)] === [2024-11-28 03:58:49,941 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 03:58:49,941 INFO L85 PathProgramCache]: Analyzing trace with hash -2091160660, now seen corresponding path program 1 times [2024-11-28 03:58:49,941 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 03:58:49,941 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [68137768] [2024-11-28 03:58:49,941 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 03:58:49,941 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 03:58:49,977 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 03:58:50,420 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-11-28 03:58:50,420 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 03:58:50,421 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [68137768] [2024-11-28 03:58:50,421 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [68137768] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 03:58:50,421 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 03:58:50,421 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2024-11-28 03:58:50,421 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [618301899] [2024-11-28 03:58:50,421 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 03:58:50,422 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 12 states [2024-11-28 03:58:50,422 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 03:58:50,422 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2024-11-28 03:58:50,422 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=110, Unknown=0, NotChecked=0, Total=132 [2024-11-28 03:58:50,423 INFO L87 Difference]: Start difference. First operand 144 states and 164 transitions. Second operand has 12 states, 11 states have (on average 3.090909090909091) internal successors, (34), 11 states have internal predecessors, (34), 1 states have call successors, (1), 1 states have call predecessors, (1), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2024-11-28 03:58:50,827 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 03:58:50,828 INFO L93 Difference]: Finished difference Result 145 states and 163 transitions. [2024-11-28 03:58:50,828 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2024-11-28 03:58:50,828 INFO L78 Accepts]: Start accepts. Automaton has has 12 states, 11 states have (on average 3.090909090909091) internal successors, (34), 11 states have internal predecessors, (34), 1 states have call successors, (1), 1 states have call predecessors, (1), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 36 [2024-11-28 03:58:50,829 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 03:58:50,829 INFO L225 Difference]: With dead ends: 145 [2024-11-28 03:58:50,829 INFO L226 Difference]: Without dead ends: 145 [2024-11-28 03:58:50,830 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=31, Invalid=151, Unknown=0, NotChecked=0, Total=182 [2024-11-28 03:58:50,830 INFO L435 NwaCegarLoop]: 54 mSDtfsCounter, 34 mSDsluCounter, 410 mSDsCounter, 0 mSdLazyCounter, 344 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 34 SdHoareTripleChecker+Valid, 464 SdHoareTripleChecker+Invalid, 347 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 344 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2024-11-28 03:58:50,834 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [34 Valid, 464 Invalid, 347 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 344 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2024-11-28 03:58:50,835 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 145 states. [2024-11-28 03:58:50,838 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 145 to 144. [2024-11-28 03:58:50,838 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 144 states, 116 states have (on average 1.353448275862069) internal successors, (157), 139 states have internal predecessors, (157), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-28 03:58:50,840 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 144 states to 144 states and 163 transitions. [2024-11-28 03:58:50,840 INFO L78 Accepts]: Start accepts. Automaton has 144 states and 163 transitions. Word has length 36 [2024-11-28 03:58:50,840 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 03:58:50,840 INFO L471 AbstractCegarLoop]: Abstraction has 144 states and 163 transitions. [2024-11-28 03:58:50,841 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 12 states, 11 states have (on average 3.090909090909091) internal successors, (34), 11 states have internal predecessors, (34), 1 states have call successors, (1), 1 states have call predecessors, (1), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2024-11-28 03:58:50,841 INFO L276 IsEmpty]: Start isEmpty. Operand 144 states and 163 transitions. [2024-11-28 03:58:50,841 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2024-11-28 03:58:50,841 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 03:58:50,841 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 03:58:50,842 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable26 [2024-11-28 03:58:50,842 INFO L396 AbstractCegarLoop]: === Iteration 28 === Targeting ULTIMATE.startErr35ASSERT_VIOLATIONMEMORY_FREE === [alloc_and_zeroErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, alloc_and_zeroErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 41 more)] === [2024-11-28 03:58:50,842 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 03:58:50,842 INFO L85 PathProgramCache]: Analyzing trace with hash -401470880, now seen corresponding path program 1 times [2024-11-28 03:58:50,842 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 03:58:50,843 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [252127473] [2024-11-28 03:58:50,843 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 03:58:50,843 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 03:58:50,872 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 03:58:51,698 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-28 03:58:51,698 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 03:58:51,698 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [252127473] [2024-11-28 03:58:51,698 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [252127473] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-28 03:58:51,698 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [775567244] [2024-11-28 03:58:51,699 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 03:58:51,699 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-28 03:58:51,699 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3d345d57-71d6-4e9e-9140-a659b2e77150/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 03:58:51,701 INFO L229 MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3d345d57-71d6-4e9e-9140-a659b2e77150/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-28 03:58:51,705 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3d345d57-71d6-4e9e-9140-a659b2e77150/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2024-11-28 03:58:51,928 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 03:58:51,930 INFO L256 TraceCheckSpWp]: Trace formula consists of 262 conjuncts, 50 conjuncts are in the unsatisfiable core [2024-11-28 03:58:51,933 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-28 03:58:52,004 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2024-11-28 03:58:52,084 INFO L349 Elim1Store]: treesize reduction 18, result has 35.7 percent of original size [2024-11-28 03:58:52,084 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 17 treesize of output 21 [2024-11-28 03:58:52,207 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 1 [2024-11-28 03:58:52,277 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 23 [2024-11-28 03:58:52,884 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 16 [2024-11-28 03:58:52,906 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-11-28 03:58:52,906 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 29 treesize of output 13 [2024-11-28 03:58:52,916 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-28 03:58:52,916 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-28 03:58:53,706 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-11-28 03:58:53,707 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 449 treesize of output 409 [2024-11-28 03:58:59,812 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 1 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-28 03:58:59,813 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [775567244] provided 1 perfect and 1 imperfect interpolant sequences [2024-11-28 03:58:59,813 INFO L185 FreeRefinementEngine]: Found 1 perfect and 2 imperfect interpolant sequences. [2024-11-28 03:58:59,813 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [12] imperfect sequences [17, 15] total 39 [2024-11-28 03:58:59,813 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [892040619] [2024-11-28 03:58:59,813 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 03:58:59,814 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 13 states [2024-11-28 03:58:59,814 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 03:58:59,814 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2024-11-28 03:58:59,815 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=128, Invalid=1432, Unknown=0, NotChecked=0, Total=1560 [2024-11-28 03:58:59,816 INFO L87 Difference]: Start difference. First operand 144 states and 163 transitions. Second operand has 13 states, 12 states have (on average 2.9166666666666665) internal successors, (35), 13 states have internal predecessors, (35), 1 states have call successors, (1), 1 states have call predecessors, (1), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2024-11-28 03:59:04,180 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 4.00s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [1] [2024-11-28 03:59:07,841 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 03:59:07,841 INFO L93 Difference]: Finished difference Result 144 states and 162 transitions. [2024-11-28 03:59:07,841 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2024-11-28 03:59:07,842 INFO L78 Accepts]: Start accepts. Automaton has has 13 states, 12 states have (on average 2.9166666666666665) internal successors, (35), 13 states have internal predecessors, (35), 1 states have call successors, (1), 1 states have call predecessors, (1), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 37 [2024-11-28 03:59:07,842 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 03:59:07,843 INFO L225 Difference]: With dead ends: 144 [2024-11-28 03:59:07,843 INFO L226 Difference]: Without dead ends: 144 [2024-11-28 03:59:07,844 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 94 GetRequests, 51 SyntacticMatches, 0 SemanticMatches, 43 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 407 ImplicationChecksByTransitivity, 4.9s TimeCoverageRelationStatistics Valid=158, Invalid=1822, Unknown=0, NotChecked=0, Total=1980 [2024-11-28 03:59:07,844 INFO L435 NwaCegarLoop]: 64 mSDtfsCounter, 19 mSDsluCounter, 402 mSDsCounter, 0 mSdLazyCounter, 507 mSolverCounterSat, 3 mSolverCounterUnsat, 1 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 6.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 19 SdHoareTripleChecker+Valid, 466 SdHoareTripleChecker+Invalid, 511 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 507 IncrementalHoareTripleChecker+Invalid, 1 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 6.2s IncrementalHoareTripleChecker+Time [2024-11-28 03:59:07,845 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [19 Valid, 466 Invalid, 511 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 507 Invalid, 1 Unknown, 0 Unchecked, 6.2s Time] [2024-11-28 03:59:07,845 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 144 states. [2024-11-28 03:59:07,849 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 144 to 144. [2024-11-28 03:59:07,849 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 144 states, 116 states have (on average 1.3448275862068966) internal successors, (156), 139 states have internal predecessors, (156), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-28 03:59:07,850 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 144 states to 144 states and 162 transitions. [2024-11-28 03:59:07,850 INFO L78 Accepts]: Start accepts. Automaton has 144 states and 162 transitions. Word has length 37 [2024-11-28 03:59:07,851 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 03:59:07,851 INFO L471 AbstractCegarLoop]: Abstraction has 144 states and 162 transitions. [2024-11-28 03:59:07,851 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 13 states, 12 states have (on average 2.9166666666666665) internal successors, (35), 13 states have internal predecessors, (35), 1 states have call successors, (1), 1 states have call predecessors, (1), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2024-11-28 03:59:07,851 INFO L276 IsEmpty]: Start isEmpty. Operand 144 states and 162 transitions. [2024-11-28 03:59:07,852 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2024-11-28 03:59:07,852 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 03:59:07,852 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 03:59:07,864 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3d345d57-71d6-4e9e-9140-a659b2e77150/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Ended with exit code 0 [2024-11-28 03:59:08,056 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 9 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3d345d57-71d6-4e9e-9140-a659b2e77150/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable27 [2024-11-28 03:59:08,056 INFO L396 AbstractCegarLoop]: === Iteration 29 === Targeting ULTIMATE.startErr21REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [alloc_and_zeroErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, alloc_and_zeroErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 41 more)] === [2024-11-28 03:59:08,056 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 03:59:08,056 INFO L85 PathProgramCache]: Analyzing trace with hash 1570649037, now seen corresponding path program 1 times [2024-11-28 03:59:08,057 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 03:59:08,057 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [712206690] [2024-11-28 03:59:08,057 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 03:59:08,057 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 03:59:08,085 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 03:59:08,411 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-11-28 03:59:08,411 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 03:59:08,411 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [712206690] [2024-11-28 03:59:08,411 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [712206690] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-28 03:59:08,411 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [779315158] [2024-11-28 03:59:08,411 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 03:59:08,412 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-28 03:59:08,412 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3d345d57-71d6-4e9e-9140-a659b2e77150/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 03:59:08,414 INFO L229 MonitoredProcess]: Starting monitored process 10 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3d345d57-71d6-4e9e-9140-a659b2e77150/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-28 03:59:08,417 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3d345d57-71d6-4e9e-9140-a659b2e77150/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process [2024-11-28 03:59:08,650 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 03:59:08,652 INFO L256 TraceCheckSpWp]: Trace formula consists of 307 conjuncts, 40 conjuncts are in the unsatisfiable core [2024-11-28 03:59:08,656 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-28 03:59:08,959 WARN L873 $PredicateComparison]: unable to prove that (exists ((alloc_and_zero_~pi~0.base Int)) (and (= (select |c_old(#valid)| alloc_and_zero_~pi~0.base) 0) (= (store |c_old(#length)| alloc_and_zero_~pi~0.base (select |c_#length| alloc_and_zero_~pi~0.base)) |c_#length|))) is different from true [2024-11-28 03:59:08,987 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-11-28 03:59:08,988 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 11 [2024-11-28 03:59:09,000 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-11-28 03:59:09,001 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 11 treesize of output 11 [2024-11-28 03:59:09,186 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 1 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 4 not checked. [2024-11-28 03:59:09,186 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-28 03:59:09,501 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [779315158] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-28 03:59:09,501 INFO L185 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2024-11-28 03:59:09,501 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 12] total 20 [2024-11-28 03:59:09,502 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [625531949] [2024-11-28 03:59:09,502 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2024-11-28 03:59:09,502 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 21 states [2024-11-28 03:59:09,502 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 03:59:09,503 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2024-11-28 03:59:09,503 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=65, Invalid=490, Unknown=1, NotChecked=44, Total=600 [2024-11-28 03:59:09,503 INFO L87 Difference]: Start difference. First operand 144 states and 162 transitions. Second operand has 21 states, 20 states have (on average 3.4) internal successors, (68), 18 states have internal predecessors, (68), 3 states have call successors, (3), 2 states have call predecessors, (3), 4 states have return successors, (4), 4 states have call predecessors, (4), 3 states have call successors, (4) [2024-11-28 03:59:10,319 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 03:59:10,319 INFO L93 Difference]: Finished difference Result 173 states and 193 transitions. [2024-11-28 03:59:10,319 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2024-11-28 03:59:10,319 INFO L78 Accepts]: Start accepts. Automaton has has 21 states, 20 states have (on average 3.4) internal successors, (68), 18 states have internal predecessors, (68), 3 states have call successors, (3), 2 states have call predecessors, (3), 4 states have return successors, (4), 4 states have call predecessors, (4), 3 states have call successors, (4) Word has length 39 [2024-11-28 03:59:10,320 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 03:59:10,321 INFO L225 Difference]: With dead ends: 173 [2024-11-28 03:59:10,321 INFO L226 Difference]: Without dead ends: 173 [2024-11-28 03:59:10,321 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 73 GetRequests, 41 SyntacticMatches, 0 SemanticMatches, 32 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 144 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=125, Invalid=932, Unknown=3, NotChecked=62, Total=1122 [2024-11-28 03:59:10,322 INFO L435 NwaCegarLoop]: 58 mSDtfsCounter, 61 mSDsluCounter, 636 mSDsCounter, 0 mSdLazyCounter, 525 mSolverCounterSat, 11 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 61 SdHoareTripleChecker+Valid, 694 SdHoareTripleChecker+Invalid, 667 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 11 IncrementalHoareTripleChecker+Valid, 525 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 131 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2024-11-28 03:59:10,322 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [61 Valid, 694 Invalid, 667 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [11 Valid, 525 Invalid, 0 Unknown, 131 Unchecked, 0.5s Time] [2024-11-28 03:59:10,323 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 173 states. [2024-11-28 03:59:10,327 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 173 to 162. [2024-11-28 03:59:10,327 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 162 states, 133 states have (on average 1.3533834586466165) internal successors, (180), 156 states have internal predecessors, (180), 4 states have call successors, (4), 1 states have call predecessors, (4), 1 states have return successors, (4), 4 states have call predecessors, (4), 4 states have call successors, (4) [2024-11-28 03:59:10,328 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 162 states to 162 states and 188 transitions. [2024-11-28 03:59:10,329 INFO L78 Accepts]: Start accepts. Automaton has 162 states and 188 transitions. Word has length 39 [2024-11-28 03:59:10,329 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 03:59:10,329 INFO L471 AbstractCegarLoop]: Abstraction has 162 states and 188 transitions. [2024-11-28 03:59:10,329 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 21 states, 20 states have (on average 3.4) internal successors, (68), 18 states have internal predecessors, (68), 3 states have call successors, (3), 2 states have call predecessors, (3), 4 states have return successors, (4), 4 states have call predecessors, (4), 3 states have call successors, (4) [2024-11-28 03:59:10,329 INFO L276 IsEmpty]: Start isEmpty. Operand 162 states and 188 transitions. [2024-11-28 03:59:10,330 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2024-11-28 03:59:10,330 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 03:59:10,330 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 03:59:10,342 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3d345d57-71d6-4e9e-9140-a659b2e77150/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Ended with exit code 0 [2024-11-28 03:59:10,530 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 10 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3d345d57-71d6-4e9e-9140-a659b2e77150/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable28 [2024-11-28 03:59:10,531 INFO L396 AbstractCegarLoop]: === Iteration 30 === Targeting ULTIMATE.startErr36REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [alloc_and_zeroErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, alloc_and_zeroErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 41 more)] === [2024-11-28 03:59:10,531 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 03:59:10,531 INFO L85 PathProgramCache]: Analyzing trace with hash 733545702, now seen corresponding path program 1 times [2024-11-28 03:59:10,531 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 03:59:10,531 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1242681823] [2024-11-28 03:59:10,531 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 03:59:10,531 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 03:59:10,558 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 03:59:11,165 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-11-28 03:59:11,165 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 03:59:11,165 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1242681823] [2024-11-28 03:59:11,165 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1242681823] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 03:59:11,166 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 03:59:11,166 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2024-11-28 03:59:11,166 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [148695159] [2024-11-28 03:59:11,166 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 03:59:11,166 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 14 states [2024-11-28 03:59:11,166 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 03:59:11,167 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2024-11-28 03:59:11,167 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=29, Invalid=153, Unknown=0, NotChecked=0, Total=182 [2024-11-28 03:59:11,167 INFO L87 Difference]: Start difference. First operand 162 states and 188 transitions. Second operand has 14 states, 13 states have (on average 2.8461538461538463) internal successors, (37), 13 states have internal predecessors, (37), 1 states have call successors, (1), 1 states have call predecessors, (1), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2024-11-28 03:59:11,638 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 03:59:11,638 INFO L93 Difference]: Finished difference Result 162 states and 187 transitions. [2024-11-28 03:59:11,639 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2024-11-28 03:59:11,639 INFO L78 Accepts]: Start accepts. Automaton has has 14 states, 13 states have (on average 2.8461538461538463) internal successors, (37), 13 states have internal predecessors, (37), 1 states have call successors, (1), 1 states have call predecessors, (1), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 39 [2024-11-28 03:59:11,639 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 03:59:11,640 INFO L225 Difference]: With dead ends: 162 [2024-11-28 03:59:11,640 INFO L226 Difference]: Without dead ends: 162 [2024-11-28 03:59:11,640 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=46, Invalid=226, Unknown=0, NotChecked=0, Total=272 [2024-11-28 03:59:11,641 INFO L435 NwaCegarLoop]: 52 mSDtfsCounter, 44 mSDsluCounter, 473 mSDsCounter, 0 mSdLazyCounter, 440 mSolverCounterSat, 5 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 44 SdHoareTripleChecker+Valid, 525 SdHoareTripleChecker+Invalid, 445 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 5 IncrementalHoareTripleChecker+Valid, 440 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2024-11-28 03:59:11,642 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [44 Valid, 525 Invalid, 445 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [5 Valid, 440 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2024-11-28 03:59:11,642 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 162 states. [2024-11-28 03:59:11,647 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 162 to 162. [2024-11-28 03:59:11,648 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 162 states, 133 states have (on average 1.3458646616541354) internal successors, (179), 156 states have internal predecessors, (179), 4 states have call successors, (4), 1 states have call predecessors, (4), 1 states have return successors, (4), 4 states have call predecessors, (4), 4 states have call successors, (4) [2024-11-28 03:59:11,649 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 162 states to 162 states and 187 transitions. [2024-11-28 03:59:11,649 INFO L78 Accepts]: Start accepts. Automaton has 162 states and 187 transitions. Word has length 39 [2024-11-28 03:59:11,649 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 03:59:11,650 INFO L471 AbstractCegarLoop]: Abstraction has 162 states and 187 transitions. [2024-11-28 03:59:11,650 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 14 states, 13 states have (on average 2.8461538461538463) internal successors, (37), 13 states have internal predecessors, (37), 1 states have call successors, (1), 1 states have call predecessors, (1), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2024-11-28 03:59:11,650 INFO L276 IsEmpty]: Start isEmpty. Operand 162 states and 187 transitions. [2024-11-28 03:59:11,650 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2024-11-28 03:59:11,651 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 03:59:11,651 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 3, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 03:59:11,651 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable29 [2024-11-28 03:59:11,652 INFO L396 AbstractCegarLoop]: === Iteration 31 === Targeting ULTIMATE.startErr8REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [alloc_and_zeroErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, alloc_and_zeroErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 41 more)] === [2024-11-28 03:59:11,653 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 03:59:11,653 INFO L85 PathProgramCache]: Analyzing trace with hash -354102429, now seen corresponding path program 1 times [2024-11-28 03:59:11,653 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 03:59:11,653 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2114027444] [2024-11-28 03:59:11,653 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 03:59:11,653 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 03:59:11,687 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 03:59:12,404 INFO L134 CoverageAnalysis]: Checked inductivity of 19 backedges. 10 proven. 5 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-11-28 03:59:12,404 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 03:59:12,404 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2114027444] [2024-11-28 03:59:12,404 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2114027444] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-28 03:59:12,404 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [934299279] [2024-11-28 03:59:12,404 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 03:59:12,404 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-28 03:59:12,404 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3d345d57-71d6-4e9e-9140-a659b2e77150/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 03:59:12,407 INFO L229 MonitoredProcess]: Starting monitored process 11 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3d345d57-71d6-4e9e-9140-a659b2e77150/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-28 03:59:12,411 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3d345d57-71d6-4e9e-9140-a659b2e77150/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Waiting until timeout for monitored process [2024-11-28 03:59:12,658 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 03:59:12,664 INFO L256 TraceCheckSpWp]: Trace formula consists of 337 conjuncts, 32 conjuncts are in the unsatisfiable core [2024-11-28 03:59:12,667 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-28 03:59:12,730 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-11-28 03:59:12,730 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 11 treesize of output 11 [2024-11-28 03:59:12,762 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 1 [2024-11-28 03:59:12,853 INFO L349 Elim1Store]: treesize reduction 21, result has 19.2 percent of original size [2024-11-28 03:59:12,853 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 42 treesize of output 41 [2024-11-28 03:59:12,935 INFO L349 Elim1Store]: treesize reduction 21, result has 19.2 percent of original size [2024-11-28 03:59:12,935 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 42 treesize of output 41 [2024-11-28 03:59:12,953 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 13 [2024-11-28 03:59:12,978 WARN L873 $PredicateComparison]: unable to prove that (exists ((alloc_and_zero_~pi~0.base Int)) (and (= (select |c_old(#valid)| alloc_and_zero_~pi~0.base) 0) (= |c_#valid| (store |c_old(#valid)| alloc_and_zero_~pi~0.base (select |c_#valid| alloc_and_zero_~pi~0.base))))) is different from true [2024-11-28 03:59:13,019 INFO L349 Elim1Store]: treesize reduction 20, result has 33.3 percent of original size [2024-11-28 03:59:13,020 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 19 treesize of output 16 [2024-11-28 03:59:13,023 INFO L134 CoverageAnalysis]: Checked inductivity of 19 backedges. 10 proven. 1 refuted. 0 times theorem prover too weak. 4 trivial. 4 not checked. [2024-11-28 03:59:13,023 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-28 03:59:13,112 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [934299279] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-28 03:59:13,112 INFO L185 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2024-11-28 03:59:13,112 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 12] total 21 [2024-11-28 03:59:13,112 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [509087962] [2024-11-28 03:59:13,112 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2024-11-28 03:59:13,112 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 22 states [2024-11-28 03:59:13,113 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 03:59:13,113 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2024-11-28 03:59:13,113 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=62, Invalid=403, Unknown=1, NotChecked=40, Total=506 [2024-11-28 03:59:13,113 INFO L87 Difference]: Start difference. First operand 162 states and 187 transitions. Second operand has 22 states, 21 states have (on average 2.3333333333333335) internal successors, (49), 19 states have internal predecessors, (49), 2 states have call successors, (2), 2 states have call predecessors, (2), 5 states have return successors, (5), 4 states have call predecessors, (5), 2 states have call successors, (5) [2024-11-28 03:59:13,805 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 03:59:13,805 INFO L93 Difference]: Finished difference Result 160 states and 183 transitions. [2024-11-28 03:59:13,808 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2024-11-28 03:59:13,808 INFO L78 Accepts]: Start accepts. Automaton has has 22 states, 21 states have (on average 2.3333333333333335) internal successors, (49), 19 states have internal predecessors, (49), 2 states have call successors, (2), 2 states have call predecessors, (2), 5 states have return successors, (5), 4 states have call predecessors, (5), 2 states have call successors, (5) Word has length 42 [2024-11-28 03:59:13,808 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 03:59:13,809 INFO L225 Difference]: With dead ends: 160 [2024-11-28 03:59:13,809 INFO L226 Difference]: Without dead ends: 160 [2024-11-28 03:59:13,809 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 68 GetRequests, 41 SyntacticMatches, 0 SemanticMatches, 27 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 109 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=107, Invalid=652, Unknown=1, NotChecked=52, Total=812 [2024-11-28 03:59:13,810 INFO L435 NwaCegarLoop]: 63 mSDtfsCounter, 12 mSDsluCounter, 634 mSDsCounter, 0 mSdLazyCounter, 523 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 12 SdHoareTripleChecker+Valid, 697 SdHoareTripleChecker+Invalid, 603 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 523 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 76 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2024-11-28 03:59:13,810 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [12 Valid, 697 Invalid, 603 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 523 Invalid, 0 Unknown, 76 Unchecked, 0.5s Time] [2024-11-28 03:59:13,811 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 160 states. [2024-11-28 03:59:13,815 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 160 to 160. [2024-11-28 03:59:13,817 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 160 states, 133 states have (on average 1.3157894736842106) internal successors, (175), 154 states have internal predecessors, (175), 4 states have call successors, (4), 1 states have call predecessors, (4), 1 states have return successors, (4), 4 states have call predecessors, (4), 4 states have call successors, (4) [2024-11-28 03:59:13,818 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 160 states to 160 states and 183 transitions. [2024-11-28 03:59:13,819 INFO L78 Accepts]: Start accepts. Automaton has 160 states and 183 transitions. Word has length 42 [2024-11-28 03:59:13,819 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 03:59:13,819 INFO L471 AbstractCegarLoop]: Abstraction has 160 states and 183 transitions. [2024-11-28 03:59:13,819 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 22 states, 21 states have (on average 2.3333333333333335) internal successors, (49), 19 states have internal predecessors, (49), 2 states have call successors, (2), 2 states have call predecessors, (2), 5 states have return successors, (5), 4 states have call predecessors, (5), 2 states have call successors, (5) [2024-11-28 03:59:13,819 INFO L276 IsEmpty]: Start isEmpty. Operand 160 states and 183 transitions. [2024-11-28 03:59:13,820 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2024-11-28 03:59:13,820 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 03:59:13,820 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 3, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 03:59:13,831 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3d345d57-71d6-4e9e-9140-a659b2e77150/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Forceful destruction successful, exit code 0 [2024-11-28 03:59:14,023 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable30,11 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3d345d57-71d6-4e9e-9140-a659b2e77150/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-28 03:59:14,024 INFO L396 AbstractCegarLoop]: === Iteration 32 === Targeting ULTIMATE.startErr9REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [alloc_and_zeroErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, alloc_and_zeroErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 41 more)] === [2024-11-28 03:59:14,024 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 03:59:14,024 INFO L85 PathProgramCache]: Analyzing trace with hash -354102428, now seen corresponding path program 1 times [2024-11-28 03:59:14,024 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 03:59:14,025 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [652647403] [2024-11-28 03:59:14,025 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 03:59:14,025 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 03:59:14,054 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 03:59:15,008 INFO L134 CoverageAnalysis]: Checked inductivity of 19 backedges. 14 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-28 03:59:15,009 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 03:59:15,009 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [652647403] [2024-11-28 03:59:15,009 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [652647403] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-28 03:59:15,009 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1501945200] [2024-11-28 03:59:15,009 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 03:59:15,009 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-28 03:59:15,009 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3d345d57-71d6-4e9e-9140-a659b2e77150/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 03:59:15,012 INFO L229 MonitoredProcess]: Starting monitored process 12 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3d345d57-71d6-4e9e-9140-a659b2e77150/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-28 03:59:15,015 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3d345d57-71d6-4e9e-9140-a659b2e77150/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Waiting until timeout for monitored process [2024-11-28 03:59:15,261 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 03:59:15,264 INFO L256 TraceCheckSpWp]: Trace formula consists of 337 conjuncts, 50 conjuncts are in the unsatisfiable core [2024-11-28 03:59:15,267 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-28 03:59:15,298 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 1 [2024-11-28 03:59:15,400 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-11-28 03:59:15,401 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 11 treesize of output 11 [2024-11-28 03:59:15,445 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 9 [2024-11-28 03:59:15,457 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 1 [2024-11-28 03:59:15,575 INFO L349 Elim1Store]: treesize reduction 21, result has 19.2 percent of original size [2024-11-28 03:59:15,575 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 73 treesize of output 66 [2024-11-28 03:59:15,586 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 13 [2024-11-28 03:59:15,738 INFO L349 Elim1Store]: treesize reduction 21, result has 19.2 percent of original size [2024-11-28 03:59:15,738 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 73 treesize of output 66 [2024-11-28 03:59:15,752 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 13 [2024-11-28 03:59:15,791 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 42 treesize of output 18 [2024-11-28 03:59:15,803 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 3 [2024-11-28 03:59:15,949 WARN L873 $PredicateComparison]: unable to prove that (exists ((alloc_and_zero_~pi~0.base Int)) (and (= (select |c_old(#valid)| alloc_and_zero_~pi~0.base) 0) (= (store |c_old(#length)| alloc_and_zero_~pi~0.base (select |c_#length| alloc_and_zero_~pi~0.base)) |c_#length|))) is different from true [2024-11-28 03:59:15,981 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-11-28 03:59:15,982 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 9 [2024-11-28 03:59:15,993 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-11-28 03:59:15,994 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 11 treesize of output 11 [2024-11-28 03:59:16,040 INFO L134 CoverageAnalysis]: Checked inductivity of 19 backedges. 14 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 4 not checked. [2024-11-28 03:59:16,040 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-28 03:59:16,231 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1501945200] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-28 03:59:16,231 INFO L185 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2024-11-28 03:59:16,231 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 15] total 28 [2024-11-28 03:59:16,231 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1417594217] [2024-11-28 03:59:16,231 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2024-11-28 03:59:16,232 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 29 states [2024-11-28 03:59:16,232 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 03:59:16,232 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 29 interpolants. [2024-11-28 03:59:16,233 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=92, Invalid=781, Unknown=1, NotChecked=56, Total=930 [2024-11-28 03:59:16,233 INFO L87 Difference]: Start difference. First operand 160 states and 183 transitions. Second operand has 29 states, 28 states have (on average 2.0357142857142856) internal successors, (57), 23 states have internal predecessors, (57), 4 states have call successors, (4), 3 states have call predecessors, (4), 5 states have return successors, (5), 5 states have call predecessors, (5), 4 states have call successors, (5) [2024-11-28 03:59:17,552 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 03:59:17,552 INFO L93 Difference]: Finished difference Result 156 states and 175 transitions. [2024-11-28 03:59:17,552 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2024-11-28 03:59:17,552 INFO L78 Accepts]: Start accepts. Automaton has has 29 states, 28 states have (on average 2.0357142857142856) internal successors, (57), 23 states have internal predecessors, (57), 4 states have call successors, (4), 3 states have call predecessors, (4), 5 states have return successors, (5), 5 states have call predecessors, (5), 4 states have call successors, (5) Word has length 42 [2024-11-28 03:59:17,553 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 03:59:17,554 INFO L225 Difference]: With dead ends: 156 [2024-11-28 03:59:17,554 INFO L226 Difference]: Without dead ends: 156 [2024-11-28 03:59:17,554 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 71 GetRequests, 31 SyntacticMatches, 0 SemanticMatches, 40 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 261 ImplicationChecksByTransitivity, 1.4s TimeCoverageRelationStatistics Valid=210, Invalid=1433, Unknown=1, NotChecked=78, Total=1722 [2024-11-28 03:59:17,555 INFO L435 NwaCegarLoop]: 72 mSDtfsCounter, 32 mSDsluCounter, 881 mSDsCounter, 0 mSdLazyCounter, 776 mSolverCounterSat, 12 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.7s Time, 0 mProtectedPredicate, 0 mProtectedAction, 32 SdHoareTripleChecker+Valid, 953 SdHoareTripleChecker+Invalid, 876 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 12 IncrementalHoareTripleChecker+Valid, 776 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 88 IncrementalHoareTripleChecker+Unchecked, 0.8s IncrementalHoareTripleChecker+Time [2024-11-28 03:59:17,555 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [32 Valid, 953 Invalid, 876 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [12 Valid, 776 Invalid, 0 Unknown, 88 Unchecked, 0.8s Time] [2024-11-28 03:59:17,560 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 156 states. [2024-11-28 03:59:17,586 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 156 to 156. [2024-11-28 03:59:17,586 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 156 states, 133 states have (on average 1.255639097744361) internal successors, (167), 150 states have internal predecessors, (167), 4 states have call successors, (4), 1 states have call predecessors, (4), 1 states have return successors, (4), 4 states have call predecessors, (4), 4 states have call successors, (4) [2024-11-28 03:59:17,587 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 156 states to 156 states and 175 transitions. [2024-11-28 03:59:17,587 INFO L78 Accepts]: Start accepts. Automaton has 156 states and 175 transitions. Word has length 42 [2024-11-28 03:59:17,587 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 03:59:17,587 INFO L471 AbstractCegarLoop]: Abstraction has 156 states and 175 transitions. [2024-11-28 03:59:17,587 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 29 states, 28 states have (on average 2.0357142857142856) internal successors, (57), 23 states have internal predecessors, (57), 4 states have call successors, (4), 3 states have call predecessors, (4), 5 states have return successors, (5), 5 states have call predecessors, (5), 4 states have call successors, (5) [2024-11-28 03:59:17,587 INFO L276 IsEmpty]: Start isEmpty. Operand 156 states and 175 transitions. [2024-11-28 03:59:17,588 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2024-11-28 03:59:17,588 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 03:59:17,588 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 03:59:17,601 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3d345d57-71d6-4e9e-9140-a659b2e77150/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Forceful destruction successful, exit code 0 [2024-11-28 03:59:17,788 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable31,12 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3d345d57-71d6-4e9e-9140-a659b2e77150/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-28 03:59:17,789 INFO L396 AbstractCegarLoop]: === Iteration 33 === Targeting ULTIMATE.startErr39ASSERT_VIOLATIONMEMORY_FREE === [alloc_and_zeroErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, alloc_and_zeroErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 41 more)] === [2024-11-28 03:59:17,790 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 03:59:17,790 INFO L85 PathProgramCache]: Analyzing trace with hash 266500633, now seen corresponding path program 1 times [2024-11-28 03:59:17,791 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 03:59:17,791 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1531700856] [2024-11-28 03:59:17,791 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 03:59:17,791 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 03:59:17,813 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 03:59:17,979 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-11-28 03:59:17,979 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 03:59:17,979 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1531700856] [2024-11-28 03:59:17,979 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1531700856] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-28 03:59:17,980 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-28 03:59:17,980 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2024-11-28 03:59:17,981 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1026121597] [2024-11-28 03:59:17,981 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-28 03:59:17,981 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 9 states [2024-11-28 03:59:17,982 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 03:59:17,982 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2024-11-28 03:59:17,982 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=57, Unknown=0, NotChecked=0, Total=72 [2024-11-28 03:59:17,982 INFO L87 Difference]: Start difference. First operand 156 states and 175 transitions. Second operand has 9 states, 8 states have (on average 5.0) internal successors, (40), 8 states have internal predecessors, (40), 1 states have call successors, (1), 1 states have call predecessors, (1), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2024-11-28 03:59:18,193 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 03:59:18,193 INFO L93 Difference]: Finished difference Result 160 states and 179 transitions. [2024-11-28 03:59:18,194 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2024-11-28 03:59:18,194 INFO L78 Accepts]: Start accepts. Automaton has has 9 states, 8 states have (on average 5.0) internal successors, (40), 8 states have internal predecessors, (40), 1 states have call successors, (1), 1 states have call predecessors, (1), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 42 [2024-11-28 03:59:18,194 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 03:59:18,195 INFO L225 Difference]: With dead ends: 160 [2024-11-28 03:59:18,195 INFO L226 Difference]: Without dead ends: 160 [2024-11-28 03:59:18,195 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=15, Invalid=57, Unknown=0, NotChecked=0, Total=72 [2024-11-28 03:59:18,195 INFO L435 NwaCegarLoop]: 56 mSDtfsCounter, 24 mSDsluCounter, 308 mSDsCounter, 0 mSdLazyCounter, 201 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 25 SdHoareTripleChecker+Valid, 364 SdHoareTripleChecker+Invalid, 202 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 201 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-11-28 03:59:18,196 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [25 Valid, 364 Invalid, 202 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 201 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-11-28 03:59:18,196 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 160 states. [2024-11-28 03:59:18,200 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 160 to 159. [2024-11-28 03:59:18,200 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 159 states, 136 states have (on average 1.2573529411764706) internal successors, (171), 153 states have internal predecessors, (171), 4 states have call successors, (4), 1 states have call predecessors, (4), 1 states have return successors, (4), 4 states have call predecessors, (4), 4 states have call successors, (4) [2024-11-28 03:59:18,201 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 159 states to 159 states and 179 transitions. [2024-11-28 03:59:18,201 INFO L78 Accepts]: Start accepts. Automaton has 159 states and 179 transitions. Word has length 42 [2024-11-28 03:59:18,201 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 03:59:18,202 INFO L471 AbstractCegarLoop]: Abstraction has 159 states and 179 transitions. [2024-11-28 03:59:18,202 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 9 states, 8 states have (on average 5.0) internal successors, (40), 8 states have internal predecessors, (40), 1 states have call successors, (1), 1 states have call predecessors, (1), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2024-11-28 03:59:18,202 INFO L276 IsEmpty]: Start isEmpty. Operand 159 states and 179 transitions. [2024-11-28 03:59:18,202 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 46 [2024-11-28 03:59:18,203 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 03:59:18,203 INFO L218 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 03:59:18,203 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable32 [2024-11-28 03:59:18,203 INFO L396 AbstractCegarLoop]: === Iteration 34 === Targeting ULTIMATE.startErr36REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [alloc_and_zeroErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, alloc_and_zeroErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 41 more)] === [2024-11-28 03:59:18,203 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 03:59:18,204 INFO L85 PathProgramCache]: Analyzing trace with hash -2074013138, now seen corresponding path program 1 times [2024-11-28 03:59:18,204 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 03:59:18,204 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1110694866] [2024-11-28 03:59:18,204 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 03:59:18,204 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 03:59:18,233 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 03:59:19,459 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-11-28 03:59:19,459 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 03:59:19,459 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1110694866] [2024-11-28 03:59:19,459 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1110694866] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-28 03:59:19,459 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1481415435] [2024-11-28 03:59:19,460 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 03:59:19,460 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-28 03:59:19,460 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3d345d57-71d6-4e9e-9140-a659b2e77150/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 03:59:19,461 INFO L229 MonitoredProcess]: Starting monitored process 13 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3d345d57-71d6-4e9e-9140-a659b2e77150/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-28 03:59:19,464 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3d345d57-71d6-4e9e-9140-a659b2e77150/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Waiting until timeout for monitored process [2024-11-28 03:59:19,662 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 03:59:19,664 INFO L256 TraceCheckSpWp]: Trace formula consists of 290 conjuncts, 72 conjuncts are in the unsatisfiable core [2024-11-28 03:59:19,667 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-28 03:59:19,673 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2024-11-28 03:59:19,716 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2024-11-28 03:59:19,728 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2024-11-28 03:59:19,800 INFO L349 Elim1Store]: treesize reduction 20, result has 33.3 percent of original size [2024-11-28 03:59:19,800 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 19 treesize of output 16 [2024-11-28 03:59:19,880 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 11 [2024-11-28 03:59:19,888 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 11 [2024-11-28 03:59:19,936 INFO L349 Elim1Store]: treesize reduction 20, result has 33.3 percent of original size [2024-11-28 03:59:19,936 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 19 treesize of output 16 [2024-11-28 03:59:20,006 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 11 [2024-11-28 03:59:20,010 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 11 [2024-11-28 03:59:20,054 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 11 [2024-11-28 03:59:20,065 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 11 [2024-11-28 03:59:20,128 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 11 [2024-11-28 03:59:20,136 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 22 [2024-11-28 03:59:20,354 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 3 [2024-11-28 03:59:20,668 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-11-28 03:59:20,676 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-11-28 03:59:20,676 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 1 case distinctions, treesize of input 25 treesize of output 19 [2024-11-28 03:59:20,695 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-11-28 03:59:20,696 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 17 treesize of output 15 [2024-11-28 03:59:20,832 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 1 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-28 03:59:20,832 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-28 03:59:23,024 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-11-28 03:59:23,024 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 31 treesize of output 32 [2024-11-28 03:59:23,034 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 188 treesize of output 182 [2024-11-28 03:59:23,047 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 80 treesize of output 78 [2024-11-28 03:59:23,069 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-11-28 03:59:23,070 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 167 treesize of output 167 [2024-11-28 03:59:23,089 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 118 treesize of output 114 [2024-11-28 03:59:23,419 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-11-28 03:59:23,419 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 31 treesize of output 32 [2024-11-28 03:59:23,428 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 94 treesize of output 90 [2024-11-28 03:59:23,450 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-11-28 03:59:23,451 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 147 treesize of output 147 [2024-11-28 03:59:23,466 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 180 treesize of output 176 [2024-11-28 03:59:23,483 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 99 treesize of output 97 [2024-11-28 03:59:24,145 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 2 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-28 03:59:24,145 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1481415435] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-28 03:59:24,145 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-28 03:59:24,145 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 19, 21] total 47 [2024-11-28 03:59:24,145 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [342855225] [2024-11-28 03:59:24,145 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-28 03:59:24,146 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 47 states [2024-11-28 03:59:24,146 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 03:59:24,146 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 47 interpolants. [2024-11-28 03:59:24,147 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=157, Invalid=2000, Unknown=5, NotChecked=0, Total=2162 [2024-11-28 03:59:24,147 INFO L87 Difference]: Start difference. First operand 159 states and 179 transitions. Second operand has 47 states, 47 states have (on average 2.4468085106382977) internal successors, (115), 45 states have internal predecessors, (115), 1 states have call successors, (1), 1 states have call predecessors, (1), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) [2024-11-28 03:59:25,847 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 03:59:25,847 INFO L93 Difference]: Finished difference Result 162 states and 182 transitions. [2024-11-28 03:59:25,847 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2024-11-28 03:59:25,848 INFO L78 Accepts]: Start accepts. Automaton has has 47 states, 47 states have (on average 2.4468085106382977) internal successors, (115), 45 states have internal predecessors, (115), 1 states have call successors, (1), 1 states have call predecessors, (1), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) Word has length 45 [2024-11-28 03:59:25,848 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 03:59:25,848 INFO L225 Difference]: With dead ends: 162 [2024-11-28 03:59:25,849 INFO L226 Difference]: Without dead ends: 162 [2024-11-28 03:59:25,849 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 118 GetRequests, 63 SyntacticMatches, 0 SemanticMatches, 55 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 580 ImplicationChecksByTransitivity, 3.3s TimeCoverageRelationStatistics Valid=260, Invalid=2927, Unknown=5, NotChecked=0, Total=3192 [2024-11-28 03:59:25,850 INFO L435 NwaCegarLoop]: 51 mSDtfsCounter, 43 mSDsluCounter, 803 mSDsCounter, 0 mSdLazyCounter, 929 mSolverCounterSat, 17 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 43 SdHoareTripleChecker+Valid, 854 SdHoareTripleChecker+Invalid, 946 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 17 IncrementalHoareTripleChecker+Valid, 929 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.1s IncrementalHoareTripleChecker+Time [2024-11-28 03:59:25,850 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [43 Valid, 854 Invalid, 946 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [17 Valid, 929 Invalid, 0 Unknown, 0 Unchecked, 1.1s Time] [2024-11-28 03:59:25,850 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 162 states. [2024-11-28 03:59:25,853 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 162 to 162. [2024-11-28 03:59:25,853 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 162 states, 139 states have (on average 1.2517985611510791) internal successors, (174), 156 states have internal predecessors, (174), 4 states have call successors, (4), 1 states have call predecessors, (4), 1 states have return successors, (4), 4 states have call predecessors, (4), 4 states have call successors, (4) [2024-11-28 03:59:25,854 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 162 states to 162 states and 182 transitions. [2024-11-28 03:59:25,854 INFO L78 Accepts]: Start accepts. Automaton has 162 states and 182 transitions. Word has length 45 [2024-11-28 03:59:25,854 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 03:59:25,854 INFO L471 AbstractCegarLoop]: Abstraction has 162 states and 182 transitions. [2024-11-28 03:59:25,855 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 47 states, 47 states have (on average 2.4468085106382977) internal successors, (115), 45 states have internal predecessors, (115), 1 states have call successors, (1), 1 states have call predecessors, (1), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) [2024-11-28 03:59:25,855 INFO L276 IsEmpty]: Start isEmpty. Operand 162 states and 182 transitions. [2024-11-28 03:59:25,855 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2024-11-28 03:59:25,855 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 03:59:25,855 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 03:59:25,867 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3d345d57-71d6-4e9e-9140-a659b2e77150/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Ended with exit code 0 [2024-11-28 03:59:26,056 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable33,13 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3d345d57-71d6-4e9e-9140-a659b2e77150/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-28 03:59:26,056 INFO L396 AbstractCegarLoop]: === Iteration 35 === Targeting ULTIMATE.startErr20REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [alloc_and_zeroErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, alloc_and_zeroErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 41 more)] === [2024-11-28 03:59:26,056 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 03:59:26,056 INFO L85 PathProgramCache]: Analyzing trace with hash 803565611, now seen corresponding path program 1 times [2024-11-28 03:59:26,056 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 03:59:26,056 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2017091310] [2024-11-28 03:59:26,056 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 03:59:26,056 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 03:59:26,083 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 03:59:27,033 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 1 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-28 03:59:27,033 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 03:59:27,033 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2017091310] [2024-11-28 03:59:27,034 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2017091310] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-28 03:59:27,034 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1532271968] [2024-11-28 03:59:27,034 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 03:59:27,034 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-28 03:59:27,034 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3d345d57-71d6-4e9e-9140-a659b2e77150/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 03:59:27,035 INFO L229 MonitoredProcess]: Starting monitored process 14 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3d345d57-71d6-4e9e-9140-a659b2e77150/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-28 03:59:27,037 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3d345d57-71d6-4e9e-9140-a659b2e77150/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Waiting until timeout for monitored process [2024-11-28 03:59:27,257 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 03:59:27,259 INFO L256 TraceCheckSpWp]: Trace formula consists of 353 conjuncts, 47 conjuncts are in the unsatisfiable core [2024-11-28 03:59:27,262 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-28 03:59:27,361 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-11-28 03:59:27,361 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 11 treesize of output 11 [2024-11-28 03:59:27,412 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 1 [2024-11-28 03:59:27,505 INFO L349 Elim1Store]: treesize reduction 21, result has 19.2 percent of original size [2024-11-28 03:59:27,505 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 31 treesize of output 32 [2024-11-28 03:59:27,559 INFO L349 Elim1Store]: treesize reduction 21, result has 19.2 percent of original size [2024-11-28 03:59:27,559 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 42 treesize of output 41 [2024-11-28 03:59:27,731 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 13 [2024-11-28 03:59:27,735 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 5 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-28 03:59:27,736 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-28 03:59:27,852 INFO L349 Elim1Store]: treesize reduction 5, result has 70.6 percent of original size [2024-11-28 03:59:27,852 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 21 treesize of output 20 [2024-11-28 03:59:27,856 WARN L851 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_1985 (Array Int Int))) (= (select (select (store |c_#memory_$Pointer$#0.base| |c_ULTIMATE.start_create_#t~mem12#1.base| v_ArrVal_1985) |c_ULTIMATE.start_create_~sll~0#1.base|) (+ |c_ULTIMATE.start_create_~sll~0#1.offset| 8)) |c_ULTIMATE.start_create_#t~mem12#1.base|)) is different from false [2024-11-28 03:59:27,930 WARN L851 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_1985 (Array Int Int)) (v_ArrVal_1984 (Array Int Int))) (let ((.cse0 (store |c_#memory_$Pointer$#0.base| |c_ULTIMATE.start_create_#t~mem11#1.base| v_ArrVal_1984))) (let ((.cse1 (select (select .cse0 |c_ULTIMATE.start_create_~now~0#1.base|) (+ 8 |c_ULTIMATE.start_create_~now~0#1.offset|)))) (= (select (select (store .cse0 .cse1 v_ArrVal_1985) |c_ULTIMATE.start_create_~sll~0#1.base|) (+ |c_ULTIMATE.start_create_~sll~0#1.offset| 8)) .cse1)))) is different from false [2024-11-28 03:59:28,055 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-11-28 03:59:28,055 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 63 treesize of output 44 [2024-11-28 03:59:28,069 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-11-28 03:59:28,070 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 420 treesize of output 317 [2024-11-28 03:59:28,085 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-11-28 03:59:28,086 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 82 treesize of output 63 [2024-11-28 03:59:28,095 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 80 treesize of output 68 [2024-11-28 03:59:28,340 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1532271968] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-28 03:59:28,341 INFO L185 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2024-11-28 03:59:28,341 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [20, 15] total 29 [2024-11-28 03:59:28,341 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [683725532] [2024-11-28 03:59:28,341 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2024-11-28 03:59:28,341 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 30 states [2024-11-28 03:59:28,341 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 03:59:28,342 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 30 interpolants. [2024-11-28 03:59:28,343 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=128, Invalid=1119, Unknown=21, NotChecked=138, Total=1406 [2024-11-28 03:59:28,343 INFO L87 Difference]: Start difference. First operand 162 states and 182 transitions. Second operand has 30 states, 29 states have (on average 2.586206896551724) internal successors, (75), 26 states have internal predecessors, (75), 3 states have call successors, (3), 2 states have call predecessors, (3), 3 states have return successors, (4), 4 states have call predecessors, (4), 3 states have call successors, (4) [2024-11-28 03:59:29,203 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 03:59:29,203 INFO L93 Difference]: Finished difference Result 165 states and 187 transitions. [2024-11-28 03:59:29,203 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2024-11-28 03:59:29,203 INFO L78 Accepts]: Start accepts. Automaton has has 30 states, 29 states have (on average 2.586206896551724) internal successors, (75), 26 states have internal predecessors, (75), 3 states have call successors, (3), 2 states have call predecessors, (3), 3 states have return successors, (4), 4 states have call predecessors, (4), 3 states have call successors, (4) Word has length 46 [2024-11-28 03:59:29,204 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 03:59:29,204 INFO L225 Difference]: With dead ends: 165 [2024-11-28 03:59:29,205 INFO L226 Difference]: Without dead ends: 165 [2024-11-28 03:59:29,205 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 99 GetRequests, 52 SyntacticMatches, 1 SemanticMatches, 46 ConstructedPredicates, 2 IntricatePredicates, 0 DeprecatedPredicates, 432 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=223, Invalid=1834, Unknown=21, NotChecked=178, Total=2256 [2024-11-28 03:59:29,206 INFO L435 NwaCegarLoop]: 63 mSDtfsCounter, 20 mSDsluCounter, 962 mSDsCounter, 0 mSdLazyCounter, 880 mSolverCounterSat, 8 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 20 SdHoareTripleChecker+Valid, 1025 SdHoareTripleChecker+Invalid, 888 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 8 IncrementalHoareTripleChecker+Valid, 880 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2024-11-28 03:59:29,206 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [20 Valid, 1025 Invalid, 888 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [8 Valid, 880 Invalid, 0 Unknown, 0 Unchecked, 0.6s Time] [2024-11-28 03:59:29,207 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 165 states. [2024-11-28 03:59:29,210 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 165 to 165. [2024-11-28 03:59:29,210 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 165 states, 142 states have (on average 1.2605633802816902) internal successors, (179), 159 states have internal predecessors, (179), 4 states have call successors, (4), 1 states have call predecessors, (4), 1 states have return successors, (4), 4 states have call predecessors, (4), 4 states have call successors, (4) [2024-11-28 03:59:29,211 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 165 states to 165 states and 187 transitions. [2024-11-28 03:59:29,211 INFO L78 Accepts]: Start accepts. Automaton has 165 states and 187 transitions. Word has length 46 [2024-11-28 03:59:29,211 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 03:59:29,212 INFO L471 AbstractCegarLoop]: Abstraction has 165 states and 187 transitions. [2024-11-28 03:59:29,212 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 30 states, 29 states have (on average 2.586206896551724) internal successors, (75), 26 states have internal predecessors, (75), 3 states have call successors, (3), 2 states have call predecessors, (3), 3 states have return successors, (4), 4 states have call predecessors, (4), 3 states have call successors, (4) [2024-11-28 03:59:29,212 INFO L276 IsEmpty]: Start isEmpty. Operand 165 states and 187 transitions. [2024-11-28 03:59:29,212 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2024-11-28 03:59:29,213 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 03:59:29,213 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 03:59:29,225 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3d345d57-71d6-4e9e-9140-a659b2e77150/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Ended with exit code 0 [2024-11-28 03:59:29,413 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable34,14 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3d345d57-71d6-4e9e-9140-a659b2e77150/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-28 03:59:29,413 INFO L396 AbstractCegarLoop]: === Iteration 36 === Targeting ULTIMATE.startErr21REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [alloc_and_zeroErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, alloc_and_zeroErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 41 more)] === [2024-11-28 03:59:29,414 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 03:59:29,414 INFO L85 PathProgramCache]: Analyzing trace with hash 803565612, now seen corresponding path program 1 times [2024-11-28 03:59:29,414 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 03:59:29,414 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1264535033] [2024-11-28 03:59:29,414 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 03:59:29,414 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 03:59:29,440 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 03:59:30,598 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 5 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-28 03:59:30,598 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 03:59:30,598 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1264535033] [2024-11-28 03:59:30,598 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1264535033] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-28 03:59:30,598 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [928508167] [2024-11-28 03:59:30,598 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 03:59:30,598 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-28 03:59:30,599 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3d345d57-71d6-4e9e-9140-a659b2e77150/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 03:59:30,601 INFO L229 MonitoredProcess]: Starting monitored process 15 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3d345d57-71d6-4e9e-9140-a659b2e77150/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-28 03:59:30,603 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3d345d57-71d6-4e9e-9140-a659b2e77150/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Waiting until timeout for monitored process [2024-11-28 03:59:30,849 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 03:59:30,852 INFO L256 TraceCheckSpWp]: Trace formula consists of 353 conjuncts, 61 conjuncts are in the unsatisfiable core [2024-11-28 03:59:30,854 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-28 03:59:31,031 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-11-28 03:59:31,032 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 11 treesize of output 11 [2024-11-28 03:59:31,094 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 9 [2024-11-28 03:59:31,103 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 1 [2024-11-28 03:59:31,233 INFO L349 Elim1Store]: treesize reduction 21, result has 19.2 percent of original size [2024-11-28 03:59:31,233 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 51 treesize of output 48 [2024-11-28 03:59:31,238 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 13 [2024-11-28 03:59:31,320 INFO L349 Elim1Store]: treesize reduction 21, result has 19.2 percent of original size [2024-11-28 03:59:31,320 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 62 treesize of output 57 [2024-11-28 03:59:31,332 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 13 [2024-11-28 03:59:31,587 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 13 [2024-11-28 03:59:31,593 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 3 [2024-11-28 03:59:31,679 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 5 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-28 03:59:31,679 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-28 03:59:32,000 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-11-28 03:59:32,001 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 44 treesize of output 48 [2024-11-28 03:59:32,035 WARN L851 $PredicateComparison]: unable to prove that (let ((.cse0 (+ |c_ULTIMATE.start_create_~sll~0#1.offset| 8))) (and (forall ((v_ArrVal_2115 (Array Int Int))) (= |c_ULTIMATE.start_create_#t~mem12#1.base| (select (select (store |c_#memory_$Pointer$#0.base| |c_ULTIMATE.start_create_#t~mem12#1.base| v_ArrVal_2115) |c_ULTIMATE.start_create_~sll~0#1.base|) .cse0))) (forall ((v_prenex_4 (Array Int Int))) (< (select (select (store |c_#memory_$Pointer$#0.offset| |c_ULTIMATE.start_create_#t~mem12#1.base| v_prenex_4) |c_ULTIMATE.start_create_~sll~0#1.base|) .cse0) 1)) (forall ((v_ArrVal_2116 (Array Int Int))) (<= 0 (select (select (store |c_#memory_$Pointer$#0.offset| |c_ULTIMATE.start_create_#t~mem12#1.base| v_ArrVal_2116) |c_ULTIMATE.start_create_~sll~0#1.base|) .cse0))))) is different from false [2024-11-28 03:59:32,230 WARN L851 $PredicateComparison]: unable to prove that (let ((.cse0 (+ 8 |c_ULTIMATE.start_create_~now~0#1.offset|)) (.cse1 (+ |c_ULTIMATE.start_create_~sll~0#1.offset| 8))) (and (forall ((v_ArrVal_2116 (Array Int Int)) (v_ArrVal_2114 (Array Int Int)) (v_ArrVal_2113 (Array Int Int))) (<= 0 (select (select (store (store |c_#memory_$Pointer$#0.offset| |c_ULTIMATE.start_create_#t~mem11#1.base| v_ArrVal_2113) (select (select (store |c_#memory_$Pointer$#0.base| |c_ULTIMATE.start_create_#t~mem11#1.base| v_ArrVal_2114) |c_ULTIMATE.start_create_~now~0#1.base|) .cse0) v_ArrVal_2116) |c_ULTIMATE.start_create_~sll~0#1.base|) .cse1))) (forall ((v_ArrVal_2115 (Array Int Int)) (v_ArrVal_2114 (Array Int Int))) (let ((.cse2 (store |c_#memory_$Pointer$#0.base| |c_ULTIMATE.start_create_#t~mem11#1.base| v_ArrVal_2114))) (let ((.cse3 (select (select .cse2 |c_ULTIMATE.start_create_~now~0#1.base|) .cse0))) (= (select (select (store .cse2 .cse3 v_ArrVal_2115) |c_ULTIMATE.start_create_~sll~0#1.base|) .cse1) .cse3)))) (forall ((v_ArrVal_2114 (Array Int Int)) (v_ArrVal_2113 (Array Int Int)) (v_prenex_4 (Array Int Int))) (< (select (select (store (store |c_#memory_$Pointer$#0.offset| |c_ULTIMATE.start_create_#t~mem11#1.base| v_ArrVal_2113) (select (select (store |c_#memory_$Pointer$#0.base| |c_ULTIMATE.start_create_#t~mem11#1.base| v_ArrVal_2114) |c_ULTIMATE.start_create_~now~0#1.base|) .cse0) v_prenex_4) |c_ULTIMATE.start_create_~sll~0#1.base|) .cse1) 1)))) is different from false [2024-11-28 03:59:32,250 WARN L851 $PredicateComparison]: unable to prove that (let ((.cse1 (+ 8 |c_ULTIMATE.start_create_~now~0#1.offset|))) (let ((.cse0 (select (select |c_#memory_$Pointer$#0.base| |c_ULTIMATE.start_create_~now~0#1.base|) .cse1)) (.cse2 (+ |c_ULTIMATE.start_create_~sll~0#1.offset| 8))) (and (forall ((v_ArrVal_2116 (Array Int Int)) (v_ArrVal_2114 (Array Int Int)) (v_ArrVal_2113 (Array Int Int))) (<= 0 (select (select (store (store |c_#memory_$Pointer$#0.offset| .cse0 v_ArrVal_2113) (select (select (store |c_#memory_$Pointer$#0.base| .cse0 v_ArrVal_2114) |c_ULTIMATE.start_create_~now~0#1.base|) .cse1) v_ArrVal_2116) |c_ULTIMATE.start_create_~sll~0#1.base|) .cse2))) (forall ((v_ArrVal_2115 (Array Int Int)) (v_ArrVal_2114 (Array Int Int))) (let ((.cse4 (store |c_#memory_$Pointer$#0.base| .cse0 v_ArrVal_2114))) (let ((.cse3 (select (select .cse4 |c_ULTIMATE.start_create_~now~0#1.base|) .cse1))) (= .cse3 (select (select (store .cse4 .cse3 v_ArrVal_2115) |c_ULTIMATE.start_create_~sll~0#1.base|) .cse2))))) (forall ((v_ArrVal_2114 (Array Int Int)) (v_ArrVal_2113 (Array Int Int)) (v_prenex_4 (Array Int Int))) (< (select (select (store (store |c_#memory_$Pointer$#0.offset| .cse0 v_ArrVal_2113) (select (select (store |c_#memory_$Pointer$#0.base| .cse0 v_ArrVal_2114) |c_ULTIMATE.start_create_~now~0#1.base|) .cse1) v_prenex_4) |c_ULTIMATE.start_create_~sll~0#1.base|) .cse2) 1))))) is different from false [2024-11-28 03:59:32,286 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-11-28 03:59:32,286 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 44 treesize of output 45 [2024-11-28 03:59:32,294 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-11-28 03:59:32,294 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 34 treesize of output 35 [2024-11-28 03:59:32,299 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 60 treesize of output 48 [2024-11-28 03:59:32,314 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-11-28 03:59:32,315 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 200 treesize of output 187 [2024-11-28 03:59:32,325 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 62 [2024-11-28 03:59:32,336 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 88 treesize of output 76 [2024-11-28 03:59:32,343 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 54 treesize of output 46 [2024-11-28 03:59:32,425 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-11-28 03:59:32,426 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 44 treesize of output 45 [2024-11-28 03:59:32,435 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-11-28 03:59:32,435 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 36 treesize of output 37 [2024-11-28 03:59:32,439 INFO L173 IndexEqualityManager]: detected equality via solver [2024-11-28 03:59:32,442 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 22 [2024-11-28 03:59:32,446 INFO L173 IndexEqualityManager]: detected equality via solver [2024-11-28 03:59:32,450 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-11-28 03:59:32,451 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 10 [2024-11-28 03:59:32,466 INFO L349 Elim1Store]: treesize reduction 9, result has 10.0 percent of original size [2024-11-28 03:59:32,466 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 63 treesize of output 1 [2024-11-28 03:59:32,614 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [928508167] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-28 03:59:32,614 INFO L185 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2024-11-28 03:59:32,614 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 15] total 32 [2024-11-28 03:59:32,614 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1051999839] [2024-11-28 03:59:32,614 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2024-11-28 03:59:32,615 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 33 states [2024-11-28 03:59:32,615 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 03:59:32,615 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 33 interpolants. [2024-11-28 03:59:32,616 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=143, Invalid=1410, Unknown=19, NotChecked=234, Total=1806 [2024-11-28 03:59:32,616 INFO L87 Difference]: Start difference. First operand 165 states and 187 transitions. Second operand has 33 states, 32 states have (on average 2.5625) internal successors, (82), 29 states have internal predecessors, (82), 3 states have call successors, (3), 2 states have call predecessors, (3), 4 states have return successors, (4), 4 states have call predecessors, (4), 3 states have call successors, (4) [2024-11-28 03:59:33,741 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 03:59:33,741 INFO L93 Difference]: Finished difference Result 169 states and 190 transitions. [2024-11-28 03:59:33,741 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2024-11-28 03:59:33,742 INFO L78 Accepts]: Start accepts. Automaton has has 33 states, 32 states have (on average 2.5625) internal successors, (82), 29 states have internal predecessors, (82), 3 states have call successors, (3), 2 states have call predecessors, (3), 4 states have return successors, (4), 4 states have call predecessors, (4), 3 states have call successors, (4) Word has length 46 [2024-11-28 03:59:33,742 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 03:59:33,743 INFO L225 Difference]: With dead ends: 169 [2024-11-28 03:59:33,743 INFO L226 Difference]: Without dead ends: 169 [2024-11-28 03:59:33,744 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 97 GetRequests, 47 SyntacticMatches, 1 SemanticMatches, 49 ConstructedPredicates, 3 IntricatePredicates, 0 DeprecatedPredicates, 628 ImplicationChecksByTransitivity, 1.7s TimeCoverageRelationStatistics Valid=229, Invalid=2020, Unknown=19, NotChecked=282, Total=2550 [2024-11-28 03:59:33,744 INFO L435 NwaCegarLoop]: 69 mSDtfsCounter, 27 mSDsluCounter, 1144 mSDsCounter, 0 mSdLazyCounter, 830 mSolverCounterSat, 9 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.7s Time, 0 mProtectedPredicate, 0 mProtectedAction, 27 SdHoareTripleChecker+Valid, 1213 SdHoareTripleChecker+Invalid, 839 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 9 IncrementalHoareTripleChecker+Valid, 830 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.7s IncrementalHoareTripleChecker+Time [2024-11-28 03:59:33,744 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [27 Valid, 1213 Invalid, 839 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [9 Valid, 830 Invalid, 0 Unknown, 0 Unchecked, 0.7s Time] [2024-11-28 03:59:33,745 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 169 states. [2024-11-28 03:59:33,748 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 169 to 169. [2024-11-28 03:59:33,749 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 169 states, 146 states have (on average 1.2465753424657535) internal successors, (182), 163 states have internal predecessors, (182), 4 states have call successors, (4), 1 states have call predecessors, (4), 1 states have return successors, (4), 4 states have call predecessors, (4), 4 states have call successors, (4) [2024-11-28 03:59:33,750 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 169 states to 169 states and 190 transitions. [2024-11-28 03:59:33,750 INFO L78 Accepts]: Start accepts. Automaton has 169 states and 190 transitions. Word has length 46 [2024-11-28 03:59:33,750 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 03:59:33,750 INFO L471 AbstractCegarLoop]: Abstraction has 169 states and 190 transitions. [2024-11-28 03:59:33,751 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 33 states, 32 states have (on average 2.5625) internal successors, (82), 29 states have internal predecessors, (82), 3 states have call successors, (3), 2 states have call predecessors, (3), 4 states have return successors, (4), 4 states have call predecessors, (4), 3 states have call successors, (4) [2024-11-28 03:59:33,751 INFO L276 IsEmpty]: Start isEmpty. Operand 169 states and 190 transitions. [2024-11-28 03:59:33,751 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2024-11-28 03:59:33,751 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 03:59:33,752 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 03:59:33,765 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3d345d57-71d6-4e9e-9140-a659b2e77150/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Ended with exit code 0 [2024-11-28 03:59:33,952 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 15 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3d345d57-71d6-4e9e-9140-a659b2e77150/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable35 [2024-11-28 03:59:33,952 INFO L396 AbstractCegarLoop]: === Iteration 37 === Targeting ULTIMATE.startErr41ASSERT_VIOLATIONMEMORY_LEAK === [alloc_and_zeroErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, alloc_and_zeroErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 41 more)] === [2024-11-28 03:59:33,953 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 03:59:33,953 INFO L85 PathProgramCache]: Analyzing trace with hash 130104593, now seen corresponding path program 1 times [2024-11-28 03:59:33,953 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 03:59:33,953 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [361442392] [2024-11-28 03:59:33,953 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 03:59:33,953 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 03:59:33,977 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 03:59:36,000 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-28 03:59:36,000 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 03:59:36,001 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [361442392] [2024-11-28 03:59:36,001 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [361442392] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-28 03:59:36,001 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1195846997] [2024-11-28 03:59:36,001 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 03:59:36,001 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-28 03:59:36,001 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3d345d57-71d6-4e9e-9140-a659b2e77150/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 03:59:36,003 INFO L229 MonitoredProcess]: Starting monitored process 16 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3d345d57-71d6-4e9e-9140-a659b2e77150/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-28 03:59:36,004 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3d345d57-71d6-4e9e-9140-a659b2e77150/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (16)] Waiting until timeout for monitored process [2024-11-28 03:59:36,283 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 03:59:36,286 INFO L256 TraceCheckSpWp]: Trace formula consists of 295 conjuncts, 76 conjuncts are in the unsatisfiable core [2024-11-28 03:59:36,289 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-28 03:59:36,443 INFO L349 Elim1Store]: treesize reduction 15, result has 25.0 percent of original size [2024-11-28 03:59:36,443 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 2 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 20 treesize of output 27 [2024-11-28 03:59:36,563 INFO L349 Elim1Store]: treesize reduction 44, result has 20.0 percent of original size [2024-11-28 03:59:36,563 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 2 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 23 treesize of output 37 [2024-11-28 03:59:36,688 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 1 [2024-11-28 03:59:36,768 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 24 [2024-11-28 03:59:37,287 INFO L349 Elim1Store]: treesize reduction 92, result has 17.1 percent of original size [2024-11-28 03:59:37,287 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 2 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 31 treesize of output 80 [2024-11-28 03:59:37,423 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-11-28 03:59:37,443 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-11-28 03:59:37,444 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 4 select indices, 4 select index equivalence classes, 3 disjoint index pairs (out of 6 index pairs), introduced 4 new quantified variables, introduced 3 case distinctions, treesize of input 77 treesize of output 63 [2024-11-28 03:59:52,266 WARN L851 $PredicateComparison]: unable to prove that (and (<= 0 |c_ULTIMATE.start_destroy_~l#1.offset|) (= (select |c_ULTIMATE.start_main_old_#valid#1| |c_ULTIMATE.start_destroy_~l#1.base|) 0) (let ((.cse3 (select |c_#valid| |c_ULTIMATE.start_destroy_~l#1.base|)) (.cse61 (= |c_ULTIMATE.start_destroy_~l#1.base| 0)) (.cse26 (store |c_ULTIMATE.start_main_old_#valid#1| |c_ULTIMATE.start_destroy_~l#1.base| 0))) (let ((.cse21 (exists ((|v_ULTIMATE.start_destroy_#t~mem18#1.base_14| Int)) (and (= (select |c_ULTIMATE.start_main_old_#valid#1| |v_ULTIMATE.start_destroy_#t~mem18#1.base_14|) 0) (= |c_#valid| (store .cse26 |v_ULTIMATE.start_destroy_#t~mem18#1.base_14| 0)) (not (= |v_ULTIMATE.start_destroy_#t~mem18#1.base_14| 0)) (= (select (store (store |c_ULTIMATE.start_main_old_#valid#1| |v_ULTIMATE.start_destroy_#t~mem18#1.base_14| 1) |c_ULTIMATE.start_destroy_~l#1.base| 0) |v_ULTIMATE.start_destroy_#t~mem18#1.base_14|) 1)))) (.cse2 (not (= |c_ULTIMATE.start_destroy_~l#1.offset| 16))) (.cse8 (not .cse61)) (.cse4 (store |c_ULTIMATE.start_main_old_#valid#1| |c_ULTIMATE.start_destroy_~l#1.base| .cse3)) (.cse0 (not (= |c_ULTIMATE.start_destroy_~l#1.offset| 0)))) (or (and .cse0 (let ((.cse13 (exists ((|v_ULTIMATE.start_destroy_#t~mem18#1.base_14| Int)) (and (= |c_#valid| (store .cse26 |v_ULTIMATE.start_destroy_#t~mem18#1.base_14| 0)) (= (select .cse26 |v_ULTIMATE.start_destroy_#t~mem18#1.base_14|) 1)))) (.cse43 (exists ((|v_ULTIMATE.start_destroy_#t~mem18#1.base_14| Int)) (and (= (select |c_ULTIMATE.start_main_old_#valid#1| |v_ULTIMATE.start_destroy_#t~mem18#1.base_14|) 0) (= |c_#valid| (store .cse26 |v_ULTIMATE.start_destroy_#t~mem18#1.base_14| 0)) (= (select (store (store |c_ULTIMATE.start_main_old_#valid#1| |v_ULTIMATE.start_destroy_#t~mem18#1.base_14| 1) |c_ULTIMATE.start_destroy_~l#1.base| 0) |v_ULTIMATE.start_destroy_#t~mem18#1.base_14|) 1)))) (.cse41 (exists ((|v_ULTIMATE.start_destroy_#t~mem18#1.base_14| Int) (v_arrayElimCell_132 Int)) (let ((.cse54 (store (store |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_132 (select |c_#valid| v_arrayElimCell_132)) |c_ULTIMATE.start_destroy_~l#1.base| 0))) (and (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_132) 0) (not (= |c_ULTIMATE.start_destroy_~l#1.base| v_arrayElimCell_132)) (= (select .cse54 |v_ULTIMATE.start_destroy_#t~mem18#1.base_14|) 1) (= |c_#valid| (store .cse54 |v_ULTIMATE.start_destroy_#t~mem18#1.base_14| 0))))))) (let ((.cse1 (and .cse41 .cse8)) (.cse23 (and .cse8 .cse43)) (.cse24 (and .cse8 .cse13)) (.cse18 (store |c_ULTIMATE.start_main_old_#valid#1| |c_ULTIMATE.start_destroy_~l#1.base| 1))) (or .cse1 (and .cse2 (let ((.cse11 (exists ((v_arrayElimCell_130 Int)) (and (= (select (store .cse18 v_arrayElimCell_130 0) |c_ULTIMATE.start_destroy_~l#1.base|) 1) (= |c_#valid| (store (store |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_130 0) |c_ULTIMATE.start_destroy_~l#1.base| 0)) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_130) 0)))) (.cse20 (exists ((v_arrayElimCell_130 Int) (v_arrayElimCell_132 Int)) (let ((.cse46 (select |c_#valid| v_arrayElimCell_132))) (let ((.cse48 (store |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_132 .cse46))) (let ((.cse47 (store (store .cse48 |c_ULTIMATE.start_destroy_~l#1.base| 1) v_arrayElimCell_130 0))) (and (= .cse46 (select .cse47 v_arrayElimCell_132)) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_132) 0) (= |c_#valid| (store (store .cse48 v_arrayElimCell_130 0) |c_ULTIMATE.start_destroy_~l#1.base| 0)) (= (select .cse47 |c_ULTIMATE.start_destroy_~l#1.base|) 1) (not (= v_arrayElimCell_132 v_arrayElimCell_130)))))))) (.cse15 (exists ((|v_ULTIMATE.start_destroy_#t~mem18#1.base_14| Int) (v_arrayElimCell_130 Int)) (let ((.cse45 (store .cse4 v_arrayElimCell_130 0))) (and (= (select .cse45 |v_ULTIMATE.start_destroy_#t~mem18#1.base_14|) 1) (= |c_#valid| (store .cse45 |v_ULTIMATE.start_destroy_#t~mem18#1.base_14| 0)) (not (= |c_ULTIMATE.start_destroy_~l#1.base| v_arrayElimCell_130)))))) (.cse12 (exists ((|v_ULTIMATE.start_destroy_#t~mem18#1.base_14| Int) (v_arrayElimCell_130 Int)) (let ((.cse44 (store .cse4 v_arrayElimCell_130 0))) (and (= (select .cse44 |v_ULTIMATE.start_destroy_#t~mem18#1.base_14|) 1) (= |c_#valid| (store .cse44 |v_ULTIMATE.start_destroy_#t~mem18#1.base_14| 0)) (not (= |c_ULTIMATE.start_destroy_~l#1.base| v_arrayElimCell_130)) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_130) 0))))) (.cse9 (exists ((v_arrayElimCell_130 Int)) (and (= (select (store .cse18 v_arrayElimCell_130 0) |c_ULTIMATE.start_destroy_~l#1.base|) 1) (= |c_#valid| (store (store |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_130 0) |c_ULTIMATE.start_destroy_~l#1.base| 0)))))) (or .cse1 (exists ((|v_ULTIMATE.start_destroy_#t~mem18#1.base_14| Int) (v_arrayElimCell_130 Int)) (and (= (select |c_ULTIMATE.start_main_old_#valid#1| |v_ULTIMATE.start_destroy_#t~mem18#1.base_14|) 0) (= (select (store (store (store |c_ULTIMATE.start_main_old_#valid#1| |v_ULTIMATE.start_destroy_#t~mem18#1.base_14| 1) |c_ULTIMATE.start_destroy_~l#1.base| .cse3) v_arrayElimCell_130 0) |v_ULTIMATE.start_destroy_#t~mem18#1.base_14|) 1) (= |c_#valid| (store (store .cse4 v_arrayElimCell_130 0) |v_ULTIMATE.start_destroy_#t~mem18#1.base_14| 0)) (not (= |c_ULTIMATE.start_destroy_~l#1.base| v_arrayElimCell_130)) (not (= v_arrayElimCell_130 0)) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_130) 0))) (exists ((|v_ULTIMATE.start_destroy_#t~mem18#1.base_14| Int) (v_arrayElimCell_130 Int)) (and (= (select |c_ULTIMATE.start_main_old_#valid#1| |v_ULTIMATE.start_destroy_#t~mem18#1.base_14|) 0) (= (select (store (store (store |c_ULTIMATE.start_main_old_#valid#1| |v_ULTIMATE.start_destroy_#t~mem18#1.base_14| 1) |c_ULTIMATE.start_destroy_~l#1.base| .cse3) v_arrayElimCell_130 0) |v_ULTIMATE.start_destroy_#t~mem18#1.base_14|) 1) (= |c_#valid| (store (store .cse4 v_arrayElimCell_130 0) |v_ULTIMATE.start_destroy_#t~mem18#1.base_14| 0)) (not (= |v_ULTIMATE.start_destroy_#t~mem18#1.base_14| 0)) (not (= |c_ULTIMATE.start_destroy_~l#1.base| v_arrayElimCell_130)))) (exists ((v_arrayElimCell_130 Int) (v_arrayElimCell_132 Int)) (let ((.cse5 (select |c_#valid| v_arrayElimCell_132))) (let ((.cse7 (store |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_132 .cse5))) (let ((.cse6 (store (store .cse7 |c_ULTIMATE.start_destroy_~l#1.base| 1) v_arrayElimCell_130 0))) (and (not (= v_arrayElimCell_132 0)) (= .cse5 (select .cse6 v_arrayElimCell_132)) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_132) 0) (= |c_#valid| (store (store .cse7 v_arrayElimCell_130 0) |c_ULTIMATE.start_destroy_~l#1.base| 0)) (= (select .cse6 |c_ULTIMATE.start_destroy_~l#1.base|) 1) (not (= v_arrayElimCell_132 v_arrayElimCell_130))))))) (and .cse8 .cse9) (exists ((v_arrayElimCell_130 Int) (v_arrayElimCell_133 Int)) (let ((.cse10 (store |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_133 (select |c_#valid| v_arrayElimCell_133)))) (and (= |c_#valid| (store (store .cse10 v_arrayElimCell_130 0) |c_ULTIMATE.start_destroy_~l#1.base| 0)) (= (select (store (store .cse10 |c_ULTIMATE.start_destroy_~l#1.base| 1) v_arrayElimCell_130 0) |c_ULTIMATE.start_destroy_~l#1.base|) 1) (not (= v_arrayElimCell_133 0)) (not (= v_arrayElimCell_133 v_arrayElimCell_130)) (not (= |c_ULTIMATE.start_destroy_~l#1.base| v_arrayElimCell_133)) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_133) 0)))) (and (or .cse11 .cse12 .cse13) .cse8) (and .cse11 .cse8) (exists ((|v_ULTIMATE.start_destroy_#t~mem18#1.base_14| Int) (v_arrayElimCell_133 Int)) (let ((.cse14 (store |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_133 (select |c_#valid| v_arrayElimCell_133)))) (and (= |c_#valid| (store (store .cse14 |c_ULTIMATE.start_destroy_~l#1.base| 0) |v_ULTIMATE.start_destroy_#t~mem18#1.base_14| 0)) (= (select |c_ULTIMATE.start_main_old_#valid#1| |v_ULTIMATE.start_destroy_#t~mem18#1.base_14|) 0) (not (= v_arrayElimCell_133 0)) (= (select (store (store .cse14 |v_ULTIMATE.start_destroy_#t~mem18#1.base_14| 1) |c_ULTIMATE.start_destroy_~l#1.base| 0) |v_ULTIMATE.start_destroy_#t~mem18#1.base_14|) 1) (not (= v_arrayElimCell_133 |v_ULTIMATE.start_destroy_#t~mem18#1.base_14|)) (not (= |c_ULTIMATE.start_destroy_~l#1.base| v_arrayElimCell_133)) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_133) 0)))) (and (or .cse15 .cse13 .cse9) .cse8) (exists ((|v_ULTIMATE.start_destroy_#t~mem18#1.base_14| Int) (v_arrayElimCell_130 Int) (v_arrayElimCell_132 Int)) (let ((.cse16 (store (store (store |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_132 (select |c_#valid| v_arrayElimCell_132)) |c_ULTIMATE.start_destroy_~l#1.base| .cse3) v_arrayElimCell_130 0))) (and (not (= v_arrayElimCell_132 0)) (= (select .cse16 |v_ULTIMATE.start_destroy_#t~mem18#1.base_14|) 1) (not (= |c_ULTIMATE.start_destroy_~l#1.base| v_arrayElimCell_130)) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_132) 0) (not (= |c_ULTIMATE.start_destroy_~l#1.base| v_arrayElimCell_132)) (not (= v_arrayElimCell_132 v_arrayElimCell_130)) (= |c_#valid| (store .cse16 |v_ULTIMATE.start_destroy_#t~mem18#1.base_14| 0))))) (exists ((|v_ULTIMATE.start_destroy_#t~mem18#1.base_14| Int) (v_arrayElimCell_130 Int) (v_arrayElimCell_132 Int)) (let ((.cse17 (store (store (store |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_132 (select |c_#valid| v_arrayElimCell_132)) |c_ULTIMATE.start_destroy_~l#1.base| .cse3) v_arrayElimCell_130 0))) (and (= (select .cse17 |v_ULTIMATE.start_destroy_#t~mem18#1.base_14|) 1) (not (= |c_ULTIMATE.start_destroy_~l#1.base| v_arrayElimCell_130)) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_132) 0) (not (= |c_ULTIMATE.start_destroy_~l#1.base| v_arrayElimCell_132)) (not (= v_arrayElimCell_130 0)) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_130) 0) (not (= v_arrayElimCell_132 v_arrayElimCell_130)) (= |c_#valid| (store .cse17 |v_ULTIMATE.start_destroy_#t~mem18#1.base_14| 0))))) (exists ((v_arrayElimCell_130 Int)) (and (= (select (store .cse18 v_arrayElimCell_130 0) |c_ULTIMATE.start_destroy_~l#1.base|) 1) (= |c_#valid| (store (store |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_130 0) |c_ULTIMATE.start_destroy_~l#1.base| 0)) (not (= v_arrayElimCell_130 0)) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_130) 0))) (exists ((|v_ULTIMATE.start_destroy_#t~mem18#1.base_14| Int) (v_arrayElimCell_133 Int) (v_arrayElimCell_132 Int)) (let ((.cse19 (store (store (store |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_133 (select |c_#valid| v_arrayElimCell_133)) v_arrayElimCell_132 (select |c_#valid| v_arrayElimCell_132)) |c_ULTIMATE.start_destroy_~l#1.base| 0))) (and (= (select .cse19 |v_ULTIMATE.start_destroy_#t~mem18#1.base_14|) 1) (not (= v_arrayElimCell_133 v_arrayElimCell_132)) (= |c_#valid| (store .cse19 |v_ULTIMATE.start_destroy_#t~mem18#1.base_14| 0)) (not (= v_arrayElimCell_133 0)) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_132) 0) (not (= |c_ULTIMATE.start_destroy_~l#1.base| v_arrayElimCell_132)) (not (= |c_ULTIMATE.start_destroy_~l#1.base| v_arrayElimCell_133)) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_133) 0)))) (exists ((|v_ULTIMATE.start_destroy_#t~mem18#1.base_14| Int) (v_arrayElimCell_130 Int)) (and (= (select |c_ULTIMATE.start_main_old_#valid#1| |v_ULTIMATE.start_destroy_#t~mem18#1.base_14|) 0) (= (select (store (store (store |c_ULTIMATE.start_main_old_#valid#1| |v_ULTIMATE.start_destroy_#t~mem18#1.base_14| 1) |c_ULTIMATE.start_destroy_~l#1.base| .cse3) v_arrayElimCell_130 0) |v_ULTIMATE.start_destroy_#t~mem18#1.base_14|) 1) (= |c_#valid| (store (store .cse4 v_arrayElimCell_130 0) |v_ULTIMATE.start_destroy_#t~mem18#1.base_14| 0)) (not (= |v_ULTIMATE.start_destroy_#t~mem18#1.base_14| 0)) (not (= |c_ULTIMATE.start_destroy_~l#1.base| v_arrayElimCell_130)) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_130) 0))) (and .cse20 .cse8) .cse21 (exists ((|v_ULTIMATE.start_destroy_#t~mem18#1.base_14| Int) (v_arrayElimCell_130 Int) (v_arrayElimCell_133 Int)) (let ((.cse22 (store (store (store |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_133 (select |c_#valid| v_arrayElimCell_133)) |c_ULTIMATE.start_destroy_~l#1.base| .cse3) v_arrayElimCell_130 0))) (and (not (= v_arrayElimCell_133 0)) (= (select .cse22 |v_ULTIMATE.start_destroy_#t~mem18#1.base_14|) 1) (not (= |c_ULTIMATE.start_destroy_~l#1.base| v_arrayElimCell_130)) (= |c_#valid| (store .cse22 |v_ULTIMATE.start_destroy_#t~mem18#1.base_14| 0)) (not (= v_arrayElimCell_133 v_arrayElimCell_130)) (not (= |c_ULTIMATE.start_destroy_~l#1.base| v_arrayElimCell_133)) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_130) 0) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_133) 0)))) .cse23 .cse24 (exists ((|v_ULTIMATE.start_destroy_#t~mem18#1.base_14| Int) (v_arrayElimCell_130 Int) (v_arrayElimCell_133 Int) (v_arrayElimCell_132 Int)) (let ((.cse25 (store (store (store (store |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_133 (select |c_#valid| v_arrayElimCell_133)) v_arrayElimCell_132 (select |c_#valid| v_arrayElimCell_132)) |c_ULTIMATE.start_destroy_~l#1.base| .cse3) v_arrayElimCell_130 0))) (and (not (= v_arrayElimCell_133 v_arrayElimCell_132)) (not (= v_arrayElimCell_133 0)) (not (= |c_ULTIMATE.start_destroy_~l#1.base| v_arrayElimCell_130)) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_132) 0) (= |c_#valid| (store .cse25 |v_ULTIMATE.start_destroy_#t~mem18#1.base_14| 0)) (not (= |c_ULTIMATE.start_destroy_~l#1.base| v_arrayElimCell_132)) (not (= v_arrayElimCell_133 v_arrayElimCell_130)) (not (= |c_ULTIMATE.start_destroy_~l#1.base| v_arrayElimCell_133)) (not (= v_arrayElimCell_132 v_arrayElimCell_130)) (= (select .cse25 |v_ULTIMATE.start_destroy_#t~mem18#1.base_14|) 1) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_133) 0)))) (exists ((v_arrayElimCell_132 Int)) (and (not (= v_arrayElimCell_132 0)) (= |c_#valid| (store .cse26 v_arrayElimCell_132 0)) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_132) 0) (= (select (store (store |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_132 1) |c_ULTIMATE.start_destroy_~l#1.base| 0) v_arrayElimCell_132) 1))) (exists ((|v_ULTIMATE.start_destroy_#t~mem18#1.base_14| Int) (v_arrayElimCell_130 Int) (v_arrayElimCell_133 Int)) (let ((.cse27 (store |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_133 (select |c_#valid| v_arrayElimCell_133)))) (and (= (select |c_ULTIMATE.start_main_old_#valid#1| |v_ULTIMATE.start_destroy_#t~mem18#1.base_14|) 0) (= (select (store (store (store .cse27 |v_ULTIMATE.start_destroy_#t~mem18#1.base_14| 1) |c_ULTIMATE.start_destroy_~l#1.base| .cse3) v_arrayElimCell_130 0) |v_ULTIMATE.start_destroy_#t~mem18#1.base_14|) 1) (not (= v_arrayElimCell_133 0)) (not (= |c_ULTIMATE.start_destroy_~l#1.base| v_arrayElimCell_130)) (= |c_#valid| (store (store (store .cse27 |c_ULTIMATE.start_destroy_~l#1.base| .cse3) v_arrayElimCell_130 0) |v_ULTIMATE.start_destroy_#t~mem18#1.base_14| 0)) (not (= v_arrayElimCell_133 |v_ULTIMATE.start_destroy_#t~mem18#1.base_14|)) (not (= v_arrayElimCell_133 v_arrayElimCell_130)) (not (= |c_ULTIMATE.start_destroy_~l#1.base| v_arrayElimCell_133)) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_133) 0)))) (exists ((v_arrayElimCell_130 Int) (v_arrayElimCell_132 Int)) (and (not (= v_arrayElimCell_132 0)) (= |c_#valid| (store (store .cse4 v_arrayElimCell_130 0) v_arrayElimCell_132 0)) (not (= |c_ULTIMATE.start_destroy_~l#1.base| v_arrayElimCell_130)) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_132) 0) (= (select (store (store (store |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_132 1) |c_ULTIMATE.start_destroy_~l#1.base| .cse3) v_arrayElimCell_130 0) v_arrayElimCell_132) 1))) (exists ((|v_ULTIMATE.start_destroy_#t~mem18#1.base_14| Int) (v_arrayElimCell_130 Int) (v_arrayElimCell_132 Int)) (let ((.cse28 (select |c_#valid| v_arrayElimCell_132))) (and (= (select |c_ULTIMATE.start_main_old_#valid#1| |v_ULTIMATE.start_destroy_#t~mem18#1.base_14|) 0) (= (select (store (store (store (store |c_ULTIMATE.start_main_old_#valid#1| |v_ULTIMATE.start_destroy_#t~mem18#1.base_14| 1) v_arrayElimCell_132 .cse28) |c_ULTIMATE.start_destroy_~l#1.base| .cse3) v_arrayElimCell_130 0) |v_ULTIMATE.start_destroy_#t~mem18#1.base_14|) 1) (not (= |v_ULTIMATE.start_destroy_#t~mem18#1.base_14| 0)) (not (= |c_ULTIMATE.start_destroy_~l#1.base| v_arrayElimCell_130)) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_132) 0) (not (= |c_ULTIMATE.start_destroy_~l#1.base| v_arrayElimCell_132)) (not (= v_arrayElimCell_132 v_arrayElimCell_130)) (= |c_#valid| (store (store (store (store |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_132 .cse28) |c_ULTIMATE.start_destroy_~l#1.base| .cse3) v_arrayElimCell_130 0) |v_ULTIMATE.start_destroy_#t~mem18#1.base_14| 0))))) (exists ((|v_ULTIMATE.start_destroy_#t~mem18#1.base_14| Int) (v_arrayElimCell_132 Int)) (let ((.cse29 (select |c_#valid| v_arrayElimCell_132))) (and (= (select |c_ULTIMATE.start_main_old_#valid#1| |v_ULTIMATE.start_destroy_#t~mem18#1.base_14|) 0) (not (= |v_ULTIMATE.start_destroy_#t~mem18#1.base_14| 0)) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_132) 0) (not (= |c_ULTIMATE.start_destroy_~l#1.base| v_arrayElimCell_132)) (= (select (store (store (store |c_ULTIMATE.start_main_old_#valid#1| |v_ULTIMATE.start_destroy_#t~mem18#1.base_14| 1) v_arrayElimCell_132 .cse29) |c_ULTIMATE.start_destroy_~l#1.base| 0) |v_ULTIMATE.start_destroy_#t~mem18#1.base_14|) 1) (= |c_#valid| (store (store (store |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_132 .cse29) |c_ULTIMATE.start_destroy_~l#1.base| 0) |v_ULTIMATE.start_destroy_#t~mem18#1.base_14| 0))))) (exists ((v_arrayElimCell_130 Int) (v_arrayElimCell_133 Int) (v_arrayElimCell_132 Int)) (let ((.cse32 (select |c_#valid| v_arrayElimCell_132))) (let ((.cse30 (store (store |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_133 (select |c_#valid| v_arrayElimCell_133)) v_arrayElimCell_132 .cse32))) (let ((.cse31 (store (store .cse30 |c_ULTIMATE.start_destroy_~l#1.base| 1) v_arrayElimCell_130 0))) (and (not (= v_arrayElimCell_133 v_arrayElimCell_132)) (not (= v_arrayElimCell_133 0)) (= |c_#valid| (store (store .cse30 v_arrayElimCell_130 0) |c_ULTIMATE.start_destroy_~l#1.base| 0)) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_132) 0) (not (= v_arrayElimCell_133 v_arrayElimCell_130)) (not (= |c_ULTIMATE.start_destroy_~l#1.base| v_arrayElimCell_133)) (= (select .cse31 |c_ULTIMATE.start_destroy_~l#1.base|) 1) (not (= v_arrayElimCell_132 v_arrayElimCell_130)) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_133) 0) (= .cse32 (select .cse31 v_arrayElimCell_132))))))) (exists ((|v_ULTIMATE.start_destroy_#t~mem18#1.base_14| Int) (v_arrayElimCell_133 Int)) (let ((.cse33 (store (store |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_133 (select |c_#valid| v_arrayElimCell_133)) |c_ULTIMATE.start_destroy_~l#1.base| 0))) (and (= (select .cse33 |v_ULTIMATE.start_destroy_#t~mem18#1.base_14|) 1) (= |c_#valid| (store .cse33 |v_ULTIMATE.start_destroy_#t~mem18#1.base_14| 0)) (not (= v_arrayElimCell_133 0)) (not (= |c_ULTIMATE.start_destroy_~l#1.base| v_arrayElimCell_133)) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_133) 0)))) (exists ((v_arrayElimCell_130 Int) (v_arrayElimCell_133 Int)) (let ((.cse34 (store |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_133 (select |c_#valid| v_arrayElimCell_133)))) (and (= |c_#valid| (store (store .cse34 v_arrayElimCell_130 0) |c_ULTIMATE.start_destroy_~l#1.base| 0)) (= (select (store (store .cse34 |c_ULTIMATE.start_destroy_~l#1.base| 1) v_arrayElimCell_130 0) |c_ULTIMATE.start_destroy_~l#1.base|) 1) (not (= v_arrayElimCell_133 0)) (not (= v_arrayElimCell_133 v_arrayElimCell_130)) (not (= |c_ULTIMATE.start_destroy_~l#1.base| v_arrayElimCell_133)) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_130) 0) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_133) 0)))) (exists ((|v_ULTIMATE.start_destroy_#t~mem18#1.base_14| Int) (v_arrayElimCell_130 Int) (v_arrayElimCell_133 Int)) (let ((.cse35 (store (store (store |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_133 (select |c_#valid| v_arrayElimCell_133)) |c_ULTIMATE.start_destroy_~l#1.base| .cse3) v_arrayElimCell_130 0))) (and (not (= v_arrayElimCell_133 0)) (= (select .cse35 |v_ULTIMATE.start_destroy_#t~mem18#1.base_14|) 1) (not (= |c_ULTIMATE.start_destroy_~l#1.base| v_arrayElimCell_130)) (= |c_#valid| (store .cse35 |v_ULTIMATE.start_destroy_#t~mem18#1.base_14| 0)) (not (= v_arrayElimCell_133 v_arrayElimCell_130)) (not (= |c_ULTIMATE.start_destroy_~l#1.base| v_arrayElimCell_133)) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_133) 0)))) (exists ((|v_ULTIMATE.start_destroy_#t~mem18#1.base_14| Int) (v_arrayElimCell_130 Int)) (let ((.cse36 (store .cse4 v_arrayElimCell_130 0))) (and (= (select .cse36 |v_ULTIMATE.start_destroy_#t~mem18#1.base_14|) 1) (= |c_#valid| (store .cse36 |v_ULTIMATE.start_destroy_#t~mem18#1.base_14| 0)) (not (= |c_ULTIMATE.start_destroy_~l#1.base| v_arrayElimCell_130)) (not (= v_arrayElimCell_130 0)) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_130) 0)))) (exists ((v_arrayElimCell_130 Int) (v_arrayElimCell_132 Int)) (let ((.cse37 (select |c_#valid| v_arrayElimCell_132))) (let ((.cse39 (store |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_132 .cse37))) (let ((.cse38 (store (store .cse39 |c_ULTIMATE.start_destroy_~l#1.base| 1) v_arrayElimCell_130 0))) (and (= .cse37 (select .cse38 v_arrayElimCell_132)) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_132) 0) (= |c_#valid| (store (store .cse39 v_arrayElimCell_130 0) |c_ULTIMATE.start_destroy_~l#1.base| 0)) (not (= v_arrayElimCell_130 0)) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_130) 0) (= (select .cse38 |c_ULTIMATE.start_destroy_~l#1.base|) 1) (not (= v_arrayElimCell_132 v_arrayElimCell_130))))))) (exists ((|v_ULTIMATE.start_destroy_#t~mem18#1.base_14| Int) (v_arrayElimCell_132 Int)) (let ((.cse40 (store (store |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_132 (select |c_#valid| v_arrayElimCell_132)) |c_ULTIMATE.start_destroy_~l#1.base| 0))) (and (not (= v_arrayElimCell_132 0)) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_132) 0) (not (= |c_ULTIMATE.start_destroy_~l#1.base| v_arrayElimCell_132)) (= (select .cse40 |v_ULTIMATE.start_destroy_#t~mem18#1.base_14|) 1) (= |c_#valid| (store .cse40 |v_ULTIMATE.start_destroy_#t~mem18#1.base_14| 0))))) (and (or .cse11 .cse41 (exists ((|v_ULTIMATE.start_destroy_#t~mem18#1.base_14| Int) (v_arrayElimCell_130 Int) (v_arrayElimCell_132 Int)) (let ((.cse42 (store (store (store |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_132 (select |c_#valid| v_arrayElimCell_132)) |c_ULTIMATE.start_destroy_~l#1.base| .cse3) v_arrayElimCell_130 0))) (and (= (select .cse42 |v_ULTIMATE.start_destroy_#t~mem18#1.base_14|) 1) (not (= |c_ULTIMATE.start_destroy_~l#1.base| v_arrayElimCell_130)) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_132) 0) (not (= |c_ULTIMATE.start_destroy_~l#1.base| v_arrayElimCell_132)) (not (= v_arrayElimCell_132 v_arrayElimCell_130)) (= |c_#valid| (store .cse42 |v_ULTIMATE.start_destroy_#t~mem18#1.base_14| 0))))) .cse20 .cse15 .cse12 (exists ((|v_ULTIMATE.start_destroy_#t~mem18#1.base_14| Int) (v_arrayElimCell_130 Int)) (and (= (select |c_ULTIMATE.start_main_old_#valid#1| |v_ULTIMATE.start_destroy_#t~mem18#1.base_14|) 0) (= (select (store (store (store |c_ULTIMATE.start_main_old_#valid#1| |v_ULTIMATE.start_destroy_#t~mem18#1.base_14| 1) |c_ULTIMATE.start_destroy_~l#1.base| .cse3) v_arrayElimCell_130 0) |v_ULTIMATE.start_destroy_#t~mem18#1.base_14|) 1) (= |c_#valid| (store (store .cse4 v_arrayElimCell_130 0) |v_ULTIMATE.start_destroy_#t~mem18#1.base_14| 0)) (not (= |c_ULTIMATE.start_destroy_~l#1.base| v_arrayElimCell_130)))) .cse43 .cse13 .cse9) .cse8)))) (exists ((|v_ULTIMATE.start_destroy_#t~mem18#1.base_14| Int) (v_arrayElimCell_133 Int) (v_arrayElimCell_132 Int)) (let ((.cse49 (store (store (store |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_132 (select |c_#valid| v_arrayElimCell_132)) |c_ULTIMATE.start_destroy_~l#1.base| .cse3) v_arrayElimCell_133 0))) (and (not (= v_arrayElimCell_133 v_arrayElimCell_132)) (= |c_#valid| (store .cse49 |v_ULTIMATE.start_destroy_#t~mem18#1.base_14| 0)) (not (= v_arrayElimCell_133 0)) (= (select .cse49 |v_ULTIMATE.start_destroy_#t~mem18#1.base_14|) 1) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_132) 0) (not (= |c_ULTIMATE.start_destroy_~l#1.base| v_arrayElimCell_132)) (not (= |c_ULTIMATE.start_destroy_~l#1.base| v_arrayElimCell_133)) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_133) 0)))) (exists ((|v_ULTIMATE.start_destroy_#t~mem18#1.base_14| Int) (v_arrayElimCell_133 Int)) (let ((.cse50 (store .cse4 v_arrayElimCell_133 0))) (and (not (= v_arrayElimCell_133 0)) (= |c_#valid| (store .cse50 |v_ULTIMATE.start_destroy_#t~mem18#1.base_14| 0)) (not (= |c_ULTIMATE.start_destroy_~l#1.base| v_arrayElimCell_133)) (= (select .cse50 |v_ULTIMATE.start_destroy_#t~mem18#1.base_14|) 1) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_133) 0)))) .cse23 .cse24 (exists ((v_arrayElimCell_133 Int) (v_arrayElimCell_132 Int)) (let ((.cse53 (select |c_#valid| v_arrayElimCell_132))) (let ((.cse51 (store |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_132 .cse53))) (let ((.cse52 (store (store .cse51 |c_ULTIMATE.start_destroy_~l#1.base| 1) v_arrayElimCell_133 0))) (and (not (= v_arrayElimCell_133 v_arrayElimCell_132)) (= |c_#valid| (store (store .cse51 v_arrayElimCell_133 0) |c_ULTIMATE.start_destroy_~l#1.base| 0)) (= (select .cse52 v_arrayElimCell_132) .cse53) (not (= v_arrayElimCell_133 0)) (= (select .cse52 |c_ULTIMATE.start_destroy_~l#1.base|) 1) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_132) 0) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_133) 0)))))) (exists ((v_arrayElimCell_133 Int)) (and (= |c_#valid| (store (store |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_133 0) |c_ULTIMATE.start_destroy_~l#1.base| 0)) (not (= v_arrayElimCell_133 0)) (= (select (store .cse18 v_arrayElimCell_133 0) |c_ULTIMATE.start_destroy_~l#1.base|) 1) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_133) 0))) (exists ((|v_ULTIMATE.start_destroy_#t~mem18#1.base_14| Int) (v_arrayElimCell_133 Int)) (and (= (select |c_ULTIMATE.start_main_old_#valid#1| |v_ULTIMATE.start_destroy_#t~mem18#1.base_14|) 0) (not (= v_arrayElimCell_133 0)) (= |c_#valid| (store (store .cse4 v_arrayElimCell_133 0) |v_ULTIMATE.start_destroy_#t~mem18#1.base_14| 0)) (not (= |c_ULTIMATE.start_destroy_~l#1.base| v_arrayElimCell_133)) (= (select (store (store (store |c_ULTIMATE.start_main_old_#valid#1| |v_ULTIMATE.start_destroy_#t~mem18#1.base_14| 1) |c_ULTIMATE.start_destroy_~l#1.base| .cse3) v_arrayElimCell_133 0) |v_ULTIMATE.start_destroy_#t~mem18#1.base_14|) 1) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_133) 0))))))) (and (or .cse21 (and (or (exists ((|v_ULTIMATE.start_destroy_#t~mem18#1.base_14| Int)) (and (exists ((v_arrayElimCell_132 Int)) (let ((.cse55 (select |c_#valid| v_arrayElimCell_132))) (and (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_132) 0) (= (select (store (store (store |c_ULTIMATE.start_main_old_#valid#1| |v_ULTIMATE.start_destroy_#t~mem18#1.base_14| 1) v_arrayElimCell_132 .cse55) |c_ULTIMATE.start_destroy_~l#1.base| 0) |v_ULTIMATE.start_destroy_#t~mem18#1.base_14|) 1) (= |c_#valid| (store (store (store |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_132 .cse55) |c_ULTIMATE.start_destroy_~l#1.base| 0) |v_ULTIMATE.start_destroy_#t~mem18#1.base_14| 0))))) (= (select |c_ULTIMATE.start_main_old_#valid#1| |v_ULTIMATE.start_destroy_#t~mem18#1.base_14|) 0) (not (= |v_ULTIMATE.start_destroy_#t~mem18#1.base_14| 0)))) (and (exists ((v_arrayElimCell_130 Int) (v_DerPreprocessor_5 Int)) (and (= |c_#valid| (store (store |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_130 0) |c_ULTIMATE.start_destroy_~l#1.base| 0)) (= (select (store (store |c_ULTIMATE.start_main_old_#valid#1| |c_ULTIMATE.start_destroy_~l#1.base| v_DerPreprocessor_5) v_arrayElimCell_130 0) |c_ULTIMATE.start_destroy_~l#1.base|) 1) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_130) 0))) .cse8) (exists ((|v_ULTIMATE.start_destroy_#t~mem18#1.base_14| Int)) (and (not (= |c_ULTIMATE.start_destroy_~l#1.base| |v_ULTIMATE.start_destroy_#t~mem18#1.base_14|)) (= (select |c_ULTIMATE.start_main_old_#valid#1| |v_ULTIMATE.start_destroy_#t~mem18#1.base_14|) 0) (not (= |v_ULTIMATE.start_destroy_#t~mem18#1.base_14| 0)) (exists ((v_arrayElimCell_130 Int)) (and (= (select (store (store (store |c_ULTIMATE.start_main_old_#valid#1| |v_ULTIMATE.start_destroy_#t~mem18#1.base_14| 1) |c_ULTIMATE.start_destroy_~l#1.base| .cse3) v_arrayElimCell_130 0) |v_ULTIMATE.start_destroy_#t~mem18#1.base_14|) 1) (= |c_#valid| (store (store .cse4 v_arrayElimCell_130 0) |v_ULTIMATE.start_destroy_#t~mem18#1.base_14| 0)) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_130) 0))))) (exists ((|v_ULTIMATE.start_destroy_#t~mem18#1.base_14| Int)) (and (not (= |c_ULTIMATE.start_destroy_~l#1.base| |v_ULTIMATE.start_destroy_#t~mem18#1.base_14|)) (= (select |c_ULTIMATE.start_main_old_#valid#1| |v_ULTIMATE.start_destroy_#t~mem18#1.base_14|) 0) (not (= |v_ULTIMATE.start_destroy_#t~mem18#1.base_14| 0)) (exists ((v_arrayElimCell_130 Int)) (and (= (select (store (store (store |c_ULTIMATE.start_main_old_#valid#1| |v_ULTIMATE.start_destroy_#t~mem18#1.base_14| 1) |c_ULTIMATE.start_destroy_~l#1.base| .cse3) v_arrayElimCell_130 0) |v_ULTIMATE.start_destroy_#t~mem18#1.base_14|) 1) (= |c_#valid| (store (store .cse4 v_arrayElimCell_130 0) |v_ULTIMATE.start_destroy_#t~mem18#1.base_14| 0)))))) (and (exists ((v_arrayElimCell_130 Int) (v_DerPreprocessor_5 Int)) (and (= |c_#valid| (store (store |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_130 0) |c_ULTIMATE.start_destroy_~l#1.base| 0)) (= (select (store (store |c_ULTIMATE.start_main_old_#valid#1| |c_ULTIMATE.start_destroy_~l#1.base| v_DerPreprocessor_5) v_arrayElimCell_130 0) |c_ULTIMATE.start_destroy_~l#1.base|) 1))) .cse8) (exists ((|v_ULTIMATE.start_destroy_#t~mem18#1.base_14| Int)) (and (not (= |c_ULTIMATE.start_destroy_~l#1.base| |v_ULTIMATE.start_destroy_#t~mem18#1.base_14|)) (= (select |c_ULTIMATE.start_main_old_#valid#1| |v_ULTIMATE.start_destroy_#t~mem18#1.base_14|) 0) (not (= |v_ULTIMATE.start_destroy_#t~mem18#1.base_14| 0)) (exists ((v_arrayElimCell_130 Int) (v_arrayElimCell_132 Int)) (let ((.cse56 (select |c_#valid| v_arrayElimCell_132))) (and (= (select (store (store (store (store |c_ULTIMATE.start_main_old_#valid#1| |v_ULTIMATE.start_destroy_#t~mem18#1.base_14| 1) v_arrayElimCell_132 .cse56) |c_ULTIMATE.start_destroy_~l#1.base| .cse3) v_arrayElimCell_130 0) |v_ULTIMATE.start_destroy_#t~mem18#1.base_14|) 1) (not (= |c_ULTIMATE.start_destroy_~l#1.base| v_arrayElimCell_130)) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_132) 0) (not (= |c_ULTIMATE.start_destroy_~l#1.base| v_arrayElimCell_132)) (not (= v_arrayElimCell_132 v_arrayElimCell_130)) (= |c_#valid| (store (store (store (store |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_132 .cse56) |c_ULTIMATE.start_destroy_~l#1.base| .cse3) v_arrayElimCell_130 0) |v_ULTIMATE.start_destroy_#t~mem18#1.base_14| 0))))))) (and (exists ((v_arrayElimCell_130 Int) (v_arrayElimCell_132 Int) (v_DerPreprocessor_5 Int)) (let ((.cse57 (store |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_132 (select |c_#valid| v_arrayElimCell_132)))) (and (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_132) 0) (not (= |c_ULTIMATE.start_destroy_~l#1.base| v_arrayElimCell_132)) (= |c_#valid| (store (store .cse57 v_arrayElimCell_130 0) |c_ULTIMATE.start_destroy_~l#1.base| 0)) (not (= v_arrayElimCell_132 v_arrayElimCell_130)) (= (select (store (store .cse57 |c_ULTIMATE.start_destroy_~l#1.base| v_DerPreprocessor_5) v_arrayElimCell_130 0) |c_ULTIMATE.start_destroy_~l#1.base|) 1)))) .cse8)) .cse0) (exists ((|v_ULTIMATE.start_destroy_#t~mem18#1.base_14| Int)) (and (exists ((v_arrayElimCell_130 Int)) (and (= (select (store (store (store |c_ULTIMATE.start_main_old_#valid#1| |v_ULTIMATE.start_destroy_#t~mem18#1.base_14| 1) |c_ULTIMATE.start_destroy_~l#1.base| .cse3) v_arrayElimCell_130 0) |v_ULTIMATE.start_destroy_#t~mem18#1.base_14|) 1) (= |c_#valid| (store (store .cse4 v_arrayElimCell_130 0) |v_ULTIMATE.start_destroy_#t~mem18#1.base_14| 0)) (not (= |c_ULTIMATE.start_destroy_~l#1.base| v_arrayElimCell_130)) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_130) 0))) (not (= |c_ULTIMATE.start_destroy_~l#1.base| |v_ULTIMATE.start_destroy_#t~mem18#1.base_14|)) (= (select |c_ULTIMATE.start_main_old_#valid#1| |v_ULTIMATE.start_destroy_#t~mem18#1.base_14|) 0) (not (= |v_ULTIMATE.start_destroy_#t~mem18#1.base_14| 0)))) (and (exists ((v_arrayElimCell_130 Int) (v_DerPreprocessor_3 Int)) (and (= (select (store (store |c_ULTIMATE.start_main_old_#valid#1| |c_ULTIMATE.start_destroy_~l#1.base| v_DerPreprocessor_3) v_arrayElimCell_130 0) |c_ULTIMATE.start_destroy_~l#1.base|) 1) (= |c_#valid| (store (store |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_130 0) |c_ULTIMATE.start_destroy_~l#1.base| 0)) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_130) 0))) .cse8)) .cse2) (and (let ((.cse70 (exists ((v_arrayElimCell_132 Int)) (and (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_132) 0) (= |c_#valid| (store (store (store |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_132 (select |c_#valid| v_arrayElimCell_132)) |c_ULTIMATE.start_destroy_~l#1.base| 0) 0 0)))))) (let ((.cse58 (and .cse8 (exists ((v_arrayElimCell_133 Int)) (and (not (= v_arrayElimCell_133 0)) (= |c_#valid| (store (store .cse4 v_arrayElimCell_133 0) 0 0)) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_133) 0))))) (.cse59 (and (exists ((v_arrayElimCell_133 Int)) (and (not (= v_arrayElimCell_133 0)) (= |c_#valid| (store (store |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_133 0) 0 0)) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_133) 0))) .cse61)) (.cse62 (= (select |c_ULTIMATE.start_main_old_#valid#1| 0) 0)) (.cse60 (and .cse8 .cse70))) (or (and (exists ((v_arrayElimCell_133 Int) (v_arrayElimCell_132 Int)) (and (not (= v_arrayElimCell_132 0)) (not (= v_arrayElimCell_133 v_arrayElimCell_132)) (not (= v_arrayElimCell_133 0)) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_132) 0) (not (= |c_ULTIMATE.start_destroy_~l#1.base| v_arrayElimCell_132)) (= |c_#valid| (store (store (store (store |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_132 (select |c_#valid| v_arrayElimCell_132)) |c_ULTIMATE.start_destroy_~l#1.base| .cse3) v_arrayElimCell_133 0) 0 0)) (not (= |c_ULTIMATE.start_destroy_~l#1.base| v_arrayElimCell_133)) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_133) 0))) .cse8) .cse58 .cse59 .cse60 (and (exists ((v_arrayElimCell_133 Int) (v_arrayElimCell_132 Int)) (and (= |c_#valid| (store (store (store |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_132 (select |c_#valid| v_arrayElimCell_132)) v_arrayElimCell_133 0) 0 0)) (not (= v_arrayElimCell_132 0)) (not (= v_arrayElimCell_133 v_arrayElimCell_132)) (not (= v_arrayElimCell_133 0)) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_132) 0) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_133) 0))) .cse61) (and .cse62 (or .cse58 .cse59)) (and .cse2 (let ((.cse63 (and .cse61 (exists ((v_arrayElimCell_130 Int)) (and (= |c_#valid| (store (store |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_130 0) 0 0)) (not (= v_arrayElimCell_130 0)) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_130) 0))))) (.cse66 (and .cse61 (exists ((v_DerPreprocessor_22 Int) (v_arrayElimCell_130 Int) (v_arrayElimCell_133 Int)) (let ((.cse76 (store |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_133 (select |c_#valid| v_arrayElimCell_133)))) (and (= v_DerPreprocessor_22 (select (store (store .cse76 0 v_DerPreprocessor_22) v_arrayElimCell_130 0) 0)) (not (= v_arrayElimCell_133 0)) (= |c_#valid| (store (store .cse76 v_arrayElimCell_130 0) 0 0)) (not (= v_arrayElimCell_133 v_arrayElimCell_130)) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_133) 0)))))) (.cse64 (and (exists ((v_arrayElimCell_130 Int)) (and (= |c_#valid| (store (store .cse4 v_arrayElimCell_130 0) 0 0)) (not (= v_arrayElimCell_130 0)) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_130) 0))) .cse8)) (.cse69 (exists ((v_arrayElimCell_130 Int) (v_arrayElimCell_132 Int)) (and (not (= v_arrayElimCell_132 0)) (not (= |c_ULTIMATE.start_destroy_~l#1.base| v_arrayElimCell_130)) (= |c_#valid| (store (store (store (store |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_132 (select |c_#valid| v_arrayElimCell_132)) |c_ULTIMATE.start_destroy_~l#1.base| .cse3) v_arrayElimCell_130 0) 0 0)) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_132) 0) (not (= |c_ULTIMATE.start_destroy_~l#1.base| v_arrayElimCell_132)) (not (= v_arrayElimCell_132 v_arrayElimCell_130))))) (.cse68 (exists ((v_arrayElimCell_130 Int)) (= |c_#valid| (store (store .cse4 v_arrayElimCell_130 0) 0 0)))) (.cse71 (exists ((v_arrayElimCell_130 Int)) (and (= |c_#valid| (store (store .cse4 v_arrayElimCell_130 0) 0 0)) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_130) 0))))) (or .cse63 (and .cse62 (or .cse63 .cse64)) (and .cse8 (exists ((v_arrayElimCell_130 Int) (v_arrayElimCell_133 Int)) (and (= |c_#valid| (store (store (store (store |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_133 (select |c_#valid| v_arrayElimCell_133)) |c_ULTIMATE.start_destroy_~l#1.base| .cse3) v_arrayElimCell_130 0) 0 0)) (not (= v_arrayElimCell_133 0)) (not (= |c_ULTIMATE.start_destroy_~l#1.base| v_arrayElimCell_130)) (not (= v_arrayElimCell_133 v_arrayElimCell_130)) (not (= |c_ULTIMATE.start_destroy_~l#1.base| v_arrayElimCell_133)) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_130) 0) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_133) 0)))) (and .cse62 (or (exists ((v_arrayElimCell_133 Int) (v_DerPreprocessor_21 Int)) (let ((.cse65 (store |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_133 (select |c_#valid| v_arrayElimCell_133)))) (and (= (select (store (store .cse65 0 v_DerPreprocessor_21) |c_ULTIMATE.start_destroy_~l#1.base| 0) 0) v_DerPreprocessor_21) (not (= |c_ULTIMATE.start_destroy_~l#1.base| v_arrayElimCell_133)) (= |c_#valid| (store (store .cse65 |c_ULTIMATE.start_destroy_~l#1.base| 0) 0 0)) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_133) 0)))) .cse66 (and .cse8 (exists ((v_arrayElimCell_130 Int) (v_arrayElimCell_133 Int) (v_DerPreprocessor_21 Int)) (let ((.cse67 (store |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_133 (select |c_#valid| v_arrayElimCell_133)))) (and (= |c_#valid| (store (store (store .cse67 |c_ULTIMATE.start_destroy_~l#1.base| .cse3) v_arrayElimCell_130 0) 0 0)) (not (= v_arrayElimCell_133 0)) (not (= |c_ULTIMATE.start_destroy_~l#1.base| v_arrayElimCell_130)) (= v_DerPreprocessor_21 (select (store (store (store .cse67 0 v_DerPreprocessor_21) |c_ULTIMATE.start_destroy_~l#1.base| .cse3) v_arrayElimCell_130 0) 0)) (not (= v_arrayElimCell_133 v_arrayElimCell_130)) (not (= |c_ULTIMATE.start_destroy_~l#1.base| v_arrayElimCell_133)) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_133) 0))))))) (exists ((v_arrayElimCell_133 Int)) (and (not (= |c_ULTIMATE.start_destroy_~l#1.base| v_arrayElimCell_133)) (= |c_#valid| (store (store (store |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_133 (select |c_#valid| v_arrayElimCell_133)) |c_ULTIMATE.start_destroy_~l#1.base| 0) 0 0)) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_133) 0))) .cse66 .cse64 (and (exists ((v_arrayElimCell_130 Int) (v_arrayElimCell_132 Int)) (and (not (= v_arrayElimCell_132 0)) (not (= |c_ULTIMATE.start_destroy_~l#1.base| v_arrayElimCell_130)) (= |c_#valid| (store (store (store (store |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_132 (select |c_#valid| v_arrayElimCell_132)) |c_ULTIMATE.start_destroy_~l#1.base| .cse3) v_arrayElimCell_130 0) 0 0)) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_132) 0) (not (= |c_ULTIMATE.start_destroy_~l#1.base| v_arrayElimCell_132)) (not (= v_arrayElimCell_130 0)) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_130) 0) (not (= v_arrayElimCell_132 v_arrayElimCell_130)))) .cse8) (and .cse68 .cse8) (and .cse69 .cse8) (and .cse61 (exists ((v_arrayElimCell_130 Int) (v_arrayElimCell_132 Int)) (and (not (= v_arrayElimCell_132 0)) (= |c_#valid| (store (store (store |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_132 (select |c_#valid| v_arrayElimCell_132)) v_arrayElimCell_130 0) 0 0)) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_132) 0) (not (= v_arrayElimCell_130 0)) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_130) 0) (not (= v_arrayElimCell_132 v_arrayElimCell_130))))) (and .cse8 (exists ((v_arrayElimCell_130 Int) (v_arrayElimCell_133 Int) (v_arrayElimCell_132 Int)) (and (not (= v_arrayElimCell_132 0)) (not (= v_arrayElimCell_133 v_arrayElimCell_132)) (not (= v_arrayElimCell_133 0)) (not (= |c_ULTIMATE.start_destroy_~l#1.base| v_arrayElimCell_130)) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_132) 0) (not (= |c_ULTIMATE.start_destroy_~l#1.base| v_arrayElimCell_132)) (not (= v_arrayElimCell_133 v_arrayElimCell_130)) (not (= |c_ULTIMATE.start_destroy_~l#1.base| v_arrayElimCell_133)) (not (= v_arrayElimCell_132 v_arrayElimCell_130)) (= |c_#valid| (store (store (store (store (store |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_133 (select |c_#valid| v_arrayElimCell_133)) v_arrayElimCell_132 (select |c_#valid| v_arrayElimCell_132)) |c_ULTIMATE.start_destroy_~l#1.base| .cse3) v_arrayElimCell_130 0) 0 0)) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_133) 0)))) (and (or .cse69 .cse68 .cse70 (and .cse62 (exists ((v_arrayElimCell_130 Int) (v_DerPreprocessor_21 Int)) (and (= v_DerPreprocessor_21 (select (store (store (store |c_ULTIMATE.start_main_old_#valid#1| 0 v_DerPreprocessor_21) |c_ULTIMATE.start_destroy_~l#1.base| .cse3) v_arrayElimCell_130 0) 0)) (= |c_#valid| (store (store .cse4 v_arrayElimCell_130 0) 0 0))))) .cse71) .cse8) (and .cse61 (exists ((v_DerPreprocessor_22 Int) (v_arrayElimCell_130 Int) (v_arrayElimCell_133 Int)) (let ((.cse72 (store |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_133 (select |c_#valid| v_arrayElimCell_133)))) (and (= v_DerPreprocessor_22 (select (store (store .cse72 0 v_DerPreprocessor_22) v_arrayElimCell_130 0) 0)) (not (= v_arrayElimCell_133 0)) (= |c_#valid| (store (store .cse72 v_arrayElimCell_130 0) 0 0)) (not (= v_arrayElimCell_133 v_arrayElimCell_130)) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_130) 0) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_133) 0))))) .cse60 (and .cse61 (exists ((v_arrayElimCell_130 Int) (v_arrayElimCell_133 Int) (v_DerPreprocessor_19 Int)) (let ((.cse73 (store |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_133 (select |c_#valid| v_arrayElimCell_133)))) (and (not (= v_arrayElimCell_133 0)) (= |c_#valid| (store (store .cse73 v_arrayElimCell_130 0) 0 0)) (not (= v_arrayElimCell_133 v_arrayElimCell_130)) (= v_DerPreprocessor_19 (select (store (store .cse73 0 v_DerPreprocessor_19) v_arrayElimCell_130 0) 0)) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_130) 0) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_133) 0))))) (and (exists ((v_DerPreprocessor_22 Int) (v_arrayElimCell_130 Int) (v_arrayElimCell_132 Int)) (let ((.cse74 (store |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_132 (select |c_#valid| v_arrayElimCell_132)))) (and (not (= v_arrayElimCell_132 0)) (= (select (store (store .cse74 0 v_DerPreprocessor_22) v_arrayElimCell_130 0) 0) v_DerPreprocessor_22) (= |c_#valid| (store (store .cse74 v_arrayElimCell_130 0) 0 0)) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_132) 0) (not (= v_arrayElimCell_132 v_arrayElimCell_130))))) .cse61) (and .cse8 .cse71) (exists ((v_arrayElimCell_133 Int) (v_arrayElimCell_132 Int)) (and (not (= v_arrayElimCell_132 0)) (not (= v_arrayElimCell_133 v_arrayElimCell_132)) (not (= v_arrayElimCell_133 0)) (= |c_#valid| (store (store (store (store |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_133 (select |c_#valid| v_arrayElimCell_133)) v_arrayElimCell_132 (select |c_#valid| v_arrayElimCell_132)) |c_ULTIMATE.start_destroy_~l#1.base| 0) 0 0)) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_132) 0) (not (= |c_ULTIMATE.start_destroy_~l#1.base| v_arrayElimCell_132)) (not (= |c_ULTIMATE.start_destroy_~l#1.base| v_arrayElimCell_133)) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_133) 0))) (and .cse61 (exists ((v_DerPreprocessor_22 Int) (v_arrayElimCell_130 Int) (v_arrayElimCell_133 Int) (v_arrayElimCell_132 Int)) (let ((.cse75 (store (store |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_133 (select |c_#valid| v_arrayElimCell_133)) v_arrayElimCell_132 (select |c_#valid| v_arrayElimCell_132)))) (and (not (= v_arrayElimCell_132 0)) (not (= v_arrayElimCell_133 v_arrayElimCell_132)) (not (= v_arrayElimCell_133 0)) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_132) 0) (not (= v_arrayElimCell_133 v_arrayElimCell_130)) (not (= v_arrayElimCell_132 v_arrayElimCell_130)) (= v_DerPreprocessor_22 (select (store (store .cse75 0 v_DerPreprocessor_22) v_arrayElimCell_130 0) 0)) (= |c_#valid| (store (store .cse75 v_arrayElimCell_130 0) 0 0)) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_133) 0))))) (and .cse8 (exists ((v_arrayElimCell_130 Int) (v_arrayElimCell_133 Int)) (and (= |c_#valid| (store (store (store (store |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_133 (select |c_#valid| v_arrayElimCell_133)) |c_ULTIMATE.start_destroy_~l#1.base| .cse3) v_arrayElimCell_130 0) 0 0)) (not (= v_arrayElimCell_133 0)) (not (= |c_ULTIMATE.start_destroy_~l#1.base| v_arrayElimCell_130)) (not (= v_arrayElimCell_133 v_arrayElimCell_130)) (not (= |c_ULTIMATE.start_destroy_~l#1.base| v_arrayElimCell_133)) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_133) 0)))) (exists ((v_arrayElimCell_132 Int)) (and (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_132) 0) (not (= |c_ULTIMATE.start_destroy_~l#1.base| v_arrayElimCell_132)) (= |c_#valid| (store (store (store |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_132 (select |c_#valid| v_arrayElimCell_132)) |c_ULTIMATE.start_destroy_~l#1.base| 0) 0 0))))))) (and (= |c_#valid| (store .cse26 0 0)) .cse8)))) .cse0))))) is different from false [2024-11-28 04:00:02,196 WARN L851 $PredicateComparison]: unable to prove that (and (let ((.cse2 (select |c_#valid| |c_ULTIMATE.start_destroy_~l#1.base|)) (.cse60 (= |c_ULTIMATE.start_destroy_~l#1.base| 0))) (let ((.cse51 (not (= |c_ULTIMATE.start_destroy_~l#1.offset| 16))) (.cse17 (store |c_ULTIMATE.start_main_old_#valid#1| |c_ULTIMATE.start_destroy_~l#1.base| 0)) (.cse14 (not .cse60)) (.cse4 (store |c_ULTIMATE.start_main_old_#valid#1| |c_ULTIMATE.start_destroy_~l#1.base| .cse2)) (.cse53 (not (= |c_ULTIMATE.start_destroy_~l#1.offset| 0)))) (or (and (let ((.cse20 (exists ((|v_ULTIMATE.start_destroy_#t~mem18#1.base_14| Int)) (and (= |c_#valid| (store .cse17 |v_ULTIMATE.start_destroy_#t~mem18#1.base_14| 0)) (= (select .cse17 |v_ULTIMATE.start_destroy_#t~mem18#1.base_14|) 1)))) (.cse39 (exists ((|v_ULTIMATE.start_destroy_#t~mem18#1.base_14| Int)) (and (= (select |c_ULTIMATE.start_main_old_#valid#1| |v_ULTIMATE.start_destroy_#t~mem18#1.base_14|) 0) (= |c_#valid| (store .cse17 |v_ULTIMATE.start_destroy_#t~mem18#1.base_14| 0)) (= (select (store (store |c_ULTIMATE.start_main_old_#valid#1| |v_ULTIMATE.start_destroy_#t~mem18#1.base_14| 1) |c_ULTIMATE.start_destroy_~l#1.base| 0) |v_ULTIMATE.start_destroy_#t~mem18#1.base_14|) 1)))) (.cse44 (exists ((|v_ULTIMATE.start_destroy_#t~mem18#1.base_14| Int) (v_arrayElimCell_132 Int)) (let ((.cse52 (store (store |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_132 (select |c_#valid| v_arrayElimCell_132)) |c_ULTIMATE.start_destroy_~l#1.base| 0))) (and (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_132) 0) (not (= |c_ULTIMATE.start_destroy_~l#1.base| v_arrayElimCell_132)) (= (select .cse52 |v_ULTIMATE.start_destroy_#t~mem18#1.base_14|) 1) (= |c_#valid| (store .cse52 |v_ULTIMATE.start_destroy_#t~mem18#1.base_14| 0))))))) (let ((.cse0 (and .cse44 .cse14)) (.cse5 (and .cse14 .cse39)) (.cse6 (and .cse14 .cse20)) (.cse7 (store |c_ULTIMATE.start_main_old_#valid#1| |c_ULTIMATE.start_destroy_~l#1.base| 1))) (or .cse0 (exists ((|v_ULTIMATE.start_destroy_#t~mem18#1.base_14| Int) (v_arrayElimCell_133 Int) (v_arrayElimCell_132 Int)) (let ((.cse1 (store (store (store |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_132 (select |c_#valid| v_arrayElimCell_132)) |c_ULTIMATE.start_destroy_~l#1.base| .cse2) v_arrayElimCell_133 0))) (and (not (= v_arrayElimCell_133 v_arrayElimCell_132)) (= |c_#valid| (store .cse1 |v_ULTIMATE.start_destroy_#t~mem18#1.base_14| 0)) (not (= v_arrayElimCell_133 0)) (= (select .cse1 |v_ULTIMATE.start_destroy_#t~mem18#1.base_14|) 1) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_132) 0) (not (= |c_ULTIMATE.start_destroy_~l#1.base| v_arrayElimCell_132)) (not (= |c_ULTIMATE.start_destroy_~l#1.base| v_arrayElimCell_133)) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_133) 0)))) (exists ((|v_ULTIMATE.start_destroy_#t~mem18#1.base_14| Int) (v_arrayElimCell_133 Int)) (let ((.cse3 (store .cse4 v_arrayElimCell_133 0))) (and (not (= v_arrayElimCell_133 0)) (= |c_#valid| (store .cse3 |v_ULTIMATE.start_destroy_#t~mem18#1.base_14| 0)) (not (= |c_ULTIMATE.start_destroy_~l#1.base| v_arrayElimCell_133)) (= (select .cse3 |v_ULTIMATE.start_destroy_#t~mem18#1.base_14|) 1) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_133) 0)))) .cse5 .cse6 (exists ((v_arrayElimCell_133 Int)) (and (= |c_#valid| (store (store |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_133 0) |c_ULTIMATE.start_destroy_~l#1.base| 0)) (= (select (store .cse7 v_arrayElimCell_133 0) |c_ULTIMATE.start_destroy_~l#1.base|) 1) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_133) 0))) (exists ((v_arrayElimCell_133 Int) (v_arrayElimCell_132 Int)) (let ((.cse10 (select |c_#valid| v_arrayElimCell_132))) (let ((.cse8 (store |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_132 .cse10))) (let ((.cse9 (store (store .cse8 |c_ULTIMATE.start_destroy_~l#1.base| 1) v_arrayElimCell_133 0))) (and (not (= v_arrayElimCell_133 v_arrayElimCell_132)) (= |c_#valid| (store (store .cse8 v_arrayElimCell_133 0) |c_ULTIMATE.start_destroy_~l#1.base| 0)) (= (select .cse9 v_arrayElimCell_132) .cse10) (not (= v_arrayElimCell_133 0)) (= (select .cse9 |c_ULTIMATE.start_destroy_~l#1.base|) 1) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_132) 0) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_133) 0)))))) (exists ((|v_ULTIMATE.start_destroy_#t~mem18#1.base_14| Int) (v_arrayElimCell_133 Int)) (and (= (select |c_ULTIMATE.start_main_old_#valid#1| |v_ULTIMATE.start_destroy_#t~mem18#1.base_14|) 0) (not (= v_arrayElimCell_133 0)) (= |c_#valid| (store (store .cse4 v_arrayElimCell_133 0) |v_ULTIMATE.start_destroy_#t~mem18#1.base_14| 0)) (not (= |c_ULTIMATE.start_destroy_~l#1.base| v_arrayElimCell_133)) (= (select (store (store (store |c_ULTIMATE.start_main_old_#valid#1| |v_ULTIMATE.start_destroy_#t~mem18#1.base_14| 1) |c_ULTIMATE.start_destroy_~l#1.base| .cse2) v_arrayElimCell_133 0) |v_ULTIMATE.start_destroy_#t~mem18#1.base_14|) 1) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_133) 0))) (and (let ((.cse18 (exists ((v_arrayElimCell_130 Int)) (and (= (select (store .cse7 v_arrayElimCell_130 0) |c_ULTIMATE.start_destroy_~l#1.base|) 1) (= |c_#valid| (store (store |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_130 0) |c_ULTIMATE.start_destroy_~l#1.base| 0)) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_130) 0)))) (.cse26 (exists ((v_arrayElimCell_130 Int) (v_arrayElimCell_132 Int)) (let ((.cse48 (select |c_#valid| v_arrayElimCell_132))) (let ((.cse50 (store |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_132 .cse48))) (let ((.cse49 (store (store .cse50 |c_ULTIMATE.start_destroy_~l#1.base| 1) v_arrayElimCell_130 0))) (and (= .cse48 (select .cse49 v_arrayElimCell_132)) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_132) 0) (= |c_#valid| (store (store .cse50 v_arrayElimCell_130 0) |c_ULTIMATE.start_destroy_~l#1.base| 0)) (= (select .cse49 |c_ULTIMATE.start_destroy_~l#1.base|) 1) (not (= v_arrayElimCell_132 v_arrayElimCell_130)))))))) (.cse22 (exists ((|v_ULTIMATE.start_destroy_#t~mem18#1.base_14| Int) (v_arrayElimCell_130 Int)) (let ((.cse47 (store .cse4 v_arrayElimCell_130 0))) (and (= (select .cse47 |v_ULTIMATE.start_destroy_#t~mem18#1.base_14|) 1) (= |c_#valid| (store .cse47 |v_ULTIMATE.start_destroy_#t~mem18#1.base_14| 0)) (not (= |c_ULTIMATE.start_destroy_~l#1.base| v_arrayElimCell_130)))))) (.cse19 (exists ((|v_ULTIMATE.start_destroy_#t~mem18#1.base_14| Int) (v_arrayElimCell_130 Int)) (let ((.cse46 (store .cse4 v_arrayElimCell_130 0))) (and (= (select .cse46 |v_ULTIMATE.start_destroy_#t~mem18#1.base_14|) 1) (= |c_#valid| (store .cse46 |v_ULTIMATE.start_destroy_#t~mem18#1.base_14| 0)) (not (= |c_ULTIMATE.start_destroy_~l#1.base| v_arrayElimCell_130)) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_130) 0))))) (.cse15 (exists ((v_arrayElimCell_130 Int)) (and (= (select (store .cse7 v_arrayElimCell_130 0) |c_ULTIMATE.start_destroy_~l#1.base|) 1) (= |c_#valid| (store (store |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_130 0) |c_ULTIMATE.start_destroy_~l#1.base| 0)))))) (or .cse0 (exists ((|v_ULTIMATE.start_destroy_#t~mem18#1.base_14| Int) (v_arrayElimCell_130 Int)) (and (= (select |c_ULTIMATE.start_main_old_#valid#1| |v_ULTIMATE.start_destroy_#t~mem18#1.base_14|) 0) (= (select (store (store (store |c_ULTIMATE.start_main_old_#valid#1| |v_ULTIMATE.start_destroy_#t~mem18#1.base_14| 1) |c_ULTIMATE.start_destroy_~l#1.base| .cse2) v_arrayElimCell_130 0) |v_ULTIMATE.start_destroy_#t~mem18#1.base_14|) 1) (= |c_#valid| (store (store .cse4 v_arrayElimCell_130 0) |v_ULTIMATE.start_destroy_#t~mem18#1.base_14| 0)) (not (= |c_ULTIMATE.start_destroy_~l#1.base| v_arrayElimCell_130)) (not (= v_arrayElimCell_130 0)) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_130) 0))) (exists ((|v_ULTIMATE.start_destroy_#t~mem18#1.base_14| Int) (v_arrayElimCell_130 Int)) (and (= (select |c_ULTIMATE.start_main_old_#valid#1| |v_ULTIMATE.start_destroy_#t~mem18#1.base_14|) 0) (= (select (store (store (store |c_ULTIMATE.start_main_old_#valid#1| |v_ULTIMATE.start_destroy_#t~mem18#1.base_14| 1) |c_ULTIMATE.start_destroy_~l#1.base| .cse2) v_arrayElimCell_130 0) |v_ULTIMATE.start_destroy_#t~mem18#1.base_14|) 1) (= |c_#valid| (store (store .cse4 v_arrayElimCell_130 0) |v_ULTIMATE.start_destroy_#t~mem18#1.base_14| 0)) (not (= |v_ULTIMATE.start_destroy_#t~mem18#1.base_14| 0)) (not (= |c_ULTIMATE.start_destroy_~l#1.base| v_arrayElimCell_130)))) (exists ((v_arrayElimCell_130 Int) (v_arrayElimCell_132 Int)) (let ((.cse11 (select |c_#valid| v_arrayElimCell_132))) (let ((.cse13 (store |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_132 .cse11))) (let ((.cse12 (store (store .cse13 |c_ULTIMATE.start_destroy_~l#1.base| 1) v_arrayElimCell_130 0))) (and (not (= v_arrayElimCell_132 0)) (= .cse11 (select .cse12 v_arrayElimCell_132)) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_132) 0) (= |c_#valid| (store (store .cse13 v_arrayElimCell_130 0) |c_ULTIMATE.start_destroy_~l#1.base| 0)) (= (select .cse12 |c_ULTIMATE.start_destroy_~l#1.base|) 1) (not (= v_arrayElimCell_132 v_arrayElimCell_130))))))) (and .cse14 .cse15) (exists ((v_arrayElimCell_130 Int) (v_arrayElimCell_133 Int)) (let ((.cse16 (store |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_133 (select |c_#valid| v_arrayElimCell_133)))) (and (= |c_#valid| (store (store .cse16 v_arrayElimCell_130 0) |c_ULTIMATE.start_destroy_~l#1.base| 0)) (= (select (store (store .cse16 |c_ULTIMATE.start_destroy_~l#1.base| 1) v_arrayElimCell_130 0) |c_ULTIMATE.start_destroy_~l#1.base|) 1) (not (= v_arrayElimCell_133 0)) (not (= v_arrayElimCell_133 v_arrayElimCell_130)) (not (= |c_ULTIMATE.start_destroy_~l#1.base| v_arrayElimCell_133)) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_133) 0)))) (exists ((v_arrayElimCell_132 Int)) (and (= |c_#valid| (store .cse17 v_arrayElimCell_132 0)) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_132) 0) (= (select (store (store |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_132 1) |c_ULTIMATE.start_destroy_~l#1.base| 0) v_arrayElimCell_132) 1))) (and (or .cse18 .cse19 .cse20) .cse14) (and .cse18 .cse14) (exists ((|v_ULTIMATE.start_destroy_#t~mem18#1.base_14| Int) (v_arrayElimCell_133 Int)) (let ((.cse21 (store |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_133 (select |c_#valid| v_arrayElimCell_133)))) (and (= |c_#valid| (store (store .cse21 |c_ULTIMATE.start_destroy_~l#1.base| 0) |v_ULTIMATE.start_destroy_#t~mem18#1.base_14| 0)) (= (select |c_ULTIMATE.start_main_old_#valid#1| |v_ULTIMATE.start_destroy_#t~mem18#1.base_14|) 0) (not (= v_arrayElimCell_133 0)) (= (select (store (store .cse21 |v_ULTIMATE.start_destroy_#t~mem18#1.base_14| 1) |c_ULTIMATE.start_destroy_~l#1.base| 0) |v_ULTIMATE.start_destroy_#t~mem18#1.base_14|) 1) (not (= v_arrayElimCell_133 |v_ULTIMATE.start_destroy_#t~mem18#1.base_14|)) (not (= |c_ULTIMATE.start_destroy_~l#1.base| v_arrayElimCell_133)) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_133) 0)))) (and (or .cse22 .cse20 .cse15) .cse14) (exists ((|v_ULTIMATE.start_destroy_#t~mem18#1.base_14| Int) (v_arrayElimCell_130 Int) (v_arrayElimCell_132 Int)) (let ((.cse23 (store (store (store |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_132 (select |c_#valid| v_arrayElimCell_132)) |c_ULTIMATE.start_destroy_~l#1.base| .cse2) v_arrayElimCell_130 0))) (and (not (= v_arrayElimCell_132 0)) (= (select .cse23 |v_ULTIMATE.start_destroy_#t~mem18#1.base_14|) 1) (not (= |c_ULTIMATE.start_destroy_~l#1.base| v_arrayElimCell_130)) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_132) 0) (not (= |c_ULTIMATE.start_destroy_~l#1.base| v_arrayElimCell_132)) (not (= v_arrayElimCell_132 v_arrayElimCell_130)) (= |c_#valid| (store .cse23 |v_ULTIMATE.start_destroy_#t~mem18#1.base_14| 0))))) (exists ((|v_ULTIMATE.start_destroy_#t~mem18#1.base_14| Int) (v_arrayElimCell_130 Int) (v_arrayElimCell_132 Int)) (let ((.cse24 (store (store (store |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_132 (select |c_#valid| v_arrayElimCell_132)) |c_ULTIMATE.start_destroy_~l#1.base| .cse2) v_arrayElimCell_130 0))) (and (= (select .cse24 |v_ULTIMATE.start_destroy_#t~mem18#1.base_14|) 1) (not (= |c_ULTIMATE.start_destroy_~l#1.base| v_arrayElimCell_130)) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_132) 0) (not (= |c_ULTIMATE.start_destroy_~l#1.base| v_arrayElimCell_132)) (not (= v_arrayElimCell_130 0)) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_130) 0) (not (= v_arrayElimCell_132 v_arrayElimCell_130)) (= |c_#valid| (store .cse24 |v_ULTIMATE.start_destroy_#t~mem18#1.base_14| 0))))) .cse18 (exists ((|v_ULTIMATE.start_destroy_#t~mem18#1.base_14| Int) (v_arrayElimCell_133 Int) (v_arrayElimCell_132 Int)) (let ((.cse25 (store (store (store |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_133 (select |c_#valid| v_arrayElimCell_133)) v_arrayElimCell_132 (select |c_#valid| v_arrayElimCell_132)) |c_ULTIMATE.start_destroy_~l#1.base| 0))) (and (= (select .cse25 |v_ULTIMATE.start_destroy_#t~mem18#1.base_14|) 1) (not (= v_arrayElimCell_133 v_arrayElimCell_132)) (= |c_#valid| (store .cse25 |v_ULTIMATE.start_destroy_#t~mem18#1.base_14| 0)) (not (= v_arrayElimCell_133 0)) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_132) 0) (not (= |c_ULTIMATE.start_destroy_~l#1.base| v_arrayElimCell_132)) (not (= |c_ULTIMATE.start_destroy_~l#1.base| v_arrayElimCell_133)) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_133) 0)))) (exists ((|v_ULTIMATE.start_destroy_#t~mem18#1.base_14| Int) (v_arrayElimCell_130 Int)) (and (= (select |c_ULTIMATE.start_main_old_#valid#1| |v_ULTIMATE.start_destroy_#t~mem18#1.base_14|) 0) (= (select (store (store (store |c_ULTIMATE.start_main_old_#valid#1| |v_ULTIMATE.start_destroy_#t~mem18#1.base_14| 1) |c_ULTIMATE.start_destroy_~l#1.base| .cse2) v_arrayElimCell_130 0) |v_ULTIMATE.start_destroy_#t~mem18#1.base_14|) 1) (= |c_#valid| (store (store .cse4 v_arrayElimCell_130 0) |v_ULTIMATE.start_destroy_#t~mem18#1.base_14| 0)) (not (= |v_ULTIMATE.start_destroy_#t~mem18#1.base_14| 0)) (not (= |c_ULTIMATE.start_destroy_~l#1.base| v_arrayElimCell_130)) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_130) 0))) (and .cse26 .cse14) (exists ((|v_ULTIMATE.start_destroy_#t~mem18#1.base_14| Int) (v_arrayElimCell_130 Int) (v_arrayElimCell_133 Int)) (let ((.cse27 (store (store (store |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_133 (select |c_#valid| v_arrayElimCell_133)) |c_ULTIMATE.start_destroy_~l#1.base| .cse2) v_arrayElimCell_130 0))) (and (not (= v_arrayElimCell_133 0)) (= (select .cse27 |v_ULTIMATE.start_destroy_#t~mem18#1.base_14|) 1) (not (= |c_ULTIMATE.start_destroy_~l#1.base| v_arrayElimCell_130)) (= |c_#valid| (store .cse27 |v_ULTIMATE.start_destroy_#t~mem18#1.base_14| 0)) (not (= v_arrayElimCell_133 v_arrayElimCell_130)) (not (= |c_ULTIMATE.start_destroy_~l#1.base| v_arrayElimCell_133)) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_130) 0) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_133) 0)))) .cse5 .cse6 (exists ((|v_ULTIMATE.start_destroy_#t~mem18#1.base_14| Int) (v_arrayElimCell_130 Int) (v_arrayElimCell_133 Int) (v_arrayElimCell_132 Int)) (let ((.cse28 (store (store (store (store |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_133 (select |c_#valid| v_arrayElimCell_133)) v_arrayElimCell_132 (select |c_#valid| v_arrayElimCell_132)) |c_ULTIMATE.start_destroy_~l#1.base| .cse2) v_arrayElimCell_130 0))) (and (not (= v_arrayElimCell_133 v_arrayElimCell_132)) (not (= v_arrayElimCell_133 0)) (not (= |c_ULTIMATE.start_destroy_~l#1.base| v_arrayElimCell_130)) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_132) 0) (= |c_#valid| (store .cse28 |v_ULTIMATE.start_destroy_#t~mem18#1.base_14| 0)) (not (= |c_ULTIMATE.start_destroy_~l#1.base| v_arrayElimCell_132)) (not (= v_arrayElimCell_133 v_arrayElimCell_130)) (not (= |c_ULTIMATE.start_destroy_~l#1.base| v_arrayElimCell_133)) (not (= v_arrayElimCell_132 v_arrayElimCell_130)) (= (select .cse28 |v_ULTIMATE.start_destroy_#t~mem18#1.base_14|) 1) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_133) 0)))) (exists ((|v_ULTIMATE.start_destroy_#t~mem18#1.base_14| Int) (v_arrayElimCell_130 Int) (v_arrayElimCell_133 Int)) (let ((.cse29 (store |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_133 (select |c_#valid| v_arrayElimCell_133)))) (and (= (select |c_ULTIMATE.start_main_old_#valid#1| |v_ULTIMATE.start_destroy_#t~mem18#1.base_14|) 0) (= (select (store (store (store .cse29 |v_ULTIMATE.start_destroy_#t~mem18#1.base_14| 1) |c_ULTIMATE.start_destroy_~l#1.base| .cse2) v_arrayElimCell_130 0) |v_ULTIMATE.start_destroy_#t~mem18#1.base_14|) 1) (not (= v_arrayElimCell_133 0)) (not (= |c_ULTIMATE.start_destroy_~l#1.base| v_arrayElimCell_130)) (= |c_#valid| (store (store (store .cse29 |c_ULTIMATE.start_destroy_~l#1.base| .cse2) v_arrayElimCell_130 0) |v_ULTIMATE.start_destroy_#t~mem18#1.base_14| 0)) (not (= v_arrayElimCell_133 |v_ULTIMATE.start_destroy_#t~mem18#1.base_14|)) (not (= v_arrayElimCell_133 v_arrayElimCell_130)) (not (= |c_ULTIMATE.start_destroy_~l#1.base| v_arrayElimCell_133)) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_133) 0)))) (exists ((v_arrayElimCell_130 Int) (v_arrayElimCell_132 Int)) (and (not (= v_arrayElimCell_132 0)) (= |c_#valid| (store (store .cse4 v_arrayElimCell_130 0) v_arrayElimCell_132 0)) (not (= |c_ULTIMATE.start_destroy_~l#1.base| v_arrayElimCell_130)) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_132) 0) (= (select (store (store (store |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_132 1) |c_ULTIMATE.start_destroy_~l#1.base| .cse2) v_arrayElimCell_130 0) v_arrayElimCell_132) 1))) (exists ((|v_ULTIMATE.start_destroy_#t~mem18#1.base_14| Int) (v_arrayElimCell_130 Int) (v_arrayElimCell_132 Int)) (let ((.cse30 (select |c_#valid| v_arrayElimCell_132))) (and (= (select |c_ULTIMATE.start_main_old_#valid#1| |v_ULTIMATE.start_destroy_#t~mem18#1.base_14|) 0) (= (select (store (store (store (store |c_ULTIMATE.start_main_old_#valid#1| |v_ULTIMATE.start_destroy_#t~mem18#1.base_14| 1) v_arrayElimCell_132 .cse30) |c_ULTIMATE.start_destroy_~l#1.base| .cse2) v_arrayElimCell_130 0) |v_ULTIMATE.start_destroy_#t~mem18#1.base_14|) 1) (not (= |v_ULTIMATE.start_destroy_#t~mem18#1.base_14| 0)) (not (= |c_ULTIMATE.start_destroy_~l#1.base| v_arrayElimCell_130)) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_132) 0) (not (= |c_ULTIMATE.start_destroy_~l#1.base| v_arrayElimCell_132)) (not (= v_arrayElimCell_132 v_arrayElimCell_130)) (= |c_#valid| (store (store (store (store |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_132 .cse30) |c_ULTIMATE.start_destroy_~l#1.base| .cse2) v_arrayElimCell_130 0) |v_ULTIMATE.start_destroy_#t~mem18#1.base_14| 0))))) (exists ((|v_ULTIMATE.start_destroy_#t~mem18#1.base_14| Int) (v_arrayElimCell_132 Int)) (let ((.cse31 (select |c_#valid| v_arrayElimCell_132))) (and (= (select |c_ULTIMATE.start_main_old_#valid#1| |v_ULTIMATE.start_destroy_#t~mem18#1.base_14|) 0) (not (= |v_ULTIMATE.start_destroy_#t~mem18#1.base_14| 0)) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_132) 0) (not (= |c_ULTIMATE.start_destroy_~l#1.base| v_arrayElimCell_132)) (= (select (store (store (store |c_ULTIMATE.start_main_old_#valid#1| |v_ULTIMATE.start_destroy_#t~mem18#1.base_14| 1) v_arrayElimCell_132 .cse31) |c_ULTIMATE.start_destroy_~l#1.base| 0) |v_ULTIMATE.start_destroy_#t~mem18#1.base_14|) 1) (= |c_#valid| (store (store (store |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_132 .cse31) |c_ULTIMATE.start_destroy_~l#1.base| 0) |v_ULTIMATE.start_destroy_#t~mem18#1.base_14| 0))))) (exists ((v_arrayElimCell_130 Int) (v_arrayElimCell_133 Int) (v_arrayElimCell_132 Int)) (let ((.cse34 (select |c_#valid| v_arrayElimCell_132))) (let ((.cse32 (store (store |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_133 (select |c_#valid| v_arrayElimCell_133)) v_arrayElimCell_132 .cse34))) (let ((.cse33 (store (store .cse32 |c_ULTIMATE.start_destroy_~l#1.base| 1) v_arrayElimCell_130 0))) (and (not (= v_arrayElimCell_133 v_arrayElimCell_132)) (not (= v_arrayElimCell_133 0)) (= |c_#valid| (store (store .cse32 v_arrayElimCell_130 0) |c_ULTIMATE.start_destroy_~l#1.base| 0)) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_132) 0) (not (= v_arrayElimCell_133 v_arrayElimCell_130)) (not (= |c_ULTIMATE.start_destroy_~l#1.base| v_arrayElimCell_133)) (= (select .cse33 |c_ULTIMATE.start_destroy_~l#1.base|) 1) (not (= v_arrayElimCell_132 v_arrayElimCell_130)) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_133) 0) (= .cse34 (select .cse33 v_arrayElimCell_132))))))) (exists ((|v_ULTIMATE.start_destroy_#t~mem18#1.base_14| Int) (v_arrayElimCell_133 Int)) (let ((.cse35 (store (store |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_133 (select |c_#valid| v_arrayElimCell_133)) |c_ULTIMATE.start_destroy_~l#1.base| 0))) (and (= (select .cse35 |v_ULTIMATE.start_destroy_#t~mem18#1.base_14|) 1) (= |c_#valid| (store .cse35 |v_ULTIMATE.start_destroy_#t~mem18#1.base_14| 0)) (not (= v_arrayElimCell_133 0)) (not (= |c_ULTIMATE.start_destroy_~l#1.base| v_arrayElimCell_133)) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_133) 0)))) (exists ((v_arrayElimCell_130 Int) (v_arrayElimCell_133 Int)) (let ((.cse36 (store |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_133 (select |c_#valid| v_arrayElimCell_133)))) (and (= |c_#valid| (store (store .cse36 v_arrayElimCell_130 0) |c_ULTIMATE.start_destroy_~l#1.base| 0)) (= (select (store (store .cse36 |c_ULTIMATE.start_destroy_~l#1.base| 1) v_arrayElimCell_130 0) |c_ULTIMATE.start_destroy_~l#1.base|) 1) (not (= v_arrayElimCell_133 0)) (not (= v_arrayElimCell_133 v_arrayElimCell_130)) (not (= |c_ULTIMATE.start_destroy_~l#1.base| v_arrayElimCell_133)) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_130) 0) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_133) 0)))) (exists ((|v_ULTIMATE.start_destroy_#t~mem18#1.base_14| Int) (v_arrayElimCell_130 Int) (v_arrayElimCell_133 Int)) (let ((.cse37 (store (store (store |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_133 (select |c_#valid| v_arrayElimCell_133)) |c_ULTIMATE.start_destroy_~l#1.base| .cse2) v_arrayElimCell_130 0))) (and (not (= v_arrayElimCell_133 0)) (= (select .cse37 |v_ULTIMATE.start_destroy_#t~mem18#1.base_14|) 1) (not (= |c_ULTIMATE.start_destroy_~l#1.base| v_arrayElimCell_130)) (= |c_#valid| (store .cse37 |v_ULTIMATE.start_destroy_#t~mem18#1.base_14| 0)) (not (= v_arrayElimCell_133 v_arrayElimCell_130)) (not (= |c_ULTIMATE.start_destroy_~l#1.base| v_arrayElimCell_133)) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_133) 0)))) (exists ((|v_ULTIMATE.start_destroy_#t~mem18#1.base_14| Int) (v_arrayElimCell_130 Int)) (let ((.cse38 (store .cse4 v_arrayElimCell_130 0))) (and (= (select .cse38 |v_ULTIMATE.start_destroy_#t~mem18#1.base_14|) 1) (= |c_#valid| (store .cse38 |v_ULTIMATE.start_destroy_#t~mem18#1.base_14| 0)) (not (= |c_ULTIMATE.start_destroy_~l#1.base| v_arrayElimCell_130)) (not (= v_arrayElimCell_130 0)) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_130) 0)))) .cse39 (exists ((v_arrayElimCell_130 Int) (v_arrayElimCell_132 Int)) (let ((.cse40 (select |c_#valid| v_arrayElimCell_132))) (let ((.cse42 (store |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_132 .cse40))) (let ((.cse41 (store (store .cse42 |c_ULTIMATE.start_destroy_~l#1.base| 1) v_arrayElimCell_130 0))) (and (= .cse40 (select .cse41 v_arrayElimCell_132)) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_132) 0) (= |c_#valid| (store (store .cse42 v_arrayElimCell_130 0) |c_ULTIMATE.start_destroy_~l#1.base| 0)) (not (= v_arrayElimCell_130 0)) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_130) 0) (= (select .cse41 |c_ULTIMATE.start_destroy_~l#1.base|) 1) (not (= v_arrayElimCell_132 v_arrayElimCell_130))))))) (exists ((|v_ULTIMATE.start_destroy_#t~mem18#1.base_14| Int) (v_arrayElimCell_132 Int)) (let ((.cse43 (store (store |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_132 (select |c_#valid| v_arrayElimCell_132)) |c_ULTIMATE.start_destroy_~l#1.base| 0))) (and (not (= v_arrayElimCell_132 0)) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_132) 0) (not (= |c_ULTIMATE.start_destroy_~l#1.base| v_arrayElimCell_132)) (= (select .cse43 |v_ULTIMATE.start_destroy_#t~mem18#1.base_14|) 1) (= |c_#valid| (store .cse43 |v_ULTIMATE.start_destroy_#t~mem18#1.base_14| 0))))) (and (or .cse18 .cse44 (exists ((|v_ULTIMATE.start_destroy_#t~mem18#1.base_14| Int) (v_arrayElimCell_130 Int) (v_arrayElimCell_132 Int)) (let ((.cse45 (store (store (store |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_132 (select |c_#valid| v_arrayElimCell_132)) |c_ULTIMATE.start_destroy_~l#1.base| .cse2) v_arrayElimCell_130 0))) (and (= (select .cse45 |v_ULTIMATE.start_destroy_#t~mem18#1.base_14|) 1) (not (= |c_ULTIMATE.start_destroy_~l#1.base| v_arrayElimCell_130)) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_132) 0) (not (= |c_ULTIMATE.start_destroy_~l#1.base| v_arrayElimCell_132)) (not (= v_arrayElimCell_132 v_arrayElimCell_130)) (= |c_#valid| (store .cse45 |v_ULTIMATE.start_destroy_#t~mem18#1.base_14| 0))))) .cse26 .cse22 .cse19 (exists ((|v_ULTIMATE.start_destroy_#t~mem18#1.base_14| Int) (v_arrayElimCell_130 Int)) (and (= (select |c_ULTIMATE.start_main_old_#valid#1| |v_ULTIMATE.start_destroy_#t~mem18#1.base_14|) 0) (= (select (store (store (store |c_ULTIMATE.start_main_old_#valid#1| |v_ULTIMATE.start_destroy_#t~mem18#1.base_14| 1) |c_ULTIMATE.start_destroy_~l#1.base| .cse2) v_arrayElimCell_130 0) |v_ULTIMATE.start_destroy_#t~mem18#1.base_14|) 1) (= |c_#valid| (store (store .cse4 v_arrayElimCell_130 0) |v_ULTIMATE.start_destroy_#t~mem18#1.base_14| 0)) (not (= |c_ULTIMATE.start_destroy_~l#1.base| v_arrayElimCell_130)))) .cse39 .cse20 .cse15) .cse14))) .cse51)))) .cse53) (and (or (exists ((|v_ULTIMATE.start_destroy_#t~mem18#1.base_14| Int)) (and (= (select |c_ULTIMATE.start_main_old_#valid#1| |v_ULTIMATE.start_destroy_#t~mem18#1.base_14|) 0) (= |c_#valid| (store .cse17 |v_ULTIMATE.start_destroy_#t~mem18#1.base_14| 0)) (not (= |v_ULTIMATE.start_destroy_#t~mem18#1.base_14| 0)) (= (select (store (store |c_ULTIMATE.start_main_old_#valid#1| |v_ULTIMATE.start_destroy_#t~mem18#1.base_14| 1) |c_ULTIMATE.start_destroy_~l#1.base| 0) |v_ULTIMATE.start_destroy_#t~mem18#1.base_14|) 1))) (and (or (exists ((|v_ULTIMATE.start_destroy_#t~mem18#1.base_14| Int)) (and (exists ((v_arrayElimCell_132 Int)) (let ((.cse54 (select |c_#valid| v_arrayElimCell_132))) (and (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_132) 0) (= (select (store (store (store |c_ULTIMATE.start_main_old_#valid#1| |v_ULTIMATE.start_destroy_#t~mem18#1.base_14| 1) v_arrayElimCell_132 .cse54) |c_ULTIMATE.start_destroy_~l#1.base| 0) |v_ULTIMATE.start_destroy_#t~mem18#1.base_14|) 1) (= |c_#valid| (store (store (store |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_132 .cse54) |c_ULTIMATE.start_destroy_~l#1.base| 0) |v_ULTIMATE.start_destroy_#t~mem18#1.base_14| 0))))) (= (select |c_ULTIMATE.start_main_old_#valid#1| |v_ULTIMATE.start_destroy_#t~mem18#1.base_14|) 0) (not (= |v_ULTIMATE.start_destroy_#t~mem18#1.base_14| 0)))) (and (exists ((v_arrayElimCell_130 Int) (v_DerPreprocessor_5 Int)) (and (= |c_#valid| (store (store |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_130 0) |c_ULTIMATE.start_destroy_~l#1.base| 0)) (= (select (store (store |c_ULTIMATE.start_main_old_#valid#1| |c_ULTIMATE.start_destroy_~l#1.base| v_DerPreprocessor_5) v_arrayElimCell_130 0) |c_ULTIMATE.start_destroy_~l#1.base|) 1) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_130) 0))) .cse14) (exists ((|v_ULTIMATE.start_destroy_#t~mem18#1.base_14| Int)) (and (not (= |c_ULTIMATE.start_destroy_~l#1.base| |v_ULTIMATE.start_destroy_#t~mem18#1.base_14|)) (= (select |c_ULTIMATE.start_main_old_#valid#1| |v_ULTIMATE.start_destroy_#t~mem18#1.base_14|) 0) (not (= |v_ULTIMATE.start_destroy_#t~mem18#1.base_14| 0)) (exists ((v_arrayElimCell_130 Int)) (and (= (select (store (store (store |c_ULTIMATE.start_main_old_#valid#1| |v_ULTIMATE.start_destroy_#t~mem18#1.base_14| 1) |c_ULTIMATE.start_destroy_~l#1.base| .cse2) v_arrayElimCell_130 0) |v_ULTIMATE.start_destroy_#t~mem18#1.base_14|) 1) (= |c_#valid| (store (store .cse4 v_arrayElimCell_130 0) |v_ULTIMATE.start_destroy_#t~mem18#1.base_14| 0)) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_130) 0))))) (exists ((|v_ULTIMATE.start_destroy_#t~mem18#1.base_14| Int)) (and (not (= |c_ULTIMATE.start_destroy_~l#1.base| |v_ULTIMATE.start_destroy_#t~mem18#1.base_14|)) (= (select |c_ULTIMATE.start_main_old_#valid#1| |v_ULTIMATE.start_destroy_#t~mem18#1.base_14|) 0) (not (= |v_ULTIMATE.start_destroy_#t~mem18#1.base_14| 0)) (exists ((v_arrayElimCell_130 Int)) (and (= (select (store (store (store |c_ULTIMATE.start_main_old_#valid#1| |v_ULTIMATE.start_destroy_#t~mem18#1.base_14| 1) |c_ULTIMATE.start_destroy_~l#1.base| .cse2) v_arrayElimCell_130 0) |v_ULTIMATE.start_destroy_#t~mem18#1.base_14|) 1) (= |c_#valid| (store (store .cse4 v_arrayElimCell_130 0) |v_ULTIMATE.start_destroy_#t~mem18#1.base_14| 0)))))) (and (exists ((v_arrayElimCell_130 Int) (v_DerPreprocessor_5 Int)) (and (= |c_#valid| (store (store |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_130 0) |c_ULTIMATE.start_destroy_~l#1.base| 0)) (= (select (store (store |c_ULTIMATE.start_main_old_#valid#1| |c_ULTIMATE.start_destroy_~l#1.base| v_DerPreprocessor_5) v_arrayElimCell_130 0) |c_ULTIMATE.start_destroy_~l#1.base|) 1))) .cse14) (exists ((|v_ULTIMATE.start_destroy_#t~mem18#1.base_14| Int)) (and (not (= |c_ULTIMATE.start_destroy_~l#1.base| |v_ULTIMATE.start_destroy_#t~mem18#1.base_14|)) (= (select |c_ULTIMATE.start_main_old_#valid#1| |v_ULTIMATE.start_destroy_#t~mem18#1.base_14|) 0) (not (= |v_ULTIMATE.start_destroy_#t~mem18#1.base_14| 0)) (exists ((v_arrayElimCell_130 Int) (v_arrayElimCell_132 Int)) (let ((.cse55 (select |c_#valid| v_arrayElimCell_132))) (and (= (select (store (store (store (store |c_ULTIMATE.start_main_old_#valid#1| |v_ULTIMATE.start_destroy_#t~mem18#1.base_14| 1) v_arrayElimCell_132 .cse55) |c_ULTIMATE.start_destroy_~l#1.base| .cse2) v_arrayElimCell_130 0) |v_ULTIMATE.start_destroy_#t~mem18#1.base_14|) 1) (not (= |c_ULTIMATE.start_destroy_~l#1.base| v_arrayElimCell_130)) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_132) 0) (not (= |c_ULTIMATE.start_destroy_~l#1.base| v_arrayElimCell_132)) (not (= v_arrayElimCell_132 v_arrayElimCell_130)) (= |c_#valid| (store (store (store (store |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_132 .cse55) |c_ULTIMATE.start_destroy_~l#1.base| .cse2) v_arrayElimCell_130 0) |v_ULTIMATE.start_destroy_#t~mem18#1.base_14| 0))))))) (and (exists ((v_arrayElimCell_130 Int) (v_arrayElimCell_132 Int) (v_DerPreprocessor_5 Int)) (let ((.cse56 (store |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_132 (select |c_#valid| v_arrayElimCell_132)))) (and (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_132) 0) (not (= |c_ULTIMATE.start_destroy_~l#1.base| v_arrayElimCell_132)) (= |c_#valid| (store (store .cse56 v_arrayElimCell_130 0) |c_ULTIMATE.start_destroy_~l#1.base| 0)) (not (= v_arrayElimCell_132 v_arrayElimCell_130)) (= (select (store (store .cse56 |c_ULTIMATE.start_destroy_~l#1.base| v_DerPreprocessor_5) v_arrayElimCell_130 0) |c_ULTIMATE.start_destroy_~l#1.base|) 1)))) .cse14)) .cse53) (exists ((|v_ULTIMATE.start_destroy_#t~mem18#1.base_14| Int)) (and (exists ((v_arrayElimCell_130 Int)) (and (= (select (store (store (store |c_ULTIMATE.start_main_old_#valid#1| |v_ULTIMATE.start_destroy_#t~mem18#1.base_14| 1) |c_ULTIMATE.start_destroy_~l#1.base| .cse2) v_arrayElimCell_130 0) |v_ULTIMATE.start_destroy_#t~mem18#1.base_14|) 1) (= |c_#valid| (store (store .cse4 v_arrayElimCell_130 0) |v_ULTIMATE.start_destroy_#t~mem18#1.base_14| 0)) (not (= |c_ULTIMATE.start_destroy_~l#1.base| v_arrayElimCell_130)) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_130) 0))) (not (= |c_ULTIMATE.start_destroy_~l#1.base| |v_ULTIMATE.start_destroy_#t~mem18#1.base_14|)) (= (select |c_ULTIMATE.start_main_old_#valid#1| |v_ULTIMATE.start_destroy_#t~mem18#1.base_14|) 0) (not (= |v_ULTIMATE.start_destroy_#t~mem18#1.base_14| 0)))) (and (exists ((v_arrayElimCell_130 Int) (v_DerPreprocessor_3 Int)) (and (= (select (store (store |c_ULTIMATE.start_main_old_#valid#1| |c_ULTIMATE.start_destroy_~l#1.base| v_DerPreprocessor_3) v_arrayElimCell_130 0) |c_ULTIMATE.start_destroy_~l#1.base|) 1) (= |c_#valid| (store (store |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_130 0) |c_ULTIMATE.start_destroy_~l#1.base| 0)) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_130) 0))) .cse14)) .cse51) (and (let ((.cse69 (exists ((v_arrayElimCell_132 Int)) (and (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_132) 0) (= |c_#valid| (store (store (store |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_132 (select |c_#valid| v_arrayElimCell_132)) |c_ULTIMATE.start_destroy_~l#1.base| 0) 0 0)))))) (let ((.cse57 (and .cse14 (exists ((v_arrayElimCell_133 Int)) (and (not (= v_arrayElimCell_133 0)) (= |c_#valid| (store (store .cse4 v_arrayElimCell_133 0) 0 0)) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_133) 0))))) (.cse58 (and (exists ((v_arrayElimCell_133 Int)) (and (not (= v_arrayElimCell_133 0)) (= |c_#valid| (store (store |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_133 0) 0 0)) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_133) 0))) .cse60)) (.cse61 (= (select |c_ULTIMATE.start_main_old_#valid#1| 0) 0)) (.cse59 (and .cse14 .cse69))) (or (and (exists ((v_arrayElimCell_133 Int) (v_arrayElimCell_132 Int)) (and (not (= v_arrayElimCell_132 0)) (not (= v_arrayElimCell_133 v_arrayElimCell_132)) (not (= v_arrayElimCell_133 0)) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_132) 0) (not (= |c_ULTIMATE.start_destroy_~l#1.base| v_arrayElimCell_132)) (= |c_#valid| (store (store (store (store |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_132 (select |c_#valid| v_arrayElimCell_132)) |c_ULTIMATE.start_destroy_~l#1.base| .cse2) v_arrayElimCell_133 0) 0 0)) (not (= |c_ULTIMATE.start_destroy_~l#1.base| v_arrayElimCell_133)) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_133) 0))) .cse14) .cse57 .cse58 .cse59 (and (exists ((v_arrayElimCell_133 Int) (v_arrayElimCell_132 Int)) (and (= |c_#valid| (store (store (store |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_132 (select |c_#valid| v_arrayElimCell_132)) v_arrayElimCell_133 0) 0 0)) (not (= v_arrayElimCell_132 0)) (not (= v_arrayElimCell_133 v_arrayElimCell_132)) (not (= v_arrayElimCell_133 0)) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_132) 0) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_133) 0))) .cse60) (and .cse61 (or .cse57 .cse58)) (and .cse51 (let ((.cse62 (and .cse60 (exists ((v_arrayElimCell_130 Int)) (and (= |c_#valid| (store (store |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_130 0) 0 0)) (not (= v_arrayElimCell_130 0)) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_130) 0))))) (.cse65 (and .cse60 (exists ((v_DerPreprocessor_22 Int) (v_arrayElimCell_130 Int) (v_arrayElimCell_133 Int)) (let ((.cse75 (store |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_133 (select |c_#valid| v_arrayElimCell_133)))) (and (= v_DerPreprocessor_22 (select (store (store .cse75 0 v_DerPreprocessor_22) v_arrayElimCell_130 0) 0)) (not (= v_arrayElimCell_133 0)) (= |c_#valid| (store (store .cse75 v_arrayElimCell_130 0) 0 0)) (not (= v_arrayElimCell_133 v_arrayElimCell_130)) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_133) 0)))))) (.cse63 (and (exists ((v_arrayElimCell_130 Int)) (and (= |c_#valid| (store (store .cse4 v_arrayElimCell_130 0) 0 0)) (not (= v_arrayElimCell_130 0)) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_130) 0))) .cse14)) (.cse68 (exists ((v_arrayElimCell_130 Int) (v_arrayElimCell_132 Int)) (and (not (= v_arrayElimCell_132 0)) (not (= |c_ULTIMATE.start_destroy_~l#1.base| v_arrayElimCell_130)) (= |c_#valid| (store (store (store (store |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_132 (select |c_#valid| v_arrayElimCell_132)) |c_ULTIMATE.start_destroy_~l#1.base| .cse2) v_arrayElimCell_130 0) 0 0)) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_132) 0) (not (= |c_ULTIMATE.start_destroy_~l#1.base| v_arrayElimCell_132)) (not (= v_arrayElimCell_132 v_arrayElimCell_130))))) (.cse67 (exists ((v_arrayElimCell_130 Int)) (= |c_#valid| (store (store .cse4 v_arrayElimCell_130 0) 0 0)))) (.cse70 (exists ((v_arrayElimCell_130 Int)) (and (= |c_#valid| (store (store .cse4 v_arrayElimCell_130 0) 0 0)) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_130) 0))))) (or .cse62 (and .cse61 (or .cse62 .cse63)) (and .cse14 (exists ((v_arrayElimCell_130 Int) (v_arrayElimCell_133 Int)) (and (= |c_#valid| (store (store (store (store |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_133 (select |c_#valid| v_arrayElimCell_133)) |c_ULTIMATE.start_destroy_~l#1.base| .cse2) v_arrayElimCell_130 0) 0 0)) (not (= v_arrayElimCell_133 0)) (not (= |c_ULTIMATE.start_destroy_~l#1.base| v_arrayElimCell_130)) (not (= v_arrayElimCell_133 v_arrayElimCell_130)) (not (= |c_ULTIMATE.start_destroy_~l#1.base| v_arrayElimCell_133)) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_130) 0) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_133) 0)))) (and .cse61 (or (exists ((v_arrayElimCell_133 Int) (v_DerPreprocessor_21 Int)) (let ((.cse64 (store |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_133 (select |c_#valid| v_arrayElimCell_133)))) (and (= (select (store (store .cse64 0 v_DerPreprocessor_21) |c_ULTIMATE.start_destroy_~l#1.base| 0) 0) v_DerPreprocessor_21) (not (= |c_ULTIMATE.start_destroy_~l#1.base| v_arrayElimCell_133)) (= |c_#valid| (store (store .cse64 |c_ULTIMATE.start_destroy_~l#1.base| 0) 0 0)) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_133) 0)))) .cse65 (and .cse14 (exists ((v_arrayElimCell_130 Int) (v_arrayElimCell_133 Int) (v_DerPreprocessor_21 Int)) (let ((.cse66 (store |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_133 (select |c_#valid| v_arrayElimCell_133)))) (and (= |c_#valid| (store (store (store .cse66 |c_ULTIMATE.start_destroy_~l#1.base| .cse2) v_arrayElimCell_130 0) 0 0)) (not (= v_arrayElimCell_133 0)) (not (= |c_ULTIMATE.start_destroy_~l#1.base| v_arrayElimCell_130)) (= v_DerPreprocessor_21 (select (store (store (store .cse66 0 v_DerPreprocessor_21) |c_ULTIMATE.start_destroy_~l#1.base| .cse2) v_arrayElimCell_130 0) 0)) (not (= v_arrayElimCell_133 v_arrayElimCell_130)) (not (= |c_ULTIMATE.start_destroy_~l#1.base| v_arrayElimCell_133)) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_133) 0))))))) (exists ((v_arrayElimCell_133 Int)) (and (not (= |c_ULTIMATE.start_destroy_~l#1.base| v_arrayElimCell_133)) (= |c_#valid| (store (store (store |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_133 (select |c_#valid| v_arrayElimCell_133)) |c_ULTIMATE.start_destroy_~l#1.base| 0) 0 0)) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_133) 0))) .cse65 .cse63 (and (exists ((v_arrayElimCell_130 Int) (v_arrayElimCell_132 Int)) (and (not (= v_arrayElimCell_132 0)) (not (= |c_ULTIMATE.start_destroy_~l#1.base| v_arrayElimCell_130)) (= |c_#valid| (store (store (store (store |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_132 (select |c_#valid| v_arrayElimCell_132)) |c_ULTIMATE.start_destroy_~l#1.base| .cse2) v_arrayElimCell_130 0) 0 0)) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_132) 0) (not (= |c_ULTIMATE.start_destroy_~l#1.base| v_arrayElimCell_132)) (not (= v_arrayElimCell_130 0)) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_130) 0) (not (= v_arrayElimCell_132 v_arrayElimCell_130)))) .cse14) (and .cse67 .cse14) (and .cse68 .cse14) (and .cse60 (exists ((v_arrayElimCell_130 Int) (v_arrayElimCell_132 Int)) (and (not (= v_arrayElimCell_132 0)) (= |c_#valid| (store (store (store |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_132 (select |c_#valid| v_arrayElimCell_132)) v_arrayElimCell_130 0) 0 0)) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_132) 0) (not (= v_arrayElimCell_130 0)) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_130) 0) (not (= v_arrayElimCell_132 v_arrayElimCell_130))))) (and .cse14 (exists ((v_arrayElimCell_130 Int) (v_arrayElimCell_133 Int) (v_arrayElimCell_132 Int)) (and (not (= v_arrayElimCell_132 0)) (not (= v_arrayElimCell_133 v_arrayElimCell_132)) (not (= v_arrayElimCell_133 0)) (not (= |c_ULTIMATE.start_destroy_~l#1.base| v_arrayElimCell_130)) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_132) 0) (not (= |c_ULTIMATE.start_destroy_~l#1.base| v_arrayElimCell_132)) (not (= v_arrayElimCell_133 v_arrayElimCell_130)) (not (= |c_ULTIMATE.start_destroy_~l#1.base| v_arrayElimCell_133)) (not (= v_arrayElimCell_132 v_arrayElimCell_130)) (= |c_#valid| (store (store (store (store (store |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_133 (select |c_#valid| v_arrayElimCell_133)) v_arrayElimCell_132 (select |c_#valid| v_arrayElimCell_132)) |c_ULTIMATE.start_destroy_~l#1.base| .cse2) v_arrayElimCell_130 0) 0 0)) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_133) 0)))) (and (or .cse68 .cse67 .cse69 (and .cse61 (exists ((v_arrayElimCell_130 Int) (v_DerPreprocessor_21 Int)) (and (= v_DerPreprocessor_21 (select (store (store (store |c_ULTIMATE.start_main_old_#valid#1| 0 v_DerPreprocessor_21) |c_ULTIMATE.start_destroy_~l#1.base| .cse2) v_arrayElimCell_130 0) 0)) (= |c_#valid| (store (store .cse4 v_arrayElimCell_130 0) 0 0))))) .cse70) .cse14) (and .cse60 (exists ((v_DerPreprocessor_22 Int) (v_arrayElimCell_130 Int) (v_arrayElimCell_133 Int)) (let ((.cse71 (store |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_133 (select |c_#valid| v_arrayElimCell_133)))) (and (= v_DerPreprocessor_22 (select (store (store .cse71 0 v_DerPreprocessor_22) v_arrayElimCell_130 0) 0)) (not (= v_arrayElimCell_133 0)) (= |c_#valid| (store (store .cse71 v_arrayElimCell_130 0) 0 0)) (not (= v_arrayElimCell_133 v_arrayElimCell_130)) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_130) 0) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_133) 0))))) .cse59 (and .cse60 (exists ((v_arrayElimCell_130 Int) (v_arrayElimCell_133 Int) (v_DerPreprocessor_19 Int)) (let ((.cse72 (store |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_133 (select |c_#valid| v_arrayElimCell_133)))) (and (not (= v_arrayElimCell_133 0)) (= |c_#valid| (store (store .cse72 v_arrayElimCell_130 0) 0 0)) (not (= v_arrayElimCell_133 v_arrayElimCell_130)) (= v_DerPreprocessor_19 (select (store (store .cse72 0 v_DerPreprocessor_19) v_arrayElimCell_130 0) 0)) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_130) 0) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_133) 0))))) (and (exists ((v_DerPreprocessor_22 Int) (v_arrayElimCell_130 Int) (v_arrayElimCell_132 Int)) (let ((.cse73 (store |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_132 (select |c_#valid| v_arrayElimCell_132)))) (and (not (= v_arrayElimCell_132 0)) (= (select (store (store .cse73 0 v_DerPreprocessor_22) v_arrayElimCell_130 0) 0) v_DerPreprocessor_22) (= |c_#valid| (store (store .cse73 v_arrayElimCell_130 0) 0 0)) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_132) 0) (not (= v_arrayElimCell_132 v_arrayElimCell_130))))) .cse60) (and .cse14 .cse70) (exists ((v_arrayElimCell_133 Int) (v_arrayElimCell_132 Int)) (and (not (= v_arrayElimCell_132 0)) (not (= v_arrayElimCell_133 v_arrayElimCell_132)) (not (= v_arrayElimCell_133 0)) (= |c_#valid| (store (store (store (store |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_133 (select |c_#valid| v_arrayElimCell_133)) v_arrayElimCell_132 (select |c_#valid| v_arrayElimCell_132)) |c_ULTIMATE.start_destroy_~l#1.base| 0) 0 0)) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_132) 0) (not (= |c_ULTIMATE.start_destroy_~l#1.base| v_arrayElimCell_132)) (not (= |c_ULTIMATE.start_destroy_~l#1.base| v_arrayElimCell_133)) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_133) 0))) (and .cse60 (exists ((v_DerPreprocessor_22 Int) (v_arrayElimCell_130 Int) (v_arrayElimCell_133 Int) (v_arrayElimCell_132 Int)) (let ((.cse74 (store (store |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_133 (select |c_#valid| v_arrayElimCell_133)) v_arrayElimCell_132 (select |c_#valid| v_arrayElimCell_132)))) (and (not (= v_arrayElimCell_132 0)) (not (= v_arrayElimCell_133 v_arrayElimCell_132)) (not (= v_arrayElimCell_133 0)) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_132) 0) (not (= v_arrayElimCell_133 v_arrayElimCell_130)) (not (= v_arrayElimCell_132 v_arrayElimCell_130)) (= v_DerPreprocessor_22 (select (store (store .cse74 0 v_DerPreprocessor_22) v_arrayElimCell_130 0) 0)) (= |c_#valid| (store (store .cse74 v_arrayElimCell_130 0) 0 0)) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_133) 0))))) (and .cse14 (exists ((v_arrayElimCell_130 Int) (v_arrayElimCell_133 Int)) (and (= |c_#valid| (store (store (store (store |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_133 (select |c_#valid| v_arrayElimCell_133)) |c_ULTIMATE.start_destroy_~l#1.base| .cse2) v_arrayElimCell_130 0) 0 0)) (not (= v_arrayElimCell_133 0)) (not (= |c_ULTIMATE.start_destroy_~l#1.base| v_arrayElimCell_130)) (not (= v_arrayElimCell_133 v_arrayElimCell_130)) (not (= |c_ULTIMATE.start_destroy_~l#1.base| v_arrayElimCell_133)) (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_133) 0)))) (exists ((v_arrayElimCell_132 Int)) (and (= (select |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_132) 0) (not (= |c_ULTIMATE.start_destroy_~l#1.base| v_arrayElimCell_132)) (= |c_#valid| (store (store (store |c_ULTIMATE.start_main_old_#valid#1| v_arrayElimCell_132 (select |c_#valid| v_arrayElimCell_132)) |c_ULTIMATE.start_destroy_~l#1.base| 0) 0 0))))))) (and (= |c_#valid| (store .cse17 0 0)) .cse14)))) .cse53)))) (<= 0 |c_ULTIMATE.start_destroy_~l#1.offset|) (= (select |c_ULTIMATE.start_main_old_#valid#1| |c_ULTIMATE.start_destroy_~l#1.base|) 0)) is different from false [2024-11-28 04:01:50,168 WARN L286 SmtUtils]: Spent 8.88s on a formula simplification. DAG size of input: 248 DAG size of output: 234 (called from [L 388] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2024-11-28 04:02:00,161 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 1 not checked. [2024-11-28 04:02:00,162 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-28 04:02:26,625 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-11-28 04:02:26,625 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 1524 treesize of output 1424 [2024-11-28 04:05:46,112 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1195846997] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-28 04:05:46,113 INFO L185 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2024-11-28 04:05:46,114 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [21, 21] total 38 [2024-11-28 04:05:46,114 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [9336909] [2024-11-28 04:05:46,114 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2024-11-28 04:05:46,114 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 39 states [2024-11-28 04:05:46,114 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 04:05:46,115 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 39 interpolants. [2024-11-28 04:05:46,115 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=150, Invalid=2353, Unknown=55, NotChecked=198, Total=2756 [2024-11-28 04:05:46,116 INFO L87 Difference]: Start difference. First operand 169 states and 190 transitions. Second operand has 39 states, 38 states have (on average 2.236842105263158) internal successors, (85), 36 states have internal predecessors, (85), 1 states have call successors, (1), 1 states have call predecessors, (1), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) [2024-11-28 04:08:24,683 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 04:08:24,683 INFO L93 Difference]: Finished difference Result 171 states and 191 transitions. [2024-11-28 04:08:24,683 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2024-11-28 04:08:24,684 INFO L78 Accepts]: Start accepts. Automaton has has 39 states, 38 states have (on average 2.236842105263158) internal successors, (85), 36 states have internal predecessors, (85), 1 states have call successors, (1), 1 states have call predecessors, (1), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) Word has length 46 [2024-11-28 04:08:24,684 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 04:08:24,684 INFO L225 Difference]: With dead ends: 171 [2024-11-28 04:08:24,684 INFO L226 Difference]: Without dead ends: 142 [2024-11-28 04:08:24,686 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 121 GetRequests, 55 SyntacticMatches, 2 SemanticMatches, 64 ConstructedPredicates, 2 IntricatePredicates, 0 DeprecatedPredicates, 503 ImplicationChecksByTransitivity, 482.8s TimeCoverageRelationStatistics Valid=272, Invalid=3687, Unknown=81, NotChecked=250, Total=4290 [2024-11-28 04:08:24,686 INFO L435 NwaCegarLoop]: 46 mSDtfsCounter, 48 mSDsluCounter, 782 mSDsCounter, 0 mSdLazyCounter, 1346 mSolverCounterSat, 13 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 2.9s Time, 0 mProtectedPredicate, 0 mProtectedAction, 48 SdHoareTripleChecker+Valid, 828 SdHoareTripleChecker+Invalid, 1519 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 13 IncrementalHoareTripleChecker+Valid, 1346 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 160 IncrementalHoareTripleChecker+Unchecked, 3.1s IncrementalHoareTripleChecker+Time [2024-11-28 04:08:24,686 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [48 Valid, 828 Invalid, 1519 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [13 Valid, 1346 Invalid, 0 Unknown, 160 Unchecked, 3.1s Time] [2024-11-28 04:08:24,687 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 142 states. [2024-11-28 04:08:24,689 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 142 to 142. [2024-11-28 04:08:24,689 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 142 states, 119 states have (on average 1.2941176470588236) internal successors, (154), 136 states have internal predecessors, (154), 4 states have call successors, (4), 1 states have call predecessors, (4), 1 states have return successors, (4), 4 states have call predecessors, (4), 4 states have call successors, (4) [2024-11-28 04:08:24,690 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 142 states to 142 states and 162 transitions. [2024-11-28 04:08:24,691 INFO L78 Accepts]: Start accepts. Automaton has 142 states and 162 transitions. Word has length 46 [2024-11-28 04:08:24,691 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 04:08:24,691 INFO L471 AbstractCegarLoop]: Abstraction has 142 states and 162 transitions. [2024-11-28 04:08:24,691 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 39 states, 38 states have (on average 2.236842105263158) internal successors, (85), 36 states have internal predecessors, (85), 1 states have call successors, (1), 1 states have call predecessors, (1), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) [2024-11-28 04:08:24,691 INFO L276 IsEmpty]: Start isEmpty. Operand 142 states and 162 transitions. [2024-11-28 04:08:24,692 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2024-11-28 04:08:24,692 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 04:08:24,692 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 04:08:24,705 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3d345d57-71d6-4e9e-9140-a659b2e77150/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (16)] Ended with exit code 0 [2024-11-28 04:08:24,897 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 16 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3d345d57-71d6-4e9e-9140-a659b2e77150/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable36 [2024-11-28 04:08:24,897 INFO L396 AbstractCegarLoop]: === Iteration 38 === Targeting ULTIMATE.startErr17REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [alloc_and_zeroErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, alloc_and_zeroErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 41 more)] === [2024-11-28 04:08:24,898 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 04:08:24,898 INFO L85 PathProgramCache]: Analyzing trace with hash 2008165579, now seen corresponding path program 1 times [2024-11-28 04:08:24,898 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 04:08:24,898 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1867472606] [2024-11-28 04:08:24,898 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 04:08:24,898 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 04:08:24,929 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 04:08:26,076 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 17 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-11-28 04:08:26,076 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 04:08:26,076 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1867472606] [2024-11-28 04:08:26,077 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1867472606] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-28 04:08:26,077 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1674580164] [2024-11-28 04:08:26,077 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 04:08:26,077 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-28 04:08:26,077 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3d345d57-71d6-4e9e-9140-a659b2e77150/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 04:08:26,079 INFO L229 MonitoredProcess]: Starting monitored process 17 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3d345d57-71d6-4e9e-9140-a659b2e77150/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-28 04:08:26,085 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3d345d57-71d6-4e9e-9140-a659b2e77150/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (17)] Waiting until timeout for monitored process [2024-11-28 04:08:26,353 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 04:08:26,355 INFO L256 TraceCheckSpWp]: Trace formula consists of 387 conjuncts, 57 conjuncts are in the unsatisfiable core [2024-11-28 04:08:26,359 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-28 04:08:26,389 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-11-28 04:08:26,389 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 11 treesize of output 11 [2024-11-28 04:08:26,401 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 1 [2024-11-28 04:08:26,430 INFO L349 Elim1Store]: treesize reduction 21, result has 19.2 percent of original size [2024-11-28 04:08:26,430 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 31 treesize of output 32 [2024-11-28 04:08:26,496 INFO L349 Elim1Store]: treesize reduction 21, result has 19.2 percent of original size [2024-11-28 04:08:26,497 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 42 treesize of output 41 [2024-11-28 04:08:26,513 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 13 [2024-11-28 04:08:26,539 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 1 [2024-11-28 04:08:26,655 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-11-28 04:08:26,655 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 11 treesize of output 11 [2024-11-28 04:08:26,701 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 1 [2024-11-28 04:08:26,708 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 9 [2024-11-28 04:08:26,851 INFO L349 Elim1Store]: treesize reduction 21, result has 19.2 percent of original size [2024-11-28 04:08:26,851 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 62 treesize of output 57 [2024-11-28 04:08:26,859 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 13 [2024-11-28 04:08:26,883 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 13 [2024-11-28 04:08:26,889 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 3 [2024-11-28 04:08:26,923 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 20 proven. 1 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-11-28 04:08:26,924 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-28 04:08:27,035 WARN L851 $PredicateComparison]: unable to prove that (let ((.cse0 (+ 8 |c_ULTIMATE.start_create_~now~0#1.offset|))) (and (forall ((v_ArrVal_2380 (Array Int Int))) (<= 0 (+ 16 (select (select (store |c_#memory_$Pointer$#0.offset| |c_ULTIMATE.start_create_#t~mem11#1.base| v_ArrVal_2380) |c_ULTIMATE.start_create_~now~0#1.base|) .cse0)))) (forall ((v_ArrVal_2380 (Array Int Int)) (v_ArrVal_2379 (Array Int Int))) (<= (+ (select (select (store |c_#memory_$Pointer$#0.offset| |c_ULTIMATE.start_create_#t~mem11#1.base| v_ArrVal_2380) |c_ULTIMATE.start_create_~now~0#1.base|) .cse0) 24) (select |c_#length| (select (select (store |c_#memory_$Pointer$#0.base| |c_ULTIMATE.start_create_#t~mem11#1.base| v_ArrVal_2379) |c_ULTIMATE.start_create_~now~0#1.base|) .cse0)))))) is different from false [2024-11-28 04:08:27,164 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-11-28 04:08:27,164 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 24 treesize of output 25 [2024-11-28 04:08:27,167 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 40 treesize of output 28 [2024-11-28 04:08:27,181 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-11-28 04:08:27,181 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 45 treesize of output 46 [2024-11-28 04:08:27,189 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-11-28 04:08:27,190 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 35 treesize of output 36 [2024-11-28 04:08:27,192 INFO L173 IndexEqualityManager]: detected equality via solver [2024-11-28 04:08:27,195 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 21 [2024-11-28 04:08:27,197 INFO L173 IndexEqualityManager]: detected equality via solver [2024-11-28 04:08:27,200 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 12 [2024-11-28 04:08:27,711 INFO L349 Elim1Store]: treesize reduction 5, result has 70.6 percent of original size [2024-11-28 04:08:27,711 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 22 treesize of output 21 [2024-11-28 04:08:27,716 WARN L851 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_2374 (Array Int Int))) (= (select (select (store |c_#memory_$Pointer$#0.base| |c_ULTIMATE.start_create_#t~mem12#1.base| v_ArrVal_2374) |c_ULTIMATE.start_create_~now~0#1.base|) (+ 8 |c_ULTIMATE.start_create_~now~0#1.offset|)) |c_ULTIMATE.start_create_#t~mem12#1.base|)) is different from false [2024-11-28 04:08:27,723 WARN L851 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_2374 (Array Int Int))) (let ((.cse1 (+ 8 |c_ULTIMATE.start_create_~now~0#1.offset|))) (let ((.cse0 (select (select |c_#memory_$Pointer$#0.base| |c_ULTIMATE.start_create_~now~0#1.base|) .cse1))) (= (select (select (store |c_#memory_$Pointer$#0.base| .cse0 v_ArrVal_2374) |c_ULTIMATE.start_create_~now~0#1.base|) .cse1) .cse0)))) is different from false [2024-11-28 04:08:27,740 WARN L851 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_2374 (Array Int Int)) (v_ArrVal_2373 (Array Int Int))) (let ((.cse1 (store |c_#memory_$Pointer$#0.base| |c_ULTIMATE.start_create_#t~mem11#1.base| v_ArrVal_2373)) (.cse2 (+ 8 |c_ULTIMATE.start_create_~now~0#1.offset|))) (let ((.cse0 (select (select .cse1 |c_ULTIMATE.start_create_~now~0#1.base|) .cse2))) (= .cse0 (select (select (store .cse1 .cse0 v_ArrVal_2374) |c_ULTIMATE.start_create_~now~0#1.base|) .cse2))))) is different from false [2024-11-28 04:08:27,751 WARN L851 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_2374 (Array Int Int)) (v_ArrVal_2373 (Array Int Int))) (let ((.cse2 (+ 8 |c_ULTIMATE.start_create_~now~0#1.offset|))) (let ((.cse0 (store |c_#memory_$Pointer$#0.base| (select (select |c_#memory_$Pointer$#0.base| |c_ULTIMATE.start_create_~now~0#1.base|) .cse2) v_ArrVal_2373))) (let ((.cse1 (select (select .cse0 |c_ULTIMATE.start_create_~now~0#1.base|) .cse2))) (= (select (select (store .cse0 .cse1 v_ArrVal_2374) |c_ULTIMATE.start_create_~now~0#1.base|) .cse2) .cse1))))) is different from false [2024-11-28 04:08:27,767 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-11-28 04:08:27,767 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 63 treesize of output 44 [2024-11-28 04:08:27,773 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 282 treesize of output 198 [2024-11-28 04:08:27,780 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 12 [2024-11-28 04:08:27,785 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2024-11-28 04:08:27,930 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 15 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 6 not checked. [2024-11-28 04:08:27,930 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1674580164] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-28 04:08:27,930 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-28 04:08:27,930 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 17, 19] total 41 [2024-11-28 04:08:27,931 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1706334856] [2024-11-28 04:08:27,931 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-28 04:08:27,931 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 42 states [2024-11-28 04:08:27,931 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 04:08:27,932 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 42 interpolants. [2024-11-28 04:08:27,932 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=133, Invalid=1202, Unknown=17, NotChecked=370, Total=1722 [2024-11-28 04:08:27,933 INFO L87 Difference]: Start difference. First operand 142 states and 162 transitions. Second operand has 42 states, 41 states have (on average 2.024390243902439) internal successors, (83), 36 states have internal predecessors, (83), 3 states have call successors, (3), 3 states have call predecessors, (3), 5 states have return successors, (6), 5 states have call predecessors, (6), 3 states have call successors, (6) [2024-11-28 04:08:29,257 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 04:08:29,257 INFO L93 Difference]: Finished difference Result 141 states and 160 transitions. [2024-11-28 04:08:29,258 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2024-11-28 04:08:29,258 INFO L78 Accepts]: Start accepts. Automaton has has 42 states, 41 states have (on average 2.024390243902439) internal successors, (83), 36 states have internal predecessors, (83), 3 states have call successors, (3), 3 states have call predecessors, (3), 5 states have return successors, (6), 5 states have call predecessors, (6), 3 states have call successors, (6) Word has length 48 [2024-11-28 04:08:29,258 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 04:08:29,259 INFO L225 Difference]: With dead ends: 141 [2024-11-28 04:08:29,259 INFO L226 Difference]: Without dead ends: 141 [2024-11-28 04:08:29,260 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 123 GetRequests, 75 SyntacticMatches, 1 SemanticMatches, 47 ConstructedPredicates, 5 IntricatePredicates, 0 DeprecatedPredicates, 532 ImplicationChecksByTransitivity, 1.8s TimeCoverageRelationStatistics Valid=212, Invalid=1683, Unknown=17, NotChecked=440, Total=2352 [2024-11-28 04:08:29,260 INFO L435 NwaCegarLoop]: 63 mSDtfsCounter, 26 mSDsluCounter, 1098 mSDsCounter, 0 mSdLazyCounter, 558 mSolverCounterSat, 7 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.8s Time, 0 mProtectedPredicate, 0 mProtectedAction, 26 SdHoareTripleChecker+Valid, 1161 SdHoareTripleChecker+Invalid, 724 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 7 IncrementalHoareTripleChecker+Valid, 558 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 159 IncrementalHoareTripleChecker+Unchecked, 0.9s IncrementalHoareTripleChecker+Time [2024-11-28 04:08:29,260 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [26 Valid, 1161 Invalid, 724 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [7 Valid, 558 Invalid, 0 Unknown, 159 Unchecked, 0.9s Time] [2024-11-28 04:08:29,261 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 141 states. [2024-11-28 04:08:29,264 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 141 to 141. [2024-11-28 04:08:29,264 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 141 states, 119 states have (on average 1.2773109243697478) internal successors, (152), 135 states have internal predecessors, (152), 4 states have call successors, (4), 1 states have call predecessors, (4), 1 states have return successors, (4), 4 states have call predecessors, (4), 4 states have call successors, (4) [2024-11-28 04:08:29,265 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 141 states to 141 states and 160 transitions. [2024-11-28 04:08:29,265 INFO L78 Accepts]: Start accepts. Automaton has 141 states and 160 transitions. Word has length 48 [2024-11-28 04:08:29,266 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 04:08:29,266 INFO L471 AbstractCegarLoop]: Abstraction has 141 states and 160 transitions. [2024-11-28 04:08:29,266 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 42 states, 41 states have (on average 2.024390243902439) internal successors, (83), 36 states have internal predecessors, (83), 3 states have call successors, (3), 3 states have call predecessors, (3), 5 states have return successors, (6), 5 states have call predecessors, (6), 3 states have call successors, (6) [2024-11-28 04:08:29,266 INFO L276 IsEmpty]: Start isEmpty. Operand 141 states and 160 transitions. [2024-11-28 04:08:29,267 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2024-11-28 04:08:29,267 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 04:08:29,267 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 04:08:29,280 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3d345d57-71d6-4e9e-9140-a659b2e77150/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (17)] Ended with exit code 0 [2024-11-28 04:08:29,467 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 17 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3d345d57-71d6-4e9e-9140-a659b2e77150/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable37 [2024-11-28 04:08:29,468 INFO L396 AbstractCegarLoop]: === Iteration 39 === Targeting ULTIMATE.startErr28ASSERT_VIOLATIONMEMORY_FREE === [alloc_and_zeroErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, alloc_and_zeroErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 41 more)] === [2024-11-28 04:08:29,468 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 04:08:29,468 INFO L85 PathProgramCache]: Analyzing trace with hash -1122205305, now seen corresponding path program 1 times [2024-11-28 04:08:29,468 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 04:08:29,468 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [696534921] [2024-11-28 04:08:29,468 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 04:08:29,468 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 04:08:29,500 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 04:08:30,584 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 5 proven. 2 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-11-28 04:08:30,584 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 04:08:30,584 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [696534921] [2024-11-28 04:08:30,584 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [696534921] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-28 04:08:30,584 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1042758221] [2024-11-28 04:08:30,585 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-28 04:08:30,585 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-28 04:08:30,585 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3d345d57-71d6-4e9e-9140-a659b2e77150/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 04:08:30,587 INFO L229 MonitoredProcess]: Starting monitored process 18 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3d345d57-71d6-4e9e-9140-a659b2e77150/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-28 04:08:30,588 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3d345d57-71d6-4e9e-9140-a659b2e77150/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (18)] Waiting until timeout for monitored process [2024-11-28 04:08:30,843 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-28 04:08:30,845 INFO L256 TraceCheckSpWp]: Trace formula consists of 373 conjuncts, 68 conjuncts are in the unsatisfiable core [2024-11-28 04:08:30,848 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-28 04:08:31,343 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-11-28 04:08:31,344 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 11 treesize of output 11 [2024-11-28 04:08:31,431 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 1 [2024-11-28 04:08:31,449 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 1 [2024-11-28 04:08:31,578 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 7 [2024-11-28 04:08:31,714 INFO L349 Elim1Store]: treesize reduction 35, result has 20.5 percent of original size [2024-11-28 04:08:31,714 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 32 [2024-11-28 04:08:31,930 INFO L349 Elim1Store]: treesize reduction 21, result has 19.2 percent of original size [2024-11-28 04:08:31,930 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 41 treesize of output 40 [2024-11-28 04:08:32,288 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 12 [2024-11-28 04:08:32,421 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 5 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-28 04:08:32,421 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-28 04:08:33,486 INFO L349 Elim1Store]: treesize reduction 19, result has 68.3 percent of original size [2024-11-28 04:08:33,486 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 2 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 86 treesize of output 103 [2024-11-28 04:08:33,533 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-11-28 04:08:33,533 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 263 treesize of output 256 [2024-11-28 04:08:33,555 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 190 treesize of output 170 [2024-11-28 04:08:33,786 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 4 [2024-11-28 04:08:33,818 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-11-28 04:08:33,819 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 81 treesize of output 99 [2024-11-28 04:08:34,382 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1042758221] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-28 04:08:34,382 INFO L185 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2024-11-28 04:08:34,382 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 20] total 36 [2024-11-28 04:08:34,382 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [169650516] [2024-11-28 04:08:34,382 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2024-11-28 04:08:34,382 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 36 states [2024-11-28 04:08:34,382 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-28 04:08:34,383 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 36 interpolants. [2024-11-28 04:08:34,384 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=145, Invalid=2197, Unknown=10, NotChecked=0, Total=2352 [2024-11-28 04:08:34,384 INFO L87 Difference]: Start difference. First operand 141 states and 160 transitions. Second operand has 36 states, 36 states have (on average 2.4444444444444446) internal successors, (88), 31 states have internal predecessors, (88), 3 states have call successors, (3), 3 states have call predecessors, (3), 4 states have return successors, (4), 4 states have call predecessors, (4), 3 states have call successors, (4) [2024-11-28 04:08:36,930 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-28 04:08:36,930 INFO L93 Difference]: Finished difference Result 161 states and 178 transitions. [2024-11-28 04:08:36,931 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2024-11-28 04:08:36,931 INFO L78 Accepts]: Start accepts. Automaton has has 36 states, 36 states have (on average 2.4444444444444446) internal successors, (88), 31 states have internal predecessors, (88), 3 states have call successors, (3), 3 states have call predecessors, (3), 4 states have return successors, (4), 4 states have call predecessors, (4), 3 states have call successors, (4) Word has length 49 [2024-11-28 04:08:36,931 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-28 04:08:36,932 INFO L225 Difference]: With dead ends: 161 [2024-11-28 04:08:36,932 INFO L226 Difference]: Without dead ends: 161 [2024-11-28 04:08:36,933 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 109 GetRequests, 47 SyntacticMatches, 0 SemanticMatches, 62 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 587 ImplicationChecksByTransitivity, 3.7s TimeCoverageRelationStatistics Valid=280, Invalid=3742, Unknown=10, NotChecked=0, Total=4032 [2024-11-28 04:08:36,934 INFO L435 NwaCegarLoop]: 48 mSDtfsCounter, 57 mSDsluCounter, 1192 mSDsCounter, 0 mSdLazyCounter, 1201 mSolverCounterSat, 14 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 57 SdHoareTripleChecker+Valid, 1240 SdHoareTripleChecker+Invalid, 1215 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 14 IncrementalHoareTripleChecker+Valid, 1201 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.4s IncrementalHoareTripleChecker+Time [2024-11-28 04:08:36,934 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [57 Valid, 1240 Invalid, 1215 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [14 Valid, 1201 Invalid, 0 Unknown, 0 Unchecked, 1.4s Time] [2024-11-28 04:08:36,934 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 161 states. [2024-11-28 04:08:36,937 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 161 to 142. [2024-11-28 04:08:36,937 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 142 states, 120 states have (on average 1.2666666666666666) internal successors, (152), 136 states have internal predecessors, (152), 4 states have call successors, (4), 1 states have call predecessors, (4), 1 states have return successors, (4), 4 states have call predecessors, (4), 4 states have call successors, (4) [2024-11-28 04:08:36,938 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 142 states to 142 states and 160 transitions. [2024-11-28 04:08:36,938 INFO L78 Accepts]: Start accepts. Automaton has 142 states and 160 transitions. Word has length 49 [2024-11-28 04:08:36,938 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-28 04:08:36,938 INFO L471 AbstractCegarLoop]: Abstraction has 142 states and 160 transitions. [2024-11-28 04:08:36,939 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 36 states, 36 states have (on average 2.4444444444444446) internal successors, (88), 31 states have internal predecessors, (88), 3 states have call successors, (3), 3 states have call predecessors, (3), 4 states have return successors, (4), 4 states have call predecessors, (4), 3 states have call successors, (4) [2024-11-28 04:08:36,939 INFO L276 IsEmpty]: Start isEmpty. Operand 142 states and 160 transitions. [2024-11-28 04:08:36,939 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2024-11-28 04:08:36,939 INFO L210 NwaCegarLoop]: Found error trace [2024-11-28 04:08:36,940 INFO L218 NwaCegarLoop]: trace histogram [3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-28 04:08:36,951 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3d345d57-71d6-4e9e-9140-a659b2e77150/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (18)] Ended with exit code 0 [2024-11-28 04:08:37,140 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 18 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3d345d57-71d6-4e9e-9140-a659b2e77150/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable38 [2024-11-28 04:08:37,140 INFO L396 AbstractCegarLoop]: === Iteration 40 === Targeting ULTIMATE.startErr20REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [alloc_and_zeroErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, alloc_and_zeroErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 41 more)] === [2024-11-28 04:08:37,140 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-28 04:08:37,141 INFO L85 PathProgramCache]: Analyzing trace with hash -489530644, now seen corresponding path program 2 times [2024-11-28 04:08:37,141 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-28 04:08:37,141 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [274334907] [2024-11-28 04:08:37,141 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2024-11-28 04:08:37,141 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-28 04:08:37,195 INFO L229 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2024-11-28 04:08:37,195 INFO L230 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-28 04:08:39,580 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 7 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-28 04:08:39,581 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-28 04:08:39,581 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [274334907] [2024-11-28 04:08:39,581 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [274334907] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-28 04:08:39,581 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1604852848] [2024-11-28 04:08:39,581 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2024-11-28 04:08:39,581 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-28 04:08:39,581 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3d345d57-71d6-4e9e-9140-a659b2e77150/bin/uautomizer-verify-aQ6SnzHsRB/z3 [2024-11-28 04:08:39,584 INFO L229 MonitoredProcess]: Starting monitored process 19 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3d345d57-71d6-4e9e-9140-a659b2e77150/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-28 04:08:39,586 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3d345d57-71d6-4e9e-9140-a659b2e77150/bin/uautomizer-verify-aQ6SnzHsRB/z3 -smt2 -in SMTLIB2_COMPLIANT=true (19)] Waiting until timeout for monitored process [2024-11-28 04:08:39,869 INFO L229 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2024-11-28 04:08:39,869 INFO L230 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-28 04:08:39,872 INFO L256 TraceCheckSpWp]: Trace formula consists of 399 conjuncts, 82 conjuncts are in the unsatisfiable core [2024-11-28 04:08:39,875 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-28 04:08:40,264 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2024-11-28 04:08:40,271 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2024-11-28 04:08:40,439 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-11-28 04:08:40,439 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 11 treesize of output 11 [2024-11-28 04:08:40,542 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 17 [2024-11-28 04:08:40,550 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 26 [2024-11-28 04:08:40,812 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-11-28 04:08:40,834 INFO L349 Elim1Store]: treesize reduction 47, result has 16.1 percent of original size [2024-11-28 04:08:40,834 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 2 case distinctions, treesize of input 103 treesize of output 60 [2024-11-28 04:08:40,843 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-11-28 04:08:40,844 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 56 treesize of output 29 [2024-11-28 04:08:41,009 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-11-28 04:08:41,011 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-11-28 04:08:41,032 INFO L349 Elim1Store]: treesize reduction 11, result has 8.3 percent of original size [2024-11-28 04:08:41,032 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 1 case distinctions, treesize of input 111 treesize of output 68 [2024-11-28 04:08:41,042 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-11-28 04:08:41,044 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 60 treesize of output 29 [2024-11-28 04:08:41,927 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 7 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-28 04:08:41,927 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-28 04:09:40,586 INFO L349 Elim1Store]: treesize reduction 1860, result has 38.0 percent of original size [2024-11-28 04:09:40,588 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 2 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 7 new quantified variables, introduced 16 case distinctions, treesize of input 4037273 treesize of output 3674307 [2024-11-28 04:09:44,548 INFO L349 Elim1Store]: treesize reduction 408, result has 30.4 percent of original size [2024-11-28 04:09:44,555 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 2 stores, 10 select indices, 10 select index equivalence classes, 0 disjoint index pairs (out of 45 index pairs), introduced 20 new quantified variables, introduced 56 case distinctions, treesize of input 37896748 treesize of output 23013928 [2024-11-28 04:10:55,778 WARN L286 SmtUtils]: Spent 1.19m on a formula simplification. DAG size of input: 4513 DAG size of output: 2186 (called from [L 728] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher.simplify) [2024-11-28 04:10:59,774 INFO L349 Elim1Store]: treesize reduction 553, result has 28.6 percent of original size [2024-11-28 04:10:59,777 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 10 select indices, 10 select index equivalence classes, 0 disjoint index pairs (out of 45 index pairs), introduced 16 new quantified variables, introduced 56 case distinctions, treesize of input 292071 treesize of output 197985 [2024-11-28 04:11:08,191 INFO L349 Elim1Store]: treesize reduction 77, result has 83.9 percent of original size [2024-11-28 04:11:08,196 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 10 select indices, 10 select index equivalence classes, 0 disjoint index pairs (out of 45 index pairs), introduced 16 new quantified variables, introduced 45 case distinctions, treesize of input 282566 treesize of output 199997 [2024-11-28 04:11:13,490 INFO L224 Elim1Store]: Index analysis took 320 ms [2024-11-28 04:11:16,664 INFO L349 Elim1Store]: treesize reduction 1396, result has 24.4 percent of original size [2024-11-28 04:11:16,666 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 11 select indices, 11 select index equivalence classes, 0 disjoint index pairs (out of 55 index pairs), introduced 12 new quantified variables, introduced 67 case distinctions, treesize of input 197505 treesize of output 187003 [2024-11-28 04:11:22,900 INFO L224 Elim1Store]: Index analysis took 225 ms [2024-11-28 04:11:26,890 INFO L349 Elim1Store]: treesize reduction 24, result has 96.6 percent of original size [2024-11-28 04:11:26,893 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 9 select indices, 9 select index equivalence classes, 0 disjoint index pairs (out of 36 index pairs), introduced 9 new quantified variables, introduced 36 case distinctions, treesize of input 184604 treesize of output 179435