./Ultimate.py --spec ../../sv-benchmarks/c/properties/termination.prp --file ../../sv-benchmarks/c/seq-mthreaded/pals_lcr.6.ufo.UNBOUNDED.pals.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version d790fecc Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3950f7cc-6425-4a4c-9120-65d1a3b61ac3/bin/uautomizer-verify-84ZbGMXZE1/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3950f7cc-6425-4a4c-9120-65d1a3b61ac3/bin/uautomizer-verify-84ZbGMXZE1/plugins/org.eclipse.equinox.launcher_1.6.800.v20240513-1750.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3950f7cc-6425-4a4c-9120-65d1a3b61ac3/bin/uautomizer-verify-84ZbGMXZE1/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3950f7cc-6425-4a4c-9120-65d1a3b61ac3/bin/uautomizer-verify-84ZbGMXZE1/config/AutomizerTermination.xml -i ../../sv-benchmarks/c/seq-mthreaded/pals_lcr.6.ufo.UNBOUNDED.pals.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3950f7cc-6425-4a4c-9120-65d1a3b61ac3/bin/uautomizer-verify-84ZbGMXZE1/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3950f7cc-6425-4a4c-9120-65d1a3b61ac3/bin/uautomizer-verify-84ZbGMXZE1 --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 71881827e42af7e93d8d7789f21cf70c42c80b5b7128690239afcf02ba9daf37 --- Real Ultimate output --- This is Ultimate 0.3.0-dev-d790fec [2024-12-02 12:49:41,670 INFO L188 SettingsManager]: Resetting all preferences to default values... [2024-12-02 12:49:41,722 INFO L114 SettingsManager]: Loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3950f7cc-6425-4a4c-9120-65d1a3b61ac3/bin/uautomizer-verify-84ZbGMXZE1/config/svcomp-Termination-32bit-Automizer_Default.epf [2024-12-02 12:49:41,725 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2024-12-02 12:49:41,725 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2024-12-02 12:49:41,746 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2024-12-02 12:49:41,746 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2024-12-02 12:49:41,746 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2024-12-02 12:49:41,747 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2024-12-02 12:49:41,747 INFO L153 SettingsManager]: * Use memory slicer=true [2024-12-02 12:49:41,747 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2024-12-02 12:49:41,747 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2024-12-02 12:49:41,747 INFO L153 SettingsManager]: * Use SBE=true [2024-12-02 12:49:41,748 INFO L151 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2024-12-02 12:49:41,748 INFO L153 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2024-12-02 12:49:41,748 INFO L153 SettingsManager]: * Use old map elimination=false [2024-12-02 12:49:41,748 INFO L153 SettingsManager]: * Use external solver (rank synthesis)=false [2024-12-02 12:49:41,748 INFO L153 SettingsManager]: * Use only trivial implications for array writes=true [2024-12-02 12:49:41,748 INFO L153 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2024-12-02 12:49:41,748 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2024-12-02 12:49:41,748 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2024-12-02 12:49:41,748 INFO L153 SettingsManager]: * sizeof long=4 [2024-12-02 12:49:41,748 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2024-12-02 12:49:41,749 INFO L153 SettingsManager]: * sizeof POINTER=4 [2024-12-02 12:49:41,749 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2024-12-02 12:49:41,749 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2024-12-02 12:49:41,749 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2024-12-02 12:49:41,749 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2024-12-02 12:49:41,749 INFO L153 SettingsManager]: * Check unreachability of reach_error function=false [2024-12-02 12:49:41,749 INFO L153 SettingsManager]: * sizeof long double=12 [2024-12-02 12:49:41,749 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2024-12-02 12:49:41,749 INFO L153 SettingsManager]: * Assume nondeterminstic values are in range=false [2024-12-02 12:49:41,749 INFO L153 SettingsManager]: * Behaviour of calls to undefined functions=OVERAPPROXIMATE_BEHAVIOUR [2024-12-02 12:49:41,749 INFO L153 SettingsManager]: * Use constant arrays=true [2024-12-02 12:49:41,750 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2024-12-02 12:49:41,750 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-12-02 12:49:41,750 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2024-12-02 12:49:41,750 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL_NO_AM [2024-12-02 12:49:41,750 INFO L151 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2024-12-02 12:49:41,750 INFO L153 SettingsManager]: * TransformationType=MODULO_NEIGHBOR Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3950f7cc-6425-4a4c-9120-65d1a3b61ac3/bin/uautomizer-verify-84ZbGMXZE1 Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 71881827e42af7e93d8d7789f21cf70c42c80b5b7128690239afcf02ba9daf37 [2024-12-02 12:49:41,978 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2024-12-02 12:49:41,986 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2024-12-02 12:49:41,989 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2024-12-02 12:49:41,990 INFO L270 PluginConnector]: Initializing CDTParser... [2024-12-02 12:49:41,990 INFO L274 PluginConnector]: CDTParser initialized [2024-12-02 12:49:41,991 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3950f7cc-6425-4a4c-9120-65d1a3b61ac3/bin/uautomizer-verify-84ZbGMXZE1/../../sv-benchmarks/c/seq-mthreaded/pals_lcr.6.ufo.UNBOUNDED.pals.c [2024-12-02 12:49:44,586 INFO L533 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3950f7cc-6425-4a4c-9120-65d1a3b61ac3/bin/uautomizer-verify-84ZbGMXZE1/data/b988f1422/ffc879fecc1a4d63b06c1025d0d52762/FLAG249000cf1 [2024-12-02 12:49:44,801 INFO L384 CDTParser]: Found 1 translation units. [2024-12-02 12:49:44,802 INFO L180 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3950f7cc-6425-4a4c-9120-65d1a3b61ac3/sv-benchmarks/c/seq-mthreaded/pals_lcr.6.ufo.UNBOUNDED.pals.c [2024-12-02 12:49:44,810 INFO L427 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3950f7cc-6425-4a4c-9120-65d1a3b61ac3/bin/uautomizer-verify-84ZbGMXZE1/data/b988f1422/ffc879fecc1a4d63b06c1025d0d52762/FLAG249000cf1 [2024-12-02 12:49:45,173 INFO L435 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3950f7cc-6425-4a4c-9120-65d1a3b61ac3/bin/uautomizer-verify-84ZbGMXZE1/data/b988f1422/ffc879fecc1a4d63b06c1025d0d52762 [2024-12-02 12:49:45,175 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2024-12-02 12:49:45,176 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2024-12-02 12:49:45,177 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2024-12-02 12:49:45,177 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2024-12-02 12:49:45,180 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2024-12-02 12:49:45,181 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 02.12 12:49:45" (1/1) ... [2024-12-02 12:49:45,181 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@32720393 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 12:49:45, skipping insertion in model container [2024-12-02 12:49:45,181 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 02.12 12:49:45" (1/1) ... [2024-12-02 12:49:45,202 INFO L175 MainTranslator]: Built tables and reachable declarations [2024-12-02 12:49:45,372 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-12-02 12:49:45,383 INFO L200 MainTranslator]: Completed pre-run [2024-12-02 12:49:45,430 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-12-02 12:49:45,445 INFO L204 MainTranslator]: Completed translation [2024-12-02 12:49:45,445 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 12:49:45 WrapperNode [2024-12-02 12:49:45,445 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2024-12-02 12:49:45,446 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2024-12-02 12:49:45,446 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2024-12-02 12:49:45,446 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2024-12-02 12:49:45,451 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 12:49:45" (1/1) ... [2024-12-02 12:49:45,461 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 12:49:45" (1/1) ... [2024-12-02 12:49:45,488 INFO L138 Inliner]: procedures = 26, calls = 18, calls flagged for inlining = 13, calls inlined = 13, statements flattened = 376 [2024-12-02 12:49:45,489 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2024-12-02 12:49:45,489 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2024-12-02 12:49:45,489 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2024-12-02 12:49:45,490 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2024-12-02 12:49:45,499 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 12:49:45" (1/1) ... [2024-12-02 12:49:45,499 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 12:49:45" (1/1) ... [2024-12-02 12:49:45,502 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 12:49:45" (1/1) ... [2024-12-02 12:49:45,517 INFO L175 MemorySlicer]: Split 2 memory accesses to 1 slices as follows [2]. 100 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2]. The 0 writes are split as follows [0]. [2024-12-02 12:49:45,517 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 12:49:45" (1/1) ... [2024-12-02 12:49:45,517 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 12:49:45" (1/1) ... [2024-12-02 12:49:45,525 INFO L184 PluginConnector]: Executing the observer ReplaceArrayAssignments from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 12:49:45" (1/1) ... [2024-12-02 12:49:45,526 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 12:49:45" (1/1) ... [2024-12-02 12:49:45,532 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 12:49:45" (1/1) ... [2024-12-02 12:49:45,534 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 12:49:45" (1/1) ... [2024-12-02 12:49:45,536 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 12:49:45" (1/1) ... [2024-12-02 12:49:45,539 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2024-12-02 12:49:45,540 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2024-12-02 12:49:45,540 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2024-12-02 12:49:45,540 INFO L274 PluginConnector]: RCFGBuilder initialized [2024-12-02 12:49:45,541 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 12:49:45" (1/1) ... [2024-12-02 12:49:45,547 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-12-02 12:49:45,559 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3950f7cc-6425-4a4c-9120-65d1a3b61ac3/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-02 12:49:45,571 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3950f7cc-6425-4a4c-9120-65d1a3b61ac3/bin/uautomizer-verify-84ZbGMXZE1/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-12-02 12:49:45,573 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3950f7cc-6425-4a4c-9120-65d1a3b61ac3/bin/uautomizer-verify-84ZbGMXZE1/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2024-12-02 12:49:45,600 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2024-12-02 12:49:45,600 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#0 [2024-12-02 12:49:45,600 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2024-12-02 12:49:45,600 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2024-12-02 12:49:45,688 INFO L234 CfgBuilder]: Building ICFG [2024-12-02 12:49:45,689 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2024-12-02 12:49:46,090 INFO L? ?]: Removed 45 outVars from TransFormulas that were not future-live. [2024-12-02 12:49:46,090 INFO L283 CfgBuilder]: Performing block encoding [2024-12-02 12:49:46,102 INFO L307 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2024-12-02 12:49:46,102 INFO L312 CfgBuilder]: Removed 2 assume(true) statements. [2024-12-02 12:49:46,102 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 02.12 12:49:46 BoogieIcfgContainer [2024-12-02 12:49:46,102 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2024-12-02 12:49:46,103 INFO L112 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2024-12-02 12:49:46,103 INFO L270 PluginConnector]: Initializing BuchiAutomizer... [2024-12-02 12:49:46,109 INFO L274 PluginConnector]: BuchiAutomizer initialized [2024-12-02 12:49:46,110 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2024-12-02 12:49:46,110 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 02.12 12:49:45" (1/3) ... [2024-12-02 12:49:46,111 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@8ccaada and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 02.12 12:49:46, skipping insertion in model container [2024-12-02 12:49:46,111 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2024-12-02 12:49:46,111 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 12:49:45" (2/3) ... [2024-12-02 12:49:46,111 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@8ccaada and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 02.12 12:49:46, skipping insertion in model container [2024-12-02 12:49:46,111 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2024-12-02 12:49:46,112 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 02.12 12:49:46" (3/3) ... [2024-12-02 12:49:46,112 INFO L363 chiAutomizerObserver]: Analyzing ICFG pals_lcr.6.ufo.UNBOUNDED.pals.c [2024-12-02 12:49:46,170 INFO L300 stractBuchiCegarLoop]: Interprodecural is true [2024-12-02 12:49:46,170 INFO L301 stractBuchiCegarLoop]: Hoare is None [2024-12-02 12:49:46,170 INFO L302 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2024-12-02 12:49:46,170 INFO L303 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2024-12-02 12:49:46,170 INFO L304 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2024-12-02 12:49:46,171 INFO L305 stractBuchiCegarLoop]: Difference is false [2024-12-02 12:49:46,171 INFO L306 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2024-12-02 12:49:46,171 INFO L310 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2024-12-02 12:49:46,177 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 100 states, 99 states have (on average 1.7474747474747474) internal successors, (173), 99 states have internal predecessors, (173), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-12-02 12:49:46,193 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 50 [2024-12-02 12:49:46,193 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-12-02 12:49:46,193 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-12-02 12:49:46,198 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1] [2024-12-02 12:49:46,198 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 12:49:46,199 INFO L332 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2024-12-02 12:49:46,199 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 100 states, 99 states have (on average 1.7474747474747474) internal successors, (173), 99 states have internal predecessors, (173), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-12-02 12:49:46,203 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 50 [2024-12-02 12:49:46,204 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-12-02 12:49:46,204 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-12-02 12:49:46,205 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1] [2024-12-02 12:49:46,205 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 12:49:46,210 INFO L747 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(32, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~r1~0 := 0;~p1~0 := 0;~p1_old~0 := 0;~p1_new~0 := 0;~id1~0 := 0;~st1~0 := 0;~send1~0 := 0;~mode1~0 := 0;~p2~0 := 0;~p2_old~0 := 0;~p2_new~0 := 0;~id2~0 := 0;~st2~0 := 0;~send2~0 := 0;~mode2~0 := 0;~p3~0 := 0;~p3_old~0 := 0;~p3_new~0 := 0;~id3~0 := 0;~st3~0 := 0;~send3~0 := 0;~mode3~0 := 0;~p4~0 := 0;~p4_old~0 := 0;~p4_new~0 := 0;~id4~0 := 0;~st4~0 := 0;~send4~0 := 0;~mode4~0 := 0;~p5~0 := 0;~p5_old~0 := 0;~p5_new~0 := 0;~id5~0 := 0;~st5~0 := 0;~send5~0 := 0;~mode5~0 := 0;~p6~0 := 0;~p6_old~0 := 0;~p6_new~0 := 0;~id6~0 := 0;~st6~0 := 0;~send6~0 := 0;~mode6~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~ret29#1, main_#t~ret30#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;havoc main_#t~nondet4#1;~r1~0 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;~id1~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_#t~nondet6#1;~st1~0 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_#t~nondet7#1;~send1~0 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_#t~nondet8#1;assume 0 == main_#t~nondet8#1 || 1 == main_#t~nondet8#1;~mode1~0 := (if 0 == main_#t~nondet8#1 % 256 then 0 else 1);havoc main_#t~nondet8#1;havoc main_#t~nondet9#1;~id2~0 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_#t~nondet10#1;~st2~0 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_#t~nondet11#1;~send2~0 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_#t~nondet12#1;assume 0 == main_#t~nondet12#1 || 1 == main_#t~nondet12#1;~mode2~0 := (if 0 == main_#t~nondet12#1 % 256 then 0 else 1);havoc main_#t~nondet12#1;havoc main_#t~nondet13#1;~id3~0 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_#t~nondet14#1;~st3~0 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_#t~nondet15#1;~send3~0 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_#t~nondet16#1;assume 0 == main_#t~nondet16#1 || 1 == main_#t~nondet16#1;~mode3~0 := (if 0 == main_#t~nondet16#1 % 256 then 0 else 1);havoc main_#t~nondet16#1;havoc main_#t~nondet17#1;~id4~0 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_#t~nondet18#1;~st4~0 := main_#t~nondet18#1;havoc main_#t~nondet18#1;havoc main_#t~nondet19#1;~send4~0 := main_#t~nondet19#1;havoc main_#t~nondet19#1;havoc main_#t~nondet20#1;assume 0 == main_#t~nondet20#1 || 1 == main_#t~nondet20#1;~mode4~0 := (if 0 == main_#t~nondet20#1 % 256 then 0 else 1);havoc main_#t~nondet20#1;havoc main_#t~nondet21#1;~id5~0 := main_#t~nondet21#1;havoc main_#t~nondet21#1;havoc main_#t~nondet22#1;~st5~0 := main_#t~nondet22#1;havoc main_#t~nondet22#1;havoc main_#t~nondet23#1;~send5~0 := main_#t~nondet23#1;havoc main_#t~nondet23#1;havoc main_#t~nondet24#1;assume 0 == main_#t~nondet24#1 || 1 == main_#t~nondet24#1;~mode5~0 := (if 0 == main_#t~nondet24#1 % 256 then 0 else 1);havoc main_#t~nondet24#1;havoc main_#t~nondet25#1;~id6~0 := main_#t~nondet25#1;havoc main_#t~nondet25#1;havoc main_#t~nondet26#1;~st6~0 := main_#t~nondet26#1;havoc main_#t~nondet26#1;havoc main_#t~nondet27#1;~send6~0 := main_#t~nondet27#1;havoc main_#t~nondet27#1;havoc main_#t~nondet28#1;assume 0 == main_#t~nondet28#1 || 1 == main_#t~nondet28#1;~mode6~0 := (if 0 == main_#t~nondet28#1 % 256 then 0 else 1);havoc main_#t~nondet28#1;assume { :begin_inline_init } true;havoc init_#res#1;havoc init_~tmp~0#1;havoc init_~tmp~0#1;" "assume !(0 == (if ~r1~0 % 256 % 4294967296 <= 2147483647 then ~r1~0 % 256 % 4294967296 else ~r1~0 % 256 % 4294967296 - 4294967296));init_~tmp~0#1 := 0;" "init_#res#1 := init_~tmp~0#1;" "main_#t~ret29#1 := init_#res#1;havoc init_~tmp~0#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret29#1;havoc main_#t~ret29#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1;" "assume !(0 == assume_abort_if_not_~cond#1);" "havoc assume_abort_if_not_~cond#1;havoc assume_abort_if_not_#in~cond#1;assume { :end_inline_assume_abort_if_not } true;~p1_old~0 := ~nomsg~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~nomsg~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~nomsg~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~nomsg~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~nomsg~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~nomsg~0;~p6_new~0 := ~nomsg~0;main_~i2~0#1 := 0;" [2024-12-02 12:49:46,210 INFO L749 eck$LassoCheckResult]: Loop: "assume { :begin_inline_node1 } true;havoc node1_~m1~0#1;havoc node1_~m1~0#1;node1_~m1~0#1 := ~nomsg~0;" "assume !(0 != ~mode1~0 % 256);~p1_new~0 := (if (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 <= 127 then (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 else (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 - 256);~mode1~0 := 1;" "havoc node1_~m1~0#1;assume { :end_inline_node1 } true;assume { :begin_inline_node2 } true;havoc node2_~m2~0#1;havoc node2_~m2~0#1;node2_~m2~0#1 := ~nomsg~0;" "assume !(0 != ~mode2~0 % 256);~p2_new~0 := (if (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 <= 127 then (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 else (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 - 256);~mode2~0 := 1;" "havoc node2_~m2~0#1;assume { :end_inline_node2 } true;assume { :begin_inline_node3 } true;havoc node3_~m3~0#1;havoc node3_~m3~0#1;node3_~m3~0#1 := ~nomsg~0;" "assume !(0 != ~mode3~0 % 256);~p3_new~0 := (if (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 <= 127 then (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 else (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 - 256);~mode3~0 := 1;" "havoc node3_~m3~0#1;assume { :end_inline_node3 } true;assume { :begin_inline_node4 } true;havoc node4_~m4~0#1;havoc node4_~m4~0#1;node4_~m4~0#1 := ~nomsg~0;" "assume !(0 != ~mode4~0 % 256);~p4_new~0 := (if (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 <= 127 then (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 else (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 - 256);~mode4~0 := 1;" "havoc node4_~m4~0#1;assume { :end_inline_node4 } true;assume { :begin_inline_node5 } true;havoc node5_~m5~0#1;havoc node5_~m5~0#1;node5_~m5~0#1 := ~nomsg~0;" "assume !(0 != ~mode5~0 % 256);~p5_new~0 := (if (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 <= 127 then (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 else (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 - 256);~mode5~0 := 1;" "havoc node5_~m5~0#1;assume { :end_inline_node5 } true;assume { :begin_inline_node6 } true;havoc node6_~m6~0#1;havoc node6_~m6~0#1;node6_~m6~0#1 := ~nomsg~0;" "assume !(0 != ~mode6~0 % 256);~p6_new~0 := (if (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 <= 127 then (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 else (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 - 256);~mode6~0 := 1;" "havoc node6_~m6~0#1;assume { :end_inline_node6 } true;~p1_old~0 := ~p1_new~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~p2_new~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~p3_new~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~p4_new~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~p5_new~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~p6_new~0;~p6_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_~tmp~1#1;havoc check_~tmp~1#1;" "assume !(~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0 + ~st6~0 <= 1);check_~tmp~1#1 := 0;" "check_#res#1 := check_~tmp~1#1;" "main_#t~ret30#1 := check_#res#1;havoc check_~tmp~1#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret30#1;havoc main_#t~ret30#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1;" "assume !(0 == assert_~arg#1 % 256);" "havoc assert_~arg#1;havoc assert_#in~arg#1;assume { :end_inline_assert } true;" [2024-12-02 12:49:46,216 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 12:49:46,216 INFO L85 PathProgramCache]: Analyzing trace with hash 2030119858, now seen corresponding path program 1 times [2024-12-02 12:49:46,221 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM [2024-12-02 12:49:46,222 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [347499366] [2024-12-02 12:49:46,222 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 12:49:46,222 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 12:49:46,309 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 12:49:46,488 INFO L136 FreeRefinementEngine]: Strategy CAMEL_NO_AM found an infeasible trace [2024-12-02 12:49:46,488 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [347499366] [2024-12-02 12:49:46,489 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [347499366] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-02 12:49:46,489 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2097310053] [2024-12-02 12:49:46,489 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 12:49:46,489 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 12:49:46,489 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3950f7cc-6425-4a4c-9120-65d1a3b61ac3/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-02 12:49:46,491 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3950f7cc-6425-4a4c-9120-65d1a3b61ac3/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-12-02 12:49:46,493 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3950f7cc-6425-4a4c-9120-65d1a3b61ac3/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2024-12-02 12:49:46,584 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 12:49:46,586 INFO L256 TraceCheckSpWp]: Trace formula consists of 167 conjuncts, 11 conjuncts are in the unsatisfiable core [2024-12-02 12:49:46,590 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-02 12:49:46,617 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-12-02 12:49:46,630 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2097310053] provided 0 perfect and 2 imperfect interpolant sequences [2024-12-02 12:49:46,630 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-12-02 12:49:46,631 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5, 5] total 5 [2024-12-02 12:49:46,632 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1802479025] [2024-12-02 12:49:46,633 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-12-02 12:49:46,636 INFO L752 eck$LassoCheckResult]: stem already infeasible [2024-12-02 12:49:46,636 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 12:49:46,636 INFO L85 PathProgramCache]: Analyzing trace with hash 1350434034, now seen corresponding path program 1 times [2024-12-02 12:49:46,636 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM [2024-12-02 12:49:46,636 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1449262912] [2024-12-02 12:49:46,636 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 12:49:46,637 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 12:49:46,680 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 12:49:46,891 INFO L136 FreeRefinementEngine]: Strategy CAMEL_NO_AM found an infeasible trace [2024-12-02 12:49:46,892 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1449262912] [2024-12-02 12:49:46,892 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1449262912] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-02 12:49:46,892 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [776868262] [2024-12-02 12:49:46,892 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 12:49:46,892 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 12:49:46,892 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3950f7cc-6425-4a4c-9120-65d1a3b61ac3/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-02 12:49:46,894 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3950f7cc-6425-4a4c-9120-65d1a3b61ac3/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-12-02 12:49:46,896 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3950f7cc-6425-4a4c-9120-65d1a3b61ac3/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2024-12-02 12:49:46,963 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 12:49:46,964 INFO L256 TraceCheckSpWp]: Trace formula consists of 87 conjuncts, 11 conjuncts are in the unsatisfiable core [2024-12-02 12:49:46,966 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-02 12:49:46,984 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-12-02 12:49:47,055 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [776868262] provided 0 perfect and 2 imperfect interpolant sequences [2024-12-02 12:49:47,055 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-12-02 12:49:47,055 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5, 5] total 7 [2024-12-02 12:49:47,056 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [524486033] [2024-12-02 12:49:47,056 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-12-02 12:49:47,056 INFO L764 eck$LassoCheckResult]: loop already infeasible [2024-12-02 12:49:47,057 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL_NO_AM [2024-12-02 12:49:47,084 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 12:49:47,084 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-12-02 12:49:47,086 INFO L87 Difference]: Start difference. First operand has 100 states, 99 states have (on average 1.7474747474747474) internal successors, (173), 99 states have internal predecessors, (173), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 5 states, 5 states have (on average 1.4) internal successors, (7), 5 states have internal predecessors, (7), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-12-02 12:49:47,190 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 12:49:47,190 INFO L93 Difference]: Finished difference Result 98 states and 167 transitions. [2024-12-02 12:49:47,192 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 98 states and 167 transitions. [2024-12-02 12:49:47,194 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 48 [2024-12-02 12:49:47,200 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 98 states to 94 states and 124 transitions. [2024-12-02 12:49:47,201 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 94 [2024-12-02 12:49:47,201 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 94 [2024-12-02 12:49:47,202 INFO L73 IsDeterministic]: Start isDeterministic. Operand 94 states and 124 transitions. [2024-12-02 12:49:47,203 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-12-02 12:49:47,203 INFO L218 hiAutomatonCegarLoop]: Abstraction has 94 states and 124 transitions. [2024-12-02 12:49:47,211 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 94 states and 124 transitions. [2024-12-02 12:49:47,222 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 94 to 94. [2024-12-02 12:49:47,223 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 94 states, 94 states have (on average 1.3191489361702127) internal successors, (124), 93 states have internal predecessors, (124), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-12-02 12:49:47,224 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 94 states to 94 states and 124 transitions. [2024-12-02 12:49:47,225 INFO L240 hiAutomatonCegarLoop]: Abstraction has 94 states and 124 transitions. [2024-12-02 12:49:47,226 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-12-02 12:49:47,229 INFO L425 stractBuchiCegarLoop]: Abstraction has 94 states and 124 transitions. [2024-12-02 12:49:47,229 INFO L332 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2024-12-02 12:49:47,229 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 94 states and 124 transitions. [2024-12-02 12:49:47,231 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 48 [2024-12-02 12:49:47,231 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-12-02 12:49:47,231 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-12-02 12:49:47,232 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 12:49:47,232 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 12:49:47,233 INFO L747 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(32, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~r1~0 := 0;~p1~0 := 0;~p1_old~0 := 0;~p1_new~0 := 0;~id1~0 := 0;~st1~0 := 0;~send1~0 := 0;~mode1~0 := 0;~p2~0 := 0;~p2_old~0 := 0;~p2_new~0 := 0;~id2~0 := 0;~st2~0 := 0;~send2~0 := 0;~mode2~0 := 0;~p3~0 := 0;~p3_old~0 := 0;~p3_new~0 := 0;~id3~0 := 0;~st3~0 := 0;~send3~0 := 0;~mode3~0 := 0;~p4~0 := 0;~p4_old~0 := 0;~p4_new~0 := 0;~id4~0 := 0;~st4~0 := 0;~send4~0 := 0;~mode4~0 := 0;~p5~0 := 0;~p5_old~0 := 0;~p5_new~0 := 0;~id5~0 := 0;~st5~0 := 0;~send5~0 := 0;~mode5~0 := 0;~p6~0 := 0;~p6_old~0 := 0;~p6_new~0 := 0;~id6~0 := 0;~st6~0 := 0;~send6~0 := 0;~mode6~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~ret29#1, main_#t~ret30#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;havoc main_#t~nondet4#1;~r1~0 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;~id1~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_#t~nondet6#1;~st1~0 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_#t~nondet7#1;~send1~0 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_#t~nondet8#1;assume 0 == main_#t~nondet8#1 || 1 == main_#t~nondet8#1;~mode1~0 := (if 0 == main_#t~nondet8#1 % 256 then 0 else 1);havoc main_#t~nondet8#1;havoc main_#t~nondet9#1;~id2~0 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_#t~nondet10#1;~st2~0 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_#t~nondet11#1;~send2~0 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_#t~nondet12#1;assume 0 == main_#t~nondet12#1 || 1 == main_#t~nondet12#1;~mode2~0 := (if 0 == main_#t~nondet12#1 % 256 then 0 else 1);havoc main_#t~nondet12#1;havoc main_#t~nondet13#1;~id3~0 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_#t~nondet14#1;~st3~0 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_#t~nondet15#1;~send3~0 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_#t~nondet16#1;assume 0 == main_#t~nondet16#1 || 1 == main_#t~nondet16#1;~mode3~0 := (if 0 == main_#t~nondet16#1 % 256 then 0 else 1);havoc main_#t~nondet16#1;havoc main_#t~nondet17#1;~id4~0 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_#t~nondet18#1;~st4~0 := main_#t~nondet18#1;havoc main_#t~nondet18#1;havoc main_#t~nondet19#1;~send4~0 := main_#t~nondet19#1;havoc main_#t~nondet19#1;havoc main_#t~nondet20#1;assume 0 == main_#t~nondet20#1 || 1 == main_#t~nondet20#1;~mode4~0 := (if 0 == main_#t~nondet20#1 % 256 then 0 else 1);havoc main_#t~nondet20#1;havoc main_#t~nondet21#1;~id5~0 := main_#t~nondet21#1;havoc main_#t~nondet21#1;havoc main_#t~nondet22#1;~st5~0 := main_#t~nondet22#1;havoc main_#t~nondet22#1;havoc main_#t~nondet23#1;~send5~0 := main_#t~nondet23#1;havoc main_#t~nondet23#1;havoc main_#t~nondet24#1;assume 0 == main_#t~nondet24#1 || 1 == main_#t~nondet24#1;~mode5~0 := (if 0 == main_#t~nondet24#1 % 256 then 0 else 1);havoc main_#t~nondet24#1;havoc main_#t~nondet25#1;~id6~0 := main_#t~nondet25#1;havoc main_#t~nondet25#1;havoc main_#t~nondet26#1;~st6~0 := main_#t~nondet26#1;havoc main_#t~nondet26#1;havoc main_#t~nondet27#1;~send6~0 := main_#t~nondet27#1;havoc main_#t~nondet27#1;havoc main_#t~nondet28#1;assume 0 == main_#t~nondet28#1 || 1 == main_#t~nondet28#1;~mode6~0 := (if 0 == main_#t~nondet28#1 % 256 then 0 else 1);havoc main_#t~nondet28#1;assume { :begin_inline_init } true;havoc init_#res#1;havoc init_~tmp~0#1;havoc init_~tmp~0#1;" "assume 0 == (if ~r1~0 % 256 % 4294967296 <= 2147483647 then ~r1~0 % 256 % 4294967296 else ~r1~0 % 256 % 4294967296 - 4294967296);" "assume ~id1~0 >= 0;" "assume 0 == ~st1~0;" "assume ~send1~0 == ~id1~0;" "assume 0 == (if ~mode1~0 % 256 % 4294967296 <= 2147483647 then ~mode1~0 % 256 % 4294967296 else ~mode1~0 % 256 % 4294967296 - 4294967296);" "assume ~id2~0 >= 0;" "assume 0 == ~st2~0;" "assume ~send2~0 == ~id2~0;" "assume 0 == (if ~mode2~0 % 256 % 4294967296 <= 2147483647 then ~mode2~0 % 256 % 4294967296 else ~mode2~0 % 256 % 4294967296 - 4294967296);" "assume ~id3~0 >= 0;" "assume 0 == ~st3~0;" "assume ~send3~0 == ~id3~0;" "assume 0 == (if ~mode3~0 % 256 % 4294967296 <= 2147483647 then ~mode3~0 % 256 % 4294967296 else ~mode3~0 % 256 % 4294967296 - 4294967296);" "assume ~id4~0 >= 0;" "assume 0 == ~st4~0;" "assume ~send4~0 == ~id4~0;" "assume 0 == (if ~mode4~0 % 256 % 4294967296 <= 2147483647 then ~mode4~0 % 256 % 4294967296 else ~mode4~0 % 256 % 4294967296 - 4294967296);" "assume ~id5~0 >= 0;" "assume 0 == ~st5~0;" "assume ~send5~0 == ~id5~0;" "assume 0 == (if ~mode5~0 % 256 % 4294967296 <= 2147483647 then ~mode5~0 % 256 % 4294967296 else ~mode5~0 % 256 % 4294967296 - 4294967296);" "assume ~id6~0 >= 0;" "assume 0 == ~st6~0;" "assume ~send6~0 == ~id6~0;" "assume 0 == (if ~mode6~0 % 256 % 4294967296 <= 2147483647 then ~mode6~0 % 256 % 4294967296 else ~mode6~0 % 256 % 4294967296 - 4294967296);" "assume ~id1~0 != ~id2~0;" "assume ~id1~0 != ~id3~0;" "assume ~id1~0 != ~id4~0;" "assume ~id1~0 != ~id5~0;" "assume ~id1~0 != ~id6~0;" "assume ~id2~0 != ~id3~0;" "assume ~id2~0 != ~id4~0;" "assume ~id2~0 != ~id5~0;" "assume ~id2~0 != ~id6~0;" "assume ~id3~0 != ~id4~0;" "assume ~id3~0 != ~id5~0;" "assume ~id3~0 != ~id6~0;" "assume ~id4~0 != ~id5~0;" "assume ~id4~0 != ~id6~0;" "assume ~id5~0 != ~id6~0;init_~tmp~0#1 := 1;" "init_#res#1 := init_~tmp~0#1;" "main_#t~ret29#1 := init_#res#1;havoc init_~tmp~0#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret29#1;havoc main_#t~ret29#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1;" "assume !(0 == assume_abort_if_not_~cond#1);" "havoc assume_abort_if_not_~cond#1;havoc assume_abort_if_not_#in~cond#1;assume { :end_inline_assume_abort_if_not } true;~p1_old~0 := ~nomsg~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~nomsg~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~nomsg~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~nomsg~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~nomsg~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~nomsg~0;~p6_new~0 := ~nomsg~0;main_~i2~0#1 := 0;" [2024-12-02 12:49:47,233 INFO L749 eck$LassoCheckResult]: Loop: "assume { :begin_inline_node1 } true;havoc node1_~m1~0#1;havoc node1_~m1~0#1;node1_~m1~0#1 := ~nomsg~0;" "assume !(0 != ~mode1~0 % 256);~p1_new~0 := (if (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 <= 127 then (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 else (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 - 256);~mode1~0 := 1;" "havoc node1_~m1~0#1;assume { :end_inline_node1 } true;assume { :begin_inline_node2 } true;havoc node2_~m2~0#1;havoc node2_~m2~0#1;node2_~m2~0#1 := ~nomsg~0;" "assume !(0 != ~mode2~0 % 256);~p2_new~0 := (if (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 <= 127 then (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 else (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 - 256);~mode2~0 := 1;" "havoc node2_~m2~0#1;assume { :end_inline_node2 } true;assume { :begin_inline_node3 } true;havoc node3_~m3~0#1;havoc node3_~m3~0#1;node3_~m3~0#1 := ~nomsg~0;" "assume !(0 != ~mode3~0 % 256);~p3_new~0 := (if (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 <= 127 then (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 else (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 - 256);~mode3~0 := 1;" "havoc node3_~m3~0#1;assume { :end_inline_node3 } true;assume { :begin_inline_node4 } true;havoc node4_~m4~0#1;havoc node4_~m4~0#1;node4_~m4~0#1 := ~nomsg~0;" "assume !(0 != ~mode4~0 % 256);~p4_new~0 := (if (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 <= 127 then (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 else (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 - 256);~mode4~0 := 1;" "havoc node4_~m4~0#1;assume { :end_inline_node4 } true;assume { :begin_inline_node5 } true;havoc node5_~m5~0#1;havoc node5_~m5~0#1;node5_~m5~0#1 := ~nomsg~0;" "assume !(0 != ~mode5~0 % 256);~p5_new~0 := (if (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 <= 127 then (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 else (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 - 256);~mode5~0 := 1;" "havoc node5_~m5~0#1;assume { :end_inline_node5 } true;assume { :begin_inline_node6 } true;havoc node6_~m6~0#1;havoc node6_~m6~0#1;node6_~m6~0#1 := ~nomsg~0;" "assume !(0 != ~mode6~0 % 256);~p6_new~0 := (if (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 <= 127 then (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 else (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 - 256);~mode6~0 := 1;" "havoc node6_~m6~0#1;assume { :end_inline_node6 } true;~p1_old~0 := ~p1_new~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~p2_new~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~p3_new~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~p4_new~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~p5_new~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~p6_new~0;~p6_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_~tmp~1#1;havoc check_~tmp~1#1;" "assume !(~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0 + ~st6~0 <= 1);check_~tmp~1#1 := 0;" "check_#res#1 := check_~tmp~1#1;" "main_#t~ret30#1 := check_#res#1;havoc check_~tmp~1#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret30#1;havoc main_#t~ret30#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1;" "assume !(0 == assert_~arg#1 % 256);" "havoc assert_~arg#1;havoc assert_#in~arg#1;assume { :end_inline_assert } true;" [2024-12-02 12:49:47,233 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 12:49:47,234 INFO L85 PathProgramCache]: Analyzing trace with hash -1716035805, now seen corresponding path program 1 times [2024-12-02 12:49:47,234 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM [2024-12-02 12:49:47,234 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1119904641] [2024-12-02 12:49:47,234 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 12:49:47,234 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 12:49:47,268 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-12-02 12:49:47,268 INFO L357 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-12-02 12:49:47,296 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-12-02 12:49:47,320 INFO L130 FreeRefinementEngine]: Strategy CAMEL_NO_AM found a feasible trace [2024-12-02 12:49:47,320 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 12:49:47,321 INFO L85 PathProgramCache]: Analyzing trace with hash 1350434034, now seen corresponding path program 2 times [2024-12-02 12:49:47,321 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM [2024-12-02 12:49:47,321 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2078513763] [2024-12-02 12:49:47,321 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 12:49:47,321 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 12:49:47,339 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 12:49:47,462 INFO L136 FreeRefinementEngine]: Strategy CAMEL_NO_AM found an infeasible trace [2024-12-02 12:49:47,462 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2078513763] [2024-12-02 12:49:47,462 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2078513763] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-02 12:49:47,462 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1593776626] [2024-12-02 12:49:47,462 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 12:49:47,463 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 12:49:47,463 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3950f7cc-6425-4a4c-9120-65d1a3b61ac3/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-02 12:49:47,467 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3950f7cc-6425-4a4c-9120-65d1a3b61ac3/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-12-02 12:49:47,468 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3950f7cc-6425-4a4c-9120-65d1a3b61ac3/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2024-12-02 12:49:47,537 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 12:49:47,539 INFO L256 TraceCheckSpWp]: Trace formula consists of 87 conjuncts, 11 conjuncts are in the unsatisfiable core [2024-12-02 12:49:47,540 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-02 12:49:47,559 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-12-02 12:49:47,613 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1593776626] provided 0 perfect and 2 imperfect interpolant sequences [2024-12-02 12:49:47,613 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-12-02 12:49:47,613 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5, 5] total 7 [2024-12-02 12:49:47,613 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [349317156] [2024-12-02 12:49:47,613 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-12-02 12:49:47,614 INFO L764 eck$LassoCheckResult]: loop already infeasible [2024-12-02 12:49:47,614 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL_NO_AM [2024-12-02 12:49:47,614 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-12-02 12:49:47,615 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=28, Unknown=0, NotChecked=0, Total=42 [2024-12-02 12:49:47,615 INFO L87 Difference]: Start difference. First operand 94 states and 124 transitions. cyclomatic complexity: 31 Second operand has 7 states, 7 states have (on average 3.142857142857143) internal successors, (22), 7 states have internal predecessors, (22), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-12-02 12:49:47,647 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 12:49:47,647 INFO L93 Difference]: Finished difference Result 97 states and 126 transitions. [2024-12-02 12:49:47,647 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 97 states and 126 transitions. [2024-12-02 12:49:47,649 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 48 [2024-12-02 12:49:47,651 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 97 states to 94 states and 121 transitions. [2024-12-02 12:49:47,651 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 94 [2024-12-02 12:49:47,652 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 94 [2024-12-02 12:49:47,652 INFO L73 IsDeterministic]: Start isDeterministic. Operand 94 states and 121 transitions. [2024-12-02 12:49:47,653 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-12-02 12:49:47,653 INFO L218 hiAutomatonCegarLoop]: Abstraction has 94 states and 121 transitions. [2024-12-02 12:49:47,653 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 94 states and 121 transitions. [2024-12-02 12:49:47,657 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 94 to 94. [2024-12-02 12:49:47,657 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 94 states, 94 states have (on average 1.2872340425531914) internal successors, (121), 93 states have internal predecessors, (121), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-12-02 12:49:47,658 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 94 states to 94 states and 121 transitions. [2024-12-02 12:49:47,658 INFO L240 hiAutomatonCegarLoop]: Abstraction has 94 states and 121 transitions. [2024-12-02 12:49:47,658 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-12-02 12:49:47,659 INFO L425 stractBuchiCegarLoop]: Abstraction has 94 states and 121 transitions. [2024-12-02 12:49:47,659 INFO L332 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2024-12-02 12:49:47,659 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 94 states and 121 transitions. [2024-12-02 12:49:47,661 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 48 [2024-12-02 12:49:47,661 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-12-02 12:49:47,661 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-12-02 12:49:47,662 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 12:49:47,662 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 12:49:47,662 INFO L747 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(32, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~r1~0 := 0;~p1~0 := 0;~p1_old~0 := 0;~p1_new~0 := 0;~id1~0 := 0;~st1~0 := 0;~send1~0 := 0;~mode1~0 := 0;~p2~0 := 0;~p2_old~0 := 0;~p2_new~0 := 0;~id2~0 := 0;~st2~0 := 0;~send2~0 := 0;~mode2~0 := 0;~p3~0 := 0;~p3_old~0 := 0;~p3_new~0 := 0;~id3~0 := 0;~st3~0 := 0;~send3~0 := 0;~mode3~0 := 0;~p4~0 := 0;~p4_old~0 := 0;~p4_new~0 := 0;~id4~0 := 0;~st4~0 := 0;~send4~0 := 0;~mode4~0 := 0;~p5~0 := 0;~p5_old~0 := 0;~p5_new~0 := 0;~id5~0 := 0;~st5~0 := 0;~send5~0 := 0;~mode5~0 := 0;~p6~0 := 0;~p6_old~0 := 0;~p6_new~0 := 0;~id6~0 := 0;~st6~0 := 0;~send6~0 := 0;~mode6~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~ret29#1, main_#t~ret30#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;havoc main_#t~nondet4#1;~r1~0 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;~id1~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_#t~nondet6#1;~st1~0 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_#t~nondet7#1;~send1~0 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_#t~nondet8#1;assume 0 == main_#t~nondet8#1 || 1 == main_#t~nondet8#1;~mode1~0 := (if 0 == main_#t~nondet8#1 % 256 then 0 else 1);havoc main_#t~nondet8#1;havoc main_#t~nondet9#1;~id2~0 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_#t~nondet10#1;~st2~0 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_#t~nondet11#1;~send2~0 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_#t~nondet12#1;assume 0 == main_#t~nondet12#1 || 1 == main_#t~nondet12#1;~mode2~0 := (if 0 == main_#t~nondet12#1 % 256 then 0 else 1);havoc main_#t~nondet12#1;havoc main_#t~nondet13#1;~id3~0 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_#t~nondet14#1;~st3~0 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_#t~nondet15#1;~send3~0 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_#t~nondet16#1;assume 0 == main_#t~nondet16#1 || 1 == main_#t~nondet16#1;~mode3~0 := (if 0 == main_#t~nondet16#1 % 256 then 0 else 1);havoc main_#t~nondet16#1;havoc main_#t~nondet17#1;~id4~0 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_#t~nondet18#1;~st4~0 := main_#t~nondet18#1;havoc main_#t~nondet18#1;havoc main_#t~nondet19#1;~send4~0 := main_#t~nondet19#1;havoc main_#t~nondet19#1;havoc main_#t~nondet20#1;assume 0 == main_#t~nondet20#1 || 1 == main_#t~nondet20#1;~mode4~0 := (if 0 == main_#t~nondet20#1 % 256 then 0 else 1);havoc main_#t~nondet20#1;havoc main_#t~nondet21#1;~id5~0 := main_#t~nondet21#1;havoc main_#t~nondet21#1;havoc main_#t~nondet22#1;~st5~0 := main_#t~nondet22#1;havoc main_#t~nondet22#1;havoc main_#t~nondet23#1;~send5~0 := main_#t~nondet23#1;havoc main_#t~nondet23#1;havoc main_#t~nondet24#1;assume 0 == main_#t~nondet24#1 || 1 == main_#t~nondet24#1;~mode5~0 := (if 0 == main_#t~nondet24#1 % 256 then 0 else 1);havoc main_#t~nondet24#1;havoc main_#t~nondet25#1;~id6~0 := main_#t~nondet25#1;havoc main_#t~nondet25#1;havoc main_#t~nondet26#1;~st6~0 := main_#t~nondet26#1;havoc main_#t~nondet26#1;havoc main_#t~nondet27#1;~send6~0 := main_#t~nondet27#1;havoc main_#t~nondet27#1;havoc main_#t~nondet28#1;assume 0 == main_#t~nondet28#1 || 1 == main_#t~nondet28#1;~mode6~0 := (if 0 == main_#t~nondet28#1 % 256 then 0 else 1);havoc main_#t~nondet28#1;assume { :begin_inline_init } true;havoc init_#res#1;havoc init_~tmp~0#1;havoc init_~tmp~0#1;" "assume 0 == (if ~r1~0 % 256 % 4294967296 <= 2147483647 then ~r1~0 % 256 % 4294967296 else ~r1~0 % 256 % 4294967296 - 4294967296);" "assume ~id1~0 >= 0;" "assume 0 == ~st1~0;" "assume ~send1~0 == ~id1~0;" "assume 0 == (if ~mode1~0 % 256 % 4294967296 <= 2147483647 then ~mode1~0 % 256 % 4294967296 else ~mode1~0 % 256 % 4294967296 - 4294967296);" "assume ~id2~0 >= 0;" "assume 0 == ~st2~0;" "assume ~send2~0 == ~id2~0;" "assume 0 == (if ~mode2~0 % 256 % 4294967296 <= 2147483647 then ~mode2~0 % 256 % 4294967296 else ~mode2~0 % 256 % 4294967296 - 4294967296);" "assume ~id3~0 >= 0;" "assume 0 == ~st3~0;" "assume ~send3~0 == ~id3~0;" "assume 0 == (if ~mode3~0 % 256 % 4294967296 <= 2147483647 then ~mode3~0 % 256 % 4294967296 else ~mode3~0 % 256 % 4294967296 - 4294967296);" "assume ~id4~0 >= 0;" "assume 0 == ~st4~0;" "assume ~send4~0 == ~id4~0;" "assume 0 == (if ~mode4~0 % 256 % 4294967296 <= 2147483647 then ~mode4~0 % 256 % 4294967296 else ~mode4~0 % 256 % 4294967296 - 4294967296);" "assume ~id5~0 >= 0;" "assume 0 == ~st5~0;" "assume ~send5~0 == ~id5~0;" "assume 0 == (if ~mode5~0 % 256 % 4294967296 <= 2147483647 then ~mode5~0 % 256 % 4294967296 else ~mode5~0 % 256 % 4294967296 - 4294967296);" "assume ~id6~0 >= 0;" "assume 0 == ~st6~0;" "assume ~send6~0 == ~id6~0;" "assume 0 == (if ~mode6~0 % 256 % 4294967296 <= 2147483647 then ~mode6~0 % 256 % 4294967296 else ~mode6~0 % 256 % 4294967296 - 4294967296);" "assume ~id1~0 != ~id2~0;" "assume ~id1~0 != ~id3~0;" "assume ~id1~0 != ~id4~0;" "assume ~id1~0 != ~id5~0;" "assume ~id1~0 != ~id6~0;" "assume ~id2~0 != ~id3~0;" "assume ~id2~0 != ~id4~0;" "assume ~id2~0 != ~id5~0;" "assume ~id2~0 != ~id6~0;" "assume ~id3~0 != ~id4~0;" "assume ~id3~0 != ~id5~0;" "assume ~id3~0 != ~id6~0;" "assume ~id4~0 != ~id5~0;" "assume ~id4~0 != ~id6~0;" "assume ~id5~0 != ~id6~0;init_~tmp~0#1 := 1;" "init_#res#1 := init_~tmp~0#1;" "main_#t~ret29#1 := init_#res#1;havoc init_~tmp~0#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret29#1;havoc main_#t~ret29#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1;" "assume !(0 == assume_abort_if_not_~cond#1);" "havoc assume_abort_if_not_~cond#1;havoc assume_abort_if_not_#in~cond#1;assume { :end_inline_assume_abort_if_not } true;~p1_old~0 := ~nomsg~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~nomsg~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~nomsg~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~nomsg~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~nomsg~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~nomsg~0;~p6_new~0 := ~nomsg~0;main_~i2~0#1 := 0;" [2024-12-02 12:49:47,663 INFO L749 eck$LassoCheckResult]: Loop: "assume { :begin_inline_node1 } true;havoc node1_~m1~0#1;havoc node1_~m1~0#1;node1_~m1~0#1 := ~nomsg~0;" "assume !(0 != ~mode1~0 % 256);~p1_new~0 := (if (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 <= 127 then (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 else (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 - 256);~mode1~0 := 1;" "havoc node1_~m1~0#1;assume { :end_inline_node1 } true;assume { :begin_inline_node2 } true;havoc node2_~m2~0#1;havoc node2_~m2~0#1;node2_~m2~0#1 := ~nomsg~0;" "assume !(0 != ~mode2~0 % 256);~p2_new~0 := (if (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 <= 127 then (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 else (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 - 256);~mode2~0 := 1;" "havoc node2_~m2~0#1;assume { :end_inline_node2 } true;assume { :begin_inline_node3 } true;havoc node3_~m3~0#1;havoc node3_~m3~0#1;node3_~m3~0#1 := ~nomsg~0;" "assume !(0 != ~mode3~0 % 256);~p3_new~0 := (if (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 <= 127 then (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 else (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 - 256);~mode3~0 := 1;" "havoc node3_~m3~0#1;assume { :end_inline_node3 } true;assume { :begin_inline_node4 } true;havoc node4_~m4~0#1;havoc node4_~m4~0#1;node4_~m4~0#1 := ~nomsg~0;" "assume !(0 != ~mode4~0 % 256);~p4_new~0 := (if (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 <= 127 then (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 else (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 - 256);~mode4~0 := 1;" "havoc node4_~m4~0#1;assume { :end_inline_node4 } true;assume { :begin_inline_node5 } true;havoc node5_~m5~0#1;havoc node5_~m5~0#1;node5_~m5~0#1 := ~nomsg~0;" "assume !(0 != ~mode5~0 % 256);~p5_new~0 := (if (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 <= 127 then (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 else (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 - 256);~mode5~0 := 1;" "havoc node5_~m5~0#1;assume { :end_inline_node5 } true;assume { :begin_inline_node6 } true;havoc node6_~m6~0#1;havoc node6_~m6~0#1;node6_~m6~0#1 := ~nomsg~0;" "assume !(0 != ~mode6~0 % 256);~p6_new~0 := (if (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 <= 127 then (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 else (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 - 256);~mode6~0 := 1;" "havoc node6_~m6~0#1;assume { :end_inline_node6 } true;~p1_old~0 := ~p1_new~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~p2_new~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~p3_new~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~p4_new~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~p5_new~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~p6_new~0;~p6_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_~tmp~1#1;havoc check_~tmp~1#1;" "assume ~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0 + ~st6~0 <= 1;" "assume (if ~r1~0 % 256 % 4294967296 <= 2147483647 then ~r1~0 % 256 % 4294967296 else ~r1~0 % 256 % 4294967296 - 4294967296) >= 6;" "assume (if ~r1~0 % 256 % 4294967296 <= 2147483647 then ~r1~0 % 256 % 4294967296 else ~r1~0 % 256 % 4294967296 - 4294967296) < 6;check_~tmp~1#1 := 1;" "check_#res#1 := check_~tmp~1#1;" "main_#t~ret30#1 := check_#res#1;havoc check_~tmp~1#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret30#1;havoc main_#t~ret30#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1;" "assume !(0 == assert_~arg#1 % 256);" "havoc assert_~arg#1;havoc assert_#in~arg#1;assume { :end_inline_assert } true;" [2024-12-02 12:49:47,663 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 12:49:47,664 INFO L85 PathProgramCache]: Analyzing trace with hash -1716035805, now seen corresponding path program 2 times [2024-12-02 12:49:47,664 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM [2024-12-02 12:49:47,664 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [877701124] [2024-12-02 12:49:47,664 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 12:49:47,664 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 12:49:47,698 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-12-02 12:49:47,698 INFO L357 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-12-02 12:49:47,726 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-12-02 12:49:47,737 INFO L130 FreeRefinementEngine]: Strategy CAMEL_NO_AM found a feasible trace [2024-12-02 12:49:47,738 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 12:49:47,738 INFO L85 PathProgramCache]: Analyzing trace with hash -728895134, now seen corresponding path program 1 times [2024-12-02 12:49:47,738 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM [2024-12-02 12:49:47,738 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1011050243] [2024-12-02 12:49:47,738 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 12:49:47,739 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 12:49:47,753 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 12:49:47,780 INFO L136 FreeRefinementEngine]: Strategy CAMEL_NO_AM found an infeasible trace [2024-12-02 12:49:47,780 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1011050243] [2024-12-02 12:49:47,781 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1011050243] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-02 12:49:47,781 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1602997663] [2024-12-02 12:49:47,781 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 12:49:47,781 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 12:49:47,781 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3950f7cc-6425-4a4c-9120-65d1a3b61ac3/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-02 12:49:47,783 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3950f7cc-6425-4a4c-9120-65d1a3b61ac3/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-12-02 12:49:47,784 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3950f7cc-6425-4a4c-9120-65d1a3b61ac3/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2024-12-02 12:49:47,855 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 12:49:47,856 INFO L256 TraceCheckSpWp]: Trace formula consists of 89 conjuncts, 2 conjuncts are in the unsatisfiable core [2024-12-02 12:49:47,858 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-02 12:49:47,865 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-12-02 12:49:47,872 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1602997663] provided 0 perfect and 2 imperfect interpolant sequences [2024-12-02 12:49:47,872 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-12-02 12:49:47,872 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [3, 3, 3] total 3 [2024-12-02 12:49:47,873 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1269040618] [2024-12-02 12:49:47,873 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-12-02 12:49:47,873 INFO L764 eck$LassoCheckResult]: loop already infeasible [2024-12-02 12:49:47,873 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL_NO_AM [2024-12-02 12:49:47,874 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2024-12-02 12:49:47,874 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-12-02 12:49:47,874 INFO L87 Difference]: Start difference. First operand 94 states and 121 transitions. cyclomatic complexity: 28 Second operand has 3 states, 3 states have (on average 6.666666666666667) internal successors, (20), 3 states have internal predecessors, (20), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-12-02 12:49:47,909 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 12:49:47,910 INFO L93 Difference]: Finished difference Result 136 states and 185 transitions. [2024-12-02 12:49:47,910 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 136 states and 185 transitions. [2024-12-02 12:49:47,911 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 90 [2024-12-02 12:49:47,913 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 136 states to 136 states and 185 transitions. [2024-12-02 12:49:47,913 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 136 [2024-12-02 12:49:47,913 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 136 [2024-12-02 12:49:47,913 INFO L73 IsDeterministic]: Start isDeterministic. Operand 136 states and 185 transitions. [2024-12-02 12:49:47,914 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-12-02 12:49:47,914 INFO L218 hiAutomatonCegarLoop]: Abstraction has 136 states and 185 transitions. [2024-12-02 12:49:47,914 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 136 states and 185 transitions. [2024-12-02 12:49:47,919 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 136 to 134. [2024-12-02 12:49:47,920 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 134 states, 134 states have (on average 1.3582089552238805) internal successors, (182), 133 states have internal predecessors, (182), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-12-02 12:49:47,921 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 134 states to 134 states and 182 transitions. [2024-12-02 12:49:47,921 INFO L240 hiAutomatonCegarLoop]: Abstraction has 134 states and 182 transitions. [2024-12-02 12:49:47,921 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-12-02 12:49:47,922 INFO L425 stractBuchiCegarLoop]: Abstraction has 134 states and 182 transitions. [2024-12-02 12:49:47,922 INFO L332 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2024-12-02 12:49:47,922 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 134 states and 182 transitions. [2024-12-02 12:49:47,924 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 88 [2024-12-02 12:49:47,924 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-12-02 12:49:47,924 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-12-02 12:49:47,925 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 12:49:47,925 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 12:49:47,926 INFO L747 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(32, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~r1~0 := 0;~p1~0 := 0;~p1_old~0 := 0;~p1_new~0 := 0;~id1~0 := 0;~st1~0 := 0;~send1~0 := 0;~mode1~0 := 0;~p2~0 := 0;~p2_old~0 := 0;~p2_new~0 := 0;~id2~0 := 0;~st2~0 := 0;~send2~0 := 0;~mode2~0 := 0;~p3~0 := 0;~p3_old~0 := 0;~p3_new~0 := 0;~id3~0 := 0;~st3~0 := 0;~send3~0 := 0;~mode3~0 := 0;~p4~0 := 0;~p4_old~0 := 0;~p4_new~0 := 0;~id4~0 := 0;~st4~0 := 0;~send4~0 := 0;~mode4~0 := 0;~p5~0 := 0;~p5_old~0 := 0;~p5_new~0 := 0;~id5~0 := 0;~st5~0 := 0;~send5~0 := 0;~mode5~0 := 0;~p6~0 := 0;~p6_old~0 := 0;~p6_new~0 := 0;~id6~0 := 0;~st6~0 := 0;~send6~0 := 0;~mode6~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~ret29#1, main_#t~ret30#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;havoc main_#t~nondet4#1;~r1~0 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;~id1~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_#t~nondet6#1;~st1~0 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_#t~nondet7#1;~send1~0 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_#t~nondet8#1;assume 0 == main_#t~nondet8#1 || 1 == main_#t~nondet8#1;~mode1~0 := (if 0 == main_#t~nondet8#1 % 256 then 0 else 1);havoc main_#t~nondet8#1;havoc main_#t~nondet9#1;~id2~0 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_#t~nondet10#1;~st2~0 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_#t~nondet11#1;~send2~0 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_#t~nondet12#1;assume 0 == main_#t~nondet12#1 || 1 == main_#t~nondet12#1;~mode2~0 := (if 0 == main_#t~nondet12#1 % 256 then 0 else 1);havoc main_#t~nondet12#1;havoc main_#t~nondet13#1;~id3~0 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_#t~nondet14#1;~st3~0 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_#t~nondet15#1;~send3~0 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_#t~nondet16#1;assume 0 == main_#t~nondet16#1 || 1 == main_#t~nondet16#1;~mode3~0 := (if 0 == main_#t~nondet16#1 % 256 then 0 else 1);havoc main_#t~nondet16#1;havoc main_#t~nondet17#1;~id4~0 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_#t~nondet18#1;~st4~0 := main_#t~nondet18#1;havoc main_#t~nondet18#1;havoc main_#t~nondet19#1;~send4~0 := main_#t~nondet19#1;havoc main_#t~nondet19#1;havoc main_#t~nondet20#1;assume 0 == main_#t~nondet20#1 || 1 == main_#t~nondet20#1;~mode4~0 := (if 0 == main_#t~nondet20#1 % 256 then 0 else 1);havoc main_#t~nondet20#1;havoc main_#t~nondet21#1;~id5~0 := main_#t~nondet21#1;havoc main_#t~nondet21#1;havoc main_#t~nondet22#1;~st5~0 := main_#t~nondet22#1;havoc main_#t~nondet22#1;havoc main_#t~nondet23#1;~send5~0 := main_#t~nondet23#1;havoc main_#t~nondet23#1;havoc main_#t~nondet24#1;assume 0 == main_#t~nondet24#1 || 1 == main_#t~nondet24#1;~mode5~0 := (if 0 == main_#t~nondet24#1 % 256 then 0 else 1);havoc main_#t~nondet24#1;havoc main_#t~nondet25#1;~id6~0 := main_#t~nondet25#1;havoc main_#t~nondet25#1;havoc main_#t~nondet26#1;~st6~0 := main_#t~nondet26#1;havoc main_#t~nondet26#1;havoc main_#t~nondet27#1;~send6~0 := main_#t~nondet27#1;havoc main_#t~nondet27#1;havoc main_#t~nondet28#1;assume 0 == main_#t~nondet28#1 || 1 == main_#t~nondet28#1;~mode6~0 := (if 0 == main_#t~nondet28#1 % 256 then 0 else 1);havoc main_#t~nondet28#1;assume { :begin_inline_init } true;havoc init_#res#1;havoc init_~tmp~0#1;havoc init_~tmp~0#1;" "assume 0 == (if ~r1~0 % 256 % 4294967296 <= 2147483647 then ~r1~0 % 256 % 4294967296 else ~r1~0 % 256 % 4294967296 - 4294967296);" "assume ~id1~0 >= 0;" "assume 0 == ~st1~0;" "assume ~send1~0 == ~id1~0;" "assume 0 == (if ~mode1~0 % 256 % 4294967296 <= 2147483647 then ~mode1~0 % 256 % 4294967296 else ~mode1~0 % 256 % 4294967296 - 4294967296);" "assume ~id2~0 >= 0;" "assume 0 == ~st2~0;" "assume ~send2~0 == ~id2~0;" "assume 0 == (if ~mode2~0 % 256 % 4294967296 <= 2147483647 then ~mode2~0 % 256 % 4294967296 else ~mode2~0 % 256 % 4294967296 - 4294967296);" "assume ~id3~0 >= 0;" "assume 0 == ~st3~0;" "assume ~send3~0 == ~id3~0;" "assume 0 == (if ~mode3~0 % 256 % 4294967296 <= 2147483647 then ~mode3~0 % 256 % 4294967296 else ~mode3~0 % 256 % 4294967296 - 4294967296);" "assume ~id4~0 >= 0;" "assume 0 == ~st4~0;" "assume ~send4~0 == ~id4~0;" "assume 0 == (if ~mode4~0 % 256 % 4294967296 <= 2147483647 then ~mode4~0 % 256 % 4294967296 else ~mode4~0 % 256 % 4294967296 - 4294967296);" "assume ~id5~0 >= 0;" "assume 0 == ~st5~0;" "assume ~send5~0 == ~id5~0;" "assume 0 == (if ~mode5~0 % 256 % 4294967296 <= 2147483647 then ~mode5~0 % 256 % 4294967296 else ~mode5~0 % 256 % 4294967296 - 4294967296);" "assume ~id6~0 >= 0;" "assume 0 == ~st6~0;" "assume ~send6~0 == ~id6~0;" "assume 0 == (if ~mode6~0 % 256 % 4294967296 <= 2147483647 then ~mode6~0 % 256 % 4294967296 else ~mode6~0 % 256 % 4294967296 - 4294967296);" "assume ~id1~0 != ~id2~0;" "assume ~id1~0 != ~id3~0;" "assume ~id1~0 != ~id4~0;" "assume ~id1~0 != ~id5~0;" "assume ~id1~0 != ~id6~0;" "assume ~id2~0 != ~id3~0;" "assume ~id2~0 != ~id4~0;" "assume ~id2~0 != ~id5~0;" "assume ~id2~0 != ~id6~0;" "assume ~id3~0 != ~id4~0;" "assume ~id3~0 != ~id5~0;" "assume ~id3~0 != ~id6~0;" "assume ~id4~0 != ~id5~0;" "assume ~id4~0 != ~id6~0;" "assume ~id5~0 != ~id6~0;init_~tmp~0#1 := 1;" "init_#res#1 := init_~tmp~0#1;" "main_#t~ret29#1 := init_#res#1;havoc init_~tmp~0#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret29#1;havoc main_#t~ret29#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1;" "assume !(0 == assume_abort_if_not_~cond#1);" "havoc assume_abort_if_not_~cond#1;havoc assume_abort_if_not_#in~cond#1;assume { :end_inline_assume_abort_if_not } true;~p1_old~0 := ~nomsg~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~nomsg~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~nomsg~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~nomsg~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~nomsg~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~nomsg~0;~p6_new~0 := ~nomsg~0;main_~i2~0#1 := 0;" [2024-12-02 12:49:47,926 INFO L749 eck$LassoCheckResult]: Loop: "assume { :begin_inline_node1 } true;havoc node1_~m1~0#1;havoc node1_~m1~0#1;node1_~m1~0#1 := ~nomsg~0;" "assume !(0 != ~mode1~0 % 256);~p1_new~0 := (if (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 <= 127 then (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 else (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 - 256);~mode1~0 := 1;" "havoc node1_~m1~0#1;assume { :end_inline_node1 } true;assume { :begin_inline_node2 } true;havoc node2_~m2~0#1;havoc node2_~m2~0#1;node2_~m2~0#1 := ~nomsg~0;" "assume !(0 != ~mode2~0 % 256);~p2_new~0 := (if (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 <= 127 then (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 else (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 - 256);~mode2~0 := 1;" "havoc node2_~m2~0#1;assume { :end_inline_node2 } true;assume { :begin_inline_node3 } true;havoc node3_~m3~0#1;havoc node3_~m3~0#1;node3_~m3~0#1 := ~nomsg~0;" "assume !(0 != ~mode3~0 % 256);~p3_new~0 := (if (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 <= 127 then (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 else (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 - 256);~mode3~0 := 1;" "havoc node3_~m3~0#1;assume { :end_inline_node3 } true;assume { :begin_inline_node4 } true;havoc node4_~m4~0#1;havoc node4_~m4~0#1;node4_~m4~0#1 := ~nomsg~0;" "assume !(0 != ~mode4~0 % 256);~p4_new~0 := (if (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 <= 127 then (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 else (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 - 256);~mode4~0 := 1;" "havoc node4_~m4~0#1;assume { :end_inline_node4 } true;assume { :begin_inline_node5 } true;havoc node5_~m5~0#1;havoc node5_~m5~0#1;node5_~m5~0#1 := ~nomsg~0;" "assume !(0 != ~mode5~0 % 256);~p5_new~0 := (if (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 <= 127 then (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 else (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 - 256);~mode5~0 := 1;" "havoc node5_~m5~0#1;assume { :end_inline_node5 } true;assume { :begin_inline_node6 } true;havoc node6_~m6~0#1;havoc node6_~m6~0#1;node6_~m6~0#1 := ~nomsg~0;" "assume !(0 != ~mode6~0 % 256);~p6_new~0 := (if (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 <= 127 then (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 else (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 - 256);~mode6~0 := 1;" "havoc node6_~m6~0#1;assume { :end_inline_node6 } true;~p1_old~0 := ~p1_new~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~p2_new~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~p3_new~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~p4_new~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~p5_new~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~p6_new~0;~p6_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_~tmp~1#1;havoc check_~tmp~1#1;" "assume ~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0 + ~st6~0 <= 1;" "assume !((if ~r1~0 % 256 % 4294967296 <= 2147483647 then ~r1~0 % 256 % 4294967296 else ~r1~0 % 256 % 4294967296 - 4294967296) >= 6);" "assume 0 == ~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0 + ~st6~0;" "assume (if ~r1~0 % 256 % 4294967296 <= 2147483647 then ~r1~0 % 256 % 4294967296 else ~r1~0 % 256 % 4294967296 - 4294967296) < 6;check_~tmp~1#1 := 1;" "check_#res#1 := check_~tmp~1#1;" "main_#t~ret30#1 := check_#res#1;havoc check_~tmp~1#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret30#1;havoc main_#t~ret30#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1;" "assume !(0 == assert_~arg#1 % 256);" "havoc assert_~arg#1;havoc assert_#in~arg#1;assume { :end_inline_assert } true;" [2024-12-02 12:49:47,926 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 12:49:47,926 INFO L85 PathProgramCache]: Analyzing trace with hash -1716035805, now seen corresponding path program 3 times [2024-12-02 12:49:47,926 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM [2024-12-02 12:49:47,927 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1245896244] [2024-12-02 12:49:47,927 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 12:49:47,927 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 12:49:47,959 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-12-02 12:49:47,959 INFO L357 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-12-02 12:49:47,985 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-12-02 12:49:47,995 INFO L130 FreeRefinementEngine]: Strategy CAMEL_NO_AM found a feasible trace [2024-12-02 12:49:47,996 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 12:49:47,996 INFO L85 PathProgramCache]: Analyzing trace with hash 525657443, now seen corresponding path program 1 times [2024-12-02 12:49:47,996 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM [2024-12-02 12:49:47,996 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [578977718] [2024-12-02 12:49:47,996 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 12:49:47,996 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 12:49:48,026 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-12-02 12:49:48,027 INFO L357 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-12-02 12:49:48,054 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-12-02 12:49:48,059 INFO L130 FreeRefinementEngine]: Strategy CAMEL_NO_AM found a feasible trace [2024-12-02 12:49:48,059 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 12:49:48,059 INFO L85 PathProgramCache]: Analyzing trace with hash 201437057, now seen corresponding path program 1 times [2024-12-02 12:49:48,060 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM [2024-12-02 12:49:48,060 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [361587007] [2024-12-02 12:49:48,060 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 12:49:48,060 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 12:49:48,122 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-12-02 12:49:48,122 INFO L357 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-12-02 12:49:48,161 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-12-02 12:49:48,182 INFO L130 FreeRefinementEngine]: Strategy CAMEL_NO_AM found a feasible trace [2024-12-02 12:49:52,907 INFO L204 LassoAnalysis]: Preferences: [2024-12-02 12:49:52,908 INFO L125 ssoRankerPreferences]: Compute integeral hull: false [2024-12-02 12:49:52,908 INFO L126 ssoRankerPreferences]: Enable LassoPartitioneer: true [2024-12-02 12:49:52,908 INFO L127 ssoRankerPreferences]: Term annotations enabled: false [2024-12-02 12:49:52,908 INFO L128 ssoRankerPreferences]: Use exernal solver: true [2024-12-02 12:49:52,908 INFO L129 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-12-02 12:49:52,908 INFO L130 ssoRankerPreferences]: Dump SMT script to file: false [2024-12-02 12:49:52,908 INFO L131 ssoRankerPreferences]: Path of dumped script: [2024-12-02 12:49:52,908 INFO L132 ssoRankerPreferences]: Filename of dumped script: pals_lcr.6.ufo.UNBOUNDED.pals.c_Iteration4_Loop [2024-12-02 12:49:52,908 INFO L133 ssoRankerPreferences]: MapElimAlgo: Frank [2024-12-02 12:49:52,908 INFO L241 LassoAnalysis]: Starting lasso preprocessing... [2024-12-02 12:49:52,938 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-12-02 12:49:52,946 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-12-02 12:49:52,951 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-12-02 12:49:52,953 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-12-02 12:49:52,955 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-12-02 12:49:52,956 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-12-02 12:49:52,959 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-12-02 12:49:52,960 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-12-02 12:49:55,382 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-12-02 12:49:55,384 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-12-02 12:49:55,388 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-12-02 12:49:55,390 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-12-02 12:49:55,394 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-12-02 12:49:55,396 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-12-02 12:49:55,397 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-12-02 12:49:55,401 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-12-02 12:49:55,403 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-12-02 12:49:55,408 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-12-02 12:49:55,409 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-12-02 12:49:55,411 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-12-02 12:49:57,024 WARN L137 XnfTransformerHelper]: expecting exponential blowup for input size 31